Texas Instruments | TPS7A6201-Q1 300-mA, 40-V, Low-Dropout Regulator With 25-µA Quiescent Current (Rev. D) | Datasheet | Texas Instruments TPS7A6201-Q1 300-mA, 40-V, Low-Dropout Regulator With 25-µA Quiescent Current (Rev. D) Datasheet

Texas Instruments TPS7A6201-Q1 300-mA, 40-V, Low-Dropout Regulator With 25-µA Quiescent Current (Rev. D) Datasheet
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TPS7A6201-Q1
SLVSAA0D – NOVEMBER 2010 – REVISED MAY 2018
TPS7A6201-Q1 300-mA, 40-V, Low-Dropout Regulator With 25-µA Quiescent Current
1 Features
2 Applications
•
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1
•
•
•
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Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results:
– Device Temperature Grade 0: –40°C to 150°C
– Device HBM ESD Classification Level 2
Low Dropout Voltage
– 300 mV at IOUT = 150 mA
11-V to 40-V Wide Input Voltage Range
With up to 45-V Transients
300-mA Maximum Output Current
Ultra-Low Quiescent Current
– IQUIESCENT = 25 µA (Typical) at Light Loads
– ISLEEP < 2 µA When EN = Low
2.5-V to 7-V Adjustable Output Voltage
Low-ESR Ceramic Output Stability Capacitor
Integrated Fault Protection
– Short-Circuit and Overcurrent Protection
– Thermal Shutdown
Low Input Voltage Tracking
Thermally Enhanced Power Package
– 5-Pin TO-263 (KTT, D2PAK)
Qualified for Automotive Applications
Infotainment Systems With Sleep Mode
Body Control Modules
Always ON Battery Applications
– Gateway Applications
– Remote Keyless Entry Systems
– Immobilizers
3 Description
The TPS7A6201 is a low-dropout linear voltage
regulator designed for low power consumption and
quiescent current less than 25 µA in light-load
applications. This device features an integrated overcurrent protection, and is designed to achieve stable
operation even with low-ESR ceramic output
capacitors. The output voltage can be programmed
using external resistors. The low-voltage tracking
feature allows for a smaller input capacitor and can
possibly eliminate the need of using a boost
converter during cold crank conditions. Because of
these features, this device is well suited in power
supplies for various automotive applications.
Device Information(1)
PART NUMBER
TPS7A6201-Q1
PACKAGE
TO-263 (5)
BODY SIZE (NOM)
10.16 mm × 8.42 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Regulator Stability
Application Schematic
10
ESR of COUT (Ω)
VIN = 14V
COUT = 10µF, 47µF
TA = 27°C
VOUT = 5V, 3.3V
TPS7A6201
VIN
1
VIN
VOUT
R1
CIN
Stable Operation
Over Entire Region
VEN
VOUT
EN
COUT
FB
R2
0.1
GND
Copyright © 2016, Texas Instruments Incorporated
0.01
0.01
0.1
1
10
100 300
IOUT (mA)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS7A6201-Q1
SLVSAA0D – NOVEMBER 2010 – REVISED MAY 2018
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
6.1
6.2
6.3
6.4
6.5
6.6
6.7
3
3
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Dissipation Ratings ...................................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
7.4 Device Functional Modes........................................ 13
8
Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Application ................................................. 14
9 Power Supply Recommendations...................... 15
10 Layout................................................................... 16
10.1 Layout Guidelines ................................................. 16
10.2 Layout Example .................................................... 18
11 Device and Documentation Support ................. 19
11.1
11.2
11.3
11.4
11.5
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
19
19
19
19
19
12 Mechanical, Packaging, and Orderable
Information ........................................................... 19
12.1 Package Option Addendum .................................. 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (July 2016) to Revision D
Page
•
Changed 4 V to 11 V in fourth Features bullet ...................................................................................................................... 1
•
Changed Programmable to Adjustable in Output Voltage Features bullet ............................................................................ 1
•
Changed VIN, VEN parameter row in Recommended Operating Conditions table: separated VIN and VEN into different
rows, changed VIN minimum specification from 4 V to 11 V ................................................................................................. 4
•
Changed VIN parameter minimum specification from 4 V to 11 V in Electrical Characteristics table..................................... 4
•
Changed 4 V to 11 V in Input voltage range row of Design Parameters table .................................................................... 14
•
Changed 4 V to 11 V in first sentence of Power Supply Recommendations section........................................................... 15
Changes from Revision B (March 2012) to Revision C
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
•
Removed Ordering Information table, see POA at the end of the data sheet ...................................................................... 1
•
Changed Thermal Information table ...................................................................................................................................... 4
Changes from Revision A (December 2011) to Revision B
•
2
Page
Added value to test conditions field in Regulated Output Voltage 6.1 (IOUT = 10 mA to 300 mA, VIN= VOUT + 1 V to 16 V) . 4
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SLVSAA0D – NOVEMBER 2010 – REVISED MAY 2018
5 Pin Configuration and Functions
KTT Package
5-Pin TO-263
Top View
1
2
3
4
VIN
EN
GND
FB
5
VOUT
Pin Functions
PIN
NO.
I/O
NAME
DESCRIPTION
1
VIN
I
Input voltage pin: The unregulated input voltage is supplied to this pin. A bypass capacitor shall be
connected between VIN pin and GND pin to dampen input line transients.
2
EN
I
Enable pin: This is a high voltage tolerant input pin with an internal pulldown. A high input to this pin
activates the device and turns the regulator ON. This input can be connected to VIN terminal for self
bias applications. If this pin is not connected, the device stays disabled.
3
GND
I/O
4
FB
I
Feedback pin: This pin is used to connect external resistors to ground to program the output voltage.
5
VOUT
O
Regulated output voltage pin: This is a regulated output voltage pin with a limitation on maximum output
current. An external resistor divider is connected at this pin to program the output voltage. To achieve
stable operation and prevent oscillation, an external output capacitor (COUT) with low ESR shall be
connected between this pin and GND pin.
Ground pin: This is signal ground pin of the IC.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
(2)
MIN
MAX
UNIT
–0.3
45
V
7
V
VIN, VEN
Unregulated inputs
VOUT
Regulated output
VFB
Feedback voltage
–0.3
7
V
TOP
Operating ambient temperature
–40
125
°C
TLEAD
Lead temperature (soldering, 10 s)
260
°C
Tstg
Storage temperature
150
°C
(1)
(2)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to GND.
Absolute maximum voltage for duration less than 480 ms.
6.2 ESD Ratings
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1) (2)
VALUE
UNIT
±2000
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
Tested in accordance with JEDEC Standard 22, Test Method A114-A (100-pF capacitor discharged through a 1.5-kΩ resistor into each
pin).
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6.3 Recommended Operating Conditions
VIN
Unregulated input voltage
VEN
Enable pin voltage
TJ
Operating junction temperature
MIN
MAX
11
40
UNIT
4
40
V
–40
150
°C
V
6.4 Thermal Information
TPS7A6201-Q1
THERMAL METRIC
(1)
KTT (TO-263)
UNIT
5 PINS
High-K (2)
30.2
(3)
34.4
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
38.9
°C/W
RθJB
Junction-to-board thermal resistance
7.4
°C/W
ψJT
Junction-to-top characterization parameter
3.8
°C/W
ψJB
Junction-to-board characterization parameter
7.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
1.5
°C/W
θJP
Thermal impedance junction to exposed pad KTT (D2PAK) package
10.4
°C/W
(1)
(2)
(3)
Low-K
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
The thermal data is based on JEDEC standard high K profile – JESD 51-5. The copper pad is soldered to the thermal land pattern. Also
correct attachment procedure must be incorporated.
The thermal data is based on JEDEC standard low K profile – JESD 51-3. The copper pad is soldered to the thermal land pattern. Also
correct attachment procedure must be incorporated.
6.5 Electrical Characteristics
VIN = 14 V, TJ = –40ºC to 150ºC (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT VOLTAGE (VIN PIN)
VIN
Input voltage
11
40
V
40
µA
3
µA
IQUIESCENT
Quiescent current
VIN = 8.2 V to 18 V, VEN = 5 V,
IOUT = 0.01 mA to 0.75 mA
ISLEEP
Sleep/shutdown
current
VIN = 8.2 V to 18 V, VEN < 0.8 V,
IOUT = 0 mA (no load), TA = 125°C
VIN-UVLO
Undervoltage lockout
voltage
Ramp VIN down until output is turned OFF
3.16
V
VIN(POWERUP)
Power-up voltage
Ramp VIN up until output is turned ON
3.45
V
25
ENABLE INPUT (EN PIN)
VIL
Logic input low level
VIH
Logic input high level
0
0.8
V
2.5
40
V
–2%
2%
REGULATED OUTPUT VOLTAGE (VOUT PIN)
VREF
Internal Reference
Voltage
∆VLINE-REG
Line regulation
∆VLOAD-REG
Load regulation
VDROPOUT (2)
Dropout voltage
(VIN – VOUT)
IOUT = 250 mA
500
IOUT = 150 mA
300
RSW (1)
Switch resistance
VIN to VOUT resistance
(1)
(2)
4
IOUT = 10 mA to 300 mA, VIN= VOUT + 1 V to 16 V
VIN = 6 V to 28 V, IOUT = 10 mA, VOUT = 7 V
15
[VIN = 6 V to 28 V, IOUT = 10 mA, VOUT = 3.3 V ] (1)
20
IOUT = 10 mA to 300 mA, VIN= 14 V, VOUT = 7 V
25
[IOUT = 10 mA to 300 mA,VIN = 14 V, VOUT = 3.3 V ] (1)
35
2
mV
mV
mV
Ω
Specified by design – not tested
This test is done with VOUT is in regulation and VIN – VOUT parameter is measured when VOUT (programmed output voltage, for example,
5 V or 3.3 V) drops by 100 mV at specified loads.
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Electrical Characteristics (continued)
VIN = 14 V, TJ = –40ºC to 150ºC (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOUT
Output current
VOUT in regulation
ICL
Output current limit
VOUT = 0 V (VOUT pin is shorted to ground)
PSRR (1)
Power supply ripple
rejection
MIN
TYP
MAX
UNIT
0
300
mA
350
1000
mA
VIN-RIPPLE = 0.5 Vpp, IOUT = 300 mA, frequency = 100 Hz,
VOUT = 5 V and VOUT = 3.3 V
60
VIN-RIPPLE = 0.5 Vpp, IOUT = 300 mA, frequency = 150 kHz,
VOUT = 5 V and VOUT = 3.3 V
30
dB
OPERATING TEMPERATURE RANGE
TJ
Operating junction
temperature
TSHUTDOWN
Thermal shutdown trip
point
THYST
Thermal shutdown
hysteresis
–40
150
ºC
165
ºC
10
ºC
6.6 Dissipation Ratings
JEDEC STANDARD
PACKAGE
TA < 25°C POWER
RATING (W)
DERATING FACTOR
ABOVE TA = 25°C (°C/W)
TA = 85°C POWER
RATING (W)
JEDEC Standard
PCB - low K, JESD 51-3
5-pin KTT
3.63
34.4
1.89
JEDEC Standard
PCB - high K, JESD 51-5
5-pin KTT
4.14
30.2
2.15
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6.7 Typical Characteristics
10
VIN = 14V
COUT = 1µF
TA = 27°C
VOUT = 5V
VIN = 14V
COUT = 1µF
TA = 27°C
VOUT = 3.3V
ESR of COUT (Ω)
ESR of COUT (Ω)
10
1
Stable Operation
0.1
0.06
1
Stable Operation
0.1
Unstable
Operation
0.06
0.03
0.01
0.01
Unstable
Operation
0.1
1
IOUT (mA)
10
30
100
0.03
0.01
0.01
300
0.1
Figure 1. ESR vs Load Current
1
IOUT (mA)
10
IOUT = 1mA
50
VIN =14V
45
IQUIESCENT (µA)
I QUIESCENT (µA)
300
Figure 2. ESR vs Load Current
50
40
30
VIN = 14V
TA = 25°C
VOUT = 5V, 3.3V
20
VOUT = 5V, 3.3V
40
35
30
25
20
15
10
0.1
IOUT (mA)
50
T A (°C)
Figure 3. Quiescent Current vs Load Current
Figure 4. Quiescent Current vs Ambient Air Temperature
1
10
100
-50
0
100
0.4
700
VOUT = 5V, 3.3V
600
V OUT = 5V
0.3
500
400
300
150
0.35
TA= 25°C
VDROP OUT (V)
I QUIESCENT (µA)
100
55
60
IOUT = 100mA
200
T A = 125°C
0.25
T A = 25°C
0.2
T A = -40°C
0.15
0.1
No Load
100
0
30
0.05
0
4
14
24
V IN (V)
34
40
0
50
100
150
IOUT (mA)
200
250
300
Dropout voltage is measured when the output voltage drops by
100 mV from the regulated output voltage level. (For example, if
output voltage is programmed to be 5 V, the dropout voltage is
measured when the output voltage drops down to 4.9 V from 5 V.)
Figure 5. Quiescent Current vs Input Voltage
6
Figure 6. Drop Out Voltage vs Load Current
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Typical Characteristics (continued)
5.1
6
VIN = 14V
5.08
IOUT = 1mA
TA = 25°C
5
5.06
5.04
4
VOUT (V)
5.02
VOUT (V)
IOUT = 100mA
5
4.98
3
2
4.96
4.94
1
4.92
4.9
-50
0
50
TA (°C)
100
0
150
2
0.12
0.1
7
650
TA = 25°C
TA = -40°C
600
550
0.02
500
0
0
10
20
30
40
450
-50
50
0
VIN (V)
Figure 9. Output Current vs Input Voltage
12
3
10.5
10
9.5
9
150
2
1.5
1
0.5
8.5
8
-50
100
IOUT = 10mA
VOUT = 5V, 3.3V
VIN step from
8V to 28V
2.5
Line Regulation (mV)
11
50
TA (°C)
Figure 10. Output Current Limit vs
Ambient Air Temperature
VIN = 14V
VOUT = 5V, 3.3V
IOUT step from
10mA to 300mA
11.5
Load Regulation (mV)
6
VIN = 14V
VOUT = 5V, 3.3V
700
ICL (mA)
IOUT (A)
750
TA= 125°C
0.04
5
Figure 8. Output Voltage vs Input Voltage
(VOUT Programmed to 5 V)
ILOAD = 100mA
VOUT = 5V, 3.3V
0.06
4
V IN (V)
Figure 7. Output Voltage vs Ambient Air Temperature
(VOUT Programmed to 5 V)
0.08
3
0
50
T A (°C)
100
150
Figure 11. Load Regulation vs Ambient Air Temperature
0
-50
0
50
T A (°C)
100
150
Figure 12. Line Regulation vs Ambient Air Temperature
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Typical Characteristics (continued)
120
VIN = 14V
IOUT = 250mA
TA = 25°C
COUT = 10µF
VOUT = 5V, 3.3V
80
60
60
40
20
20
0
10
100
10k
1k
Frequency (Hz)
100k
Figure 13. PSRR at Heavy Load Current
8
80
40
0
VIN = 14V
IOUT = 1mA
TA = 25°C
COUT = 10µF
VOUT = 5V, 3.3V
100
PSRR (dB)
PSRR (dB)
100
120
1M
10
100
10k
1k
Frequency (Hz)
100k
1M
Figure 14. PSRR at Light Load Current
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7 Detailed Description
7.1 Overview
The TPS7A6201-Q1 device is a monolithic, low-dropout linear voltage regulator with programmable output
voltage and integrated fault protection. This voltage regulator is designed for low power consumption and
quiescent current less than 25 µA in light-load applications.
This device is available in the 5-pin package option TO-263 (D2PAK/TO-263).
The following section describes the features of TPS7A6201 voltage regulator in detail.
7.2 Functional Block Diagram
VIN
VIN
Band
Gap
VRef1
Temp. Sensor/
Thermal Shutdown
CIN
UVLO Comp.
with internal
reference
Q1
VRef1
Regulator Error
Amp.
Control
Logic
Control
VOUT
VEN
VOUT
EN
COUT
R1
Over Current
Detection
FB
Charge Pump
Oscillator
R2
GND
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7.3 Feature Description
7.3.1 Power Up
During power up, the regulator incorporates a protection scheme to limit the current through pass element and
output capacitor. When the input voltage exceeds a certain threshold (VIN(POWERUP)) level, the output voltage
begins to ramp up as shown in Figure 15.
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Feature Description (continued)
VIN
VIN(POWERUP)
0
VOUT
5V or 3.3V
0
Figure 15. Power-Up Operation
7.3.2 Adjustable Output Voltage
The regulated output voltage (VOUT) can be programmed by connecting external resistors to FB pin. Calculate
the feedback resistor values using Equation 1.
R1 ù
é
VOUT = VREF ê1 +
R2 úû
ë
where
•
•
•
VOUT = desired output voltage
VREF = reference voltage (VREF = 1.23 V typically)
R1, R2 = feedback resistors (see the Functional Block Diagram)
(1)
The overall tolerance of the regulated output voltage depends on the tolerance of internal reference voltage and
external feedback resistors, and is given by Equation 2.
é R1 ù
tolVOUT = tolVREF + ê
ú éë tolR1 + tolR2 ûù
ë R1 + R2 û
where
•
•
•
tolVOUT = tolerance of output voltage
tolVREF = tolerance of internal reference voltage (tolVREF = ±1.5% typically)
tolR1,tolR2 = tolerance of feedback resistors R1, R2
(2)
For a tighter tolerance on VOUT, select lower-value feedback resistors. TI recommends selecting feedback
resistors such that the sum of R1 and R2 is between 20 kΩ and 200 kΩ.
7.3.3 Enable Input
This device has a high-voltage-tolerant EN pin that can be used to enable and disable a device from an external
microcontroller or a digital control circuit. A high input to this pin activates the device and turns the regulator on.
This input can also be connected to VIN terminal for self bias applications. An internal pulldown resistor is
connected to this pin; therefore, if this pin is left unconnected, the device stays disabled.
10
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Feature Description (continued)
7.3.4 Charge Pump Operation
Charge Pump State
This device has an internal charge pump which turns on or off depending on the input voltage and the output
current. The charge pump switching circuitry shall not cause conducted emissions to exceed required thresholds
on the input voltage line. For a given output current, the charge pump stays on at lower input voltages and turns
off at higher input voltages. The charge pump switching thresholds are hysteretic. Figure 16 and Figure 17 shows
typical switching thresholds for the charge pump at light (IOUT < ~2 mA) and heavy (IOUT > ~2 mA) loads
respectively.
ON
Hysteresis
OFF
7.8
7.9
VIN (V)
Charge Pump State
Figure 16. Charge Pump Operation at Light Loads
ON
Hysteresis
OFF
9.2
9.6
VIN (V)
Figure 17. Charge Pump Operation at Heavy Loads
7.3.5 Undervoltage Shutdown
This device has an integrated undervoltage lockout (UVLO) circuit to shut down the output if the input voltage
(VIN) falls below an internally fixed UVLO threshold level (VIN-UVLO) as shown in Figure 18. This ensures that the
regulator is not latched into an unknown state during low input voltage conditions. The regulator normally powers
up when the input voltage exceeds the VIN(POWERUP) threshold.
7.3.6 Low Voltage Tracking
At low-input voltages, the regulator drops out of regulation, and the output voltage tracks input minus a voltage
based on the load current and switch resistance (see Figure 18). This allows for a smaller input capacitor and
can possibly eliminate the need of using a boost convertor during cold crank conditions.
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Feature Description (continued)
VIN-UVLO
VIN
0
5V or 3.3V
VOUT
0
Tracking
Figure 18. Low Voltage Tracking Operation
7.3.7 Integrated Fault Protection
The device features integrated fault protection, making it ideal for use in automotive applications. To keep the
device in safe area of operation during certain fault conditions, internal current-limit protection and current-limit
foldback are used to limit the maximum output current. This protects the device from excessive power
dissipation. For example, during a short-circuit condition on the output, current through the pass element is
limited to ICL to protect the device from excessive power dissipation.
7.3.8 Thermal Shutdown
The device incorporates a thermal shutdown (TSD) circuit as protection from overheating. For continuous normal
operation, the junction temperature must not exceed the TSD trip point. If the junction temperature exceeds the
TSD trip point, the output is turned off. When the junction temperature falls below TSD trip point, the output is
turned on again (see Figure 19).
Figure 19. Thermal Cycling Waveform for TPS7A6201 (VIN = 24 V, IOUT = 300 mA, VOUT = 5 V)
12
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7.4 Device Functional Modes
7.4.1 Low Power Mode
At light loads and high-input voltages (VIN> approximately 8 V such that charge pump is off) the device operates
in low power mode, and the quiescent current consumption is reduced to 25 µA (typical) as shown in Table 1.
Table 1. Typical Quiescent Current Consumption
IOUT
CHARGE PUMP ON
CHARGE PUMP OFF
IOUT < approximately 2 mA
(Light load)
250 µA
25 µA
(Low Power Mode)
IOUT > approximately 2 mA
(Heavy load)
280 µA
70 µA
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS7A6201 is a low-dropout linear voltage regulator designed for low power consumption and quiescent
current less than 25 μA in light-load applications.
8.2 Typical Application
Figure 20 shows the typical application circuit for the TPS7A6201 device. Depending upon an end application,
different values of external components may be used. To program the output voltage, feedback resistors (R1 and
R2) must be carefully selected. Using small resistors results in higher current consumption, whereas, using very
large resistors impacts the sensitivity of the regulator. Therefore, TI recommends selecting feedback resistors
such that the sum of R1 and R2 is between 20 kΩ and 200 kΩ. Also, the overall tolerance of the regulated output
voltage depends on the tolerance of the internal reference voltage and external feedback resistors.
A larger output capacitor may be required during fast load steps to prevent output from temporarily dropping
down. TI recommends a low-ESR ceramic capacitor with a dielectric of type X5R or X7R. Additionally, a bypass
capacitor can be connected at the output to decouple high-frequency noise as per the end application.
Example: If the desired regulated output voltage is 5 V, upon selecting R2, R1 can be calculated using
Equation 1 (and vice versa). Knowing VREF = 1.23 V (typical), VOUT = 5 V, and selecting R2 = 20 kΩ, R1 is
calculated to be 61.3 kΩ.
TPS7A6201
VIN
VIN
VOUT
10µF
to
22µF
0.1µF
VEN
VOUT
R1
EN
1µF
to
10µF
0.1µF
FB
R2
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 20. Typical Application Schematic for TPS7A6201
8.2.1 Design Requirements
Table 2 lists the design parameters for this example.
Table 2. Design Parameters
14
PARAMETER
EXAMPLE VALUE
Input voltage range
11 V to 40 V
Output voltage
5V
Output current rating
200 mA
Output capacitor range
10 µF to 47 µF
Output capacitor ESR range
10 mΩ to 10 Ω
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8.2.2 Detailed Design Procedure
To
•
•
•
•
•
begin the design process, determine the following:
Input voltage range
Output voltage
Output current rating
Input capacitor
Output capacitor
8.2.2.1 Input Capacitor
The device requires an input bypass capacitor, the value of which depends on the application. The typical
recommended value for the bypass capacitor is 10 µF. The voltage rating must be greater than the maximum
input voltage.
8.2.2.2 Output Capacitor
The device requires an output capacitor to stabilize the output voltage. TI recommends selecting a capacitor
between 10 µF and 47 µF with ESR range from 10 mΩ to 10 Ω.
8.2.2.3 Feedback Resistor
The regulated output voltage (VOUT) can be programmed by connecting external resistors to FB pin. Calculate
the feedback resistor values using Equation 1 (R1 = 61.3K Ω, R2 = 20 K Ω).
8.2.3 Application Curve
Figure 21. Load Transient Waveform
9 Power Supply Recommendations
Design of the device is for operation from an input voltage supply with a range from 11 V to 40 V. This input
supply must be well regulated. If the input supply is located more than a few inches from the device, TI
recommends adding an electrolytic capacitor with a value of 22 µF and a ceramic bypass capacitor at the input.
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10 Layout
10.1 Layout Guidelines
For the LDO power supply, especially these high voltage and large current ones, layout is an important step. If
layout is not carefully designed, the regulator could not deliver enough output current because of the thermal
limitation. To improve the thermal performance of the device, and maximize the current output at high ambient
temperature, TI recommends spreading the thermal pad as large as possible and place enough thermal vias on
the thermal pad. Figure 25 shows an example layout.
10.1.1 Power Dissipation and Thermal Considerations
Calculate the power dissipated in the device using Equation 3.
PD = IOUT × (VIN – VOUT)) + IQUIESCENT × VIN
where
•
•
•
•
•
PD = continuous power dissipation
IOUT = output current
VIN = input voltage
VOUT = output voltage
IQUIESCENT = quiescent current
(3)
As IQUIESCENT << IOUT, therefore, the term IQUIESCENT × VIN in Equation 3 can be ignored.
For device under operation at a given ambient air temperature (TA), calculate the junction temperature (TJ)
Equation 4.
TJ = TA + (RθJA × PD)
where
•
RθJA = junction to ambient air thermal impedance
(4)
Calculate the rise in junction temperature due to power dissipation using Equation 5.
ΔT = TJ – TA = (RθJA × PD)
(5)
For a given maximum junction temperature (TJ-Max), calculate the maximum ambient air temperature (TA-Max) at
which the device can operate using Equation 6.
TA-Max = TJ-Max – (RθJA × PD)
(6)
Example
If IOUT = 100 mA, VOUT = 5 V, VIN = 14 V, IQUIESCENT = 250 µA, and RθJA = 30˚C/W, the continuous power
dissipated in the device is 0.9 W. The rise in junction temperature due to power dissipation is 27˚C. For a
maximum junction temperature of 150˚C, maximum ambient air temperature at which the device can operate is
123˚C.
For adequate heat dissipation, TI recommends soldering the thermal pad (exposed heat sink) to thermal land
pad on the PCB. Doing this provides a heat conduction path from die to the PCB and reduces overall package
thermal resistance. Figure 22 shows the power derating curves for the TPS7A6201 device in the KTT (TO-263)
package..
16
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Layout Guidelines (continued)
4
3.5
JESD 51-5 (KTT)
Power Dissipated (W)
3
2.5
2
JESD 51-3 (KTT)
1.5
1
0.5
0
0
25
50
75
100
125
150
Ambient Air Temperature (°C)
Figure 22. Power Derating Curves
For optimum thermal performance, TI recommends using a high-K PCB with thermal vias between ground plane
and solder pad or thermal land pad. This is shown in Figure 23 (a) and (b). Furthermore, heat spreading
capabilities of a PCB can be considerably improved by using a thicker ground plane and a thermal land pad with
a larger surface area.
Exposed Tab
Thermal Via
Thermal Land Pad
PCB
Ground Plane
(a) Before soldering
(b) After soldering
Figure 23. Using Multilayer PCB and Thermal Vias for Adequate Heat Dissipation
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Layout Guidelines (continued)
Keeping other factors constant, surface area of the thermal land pad contributes to heat dissipation only to a
certain extent. Figure 24 shows a variation of RθJA with surface area of the thermal land pad (soldered to the
exposed pad) for KTT package.
55
q JA (°C/W)
50
45
40
KTT (D2PAK) (JESD 51-3)
35
30
0
200
400
600
800
1000
Thermal Pad Area (sq. mm)
Figure 24. RθJA vs Thermal Pad Area
10.2 Layout Example
1
2
3
4
5
VIN
EN
GND
FB
VOUT
Figure 25. Layout Recommendation
18
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11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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12.1 Package Option Addendum
12.1.1 Packaging Information
Orderable Device
TPS7A6201QKTTRQ1
(1)
(2)
(3)
(4)
(5)
(6)
Status
Package
Type
Package
Drawing
Pins
Package
Qty
DDPAK/ TO263
KTT
5
500
(1)
ACTIVE
Eco Plan
(2)
Green (RoHS
& no Sb/Br)
Lead/Ball
Finish (3)
CU SN
MSL Peak Temp
(4)
Level-3-245C-168
HR
Op Temp (°C)
Device Marking (5) (6)
-40 to 125
7A6201Q1
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PRE_PROD Unannounced device, not in production, not available for mass market, nor on the web, samples not available.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
space
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest
availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the
requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified
lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used
between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by
weight in homogeneous material)
space
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the
finish value exceeds the maximum column width.
space
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
space
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device
space
Multiple Device markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer: The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief
on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third
parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for
release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
20
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12.1.2 Tape and Reel Information
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
B0 W
Reel
Diameter
Cavity
A0
B0
K0
W
P1
A0
Dimension designed to accommodate the component width
Dimension designed to accommodate the component length
Dimension designed to accommodate the component thickness
Overall width of the carrier tape
Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1
Q2
Q1
Q2
Q3
Q4
Q3
Q4
User Direction of Feed
Pocket Quadrants
Device
Package
Type
Package
Drawing
Pins
SPQ
Reel
Diameter
(mm)
Reel
Width W1
(mm)
A0
(mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
TPS7A6201QKTTRQ1
DDPAK/
TO-263
KTT
5
500
330.0
24.4
10.6
15.8
4.9
16.0
24.0
Q2
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TAPE AND REEL BOX DIMENSIONS
Width (mm)
L
W
22
H
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS7A6201QKTTRQ1
DDPAK/TO-263
KTT
5
500
340.0
340.0
38.0
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SLVSAA0D – NOVEMBER 2010 – REVISED MAY 2018
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
TPS7A6201QKTTRQ1
ACTIVE
Package Type Package Pins Package
Drawing
Qty
DDPAK/
TO-263
KTT
5
500
Eco Plan
Lead/Ball Finish
(2)
Green (RoHS
& no Sb/Br)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
CU SN
Level-3-245C-168 HR
(4)
-40 to 125
7A6201Q1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Apr-2018
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TPS7A6201QKTTRQ1
Package Package Pins
Type Drawing
SPQ
DDPAK/
TO-263
500
KTT
5
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
330.0
24.4
Pack Materials-Page 1
10.6
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
15.8
4.9
16.0
24.0
Q2
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Apr-2018
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS7A6201QKTTRQ1
DDPAK/TO-263
KTT
5
500
340.0
340.0
38.0
Pack Materials-Page 2
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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