Texas Instruments | REF1112 10ppm/°C, 1-μA, 1.25-V Shunt Voltage Reference (Rev. D) | Datasheet | Texas Instruments REF1112 10ppm/°C, 1-μA, 1.25-V Shunt Voltage Reference (Rev. D) Datasheet

Texas Instruments REF1112 10ppm/°C, 1-μA, 1.25-V Shunt Voltage Reference (Rev. D) Datasheet
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REF1112
SBOS283D – SEPTEMBER 2003 – REVISED MARCH 2018
REF1112 10ppm/°C, 1-μA, 1.25-V Shunt Voltage Reference
1 Features
3 Description
•
•
•
The REF1112 device is a two-terminal shunt
reference designed for power- and space-sensitive
applications. The REF1112 features an operating
current of 1 μA in a SOT23-3 package and is an
improved, lower power solution for designs currently
using voltage references in larger packages, such as
the REF1004 and LT1004. The REF1112 is specified
from –40°C to +85°C with operation extending from
–40°C to +125°C.
1
Small Package: SOT23-3
Fixed Reverse Breakdown Voltage of 1.25 V
Key Specifications
– Output Voltage Tolerance: ±0.2% (Maximum)
– Low Output Noise (0.1 Hz to 10 Hz): 25 μVpp
(Typical)
– Temperature Range: −40°C to +125°C
– Operating Current Range: 1.2 μA to 5 mA
– Low Temperature Coefficient From 0°C to
+70°C: 30ppm/°C (Maximum)
– Low Temperature Coefficient From –40°C to
+85°C: 50ppm/°C (Maximum)
Device Information(1)
PART NUMBER
2 Applications
•
•
•
•
•
The REF1112 complements other 1-μA components
from Texas Instruments including the OPA349 and
TLV240x low-power operational amplifiers, and the
TLV349x micropower voltage comparator.
Battery-Powered Instruments
Building Security Sensors
Medical Equipment
Field Transmitters
Calibrators
SPACER
Shunt Reference Application Schematic
REF1112
PACKAGE
SOT-23 (3)
BODY SIZE (NOM)
2.92 mm × 1.3 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Pinout
VS
VO 1
IREF + ILOAD
RBIAS
3 NC
ILOAD
GND 2
VOUT
IREF
SOT23
RLOAD
(1)
RBIAS =
NC indicates the pin should be left
unconnected or connected to GND
VS − VD
ILOAD + IREF
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
REF1112
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
6.1
6.2
6.3
6.4
6.5
6.6
3
3
3
4
4
5
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
7.2 Functional Block Diagram ......................................... 7
7.3 Feature Description................................................... 7
7.4 Device Functional Modes.......................................... 7
8
Application and Implementation .......................... 8
8.1 Application Information.............................................. 8
8.2 Typical Applications .................................................. 8
9 Power Supply Recommendations...................... 12
10 Layout................................................................... 12
10.1 Layout Guidelines ................................................. 12
10.2 Layout Example .................................................... 12
11 Device and Documentation Support ................. 13
11.1
11.2
11.3
11.4
11.5
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
13
13
13
13
13
12 Mechanical, Packaging, and Orderable
Information ........................................................... 13
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (March 2008) to Revision D
Page
•
Added Device Information table, Pin Configuration and Functions section, Absolute Maximum Ratings table, ESD
Ratings table, Recommended Operating Conditions table, Thermal Information table, Feature Description section,
Device Functional Modes, Application and Implementation section, Power Supply Recommendations section,
Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section. ................................................................................................................................................................................... 1
•
Changed Features section .................................................................................................................................................... 1
•
Changed key graphic text note from: NC indicates pin should be left unconnected to: NC indicates the pin should be
left unconnected or connected to GND ................................................................................................................................. 1
•
Removed the Package/Ordering Information table and moved the information over to the Mechanical, Packaging,
and Orderable Information section ....................................................................................................................................... 13
2
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5 Pin Configuration and Functions
DBZ Package
3-Pin SOT-23
Top View
VO 1
3 NC
GND 2
SOT23
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
Vo
1
I/O
Shunt Current/Voltage input
GND
2
O
Ground connection
NC
3
-
Must float or connect to GND
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MAX
UNIT
Reverse breakdown current
MIN
10
mA
Forward current
10
mA
125
°C
150
°C
150
°C
Operating temperature
–55
Junction temperature
Storage temperature, Tstg
(1)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
IREF
Reverse current
TA
Operating temperature
MAX
UNIT
0.0012
5
mA
–40
125
°C
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6.4 Thermal Information
REF1112
THERMAL METRIC (1)
DBZ (SOT-23)
UNIT
3 PINS
RθJA
Junction-to-ambient thermal resistance
219
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
99
°C/W
RθJB
Junction-to-board thermal resistance
79
°C/W
ψJT
Junction-to-top characterization parameter
6.7
°C/W
ψJB
Junction-to-board characterization parameter
79.6
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Electrical Characteristics
VR = 1.25 V, TA = +25°C, IREF = 1.2 μA and CLOAD = 10 nF, unless otherwise noted.
PARAMETER
VR
Reverse breakdown voltage
Temperature coefficient
ΔVR
IRMIN
TEST CONDITIONS
IREF = 1.2 µA
MIN
TYP
MAX
1.2475
1.25
1.2525
–0.2%
1.2 μA ≤ IREF ≤ 5 mA, TA = 0°C to
+70°C
10
30
1.5 μA ≤ IREF ≤ 5 mA, TA = –40°C to
+85°C
15
50
ppm/°C
1.5 μA ≤ IREF ≤ 5 mA, TA = –40°C to
+125°C
15
1
1.2
µA
ppm/mA
Minimum operating current
1.2 μA ≤ IREF ≤ 5 mA
30
100
ZR
Reverse dynamic impedance
1.2 μA ≤ IREF ≤ 5 mA
0.037
0.125
eN
Low-frequency noise (1)
0.1 Hz ≤ IREF ≤ 10 Hz
25
VHYST
Thermal hysteresis (2)
ΔVR
Long-term stability
(1)
(2)
4
V
0.2%
Reverse breakdown voltage change
with current
ΔVR/ΔIR
UNIT
+25°C ± 0.1°C
Ω
μVPP
100
ppm
60
ppm/kHr
Peak-to-peak noise is measured with a 2-pole high-pass filter at 0.1 Hz and a 4-pole, low-pass Chebyshev filter at 10 Hz.
Thermal hysteresis is defined as the change in output voltage after operating the device at +25°C, cycling the device through the
specified temperature range, and returning to +25°C.
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6.6 Typical Characteristics
At TA = +25°C, IREF = 10 μA and CLOAD = 10 nF, unless otherwise noted.
10K
1.0
−40°C ≤ TA ≤ 125°C
TA = 25°C
0.8
Forward Voltage (V)
Reverse Current (μA)
1K
Voltage Regulation
Region
100
10
1
0.6
Behaves as standard
silicon diode
0.4
0.2
0.1
0.01
0.00
0.0
0.25
0.50
0.75
1.00
1.25
0.01
0.001
1.50
Reverse Voltage (V)
1.255
Output Voltage Change (mV)
0.5
Reverse Voltage (V)
1.254
1.253
1.252
1.251
1.250
1.249
−40°C ≤ TA ≤ 125°C
0.4
0.3
0.2
0.1
0.0
−35
−15
5
25
45
65
85
105
125
0.001
0.01
Temperature (°C)
Figure 3. Temperature Drift
0.1
Reverse Current (mA)
1
10
Figure 4. Reverse Voltage Change vs Current
10k
100
TA = +25°C
Dynamic Impedance (Ω)
f = 10Hz
10
1
0.1
1k
IREF = 10μA
100
10
IREF = 5mA
1
Ω)
−40°C ≤ TA ≤ 125°C
Dynamic Impedance (Ω)
10
Figure 2. Forward Characteristics
Figure 1. Reverse Characteristics
1.248
−55
0.1
1.0
Forward Current (mA)
0.1
0.01
0.01
0.001
0.01
0.1
1
10
1
Reverse Current (mA)
Figure 5. Reverse Dynamic Impedance
10
100
1k
Frequency (Hz)
10k
Figure 6. Reverse Dynamic Impedance
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Typical Characteristics (continued)
At TA = +25°C, IREF = 10 μA and CLOAD = 10 nF, unless otherwise noted.
TEMPERATURE DRIFT DISTRIBUTION
25
50
0°C to +70°C
40
Distribution (%)
Distribution (%)
20
15
10
5
30
20
10
0
1.2475
1.2500
0
1.2525
0
5
10
15
20
25
30
Reverse Breakdown Voltage (V)
Drift (ppm/°C)
Figure 7. Reverse Breakdown Voltage Distribution
Figure 8. Temperature Drift Distribution
25
35
LOW-FREQUENCY NOISE, 0.1 to 10Hz
−40°C to +85°C
15
10μV/div
Distribution (%)
20
10
5
0
0
5
10
15
20 25 30
Drift (ppm/°C)
35
40
45
50
1.0s/div
Figure 10. Low-Frequency Noise, 0.1 to 10Hz
Figure 9. Temperature Drift Distribution
CLOAD = 0.01μF
2V
Voltage (V)
1V
CLOAD = 0.1μF
1V
VIN
VOUT
0V
VIN
VOUT
375kΩ
VOUT
0.01μF
5V
Voltage (V)
2V
0V
375kΩ
VOUT
0.1μF
5V
VIN
VIN
0V
0V
10ms/div
25ms/div
Figure 11. Response Time
6
IREF
Figure 12. Response Time
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7 Detailed Description
7.1 Overview
The REF1112 is a 2-terminal bandgap reference diode designed for high accuracy with outstanding temperature
characteristics at low operating currents. Precision thin-film resistors result in 0.2% initial voltage accuracy and
50ppm/°C maximum temperature drift. The REF1112 is specified from –40°C to +85°C, with operation from
–40°C to +125°C, and is offered in a SOT23-3 package.
7.2 Functional Block Diagram
7.3 Feature Description
The REF1112 device is effectively a precision Zener diode. The part requires a small quiescent current for
regulation, and regulates the output voltage by shunting more or less current to ground, depending on input
voltage and load. The only external component requirement are an resistor between the cathode and the input
voltage to set the input current and an external capacitor at the output to maintain stability under varying loads.
7.4 Device Functional Modes
The REF1112 device is a fixed output voltage part where the feedback is internal. Therefore, the part can only
operate in a closed-loop mode and the output voltage cannot be adjusted. The output voltage will remain in
regulation as long as IREF is between IREFMIN (see Electrical Characteristics) and IREFMAX is 5 mA. A proper
selection of the external resistor for input voltage range and load current range will ensure these conditions are
met.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
Typical connections for the REF1112 are shown in Figure 13. A minimum 1-μA bias current is required to
maintain a stable output voltage and can be provided with a resistor connected to the supply voltage. IBIAS
depends on the values selected for RBIAS and VS, and will vary as a sum of the minimum operating current and
the load current. To maintain stable operation, the value of RBIAS must be low enough to maintain the minimum
operating current at the minimum and maximum load and supply voltage levels.
A 0.1-μF load capacitor is recommended to maintain stability under varying load conditions. A minimum 0.01-μF
load capacitor is required for stable operation. Start-up time for the REF1112 will be affected, depending on the
value of load capacitance and the bias currents being used. A 1-μF power-supply bypass capacitor is
recommended to minimize supply noise within the circuit. The REF1112 shunt voltage reference provides a
versatile function for low power and space-conservative applications.
8.2 Typical Applications
8.2.1 Shunt Regulator
VS
RBIAS
IBIAS = IREF + ILOAD
VREF
1μF
ILOAD
0.1μF
IREF
IBIAS =
VS − VREF
RBIAS
Figure 13. Typical Connections
8.2.1.1 Design Requirements
Table 1. Design Parameters
DESIGN PARAMETER
8
EXAMPLE VALUE
Supply voltage
3V
Cathode current (IREF)
1.2 µA
Load Current (ILOAD)
50uA
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8.2.1.2 Detailed Design Procedure
When using the REF1112 as a reference, determine the following:
• Supply voltage range
• Current source resistance
• Reference voltage accuracy
To design using the REF1112, is it important to ensure that the VS is larger than VREF.
The resistor RBIAS sets the cathode current of the REF1112, IR. Ensure that this current remains in the
operational region of the part for the entire VS and load range.
Using this information, select a RBIAS such that:
IREFMIN < IREF < IREFMAX where IREFMAX = 5 mA.
In this application the IREF is the operating current of the REF1112 plus the maximum possible ILOAD under noload conditions.
8.2.2 MicroPOWER 3-μA, 1-V Voltage Reference
3V
795kΩ
250kΩ
VREF
0.1μF
3V
TLV2401
VOUT = 1V
REF1112
1MΩ
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Figure 14. MicroPOWER 3-μA, 1-V Voltage Reference
8.2.2.1 Design Requirements
The REF1112 can be scaled to provide extremely low power reference voltages. Figure 14 shows the REF1112
used as a 1-V VOUT, 3-μA voltage reference.
8.2.2.2 Detailed Design Procedure
Set RBIAS such that the current through the shunt reference, IREF, is greater than IREFMIN + ILOAD.
Use a resistor divider to set the required voltage to the input of the amplifier. The TLV2401 requires an input bias
current maximum of 350 pA which allows the use of larger resistor values to save power.
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8.2.3 2.5-V Reference on 1 μA
3V
RSET
VOUT = 2.5V
0.1μF
RLOAD
0.1μF
Figure 15. 2.5-V Reference on 1 μA
8.2.3.1 Design Requirements
Create a 2.5-V reference that consumes 1 µA of IREF.
8.2.3.2 Detailed Design Procedure
Figure 15 shows the REF1112 used as a 2.5-V reference on 1 μA. This is done by stacking the REF1112 in
series.
VOUT = 2 × VREF
where
•
VREF is the reference voltage
(1)
In this case, VOUT = 2 × 1.25 V = 2.5 V
The IBIAS is still 1 µA because the stacked REF1112 are in series.
8.2.4 Adjustable Voltage Shunt Reference
For applications requiring a stable voltage reference capable of sinking higher than 5 mA of current, a REF1112
combined with an OPA347 can sink up to 10 mA of current. This configuration is shown in Figure 16, and
through appropriate selection of R1 and R2, can be used to provide a wide range of stable reference voltages.
VS
RSET
IBIAS
2.5V
R1
10kΩ
10kΩ
0.01μF
OPA347
1.25V
0.1μF
VOUT = 1.25 (1 + R1 / R2)
R2
10kΩ
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Figure 16. Adjustable Voltage Shunt Reference
10
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8.2.5 Level Shift to Achieve Full ADC Input Range
The REF1112 is also useful for level shifting, and as shown in Figure 17, can be used to achieve the full input
range of an analog-to-digital converter (ADC).
VS
VREF
VOUT
1.25V
+V
ADC
0.1μF
VIN
−V
Figure 17. REF1112 Provides a Level Shift to Achieve Full ADC Input Range
8.2.6 Stable Current Source
The REF1112 can be configured with an additional diode and NPN transistor to provide a temperature
compensated current reference as shown in Figure 18.
VS
10kΩ
ISET
ISET =
0.1 μF
VREF
RSET
RSET
Figure 18. REF1112 as a Stable Current Source
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9 Power Supply Recommendations
While a bypass capacitor is not required on the input voltage line, TI recommends reducing noise on the input
which could affect the output. A 0.1-μF ceramic capacitor or larger is recommended.
10 Layout
10.1 Layout Guidelines
Place decoupling capacitors as close to the device as possible. Use appropriate widths for traces when shunting
high currents to avoid excessive voltage drops.
10.2 Layout Example
RBIAS
VREF 1
REF1112
CLOAD
CIN
GND
3
NC
3
Figure 19. Layout Example
12
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11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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12-Jan-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
REF1112AIDBZR
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
R11A
REF1112AIDBZRG4
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
R11A
REF1112AIDBZT
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
R11A
REF1112AIDBZTG4
ACTIVE
SOT-23
DBZ
3
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
R11A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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12-Jan-2018
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Addendum-Page 2
PACKAGE MATERIALS INFORMATION
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13-Jan-2018
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
REF1112AIDBZR
SOT-23
DBZ
3
3000
179.0
8.4
REF1112AIDBZT
SOT-23
DBZ
3
250
179.0
8.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.15
2.95
1.22
4.0
8.0
Q3
3.15
2.95
1.22
4.0
8.0
Q3
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Jan-2018
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
REF1112AIDBZR
SOT-23
DBZ
3
3000
203.0
203.0
35.0
REF1112AIDBZT
SOT-23
DBZ
3
250
203.0
203.0
35.0
Pack Materials-Page 2
4203227/C
PACKAGE OUTLINE
DBZ0003A
SOT-23 - 1.12 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
2.64
2.10
1.4
1.2
PIN 1
INDEX AREA
1.12 MAX
B
A
0.1 C
1
0.95
3.04
2.80
1.9
3X
3
0.5
0.3
0.2
2
(0.95)
C A B
0.25
GAGE PLANE
0 -8 TYP
0.10
TYP
0.01
0.20
TYP
0.08
0.6
TYP
0.2
SEATING PLANE
4214838/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.
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EXAMPLE BOARD LAYOUT
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X (0.95)
2
(R0.05) TYP
(2.1)
LAND PATTERN EXAMPLE
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214838/C 04/2017
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X(0.95)
2
(R0.05) TYP
(2.1)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214838/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
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