Texas Instruments | CSD25481F4 20 V P-Channel FemtoFET MOSFET (Rev. E) | Datasheet | Texas Instruments CSD25481F4 20 V P-Channel FemtoFET MOSFET (Rev. E) Datasheet

Texas Instruments CSD25481F4 20 V P-Channel FemtoFET MOSFET (Rev. E) Datasheet
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CSD25481F4
SLPS420E – SEPTEMBER 2013 – REVISED DECEMBER 2017
CSD25481F4 20 V P-Channel FemtoFET™ MOSFET
1 Features
•
•
•
•
1
•
•
•
•
Product Summary
Ultra-Low On Resistance
Ultra-Low Qg and Qgd
High Operating Drain Current
Ultra-Small Footprint (0402 Case Size)
– 1 mm × 0.6 mm
Ultra-Low Profile
– 0.35 mm Max Height
Integrated ESD Protection Diode
– Rated >4 kV HBM
– Rated >2 kV CDM
Lead and Halogen Free
RoHS Compliant
TA = 25°C
–20
V
Qg
Gate Charge Total (–4.5 V)
913
pC
Qgd
Gate Charge Gate-to-Drain
VGS(th)
pC
VGS = –1.8 V
395
mΩ
VGS = –2.5 V
145
mΩ
VGS = –4.5 V
90
mΩ
Threshold Voltage
–0.95
V
Ordering Information(1)
Device
CSD25481F4
Qty
Media
3000
7-Inch
Reel
250
7-Inch
Reel
Package
Ship
Femto(0402)
1.0 mm × 0.6 mm
Land Grid Array (LGA)
Tape and
Reel
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Optimized for Load Switch Applications
Optimized for General Purpose Switching
Applications
Battery Applications
Handheld and Mobile Applications
Absolute Maximum Ratings
TA = 25°C unless otherwise stated
3 Description
This 90 mΩ, 20 V P-Channel FemtoFET™ MOSFET
is designed and optimized to minimize the footprint in
many handheld and mobile applications. This
technology is capable of replacing standard small
signal MOSFETs while providing at least a 60%
reduction in footprint size.
.
Typical Part Dimensions
5m
0.3
153
Drain-to-Source
On-Resistance
CSD25481F4T
•
•
UNIT
Drain-to-Source Voltage
RDS(on)
2 Applications
•
•
TYPICAL VALUE
VDS
m
VALUE
UNIT
VDS
Drain-to-Source Voltage
–20
V
VGS
Gate-to-Source Voltage
–12
V
ID
Continuous Drain Current(1)
–2.5
A
IDM
Pulsed Drain Current(2)
–13.1
A
IG
PD
V (ESD)
TJ,
Tstg
Continuous Gate Clamp Current
–35
Pulsed Gate Clamp Current(2)
–350
Power Dissipation(1)
mA
500
mW
Human Body Model (HBM)
4
kV
Charged Device Model (CDM)
2
kV
–55 to 150
°C
Operating Junction and
Storage Temperature Range
(1) Typical RθJA = 90°C/W on 1 inch2 (6.45 cm2), 2 oz.
(0.071 mm thick) Cu pad on a 0.06 inch (1.52 mm) thick FR4
PCB.
(2) Pulse duration ≤ 100 μs, duty cycle ≤ 1%.
Top View
60
1.
0.
00
m
m
D
m
m
.
.
G
S
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CSD25481F4
SLPS420E – SEPTEMBER 2013 – REVISED DECEMBER 2017
www.ti.com
Table of Contents
1
2
3
4
5
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Specifications.........................................................
1
1
1
2
3
5.1 Electrical Characteristics........................................... 3
5.2 Thermal Information .................................................. 3
5.3 Typical MOSFET Characteristics.............................. 4
6
Device and Documentation Support.................... 7
6.1
6.2
6.3
6.4
7
Community Resources..............................................
Trademarks ...............................................................
Electrostatic Discharge Caution ................................
Glossary ....................................................................
7
7
7
7
Mechanical, Packaging, and Orderable
Information ............................................................. 8
7.1 Mechanical Dimensions ............................................ 8
7.2 Recommended Minimum PCB Layout...................... 9
7.3 Recommended Stencil Pattern ................................. 9
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (October 2014) to Revision E
Page
•
Changed the Pulsed Drain Current value From: –10 A To: –13.1 A in the Absolute Maximum Ratings table ..................... 1
•
Changed Note 1 From: Typical RθJA = 85°C/W To: Typical RθJA = 90°C/W ........................................................................... 1
•
Changed Note 2 From: Pulse duration ≤ 300 μs, duty cycle ≤ 2% To: Pulse duration ≤ 100 μs, duty cycle ≤ 1% ............... 1
•
Changed the typical RθJA values in the Thermal Information table ........................................................................................ 3
•
Updated Figure 1. .................................................................................................................................................................. 4
•
Updated Figure 10 with newly measured data. ..................................................................................................................... 5
•
Added Community Resources. .............................................................................................................................................. 7
•
Updated all mechanical drawings, increased the size of the pads in the Recommended Stencil Pattern section. .............. 8
Changes from Revision C (February 2014) to Revision D
•
Corrected timing VDS to read –10 V. ...................................................................................................................................... 3
Changes from Revision B (February 2013) to Revision C
•
Page
Page
Corrected capacitance units to read pF in Figure 5. ............................................................................................................. 5
Changes from Revision A (December 2013) to Revision B
Page
•
Updated lead and halogen free in features. .......................................................................................................................... 1
•
Added IG parameter. .............................................................................................................................................................. 1
•
Lowered IDSS limit. ................................................................................................................................................................. 3
•
Lowered IGSS limit. ................................................................................................................................................................. 3
Changes from Original (September 2013) to Revision A
Page
•
Took out jumbo reel info and added small reel info. ............................................................................................................. 1
•
Removed UIS graph. ............................................................................................................................................................. 5
2
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SLPS420E – SEPTEMBER 2013 – REVISED DECEMBER 2017
5 Specifications
5.1 Electrical Characteristics
(TA = 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
STATIC CHARACTERISTICS
BVDSS
Drain-to-Source Voltage
VGS = 0 V, IDS = –250 μA
IDSS
Drain-to-Source Leakage Current
VGS = 0 V, VDS = –16 V
–100
nA
IGSS
Gate-to-Source Leakage Current
VDS = 0 V, VGS = –12 V
–50
nA
VGS(th)
Gate-to-Source Threshold Voltage
VDS = VGS, IDS = –250 μA
RDS(on)
gfs
Drain-to-Source On-Resistance
Transconductance
–20
–0.7
V
–0.95
–1.2
V
VGS = –1.8 V, IDS = –0.1 A
395
800
mΩ
VGS = –2.5 V, IDS = –0.5 A
145
174
mΩ
VGS = –4.5 V, IDS = –0.5 A
90
105
mΩ
VGS = –8 V, IDS = –0.5 A
75
88
mΩ
VDS = –10 V, IDS = –0.5 A
3.3
S
189
pF
78
pF
5.5
pF
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
RG
Series Gate Resistance
Qg
Gate Charge Total (4.5 V)
Qgd
Gate Charge Gate-to-Drain
Qgs
Gate Charge Gate-to-Source
Qg(th)
Gate Charge at Vth
Qoss
Output Charge
td(on)
Turn On Delay Time
tr
Rise Time
td(off)
Turn Off Delay Time
tf
Fall Time
VGS = 0 V, VDS = –10 V,
ƒ = 1 MHz
VDS = –10 V, IDS = –0.5 A
VDS = –10 V, VGS = 0 V
VDS = –10 V, VGS = –4.5 V,
IDS = –0.5 A,RG = 2 Ω
20
Ω
913
pC
153
pC
240
pC
116
pC
1030
pC
4.1
ns
3.6
ns
16.9
ns
6.7
ns
DIODE CHARACTERISTICS
VSD
Diode Forward Voltage
Qrr
Reverse Recovery Charge
ISD = –0.5 A, VGS = 0 V
trr
Reverse Recovery Time
VDS= –10 V, IF = –0.5 A, di/dt = 100 A/μs
–0.75
V
1010
pC
7.5
ns
5.2 Thermal Information
(TA = 25°C unless otherwise stated)
THERMAL METRIC
RθJA
(1)
(2)
TYPICAL VALUES
Junction-to-Ambient Thermal Resistance (1)
90
Junction-to-Ambient Thermal Resistance (2)
250
UNIT
°C/W
Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu.
Device mounted on FR4 material with minimum Cu mounting area.
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5.3 Typical MOSFET Characteristics
(TA = 25°C unless otherwise stated)
Figure 1. Transient Thermal Impedance
10
VGS = −8V
VGS = −4.5V
VGS = −2.5V
VGS = −1.8V
9
8
7
− IDS - Drain-to-Source Current (A)
− IDS - Drain-to-Source Current (A)
10
6
5
4
3
2
1
0
0
0.2
0.4 0.6 0.8
1
1.2 1.4 1.6
− VDS - Drain-to-Source Voltage (V)
1.8
2
VDS = −5V
9
8
7
6
5
4
3
TC = 125°C
TC = 25°C
TC = −55°C
2
1
0
0
G001
Figure 2. Saturation Characteristics
4
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0.5
1
1.5
2
2.5
3
− VGS - Gate-to-Source Voltage (V)
3.5
4
G001
Figure 3. Transfer Characteristics
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Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
200
ID = −0.5A
VDS = −10V
7
180
160
6
C − Capacitance (pF)
− VGS - Gate-to-Source Voltage (V)
8
5
4
3
2
120
100
80
60
40
1
0
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
140
20
0
0.2
0.4
0.6
0.8
1
1.2
Qg - Gate Charge (nC)
1.4
0
1.6
0
2
4
6
8
10
12
14
16
− VDS - Drain-to-Source Voltage (V)
G001
Figure 4. Gate Charge
G001
400
RDS(on) - On-State Resistance (mΩ)
ID = −250uA
− VGS(th) - Threshold Voltage (V)
20
Figure 5. Capacitance
1.25
1.15
1.05
0.95
0.85
0.75
0.65
0.55
0.45
−75
−25
25
75
125
TC - Case Temperature (ºC)
320
280
240
200
160
120
80
40
0
2
G001
Figure 6. Threshold Voltage vs Temperature
4
6
8
10
− VGS - Gate-to- Source Voltage (V)
12
G001
Figure 7. On-State Resistance vs Gate-to-Source Voltage
10
− ISD − Source-to-Drain Current (A)
VGS = −4.5V, ID = −0.5A
1.3
1.2
1.1
1
0.9
0.8
0.7
−75
TC = 25°C, I D = −0.5A
TC = 125°C, I D = −0.5A
360
0
175
1.4
Normalized On-State Resistance
18
−25
25
75
125
TC - Case Temperature (ºC)
175
TC = 25°C
TC = 125°C
1
0.1
0.01
0.001
0.0001
0
0.2
0.4
0.6
0.8
− VSD − Source-to-Drain Voltage (V)
G001
Figure 8. Normalized On-State Resistance vs Temperature
1
G001
Figure 9. Typical Diode Forward Voltage
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Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
5.0
-IDS - Drain-to-Source Current (A)
-IDS - Drain-To-Source Current (A)
100
10
1
0.1
100 ms
10 ms
0.01
0.1
1 ms
100 µs
1
10
-VDS - Drain-To-Source Voltage (V)
50
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-50
-25
D010
Single Pulse Typical RθJA =250ºC/W (min Cu)
Figure 10. Maximum Safe Operating Area
6
0
25
50
75
100 125
TC - Case Temperature (qC)
150
175
D011
Typical RθJA = 90°C/W (max Cu)
Figure 11. Maximum Drain Current vs Temperature
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SLPS420E – SEPTEMBER 2013 – REVISED DECEMBER 2017
6 Device and Documentation Support
6.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
6.2 Trademarks
FemtoFET, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
6.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
6.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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CSD25481F4
SLPS420E – SEPTEMBER 2013 – REVISED DECEMBER 2017
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7 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
7.1 Mechanical Dimensions
1.04
0.96
A
B
PIN 1 INDEX AREA
0.64
0.56
0.35 MAX
C
SEATING PLANE
0.65
0.325
0.175
2
3
0.35
0.51
0.49
1
0.015
0.16
2X
0.14
C B
A
2X
0.26
0.24
0.26
0.24
0.015
C A
B
(1)
All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and
tolerancing per ASME Y14.5M.
(2)
This drawing is subject to change without notice.
(3)
This package is a Pb-free bump design. Bump finish may vary. To determine the exact finish, refer to the device data
sheet or contact a local TI representative.
Table 1. Pin Configuration
8
Position
Designation
Pin 1
Gate
Pin 2
Source
Pin 3
Drain
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7.2 Recommended Minimum PCB Layout
(0.25)
2X (0.25)
PKG
0.05 MIN
ALL AROUND
2X (0.15)
1
3
SYMM
(0.35)
(0.5)
2
(R0.05) TYP
SOLDER MASK
OPENING
(0.65)
LAND PATTERN EXAMPLE
METAL UNDER
SOLDER MASK
SOLDER MASK DEFINED
SCALE:50X
(1)
All dimensions are in millimeters.
(2)
For more information, see QFN/SON PCB Attachment (SLUA271).
7.3 Recommended Stencil Pattern
2X (0.25)
2X (0.2)
PKG
(0.25)
1
SYMM
(0.4)
(0.5)
3
2
2X (0.15)
(R0.05) TYP
(0.65)
2X SOLDER MASK EDGE
SOLDER PASTE EXAMPLE
BASED ON 0.075 - 0.1 mm THICK STENCIL
(1)
All dimensions are in millimeters.
(2)
Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may
have alternate design recommendations.
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PACKAGE OPTION ADDENDUM
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13-Dec-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
CSD25481F4
ACTIVE
PICOSTAR
YJC
3
3000
Green (RoHS
& no Sb/Br)
Call TI
Level-1-260C-UNLIM
-55 to 150
CS
CSD25481F4T
ACTIVE
PICOSTAR
YJC
3
250
Green (RoHS
& no Sb/Br)
Call TI
Level-1-260C-UNLIM
-55 to 150
CS
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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13-Dec-2017
Addendum-Page 2
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products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards
and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must
ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in
life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.
Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s noncompliance with the terms and provisions of this Notice.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2017, Texas Instruments Incorporated
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