Texas Instruments | TPSM84203, TPSM84205, TPSM84212 1.5-A, 28-V Input, TO-220 Power Module (Rev. A) | Datasheet | Texas Instruments TPSM84203, TPSM84205, TPSM84212 1.5-A, 28-V Input, TO-220 Power Module (Rev. A) Datasheet

Texas Instruments TPSM84203, TPSM84205, TPSM84212 1.5-A, 28-V Input, TO-220 Power Module (Rev. A) Datasheet
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TPSM84203, TPSM84205, TPSM84212
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TPSM84203, TPSM84205, TPSM84212 1.5-A, 28-V Input, TO-220 Power Module
1 Features
3 Description
•
•
•
•
The TPSM842xx power module is an easy-to-use
integrated power solution that combines a 1.5-A
DC/DC converter with power MOSFETs, an inductor,
and passives into a 3-pin, through-hole package. This
total power solution requires adding only input and
output capacitors and eliminates the loop
compensation and magnetics part selection from the
design process.
1
•
•
•
•
•
•
•
•
•
•
Complete Integrated Power Solution
3-Pin TO-220 Footprint
Efficiencies up to 95%
Fixed Output Voltage Options:
3.3 V, 5 V, and 12 V
400-kHz Switching Frequency
Advanced Eco-mode™ Pulse Skip
Pre-bias Output Start-up
Over-Current Protection
Output Over-Voltage Protection
Thermal Shutdown
Operating Junction Range: –40°C to +125°C
Operating Ambient Range: –40°C to +85°C
Meets EN55022 Class B Emissions
Create a Custom Design Using the TPSM84203
with the WEBENCH® Power Designer
The standard TO-220 pin-out allows a much
improved replacement of linear regulators packaged
in this industry standard footprint. The TPSM842xx
devices provide much higher efficiency without the
need of a heatsink.
Device Information(1)
PART NUMBER
BODY SIZE (NOM)
EAB
10 mm x 11 mm
TPSM84205
TPSM84212
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
PACKAGE
TPSM84203
12-V, 24-V Distributed Power-Bus Supply
Industrial White Goods
Consumer
– Audio
– STB, DTV
– Printer
Device Comparison
PART NUMBER
OUTPUT VOLTAGE
TPSM84203
3.3 V
TPSM84205
5.0 V
TPSM84212
12.0 V
Simplified Application
TPSM842xx
VIN
GND
VOUT
Copyright © 2017, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPSM84203, TPSM84205, TPSM84212
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
4
4
4
5
5
6
7
8
9
Absolute Maximum Ratings ......................................
Recommended Operating Conditions.......................
ESD Ratings ............................................................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics (VOUT = 3.3 V)......................
Typical Characteristics (VOUT = 5 V).........................
Typical Characteristics (VOUT = 12 V).......................
Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 13
8
Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Application ................................................. 14
9 Power Supply Recommendations...................... 19
10 Layout................................................................... 19
10.1 Layout Guidelines ................................................. 19
10.2 Layout Example .................................................... 19
11 Device and Documentation Support ................. 20
11.1
11.2
11.3
11.4
11.5
11.6
11.7
Device Support ....................................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
20
21
21
12 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (July 2017) to Revision A
Page
•
Added Feature Meets EN55022 Class B Emissions ............................................................................................................. 1
•
Added the EMI section ......................................................................................................................................................... 16
2
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5 Pin Configuration and Functions
2
3
VOUT
VIN
1
GND
EAB Package
3-Pin Through-Hole
Top View
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
Ground. This is the return current path for the power stage of the device. Connect this pin to
the bypass capacitors associated with VIN and VOUT.
GND
2
VIN
1
I
Input Voltage. This pin supplies voltage to the control circuitry and power switches of the
converter. Connect external bypass capacitors between this pin and GND.
VOUT
3
O
Output Voltage. This pin is connected to the internal output inductor. Connect this pin to the
output load and connect external bypass capacitors between this pin and GND.
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6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted) (1)
PARAMETER
MIN
MAX
UNIT
–0.3
30
V
TPSM84203
–0.3
3.9
V
TPSM84205
–0.3
5.7
V
TPSM84212
–0.3
13.0
V
1500
G
Input Voltage
Output Voltage
Mechanical Shock
Mil-STD-883D, Method 2002.3, 1msec, 1/2 sine, mounted
Mechanical Vibration
Mil-STD-883D, Method 2007.2, 20-2000Hz
Operating IC Junction Temperature range, TJ
Operating Ambient Temperature range, TA
(2)
(2)
G
125
°C
–40
85
°C
–60
150
°C
–40
(2)
Storage temperature, Tstg
(1)
10
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The ambient temperature is the air temperature of the surrounding environment. The junction temperature is the temperature of the
internal power IC when the device is powered. Operating below the maximum ambient temperature, as shown in the safe operating area
(SOA) curves, ensures that the maximum junction temperature of any component inside the module is never exceeded.
6.2 Recommended Operating Conditions
Over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN
MAX
4.5
28
V
TPSM84205
7
28
V
TPSM84212
14.5
28
V
0
1.5
A
TPSM84203
VIN
Input voltage
UNIT
IOUT
Output current
TA
Operating ambient temperature range (1)
–40
85
°C
TJ
Operating junction temperature range (1)
–40
125
°C
(1)
The ambient temperature is the air temperature of the surrounding environment. The junction temperature is the temperature of the
internal power IC when the device is powered. Operating below the maximum ambient temperature, as shown in the safe operating area
(SOA) curves, ensures that the maximum junction temperature of any component inside the module is never exceeded.
6.3 ESD Ratings
VALUE
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
V(ESD)
(1)
(2)
4
Electrostatic discharge
(1)
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
UNIT
±2500
±1500
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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6.4 Thermal Information
TPSM842xx
THERMAL METRIC (1)
EAB
UNIT
3 PINS
RθJA
Junction-to-ambient thermal resistance
(2)
(3)
ψJT
Junction-to-top characterization parameter
ψJB
Junction-to-board characterization parameter
(1)
(2)
(3)
(4)
(4)
56
°C/W
0.9
°C/W
1.7
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics paper.
The junction-to-ambient thermal resistance, RθJA, applies to devices soldered directly to a 50 mm × 50 mm double-sided PCB with 2 oz.
copper and natural convection cooling. Additional airflow reduces RθJA.
The junction-to-top characterization parameter, ψJT, estimates the junction temperature, TJ, of a device in a real system, using a
procedure described in JESD51-2A (sections 6 and 7). TJ = ψJT × Pdis + TT; where Pdis is the power dissipated in the device and TT is
the temperature of the top of the controller IC.
The junction-to-board characterization parameter, ψJB, estimates the junction temperature, TJ, of a device in a real system, using a
procedure described in JESD51-2A (sections 6 and 7). TJ = ψJB × Pdis + TB; where Pdis is the power dissipated in the device and TB is
the temperature of the module board 1 mm from the controller IC.
6.5 Electrical Characteristics
Over -40°C to +85°C free-air temperature range, VIN = 24 V, IOUT = IOUT max, FSW = 400 kHz, CIN = 0.1µF, 50V ceramic; 10µF,
50V ceramic; 100µF, 35V electrolytic, and COUT = 2 x 47µF, 16V 1210 ceramic (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT VOLTAGE (VIN)
VIN
Input voltage range
VIN_UVLO
Over VOUT range
TPSM84203
4.5 (1)
28
V
TPSM84205
7
(1)
28
V
TPSM84212
14.5 (1)
28
V
4.4
V
VIN increasing
VIN under voltage lock out
4.1
VIN decreasing
3.3
3.6
V
TPSM84203
3.3
V
TPSM84205
5.0
V
OUTPUT VOLTAGE (VOUT)
Output voltage
Over IOUT range
Set-point voltage tolerance
TA = 25°C, IOUT = 0 A
Temperature variation (2)
–40°C ≤ TA ≤ 85°C, IOUT = 0 A
0.4%
Line regulation
Over VIN range, IOUT = 1 A
0.4%
Load regulation
Over IOUT range
0.5%
Output voltage ripple
20 MHz bandwidth, peak-to-peak, IOUT > 500 mA
TPSM84212
VOUT
12.0
–3%
V
+3%
15
mV
OUTPUT CURRENT
IOUT
Output current
See SOA graph for derating over temperature.
0
Overcurrent threshold
1.5
3.1
A
A
PERFORMANCE
VIN = 5 V, IOUT = 1 A
VIN = 12 V, IOUT = 1 A
ƞ
Efficiency (3)
VIN = 24 V, IOUT = 1 A
1 A/µs load step,
25% to 75% IOUT(max),
COUT= 94 µF
Transient response (2)
(1)
(2)
(3)
VOUT = 3.3 V
92%
VOUT = 3.3 V
91%
VOUT = 5.0 V
92%
VOUT = 3.3 V
87%
VOUT = 5.0 V
90%
VOUT = 12.0 V
94%
VOUT
over/undershoot
4%
VOUT
Recovery time
100
µs
The minimum input voltage is the lowest ensured voltage that will produce the nominal output voltage. See the Drop-Out Voltage section
for information on drop-out voltage.
Specified by design. Not production tested.
See the efficiency graphs in the Typical Characteristics section for efficiency over the entire load range.
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Electrical Characteristics (continued)
Over -40°C to +85°C free-air temperature range, VIN = 24 V, IOUT = IOUT max, FSW = 400 kHz, CIN = 0.1µF, 50V ceramic; 10µF,
50V ceramic; 100µF, 35V electrolytic, and COUT = 2 x 47µF, 16V 1210 ceramic (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SOFT START
Internal soft start time (2)
TSS
5
ms
165
°C
10
°C
THERMAL SHUTDOWN
Rising threshold (2)
Hysteresis
(2)
CAPACITANCE
CIN
External input capacitance
Ceramic type
10
Non-ceramic type
TPSM84203
Ceramic type
COUT
TPSM84205
External output capacitance
µF
0
TPSM84212
Total output capacitance
100
µF
94
470
µF
47
470
µF
0
(4)
µF
35
mΩ
500
Equivalent series resistance (ESR)
(4)
The maximum output capacitance of 500 μF includes the combination of both ceramic and non-ceramic capacitors.
6.6 Switching Characteristics
Over operating free-air temperature range (unless otherwise noted)
PARAMETER
FSW
6
TEST CONDITIONS
Switching frequency
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MIN
TYP
MAX
UNIT
290
400
510
kHz
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6.7 Typical Characteristics (VOUT = 3.3 V)
Typical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
device. Safe operating area curves were measured using a Texas Instruments evaluation module (EVM).
0.9
95
0.8
90
0.7
Power Dissipation (W)
100
Efficiency (%)
85
80
75
70
65
VIN
5.0 V
12 V
24 V
60
55
50
0.0
0.3
0.6
0.9
Output Current (A)
1.2
0.6
0.5
0.4
0.3
VIN
24 V
12 V
5V
0.2
0.1
0
0.0
1.5
VOUT = 3.3 V
Figure 1. Efficiency vs Output Current
1.5
D004
Figure 2. Power Dissipation vs Output Current
VIN
24 V
12 V
5V
85
Ambient Temperature (°C)
Output Ripple Voltage (mV)
1.2
95
20
15
10
5
0
0.0
0.6
0.9
Output Current (A)
VOUT = 3.3 V
30
25
0.3
D001
75
65
55
45
35
0.3
VOUT = 3.3 V
0.6
0.9
Output Current (A)
1.2
1.5
Airflow
Nat Conv
25
0.0
0.3
D007
COUT = 2x 47 µF
0.6
0.9
Output Current (A)
1.5
D010
VIN ≤ 15 V
VOUT = 3.3 V
Figure 3. Ripple Voltage vs Output Current
1.2
Figure 4. Safe Operating Area
95
Ambient Temperature (°C)
85
75
65
55
45
35
25
0.0
VOUT = 3.3 V
Airflow
100LFM
Nat Conv
0.3
0.6
0.9
Output Current (A)
1.2
1.5
D011
VIN = 24 V
Figure 5. Safe Operating Area
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6.8 Typical Characteristics (VOUT = 5 V)
Typical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
device. Safe operating area curves were measured using a Texas Instruments evaluation module (EVM).
100
1.2
95
1.0
Power Dissipation (W)
90
Efficiency (%)
85
80
75
70
65
60
VIN
12 V
24 V
55
50
0.0
0.3
0.6
0.9
Output Current (A)
1.2
0.8
0.6
0.4
VIN
24 V
12 V
0.2
0.0
0.0
1.5
VOUT = 5 V
0.6
0.9
Output Current (A)
1.2
1.5
D005
VOUT = 5 V
Figure 6. Efficiency vs Output Current
Figure 7. Power Dissipation vs Output Current
30
95
VIN
24 V
12 V
25
85
Ambient Temperature (°C)
Output Ripple Voltage (mV)
0.3
D002
20
15
10
5
75
65
55
45
35
0
0.0
0.3
VOUT = 5 V
0.6
0.9
Output Current (A)
1.2
1.5
Airflow
Nat Conv
25
0.0
0.3
D008
COUT = 2x 47 µF
0.6
0.9
Output Current (A)
1.5
D012
VIN ≤ 15 V
VOUT = 5 V
Figure 8. Ripple Voltage vs Output Current
1.2
Figure 9. Safe Operating Area
95
Ambient Temperature (°C)
85
75
65
55
45
35
25
0.0
VOUT = 5 V
Airflow
200LFM
100 LFM
Nat Conv
0.3
0.6
0.9
Output Current (A)
1.2
1.5
D013
VIN = 24 V
Figure 10. Safe Operating Area
8
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6.9 Typical Characteristics (VOUT = 12 V)
Typical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
device. Safe operating area curves were measured using a Texas Instruments evaluation module (EVM).
1.4
100
95
1.2
Power Dissipation (W)
90
Efficiency (%)
85
80
75
70
65
60
VIN
15 V
24 V
55
50
0.0
0.3
0.6
0.9
Output Current (A)
1.2
1.0
0.8
0.6
0.4
VIN
24 V
15 V
0.2
0.0
0.0
1.5
VOUT = 12 V
0.6
0.9
Output Current (A)
1.2
1.5
D006
VOUT = 12 V
Figure 11. Efficiency vs Output Current
Figure 12. Power Dissipation vs Output Current
50
95
VIN
24 V
15 V
85
Ambient Temperature (°C)
45
Output Ripple Voltage (mV)
0.3
D003
40
35
30
25
20
75
65
55
45
Airflow
200LFM
100 LFM
Nat Conv
35
15
10
0.0
0.3
VOUT = 12 V
0.6
0.9
Output Current (A)
1.2
1.5
25
0.0
0.3
D009
COUT = 1x 47 µF
0.6
0.9
Output Current (A)
1.5
D014
VIN ≤ 15 V
VOUT = 12 V
Figure 13. Ripple Voltage vs Output Current
1.2
Figure 14. Safe Operating Area
95
Ambient Temperature (°C)
85
75
65
55
45
35
25
0.0
VOUT = 12 V
Airflow
400LFM
200 LFM
100 LFM
Nat conv
0.3
0.6
0.9
Output Current (A)
1.2
1.5
D015
VIN = 24 V
Figure 15. Safe Operating Area
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7 Detailed Description
7.1 Overview
The TPSM84203, TPSM84205, and TPSM84212 devices are 28 V input, 1.5 A, synchronous step down
converters with PWM, MOSFETs, inductor, and control circuitry integrated into a TO-220 footprint package. The
device integration enables small designs, while improving efficiency over a traditional linear regulator design. The
TPSM842xx family provides fixed output voltages of 3.3 V, 5.0 V and 12.0 V. The fixed 400 kHz (typ) switching
frequency allows small size and low output voltage ripple. Under light load conditions, these devices are
designed to operate in high-efficiency pulse-skipping mode. These devices provide accurate voltage regulation
for a variety of loads by using a precision internal voltage reference. These devices have been designed to safely
start up into a pre-biased output voltage. Thermal shutdown and current limit features protect the device during
an overload condition. The 3-pin, TO-220 footprint package offers improved performance over traditional linear
regulators packaged in the standard footprint.
7.2 Functional Block Diagram
VOUT
Thermal
Shutdown
Shutdown
Logic
+
+
Comp
VREF
VIN
UVLO
VIN
Power
Stage
and
Control
Logic
VOUT
Soft
Start
GND
Oscillator
OCP
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7.3 Feature Description
7.3.1 Input Capacitors
The TPSM842xx devices require a minimum input capacitance of 10 μF of ceramic type. High-quality ceramic
type X5R or X7R capacitors with sufficient voltage rating are recommended. An additional 100 μF of non-ceramic
capacitance is recommended for applications with transient load requirements. The voltage rating of input
capacitors must be greater than the maximum input voltage.
Table 1. Recommended Input Capacitors (1)
CAPACITOR CHARACTERISTICS
VENDOR
SERIES
PART NUMBER
WORKING
VOLTAGE
(V)
CAPACITANCE
(µF)
(2)
ESR (3)
(mΩ)
Murata
X7R
GRM32ER71H475KA88L
50
4.7
2
TDK
X5R
C3225X5R1H106K250AB
50
10
3
Murata
X7R
GRM32ER71H106KA12
50
10
2
TDK
X7R
C3225X7R1H106M250AB
50
10
3
EEHZA1H101P
50
100
28
Panasonic
(1)
(2)
(3)
ZA
Consult capacitor suppliers regarding availability, material composition, RoHS and lead-free status, and manufacturing process
requirements for any capacitors identified in this table.
Standard capacitance values
Maximum ESR @ 100kHz, 25°C.
7.3.2 Output Capacitors
The TPSM84203 and TPSM84205 devices require a minimum output capacitance of 94 μF (2x 47 μF) of ceramic
type. The TPSM84212 device requires a minimum output capacitance of 47 μF of ceramic type. High-quality X5R
or X7R ceramic capacitors with sufficient voltage rating are recommended. Additional output capacitance is
recommended for applications with transient load requirements. The voltage rating of output capacitors must be
greater than the maximum output voltage.
Table 2. Recommended Output Capacitors (1)
CAPACITOR CHARACTERISTICS
VENDOR
SERIES
PART NUMBER
WORKING
VOLTAGE
(V)
CAPACITANCE
(µF)
(2)
ESR (3)
(mΩ)
TDK
X5R
C3225X5R0J476K
6.3
47
2
Murata
X5R
GRM32ER61C476K
16
47
3
TDK
X5R
C3225X5R0J107M
6.3
100
2
Murata
X5R
GRM32ER60J107M
6.3
100
2
Murata
X5R
GRM32ER61A107M
10
100
2
Kemet
X5R
C1210C107M4PAC7800
16
100
2
18
Panasonic
POSCAP
6TPE100MI
6.3
100
Panasonic
POSCAP
6TPF220M9L
6.3
220
9
Panasonic
POSCAP
6TPE220ML
6.3
220
12
Panasonic
POSCAP
6TPF330M9L
6.3
330
9
Panasonic
POSCAP
16TQC47MYFD
16
47
55
(1)
(2)
(3)
Consult capacitor suppliers regarding availability, material composition, RoHS and lead-free status, and manufacturing process
requirements for any capacitors identified in this table.
Standard capacitance values.
Maximum ESR @ 100kHz, 25°C.
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7.3.3 Drop-Out Voltage
5.4
5.4
5.2
5.2
5.0
5.0
Output Voltage (V)
Output Voltage (V)
The drop-out voltage of a voltage regulator is the difference between the input voltage and the output voltage
that is required to maintain regulation. Figure 16 and Figure 17 show typical drop-out voltage graphs for
TPSM84205 at ambient temperatures of 25°C and 85°C. Figure 18 and Figure 19 show typical drop-out voltage
graphs for TPSM84212 at ambient temperatures of 25°C and 85°C.
4.8
4.6
IOUT
10 mA
100 mA
500 mA
1.0 A
1.5 A
4.4
4.2
4.0
4.5
4.6
4.8
VOUT = 5.0 V
5.0
5.1
5.2
Input Voltage (V)
5.4
5.6
4.8
4.6
IOUT
10 mA
100 mA
500 mA
1.0 A
1.5 A
4.4
4.2
4.0
4.5
5.7
4.6
12.2
12.2
12.0
12.0
11.8
11.6
11.4
IOUT
10 mA
100 mA
500 mA
1.0 A
1.5 A
11.0
10.8
VOUT = 12 V
11.2
11.6 12.0 12.4
Input Voltage (V)
12.8
TA = 25°C
Figure 18. Drop-Out Voltage
12
Output Voltage (V)
Output Voltage (V)
12.4
11.2
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5.4
5.6
5.7
D017
TA = 85°C
Figure 17. Drop-Out Voltage
12.4
10.8
5.0
5.1
5.2
Input Voltage (V)
VOUT = 5.0 V
TA = 25°C
Figure 16. Drop-Out Voltage
10.6
10.4
4.8
D016
13.2
11.8
11.6
11.4
IOUT
10 mA
100 mA
500 mA
1.0 A
1.5 A
11.2
11.0
10.8
13.6
10.6
10.4
10.8
D018
11.2
11.6 12.0 12.4
Input Voltage (V)
VOUT = 12 V
12.8
13.2
13.6
D019
TA = 85°C
Figure 19. Drop-Out Voltage
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7.3.4 Internal Soft-Start
The device starts up under control of the internal soft-start function. The internal soft start time is set to 5 ms
typically.
7.3.5 Safe Startup into Pre-Biased Outputs
The device has been designed to prevent the low-side MOSFET from discharging a pre-biased output. During
monotonic pre-biased startup, both high-side and low-side MOSFETs are not allowed to be turned on until the
internal soft-start voltage is higher than the internal feedback voltage.
7.3.6 Over-Current Protection
The device is protected from overcurrent conditions by cycle-by-cycle current limiting. If an output overload
condition occurs for more than 1.28 ms, the device shuts down and restarts after approximately 40 ms. The
hiccup mode helps to reduce the device power dissipation under severe overcurrent conditions.
7.3.7 Output Over-Voltage Protection
An output over voltage protection circuit is incorporated to minimize output voltage overshoot when recovering
from output fault conditions or strong unload transients. When the output voltage goes above 108% × VOUT, the
high-side MOSFET is forced off. When the output voltage falls below 104% × VOUT, the high-side MOSFET is
enabled again.
7.3.8 Thermal Shutdown
The internal thermal-shutdown circuitry forces the device to stop switching if the junction temperature exceeds
165°C typically. The device reinitiates the power-up sequence when the junction temperature drops below 155°C
typically.
7.4 Device Functional Modes
7.4.1 Normal Operation
The TPSM842xx devices operate in Normal operation mode when the input voltage is above the minimum input
voltage. In Normal operation mode, the device operates in continuous conduction mode (CCM) which occurs
when inductor peak current is above 840 mA typically. In CCM, the TPSM842xx devices operate at a fixed
frequency of 400 kHz (typ). In addition, to reduce EMI, the devices introduce frequency spread spectrum. The
jittering frequency range is ±6% of the switching frequency with a 780 Hz modulation rate.
7.4.2 Eco-mode™ Operation
The TPSM842xx devices operate in Eco-mode operation in light load conditions. Eco-mode is a high-efficiency,
pulse-skipping mode under light load conditions. Pulse skipping initiates when the switch current falls to 840 mA
typically. During pulse skipping, the low-side FET turns off when the switch current falls to 0 A. The device takes
on the characteristics of discontinuous conduction mode (DCM) operation and the apparent switching frequency
decreases. As the output current decreases, the perceived time between switching pulses increases.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPSM842xx devices are step down DC-DC power modules. They convert a higher DC voltage to a lower
DC voltage of 3.3 V, 5 V, or 12 V with a maximum output current of 1.5 A. The following design procedure can
be used to select components for the TPSM842xx devices. Alternately, the WEBENCH® software may be used
to generate complete designs. When generating a design, the WEBENCH software utilizes an iterative design
procedure and accesses comprehensive databases of components. Please visit www.ti.com/WEBENCH for more
details.
8.2 Typical Application
VIN = 24V
10 µF
50 V
TPSM84205
VIN
VOUT
GND
VOUT = 5 V
47 µF
16 V
47 µF
16 V
Copyright © 2017, Texas Instruments Incorporated
Figure 20. Typical Application
8.2.1 Design Requirements
For this design example, use the parameters listed in Table 3 and follow the design procedures below.
Table 3. Design Parameters
DESIGN PARAMETER
VALUE
Input Voltage VIN
24-V typical
Output Voltage VOUT
5.0 V
Output Current Rating
1.5 A
Key care-abouts
TO-220 footprint, high efficiency
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8.2.2 Detailed Design Procedure
8.2.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPSM84203 device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
8.2.2.2 Input and Output Capacitors
The TPSM842xx devices require both input and output capacitance for proper operation. The minimum required
input capacitance for all of the TPSM842xx devices is 10 µF of ceramic capacitance placed directly at the device
pins. The minimum required output capacitance for the TPSM84203 and TPSM84205 is 2× 47 µF of ceramic
type. The TPSM84212 requires only one 47 µF ceramic output capacitor. Additional capacitance can be added to
improve ripple or transient response.
For this application, the minimum required input capacitance of 10 µF, ceramic was added and 2× 47 µF ceramic
capacitance was added to the output.
8.2.3 Application Curves
VIN = 24 V
VOUT = 5 V
Figure 21. Start-up Waveforms
Copyright © 2017, Texas Instruments Incorporated
IOUT = 1.5 A
VIN = 24 V
VOUT = 5 V
IOUT = 1.5 A
Figure 22. Shut-down Waveforms
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8.2.3.1 EMI
The TPSM842xx devices are all compliant with EN55022 Class B radiated emissions. Figure 23 to Figure 27
show typical examples of radiated emissions plots for the TPSM842xx devices. The EMI plots were taken using a
web-orderable EVM with a resistive load. Input power was provided using a lead acid battery. All graphs show
plots of the antenna in the horizontal and vertical positions.
Figure 23. Radiated Emissions 12-V Input, 3.3-V Output,
1.5-A Load, Horizontal and Vertical Antenna
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Figure 24. Radiated Emissions 12-V Input, 5.0-V Output,
1.5-A Load, Horizontal and Vertical Antenna
Figure 25. Radiated Emissions 24-V Input, 3.3-V Output,
1.5-A Load, Horizontal and Vertical Antenna
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Figure 26. Radiated Emissions 12-V Input, 5.0-V Output,
1.5-A Load, Horizontal and Vertical Antenna
Figure 27. Radiated Emissions 24-V Input, 12-V Output,
1.5-A Load, Horizontal and Vertical Antenna
18
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TPSM84203, TPSM84205, TPSM84212
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9 Power Supply Recommendations
The TPSM842xx devices are designed to operate from an input voltage supply between 4.5 V and 28 V. This
supply must be well regulated. Proper bypassing of input supply is critical for noise performance, as is PCB
layout and grounding scheme. See the recommendations in the Layout section.
10 Layout
10.1 Layout Guidelines
To achieve optimal electrical and thermal performance, an optimized PCB layout is required. Figure 28 shows a
typical PCB layout. Some considerations for an optimized layout are:
• Use large copper areas for power planes (VIN, VOUT, and GND) to minimize conduction loss and thermal
stress.
• Place ceramic input and output capacitors close to the device pins to minimize high frequency noise.
• Locate additional output capacitors between the ceramic capacitor and the load.
• Use multiple vias to connect the power planes to internal layers.
10.2 Layout Example
Figure 28.
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPSM84203 device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
11.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 4. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPSM84203
Click here
Click here
Click here
Click here
Click here
TPSM84205
Click here
Click here
Click here
Click here
Click here
TPSM84212
Click here
Click here
Click here
Click here
Click here
11.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.5 Trademarks
Eco-mode, E2E are trademarks of Texas Instruments.
WEBENCH is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
20
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11.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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19-Dec-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPSM84203EAB
ACTIVE
SIP MODULE
EAB
3
80
RoHS (In
Work) & Green
(In Work)
SN
N / A for Pkg Type
-40 to 125
TPSM84205EAB
ACTIVE
SIP MODULE
EAB
3
80
RoHS (In
Work) & Green
(In Work)
SN
N / A for Pkg Type
-40 to 125
TPSM84212EAB
ACTIVE
SIP MODULE
EAB
3
80
RoHS (In
Work) & Green
(In Work)
SN
N / A for Pkg Type
-40 to 125
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
19-Dec-2019
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE OUTLINE
EAB0003A
SIPMODULE - 11.1 mm max height
SCALE 1.000
SYSTEM IN PACKAGE MODULE
10.1
9.9
A
1.72
1.42
B
11.1 MAX
C
(1)
4.35
3.85
3
1
3X 0.635 0.02
0.25
C A B
2X 2.54
0.635 0.02
1.27 0.025
5.08
7.80
5.66
(1.57)
1
3
4223521/C 11/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Location, size and quantity of each component are for reference only and may vary.
www.ti.com
EXAMPLE BOARD LAYOUT
EAB0003A
SIPMODULE - 11.1 mm max height
SYSTEM IN PACKAGE MODULE
(11)
2X SOLDER MASK
OPENING
SOLDER MASK
OPENING
2X 0.07 MAX
ALL AROUND
0.07 MAX
ALL AROUND
( 1.71)
R0.05
TYP
(2.96)
(7.37)
3X
1.01 MIN
VIA
2
1
3
2X ( 1.71)
METAL
(3.9)
(2.54)
(5.08)
RECOMMENDED
KEEP OUT AREA
FOR USER COMPONENTS
LAND PATTERN EXAMPLE
NON-SOLDER MASK DEFINED
SCALE:10X
4223521/C 11/2017
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AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
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