Texas Instruments | CSD16321Q5 25-V N-Channel NexFET™ Power MOSFET (Rev. D) | Datasheet | Texas Instruments CSD16321Q5 25-V N-Channel NexFET™ Power MOSFET (Rev. D) Datasheet

Texas Instruments CSD16321Q5 25-V N-Channel NexFET™ Power MOSFET (Rev. D) Datasheet
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CSD16321Q5
SLPS220D – AUGUST 2009 – REVISED MAY 2017
CSD16321Q5 25-V N-Channel NexFET™ Power MOSFET
1 Features
•
•
•
•
•
•
•
1
Product Summary
Optimized for 5-V Gate Drive
Ultra-Low Qg and Qgd
Low-Thermal Resistance
Avalanche Rated
Lead-Free Terminal Plating
RoHS Compliant
SON 5-mm × 6-mm Plastic Package
TA = 25°C
TYPICAL VALUE
Drain-to-Source Voltage
25
V
Qg
Gate Charge Total (4.5 V)
14
nC
Qgd
Gate Charge Gate-to-Drain
RDS(on)
VGS(th)
•
Point-of-Load Synchronous Buck Converter for
Applications in Networking, Telecom, and
Computing Systems
Optimized for Synchronous FET Applications
2.5
Drain-to-Source On Resistance
nC
VGS = 3 V
2.8
VGS = 4.5 V
2.1
VGS = 8 V
1.9
Threshold Voltage
2 Applications
•
UNIT
VDS
1.1
mΩ
V
Device Information(1)
DEVICE
MEDIA
QTY
PACKAGE
SHIP
CSD16321Q5
13-Inch Reel
2500
CSD16321Q5T
7-Inch Reel
250
SON
5.00-mm × 6.00-mm
Plastic Package
Tape
and
Reel
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
3 Description
This 25-V, 1.9-mΩ, 5-mm × 6-mm SON NexFET™
power MOSFET has been designed to minimize
losses in power conversion and optimized for 5-V
gate drive applications.
Absolute Maximum Ratings
TA = 25°C
VALUE
UNIT
VDS
Drain-to-Source Voltage
25
V
VGS
Gate-to-Source Voltage
+10 / –8
V
Top View
ID
IDM
PD
Continuous Drain Current (Package Limited)
100
Continuous Drain Current (Silicon Limited),
TC = 25°C
177
Continuous Drain Current(1)
29
Pulsed Drain Current(2)
400
Power Dissipation(1)
3.1
Power Dissipation, TC = 25°C
113
TJ,
Tstg
Operating Junction,
Storage Temperature
EAS
Avalanche Energy, Single Pulse
ID = 66 A, L = 0.1 mH, RG = 25 Ω
A
A
W
–55 to 150
°C
218
mJ
(1) Typical RθJA = 40°C/W on 1-in2, 2-oz Cu pad on 0.06-in thick
FR4 PCB.
(2) Max RθJC = 1.1°C/W, pulse duration ≤ 100 μs, duty cycle ≤
1%.
RDS(ON) vs VGS
Gate Charge
8
TC = 25qC, ID = 25 A
TC = 125qC, ID = 25 A
9
VGS - Gate-to-Source Voltage (V)
RDS(on) - On-State Resistance (m:)
10
8
7
6
5
4
3
2
1
ID = 25 A
7 VDS = 12.5 V
6
5
4
3
2
1
0
0
0
1
2
3
4
5
6
7
8
VGS - Gate-to-Source Voltage (V)
9
10
D007
0
3
6
9
12
15
Qg - Gate Charge (nC)
18
21
24
D004
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CSD16321Q5
SLPS220D – AUGUST 2009 – REVISED MAY 2017
www.ti.com
Table of Contents
1
2
3
4
5
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Specifications.........................................................
1
1
1
2
3
5.1 Electrical Characteristics........................................... 3
5.2 Thermal Information .................................................. 3
5.3 Typical MOSFET Characteristics.............................. 4
6
Device and Documentation Support.................... 7
6.1
6.2
6.3
6.4
6.5
7
Receiving Notification of Documentation Updates....
Community Resources..............................................
Trademarks ...............................................................
Electrostatic Discharge Caution ................................
Glossary ....................................................................
7
7
7
7
7
Mechanical, Packaging, and Orderable
Information ............................................................. 8
7.1 Q5 Package Dimensions .......................................... 8
7.2 Recommended PCB Pattern..................................... 9
7.3 Q5 Tape and Reel Information................................ 10
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (December 2016) to Revision D
•
Page
Changed the RDS(ON) values at 3 V, 4.5 V, 8 V & the Description to match the values on the Electrical
Characteristics table. ............................................................................................................................................................. 1
Changes from Revision B (May 2010) to Revision C
Page
•
Changed Description text ....................................................................................................................................................... 1
•
Added silicon limited continuous drain current to Absolute Maximum Ratings table ............................................................. 1
•
Added max power dissipation at TC = 25°C to Absolute Maximum Ratings table ................................................................. 1
•
Changed Note 2 in Absolute Maximum Ratings table............................................................................................................ 1
•
Changed R θJA max from 48°C/W : to 50°C/W........................................................................................................................ 3
•
Changed the SOA in Figure 10 to reflect measured data ...................................................................................................... 6
•
Added Device and Documentation Support section............................................................................................................... 7
•
Changed MECHANICAL DATA section to Mechanical, Packaging, and Orderable Information section .............................. 8
Changes from Revision A (Jaunary 2010) to Revision B
Page
•
Changed RDS(on) - VGS = 3 V, ID = 25 A MAX value From: 3.5 To: 3.8 ................................................................................... 3
•
Deleted the Package Marking Information section............................................................................................................... 10
Changes from Original (August 2009) to Revision A
Page
•
Changed the labels on the Top View pinout image................................................................................................................ 1
•
Changed Note 1 of the From: RθJA = 39°C/W To: Typical RθJA = 39°C/W ............................................................................. 1
•
Changed Figure 1 text From: RθJA = 92°C/W To: Typical RθJA = 93°C/W .............................................................................. 4
•
Changed Figure 10 text From: RθJA = 92°C/W To: Typical RθJA = 93°C/W ............................................................................ 5
•
Changed Figure 11 X-axis values .......................................................................................................................................... 5
2
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5 Specifications
5.1 Electrical Characteristics
TA = 25°C (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
STATIC CHARACTERISTICS
BVDSS
Drain-to-source voltage
VGS = 0 V, ID = 250 μA
IDSS
Drain-to-source leakage current
VGS = 0 V, VDS = 20 V
IGSS
Gate-to-source leakage current
VDS = 0 V, VGS = +10 / –8 V
VGS(th)
Gate-to-source threshold voltage
VDS = VGS, ID = 250 μA
RDS(on)
Drain-to-source on resistance
gfs
Transconductance
25
0.9
V
1
μA
100
nA
V
1.1
1.4
VGS = 3 V, ID = 25 A
2.8
3.8
VGS = 4.5 V, ID = 25 A
2.1
2.6
VGS = 8 V, ID = 25 A
1.9
2.4
VDS = 12.5 V, ID = 25 A
150
mΩ
S
DYNAMIC CHARACTERISTICS
Ciss
Input capacitance
2360
3100
pF
Coss
Output capacitance
Crss
Reverse transfer capacitance
1700
2200
pF
115
150
RG
Series gate resistance
pF
1.5
3
Ω
Qg
Qgd
Gate charge total (4.5 V)
14
19
nC
Gate charge gate-to-drain
2.5
Qgs
Gate charge gate-to-source
nC
4
nC
Qg(th)
Gate charge at Vth
Qoss
Output charge
2.1
nC
36
td(on)
Turnon delay time
nC
9
tr
Rise time
ns
15
ns
td(off)
Turnoff delay time
tf
Fall time
27
ns
17
ns
VGS = 0 V, VDS = 12.5 V, f = 1 MHz
VDS = 12.5 V, ID = 25 A
VDS = 15 V, VGS = 0 V
VDS = 12.5 V, VGS = 4.5 V,
ID = 25 A, RG = 2 Ω
DIODE CHARACTERISTICS
VSD
Diode forward voltage
ISD = 25 A, VGS = 0 V
0.8
Qrr
Reverse recovery charge
VDD = 13 V, IF = 25 A, di/dt = 300 A/μs
33
1
nC
V
trr
Reverse recovery time
VDD = 13 V, IF = 25 A, di/dt = 300 A/μs
32
ns
5.2 Thermal Information
TA = 25°C (unless otherwise stated)
PARAMETER
R θJC
Junction-to-case thermal resistance (1)
R θJA
Junction-to-ambient thermal resistance (1)
(1)
(2)
(2)
MIN
TYP
MAX
UNIT
1.1
°C/W
50
°C/W
RθJC is determined with the device mounted on a 1-in2, 2-oz Cu pad on a 1.5-in × 1.5-in, 0.06-in thick FR4 board. RθJC is specified by
design while RθJA is determined by the user’s board design.
Device mounted on FR4 Material with 1 in2 of 2-oz Cu.
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CSD16321Q5
SLPS220D – AUGUST 2009 – REVISED MAY 2017
GATE
www.ti.com
GATE
Source
N-Chan 5x6 QFN TTA MIN Rev3
N-Chan 5x6 QFN TTA MAX Rev3
Max RθJA = 50°C/W
when mounted on 1 in2
of 2-oz Cu.
Source
Max RθJA = 125°C/W
when mounted on
minimum pad area of
2-oz Cu.
DRAIN
DRAIN
M0137-02
M0137-01
5.3 Typical MOSFET Characteristics
TA = 25°C (unless otherwise stated)
Figure 1. Transient Thermal Impedance
4
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Typical MOSFET Characteristics (continued)
100
110
90
100
IDS - Drain-to-Source Current (A)
IDS - Drain-to-Source Current (A)
TA = 25°C (unless otherwise stated)
80
70
60
50
40
30
20
VGS = 3 V
VGS = 4.5 V
VGS = 8 V
10
TC = 125° C
TC = 25° C
TC = -55° C
90
80
70
60
50
40
30
20
10
0
0
0
0.05
0.1
0.15
0.2
0.25
VDS - Drain-to-Source Voltage (V)
0.3
1
1.2
D002
1.4
1.6
1.8
VGS - Gate-to-Source Voltage (V)
2
2.2
D003
VDS = 5 V
Figure 2. Saturation Characteristics
Figure 3. Transfer Characteristics
10000
7
6
C - Capacitance (pF)
VGS - Gate-to-Source Voltage (V)
8
5
4
3
2
1000
100
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
1
10
0
0
3
6
9
12
15
Qg - Gate Charge (nC)
VDS = 12.5 V
18
21
0
24
5
D004
Figure 4. Gate Charge
D005
Figure 5. Capacitance
10
RDS(on) - On-State Resistance (m:)
VGS(th) - Threshold Voltage (V)
25
ID = 25 A
1.5
1.3
1.1
0.9
0.7
0.5
-75
10
15
20
VDS - Drain-to-Source Voltage (V)
TC = 25qC, ID = 25 A
TC = 125qC, ID = 25 A
9
8
7
6
5
4
3
2
1
0
-50
-25
0
25
50
75 100
TC - Case Temperature (qC)
125
150
175
0
1
2
D006
3
4
5
6
7
8
VGS - Gate-to-Source Voltage (V)
9
10
D007
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
Figure 7. On Resistance vs Gate Voltage
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Typical MOSFET Characteristics (continued)
TA = 25°C (unless otherwise stated)
100
ISD - Source-to-Drain Current (A)
Normalized On-State Resistance
1.8
1.6
1.4
1.2
1
0.8
0.6
-75
TC = 25° C
TC = 125° C
10
1
0.1
0.01
0.001
0.0001
-50
-25
0
25
50
75 100
TC - Case Temperature (°C)
ID = 25 A
125
150
175
0
1
D009
Figure 9. Typical Diode Forward Voltage
100
IAV - Peak Avalanche Current (A)
1000
IDS - Drain-to-Source Current (A)
0.4
0.6
0.8
VSD - Source-to-Drain Voltage (V)
VGS = 8 V
Figure 8. On Resistance vs Temperature
100
10
1
100 ms
10 ms
0.1
0.1
0.2
D008
1 ms
100 µs
1
10
VDS - Drain-to-Source Voltage (V)
100
TC = 125qC
TC = 25qC
10
1
0.01
D010
0.1
1
10
TAV - Time in Avalanche (ms)
100
D011
D012
Single pulse, max RθJC = 1.1°C/W
Figure 10. Maximum Safe Operating Area
Figure 11. Single Pulse Unclamped Inductive Switching
IDS - Drain-to-Source Current (A)
120
100
80
60
40
20
0
-50
-25
0
25
50
75
100 125
TC - Case Temperature (qC)
150
175
D012
Figure 12. Maximum Drain Current vs Temperature
6
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SLPS220D – AUGUST 2009 – REVISED MAY 2017
6 Device and Documentation Support
6.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
6.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
6.3 Trademarks
NexFET, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
6.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
6.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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SLPS220D – AUGUST 2009 – REVISED MAY 2017
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7 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
7.1 Q5 Package Dimensions
K
L
L
c1
E1
E2
b
D2
4
4
5
5
e
3
6
3
6
E
D1
7
7
2
2
8
8
1
1
q
Top View
Bottom View
Side View
c
E1
A
q
Front View
M0140-01
DIM
INCHES
MIN
MAX
MIN
MAX
A
0.950
1.050
0.037
0.039
b
0.360
0.460
0.014
0.018
c
0.150
0.250
0.006
0.010
c1
0.150
0.250
0.006
0.010
D1
4.900
5.100
0.193
0.201
D2
4.320
4.520
0.170
0.178
E
4.900
5.100
0.193
0.201
E1
5.900
6.100
0.232
0.240
E2
3.920
4.12
0.154
0.162
e
8
MILLIMETERS
1.27 TYP
0.050 TYP
K
0.760
—
0.030
—
L
0.510
0.710
0.020
0.028
θ
0.00
—
—
—
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SLPS220D – AUGUST 2009 – REVISED MAY 2017
7.2 Recommended PCB Pattern
F1
F7
F3
8
1
F2
F11
F5
F9
5
4
F6
F8
F4
F10
M0139-01
DIM
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
F1
6.205
6.305
0.244
0.248
F2
4.460
4.560
0.176
0.180
F3
4.460
4.560
0.176
0.180
F4
0.650
0.700
0.026
0.028
F5
0.620
0.670
0.024
0.026
F6
0.630
0.680
0.025
0.027
F7
0.700
0.800
0.028
0.031
F8
0.650
0.700
0.026
0.028
F9
0.620
0.670
0.024
0.026
F10
4.900
5.000
0.193
0.197
F11
4.460
4.560
0.176
0.180
For recommended circuit layout for PCB designs, see Reducing Ringing Through PCB Layout Techniques
(SLPA005).
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K0
4.00 ±0.10 (See Note 1)
0.30 ±0.05
2.00 ±0.05
+0.10
–0.00
12.00 ±0.30
Ø 1.50
1.75 ±0.10
7.3 Q5 Tape and Reel Information
5.50 ±0.05
B0
R 0.30 MAX
A0
8.00 ±0.10
Ø 1.50 MIN
R 0.30 TYP
A0 = 6.50 ±0.10
B0 = 5.30 ±0.10
K0 = 1.40 ±0.10
M0138-01
Notes:
1. 10-sprocket hole pitch cumulative tolerance ±0.2.
2. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm.
3. Material: black static dissipative polystyrene.
4. All dimensions are in mm (unless otherwise specified).
5. Thickness: 0.30 ±0.05 mm.
6. MSL1 260°C (IR and Convection) PbF Reflow Compatible.
10
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PACKAGE OPTION ADDENDUM
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15-May-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
CSD16321Q5
ACTIVE
Package Type Package Pins Package
Drawing
Qty
VSON-CLIP
DQH
8
2500
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Pb-Free (RoHS
Exempt)
CU SN
Level-1-260C-UNLIM
Op Temp (°C)
Device Marking
(4/5)
-55 to 150
CSD16321
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
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