Texas Instruments | ULN2803A Darlington Transistor Arrays (Rev. H) | Datasheet | Texas Instruments ULN2803A Darlington Transistor Arrays (Rev. H) Datasheet

Texas Instruments ULN2803A Darlington Transistor Arrays (Rev. H) Datasheet
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ULN2803A
SLRS049H – FEBRUARY 1997 – REVISED FEBRUARY 2017
ULN2803A Darlington Transistor Arrays
1 Features
3 Description
•
The ULN2803A device is a 50 V, 500 mA Darlington
transistor array. The device consists of eight NPN
Darlington pairs that feature high-voltage outputs with
common-cathode clamp diodes for switching
inductive loads. The collector-current rating of each
Darlington pair is 500 mA. The Darlington pairs may
be connected in parallel for higher current capability.
1
•
•
•
500-mA-Rated Collector Current
(Single Output)
High-Voltage Outputs: 50 V
Output Clamp Diodes
Inputs Compatible With Various Types of Logic
2 Applications
•
•
•
•
•
•
•
•
•
Relay Drivers
Hammer Drivers
Lamp Drivers
Display Drivers (LED and Gas Discharge)
Line Drivers
Logic Buffers
Stepper Motors
IP Camera
HVAC Valve and LED Dot Matrix
Applications include relay drivers, hammer drivers,
lamp drivers, display drivers (LED and gas
discharge), line drivers, and logic buffers. The
ULN2803A device has a 2.7-kΩ series base resistor
for each Darlington pair for operation directly with
TTL or 5-V CMOS devices.
Device Information(1)
PART NUMBER
ULN2803ADW
PACKAGE
SOIC (18)
BODY SIZE (NOM)
11.55 mm × 7.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram
1
18
1B
1C
2
17
2B
2C
3
16
3B
3C
4
15
4B
4C
5
14
5B
5C
6
13
6B
6C
7
12
7B
7C
8
11
8B
8C
10
COM
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
ULN2803A
SLRS049H – FEBRUARY 1997 – REVISED FEBRUARY 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
5
5
5
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Parameter Measurement Information .................. 6
Detailed Description .............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram ......................................... 9
8.3 Feature Description................................................... 9
8.4 Device Functional Modes.......................................... 9
9
Application and Implementation ........................ 10
9.1 Application Information............................................ 10
9.2 Typical Application ................................................. 10
10 Power Supply Recommendations ..................... 12
11 Layout................................................................... 12
11.1 Layout Guidelines ................................................. 12
11.2 Layout Example .................................................... 12
12 Device and Documentation Support ................. 13
12.1
12.2
12.3
12.4
12.5
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
13
13
13
13
13
13 Mechanical, Packaging, and Orderable
Information ........................................................... 13
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (January 2015) to Revision H
Page
•
Deleted obsolete orderable ULN2803AN and removed all references to N package............................................................ 1
•
Added Storage temperature, Tstg in Absolute Maximum Ratings ........................................................................................... 4
•
Deleted VI from Recommended Operating Conditions........................................................................................................... 4
•
Added Ambient temperature, TA in Recommended Operating Conditions............................................................................. 4
•
Changed coil supply voltage specifications in Design Parameters ...................................................................................... 11
•
Added Receiving Notification of Documentation Updates section and Community Resources section ............................. 13
Changes from Revision F (January 2014) to Revision G
•
Page
Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
Changes from Revision E (July 2006) to Revision F
Page
•
Updated document to new TI data sheet format - no specification changes. ........................................................................ 1
•
Deleted Ordering Information table. ....................................................................................................................................... 1
2
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5 Pin Configuration and Functions
DW Package
18-Pin SOIC
Top View
1B
1
18
1C
2B
2
17
2C
3B
3
16
3C
4B
4
15
4C
5B
5
14
5C
6B
6
13
6C
7B
7
12
7C
8B
8
11
8C
GND
9
10
COM
Not to scale
Pin Functions
PIN
NAME
NO.
1B
1
2B
2
3B
3
4B
4
5B
5
6B
6
7B
7
8B
8
1C
18
2C
17
3C
16
4C
15
5C
14
6C
13
7C
12
8C
11
TYPE
DESCRIPTION
I
Channel 1 through 8 Darlington base input
O
Channel 1 through 8 Darlington collector output
GND
9
—
Common emitter shared by all channels (typically tied to ground)
COM
10
I/O
Common cathode node for flyback diodes (required for inductive loads)
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6 Specifications
6.1 Absolute Maximum Ratings
at 25°C free-air temperature (unless otherwise noted) (1)
MIN
VCE
MAX
UNIT
50
V
Collector-emitter voltage
VI
Input voltage
I(clamp)
(2)
30
V
Peak collector current
500
mA
Output clamp current
500
mA
–2.5
A
TJ
Total substrate-terminal current
Junction temperature
–65
150
°C
Tstg
Storage temperature
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, unless otherwise noted, are with respect to the emitter/substrate terminal GND.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
UNIT
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101 (2)
V
±500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCE
Collector-emitter voltage
TA
Ambient temperature
MIN
MAX
0
50
UNIT
V
–40
85
°C
6.4 Thermal Information
ULN2803A
THERMAL METRIC
(1)
DW (SOIC)
UNIT
18 PINS
RθJA
Junction-to-ambient thermal resistance
66.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
29.5
°C/W
RθJB
Junction-to-board thermal resistance
33.0
°C/W
ψJT
Junction-to-top characterization parameter
6.0
°C/W
ψJB
Junction-to-board characterization parameter
32.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
at TA = 25°C free-air temperature (unless otherwise noted)
PARAMETER
ULN2803A
TEST CONDITIONS
MIN
ICEX
Collector cutoff current
VCE = 50 V,
see Figure 3
II = 0
II(off)
Off-state input current
VCE = 50 V,
TA = 70°C
IC = 500 μA,
see Figure 4
II(on)
Input current
VI = 3.85 V,
See Figure 5
VI(on)
VCE = 2 V,
see Figure 6
On-state input voltage
VCE(sat)
Collector-emitter saturation voltage
TYP
MAX
50
50
65
UNIT
μA
μA
0.93
1.35
IC = 200 mA
2.4
IC = 250 mA
2.7
IC = 300 mA
3
II = 250 μA,
see Figure 7
IC = 100 mA
0.9
1.1
II = 350 μA,
see Figure 7
IC = 200 mA
1
1.3
II = 500 μA,
see Figure 7
IC = 350 mA
1.3
1.6
50
mA
V
V
IR
Clamp diode reverse current
VR = 50 V,
see Figure 8
VF
Clamp diode forward voltage
IF = 350 mA
see Figure 9
1.7
2
V
Ci
Input capacitance
VI = 0,
f = 1 MHz
15
25
pF
TYP
MAX
μA
6.6 Switching Characteristics
TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
tPLH
Propagation delay time, low- to high-level output
130
tPHL
Propagation delay time, high- to low-level output
VS = 50 V, CL = 15 pF, RL = 163 Ω,
See Figure 10
VOH
High-level output voltage after switching
VS = 50 V, IO = 300 mA, see Figure 11
UNIT
ns
20
VS – 20
mV
6.7 Typical Characteristics
μ
μ
μ
μ
μ
μ
Figure 1. Collector-Emitter Saturation Voltage vs Collector
Current (One Darlington)
Figure 2. Collector-Emitter Saturation Voltage vs Total
Collector Current (Two Darlingtons in Parallel)
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7 Parameter Measurement Information
Open VCE
Open VCE
IC
II(off)
ICEX
Open
Figure 3. ICEX Test Circuit
Figure 4. II(off) Test Circuit
Open
Open
II
IC
VI
VI
Open
VCE
Figure 5. II(on) Test Circuit
Figure 6. VI(on) Test Circuit
Open
VR
IC
hFE =
II
II
IR
IC
Open
VCE
Figure 7. hFE, VCE(sat) Test Circuit
Figure 8. IR Test Circuit
IF
VF
Open
Figure 9. VF Test Circuit
6
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Parameter Measurement Information (continued)
Input
Open
VS = 50 V
RL = 163 Ω
Pulse
Generator
(see Note A)
Output
CL = 15 pF
(see Note B)
Test Circuit
<5 ns
Input
10%
<10 ns
90%
50%
90%
50%
VIH
(see Note C)
10%
0
0.5 µs
tPHL
tPLH
VOH
Output
50%
50%
Voltage Waveforms
A.
The pulse generator has the following characteristics: PRR = 12.5 kHz, ZO = 50 Ω.
B.
CL includes probe and jig capacitance.
C.
VIH = 3 V
Figure 10. Propagation Delay Times
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Parameter Measurement Information (continued)
VS
Input
2 mH
163 Ω
Pulse
Generator
(see Note A)
Output
CL = 15 pF
(see Note B)
Test Circuit
<5 ns
Input
10%
<10 ns
90%
1.5 V
90%
1.5 V
VIH
(see Note C)
10%
0
40 µs
VOH
Output
Voltage Waveforms
A.
The pulse generator has the following characteristics: PRR = 12.5 kHz, ZO = 50 Ω.
B.
CL includes probe and jig capacitance.
C.
VIH = 3 V
Figure 11. Latch-Up Test
8
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8 Detailed Description
8.1 Overview
This standard device has proven ubiquity and versatility across a wide range of applications. This is due to its
integration of 8 Darlington transistors that are capable of sinking up to 500 mA and wide GPIO range capability.
The ULN2803A is comprised of eight high voltage, high current NPN Darlington transistor pairs. All units feature
a common emitter and open collector outputs. To maximize their effectiveness, these units contain suppression
diodes for inductive loads. The ULN2803A has a series base resistor to each Darlington pair, thus allowing
operation directly with TTL or CMOS operating at supply voltages of 5 V or 3.3 V. The ULN2803A offers
solutions to a great many interface needs, including solenoids, relays, lamps, small motors, and LEDs.
Applications requiring sink currents beyond the capability of a single output may be accommodated by paralleling
the outputs.
8.2 Functional Block Diagram
COM
Output C
2.7 kΩ
Input B
7.2 kΩ
3 kΩ
E
8.3 Feature Description
Each channel of ULN2803A consists of Darlington connected NPN transistors. This connection creates the effect
of a single transistor with a very-high current gain. The very high β allows for high output current drive with a
very-low input current, essentially equating to operation with low GPIO voltages.
The GPIO voltage is converted to base current through the 2.7-kΩ resistor connected between the input and
base of the predriver Darlington NPN.
The diodes connected between the output and COM pin are used to suppress the kick-back voltage from an
inductive load that is excited when the NPN drivers are turned off (stop sinking) and the stored energy in the
coils causes a reverse current to flow into the coil supply through the kick-back diode.
In normal operation, the diodes on base and collector pins to emitter will be reverse biased. If these diode are
forward biased, internal parasitic NPN transistors will draw (a nearly equal) current from other (nearby) device
pins.
8.4 Device Functional Modes
8.4.1 Inductive Load Drive
When the COM pin is tied to the coil supply voltage, ULN2803A is able to drive inductive loads and suppress the
kick-back voltage through the internal free wheeling diodes.
8.4.2 Resistive Load Drive
When driving resistive loads, COM can be left unconnected or connected to the load voltage supply. If multiple
supplies are used, connect to the highest voltage supply.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
ULN2803A will typically be used to drive a high voltage and/or current peripheral from an MCU or logic device
that cannot tolerate these conditions. The following design is a common application of ULN2803A, driving
inductive loads. This includes motors, solenoids, and relays. Each load type can be modeled by what is seen in
Figure 12.
9.2 Typical Application
VSUP
ULN2803A
3.3 V Logic
3.3 V Logic
3.3 V Logic
IN1
OUT1
IN2
OUT2
IN3
OUT3
IN4
OUT4
IN5
OUT5
IN6
OUT6
IN7
OUT7
IN8
OUT8
GND
VSUP
COM
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Figure 12. ULN2803A as Inductive Load Driver
10
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Typical Application (continued)
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
GPIO voltage
3.3 or 5 V
Coil supply voltage
12 to 50 V
Number of channels
8
Output current (RCOIL)
20 to 300 mA per channel
Duty cycle
100%
9.2.2 Detailed Design Procedure
When using ULN2803A in a coil driving application, determine the following:
• Input voltage range
• Temperature range
• Output and drive current
• Power dissipation
9.2.2.1 Drive Current
The coil current is determined by the coil voltage (VSUP), coil resistance, and output low voltage (VOL or
VCE(SAT)).
ICOIL = (VSUP – VCE(SAT)) / RCOIL
(1)
9.2.2.2 Output Low Voltage
The output low voltage (VOL) is the same thing as VCE(SAT) and can be determined by Figure 1, Figure 2, or
Electrical Characteristics.
9.2.2.3 Power Dissipation and Temperature
The number of coils driven is dependent on the coil current and on-chip power dissipation. To determine the
number of coils possible, use Equation 2 to calculate ULN2803A on-chip power dissipation PD.
N
PD = å VOLi ´ ILi
i=1
where
•
•
N is the number of channels active together.
VOLi is the OUTi pin voltage for the load current ILi. This is the same as VCE(SAT)
(2)
To ensure the reliability of ULN2803A and the system, the on-chip power dissipation must be lower that or equal
to the maximum allowable power dissipation (PD) dictated by Equation 3.
PD(MAX) =
(T
J(MAX)
- TA )
qJA
where
•
•
•
TJ(MAX) is the target maximum junction temperature.
TA is the operating ambient temperature.
θJA is the package junction to ambient thermal resistance.
(3)
TI recommends to limit ULN2803A IC’s die junction temperature to <125°C. The IC junction temperature is
directly proportional to the on-chip power dissipation.
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9.2.3 Application Curves
13
12
11
10
9
8
7
6
5
4
3
2
1
0
-0.004
14
12
Output voltage - V
Output voltage - V
The following curves were generated with ULN2803A driving an OMRON G5NB relay – Vin = 5.0 V; Vsup= 12 V
and RCOIL= 2.8 kΩ
10
8
6
4
2
0
0.004
0.008
Time (s)
0.012
0
-0.004
0.016
D001
Figure 13. Output Response With Activation of Coil (Turn
On)
0
0.004
0.008
Time (s)
0.012
0.016
D001
Figure 14. Output Response With De-Activation of Coil
(Turn Off)
10 Power Supply Recommendations
This part does not need a power supply; however, the COM pin is typically tied to the system power supply.
When this is the case, make sure that the output voltage does not heavily exceed the COM pin voltage. This will
heavily forward bias the flyback diodes and cause a large current to flow into COM, potentially damaging the onchip metal or overheating the part.
11 Layout
11.1 Layout Guidelines
Thin traces can be used on the input due to the low current logic that is typically used to drive ULN2803A. Take
care to separate the input channels as much as possible, as to eliminate crosstalk. TI recommends thick traces
for the output, in order to drive high currents as desired. Wire thickness can be determined by the trace
material's current density and desired drive current.
Because all of the channels currents return to a common emitter, it is best to size that trace width to be very
wide. Some applications require up to 2.5 A.
11.2 Layout Example
1B
2B
1
3B
3
4B
5B
4
2
18
17
1C
2C
16
15
3C
4C
5C
14
6B
5
6
13
6C
7B
7
12
7C
8B
8
9
11
8C
10
COM
GND
GND
Figure 15. Package Layout
12
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12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
15-Oct-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
ULN2803ADW
ACTIVE
SOIC
DW
18
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
ULN2803A
ULN2803ADWG4
ACTIVE
SOIC
DW
18
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
ULN2803A
ULN2803ADWR
ACTIVE
SOIC
DW
18
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
ULN2803A
ULN2803ADWRG4
ACTIVE
SOIC
DW
18
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
ULN2803A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
15-Oct-2015
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jun-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
ULN2803ADWR
Package Package Pins
Type Drawing
SOIC
DW
18
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
24.4
Pack Materials-Page 1
10.9
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
12.0
2.7
12.0
24.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jun-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
ULN2803ADWR
SOIC
DW
18
2000
370.0
355.0
55.0
Pack Materials-Page 2
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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