Texas Instruments | Powering the NXP i.MX 8M Mini with the TPS65218D0 and LP873347 PMICs (Rev. B) | Application notes | Texas Instruments Powering the NXP i.MX 8M Mini with the TPS65218D0 and LP873347 PMICs (Rev. B) Application notes

Texas Instruments Powering the NXP i.MX 8M Mini with the TPS65218D0 and LP873347 PMICs (Rev. B) Application notes
Powering the NXP i.MX 8M Mini and Nano with the
TPS6521825 and LP873347 PMICs
null
LP873347
2.8 V to 5.5 V
BUCK0 (3A)
BUCK1 (3A)
3.3V (DCDC3)
LDO0 (300mA)
LDO1 (300mA)
i.MX 8M Mini, Nano
0.85 / 0.9 / 0.95 V
0.85 / 0.95 / 1.0 V
1.2 V
VDD_VPU, VDD_DRAM, VDD_GPU,
VDD_DRAM_PLL_0P8
VDD_ARM
VDD_MIPI_1P2
0.9 V
VDD_MIPI_0P9
TPS6521825
4
0.85 V
DCDC1 (1.8A)
IN_BIAS
IN_DCDCx
1.1 V
DCDC2 (1.8A)
3.3 V
DCDC3 (1.8A)
DCDC4 (1.6A) 1.8V
LDO1 (400mA)
IN_LDO
VDD_SOC, VDD_ANA_0P8, VDD_ARM_PLL_0P8,
VDD_USB_0P8, VDD_PCI_0P8
NVCC_DRAM
NVCC_xxx (3.3 V)
NVCC_xxx (1.8 V)
1.8 V
NVDD_ANAx_1P8, VDD_24M_XTAL_1P8,
VDD_DRAM_PLL_1P8, VDD_ARM_PLL_1P8,
VDD_USB_1P8, VDD_PCI_1P8,
VDD_MIPI_1P8
Regulators
IN_BU
DCDC5 (25mA)
CC
5V
DCDC6 (25mA)
0.8 V
VDD_SNVS_0P8
1.8 V
NVCC_SNVS_1P8
Backup (BU) Domain
*VDD_VPU not included in Nano
IN_LS2
LS2
IN_LS3
LS3
MIPI CSI/DSI
connectors
Load Switches 1-3
NOTE: DCDC5/6 are high-efficiency bucks for RTC
Figure 1. System Power Block Diagram
Can PMICs Be Changed?
Using a multi-rail power management IC (PMIC) for an
applications processor is common, but typically the
vendor recommends the PMIC that must be used for
each processor. Even if the suggested PMIC is not
ideal for the needs of the processor, often the
complexity makes it difficult to swap out the PMIC for
another solution. The purpose of this tech note is to
show that the TPS6521825 and LP873347 PMICs can
provide power for the i.MX 8M Mini and i.MX 8M Nano
processor.
Why the TPS6521825 and LP873347?
The TPS6521825 and LP873347 devices have an
input range from 2.8 to 5.5 V, making this solution
appropriate for applications powered from a 3.3-V or 5V DC supply or a Li-Ion battery. The LP873347 device
has two step-down converters that provide the
dynamic (0.85-V to 1.0-V) power rails required for the
ARM® and VPU/GPU/DRAM cores while two 300-mA
SLVAE95B – April 2019 – Revised December 2019
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LDOs provide power for MIPI. The TPS6521825
device has four step-down converters that generate
another 0.85-V rail for the SoC core, the 1.2 V (or
1.35-V) rail required for DDR4 (or DDR3L) memory, a
3.3-V rail required for I/Os, and a 1.8-V rail for
additional I/Os. A low-dropout (LDO) regulator
provides 1.8 V for the processor analog domain at up
to 400-mA. The TPS6521825 automatically sequences
these rails in the correct power-up sequence for the
i.MX 8M Mini and Nano processor.
How Do Designers Make the Switch?
The TPS6521825 output voltages and sequencing
order are determined by an EEPROM-backed register
map, which are pre-programmed to work with the
LP873347 to power the i.MX 8M Mini and Nano
processor. To order pre-programmed samples of the
TPS6521825RSLR and LP873347RHDR for the NXP
i.MX 8M Mini and Nano processor that match this tech
note, visit the TPS6521825 product folder and the
LP8733 product folder.
Powering the NXP i.MX 8M Mini and Nano with the TPS6521825 and
LP873347 PMICs
Copyright © 2019, Texas Instruments Incorporated
1
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Table 1. i.MX 8M Mini, Nano Power Requirements
TPS6521825 and LP873347 PMICs
i.MX 8M Mini, Nano processor
POWER-UP
SEQUENCE
POWER
SUPPLY
(OUTPUT)
OUTPUT
CURRE
NT [mA]
OUTPUT
VOLTAGE [V]
POWER SUPPLY (INPUT)
VOLTAGE RATING [V]
MAX CURRENT
[mA]
4
LP873347
Buck0
3000
0.85 / 0.9 (1) / 0.95
VDD_VPU (2), VDD_GPU, VDD_DRAM,
VDD_DRAM_PLL_0P8
0.805 (min), 0.9 (max) /
0.855 (min), 0.95 (max) /
0.9 (min), 1.0 (max)
2500
5
LP873347
Buck1
3000
0.85 / 0.95 (1) / 1.0
VDD_ARM
0.805 (min), 0.95 (max) /
0.9 (min), 1.0 (max) /
0.95 (min), 1.05 (max)
2200
10
LP873347
LDO0
300
1.2
VDD_MIPI_1P2
Minimum: 1.14
Maximum: 1.26
4
4
LP873347
LDO1
300
0.9
VDD_MIPI_0P9
Minimum: 0.855
Maximum: 1.0
256
3
TPS6521825
DCDC1
1800
0.85
VDD_SOC, VDD_ANA_0P8, Misc_0P8
Minimum: 0.805
Maximum: 0.9
1050
8
TPS6521825
DCDC2
1800
1.1 (1)
NVCC_DRAM
Minimum: 1.14
Maximum: 1.26
≈1500 (3)
9
TPS6521825
DCDC3
1800
3.3
NVCC_xxx (3.3 V)
Minimum: 3.0
Maximum: 3.6
IO Current
7
TPS6521825
DCDC4
1600
1.8
NVCC_xxx (1.8 V)
Minimum: 1.71
Maximum: 1.89
IO Current
6
TPS6521825
LDO1
400
1.8
VDD_ANAx_1P8, Misc_1P8
Minimum: 0.78
Maximum: 0.9
366
2
TPS6521825
DCDC5
25
0.8 (4)
VDD_SNVS_0P8
Minimum: 0.76
Maximum: 0.9
10
1
TPS6521825
DCDC6
25
1.8
NVCC_SNVS_1P8
Minimum: 1.62
Maximum: 1.98
3
N/A
TPS6521825
LS2/LS3
1820
5
MIPI CSI, MIPI DSI, other 5-V peripherals
N/A
≈900 (3)
(1)
(2)
(3)
(4)
This is the default value recommended for this design at power-up. VDD_VPU_GPU_DRAM and VDD_ARM require DVFS.
NVCC_DRAM also supports DDR4 (1.2 V) and DDR3L (1.35 V), which would require reprogramming the EEPROM register of the
TPS6521825 device for DCDC2.
VDD_VPU is not included in the i.MX 8M Nano. All other rails are still present.
The maximum current for this rail is not listed in the i.MX 8M Mini data sheet.
To generate 0.8 V for VDD_SNVS, a resistor divider is used to lower the output voltage of DCDC5.
Table 2. Adjacent Tech Notes
Processor
Title
i.MX 6Solo and 6DualLite
Powering the NXP i.MX 6Solo, 6DualLite with the TPS6521815 PMIC
i.MX 7Solo and 7Dual
Powering the NXP i.MX 7 Processor with the TPS6521815 PMIC
References
Texas Instruments, TPS6521825 Power Management IC (PMIC) for NXP i.MX 8M Mini Data Sheet
Texas Instruments, LP8733xx Dual High-Current Buck Converter and Dual Linear Regulator Data Sheet
Texas Instruments, Integrated Power Supply Reference Design for NXP i.MX 8M Mini Processor Design
Guide
NXP Semiconductors, i.MX 8M Mini Applications Processor Datasheet for Industrial Products
(IMX8MMIEC), Rev. 0.2, 04/2019
NXP Semiconductors, i.MX 8M Nano Applications Processor Datasheet for Industrial Products
(IMX8MNIEC), Rev. 0, 10/2019
0.1
Trademarks
ARM is a registered trademark of Arm Limited.
All other trademarks are the property of their respective owners.
2
Powering the NXP i.MX 8M Mini and Nano with the TPS6521825 and
LP873347 PMICs
SLVAE95B – April 2019 – Revised December 2019
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Revision History
www.ti.com
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (April 2019) to A Revision .......................................................................................................... Page
•
Updated part number from LP8733D to LP873347
..................................................................................
1
Changes from A Revision (October 2019) to B Revision ............................................................................................... Page
•
•
•
Updated part number from TPS65218D0 to TPS6521825 .......................................................................... 1
Updated Block Diagram based on completed design ................................................................................ 1
Updated i.MX 8M Mini Power Requirements Table based on completed design ................................................ 2
SLVAE95B – April 2019 – Revised December 2019
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Copyright © 2019, Texas Instruments Incorporated
Revision History
3
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