Texas Instruments | UCC24610 and UCC24612 SR Range Extension | Application notes | Texas Instruments UCC24610 and UCC24612 SR Range Extension Application notes

Texas Instruments UCC24610 and UCC24612 SR Range Extension Application notes
Application Report
SLUA860 – February 2018
UCC24610 and UCC24612 Synchronous Rectifier Range
Extension Guide
Davit Khudaverdyan
ABSTRACT
The UCC24610/12 are high-performance controllers and drivers for standard and logic-level N-channel
MOSFET power devices used for low-voltage secondary-side synchronous rectification. This guide will
demonstrate how to extend the operating range of the UCC24610 from the datasheet’s typical application
configuration and show the range that the UCC24612 offers. The datasheet of the UCC24610 only shows
how to configure the device ground referenced for a 5-V output. This is not the case, as the device can be
configured on both high-side and low-side at output voltages beyond the absolute max of the device.
However, the UCC24612 has an extended drain voltage limit allowing it to be used in situations
considered out of range for the UCC24610.
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Contents
Purpose of the Synchronous Rectifier and UCC24610/12 Usage..................................................... 1
When to Use Which Controller ............................................................................................. 2
UCC24610 and UCC24612 Comparison ................................................................................. 2
VCC/VDD Extension Explained ............................................................................................ 2
UCC24610 in Typical 5V Output Configuration .......................................................................... 3
UCC24610/12 in Low-Side SR ............................................................................................. 4
UCC24610/12 in High-Side SR ............................................................................................ 5
UCC24610/12 in Low-Side SR with Bias Winding ...................................................................... 6
UCC24610/12 in High-Side SR with Bias Winding ...................................................................... 7
VD Extension Explained .................................................................................................... 8
UCC24610/12 in Low-Side SR with Extended VD Voltage ............................................................ 9
UCC24610 in Low-Side SR with Bias Winding with Extended VD Voltage ........................................ 10
UCC24610 in High-Side SR with Bias Winding with Extended VD Voltage ........................................ 10
Trademarks
All trademarks are the property of their respective owners.
1
Purpose of the Synchronous Rectifier and UCC24610/12 Usage
The synchronous rectifier (SR) MOSFET replaces the diode as the output rectifier, thereby drastically
reducing the conduction losses. The UCC24610/12 use drain-to-source voltage sensing, making them
ideal for isolated switch-mode power supplies, such as flyback and LLC topologies.
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When to Use Which Controller
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When to Use Which Controller
The UCC24610 is optimized for output voltages from 4.5 V to 5.5 V, but can be extended as shown in this
document, and offers a programmable false-triggering filter, a programmable timer to automatically switch
to light-load mode at light load, and a SYNC input for optional use in continuous conduction mode (CCM)
systems. Protection features on TON and EN/TOFF pins prevent run-away on-time due to open-circuit or
short-circuit fault conditions.
The UCC24612 offers proportional drive together with the CCM cycle limit pre-turn off to make the part
operate more reliably in CCM operations. The wide VDD voltage range allows the UCC24612 to support
up to 24-V applications without any range extension modifications. The 9.5-V gate driver clamping level
allows for minimum driving loss. The UCC24612 uses adaptive off-time control to improve the noise
immunity. This greatly simplifies the design effort and allows the controller be used in wide range of
application and frequency ranges.
Both devices can be used in either high-side or low-side configurations. Typically, low-side SR is simplest
and easiest to design, whereas high-side SR requires some design adjustments and extra circuitry.
Despite the complexity, high-side may be preferred due to its better EMI performance.
NOTE: This configuration guide should not be used in place of the datasheet, but in
conjunction with it for SR design.
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UCC24610 and UCC24612 Comparison
Both UCC24610 and UCC24612 use drain-source sensing to operate. While they have the same function,
their electrical specifications showcase important differences.
The absolute maximum ratings and recommended operating conditions for the UCC24612 has a wider
voltage range, broadening the range of applications initially not possible with the UCC24610.
Table 1. UCC24610 and UCC24612 Comparison
PARAMETER
DEVICE
MIN
MAX
VIN
VCC/VDD input
voltage
UCC24610
4.5
5.5
UCC24612
4
28
UCC24610
–1.0
50
UCC24612
–1.0
230
VD for IVD ≤ –10 mA
4
UNIT
V
V
VCC/VDD Extension Explained
UCC24610 has a very limited input voltage range, 4.5 V to 5.5 V, which makes it difficult to have any
outputs higher than range if the output of the system is tied to the input of the UCC24610, which is usually
the case. In order to overcome that limitation and extend the working range of the UCC24610 , small
additions are required in the biasing circuitry. The first method described in this application note is to add
an LDO voltage regulator from the output to the input of the device to provide proper biasing, as shown in
Figure 2 .However, depending on the output voltage of the system, the difference between the output
voltage and regulator voltage can lead to additional power losses.
To decrease losses from the LDO, an additional bias winding is added. This winding supplies the
synchronous rectifier device with a bias voltage rather than using the output voltage of the system. This
configuration is shown in Figure 6.
The UCC24612 has a larger input voltage range than the UCC24610 but the same biasing techniques
apply when the output voltage is out of the UCC24612's input range.
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UCC24610 in Typical 5V Output Configuration
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UCC24610 in Typical 5V Output Configuration
This is the standard TI low-side SR configuration, where VOUT is +5V and the drain of QSR ,VVD, is less than
50 Vpk.
VOUT
PRI
SEC
CBULK
COUT
QSR
AUX
T1
SGND
RTOFF
RTON
QPRI
SYNC
VCC
GND
EN/TOFF
TON
VS
GATE
RCS
VD
CVCC
UCC24610
PGND
Figure 1. UCC24610 in Typical 5V Output Configuration
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UCC24610/12 in Low-Side SR
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UCC24610/12 in Low-Side SR
In all of the following configurations, VD must be less than the VD absolute maximum voltage.
These configurations provide a bias voltage for the UCC24610/UCC24612 when the output voltage of the
system would not be appropriate to use.
UCC24610 in Low-Side SR:
VOUT
PRI
SEC
CBULK
COUT
DBIAS
QSR
AUX
CBIAS
RTON
QPRI
RTOFF
T1
SGND
LDO
+5V
SYNC
VCC
GND
EN/TOFF
TON
VS
VD
RCS
GATE
CVCC
UCC24610
PGND
Figure 2. UCC24610 in Low-Side SR
DBIAS is not actually necessary, but shown to complement the high-side arrangement.
UCC24612 in Low-Side SR:
The UCC24612 implementation for output voltage greater than 5 V does not require any additional
circuitry because the voltage operating ratings of the UCC24612 are higher than those of the UCC24610.
VOUT
COUT
QSR
CREG
SEC
PRI
QPRI
VD
VG
SGND
VS
REG
VDD
UCC24612
Figure 3. UCC24612 in Low-Side SR Configuration
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UCC24610/12 in High-Side SR
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UCC24610/12 in High-Side SR
UCC24610 in High-Side SR:
In this configuration DBIAS is necessary. During the on time of the primary switch, CBIAS will see a voltage
VOUT with respect to VSEC and will get charged. During the off time of the primary switch, the diode DBIAS will
prevent the capacitor from discharging.
This configuration may have excess VCC bias loss due to high voltage difference between VSEC and VOUT
placed on the LDO.
UCC24610
SYNC
VD
GATE
VS
TON
EN/TOFF
GND
VCC
CVCC
RTON
RTOFF
LDO
+5V
CBIAS
VOUT
QSR
PRI
DBIAS
SEC
CBULK
COUT
AUX
T1
SGND
QPRI
RCS
PGND
Figure 4. UCC24610 in High-Side SR
UCC24612 in High-Side SR:
The UCC24612 implementation for output voltage greater than 5 V does not require any additional
circuitry because the voltage operating ratings of the UCC24612 are higher than those of the UCC24610.
RBIAS
UCC24612
REG
CREG
VS
DBIAS
VDD
VG
VD
CVCC
VOUT
SEC
PRI
QSR
COUT
QPRI
SGND
Figure 5. UCC24612 in High-Side SR Configuration
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UCC24610/12 in Low-Side SR with Bias Winding
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UCC24610/12 in Low-Side SR with Bias Winding
This implementation reduces the VCC bias loss mentioned in Section 7 by using a winding to generate a
lower voltage for the LDO.
This configuration can also be used to bias the device when the output voltage would otherwise be too
low, such as in USB mobile charging applications where during a constant current under-voltage, the SR
controller is expected to operate down to 3.0V or similar.
UCC24610 in Low-Side SR with Bias Winding:
VOUT
T1
DBIAS
PRI
BIAS
SEC
CBULK
COUT
QSR
AUX
CBIAS
RTON
QPRI
RTOFF
T1
LDO
+5V
SGND
SYNC
VCC
GND
EN/TOFF
TON
VS
VD
RCS
GATE
CVCC
UCC24610
PGND
Figure 6. UCC24610 in Low-Side SR with Bias Winding
UCC24612 in Low-Side SR with Bias Winding in Low Output Voltages for Charging and USB
Applications:
VOUT
COUT
QSR
SEC
CREG
PRI
QPRI
VD
SGND
VS
VG
REG
VDD
UCC24612
CBIAS
BIAS
Figure 7. UCC24612 In Low-Side SR for Low Voltage Output for USB and Charging Applications
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UCC24610/12 in High-Side SR with Bias Winding
UCC24610 in High-Side SR with Bias Winding:
Like the configuration discussed in Section 8, this method uses a bias winding reduces the VCC bias loss
by using a winding to generate a lower voltage for the LDO.
This method can also be used to generate bias voltage when the output voltage is below the minimum
input voltage of the devices.
UCC24610
SYNC
VD
GATE
VS
TON
EN/TOFF
GND
VCC
CVCC
RTON
RTOFF
LDO
+5V
CBIAS
VOUT
QSR
SEC
CBULK
DBIAS
PRI
COUT
BIAS
T1
AUX
T1
SGND
QPRI
RCS
PGND
Figure 8. UCC24610 in High-Side SR with Bias Winding
UCC24612 in High-Side SR with Bias Winding:
DBIAS
BIAS
CREG
CVDD
UCC24612
REG
VS
VDD
VG
VD
VOUT
PRI
SEC
QSR
COUT
QPRI
Figure 9. UCC24612 in High-Side SR with Bias Winding
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VD Extension Explained
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VD Extension Explained
The next configurations are for the UCC24610 in situations where the peak VD voltage VVD > 50Vpk. In
these configurations RVS must be added to cancel the RDS(on) rating of QVD MOSFET and a clamping diode
is used to clamp VVD to VOUT. This is explained in more detail in section 8.2.2.1 in the UCC24610
datasheet.
Extending the drain sense pin voltage range is done by adding a voltage clamping circuit. When QSR in
Figure 10 is turned on, QVD is also turned on. QVD turns on because the VD and VS pins have a parasitic
diode inside the IC. When QSR is on, VD voltage is the VS voltage minus the forward drop on the parasitic
diode. This means that the QVD gate to source voltage is above the threshold, turning on the device. When
QSR is turned off, the source and drain voltage on QVD rise together. Therefore, when the source of QVD
reaches a voltage such that VGS < Vth of the MOSFET, it will be turned off. This circuit ensures that the VD
pin of the UCC24610 device will not see a voltage higher than VOUT – Vth. However, since the maximum
rated voltage of the VD on the UCC24610 is 50 V, there are limitations even with the clamping circuit.
The UCC24612 has a much larger maximum voltage on the VD pin: 230 V. For the same applications, the
UCC24612 will not require any additional clamping circuitry, but may need an additional voltage regulator
to receive the right biasing voltage.
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UCC24610/12 in Low-Side SR with Extended VD Voltage
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UCC24610/12 in Low-Side SR with Extended VD Voltage
The following implementation is the modified TI low-side SR configuration for extended VD, and restricts
the output voltage to 6.5 V < VOUT < 20 V. The VGS(max) rating of QVD generally limits this configuration to
VOUT < +20 V.
UCC24610 in Low-Side SR with Extended VD Voltage:
VOUT
PRI
SEC
CBULK
COUT
QSR
AUX
CBIAS
RTOFF
RTON
RVS
DVD
QPRI
QVD
T1
LDO
+5V
SGND
SYNC
VCC
GND
EN/TOFF
TON
VS
VD
RCS
GATE
CVCC
UCC24610
PGND
Figure 10. UCC24610 in Low-Side SR with Extended VD Voltage
UCC24612 in Low-Side SR with High Output Voltage:
The UCC24612 VD pin has a maximum voltage rating of 230 V, compared to the 50 V of the UCC24610.
Therefore, the output voltage can range much higher than the UCC24610 without having to use a voltage
clamping circuit.
In situations where the output voltage is far greater than the VDD range of the UCC24612, maximum 28
V, similar techniques discussed earlier to extend the VDD range of the UCC24610 can be applied here as
well.
VOUT
COUT
CREG
PRI
QPRI
VD
VG
DBIAS
QSR
SEC
SGND
VS
REG
GND
VDD
UCC24612
VIN
LDO
+28V
VOUT
CBIAS
Figure 11. UCC24612 in Low-Side SR with High Output Voltage
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UCC24610 in Low-Side SR with Bias Winding with Extended VD Voltage
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UCC24610 in Low-Side SR with Bias Winding with Extended VD Voltage
The bias winding in this configuration keeps the LDO input and QVD gate voltage at reasonable levels and
minimizes losses. The VGS(max) rating of QVD generally limits this configuration to VOUT < +20V.
UCC24610 in Low-Side SR with Bias Winding with Extended VD Voltage:
VOUT
T1
DBIAS
PRI
BIAS
SEC
CBULK
COUT
QSR
AUX
CBIAS
RTOFF
RTON
RVS
DVD
QPRI
QVD
T1
SGND
LDO
+5V
SYNC
VCC
GND
EN/TOFF
TON
VS
VD
RCS
GATE
CVCC
UCC24610
PGND
Figure 12. UCC24610 in Low-Side SR with Bias Winding and Extended VD Voltage
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UCC24610 in High-Side SR with Bias Winding with Extended VD Voltage
The bias winding in this configuration keeps the LDO input and QVD gate voltage at reasonable levels and
minimizes losses. The VGS(max) rating of QVD generally limits this configuration to VOUT < +20V.
UCC24610 in High-Side SR with Bias Winding with Extended VD Voltage:
UCC24610
SYNC
VD
GATE
VS
TON
EN/TOFF
GND
VCC
CVCC
DVD
QVD
RVS
RTON
RTOFF
LDO
+5V
CBIAS
VOUT
QSR
SEC
CBULK
DBIAS
PRI
COUT
BIAS
T1
AUX
T1
SGND
QPRI
RCS
PGND
Figure 13. UCC24610 in High-Side SR with Bias Winding and Extended VD Voltage
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