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Texas Instruments Achieving a clean startup by using a DC/DC converter with a precise enable-pin t Application notes
Analog Design Journal
Power
Achieving a clean startup by using a DC/DC
converter with a precise enable-pin threshold
By Chris Glaser
Senior Applications Engineer, Member Group Technical Staff
Introduction
pin and turns off. An EN pin has either a “loose” threshold voltage or a “precise” threshold voltage, each of
which has different application considerations. Table 1
shows an example of a loose threshold voltage from the
TPS62130A data sheet. Table 2 shows an example of a
precise ­threshold voltage from the TPS62136 data sheet.
The typical EN-pin threshold-voltage values in Tables 1
and 2 show how much hysteresis is present on the
EN-pin input. Hysteresis is important in order to avoid
on/off oscillations that may occur with a very slow ramp
rate on the EN signal.
Table 3, from the TPS62740 data sheet, shows another
way to write a loose EN-pin threshold voltage. While the
values shown are in opposite columns, compared to
Table 1, the meaning is the same: the EN pin must be
driven above 1.1 V to ensure that the converter reads a
logic-high level and driven below 0.4 V to ensure that the
converter reads a logic-low level. The integrated circuit
(IC) might read any voltage between VIH and VIL as
either a logic high or logic low. Since this area between
the high and low levels is very large, this is a loose
EN-pin threshold-voltage specification. Table 1 describes
what voltage the application must apply, whereas Table 3
describes the actual voltage-threshold level inside the IC.
In many applications, the various DC/DC converters in a
given system need to start up at a specific supply voltage.
For example, industrial applications that draw power
either from a 4–20-mA current loop or from energy
harvesting must have sufficient energy stored in the input
capacitance before the DC/DC converter turns on. In the
absence of sufficient energy, the in-rush current that the
converter draws during startup may pull the input voltage
down too low and cause the system or converter to reset.
In a worst-case scenario, the system never starts at all.
Most DC/DC converters contain an enable (EN) pin
input that is used to overcome this startup behavior. This
article explains some common EN-pin threshold specifications found in device data sheets and describes several
application circuits that provide a clean startup, with or
without using a converter with a precise EN-pin threshold.
Enable pin specifications
Fundamentally, an EN pin is a digital input that turns a
DC/DC converter on or off. When the EN pin’s voltage is
above a logic threshold, most often called VIH, the
converter detects a logic high at the pin and turns on.
When the EN pin’s voltage is below a logic threshold, most
often called VIL, the converter detects a logic low at the
Table 1. The TPS62130A has a loose EN-pin threshold voltage
PARAMETER
TEST CONDITIONS
MIN
TYP
0.9
0.65
MAX
UNIT
CONTROL (EN, DEF, FSW, SS/TR, PG)
VH
High level input threshold voltage (EN, DEF, FSW)
VL
Low level input threshold voltage (EN, DEF, FSW)
V
0.45
0.3
V
MIN
TYP
MAX
UNIT
Table 2. The TPS62136 has a precise EN-pin threshold voltage
PARAMETER
TEST CONDITIONS
CONTROL (EN, SS/TR, PG, MODE, VSEL)
VIH
Input threshold voltage for EN pin; rising edge
0.77
0.8
0.83
V
VIL
Input threshold voltage for EN pin; falling edge
0.67
0.7
0.73
V
MIN
TYP
MAX
UNIT
1.1
V
Table 3. The TPS62740 has a loose EN-pin threshold voltage
PARAMETER
TEST CONDITIONS
INPUTS EN, CTRL, VSEL 1-4
VIH_TH
High level input threshold
2.2V ≤ VIN ≤ 5.5V
VIL_TH
Low level input threshold
2.2V ≤ VIN ≤ 5.5V
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Analog Design Journal
Using the EN pin to achieve a clean
startup
Proper use of the EN pin solves many
common startup behaviors that are problematic for different types of systems:
• Systems powered from current-limited
sources may get stuck in their startup
state.
• Systems with a slowly rising input voltage
may be sensitive to an output-voltage rise
time that’s too slow.
• Other systems may not be tolerant of
wide variations in startup timing, which
arise from a loose-control EN pin combined with a resistor-capacitor (RC) delay
circuit.
Converter startup analysis for three
scenarios
Power
Figure 1. A current-limited system can get
stuck in hiccup during startup
V IN (1 V/div)
1
I IN (10 mA/div)
4
V OUT (1 V/div)
3
Time (1 ms/div)
1. Converter stuck in its startup
A common outcome for current-limited
systems, such as 4-20-mA current loops and
Figure 2. A current-limited system requires a precise
energy harvesting, is for the converter to get
EN-pin threshold voltage for proper startup
stuck in startup and then hiccup as it tries to
bring the output voltage from 0 V into regulation. This occurs because the converter
draws a relatively high in-rush current during
V IN (10 V/div)
startup, which is almost always greater than
the output power of current-limited systems.
This in-rush current causes the input voltage
1
to drop suddenly, which trips the undervoltLoop Current
age lockout (UVLO) of the converter, causing
(2.5 mA/div)
it to turn off. With the in-rush current gone,
2
the input voltage rises back up, and the
converter restarts. Now, the converter draws
in-rush current again and the system shuts
back down.
Load Current
Figure 1 shows an example of hiccup oper(20 mA/div)
ation using the TPS62125 powered through a
current-limited input supply and not using its
4
EN pin. The output voltage never reaches its
3.3-V set point.
V OUT (5 V/div)
A simple solution to this challenge is to use
3
a converter with a precise EN-pin threshold
voltage. When using the TPS62125’s EN pin,
the input voltage rises up to the programmed
Time (500 ms/div)
VIH level, which is well above the converter’s
UVLO level.[1] This stores enough energy in
the input capacitance to supply the in-rush
current.
application, the input voltage is allowed to hiccup around
Figure 2 shows that although the input voltage still
the maximum power point (MPP) in order to operate an
drops, the drop does not trip the UVLO circuit, which
energy harvester, such as a solar panel, at its peak output
enables the DC/DC to keep operating and start up
power. Reference 2 details an example with the TPS62125.
properly.
A precise EN-pin threshold voltage is also useful for
simple maximum-power-point tracking (MPPT). In this
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2. Output voltage rising too slowly
For systems with a slowly rising input
voltage, the output voltage may also rise too
slowly and violate the ramp-time requirement of the load, such as a microcontroller
(MCU). The output voltage rises too slowly
when set above the converter’s UVLO level
and the input voltage slew rate is slower
than the programmed soft-start time. In this
case, a slow input-voltage ramp enables the
converter properly, but instead of ramping
up within the set soft-start time, the output
voltage ramps up with the input voltage’s
rise time.
Figure 3 shows that the converter, a
TPS62136 set to a 3.3-V output, enters
100% mode (circled in red) during startup
and has a very long total startup time.
Entering 100% mode during startup indicates that the converter is trying to create a
faster output voltage ramp but cannot,
because the input voltage is insufficient.
The output voltage ramp is faster when
using the EN pin to enable the converter
once the input voltage reaches a higher
voltage. Figure 3 also shows the resulting
different output voltage ramp times when
given the same input voltage ramp.
Power
Figure 3. A precise EN-pin threshold voltage allows a proper
soft-start time in systems with a slowly rising input voltage
100% Mode
V IN(2 V/div)
321
VOUT (2 V/div) –
No Precise EN-Pin Threshold
VOUT (2 V/div) –
Precise EN-Pin
Threshold
Time (5 ms/div)
Figure 4. An RC delay circuit delays the startup of a converter
relative to the input voltage, but is not precise
V IN(2 V/div)
3. Variations in startup timing
Multi-rail systems frequently require
0.9 V
sequencing the startups of various DC/DC
converters. Sequencing allows the input
voltage or another system rail to be fully up
at its nominal voltage before the startup of
the next converter. Separating the startups
0.3 V
like this reduces the total in-rush current
EN
Start-Up Delay
that the system demands. Specific loads,
(200 mV/div)
Variation
such as processors and field-programmable
321
gate arrays (FPGAs), typically require
VOUT (1 V/div)
sequencing of their numerous supply
voltages.
Time (5 ms/div)
While connecting the power good (PG)
output of the first converter to the EN input
capacitor, as well as the EN-pin threshold voltage, this
of the next converter is the simplest method to achieve
delay time is not precise and varies widely. Figure 4 shows
sequencing, it may not always be possible for a variety of
the startup of the TPS62130A with an RC delay circuit,
reasons. The first converter may not have a PG output. Or
where the converter starts at its typical 0.65-V, EN-pin
the pull-up voltage of the PG signal may not be high
threshold voltage. The horizontal cursors show the 0.3-V
enough for the second converter’s EN pin. Finally, using
and 0.9-V logic levels, VIL and VIH. The vertical cursors at
the PG output of the previous converter is impossible for
these points show the possible variation in startup delay
the first converter in the startup sequence. In all of these
time from the loose threshold voltage. The time between
cases, using an RC delay circuit is frequently used to delay
these cursors does not include any variation from the
the startup of converters and provide very basic
resistor and capacitor, which would affect the slope of the
sequencing.
EN signal and create an even wider startup-delay time
An RC delay slows the voltage applied to the EN pin,
variation.
relative to the input voltage or another system rail.
However, because of the tolerances of the resistor and
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Conclusion
The TPS62136 is newer than the TPS62130A shown in
Figure 4. The TPS62136 provides the same basic input
voltage range and output current, but with improved
performance, such as a smaller solution size, a higher
output current, a more accurate output voltage and a
precise EN-pin threshold. The precise EN-pin threshold
voltage removes much of the variation inherent in RC delay
circuits, greatly improving their startup timing accuracy.
Using a simple resistive voltage divider from the input
voltage to the EN pin is not a robust solution for achieving
startup delays for devices with a loose EN-pin threshold
voltage. When properly setting the divider ratio to ensure
that the device always starts—based on the input voltage’s
lowest tolerance and highest VIH level—the divider gives
very little delay when an EN-pin threshold voltage occurs
near the VIL level.
Various applications, such as those powered from a
current-limited source or sources with a slow ramp time,
require special startup considerations. Often, the DC/DC
converter must start up at a certain level to achieve
proper system operation.
To determine the best way to alleviate a startup
concern, it is important to understand the type of EN-pin
threshold voltage specification—precise or loose—for a
specific converter. A converter with a precise EN-pin
threshold voltage, or a discrete SVS, overcomes many
startup issues in industrial systems.
References
1. Chris Glaser, “Harnessing wasted energy in 4- to 20-mA
current-loop systems,” Texas Instruments Analog
Applications Journal (SLYT488), 4Q 2012.
2. Chris Glaser, “Easy solar-panel maximum-power-point
tracking for pulsed-load applications,” Texas Instruments
Analog Applications Journal (SLYT478), 3Q 2012.
Using an SVS to achieve a clean startup
A supply voltage supervisor (SVS) is a discrete IC that
monitors a voltage relative to a precise programmed
threshold. SVSs monitor critical system voltages and
assert a fault if the voltage exceeds certain limits; they
also provide proper startups and shutdowns of some
subsystems. In addition to the precise threshold voltage,
some SVSs incorporate fixed or programmable startup
delay times. A discrete SVS such as the TPS3890 is useful
when an application requires a specific converter and a
precise startup level, but this particular converter does
not have a precise EN-pin threshold voltage. A discrete
SVS is used in the same way as a precise EN-pin threshold
in the three examples shown in this article.
Texas Instruments
Related Web sites
Product information:
TPS62130A
TPS62136
TPS62125
TPS62740
TPS3890
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