Texas Instruments | Short-Circuit Reliability Test for TPS7B4250-Q1 | Application notes | Texas Instruments Short-Circuit Reliability Test for TPS7B4250-Q1 Application notes

Texas Instruments Short-Circuit Reliability Test for TPS7B4250-Q1 Application notes
Application Report
SLVA851 – November 2016
Short-Circuit Reliability Test for TPS7B4250-Q1
Xing Su
ABSTRACT
The tracking LDOs are widely used as short-circuit protection devices for off-board sensor power supply in
automotive systems. Therefore, the robustness of the device under repetitive short-circuit stress is crucial
for the entire system. The AEC Q100-012 is the most recognized qualification certificate in industry, which
specifies the reliability of this type of device.
This application report describes the AEC Q100-012 specification and provides the test method and
results for the TPS7B4250-Q1 device, a tracking LDO from Texas Instruments.
1
2
3
Contents
AEC Q100-012 Introduction ................................................................................................ 2
Short-Circuit Test of TPS7B4250-Q1 ..................................................................................... 2
References .................................................................................................................. 12
List of Figures
1
Equivalent Test Circuit for High Side Devices ........................................................................... 2
2
Timing Diagram of Cold Repetitive Short Circuit—Short Pulse
3
4
5
6
7
8
9
10
11
12
....................................................... 4
Typical Timing Diagram for Cold Repetitive Short-Circuit Device Signals ........................................... 5
Typical Timing Diagram for Hot Repetitive Short-Circuit Device Signals ............................................ 6
System Block Diagram ...................................................................................................... 6
Instruments ................................................................................................................... 7
Oven Board ................................................................................................................... 7
PWM Waveform on ADJ/EN Pin (AEC Q100-012 3.4.1 Testing) ..................................................... 8
Zoomed PWM Waveform on ADJ/EN Pin (AEC Q100-012 3.4.1 Testing) .......................................... 9
PWM Waveform on ADJ/EN Pin (AEC Q100-012 3.4.2 Testing) .................................................... 10
Zoomed PWM Waveform on ADJ/EN Pin (AEC Q100-012 3.4.2 Testing) ......................................... 10
Output Current Waveform of TPS7B4250-Q1 With VOUT Short to GND .......................................... 11
List of Tables
1
Output Impedance ........................................................................................................... 3
2
Test Requirements Summary .............................................................................................. 3
3
Grade Level Table
4
.........................................................................................................
Test Result Summary ......................................................................................................
12
12
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AEC Q100-012 Introduction
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1
AEC Q100-012 Introduction
1.1
Introduction
The Automotive Electronics Council (AEC) provides the AEC Q100-012 documentation, which specifies
the short-circuit reliability test. The main purpose of this test is to determine the reliability of tracking LDO
when operating in a continuous short-circuit condition. The AEC Q100-012 specification includes an
equivalent test circuit, detailed test conditions, different reliability grade definitions, and other information.
1.2
Equivalent Test Circuit
Figure 1 shows the basic equivalent test circuit for a high-side device. The high-side device performs the
repetitive short-circuit tests. The RSUPPLY and LSUPPLY are the input impedance from the voltage source side
(VBB), and the RSHORT and LSHORT are the output impedance from the module board and the cables.
LSUPPLY
5 µH
Ideal
DC voltage
source
+
14 V
±
RSUPPLY
10 PŸ
Control
system
LSHORT
VBB
OUT
RSHORT
ON/OFF
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 1. Equivalent Test Circuit for High Side Devices
2
Short-Circuit Test of TPS7B4250-Q1
2.1
Test Conditions
2.1.1
Supply Voltage
The supply is modeled by an ideal voltage source, VBAT, which is 14 V ±2%.
2.1.2
Input Impedance
Considering the cable and device connection, a total resistance of RSUPPLY = 10 mΩ ±20% and an
inductance of LSUPPLY = 5 μH ±20% are specified.
2.1.3
Output Impedance
The short circuit can occur anywhere on the output cable from the device to the load. Therefore, the
output impedance may vary according to the cable length and diameter. Two types of short-circuit
conditions are specified in the AEC Q100-012: the module terminal-direct short circuit and the long short
circuit with an unassigned cable. For the terminal short circuit, AEC Q100-012 specifies that the module
terminal, RSHORT is 20 mΩ, and the parasitic inductance is smaller than 1 μH.
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For the long short circuit, the specification assumes that the harness inductance is 1 μH/m, and specifies
that the length is shorter than 5 m. Table 1 lists the output impedance parameters of the two the shortcircuit types. The short-circuit current is specified by the internal current-limit value of the device. Based
on the different current range, different impedance values are provided.
Table 1. Output Impedance
SHORT CIRCUIT TYPE
Terminal short circuit
DESCRIPTION
RSHORT (mΩ) ±20%
LSHORT (µH) ±20%
20
<1
110 – RSUPPLY
5
Short at load, 20 A < ISHORT ≤ 100 A
100
5
Short at load, ISHORT > 100 A
50
5
Short at module
Short at load, ISHORT ≤ 20 A
Long short circuit
The short-circuit current of the TPS7B4250-Q1 device is smaller than 20 A. Therefore, RSHORT is 100 mΩ
and LSHORT is 5 μH.
2.2
Test Items
Based on the different application cases, three test modes are defined in the AEC Q100-012 specification
to verify the reliability of the device. Table 2 lists the detailed ambient temperature, pulse duration, and
cycle numbers.
Table 2. Test Requirements Summary
TEST ITEMS
Cold repetitive short-circuit test
Hot repetitive short-circuit test
2.2.1
TEST CONDITION
TEST CYCLES
Short pulse
–40°C, 10-ms pulse, cool down
100k
Long pulse
–40°C, 300-ms pulse, cool down
100k
25°C, keeping short
100k
Cold Repetitive Short Circuit—Short Pulse
This test must be performed for all devices with status feedback, and for latching devices even if they
provide no status feedback.
Cold repetitive short circuit testing refers to the condition of complete cooling between consecutive pulses.
The smart power device is placed into short-circuit mode and turned on according to Table 1, and turned
off with a delay of 10 ms (±20%) after receiving a status feedback or going into shutdown. The short pulse
is intended to simulate a fast reaction of the system/microcontroller.
The time between the shutdown and the next activation must be long enough to ensure complete cooling
down to the device test temperature. This sequence is repeated until a failure of the device is detected.
The number of cycles to failure is recorded for statistical evaluation.
This test allows for the comparison of device performance without significant impact of boundary
conditions. Latching devices need only be tested under the short pulse condition, even if they provide no
status feedback as the long pulse test yields no difference in performance and the hot repetitive test is not
feasible.
Even though the TPS7B4250-Q1 is a device without status feedback or latch, this application report still
covers the short pulse test based on customer requirement and it passed the test.
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ON
Control
signal
OFF
Turnoff delay:
10 ms
300 ms
OK
Status
feedback
FAULT
Shutdown due to
(thermal) overload
Short-circuit
current
0
Figure 2. Timing Diagram of Cold Repetitive Short Circuit—Short Pulse
2.2.2
Cold Repetitive Short Circuit—Long Pulse
This test must be performed for all auto-restart devices.
The smart power device is placed into short-circuit mode and turned on according to Table 1, and turned
off with a delay of 300 ms (±10%) after receiving a status feedback (see Figure 3). If the device does not
have status feedback, the device is to be turned off after 300 ms. The long pulse is intended to simulate a
delayed reaction of the system or microcontroller.
The time between consecutive long pulses must be long enough to ensure the device cools sufficiently to
reach –40°C for TPS7B4250-Q1. This sequence is repeated until a failure of the device is detected. The
number of cycles to failure is recorded for statistical evaluation.
This test is representative of actual working conditions with a worst-case reaction time of the
microcontroller. Boundary conditions can partially affect the rate of cooling.
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ON
Control
signal
OFF
Turnoff delay:
10 ms
300 ms
OK
Status
feedback
FAULT
Shutdown due to
(thermal) overload
Short-circuit
current
0
Figure 3. Typical Timing Diagram for Cold Repetitive Short-Circuit Device Signals
2.2.3
Hot Repetitive Short Circuit
The short pulses in the cold repetitive short-circuit scenario is the target for fault cases in applications with
a microcontroller. However, some cases occur where the commands of the microcontroller return without
any action or in applications without a microcontroller. In these cases, the hot repetitive short-circuit test is
required. The enable signal remains active during a hot repetitive short-circuit. The device quickly enters
thermal shutdown cycling then remains in the auto-retry mode with repetitive thermal cycling. A cooldown
period for the device is not required. The hot repetitive test can depend on boundary conditions, but it is
an important test as it allows evaluating how much time the device can support a short circuit if the system
or microcontroller is not reacting. Also, the temperature variation occurs only at the first cycle and
therefore room temperature at 25°C is acceptable.
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ON
Control
signal
OFF
OK
Status
feedback
FAULT
Short-circuit
current
0
Figure 4. Typical Timing Diagram for Hot Repetitive Short-Circuit Device Signals
2.3
Block Diagram
The AEC Q100-012 standard requires at least 30 devices for a sufficient sample size. To ensure three test
lots running in parallel, the system should accommodate a maximum of 40 devices under test (DUTs)
simultaneously. All units have been tested for 100k cycles without any damage and parameter shift, which
could meet the Grade C requirement.
VIN
14-V VBAT
TPS7B4250
VOUT
ADJ/EN
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 5. System Block Diagram
2.4
Test Setup
Three main sections are implemented in the test control system. These sections include the power and
driver boards, the oven and the oven board, and the PC host system.
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Figure 6. Instruments
Figure 7. Oven Board
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2.5
2.5.1
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Test Procedure
Testing 1: Cold Repetitive Short-Circuit Test—Short Pulse
Testing 1 is tested according to section AEC Q100-012 3.4.1 with the following testing conditions:
1. The input of TPS7B4250-Q1 is connected to a 14-V battery with a 100-µF capacitor applied between
VIN and GND.
2. VOUT of TPS7B4250-Q1 is short to GND.
3. A PWM waveform is applied at the ADJ/EN pin with 10 ms ON and 990 ms OFF. The 990 ms OFF is
for the device to cool down (see Figure 8 and Figure 9). Figure 8 shows that the output current
waveform is the same for every cycle with a 420-mA maximum transient current, which indicates that
the device has completely cooled down.
Figure 8. PWM Waveform on ADJ/EN Pin (AEC Q100-012 3.4.1 Testing)
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Figure 9. Zoomed PWM Waveform on ADJ/EN Pin (AEC Q100-012 3.4.1 Testing)
2.5.2
Testing 2: Cold Repetitive Short-Circuit Test—Long Pulse
Testing 2 is tested according to section AEC Q100-012 3.4.2 with the following testing conditions:
1. The input of TPS7B4250-Q1 is connected to a 14-V battery with a 100-µF capacitor applied between
VIN and GND.
2. VOUT of TPS7B4250-Q1 is short to GND.
3. A PWM waveform is applied at ADJ/EN pin with 300 ms ON and 5700 ms OFF. The 5700 ms OFF is
for the device to cool down (see Figure 10 and Figure 11). Figure 11 shows that the output current
waveform is the same for every cycle with a 420-mA maximum transient current, which indicates that
the device has completely cooled down.
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Figure 10. PWM Waveform on ADJ/EN Pin (AEC Q100-012 3.4.2 Testing)
Figure 11. Zoomed PWM Waveform on ADJ/EN Pin (AEC Q100-012 3.4.2 Testing)
4. The bench is set up according to the schematic in Figure 5.
5. The testing is done in the chamber and ambient temperature is set to –40.3°C.
6. The entire testing period lasts for 170 hours, and the 10 units are tested on ATE after that. No damage
or parameter shift were found.
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2.5.3
Testing 3: Hot Repetitive Short-Circuit Test
Testing 3 is tested according to section AEC Q100-012 3.4.4 with the following testing conditions:
1. The input of TPS7B4250-Q1 is connected to a 14-V battery with a 2.2-µF capacitor applied between
VIN and GND.
2. VOUT of TPS7B4250-Q1 is short to GND.
3. VADJ/EN is connect to a 5-V power rail.
4. Room temperature, 25°C.
The output current waveform of TPS7B4250-Q1 is shown in Figure 12, which shows that the device is in
repeat thermal shutdown with about 13-ms periods.
The testing is lasted for one day which means more than 6M times thermal shutdown are triggered, after
testing the device on ATE, no damage was found
Figure 12. Output Current Waveform of TPS7B4250-Q1 With VOUT Short to GND
2.5.4
Pre-Test and Post-Test Data Check
Pre-test and post-test data are only checked for each device on the ATE. Any value outside of the device
specification listed in the data sheet is regarded as a test failure.
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2.6
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Results and Conclusion
Different grade levels are specified according to the pass cycles in the AEC Q100-012 specification.
Samples for short-circuit testing must be drawn from three independent lots. The sample size must be
large enough to ensure the statistical validity of the data. At least 10 samples per lot per test are
recommended. Table 3 lists the number of cycles and fails and lots for these grade levels.
Table 3. Grade Level Table
GRADE
NUMBER OF CYCLES
LOTS/SAMPLES PER LOT
NUMBER OF FAILS
A
> 1 000 000
3/10
0
B
> 300 000 – 1 000 000
3/10
0
C
> 100 000 – 300 000
3/10
0
D
> 30 000 – 100 000
3/10
0
E
> 10 000 – 30 000
3/10
0
F
> 3000 – 10 000
3/10
0
G
> 1000 – 3000
3/10
0
H
300 – 1000
3/10
0
O
< 300
3/10
0
Table 4 summaries the test results of the TPS7B4250-Q1 device, which are based on the previously listed
test conditions and setup. No failures were detected after the 100k stress for each of the three test items.
Table 4. Test Result Summary
TEST
PROCEDURE
LOTS/SAMPLES
PER LOT
TEMPERATURE
CYCLES
FAILURE
ATE TEST
Cold repetitive short
pulse
3/10
–40℃
1 000 000
0
Pass
Cold repetitive long
pulse
3/10
–40℃
1 000 000
0
Pass
Hot repetitive pulse
3/10
25℃
1 000 000
0
Pass
With the robust silicon, after the strict test following with AEC Q100-012, the results show that the
TPS7B4250-Q1 device fulfills 100k times of test without a failure. Therefore, the device is qualified as
Grade C, the highest short-circuit reliability certificate in the industry.
3
References
1. Automotive Electronics Council Component Technical Committee, AEC - Q100-012 - REVSHORT
CIRCUIT RELIABILITY CHARACTERIZATION OF SMART POWER DEVICES FOR 12V SYSTEMS
(Automotive Electronics Council, 2006)
2. Texas Instruments, Short-Circuit Reliability Test for Smart Power Switch (SLVA709)
3. Texas Instruments, TPS7B4250-Q1 50-mA 40-V Voltage-Tracking LDO With 5-mV Tracking Tolerance
(SLVSCA0)
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