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Texas Instruments Designing EMI/EMC Safe Battery Pack Application notes
Application Report
SLUA776 – July 2016
Designing EMI/EMC Safe Battery Pack
Creating a safe and reliable battery pack requires the use of monitoring and protection of battery cells.
Electronics for such monitoring and protection of battery packs needs to be designed so that it functions
satisfactorily in Electromagnetic Environment (EME) without introducing an excessive electromagnetic
disturbance to anything in that environment. This application note describes various paths at which the
noise can couple into the system, sources of such noise and ways to eliminate and reduce such
interference. This note also provides layout guidelines.
EMI/ EMC Definitions .......................................................................................................
Various Noise Sources ......................................................................................................
Coupling Paths in PCB ......................................................................................................
Common Impedance (Interference Due to Conduction) ................................................................
EMI/RFI Suppression........................................................................................................
Layout guidelines ............................................................................................................
EMI/ EMC Definitions
Electromagnetic emissions from a device or system that interfere with the normal operation of another
device or system; also referred to as Radio Frequency Interference (RFI).
EMI can be broadly classified into radiated and conducted emissions. Radiated emissions are conducted
out of the system on an antenna structure. Conducted emissions are the noise currents conducted out of a
system on the power or communication lines.
The ability of equipment or system to function satisfactorily in its Electromagnetic Environment (EME)
without introducing an intolerable electromagnetic disturbance to anything in that environment.
Noise Source
System that generates
electromagnetic disturbance
Coupling Path
System that is suceptible to
electromagnetic disturbance
Figure 1. Noise Source and Victim
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Various Noise Sources
Various Noise Sources
There are different sources of EMI/RFI noise in the real world. Some examples of the noise source include
electrical motors, cell phone communications, radio broadcasts, power lines, HVAC, washers, and dryers,
etc. Hence, it is at most important to understand the possible coupling paths for this EMI/RFI noise to
enter into the system and design the system to mitigate or reduce the coupling paths.
Coupling Paths in PCB
Broadly, the coupling paths can be classified as interference due to conduction, near-field coupling, and
far-field coupling. Below are the four different coupling paths in detail.
Inductive (Near-Field Coupling)
The inductive coupling, also called magnetic coupling, occurs when there two current loops are close to
each other. The magnetic field generated by one, the aggressor, induces a voltage in another, the victim,
and its magnitude depends on the mutual inductance and the rate at which the current is changing in the
aggressor conductor.
Figure 2. Inductive Coupling in Electric Circuit
Inductive Coupling increases by various factors such as close spacing between source and victim, large
source and victim circuit loop areas, high impedance victim circuits, parallel conductors or loops (twisted
pair fixes), high-frequency operation and high-current operation.
Capacitive (Near-Field Coupling)
Capacitive coupling, also called electric field coupling, occurs when the energy is coupled from one circuit
to another over an electric field. When two electrical lines with different potentials are close by, then a
virtual capacitor is formed between the two which causes the signal on one to couple with another.
Capacitive coupling increases with increase in voltage swing and also increases with higher frequency.
Figure 3. Capacitive Coupling in Electric Circuit
Cable shields could be used to fix low-frequency capacitive coupling.
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Coupling Paths in PCB
Radiative (Far-Field Coupling)
Radiative coupling, or far-field coupling, occurs when noise source and the device (victim) are separated
by a considerable distance, typically more than a wavelength. Noise source and victim act as radio
antennas, the noise source emits or radiates an electromagnetic wave which propagates across the open
space in between and is picked up or received by the victim.
Common Impedance (Interference Due to Conduction)
Common impedance coupling may occur when the noise generating source and the device susceptible to
noise have shared current return paths. An example of such coupling would be lights flickering when a
high voltage appliance is turned on.
Figure 4. : Circuit Showing Common Impedance Between Noise Source and Victim
In printed circuit boards common ground return paths are a good example of common impedance
coupling. A solid uncut ground plane minimizes the ground return paths, noise coupling, and reduces
inductive coupling.
EMI/RFI Suppression
In this section let’s look at various techniques which can be used to suppress EMI/RFI noise that couple
into the system.
EMI/RFI on power-lines
Common Mode Noise Filtering (Y Capacitor)
The noise which manifests identically on multiple power lines where the noise signal flows in the same
direction, in phase and returns through the ground is typically called common-mode noise.
Using a capacitor from either power line to chassis ground significantly reduces the common-mode noise.
However, when such a capacitor fails it can result in electrical shocks or fire which poses a special
requirement on the capacitors used. Such capacitors are called line-filtering capacitors or more popularly
Y Caps.
When a capacitor fails, it can either result in the open or short condition. If the capacitor used for commonmode noise filtering fails to open condition, then the device performs poorly due to lack of filtering.
However, in the case of a short condition, the power line is shorted to chassis ground and expose the
system for a possible electrical shock to the user. Hence, a Y-cap can be used which results in a known
fail condition and thus protecting the system from electrical shocks.
Differential Mode Noise Filtering (X Capacitor)
The noise which manifests on multiple power lines but not identical is called differential mode noise. Such
noise flows on one power lines and returns on another power line.
A suitable capacitor between power lines reduces the differential mode noise. Similar to common mode
filtering, these capacitors pose hazardous conditions in case the capacitors fail. When the capacitors fail in
open condition, there are no hazard conditions except for reduced device performance. Whereas a fail to
short condition, in this case, causes high current flow between the power lines resulting in a possible fire.
Hence, a X-Cap can be used between the power lines which results in a known fail condition and thus
protecting the system from causing fire.
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EMI/RFI Suppression
Monitoring and
Battery Stack/
Chassis Ground
Figure 5. Battery Pack with X and Y Capacitors
Use of X and Y cap in the battery packs have proved to eliminate noise on the coupled data
communication and power lines. This is a general recommendation for battery pack systems operating in
noisy environments and not specifically intended for Texas Instruments Battery monitoring and protection
IC's ( BQ76PL455A-Q1 or BQ76PL536A-Q1).
Classes of X and Y rated Capacitors
Safety Standards classify X and Y rated capacitors to different classes according to their rated voltage and
peak impulse voltage they can safely withstand. Peak Impulse voltage refers to the sudden rise in voltage
that may be caused by lightning or other power surges. We usually use the safety capacitors with voltage
rating more than double the expected voltage in our filtering applications. X and Y capacitors are available
in different classes based on peak pulse voltages. X capacitors are available in classes X1 to X3 and Y
capacitors are available in classes Y1 to Y4. Among these most commonly available classes are X1, X2,
Y1, and Y2. These capacitors are impulse tested (peak pulse voltage that can withstand) to 4kV, 2.5kV,
8kV, and 5kV respectively.
Chip/passive EMI suppression filters
A chip EMI suppression filter is an electronic component for providing electromagnetic noise suppression
for an electronic device and is used in conjunction with shields and other protection. This filter is used to
extract and remove the components that can cause electromagnetic noise from electric currents that are
conducted through the wire.
An example of chip EMI filter can be found here, which is a choke coil for attenuating noise up to several
hundred MHz frequency.
Ferrite Cable coke can be used to filter any noise that is coupled onto the outside of the cables and is
capacitively coupled to nearby signals.
Electromagnetic shielding
Electromagnetic shielding is a practice of surrounding electronic components and signal lines by
conductive or magnetic materials to reduce EM emissions and or susceptibility.
Broadly, there are four categories of shielding:
1. Electric-field shielding: Also known as Faraday shielding, is a conductive and grounded shield between
the noise signal source and the affected node. This type of shield eliminates noise by routing the noise
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Layout guidelines
current directly to ground. It is important to note that such shields must be grounded.
2. Low Frequency (LF)-Magnetic field shielding: Skin depth of conductive metals at low-frequency
magnetic fields are very high and hence need very thick blocks of metal to shield LF-magnetic fields.
Instead, special high magnetic permeability materials, like ferrite sheets, offer a very low resistance
path for the magnetic path to pass through it and thus effectively shield the magnetic fields from
entering the desired electronic system.
3. High Frequency (HF)-Magnetic field shielding: High-frequency magnetic fields can be shielded
effectively by using the conductive sheets as shields, as the skin depth at high frequency is low.
4. Shielded enclosures: Always assume that interference exists and use conducting enclosures to reduce
the electric and HF magnetic fields and use high permeable material enclosures to reduce LF magnetic
fields. This is a general recommendation for shielding, might not be applicable for designing battery
Layout guidelines
This section provides layout best practices for designing EMI-safe battery management system:
1. Minimizing loop areas is a good practice.
• Using a solid GND fill plane ensures the shortest possible current loop area
• Minimizing loop area minimizes inductive coupling path
Component A
Component B
Cut in GND Plane
Figure 6. Cut in Ground Plane
Component A
Component B
Uncut GND Plane
Figure 7. Solid Ground Plane
2. Minimize the length of traces carrying high-speed digital signals or clocks.
• High-speed digital signals and clocks are often the strongest noise sources.
• The longer these traces are, the more opportunities there will be to couple energy away from these
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Loop area is more important than trace length. Make sure that there is a good high-frequency
current return path very near to each trace.
3. Minimize the length of traces attached directly to connectors (I/O traces).
• Traces attached directly to connectors are likely paths for energy to be coupled on or off the board.
4. Signals with high-frequency content should not be routed beneath components used for the board I/O.
• Traces routed under a component can capacitively or inductively couple energy to that component.
5. All connectors should be located on one edge or one corner of a board.
• Connectors represent the most efficient antenna parts in designs.
• Locating them on the same edge of the board makes it much easier to control the common-mode
voltage that may drive one connector relative to another.
6. No high-speed circuitry located between I/O connectors.
• Even if two connectors are on the same edge of the board, high-speed circuitry located between
them can induce enough common-mode voltage to drive one connector relative to the other
resulting in significant radiated emissions.
7. Critical signal or clock traces should be buried between power/ground planes.
• Routing a trace on a layer between two solid planes does an excellent job of containing the fields
from these traces and prevents unwanted coupling.
8. Select active digital components that have maximum acceptable off-chip transition times.
• If the transition times of a digital waveform are faster than they need to be, the power in the upper
harmonics can be much higher than necessary.
• They can usually be slowed using series resistors or ferrites.
9. High-speed (or susceptible) traces should be routed at least 2X from the board edge, where X is the
distance between the trace and its return current path.
• The electric and magnetic field lines associated with traces very near the edge of a board are less
well contained. Crosstalk and coupling to and from antennas tend to be greater from these traces.
10. Differential signal trace pairs should be routed together and maintain the same distance from any solid
• Differential signals are less susceptible to noise and less likely to generate radiated emissions if
they are balanced (i.e. they have the same length and maintain the same impedance relative to
other conductors).
Component A
Component B
Figure 8. Matched Differential Pair Routing
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Layout guidelines
Component A
Component B
Figure 9. Unmatched Differential Pair Routing
11. Circuit boards with power and ground planes, no traces should be used to connect to power or
ground. Connections should be made using a via adjacent to the power or ground pad of the
• Traces on a connection to a plane located on a different layer take up space and add inductance
to the connection.
• If the high-frequency impedance is an issue, this inductance can significantly degrade the
performance of the connection.
12. There should be no gaps or slots in the ground plane.
• It is usually best to have a solid ground (signal return) plane and a layer devoted to this plane.
• Any additional power or signal current returns that must be DC isolated from the ground plane
should be routed on layers other than the layer devoted to the ground plane.
• However, a well-placed gap in the ground plane can protect circuits located in a particular region of
the board from low-frequency return currents flowing in the plane.
Digital Currents
Digital Circuit A
Digital Circuit B
Cut in GND Plane
Analog Circuit
Con A
Con B
Con C
Figure 10. Isolated Analog Section Using Cut in Ground Plane to Improve Performance
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Layout guidelines
Digital Circuit A
Con A
Analog Circuit
Digital Circuit B
Con B
Con C
Figure 11. High Frequency Digital Noise Induced in Analog Circuit
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