Texas Instruments | Cap Drop Offline Supply for E-Meters | Application notes | Texas Instruments Cap Drop Offline Supply for E-Meters Application notes

Texas Instruments Cap Drop Offline Supply for E-Meters Application notes
Application Report
SNVA735 – June 2015
Cap Drop Offline Supply for E-Meters
Akshay Mehta, Frank De Stasi
ABSTRACT
This design idea provides a simple non-isolated AC/DC power supply for low power applications such as
smart grid E-meter applications. The design uses a "capacitive-dropper" front-end combined with a
LM46000 SIMPLE SWITCHER® buck regulator from Texas Instruments. The circuit provides 3.3 V at a
minimum of 50 mA from a line supply of 90 VAC to 265 VAC. Theory of operation as well as design
equations and performance results are given.
1
2
3
4
Contents
Introduction ...................................................................................................................
Theory of Operation .........................................................................................................
Application Circuit and Plots................................................................................................
Conclusion ....................................................................................................................
1
3
5
9
List of Figures
1
Basic Schematic ............................................................................................................. 2
2
Voltage and Current Waveforms........................................................................................... 3
3
Voltage Ripple at VDC ........................................................................................................ 6
4
Application Schematic ....................................................................................................... 6
5
Load Regulation.............................................................................................................. 7
6
Max Output Current vs Line Voltage ...................................................................................... 8
7
Line Current Vs Line Voltage............................................................................................... 8
8
Actual Power and Apparent Power Vs Line Voltage .................................................................... 9
List of Tables
1
1
Application Requirements
..................................................................................................
6
Introduction
Many times a simple off-line power supply is required for low power applications such as E-meters.
Typically, the need is to convert the line voltage to a small DC value such as 3.3 V or 5 V. This can be
done with a line frequency power transformer or a complex AC/DC off-line power supply. Both approaches
have well known disadvantages of weight, size, and/or complexity. A better option is shown in Figure 1.
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1
Introduction
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IDC
VDC = VIN
VOUT
DC/DC
Converter
C1
IC
+ vC +
vLN
-
IOUT
+
vX
-
Zener
Clamps
+
CBULK
Figure 1. Basic Schematic
Here we first convert the line voltage to an intermediate unregulated DC rail (VDC) and then use a Wide VIN
range DC/DC converter to supply the load. The front-end is the well-known "capacitive-dropper". The
Zener diodes clamp the input voltage to the DC/DC converter under no-load conditions. The input voltage
to the DC/DC converter (VDC = VIN) is set to a relatively high value, so that the current required from the
"capacitive-dropper" can be kept low. For this design we use the LM46000 as the DC/DC converter and
VDC is set to 48 V. The LM46000 converts this down to 3.3 V. For a line voltage range of 90 VAC to 265
VAC, this design can supply at least 50 mA to the 3.3 V load. The high step-down ratio, possible with the
LM46000, allows the 50 mA load to appear as less as 5 mA load to the DC/DC. This permits a small value
of C1 to be used. See also SNVA733.
It is easy to see that this circuit is connected directly to the line supply and is not isolated. EXTREME
CAUTION must be used when experimenting with this design. The user must ensure that the intended
application for this power supply, including the load on the LM46000, is completely isolated from any
contact with grounded entities; including people, animals and test equipment. All safety precautions must
be observed when taking measurements. Test equipment with grounded inputs can not be used with this
circuit without proper isolation. The user is also responsible for any fusing, transient protection, and/or EMI
filtering required on the input to this circuit.
2
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Theory of Operation
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2
Theory of Operation
The idea behind this circuit is that the series capacitor C1 acts as a lossless resistance and the reactance
of the capacitor will set the maximum current that can be provided. Since a normal electrolytic capacitor
cannot handle the stresses resulting from the line voltage, we use "X"-type capacitors which would be
rated for the maximum line voltage in our range. From Figure 1 we can understand that the current IC
through the cap C1 would be flowing when there is a voltage differential across the capacitor. The
capacitor current would steadily increase while vLN is increasing. When the line voltage reaches the peak
voltage, C1 stops charging, because the slope of the differential voltage across it goes to zero. Figure 2
shows the relevant waveforms; where we have the following definitions:
vLN = line voltage
vC = C1 voltage
iC = C1 current
vX = Voltage at input of bridge rectifier
VLN = RMS line voltage
VDC = VIN = DC intermediate bus voltage and input voltage to DC/DC
VOUT = Output voltage of DC/DC
IOUT = Output current of DC/DC = user load current
VD = One diode drop
F = line frequency = 1/T
η = Efficiency of LM46000
T1 = Time during which the diode is forward biased.
vLN
vc
vx
T/2
T
0
T1
ic
Figure 2. Voltage and Current Waveforms
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Theory of Operation
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The peak capacitor current can be obtained as follows:
IP
2S ˜ F ˜ C1 ˜ VLN ˜ 2
(1)
Where,
IP = Peak C1 current
In the half wave implementation of the capacitive dropper circuit, the diode D1 will be turned off during the
negative half cycle of the line voltage. During that time the Zener diode will act as a regular diode and will
allow current flow. During the positive half cycle, the Zener diode will clamp the line voltage which is held
by the bulk capacitor. Since the negative half cycle of the line voltage is completely ignored, the current
delivered to the DC/DC regulator would be half that of the full wave implementation. E-Meter applications
using the cap drop implementation have an upper limit on the apparent power being pulled from the
mains. This app note uses 8 VA as the upper limit. The approximate value of capacitor C1 can be obtained
from that relationship as shown:
C1 #
VA
2
2 S ˜ F ˜ V LN
where
•
VA = VRMS* IRMS
(2)
At time T1 the Zener conducts current in the opposite direction acting as a regular diode. From observing
the waveforms in Figure 2, we can evaluate time T1 as follows:
T1
§
VDC VD
1
˜ cos 1 ¨ 1 ¨
2S ˜ F
VLN ˜ 2
©
·
¸
¸
¹
(3)
IRMS is the AC current flowing through the C1 capacitor. Substituting that and using the time T1 we can
calculate a more accurate equation for capacitor C1 as shown:
VA
C1
2
2 ˜ 2 ˜ F ˜ S ˜ VLN
˜ 0 . 5 T1 ˜ F 1
˜ sin 4 S ˜ T1 ˜ F
4S
(4)
Since the value of C1 is limited, the max current that can be delivered to the input of the DC/DC regulator
will also be limited. It is shown as follows:
IMAX
4
§
VDC
2 ˜ 2 ˜ F ˜ C1 ˜ VLN ˜ ¨ 1 ¨
2 ˜ 2 ˜ VLN
©
·
¸
¸
¹
Cap Drop Offline Supply for E-Meters
(5)
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Application Circuit and Plots
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3
Application Circuit and Plots
WARNING
CAUTION MUST BE USED IN THE CONSTRUCTION, TESTING, AND
USE OF THE CIRCUITS FOUND IN THIS DOCUMENT.
LETHAL VOLTAGES ARE PRESENT IN THESE CIRCUITS THAT
MAY CAUSE INJURY.
THE USER MUST ENSURE THAT SAFETY PROCEDURES ARE
FOLLOWED WHEN WORKING ON THESE CIRCUITS.
Let's look over some BOM calculations for the capacitor dropping circuit.
3.1
Dropping Capacitor
The dropping capacitor C1 is sized for the lowest line voltage thus ensuring that the load current is
maintained even at the worst case. For our design requirements and from Equation 4 the cap C1 is sized
to be about 0.39 µF rated for 375 VAC. Care must be taken to not oversize this capacitor. Oversizing this
capacitor would increase the apparent power drawn from the mains. This capacitor must be rated for the
highest peak line voltage.
3.2
Zener Diodes
In the half wave implementation as shown in the schematic, The LM46000 is rated for a maximum input
voltage of 60 V and a load current of 500 mA. Therefore VDC can be clamped at a high voltage of 48 V.
The Zener voltage established VDC. As shown in the schematic two Zener diodes of 24 V each have been
used in series to obtain a clamping voltage of 48 V. It is important to size the Zener diodes for the right
power requirement.
In this implementation, the Zener current will be equal to the IMAX current. At higher line voltages, the IMAX
increases and so does the Zener current. The power dissipating in the Zener will be a product of IMAX and
VDC.
3.3
Bulk Capacitor
A bulk electrolytic capacitor of 680 µF is used to hold the 48 V with low ripple voltage. Keeping the ripple
voltage on the intermediate rail low will also help with keeping the output voltage ripple low. Having
enough bulk capacitance is also important to maintain enough voltage at the input of converter in case of
a fast load transient at the output of the converter. A range of 470 µF to 680 µF was tested to be
appropriate. Figure 3 shows the voltage ripple at the input of the LM46000. The 680 µF cap results in
about a 200 mV ripple at 60 Hz. Since the ripple at VDC is at a relatively low frequency, it is important to
keep the ripple low because it cannot be filtered effectively by the inductor and the output capacitor of the
LM46000.
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100mV/div
5ms/div
Figure 3. Voltage Ripple at VDC
The newly released LM46000 Wide VIN DC/DC converter was interfaced with the "capacitive drop" frontend to obtain the schematic as shown in Figure 4.
120µH
L
2x 4.7µF
VIN = 48V
VIN
CIN
1.3MŸ
RENT
C1
A.C. Line Input
90Vrms to 265Vrms
Fusing,
Transient protection,
EMI filtering, etc.
0.39µF
310 VAC
LM46000
PGOOD
CBOOT
CBOOT
100kŸ
RENB
SS/TRK
24V
1W
CBULK
CBIAS
1µF
CFF
68pF
AGND
RFBT
1MŸ
FB
RT
SYNC
+ 680µF
63V
COUT 2x 47µF
0.47µF
BIAS
ENABLE
24V
1W
VOUT = 3.3V
SW
VCC
PGND
CVCC
2.2µF
RFBB
432kŸ
RT
200kŸ
Figure 4. Application Schematic
Table 1. Application Requirements
6
Parameter
Value
VLN
90 VAC to 265 VAC
VOUT
3.3 V
IOUT
50 mA at 120 VAC
η at 120 VAC and 50 mA
53 %
IRMS from line at 120 VAC
16.5 mA
Cap Drop Offline Supply for E-Meters
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Application Circuit and Plots
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The BOM for the LM46000 can be calculated for VIN of 48 V to VOUT of 3.3 V. The design can be obtained
from the datasheet for LM46000. The datasheet has detailed calculations for the entire BOM. The rising
UVLO threshold on the LM46000 was set to about 30 V. This helps with limiting the inrush currents and
potential voltage crash at the input of the converter. The resulting falling UVLO threshold is about 25 V.
For the application circuit shown in Figure 4 load regulation test was performed at 120 VAC line voltage.
At light loads, the LM46000 enters the PFM mode. In this mode the switching frequency is folded back to
improve the efficiency. In PFM operation, a small positive DC offset is required at the output voltage to
activate the PFM detector. This can be seen in Figure 5. Please refer to the datasheet for more
information.
3.39
3.385
Output Voltage (V)
3.38
3.375
3.37
3.365
3.36
3.355
3.35
0
0.01
0.02
0.03
0.04
0.05
0.06
Output Current (A)
Figure 5. Load Regulation
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0.14
Maximum Output Current (A)
0.12
0.1
0.08
0.06
0.04
0.02
0
50
75
100
125
150
175
200
225
250
225
250
Mains Voltage (VRMS)
Figure 6. Max Output Current vs Line Voltage
0.04
0.035
Mains Line Current (ARMS)
0.03
0.025
0.02
0.015
0.01
0.005
0
50
75
100
125
150
175
200
Mains Voltage (VRMS)
Figure 7. Line Current Vs Line Voltage
Because the capacitor C1 value is limited the max load that can be pulled is also limited. Figure 6 shows
the chart for the max load current capability of the design. Figure 8 shows the actual power and the
apparent power drawn from the mains for this design.
8
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Conclusion
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1
9
0.9
8
0.8
7
0.7
6
0.6
5
0.5
4
0.4
3
0.3
2
0.2
1
0.1
0
Input Power (W)
Input VA (VA)
10
Input VA
Input Power
0
50
75
100
125
150
175
200
225
250
Mains Voltage (VRMS)
Figure 8. Actual Power and Apparent Power Vs Line Voltage
4
Conclusion
The cap drop circuit is an easy cost effective approach for low load AC-to-DC conversion. Interfacing with
a Wide VIN DC/DC converter can be further useful to draw relatively higher loads at the output while
keeping the current drawn from the line low. A maximum of 130 mA can be obtained from the output of
the LM46000 at 240 VAC line voltage. While this circuit is easy to make, utmost care should be taken to
create a bench prototype and appropriate filtering and protection circuit should be added.
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