Texas Instruments | AN-2292 Designing an Isolated Buck (Fly-Buck) Converter (Rev. C) | Application notes | Texas Instruments AN-2292 Designing an Isolated Buck (Fly-Buck) Converter (Rev. C) Application notes

Texas Instruments AN-2292 Designing an Isolated Buck (Fly-Buck) Converter (Rev. C) Application notes
Application Report
SNVA674C – August 2012 – Revised December 2014
AN-2292 Designing an Isolated Buck (Fly-Buck) Converter
Vijay Choudhary
ABSTRACT
In many applications, one or more low-cost, simple to use, isolated power supplies working from input
voltages up to 100 V are needed. Traditional solutions use flyback converters to generate this bias supply.
Flyback designs typically utilize asymmetric transformers turns ratios for primary and secondary power
windings, with an optocoupler and reference, or an auxiliary winding for feedback regulation. Additionally,
flyback converters need an elaborate compensation design for stability. This results in a tedious design
process, bulky solution, with a higher component count and cost.
An isolated buck converter (Fly-Buck) uses a synchronous buck converter with coupled inductor windings
to create isolated outputs. Isolated converters utilizing Fly-Buck topology use a smaller transformer for an
equivalent power transfer as the transformer primary and secondary turns ratios are better matched.
There is no need for an optocoupler or auxiliary winding as the secondary output closely tracks the
primary output voltage, resulting in smaller solution size and cost.
This article presents the basic operating principle of an isolated buck converter. The operating current and
voltage waveforms are explained and design equations are derived. The design example shows a step-bystep procedure for designing a practical two-output 3 W isolated buck converter.
1
2
3
4
5
Contents
Fly-Buck Converter .......................................................................................................... 1
Maximum Output Current Equations ...................................................................................... 4
Design Example.............................................................................................................. 5
Conclusions ................................................................................................................. 10
References .................................................................................................................. 10
List of Figures
1
Complete Schematic for an LM5017–Based Isolated Converter ...................................................... 9
2
Efficiency at 750 kHz, VOUT1 = 10 V ........................................................................................ 9
3
Steady State Waveform (VIN = 48 V, IOUT1 = 100 mA, IOUT2 = 200 mA) ................................................ 9
4
Step Load Response (VIN = 48 V, IOUT1 = 0, Step Load on IOUT2 = 100 mA to 200 mA).
............................
9
..............................................................................
...........................................
5
List of Tables
1
1
Isolated Buck Regulator Design Equations
2
Component Calculation/Selection Steps for a Two-Output Isolated Buck
6
Fly-Buck Converter
An isolated buck converter, also known as Fly-Buck converter, is created by replacing the output filter
inductor (L1) in a synchronous buck converter with a coupled inductor (X1) or flyback-type transformer,
and rectifying the secondary winding voltage using a diode (D1) and a capacitor (COUT2). The topology can
be extended to any number of isolated secondary outputs. It also can be used to generate one or more
inverting outputs.
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Fly-Buck Converter
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VIN
SW
L1
VOUT
Q1
COUT
Q2
1a) A Synchronous Buck Converter
VOUT2
D1
N2
COUT2
X1
VIN
SW
Q1
VOUT1
N1
Q2
COUT1
1b) An Isolated Buck Converter (Fly-buck)
Creating an Isolated Buck Converter by Modifying a Synchronous Buck Converter
The primary output voltage equation is identical to a buck converter and is given by Equation 1:
VOUT1 =
TON
V = D x VIN
TON + TOFF IN
(1)
and the secondary output voltage is given by Equation 2:
VOUT2 =
N2
VOUT1 - VF
N1
(2)
where VF is the forward voltage drop of the secondary rectifier diode, and N1, N2 are the number of turns
in the primary and secondary windings, respectively. The secondary output (VOUT2) closely tracks the
primary output voltage (VOUT1) without the need for additional transformer winding or an optocoupler for
feedback across the isolation boundary.
Isolated Buck Converter Switching Sub-Intervals shows the operating modes in an isolated configuration
during TON, when the high-side buck switch is on; and TOFF, when the low-side switch is on. Current in
the two windings is also shown. During TON, the current in the secondary winding is zero as the
secondary diode is reverse biased by a voltage equal to
VIN x
N2
N1
(3)
The current in the primary winding is the same as the magnetizing current (similar to a buck converter
inductor).
2
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Fly-Buck Converter
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Creating an Isolated Buck Converter by Modifying a Synchronous Buck Converter (continued)
VOUT2
IL2 = 0
VIN
COUT2
SW
VOUT1
Q1
IM
Q2
COUT1
IL1 = IM
2a) TON (Q1: ON, Q2: OFF)
VOUT2
IL2
VIN
COUT2
SW
IM
Q2
IL2
VOUT1
COUT1
'
IL1 = IM + I
2b) TOFF (Q1: OFF, Q2: ON)
Isolated Buck Converter Switching Sub-Intervals
During TOFF, the current in the secondary winding is decided by the resonant tank formed by COUT1, the
leakage inductance of the coupled inductor, and COUT2. The current in the primary winding is the sum of
the magnetizing current (similar to a buck converter inductor current), and the reflected current from the
secondary winding. These operating waveforms are shown in Isolated Buck Operating Waveforms.
SW1
SW2
GND
VOUT2
IGND
IL1
IL2
TON
TOFF
Isolated Buck Operating Waveforms
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Maximum Output Current Equations
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Isolated Buck Operating Waveforms (continued)
2
Maximum Output Current Equations
On a cycle-by-cycle average basis, the winding and output currents have the following relationship
Isolated Buck Output Stage with Coupled Inductor.
IL1 = IOUT1
(4)
IL2 = IOUT2
(5)
and
SW2
IOUT2 VOUT2
D1
IL2
+
N1:N2
L2
SW1
L1
COUT2
IOUT1 VOUT1
IL1
+
COUT1
Isolated Buck Output Stage with Coupled Inductor
The combined inductor current waveform (iL1+ iL2), which is equal to the magnetizing current, is identical to
a buck converter. The peak inductor and switch current during on-time is given by Equation 6:
isw(peak) = iL1(peak) = IL1 + IL2 +
'IL1 + 'IL2
'IL1
= IOUT1 + IOUT2 +
2
2
(6)
where we make use of the fact that during on-time (TON) there is no current in secondary winding.
Therefore, the maximum total load current is given by Equation 7:
IOUT1 + IOUT2 = ILIM (MIN) -
'IL1
2
(7)
where the total load current is defined as the sum of the load currents at the two outputs. For turn-ratios
(N2/N1) not equal to unity, IOUT2 should be multiplied by the turn-ratio in Equation 7, shown here in
Equation 8:
IOUT1 + IOUT2
'IL1
N2
= ILIM (MIN) 2
N1
(8)
The maximum peak-to-peak current ripple in the primary winding is given by Isolated Buck Regulator with
Three Outputs:
(VIN (MAX) ± VOUT) VOUT
'IL1 =
4
L1 x fSW
VIN (MAX)
AN-2292 Designing an Isolated Buck (Fly-Buck) Converter
(9)
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Design Example
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Isolated Buck Output Stage with Coupled Inductor (continued)
VOUT3
COUT3
N3
VOUT2
COUT2
N2
X1
VIN
SW
Q1
Q2
VOUT1
N1
COUT1
Isolated Buck Regulator with Three Outputs
Table 1 presents equations for non-equal turn-ratios and three windings (Isolated Buck Regulator with
Three Outputs). The generalization to any number of windings is straightforward.
Table 1. Isolated Buck Regulator Design Equations
Description
Equations
Output Voltages
VOUT1 =
TON
V = D x VIN
TON + TOFF IN
N2
VOUT2 =
VOUT1 - VF
N1
N3
VOUT3 =
VOUT1 - VF
N1
Cycle-by-Cycle Average Quantities
(11)
(12)
IL1 = IOUT1
(13)
IL2 = IOUT2
(14)
IL3 = IOUT3
(15)
Peak Currents in HS FET and Primary Winding
isw(peak) = iL1(peak) = IOUT1 +
Primary Winding Peak-to-Peak Current Ripple
'IL1 =
3
(10)
(VIN (MAX) ± VOUT)
L1 x fSW
'IL1
N3
N2
IOUT3 +
IOUT2 +
2
N1
N1
VOUT
VIN (MAX)
(16)
(17)
Design Example
The design example illustrated in Two Output Isolated Buck Reference Schematic details the design
procedure for a two-output isolated buck converter.
Design Specifications
Input Voltage Range (VIN)
36 V - 72 V
Primary Output Voltage (VOUT1)
10 V
Secondary Output Voltage (VOUT2)
10 V
Primary Load Current (IOUT1)
100 mA
Secondary Load Current (IOUT2)
200 mA
Switching Frequency (fsw)
750kHz
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Design Example
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VOUT2
D1
+
NS
LM5017
VIN
36V-72V
BST
CIN
+
X1
CBST
SW
VIN
COUT2
VOUT1
Rr NP Cr
+
+
RON
RUV2
RON
COUT1
Cac
RUV1
RFB2
VCC
UVLO
RTN
D2
FB
+
RFB1
CVCC
Two Output Isolated Buck Reference Schematic
In this example, we start with a standard two-output circuit using TI’s 100 V synchronous buck regulator,
LM5017, and calculate the component values. We begin with buck converter component calculations and
qualify some of the steps for the isolated configuration. The calculation steps are listed in Table 2.
Table 2. Component Calculation/Selection Steps for a Two-Output Isolated Buck
Component Name
Calculation Steps
Selected Value/Rating
RFB1, RFB2
This parameter is selected by the user. Choose RFB1=1kΩ
1kΩ, 7.16kΩ
RFB2
VOUT1 = 1.225V x (1 +
)
RFB1
(18)
VOUT1
- 1) x RFB1 = 7.16 k:
:RFB2 = (
1.225
(19)
CVCC
Select a 1µF capacitor of 16 V or higher rating as recommended in the
LM5017 datasheet.
1µF, 16 V
CBST
Select a 0.01µF capacitor of 16 V or higher rating, as recommended in
the datasheet.
0.01µF, 16 V
CIN
Input capacitor should be large enough to limit the input voltage ripple
0.47µF + 2.2µF, 100 V
IOUT (MAX)
CIN t
4 x f x 'VIN
(20)
Choosing a ΔVIN=0.5 V gives a minimum CIN=0.2μF A standard value
of 0.47μF is selected. A larger bulk capacitor is usually needed to
suppress inductive spikes in the input voltage. A 2.2μF bulk capacitor is
selected in this case. Input capacitor should be rated for the maximum
input voltage under all conditions.
RON
From datasheet,
VOUT1
f SW =
.x RON
130kΩ
(21)
Where K = 1 x 10–10 → RON=133 kΩ
RUV1, RUV2
UVLO resistors RFB1 and RFB2 set the UVLO threshold and
hysteresis according to the following relationship:
VIN (HYS) = IHYS x RUV2
4.42kΩ, 125kΩ
(22)
and
VIN (UVLO, rising) = 1.225V x
R
( RUV2
+ 1)
(23)
UV1
where IHYS=20μA. Setting UVLO hysteresis of 2.5 V and UVLO rising
threshold of 36 V results in RUV1=4.42kΩ; and RUV2=125kΩ
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Table 2. Component Calculation/Selection Steps for a Two-Output Isolated Buck (continued)
Component Name
Calculation Steps
X1
A coupled inductor or a flyback type transformer is required for this
L1=33 µH, 1:1 turns ratio
topology. Energy is transferred from primary to secondary when the
synchronous switch of the buck is ON.
Using Equation 16 for the peak inductor current equation in Table 1,
the maximum inductor current ripple that can be tolerated is given by:
N2
'IL1 = (0.7 - IOUT1 - IOUT2 x
) x 2 = 0.8A
(24)
N1
Selected Value/Rating
Using Equation 17 for the peak-to-peak inductor current ripple
equation, the minimum inductor value is given by:
L1 =
(VIN (MAX) ± VOUT)
'IL1 x fSW
VOUT
= 14.4 PH
VIN (MAX)
(25)
A higher value such as 22 µH or 33 µH for primary inductance can be
selected to keep the primary winding and high-side switch current
below the minimum peak current limit. For our design, a 33 µH value is
selected for primary inductance. For this chosen primary inductance, in
the primary inductor current ripple during TON is Equation 26
'IL1 =
(VIN (MAX) ± VOUT)
L1 x fSW
VOUT
VIN (MAX)
(26)
A 1:1 turns ratio is selected, resulting in Equation 27
N2
VOUT2 =
V
- VF | 9.3V
N1 OUT1
D1
The voltage across D1 when the high side buck switch is on is
N2
VD1 =
VIN
N1
(27)
100 V, 1A
DLFS1100–7
(28)
For a VIN_MAX=72 V, a 100 V Schottky is selected.
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Design Example
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Table 2. Component Calculation/Selection Steps for a Two-Output Isolated Buck (continued)
Calculation Steps
Selected Value/Rating
COUT1
In a buck converter,
'IL1
'VOUT =
x f x COUT1
1 µF, 25 V, X7R
f
Component Name
(29)
and therefore for an output voltage ripple of ~50 mV gives, COUT1 =
1.16 µF. Selecting a standard value of 1 µF results in ΔVOUT~ = 60 mV
at VIN=72 V and ΔVOUT~ = 50 mV at VIN= 36 V.
The figure below shows the primary winding current waveform (IL1).
The reflected secondary winding current adds to the primary winding
current. Because of this the output voltage ripple is not the same as in
a non-isolated buck converter. The output capacitor value calculated in
Equation 29 should be used as the starting point. Actual optimization of
output capacitor over the whole line/load range must be done
experimentally. A better approximation of the primary output capacitor
voltage ripple is given by Equation 30:
(IOUT2 x N2 ) x TON (MAX)
N1
| 75 mV
'VOUT1 =
COUT1
(30)
TON(MAX) x IOUT2 x N2/N1
IL1
IOUT2
IL2
TON(MAX) x IOUT2
Current Waveforms for COUT1 Ripple
Calculation
(31)
As can be seen from the primary inductor current waveform in the
above figure, in case of low leakage, the primary winding current
reverses immediately when the secondary winding starts conducting.
Therefore, the reflected secondary winding current induced primary
output ripple voltage is not phase-lagged with respect to the switch
node waveform. Therefore, the reflected load current induced voltage
ripple does not need to be compensated for with the ripple injection
circuit.
If lower output voltage ripple is required, a higher value should be
selected for COUT1 and/or COUT2.
COUT2
A simplified waveform for secondary output current (IOUT2) and the
current in the secondary winding is shown in the figure below.
1 µF, 25 V, X7R
IOUT2
IL2
TON(MAX) x IOUT2
Secondary Current Waveforms for COUT2
Ripple Calculation
(32)
The secondary output current (IOUT2) is sourced by COUT2 during one
time TON. Ignoring the current transitions time in the secondary
winding, the secondary output capacitor ripple voltage can be
calculated using Equation 33:
'VOUT2 =
IOUT2 x TON (MAX)
COUT2
(33)
For a 1:1 transformer turns ratio the primary and secondary voltage
ripple equations are identical. Therefore, COUT2 is chosen to be equal to
COUT1 (1 µF) to get comparable ripples on primary and secondary
outputs.
If lower output voltage ripple is required, a higher value should be
selected for COUT1 and/or COUT2.
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Table 2. Component Calculation/Selection Steps for a Two-Output Isolated Buck (continued)
Component Name
Calculation Steps
Rr, Cr, Cac
Type III ripple circuit as described in the LM5017 datasheet is preferred 46kΩ, 0805, 1000 pF, 0.1 µF (25
for isolated configuration. Type I and Type II ripple circuits suffer from
V)
larger jitter as the reflected load current affects the feedback ripple. For
a constant on time converter to be stable, the injected in-phase ripple
should be larger than the capacitive ripple on COUT1.
Selected Value/Rating
VOUT
L1
Rr
C OUT
Cr
R FB2
Cac
GND
To FB
R FB1
Type II Ripple Circuit
(34)
Using type III ripple circuit equations, the target ripple should be
greater than the capacitive ripple generated at the primary output.
Cr = 1000 pF
Cac = 0.1 PF
(VIN (MIN) - VOUT) x TON
RrCr d
50 mV
(35)
Resulting in Rr= 180kΩ. This is the borderline case of stable ripple.
Half to a fourth of this resistance should be selected for sufficient
margin for variations in TON, COUT1, and other components. For this
design Rr = 46.4kΩ; is selected for robust operation.
D2 (optional)
D2 is an optional diode connected between VOUT1 and VCC regulator
20 V, 50 mA
output. When VOUT1 is > VCC the VCC supplied from VOUT1. This results in
reduced losses in VCC regulator inside the IC.
The final schematic for the isolated power supply is shown in Figure 1. The experimental results for this
circuit are presented in Figure 2, Figure 3, and Figure 4.
D1
VOUT2
9.5V
R7
T1
20V-100V
VIN
(TP1)
BST
2
4
C1 +
2.2 F
GND
(TP2)
+
C5
0.47 F
R3
130 NŸ
SW
VIN
33 H
(1:1)
7
8
+ 0.01 F
C2
R8
RON
LM5017
46.4 NŸ
VCC
UVLO
FB
(TP7)
R2
UVLO 8.25 NŸ
EXP
TP8
TP10
RTN
1
6
R9
0Ÿ
(TP5)
VOUT1
10V
(TP3)
0Ÿ
R6
C7
C8
0.1 F
R4
7.32 NŸ
D2
+ C3
1 F
GND
(TP4)
5
+
U1
IGND
C9
2200 pF
2000V
3300 pF
R1
127 NŸ
3
(TP6)
R10
+ C4 2 NŸ
1 F
0Ÿ
SW
(TP11)
R5
1 NŸ
C6
1 F
Figure 1. Complete Schematic for an LM5017–Based
Isolated Converter
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Figure 2. Efficiency at 750 kHz, VOUT1 = 10 V
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Conclusions
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Figure 3. Steady State Waveform (VIN = 48 V, IOUT1 = 100
mA, IOUT2 = 200 mA)
4
Figure 4. Step Load Response (VIN = 48 V, IOUT1 = 0, Step
Load on IOUT2 = 100 mA to 200 mA).
Conclusions
An isolated buck converter (or Fly-Buck) converter was presented that does not require any additional
winding or optocoupler for regulating an isolated output. The operating principle of the topology was also
presented along with operating current and voltage waveforms. The relationship between the primary and
the isolated output voltages and output currents were presented. We also developed design equations for
estimating the peak primary switch current for specified load currents. The equations in this design can
also be used to determine the maximum load current that the converter can provide for a given peak
current limit. Simplified approximations for output voltage ripples were also presented. A detailed design
procedure was presented for a 3W two-output isolated buck converter with a primary output and an
isolated output using a 100 V synchronous buck regulator IC.
An isolated buck converter can be used to replace a flyback converter for low-power isolated regulator
applications with potential savings in complexity, number of components, and cost. Learn more about
flyback converters on the Power Management website at www.ti.com.
5
References
LM5017: 100 V,600 mA Constant On-Time Synchronous Buck Data Sheet (SNVS783)
LM5160 Wide Input 65 V, 1.5A Synchronous Step-Down DC-DC Converter (SNVSA03)
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Revision History
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Revision History
Changes from B Revision (May 2013) to C Revision ...................................................................................................... Page
•
•
•
•
•
Changed 8 to 4 ............................................................................................................................ 6
Changed value from 1.24 to 0.2 ......................................................................................................... 6
Added two sentences ..................................................................................................................... 6
Added 0.47 +............................................................................................................................... 6
Added reference ......................................................................................................................... 10
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
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