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Texas Instruments Power Budget for Backlight Drivers Application notes
Application Report
SNVA655-June 2013
Power Budget of an LED Backlight Driver
MOBILE DISPLAY POWER (MDP) GROUP
Robin Gupta
ABSTRACT
This application report discusses the Power Budget of an LED backlight driver. It provides experimental and
theoretical methods of calculating different losses associated with LED backlight drivers. It also provides an
analytical discussion on behavior of different losses vs brightness levels.
Contents
1
Introduction
..............................................................................................................................................
2
2
Logic Power and LDO Losses ...........……………………..………………...…………………………….
2
3
Inductor Losses ……………..........................................................................................................................
3
4
Switching NFET Losses ………….....…...................................,,,,,,,...........................................................
4
5
Diode Losses ………………………………..………………………………….………………...…………
5
6
Driver Losses…………………..………………………….……………….…………………..……............
5
7
Miscellaneous Losses …………………………………………….………..…....………......……………...
6
8
Comparison of Losses in PWM and PFM mode….…………………………….....………..……………....
6
9
Test Case used……………....…………………………………….………………………...………………
7
10
Specifications used for the Test Case………………….…………...………………………..………………..
7
11
Variation in different Losses with Brightness..................................................................................................
8
12
Variation in Output power with Brightness………………..………………………….…..…………….........
9
13
Brightness vs Inductor Losses (Graph) ………………………………..………………………………..........
10
14
Brightness vs Mosfet +Diode Losses (Graph)……………………………………...………………………...
10
15
Brightness vs Remaining Losses (Graph)……………………………………………………………………
10
16
Full load: Input Power Budget (Graph)………………………………………………..….…………………
11
17
Conclusion…………………………………………………………………………………………………..
11
List of Figures
1
2
3
4
5
6
7
Logic Voltage Tree…………………………………………..........................................................................
3
Inductor’s Equivalent Loss model
..........................................................................................................
5
B(t) as a function of H(t) for a Sinusoidal Input voltage ...............................................................................
5
Switch Node’s Rising Edge …………………………………….…….. ........................................................
6
Diode’s Equivalent Loss model …………………………………………………………………………….
7
LP8556 EVM Schematic…………………………………………………………………………………….
8
Variation of Inductor Losses with Brightness……………………………………………………………….
10
8
Variation of Mosfet + Diode Losses with Brightness……………………………………………………….
10
9
Variation of Remaining Losses with Brightness ……………………………………………………………
10
8
Input Power Budget………………………………………………………………………………………….
11
SNVA655-Power Budget of an LED Backlight Driver
1
Copyright © 2013, Texas Instruments Incorporated
www.ti.com
1
Introduction
Today as the demand for more and more efficient LED Backlight drivers is on rise, this
exhaustive analysis details the profound impact of different losses on the overall efficiency of the
Backlight Drivers and thereby methods to make it more power efficient.
2
Logic Power and LDO losses
Today most of the LED Backlight drivers have separate logic supply and boost input voltage.
This logic voltage is either regulated via an LDO to get a clean stepped down voltage or given
directly to the logic circuitry. Apart from this it is generally used to drive internal oscillator and
driving the gate of switching FET.
Logic
Circuitry
LDO
LOGIC VOLTAGE (V )
Internal
Oscillator
V
Gate Drive
NFET
Bypass the LDO
Figure 1.Logic Voltage Tree
Power dissipation in the LDO:
PLDO= (VDD − VLDO ) • I DD
(1)
Where VDD is the Input voltage to the LDO, VLDO is the output voltage of the LDO, IDD is the Input
current for the VDD power supply.
Total Power dissipation (LDO + Oscillator +Gate Drive + Logic Circuitry):
PDD = VDD • I DD
3
(2)
Inductor Losses
Before we get in power dissipated by Inductor, presented below is a model of a loss Inductor,
where RAC represents the effective AC resistance, RDC the DC resistance, RC the effective core
losses resistance and L, the actual Inductance.
RAC
RDC
RC
L
Figure 2. Inductor’s Equivalent Loss Model
SNVA655-Power Budget of an LED Backlight Driver
Copyright © 2013, Texas Instruments Incorporated
2
Inductor Core Losses
A graph of B(t) as a function of H(t) for a sinusoidal input voltage produces the hysteresis loop
shown in bold lines in Fig.3. B(t) is measured as H(t) is increased. The response of B(t) versus
H(t) is nonlinear and exhibits hysteresis, hence the name hysteresis loop. Hysteresis is one of the
core-material characteristics that cause power loss in the inductor core.
B (t)
B (t)
H (t)
H (t)
Figure 3. B(t) as a function of H(t) for a sinusoidal input
Hysteresis Losses
Energy loss due to the changing magnetic energy in the core during a switching cycle equals the
difference between magnetic energy put into the core during the on time and the magnetic energy
extracted from the core during the off time. Total energy (ET) into the inductor over one switching
period T is:
T
E (t ) = ∫ V (t ) • I (t )dt
(3)
0
Using Ampere’s Law {
dB(t )
H (t ) • l E
= V (t ) }
= I (t ) } and Faraday’s Law { n • A •
n
dt
The equation for E(t) can be rewritten as:
T
E (t ) = A • l E ∫ H (t ) • dB (t )
(4)
0
where A is the area of the core and lE is the length of the inductor winding.
Thus, the total energy put into the core over one switching period is the area of the shaded region
with-in the B-H loop of Fig. 3 multiplied by the volume of the core. The magnetic field decreases
as inductor current ramps down, tracing a different path (following the path traced by ramping
down of the arrows in Fig. 3) for magnetic flux density. Most of the energy goes to the load, but
the difference between stored energy and delivered energy equals the energy loss.
Energy loss in the core is the area traced out by the B-H loop (difference in blue and yellow
region in Fig. 3) multiplied by the core’s volume and the power loss is this energy (ET) multiplied
by the switching frequency(FSW).
Hysteresis loss varies as a function of ∆Bp, where (for most ferrites) “p” lies in the range 1 to 3.
This expression applies on the conditions that the core is not driven into saturation, and the
switching frequency lies in the intended operating range.
SNVA655-Power Budget of an LED Backlight Driver
Copyright © 2013, Texas Instruments Incorporated
3
The shaded area in Fig. 3, which occupies the first quadrant of the B-H loop, represents the
operating region for positive flux-density excursions, because typical boost converters operate
with positive inductor currents.
∆B = µ • ∆H
∆I
∆H = n •
Using Ampere’s Law
lE
Using Faraday’s Law di (t ) / dt = Vin / L
Vin
• Ton
∆H = n •
L
(5)
(6)
(7)
Magnetic flux density can be given as
∆B = K • (
where 𝐾 = µ • 𝑛
So the Hysteresis CORE LOSSES can be written as
Vin
• Ton)
L
Vin

Pc = λ • 
•Ton 
 L

(8)
p
(9)
where λ is a constant
Eddy Current Losses
The second type of core loss is due to eddy currents, which are induced in the core material by a
time-varying flux dø/dt. According to Lenz’s Law, a changing flux induces a current that itself
induces a flux in opposition to the initial flux.
This eddy current flows in the conductive core material and produces an I2R, or V2/R, power loss.
The power loss in the core due to eddy currents is
Vin 2 Ton
Pe =
•
Rc
Tp
(10)
Where: Vin is the input voltage to the inductor, Rc Inductor core loss resistance, Ton is the duty
cycle on time and Tp is the total time period.
Because the core material has high resistance, losses due to eddy currents in the core are usually
much less than those due to hysteresis.
Power dissipation in Inductor Windings
DC power loss: The preceding discussion presented losses in the inductor core, but losses also
occur in the inductor windings. Power loss in the windings at dc is due to the windings’ DC
resistance (RDC). (IDC2RDC).
AC Power Loss:
With increasing frequency, the winding resistance increases due to a phenomenon called skin
effect, caused by a changing I(t) within the conductor. This increase in resistance with frequency
is donated in the form of AC resistance (RAC) in which power loss occurs only because of the
ripple current and is given as
IRMS=∆I/12
(11)
2
PAC=IRMS ∙ 𝑹AC
(12)
SNVA655-Power Budget of an LED Backlight Driver
Copyright © 2013, Texas Instruments Incorporated
4
4
Switching N-FET Losses
Power Dissipation in Rdson
As the N-FET operates in the linear region it has a Rdson associated with. It’s value depends on the
process technology used, bias current (indirectly on gate drive voltage).
In the linear region N-FET operates as per the given equation:
(
)
W 
2
I D = K N' •   • (VGS − VT ) • VDS − 0.5 • VDS
(13)
L
 
Where ID is the drain current, K N' = µ • COX (µ is the mobility and COX is the oxide capacitance)
VGS is the gate-source voltage, VT is the channel threshold voltage, VDS is the drain-source voltage.
As VDS is generally very small, so V2DS can be neglected.
Hence,
W 
I D = K N' •   • (VGS − VT ) • VDS
 L
Rdson=
dVDS
=
dI
(14)
1
W 
K N' •   • (VGS − VT )
 L
2
PFET-DC = I FET − DC • RDSON
(15)
So, more is the Gate drive voltage (VGS) lesser is the Rdson , lesser are the losses in the FET DC
resistance. But more is the Gate Drive voltage generally also means more switching losses in
driving the gate. So It is a trade-off that needs to be worked with.
I FET − DC = I IN − I OUT =
I OUT • D
1− D
(16)
Where IFET-DC is the net DC current flowing through N-FET, IIN is the net input current flowing
through the boost input voltage and IOUT is the net current flowing through the boost.
Power Dissipation in Switching Losses
Now to quantize switching losses in N-FET we need to know the net capacitance at the drain of
the N-FET. We can get these specification from the datasheet.
To experimentally calculate the value, we can do so by observing the rise time of switch node and
average inductor current flowing during that short span of time(which comes out to be actually
the peak current through the Inductor).
I =C•
dV
dT
(17)
IPeak=860 mA
Using Information from the Figure-4 of switch Node dV =17.4volts and dt=3.76nsec.
C=150pf
SNVA655-Power Budget of an LED Backlight Driver
Copyright © 2013, Texas Instruments Incorporated
5
Figure 4. Rising Edge of Switch Node
1
2
PFET − SW = • CDRAIN • VSW • FSW
2
(18)
Where PSW is the switching power loss, CDRAIN is the net capacitance seen at the drain of the FET,
FSW is the switching frequency and VSW is net drain to source voltage.
5
Diode Losses:
A lossy diode can be represented by a constant voltage source of 0.7volts in series with a
resistance (RDIODE) and parallel with a capacitor .
Figure 5. Diode’s Equivalent Loss Model
DC Power Dissipation in the Diode
Total power dissipated in the diode is both the sum of power dissipation across resistor and across
the threshold voltage (0.7votls).
2
(19)
PDIODE − DC = I DC
• RDC +V DC• I DC
Where PDC is the DC power dissipated in the diode, IDC is the DC current flowing through the
diode, RDC is the DC resistance of the diode and VDC is the constant drop of 0.7volts
Switching Power Dissipation in the Diode
The switching losses in diode are generally a very small part of the total power dissipated for
LED Backlight Drivers used for laptops, tablets and mobile phone applications , hence can be
neglected.
SNVA655-Power Budget of an LED Backlight Driver
Copyright © 2013, Texas Instruments Incorporated
6
6
Backlight Driver Losses
DC Power Dissipation in Backlight Driver
2
PDC − DRIVER = I OUT
/ CHANNEL • RDC • N
(20)
Where IOUT/CHANNEL is the DC current flowing per channel, RDC is the DC resistance of the
Backlight Driver and N are the number of channels.
Switching Losses in Backlight Driver
Switching losses in the backlight driver take place only when the device enters into PWM
dimming control. Generally for a LED Backlight Driver the device into PWM dimming control
below 25% brightness.
PSW − DRIVER =
1
• C • V 2 • FPWM − FREQ
2
(21)
Where PSW-DRIVER is the switching loss in the driver and V is the total change in the voltage at
drain of the driver and C is the net capacitance at the drain and FPWM-FREQ.
Generally these losses are very small because the FPWM-FREQ is the order of few Khz but still their
proportion can increase at lower brightness.
7
Miscellaneous Losses:
Apart from the major losses mentioned above, the power dissipation will also take place in the
ESR of the output capacitances, Di-electric of the capacitance, resistance of traces, AC loss in the
Diode and AC loss in the Mosfet ,etc .But the proportional share of all these added together as
compare to the losses mentioned above is negligible.
8
Comparison of losses in PWM and PFM mode
Losses
NFET DC
Power Loss
PWM Mode
P
PFM Mode
DC _ PWM


= R FET − DC • I OUT  2 •(D )2
1− D 
=V
NFET
Switching
Loss
Inductor
DC Power
Loss
Inductor
AC Power
Loss
Inductor
Core Loss
P
FET − ON
SW _ PWM
P
P
 I OUT 

•
 1 − D  • (D )


2

•
=  C DRAIN V SW

2

DC _ PWM
=
AC _ PWM
P
P
C _ PWM
R
=
DC

•
 F SW

AC
•(∆I )2
= k • (∆B )
SNVA655-Power Budget of an LED Backlight Driver
=V
P


• I OUT  2
−
D
1


R
DC _ PFM
SW _ PFM
P
P
R
FET − DC
FET − ON


• I OUT  2 •(D )2
1− D 
 I OUT 

•
 1 − D  • (D )


2


•
λ
=  C DRAIN V SW  • F SW •  


2
K


DC _ PFM
AC _ PFM
P
=
=
C _ PFM
=
R
R
AC
DC
 I OUT  2

•


1− D 
•(∆I PFM
)2 • λ


K 
λ 
= k • (∆BPFM ) • 

K
Copyright © 2013, Texas Instruments Incorporated
7
Diode
Switching
Losses
P
DSW _ PWM
2

•
=  C D V OUT

2


•
 F SW

P
= R D •(I OUT )2 +VDC • I DC
Diode
DC Loss
P
Driver DC
Losses
2
PDRIVER − DC _ PWM = I OUT
/ CHANNEL • RDC • N
DIODE − DC _ PWM
P
DSW _ PFM
DIODE − DC _ PFM
2

•
=  C D V OUT

2


λ
•
•
 F SW k

= R D •(I OUT )2 +VDC • I DC
2
PDRIVER − DC _ PFM = I OUT
/ CHANNEL • RDC • N
Where λ is the repeated number of switching cycles occurring in a given time in PFM mode and k
are the actual number of switching cycles that would have occurred in the given time.
Example: Let the switching frequency of device be 500Khz (2usec), the device enters into PFM
mode and is now switching at a rate of 10 cycles in 30usec.whereas if it would have entered into
PWM mode it would have 15 switching cycles in 30usec.So the value of λ is 10 and value of k is
15.
Thereby you can calculate the change in the different losses with the device entering the PFM
mode.
9
To validate the above assertions and to calculate the share of different losses under a given
set of conditions the following test setup was used.
Figure 6:LP8556 EVM schematic
•
10
The Inductor belongs to IHLP-2020BZ-01 series from Vishay
Specifications used for the above test case:
Input Voltage
Output Voltage
Switching Frequency
Dimming Control
Switch Point
Load
PWM output Frequency after 25% switch point
SNVA655-Power Budget of an LED Backlight Driver
3.8Volts
17.2Volts
1.246Mhz
Adaptive
25%
6s/6p
10Khz
Copyright © 2013, Texas Instruments Incorporated
8
PWM Input Frequency
Full load current
11
20Khz
0.135 Amperes
Variation in different Losses with Brightness
100%
Brightness
0.01635
Logic Power
2013
+Gate SNVA654-May
Drive
Loss
0.00244
LDO Power
Loss
0.09674
Inductor DC
Power Loss
0.06013
Inductor AC
Power Loss
0.03453
Inductor
Core Loss
0.11558
Diode DC
Loss
0.09030
Mosfet DC
Loss
0.02600
Mosfet
Switching
Loss
0.07187
Driver DC
Losses
0.00370
Miscellaneous
Losses
0.51765
Total Losses
75%
0.01635
50%
0.01389
25%
0.01062
20%
0.00995
10%
0.00877
0.00244
0.00207
0.00159
0.00149
0.00131
0.04842
0.02086
0.00501
0.00296
0.00108
0.06077
0.06341
0.04555
0.03241
0.01639
0.03585
0.03760
0.02572
0.01783
0.00850
0.08088
0.05201
0.02454
0.01894
0.01015
0.04015
0.01745
0.00792
0.00581
0.00309
0.02600
0.02600
0.02000
0.00803
0.00603
0.05447
0.03469
0.01750
0.01390
0.00745
0.00221
0.00181
0.00072
0.00272
0.00359
0.36754
0.26979
0.15916
0.11405
0.06635
20%
0.44502
10%
0.23835
12
Variation in Output power with Brightness
100%
75%
50%
Brightness
2.33103
1.73029
1.15013
Output
Power
SNVA655-Power Budget of an LED Backlight Driver
25%
0.56091
Copyright © 2013, Texas Instruments Incorporated
9
13
Brightness vs Inductor Losses
0.12
0.1
0.08
Inductor DC
0.06
Inductor AC
0.04
Inductor Core
0.02
0
10
20
25
50
75
100
Figure 7: Variation of Inductor Losses with Brightness
14.
Brightness vs Mosfet DC+ Diode Losses
0.14
0.12
0.1
0.08
Mosfet DC
0.06
Mosfet Switching
0.04
Diode Loss
0.02
0
10
20
25
50
75
100
Figure 8: Variation of Mosfet DC+ Diode Losses with Brightness
15.
Brightness vs Remaining Losses
0.08
0.07
0.06
0.05
Logic+Gate Drive
0.04
LDO
0.03
Driver DC
0.02
Misc Loss
0.01
0
10
20
25
50
75
100
Figure 9: Variation of Mosfet DC+ Diode Losses with Brightness
SNVA655-Power Budget of an LED Backlight Driver
Copyright © 2013, Texas Instruments Incorporated
10
14
Full Load Comparison: Different Losses and Output Power
Input Power Budget
Output Power
Logic Power+Gate Drive
LDO Power
Inductor DC Power
Inductor AC Power
Inductor Core Power
Diode DC Power
Mosfet DC Loss
Mosfet Switching Loss
Driver DC Loss
Miscellaneous loss
Figure 10: Input Power Budget
15
Conclusion
This application report analyzes different LED Backlight related power losses and calculations for each
part of the power loss. The Effects of PFM mode entry are discussed and solutions are provided for the
same.
Once we have a clear understanding of the above losses faced in the Backlight drivers, we can look up the
reasons for the loss in efficiency and trade-offs concerning these Losses.
SNVA655-Power Budget of an LED Backlight Driver
Copyright © 2013, Texas Instruments Incorporated
11
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(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿6丁目24番1号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
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