Texas Instruments | AN-1281 Bumped Die (Flip Chip) Packages (Rev. A) | Application notes | Texas Instruments AN-1281 Bumped Die (Flip Chip) Packages (Rev. A) Application notes

Texas Instruments AN-1281 Bumped Die (Flip Chip) Packages (Rev. A) Application notes
Application Report
SNOA431A – May 2004 – Revised May 2004
AN-1281 Bumped Die (Flip Chip) Packages
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ABSTRACT
Bumped Die products have the following features:
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Contents
Introduction and Package Construction ..................................................................................
Flip Chip on Substrate Assembly Considerations ......................................................................
Substrate Land Pattern Layout Considerations .........................................................................
Rework .......................................................................................................................
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4
List of Figures
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Summary of Flip-chip Assembly Process ................................................................................ 2
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Non-Solder-Mask-Defined Pad Layout on PCB ......................................................................... 3
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Solder-Mask-Defined Pad Layout on PCB
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..............................................................................
Trench-type pad opening (through-trace type) ..........................................................................
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3
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AN-1281 Bumped Die (Flip Chip) Packages
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1
Introduction and Package Construction
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Introduction and Package Construction
Bumped Die products have the following features:
1. Requires underfill material.
2. Interconnect layout at fine (≤ 0.250 mm) pitch.
Bumped die products have solder bumps located on the active side of silicon IC. Bumped die products are
available in (560 μm) 22 mil wafer thickness. Bump size and pitch depends on the individual product
device. Bumped die products are manufactured using standard wafer fabrication process, deposition of
solder bumps on i/o pads, backlapping, testing using wafer sort platform, wafer backside laser marking,
singulation and packing in tape and reel and/or waffle pack.
These devices are to be mounted on substrate using techniques used for typical flip-chip applications.
Assembly process for mounting on substrate and reliability thereafter has not been characterized by
National Semiconductor Corporation.
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Flip Chip on Substrate Assembly Considerations
Bumped die flip chip assembly operations include,
1. Component placement using flip chip mounting/placement equipment.
2. The placement step involves application of flux to the solder bumps either using a spray fluxing
arrangement or a flux-dip station on the pick-and-place machine.
3. An alternative method using no-flow or flux underfill may also be used for assembly.
4. Flux dip should involve wetting of at least 1/3 of the total bump height with flux.
5. Standard reflow (convection preferred) to form solder joint interconnections.
6. Cleaning step (depending on type of flux used).
7. Underfill application using typical underfill equipment.
8. Figure 1 illustrates the process steps involved.
Figure 1. Summary of Flip-chip Assembly Process
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Substrate Land Pattern Layout Considerations
For flip-chip type applications, there are multiple options available for pad geometry on PCB.
1. Non-solder mask defined or pad defined is the preferred pad layout. However lower pitches may not
utilize this layout due to PCB limitations. Refer to Figure 2.
2
AN-1281 Bumped Die (Flip Chip) Packages
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Substrate Land Pattern Layout Considerations
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2. Solder mask defined (individual pad locations are available with mask separating adjacent pad
locations). Refer to Figure 3.
3. Trench-over-trace openings, where continuous trenches in solder mask are used to define the entire
row (or multiple rows) of pad locations (where the pads themselves are actually part of the trace itself).
Refer to Figure 4.
4. The trench-type design may involve traces passing through the trench or traces ending in the trench
itself (both types can be used, however, traces ending in the trench are preferred).
5. Total solderable area available on the PCB pads should be approximately 75 to 100% of area of the
solder bump cross-section
Other considerations include:
1. A copper layer thickness of 1/2 oz. (17μ) is recommended. Finer pitches are preferred to be used with
thinner copper layers to maintain a reasonable solder joint stand-off.
2. Stand-off achieved should allow easy flow of underfill epoxy underneath the die. Min stand-off required
is dependent on the flow characteristics of the underfill being used.
3. Underfill selection is largely dependent on the bump pitch being used and the corresponding stand-off
(solder joint height after assembly on PCB) achieved. Lower stand-off assemblies require the use of
underfills with superior flow characteristics.
4. Via-in-pad structures (micro-via in bump pad) are not preferred for the pitches typical to bumped die
flip-chips.
5. Organic solderability preservative coating (OSP) as well as Nickel-Gold pad finish can be used for PCB
assembly.
6. For Nickel-Gold (electroplated Nickel, immersion Gold) gold thickness should be less than 0.5 microns.
7. HASL (Hot Air Solder Leveled) board finish with these package types is not allowed.
Figure 2. Non-Solder-Mask-Defined Pad Layout on PCB
Figure 3. Solder-Mask-Defined Pad Layout on PCB
Figure 4. Trench-type pad opening (through-trace type)
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3
Rework
4
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Rework
Reworkability of the assembly is entirely dependent on the underfill used. Rework of assembled die/flip
chip before underfilling is started is possible using standard rework equipment.
4
AN-1281 Bumped Die (Flip Chip) Packages
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SNOA431A – May 2004 – Revised May 2004
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