Texas Instruments | 66AK2Gx Multicore DSP ARM Keystone II System-on-Chip (SOC) TRM (Rev. I) | User Guides | Texas Instruments 66AK2Gx Multicore DSP ARM Keystone II System-on-Chip (SOC) TRM (Rev. I) User guides

Texas Instruments 66AK2Gx Multicore DSP   ARM Keystone II System-on-Chip (SOC) TRM (Rev. I) User guides
66AK2G1x
Multicore DSP+Arm® KeyStone II
System-on-Chip (SoC)
Texas Instruments Family of Products
Technical Reference Manual
Literature Number: SPRUHY8I
January 2016 – Revised March 2019
Contents
Revision History ........................................................................................................................ 198
Preface ..................................................................................................................................... 199
1
Introduction ..................................................................................................................... 200
1.1
1.2
1.3
2
3.2
System Interconnect ......................................................................................................
3.1.1 System Interconnect Overview.................................................................................
3.1.2 System Interconnect Integration ...............................................................................
3.1.3 System Interconnect Functional Description .................................................................
Memory Protection Units (MPU) ........................................................................................
3.2.1 MPU Overview ...................................................................................................
3.2.2 MPU Integration ..................................................................................................
3.2.3 MPU Functional Description ....................................................................................
3.2.4 MPU Registers ...................................................................................................
Initialization
4.1
4.2
4.3
4.4
4.5
2
Memory Map Summary .................................................................................................. 209
Interconnect ..................................................................................................................... 222
3.1
4
201
202
203
203
204
204
206
206
207
207
207
207
207
Memory Map .................................................................................................................... 208
2.1
3
Device Overview ..........................................................................................................
Device Environment ......................................................................................................
Device Description ........................................................................................................
1.3.1 Arm Subsystem ..................................................................................................
1.3.2 DSP Subsystem..................................................................................................
1.3.3 Algorithm Accelerators and Application-specific Subsystems .............................................
1.3.4 Memory Controllers and Memory ..............................................................................
1.3.5 Connectivity Peripherals ........................................................................................
1.3.6 Media and Storage Interfaces ..................................................................................
1.3.7 Audio Peripherals ................................................................................................
1.3.8 Automotive Peripherals .........................................................................................
1.3.9 Control Interfaces ................................................................................................
1.3.10 System Level Components ....................................................................................
..................................................................................................................... 275
Overview ...................................................................................................................
4.1.1 Bootloader Modes ...............................................................................................
BootROM Initialization Phase ...........................................................................................
4.2.1 Reset Types ......................................................................................................
4.2.2 Initialization Flow .................................................................................................
4.2.3 Multi-Stage Boot .................................................................................................
Boot Process, Boot Modes and Pin Usage............................................................................
4.3.1 Boot Process Flow ...............................................................................................
4.3.2 BOOTMODE Pins Description .................................................................................
4.3.3 Boot Parameter Tables .........................................................................................
4.3.4 Boot Configuration Format......................................................................................
4.3.5 Boot Modes .......................................................................................................
Boot RAM Memory Maps ................................................................................................
BootROM Function Calls ................................................................................................
4.5.1 pcieBlockActivate_t Structure ..................................................................................
Contents
223
223
223
225
233
233
234
236
243
276
277
278
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282
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307
309
315
316
316
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5
Device Configuration......................................................................................................... 318
5.1
5.2
5.3
5.4
6
Control Module (BOOT_CFG) ..........................................................................................
5.1.1 BOOT_CFG Overview ..........................................................................................
5.1.2 BOOT_CFG Integration .........................................................................................
5.1.3 BOOT_CFG Functional Description ...........................................................................
5.1.4 BOOT_CFG Registers ..........................................................................................
Power Management ......................................................................................................
5.2.1 Power Management Overview .................................................................................
5.2.2 Power Sleep Controller (PSC) .................................................................................
Reset Management .......................................................................................................
5.3.1 Reset Management Overview ..................................................................................
5.3.2 Power-on Reset ..................................................................................................
5.3.3 Hard Reset (CHIP_0_RST and CHIP_1_RST Asserted) ...................................................
5.3.4 Soft Reset (CHIP_1_RST Asserted) ..........................................................................
5.3.5 DSP Local Resets ...............................................................................................
5.3.6 ARMSS Reset ....................................................................................................
5.3.7 Reset Priority .....................................................................................................
5.3.8 Reset Indicators ..................................................................................................
5.3.9 Reset Isolation ...................................................................................................
5.3.10 ICSS Reset Isolation ...........................................................................................
5.3.11 Device Pinmux ..................................................................................................
5.3.12 HHV ..............................................................................................................
5.3.13 Reset Controller Integration ...................................................................................
5.3.14 Reset Controller Registers ....................................................................................
5.3.15 Reset Mapping ..................................................................................................
Clock Management .......................................................................................................
5.4.1 Overview ..........................................................................................................
5.4.2 Clock Inputs ......................................................................................................
5.4.3 Clock Outputs ....................................................................................................
5.4.4 Audio Clocking ...................................................................................................
5.4.5 PLLs ...............................................................................................................
5.4.6 Module Clock Distribution.......................................................................................
319
319
320
322
340
523
523
524
538
538
539
540
541
541
542
542
542
543
544
544
544
544
546
546
553
553
555
556
557
558
590
Processors and Accelerators ............................................................................................. 595
6.1
6.2
6.3
6.4
Arm Cortex-A15 Subsystem .............................................................................................
6.1.1 Arm Subsystem Overview ......................................................................................
6.1.2 Arm Subsystem Functional Description .......................................................................
6.1.3 Arm Subsystem Registers ......................................................................................
C66x DSP Subsystem ...................................................................................................
6.2.1 DSP Subsystem Overview......................................................................................
6.2.2 DSP Subsystem Integration ....................................................................................
6.2.3 DSP Subsystem Functional Description ......................................................................
6.2.4 DSP Subsystem Registers .....................................................................................
C66x Cache Subsystem .................................................................................................
6.3.1 L1P Memory ......................................................................................................
6.3.2 L1D Memory ......................................................................................................
6.3.3 L2 Memory ........................................................................................................
6.3.4 DSP ECC configuration .........................................................................................
Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS) .........
6.4.1 PRU-ICSS Overview ............................................................................................
6.4.2 PRU-ICSS Environment ........................................................................................
6.4.3 PRU-ICSS Integration ...........................................................................................
6.4.4 PRU-ICSS Level Resources Functional Description ........................................................
6.4.5 PRU-ICSS PRU Cores ..........................................................................................
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Contents
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596
598
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624
626
629
630
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634
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6.4.6
6.4.7
6.4.8
6.4.9
6.4.10
6.4.11
7
Memory Subsystem ......................................................................................................... 1126
7.1
7.2
7.3
7.4
8
Multicore Shared Memory Controller (MSMC) ......................................................................
7.1.1 MSMC Overview ...............................................................................................
7.1.2 MSMC Integration ..............................................................................................
7.1.3 MSMC Functional Description ................................................................................
7.1.4 MSMC Registers ...............................................................................................
DDR External Memory Interface (EMIF) .............................................................................
7.2.1 EMIF Overview .................................................................................................
7.2.2 EMIF Environment .............................................................................................
7.2.3 EMIF Integration ................................................................................................
7.2.4 EMIF Functional Description ..................................................................................
7.2.5 EMIF Registers .................................................................................................
General-Purpose Memory Controller (GPMC) ......................................................................
7.3.1 GPMC Overview ................................................................................................
7.3.2 GPMC Environment ............................................................................................
7.3.3 GPMC Integration ..............................................................................................
7.3.4 GPMC Functional Description ................................................................................
7.3.5 GPMC Basic Programming Model ...........................................................................
7.3.6 GPMC Use Cases and Tips ..................................................................................
7.3.7 GPMC Registers ...............................................................................................
Error Location Module (ELM) ..........................................................................................
7.4.1 ELM Overview ..................................................................................................
7.4.2 ELM Integration .................................................................................................
7.4.3 ELM Functional Description ...................................................................................
7.4.4 ELM Basic Programming Model ..............................................................................
7.4.5 ELM Registers ..................................................................................................
1127
1127
1128
1131
1146
1187
1187
1189
1193
1195
1209
1380
1380
1381
1386
1388
1462
1479
1488
1546
1546
1548
1550
1553
1559
Interprocessor Communication......................................................................................... 1596
8.1
8.2
9
PRU-ICSS Local Interrupt Controller .......................................................................... 811
PRU-ICSS UART Module....................................................................................... 888
PRU-ICSS eCAP Module ....................................................................................... 927
PRU-ICSS MII RT Module ...................................................................................... 949
PRU-ICSS MII MDIO Module ................................................................................. 999
PRU-ICSS Industrial Ethernet Peripheral (IEP) ........................................................... 1021
Message Manager ......................................................................................................
8.1.1 Message Manager Overview .................................................................................
8.1.2 Message Manager Integration ................................................................................
8.1.3 Message Manager Functional Description ..................................................................
8.1.4 Message Manager Programming Guidelines ...............................................................
8.1.5 Message Manager Registers .................................................................................
Semaphore Module .....................................................................................................
8.2.1 Semaphore Overview ..........................................................................................
8.2.2 Semaphore Integration ........................................................................................
8.2.3 Semaphore Functional Description ..........................................................................
8.2.4 Semaphore Registers ..........................................................................................
1597
1597
1598
1602
1612
1615
1654
1654
1655
1657
1663
Interrupts ....................................................................................................................... 1679
9.1
9.2
Chip-level Interrupt Controller (CIC) ..................................................................................
9.1.1 CIC Overview ...................................................................................................
9.1.2 CIC Integration..................................................................................................
9.1.3 CIC Functional Description....................................................................................
9.1.4 CIC Registers ...................................................................................................
Interrupt Sources ........................................................................................................
1680
1680
1683
1684
1687
1703
10
Enhanced Direct Memory Access (EDMA) Controller ........................................................... 1712
4
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10.1
10.2
10.3
10.4
10.5
10.6
11
EDMA Overview .........................................................................................................
10.1.1 Introduction .....................................................................................................
10.1.2 EDMA Controllers Features ..................................................................................
10.1.3 EDMA Controllers Configuration ............................................................................
10.1.4 Terminology Used in This Chapter..........................................................................
EDMA Integration .......................................................................................................
10.2.1 EDMA Synchronization Events ..............................................................................
EDMA Functional Description .........................................................................................
10.3.1 EDMA Controller Block Diagram ............................................................................
10.3.2 EDMA Channel Controller (EDMACC) .....................................................................
10.3.3 EDMA Transfer Controller (EDMATC)......................................................................
10.3.4 Types of EDMA Transfers ...................................................................................
10.3.5 Parameter RAM (PaRAM) ...................................................................................
10.3.6 Initiating a DMA Transfer .....................................................................................
10.3.7 Completion of a DMA Transfer ..............................................................................
10.3.8 Event, Channel, and PaRAM Mapping .....................................................................
10.3.9 EDMA Channel Controller Regions .........................................................................
10.3.10 Chaining EDMA Channels ..................................................................................
10.3.11 EDMA Interrupts .............................................................................................
10.3.12 Memory Protection ..........................................................................................
10.3.13 Event Queue(s) ..............................................................................................
10.3.14 EDMA Transfer Controller Operation .....................................................................
10.3.15 Event Dataflow ...............................................................................................
10.3.16 EDMA Prioritization ..........................................................................................
10.3.17 EDMA Reset Considerations ...............................................................................
10.3.18 EDMA Emulation Considerations ..........................................................................
EDMA Transfer Examples .............................................................................................
10.4.1 Block Move Example .........................................................................................
10.4.2 Subframe Extraction Example ...............................................................................
10.4.3 Data Sorting Example ........................................................................................
10.4.4 Peripheral Servicing Example ...............................................................................
EDMA Debug/Programming Tips .....................................................................................
10.5.1 Debug Checklist ...............................................................................................
10.5.2 Miscellaneous Programming/Debug Tips ..................................................................
10.5.3 Setting Up a Transfer .........................................................................................
EDMA Registers .........................................................................................................
10.6.1 EDMA Channel Controller (EDMACC) Registers .........................................................
10.6.2 EDMA Transfer Controller (EDMATC) Registers .........................................................
1713
1713
1714
1715
1715
1718
1722
1726
1726
1726
1728
1729
1732
1743
1746
1747
1748
1751
1751
1757
1761
1763
1766
1766
1768
1768
1770
1770
1772
1774
1776
1790
1790
1791
1791
1793
1793
1896
Peripherals ..................................................................................................................... 1956
11.1
11.2
11.3
Audio Sample Rate Converter (ASRC) ...............................................................................
11.1.1 ASRC Overview ...............................................................................................
11.1.2 ASRC Integration ..............................................................................................
11.1.3 ASRC Functional Description ................................................................................
11.1.4 ASRC Registers ...............................................................................................
Controller Area Network Interface (DCAN) .........................................................................
11.2.1 DCAN Overview ...............................................................................................
11.2.2 DCAN Environment ...........................................................................................
11.2.3 DCAN Integration .............................................................................................
11.2.4 DCAN Functional Description ...............................................................................
11.2.5 DCAN Registers ...............................................................................................
Display Subsystem (DSS) ..............................................................................................
11.3.1 DSS Overview .................................................................................................
11.3.2 DSS Environment .............................................................................................
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Contents
1957
1957
1959
1962
1977
2070
2070
2072
2074
2077
2113
2200
2200
2202
5
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11.3.3 DSS Integration................................................................................................
11.3.4 DSS Functional Description ..................................................................................
11.3.5 DSS Registers .................................................................................................
11.4 Enhanced Capture (eCAP) Module ...................................................................................
11.4.1 eCAP Overview ................................................................................................
11.4.2 eCAP Environment ............................................................................................
11.4.3 eCAP Integration ..............................................................................................
11.4.4 eCAP Functional Description ................................................................................
11.4.5 eCAP Registers ...............................................................................................
11.5 Enhanced PWM (ePWM) Module .....................................................................................
11.5.1 ePWM Overview...............................................................................................
11.5.2 ePWM Environment ...........................................................................................
11.5.3 ePWM Integration .............................................................................................
11.5.4 ePWM Functional Description ...............................................................................
11.5.5 ePWM Registers ..............................................................................................
11.6 Enhanced Quadrature Encoder Pulse (eQEP) Module ............................................................
11.6.1 eQEP Overview ...............................................................................................
11.6.2 eQEP Environment............................................................................................
11.6.3 eQEP Integration ..............................................................................................
11.6.4 eQEP Functional Description ................................................................................
11.6.5 eQEP Registers ...............................................................................................
11.7 General-Purpose Interface (GPIO)....................................................................................
11.7.1 GPIO Overview ................................................................................................
11.7.2 GPIO Environment ...........................................................................................
11.7.3 GPIO Integration ..............................................................................................
11.7.4 GPIO Functional Description ................................................................................
11.7.5 GPIO Programming Guide ...................................................................................
11.7.6 GPIO Registers ................................................................................................
11.8 Inter-IC Module (I2C) ...................................................................................................
11.8.1 I2C Overview ..................................................................................................
11.8.2 I2C Environment...............................................................................................
11.8.3 I2C Integration .................................................................................................
11.8.4 I2C Functional Description ...................................................................................
11.8.5 I2C Programming Guide .....................................................................................
11.8.6 I2C Registers ..................................................................................................
11.8.7 I2C Appendix: I2C Lockup Issue ............................................................................
11.9 Multi-Channel Audio Serial Port (McASP) ...........................................................................
11.9.1 McASP Overview ..............................................................................................
11.9.2 McASP Environment ..........................................................................................
11.9.3 McASP Integration ............................................................................................
11.9.4 McASP Functional Description ..............................................................................
11.9.5 McASP Registers .............................................................................................
11.10 Multi-channel Buffered Serial Port (McBSP) ........................................................................
11.10.1 McBSP Overview ............................................................................................
11.10.2 McBSP Environment ........................................................................................
11.10.3 McBSP Integration ...........................................................................................
11.10.4 McBSP Functional Description .............................................................................
11.10.5 McBSP Programming Guide ...............................................................................
11.10.6 McBSP Registers ............................................................................................
11.11 Media Local Bus (MLB) ................................................................................................
11.11.1 MLB Overview ................................................................................................
11.11.2 MLB Environment ............................................................................................
11.11.3 MLB Integration ..............................................................................................
6
Contents
2215
2218
2267
2423
2423
2423
2424
2427
2439
2455
2455
2458
2461
2471
2533
2584
2584
2587
2589
2591
2610
2645
2645
2647
2649
2651
2660
2662
2716
2716
2718
2720
2722
2731
2732
2757
2761
2761
2763
2775
2778
2815
2986
2986
2988
2989
2991
3036
3045
3138
3138
3140
3141
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11.12
11.13
11.14
11.15
11.16
11.17
11.18
11.19
11.11.4 MLB Functional Description ................................................................................
11.11.5 MLB Programming Guide ...................................................................................
11.11.6 MLB Registers ...............................................................................................
MMC/SD .................................................................................................................
11.12.1 MMC/SD Overview ..........................................................................................
11.12.2 MMC/SD Environment ......................................................................................
11.12.3 MMC/SD Integration ........................................................................................
11.12.4 MMC/SD Functional Description ...........................................................................
11.12.5 MMC/SD Programming Guide .............................................................................
11.12.6 MMC/SD Registers ..........................................................................................
Networking Subsystem (NSS) .........................................................................................
11.13.1 NSS Overview ................................................................................................
11.13.2 Navigator Subsystem (NAVSS) ............................................................................
11.13.3 Memory Error Detection and Correction ..................................................................
11.13.4 Gigabit Ethernet MAC (EMAC) Subsystem ..............................................................
11.13.5 NSS Registers ...............................................................................................
Peripheral Component Interconnect Express Subsystem (PCIe SS) ............................................
11.14.1 PCIe SS Overview ...........................................................................................
11.14.2 PCIe SS Environment .......................................................................................
11.14.3 PCIe SS Integration .........................................................................................
11.14.4 PCIe SS Functional Description ...........................................................................
11.14.5 PCIe SS Registers...........................................................................................
Quad Serial Peripheral Interface (QSPI) .............................................................................
11.15.1 QSPI Overview ...............................................................................................
11.15.2 QSPI Environment ...........................................................................................
11.15.3 QSPI Integration ............................................................................................
11.15.4 QSPI Functional Description ...............................................................................
11.15.5 QSPI Programming Guide ..................................................................................
11.15.6 QSPI Registers...............................................................................................
Serial Peripheral Interface (SPI) ......................................................................................
11.16.1 SPI Overview .................................................................................................
11.16.2 SPI Environment .............................................................................................
11.16.3 SPI Integration ...............................................................................................
11.16.4 SPI Functional Description .................................................................................
11.16.5 SPI Programming Guide ....................................................................................
11.16.6 SPI Registers .................................................................................................
Timers ....................................................................................................................
11.17.1 Timers Overview .............................................................................................
11.17.2 Timers Environment .........................................................................................
11.17.3 Timers Integration ...........................................................................................
11.17.4 Timers Functional Description .............................................................................
11.17.5 Timers Programming Guide ................................................................................
11.17.6 Timers Registers .............................................................................................
Universal Asynchronous Receiver/Transmitter (UART) ...........................................................
11.18.1 UART Overview ..............................................................................................
11.18.2 UART Environment ..........................................................................................
11.18.3 UART Integration ............................................................................................
11.18.4 UART Functional Description ..............................................................................
11.18.5 UART Basic Programming Model .........................................................................
11.18.6 UART Registers ..............................................................................................
Universal Serial Bus Subsystem (USB) ..............................................................................
11.19.1 USB Overview ................................................................................................
11.19.2 USB Environment ............................................................................................
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Contents
3143
3161
3170
3204
3204
3206
3214
3216
3242
3261
3352
3352
3357
3389
3392
3459
3665
3665
3667
3668
3670
3720
3965
3965
3967
3968
3970
3986
3992
4056
4056
4057
4063
4065
4072
4074
4106
4106
4108
4110
4113
4129
4131
4159
4159
4161
4163
4165
4178
4179
4207
4207
4210
7
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11.19.3 USB2.0 Subsystem Application ............................................................................ 4212
11.19.4 USB Integration .............................................................................................. 4216
11.19.5 USB Registers ............................................................................................... 4221
12
On-chip Debug................................................................................................................ 4222
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Introduction to SoC Debug Architecture ..............................................................................
12.1.1 Overview .......................................................................................................
12.1.2 On-chip Debug Features .....................................................................................
12.1.3 Application Integration ........................................................................................
SoC Debug Interfaces ..................................................................................................
12.2.1 IEEE1149.1 JTAG Interface .................................................................................
12.2.2 ICEPick Module ...............................................................................................
12.2.3 Debug Port .....................................................................................................
12.2.4 Board Design Considerations ...............................................................................
DSP Subsystem Debug Features .....................................................................................
12.3.1 DSP Debug Modes ...........................................................................................
12.3.2 DSP Trace .....................................................................................................
12.3.3 DSP Advanced Event Triggering (AET) ....................................................................
12.3.4 DSP and Related Debug Components .....................................................................
12.3.5 DSP Debug Summary ........................................................................................
Arm Subsystem Debug Features .....................................................................................
12.4.1 ARMSS Debug Overview ....................................................................................
12.4.2 ARMSS Debug Modes .......................................................................................
12.4.3 ARMSS Trace .................................................................................................
12.4.4 ARMSS Software Instrumentation ..........................................................................
12.4.5 ARMSS Performance Monitoring ...........................................................................
12.4.6 ARMSS Cross-Triggering ....................................................................................
PMMC Debug Features ................................................................................................
SoC Level Debug Features ............................................................................................
12.6.1 System Trace ..................................................................................................
12.6.2 Tracer Architecture and Operation ..........................................................................
12.6.3 SoC Cross-Triggering.........................................................................................
12.6.4 Emulation Aware Peripherals ................................................................................
12.6.5 DMA Tooling ...................................................................................................
12.6.6 Power/Clock/Reset Emulation Support .....................................................................
12.6.7 Debug Boot Modes ...........................................................................................
Programming Guidelines ...............................................................................................
12.7.1 Application Support ...........................................................................................
12.7.2 Programming Overview ......................................................................................
4223
4223
4223
4225
4226
4226
4226
4228
4230
4231
4231
4232
4234
4234
4235
4237
4237
4237
4237
4238
4238
4238
4239
4240
4240
4245
4258
4261
4264
4265
4267
4267
4267
4267
A
Glossary ........................................................................................................................ 4269
8
Contents
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List of Figures
1-1.
Device Environment Diagram ........................................................................................... 202
1-2.
Device Block Diagram .................................................................................................... 203
3-1.
System Interconnect Overview.......................................................................................... 223
3-2.
TeraNet_DMA Master-Slave Connections............................................................................. 225
3-3.
TeraNet_CFG Master-Slave Connections ............................................................................. 228
3-4.
TeraNet_AON Master-Slave Connections ............................................................................. 231
3-5.
MPU Integration ........................................................................................................... 234
3-6.
MPU Block Diagram ...................................................................................................... 236
3-7.
MPU_REVID Register .................................................................................................... 247
3-8.
MPU_CONFIG Register
3-9.
3-10.
3-11.
3-12.
3-13.
3-14.
3-15.
3-16.
3-17.
3-18.
3-19.
4-1.
4-2.
4-3.
4-4.
4-5.
4-6.
4-7.
4-8.
4-9.
4-10.
4-11.
4-12.
4-13.
4-14.
4-15.
5-1.
5-2.
5-3.
5-4.
5-5.
5-6.
5-7.
5-8.
5-9.
5-10.
5-11.
.................................................................................................
MPU_IRAWSTAT Register ..............................................................................................
MPU_IENSTAT Register.................................................................................................
MPU_IENSET Register ..................................................................................................
MPU_IENCLR Register ..................................................................................................
MPU_EOI Register .......................................................................................................
MPU_PROGx_MPSAR Register........................................................................................
MPU_PROGx_MPEAR Register........................................................................................
MPU_PROGx_MPPAR Register........................................................................................
MPU_FLTADDRR Register..............................................................................................
MPU_FLTSTAT Register ................................................................................................
MPU_FLTCLR Register ..................................................................................................
Boot Process ..............................................................................................................
External Bootloader Tasks...............................................................................................
BOOTMODE Pin Mapping ...............................................................................................
Sleep/I2C Slave Boot Mode Configuration Fields .....................................................................
PCIE Boot Mode Configuration Fields .................................................................................
I2C Master Boot Mode Configuration Fields ...........................................................................
SPI without PLL Boot Mode Configuration Fields ....................................................................
SPI with PLL Boot Mode Configuration Fields ........................................................................
QSPI Boot Mode Configuration Fields .................................................................................
XIP Boot Mode Configuration Fields ...................................................................................
Ethernet Boot Mode Configuration Fields .............................................................................
USB Boot Mode Configuration Fields ..................................................................................
MMCSD Boot Mode Configuration Fields .............................................................................
UART Boot Mode Configuration Fields ................................................................................
PLL Configuration Fields .................................................................................................
BOOT_CFG Integration ..................................................................................................
External Signals and Registers Associated with Them ..............................................................
Event Multiplexers ........................................................................................................
Reset Mux Sheme ........................................................................................................
MLB I/O Cells And Their Controls ......................................................................................
BOOTCFG_REVISION Register ........................................................................................
BOOTCFG_JTAGID Register ...........................................................................................
BOOTCFG_DEVSTAT Register ........................................................................................
BOOTCFG_KICK0 Register .............................................................................................
BOOTCFG_KICK1 Register .............................................................................................
BOOTCFG_DSP_BOOT_ADDR0 Register ...........................................................................
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
248
251
253
255
257
259
260
263
266
270
271
273
281
282
283
284
285
286
287
288
289
290
291
292
293
294
297
320
327
331
332
334
345
346
347
349
350
351
9
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5-12.
5-13.
5-14.
5-15.
5-16.
5-17.
5-18.
5-19.
5-20.
5-21.
5-22.
5-23.
5-24.
5-25.
5-26.
5-27.
5-28.
5-29.
5-30.
5-31.
5-32.
5-33.
5-34.
5-35.
5-36.
5-37.
5-38.
5-39.
5-40.
5-41.
5-42.
5-43.
5-44.
5-45.
5-46.
5-47.
5-48.
5-49.
5-50.
5-51.
5-52.
5-53.
5-54.
5-55.
5-56.
5-57.
5-58.
5-59.
5-60.
10
.......................................................................
BOOTCFG_INTR_ENABLED_STAT_CLR Register .................................................................
BOOTCFG_INTR_ENABLE Register ..................................................................................
BOOTCFG_INTR_ENABLE_CLR Register ...........................................................................
BOOTCFG_EOI Register ................................................................................................
BOOTCFG_FAULT_ADDR Register ...................................................................................
BOOTCFG_FAULT_STAT Register ....................................................................................
BOOTCFG_FAULT_CLR Register .....................................................................................
BOOTCFG_MACID0 Register ..........................................................................................
BOOTCFG_MACID1 Register ..........................................................................................
BOOTCFG_PCIEVENDORID Register ................................................................................
BOOTCFG_LRSTNMISTAT_CLR Register ...........................................................................
BOOTCFG_RESET_STAT_CLR Register ............................................................................
BOOTCFG_BOOT_COMPLETE Register.............................................................................
BOOTCFG_RESET_STAT Register ...................................................................................
BOOTCFG_LRSTNMISTAT Register ..................................................................................
BOOTCFG_DEVCFG Register .........................................................................................
BOOTCFG_PWR_STATE Register ....................................................................................
BOOTCFG_INITIATOR_PRIORITY0 Register .......................................................................
BOOTCFG_INITIATOR_PRIORITY1 Register .......................................................................
BOOTCFG_NMIGR0 Register ..........................................................................................
BOOTCFG_IPCGR0 Register...........................................................................................
BOOTCFG_IPCGR8 Register...........................................................................................
BOOTCFG_IPCGR11 Register .........................................................................................
BOOTCFG_IPCGR12 Register .........................................................................................
BOOTCFG_IPCGR13 Register .........................................................................................
BOOTCFG_IPCGR14 Register .........................................................................................
BOOTCFG_IPCGRH Register ..........................................................................................
BOOTCFG_IPCAR0 Register ...........................................................................................
BOOTCFG_IPCAR8 Register ...........................................................................................
BOOTCFG_IPCAR11 Register .........................................................................................
BOOTCFG_IPCAR12 Register .........................................................................................
BOOTCFG_IPCAR13 Register .........................................................................................
BOOTCFG_IPCAR14 Register .........................................................................................
BOOTCFG_IPCARH Register ..........................................................................................
BOOTCFG_TINPSEL0 Register ........................................................................................
BOOTCFG_TINPSEL1 Register ........................................................................................
BOOTCFG_TOUTPSEL0 Register .....................................................................................
BOOTCFG_RSTMUX0 Register ........................................................................................
BOOTCFG_RSTMUX8 Register ........................................................................................
BOOTCFG_MAIN_PLL_CTL0 Register ...............................................................................
BOOTCFG_MAIN_PLL_CTL1 Register ...............................................................................
BOOTCFG_NSS_PLL_CTL0 Register .................................................................................
BOOTCFG_NSS_PLL_CTL1 Register .................................................................................
BOOTCFG_DDR3A_PLL_CTL0 Register .............................................................................
BOOTCFG_DDR3A_PLL_CTL1 Register .............................................................................
BOOTCFG_ARM_PLL_CTL0 Register ................................................................................
BOOTCFG_ARM_PLL_CTL1 Register ................................................................................
BOOTCFG_DSS_PLL_CTL0 Register .................................................................................
BOOTCFG_INTR_RAW_STAT_SET Register
List of Figures
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
372
373
374
376
378
380
382
384
386
388
389
390
391
392
393
394
395
397
398
400
402
404
405
406
407
408
409
411
412
413
SPRUHY8I – January 2016 – Revised March 2019
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www.ti.com
5-61.
BOOTCFG_DSS_PLL_CTL1 Register ................................................................................. 414
5-62.
BOOTCFG_ICSS_PLL_CTL0 Register ................................................................................ 415
5-63.
BOOTCFG_ICSS_PLL_CTL1 Register ................................................................................ 416
5-64.
BOOTCFG_UART_PLL_CTL0 Register ............................................................................... 417
5-65.
BOOTCFG_UART_PLL_CTL1 Register ............................................................................... 418
5-66.
BOOTCFG_ARMENDIAN_CFGx_0 Register ......................................................................... 419
5-67.
BOOTCFG_ARMENDIAN_CFGx_1 Register ......................................................................... 420
5-68.
BOOTCFG_ARMENDIAN_CFGx_2 Register ......................................................................... 422
5-69.
BOOTCFG_ARMTBR_TRBx_W0 Register
5-70.
5-71.
5-72.
5-73.
5-74.
5-75.
5-76.
5-77.
5-78.
5-79.
5-80.
5-81.
5-82.
5-83.
5-84.
5-85.
5-86.
5-87.
5-88.
5-89.
5-90.
5-91.
5-92.
5-93.
5-94.
5-95.
5-96.
5-97.
5-98.
5-99.
5-100.
5-101.
5-102.
5-103.
5-104.
5-105.
5-106.
5-107.
5-108.
5-109.
...........................................................................
BOOTCFG_ARMTBR_TRBx_W1 Register ...........................................................................
BOOTCFG_ARMTBR_TRBx_W2 Register ...........................................................................
BOOTCFG_ARMTBR_TRBx_W3 Register ...........................................................................
BOOTCFG_ARMTBR_SHDW_TRBx_W0 Register ..................................................................
BOOTCFG_ARMTBR_SHDW_TRBx_W1 Register ..................................................................
BOOTCFG_ARMTBR_SHDW_TRBx_W2 Register ..................................................................
BOOTCFG_ARMTBR_SHDW_TRBx_W3 Register ..................................................................
BOOTCFG_DBGTBR_TRBx_W0 Register............................................................................
BOOTCFG_DBGTBR_TRBx_W1 Register............................................................................
BOOTCFG_DBGTBR_TRBx_W2 Register............................................................................
BOOTCFG_DBGTBR_TRBx_W3 Register............................................................................
BOOTCFG_DBGTBR_SHDW_TRBx_W0 Register ..................................................................
BOOTCFG_DBGTBR_SHDW_TRBx_W1 Register ..................................................................
BOOTCFG_DBGTBR_SHDW_TRBx_W2 Register ..................................................................
BOOTCFG_DBGTBR_SHDW_TRBx_W3 Register ..................................................................
BOOTCFG_SPARE1 Register ..........................................................................................
BOOTCFG_DDR_CLKCTL Register ...................................................................................
BOOTCFG_ICSS_CLKCTL Register ..................................................................................
BOOTCFG_ETHERNET_CLKCTL Register ..........................................................................
BOOTCFG_USB0_CLKCTL Register ..................................................................................
BOOTCFG_USB1_CLKCTL Register ..................................................................................
BOOTCFG_SERIALPORT_CLKCTL Register ........................................................................
BOOTCFG_OSC_CTL Register ........................................................................................
BOOTCFG_PCIE_CLKCTL Register ..................................................................................
BOOTCFG_CHIP_MISC_CTL0 Register ..............................................................................
BOOTCFG_SYSENDSTAT Register...................................................................................
BOOTCFG_PLLLOCK_PINCTL Register .............................................................................
BOOTCFG_PLLLOCK_STAT Register ................................................................................
BOOTCFG_PLLLOCK_EVAL Register ................................................................................
BOOTCFG_PLLCLKSEL_STAT Register .............................................................................
BOOTCFG_USB0_PHY_CTL0 Register ..............................................................................
BOOTCFG_USB0_PHY_CTL1 Register ..............................................................................
BOOTCFG_USB0_PHY_CTL2 Register ..............................................................................
BOOTCFG_USB0_PHY_CTL4 Register ..............................................................................
BOOTCFG_USB1_PHY_CTL0 Register ..............................................................................
BOOTCFG_USB1_PHY_CTL1 Register ..............................................................................
BOOTCFG_USB1_PHY_CTL2 Register ..............................................................................
BOOTCFG_USB1_PHY_CTL4 Register ..............................................................................
BOOTCFG_USB0_EBC_IN_CTL Register ............................................................................
BOOTCFG_USB1_EBC_IN_CTL Register ............................................................................
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
447
449
450
451
452
453
455
457
458
459
460
463
465
467
468
471
473
474
11
www.ti.com
5-110. BOOTCFG_SCRATCH0 Register ...................................................................................... 475
5-111. BOOTCFG_SCRATCH1 Register ...................................................................................... 476
5-112. BOOTCFG_SCRATCH2 Register ...................................................................................... 477
5-113. BOOTCFG_SCRATCH3 Register ...................................................................................... 478
5-114. BOOTCFG_SCRATCH4 Register ...................................................................................... 479
5-115. BOOTCFG_SCRATCH5 Register ...................................................................................... 480
5-116. BOOTCFG_SCRATCH6 Register ...................................................................................... 481
5-117. BOOTCFG_SCRATCH7 Register ...................................................................................... 482
5-118. BOOTCFG_SCRATCH8 Register ...................................................................................... 483
5-119. BOOTCFG_SCRATCH9 Register ...................................................................................... 484
5-120. BOOTCFG_SCRATCH10 Register..................................................................................... 485
5-121. BOOTCFG_SCRATCH11 Register..................................................................................... 486
5-122. BOOTCFG_SCRATCH12 Register..................................................................................... 487
5-123. BOOTCFG_SCRATCH13 Register..................................................................................... 488
5-124. BOOTCFG_SCRATCH14 Register..................................................................................... 489
5-125. BOOTCFG_SCRATCH15 Register..................................................................................... 490
5-126. BOOTCFG_DSP_BOOT_ADDR0_NS Register ...................................................................... 491
5-127. BOOTCFG_OBSCLKCTL Register..................................................................................... 492
5-128. BOOTCFG_EFUSE_BOOTROM Register ............................................................................ 494
495
5-130. BOOTCFG_EVENT_MUXCTL1 Register
496
5-131.
497
5-132.
5-133.
5-134.
5-135.
5-136.
5-137.
5-138.
5-139.
5-140.
5-141.
5-142.
5-143.
5-144.
5-145.
5-146.
5-147.
5-148.
5-149.
5-150.
5-151.
5-152.
5-153.
5-154.
5-155.
5-156.
5-157.
5-158.
12
.............................................................................
.............................................................................
BOOTCFG_EVENT_MUXCTL2 Register .............................................................................
BOOTCFG_EVENT_MUXCTL3 Register .............................................................................
BOOTCFG_EVENT_MUXCTL4 Register .............................................................................
BOOTCFG_EVENT_MUXCTL5 Register .............................................................................
BOOTCFG_EVENT_MUXCTL6 Register .............................................................................
BOOTCFG_EVENT_MUXCTL7 Register .............................................................................
BOOTCFG_EVENT_MUXCTL8 Register .............................................................................
BOOTCFG_EVENT_MUXCTL9 Register .............................................................................
BOOTCFG_EVENT_MUXCTL10 Register ............................................................................
BOOTCFG_EVENT_MUXCTL11 Register ............................................................................
BOOTCFG_EVENT_MUXCTL12 Register ............................................................................
BOOTCFG_EVENT_MUXCTL13 Register ............................................................................
BOOTCFG_DCAN_RAMINIT Register ................................................................................
BOOTCFG_ETHERNET_CFG Register ...............................................................................
BOOTCFG_MLB_SIG_IO_CTL Register ..............................................................................
BOOTCFG_MLB_DAT_IO_CTL Register .............................................................................
BOOTCFG_MLB_CLK_IO_CTL Register .............................................................................
BOOTCFG_EPWM_CTL Register......................................................................................
BOOTCFG_ECAP_CAPEVT_CTL Register ..........................................................................
BOOTCFG_EQEP_STAT Register .....................................................................................
BOOTCFG_LVDS_BG_CTL Register..................................................................................
BOOTCFG_LDO_USB_CTL Register .................................................................................
BOOTCFG_LDO_PCIE_CTL Register .................................................................................
BOOTCFG_PADCONFIG0 to BOOTCFG_PADCONFIG259 Registers ..........................................
PID Register ...............................................................................................................
PTCMD Register ..........................................................................................................
PTSTAT Register .........................................................................................................
PDSTAT0 to PDSTAT17 Register ......................................................................................
5-129. BOOTCFG_EVENT_MUXCTL0 Register
List of Figures
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
516
517
518
519
520
521
530
531
532
533
SPRUHY8I – January 2016 – Revised March 2019
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.........................................................................................
MDSTAT0 to MDSTAT31 Register .....................................................................................
MDCTL0 to MDCTL31 Register ........................................................................................
HHV Condition and Default Pull States on the Device IO ...........................................................
Top-Level Clock Diagram ................................................................................................
Device Audio Modules Clocking ........................................................................................
PLLs Integration...........................................................................................................
MAIN PLL and PLL Controller ..........................................................................................
PLL and PLL Controller Generic Block Diagram .....................................................................
Example Clock Ratio Change and Alignment with GO Operation .................................................
PLLCTL Register..........................................................................................................
SECCTL Register .........................................................................................................
PLLM Register ............................................................................................................
PLLDIV1 Register .........................................................................................................
PLLDIV2 Register .........................................................................................................
PLLDIV3 Register .........................................................................................................
PLLDIV4 Register .........................................................................................................
PLLCMD Register ........................................................................................................
PLLSTAT Register ........................................................................................................
ALNCTL Register .........................................................................................................
DCHANGE Register ......................................................................................................
SYSTAT Register .........................................................................................................
RSTYPE Register .........................................................................................................
RSCTRL Register .........................................................................................................
RSCFG Register ..........................................................................................................
RSISO Register ...........................................................................................................
Arm Subsystem Overview ...............................................................................................
AINTC Block Diagram ....................................................................................................
Arm Subsystem Clock Distribution .....................................................................................
AXI2VBUS_PID Register ................................................................................................
AXI2VBUS_CMD_PRI Register.........................................................................................
AXI2VBUS_CPU0_END Register ......................................................................................
ARM_PID Register .......................................................................................................
ARM_INTC_PID Register ................................................................................................
STM_DISABLE Register .................................................................................................
PD_CPU0_PTCMD Register ............................................................................................
PD_CPU0_PDSTAT Register ...........................................................................................
PD_CPU0_PDCTL Register .............................................................................................
C66x CorePac Overview .................................................................................................
L1P Memory Configurations .............................................................................................
L1D Memory Configurations.............................................................................................
L2 Memory Configurations...............................................................................................
PRU-ICSS Overview .....................................................................................................
PRU-ICSS Internal Wrapper Multiplexing .............................................................................
PRU-ICSS_0 External Interface I/Os ...................................................................................
PRU-ICSS_1 External Interface I/Os ...................................................................................
PRU-ICSS_0 Integration in the Device ................................................................................
PRU-ICSS_1 Integration in the Device ................................................................................
PRUSS_REVID Register ................................................................................................
5-159. PDCTL0 to PDCTL17 Register
534
5-160.
535
5-161.
5-162.
5-163.
5-164.
5-165.
5-166.
5-167.
5-168.
5-169.
5-170.
5-171.
5-172.
5-173.
5-174.
5-175.
5-176.
5-177.
5-178.
5-179.
5-180.
5-181.
5-182.
5-183.
5-184.
6-1.
6-2.
6-3.
6-4.
6-5.
6-6.
6-7.
6-8.
6-9.
6-10.
6-11.
6-12.
6-13.
6-14.
6-15.
6-16.
6-17.
6-18.
6-19.
6-20.
6-21.
6-22.
6-23.
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
537
544
554
558
559
560
562
568
570
572
573
574
575
576
577
578
579
580
582
584
585
586
587
589
596
600
611
614
615
616
618
619
620
621
622
623
625
634
635
636
638
640
652
653
654
655
663
13
www.ti.com
6-24.
PRUSS_GPCFG0 Register.............................................................................................. 664
6-25.
PRUSS_GPCFG1 Register.............................................................................................. 667
6-26.
PRUSS_CGR Register ................................................................................................... 669
6-27.
PRUSS_PMAO Register ................................................................................................. 672
6-28.
PRUSS_MII_RT Register ................................................................................................ 673
6-29.
PRUSS_IEPCLK Register ............................................................................................... 674
6-30.
PRUSS_SPP Register ................................................................................................... 675
6-31.
PRUSS_PIN_MX Register............................................................................................... 676
6-32.
PRU Block Diagram ...................................................................................................... 678
6-33.
PRU Module Interface .................................................................................................... 680
6-34.
Event Interface Mapping (R31)
6-35.
6-36.
6-37.
6-38.
6-39.
6-40.
6-41.
6-42.
6-43.
6-44.
6-45.
6-46.
6-47.
6-48.
6-49.
6-50.
6-51.
6-52.
6-53.
6-54.
6-55.
6-56.
6-57.
6-58.
6-59.
6-60.
6-61.
6-62.
6-63.
6-64.
6-65.
6-66.
6-67.
6-68.
6-69.
6-70.
6-71.
6-72.
14
.........................................................................................
PRU R31 (EGPI) Direct Input Mode Block Diagram .................................................................
PRU R31 (EGPI) 16-Bit Parallel Capture Mode Block Diagram ....................................................
PRU R31 (EGPI) 28-Bit Shift Mode ....................................................................................
PRU R30 (EGPO) Direct Output Mode Block Diagram ..............................................................
PRU R30 (GPO) Shift Out Mode Block Diagram .....................................................................
Sigma Delta Block Diagram .............................................................................................
Sigma Delta Hardware Integrators Block Diagram (snoop = 0) ....................................................
Sigma Delta Hardware Integrators Block Diagram (snoop = 1) ....................................................
Peripheral I/F Block Diagram ............................................................................................
TX Mode Start Condition.................................................................................................
ENDAT<m>_CLK Stop High on Last RX Frame .....................................................................
ENDAT<m>_CLK Stop Low on Last RX Frame ......................................................................
ENDAT<m>_CLK Run Continuously ...................................................................................
ENDAT<m>_CLK Stop High on Last TX Bit ..........................................................................
Integration of the PRU and MPY/MAC ................................................................................
MAC Multiply-only Mode- Functional Diagram .......................................................................
MAC Multiply and Accumulate Mode Functional Diagram .........................................................
ScratchPad and PRU Integration .......................................................................................
ECC Aggregator Block Diagram ........................................................................................
ECC_REVISION Register ...............................................................................................
ECC_VECTOR Register .................................................................................................
ECC_MISC_STATUS Register .........................................................................................
ECC_WRAPPER_REVISION Register ................................................................................
ECC_CONTROL Register ...............................................................................................
ECC_ERROR_CONTROL1 Register ..................................................................................
ECC_ERROR_CONTROL2 Register ..................................................................................
ECC_ERROR_STATUS1 Register .....................................................................................
ECC_ERROR_STATUS2 Register .....................................................................................
ECC_EOI Register........................................................................................................
ECC_INT_STATUS_0 to ECC_INT_STATUS_15 Register .........................................................
ECC_INT_ENABLE_0 to ECC_INT_ENABLE_15 Register .........................................................
ECC_INT_CLEAR_0 to ECC_INT_CLEAR_15 Register ............................................................
PRU_CONTROL Register ...............................................................................................
PRU_STATUS Register..................................................................................................
PRU_WAKEUP_EN Register ...........................................................................................
PRU_CYCLE Register ...................................................................................................
PRU_STALL Register ....................................................................................................
PRU_CTBIR0 Register ...................................................................................................
List of Figures
681
683
684
685
686
687
690
692
692
696
700
701
702
703
704
708
709
709
713
715
718
719
720
721
722
723
724
725
727
728
729
730
731
733
735
736
737
738
739
SPRUHY8I – January 2016 – Revised March 2019
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www.ti.com
6-73.
PRU_CTBIR1 Register ................................................................................................... 740
6-74.
PRU_CTPPR0 Register.................................................................................................. 741
6-75.
PRU_CTPPR1 Register.................................................................................................. 742
6-76.
PRU_ICSS_DBG_GPREG0 Register .................................................................................. 747
6-77.
PRU_ICSS_DBG_GPREG1 Register .................................................................................. 748
6-78.
PRU_ICSS_DBG_GPREG2 Register .................................................................................. 749
6-79.
PRU_ICSS_DBG_GPREG3 Register .................................................................................. 750
6-80.
PRU_ICSS_DBG_GPREG4 Register .................................................................................. 751
6-81.
PRU_ICSS_DBG_GPREG5 Register .................................................................................. 752
6-82.
PRU_ICSS_DBG_GPREG6 Register .................................................................................. 753
6-83.
PRU_ICSS_DBG_GPREG7 Register .................................................................................. 754
6-84.
PRU_ICSS_DBG_GPREG8 Register .................................................................................. 755
6-85.
PRU_ICSS_DBG_GPREG9 Register .................................................................................. 756
6-86.
PRU_ICSS_DBG_GPREG10 Register
6-87.
6-88.
6-89.
6-90.
6-91.
6-92.
6-93.
6-94.
6-95.
6-96.
6-97.
6-98.
6-99.
6-100.
6-101.
6-102.
6-103.
6-104.
6-105.
6-106.
6-107.
6-108.
6-109.
6-110.
6-111.
6-112.
6-113.
6-114.
6-115.
6-116.
6-117.
6-118.
6-119.
6-120.
6-121.
................................................................................
PRU_ICSS_DBG_GPREG11 Register ................................................................................
PRU_ICSS_DBG_GPREG12 Register ................................................................................
PRU_ICSS_DBG_GPREG13 Register ................................................................................
PRU_ICSS_DBG_GPREG14 Register ................................................................................
PRU_ICSS_DBG_GPREG15 Register ................................................................................
PRU_ICSS_DBG_GPREG16 Register ................................................................................
PRU_ICSS_DBG_GPREG17 Register ................................................................................
PRU_ICSS_DBG_GPREG18 Register ................................................................................
PRU_ICSS_DBG_GPREG19 Register ................................................................................
PRU_ICSS_DBG_GPREG20 Register ................................................................................
PRU_ICSS_DBG_GPREG21 Register ................................................................................
PRU_ICSS_DBG_GPREG22 Register ................................................................................
PRU_ICSS_DBG_GPREG23 Register ................................................................................
PRU_ICSS_DBG_GPREG24 Register ................................................................................
PRU_ICSS_DBG_GPREG25 Register ................................................................................
PRU_ICSS_DBG_GPREG26 Register ................................................................................
PRU_ICSS_DBG_GPREG27 Register ................................................................................
PRU_ICSS_DBG_GPREG28 Register ................................................................................
PRU_ICSS_DBG_GPREG29 Register ................................................................................
PRU_ICSS_DBG_GPREG30 Register ................................................................................
PRU_ICSS_DBG_GPREG31 Register ................................................................................
PRU_ICSS_DBG_CT_REG0 Register .................................................................................
PRU_ICSS_DBG_CT_REG1 Register .................................................................................
PRU_ICSS_DBG_CT_REG2 Register .................................................................................
PRU_ICSS_DBG_CT_REG3 Register .................................................................................
PRU_ICSS_DBG_CT_REG4 Register .................................................................................
PRU_ICSS_DBG_CT_REG5 Register .................................................................................
PRU_ICSS_DBG_CT_REG6 Register .................................................................................
PRU_ICSS_DBG_CT_REG7 Register .................................................................................
PRU_ICSS_DBG_CT_REG8 Register .................................................................................
PRU_ICSS_DBG_CT_REG9 Register .................................................................................
PRU_ICSS_DBG_CT_REG10 Register ...............................................................................
PRU_ICSS_DBG_CT_REG11 Register ...............................................................................
PRU_ICSS_DBG_CT_REG12 Register ...............................................................................
PRU_ICSS_DBG_CT_REG13 Register ...............................................................................
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
15
www.ti.com
6-122. PRU_ICSS_DBG_CT_REG14 Register ............................................................................... 793
6-123. PRU_ICSS_DBG_CT_REG15 Register ............................................................................... 794
6-124. PRU_ICSS_DBG_CT_REG16 Register ............................................................................... 795
6-125. PRU_ICSS_DBG_CT_REG17 Register ............................................................................... 796
6-126. PRU_ICSS_DBG_CT_REG18 Register ............................................................................... 797
6-127. PRU_ICSS_DBG_CT_REG19 Register ............................................................................... 798
6-128. PRU_ICSS_DBG_CT_REG20 Register ............................................................................... 799
6-129. PRU_ICSS_DBG_CT_REG21 Register ............................................................................... 800
6-130. PRU_ICSS_DBG_CT_REG22 Register ............................................................................... 801
6-131. PRU_ICSS_DBG_CT_REG23 Register ............................................................................... 802
6-132. PRU_ICSS_DBG_CT_REG24 Register ............................................................................... 803
6-133. PRU_ICSS_DBG_CT_REG25 Register ............................................................................... 804
6-134. PRU_ICSS_DBG_CT_REG26 Register ............................................................................... 805
6-135. PRU_ICSS_DBG_CT_REG27 Register ............................................................................... 806
6-136. PRU_ICSS_DBG_CT_REG28 Register ............................................................................... 807
6-137. PRU_ICSS_DBG_CT_REG29 Register ............................................................................... 808
6-138. PRU_ICSS_DBG_CT_REG30 Register ............................................................................... 809
6-139. PRU_ICSS_DBG_CT_REG31 Register ............................................................................... 810
6-140. PRU-ICSS Interrupt Controller Block Diagram ........................................................................ 812
6-141. Flow of System Interrupts to Host ...................................................................................... 812
6-142. PRUSS_INTC_REVID Register......................................................................................... 825
6-143. PRUSS_INTC_CR Register ............................................................................................. 826
6-144. PRUSS_INTC_GER Register ........................................................................................... 827
828
6-146.
829
6-147.
6-148.
6-149.
6-150.
6-151.
6-152.
6-153.
6-154.
6-155.
6-156.
6-157.
6-158.
6-159.
6-160.
6-161.
6-162.
6-163.
6-164.
6-165.
6-166.
6-167.
6-168.
6-169.
6-170.
16
.........................................................................................
PRUSS_INTC_SISR Register...........................................................................................
PRUSS_INTC_SICR Register ..........................................................................................
PRUSS_INTC_EISR Register...........................................................................................
PRUSS_INTC_EICR Register ..........................................................................................
PRUSS_INTC_HIEISR Register ........................................................................................
PRUSS_INTC_HIDISR Register ........................................................................................
PRUSS_INTC_GPIR Register ..........................................................................................
PRUSS_INTC_SRSR0 Register ........................................................................................
PRUSS_INTC_SRSR1 Register ........................................................................................
PRUSS_INTC_SECR0 Register ........................................................................................
PRUSS_INTC_SECR1 Register ........................................................................................
PRUSS_INTC_ESR0 Register ..........................................................................................
PRUSS_INTC_ERS1 Register ..........................................................................................
PRUSS_INTC_ECR0 Register ..........................................................................................
PRUSS_INTC_ECR1 Register ..........................................................................................
PRUSS_INTC_CMR_0 Register ........................................................................................
PRUSS_INTC_CMR_1 Register ........................................................................................
PRUSS_INTC_CMR_2 Register ........................................................................................
PRUSS_INTC_CMR_3 Register ........................................................................................
PRUSS_INTC_CMR_4 Register ........................................................................................
PRUSS_INTC_CMR_5 Register ........................................................................................
PRUSS_INTC_CMR_6 Register ........................................................................................
PRUSS_INTC_CMR_7 Register ........................................................................................
PRUSS_INTC_CMR_8 Register ........................................................................................
PRUSS_INTC_CMR_9 Register ........................................................................................
6-145. PRUSS_INTC_GNLR Register
List of Figures
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
SPRUHY8I – January 2016 – Revised March 2019
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6-171. PRUSS_INTC_CMR_10 Register ...................................................................................... 854
6-172. PRUSS_INTC_CMR_11 Register ...................................................................................... 855
6-173. PRUSS_INTC_CMR_12 Register ...................................................................................... 856
6-174. PRUSS_INTC_CMR_13 Register ...................................................................................... 857
6-175. PRUSS_INTC_CMR_14 Register ...................................................................................... 858
6-176. PRUSS_INTC_CMR_15 Register ...................................................................................... 859
6-177. PRUSS_INTC_HMR0 Register ......................................................................................... 860
6-178. PRUSS_INTC_HMR1 Register ......................................................................................... 861
6-179. PRUSS_INTC_HMR2 Register ......................................................................................... 862
6-180. PRUSS_INTC_HIPIR_0 Register ....................................................................................... 863
6-181. PRUSS_INTC_HIPIR_1 Register ....................................................................................... 864
6-182. PRUSS_INTC_HIPIR_2 Register ....................................................................................... 865
6-183. PRUSS_INTC_HIPIR_3 Register ....................................................................................... 866
6-184. PRUSS_INTC_HIPIR_4 Register ....................................................................................... 867
6-185. PRUSS_INTC_HIPIR_5 Register ....................................................................................... 868
6-186. PRUSS_INTC_HIPIR_6 Register ....................................................................................... 869
6-187. PRUSS_INTC_HIPIR_7 Register ....................................................................................... 870
6-188. PRUSS_INTC_HIPIR_8 Register ....................................................................................... 871
6-189. PRUSS_INTC_HIPIR_9 Register ....................................................................................... 872
6-190. PRUSS_INTC_SIPR0 Register ......................................................................................... 873
6-191. PRUSS_INTC_SIPR1 Register ......................................................................................... 874
6-192. PRUSS_INTC_SITR0 Register ......................................................................................... 875
6-193. PRUSS_INTC_SITR1 Register ......................................................................................... 876
6-194. PRUSS_INTC_HINLR_0 Register ...................................................................................... 877
6-195. PRUSS_INTC_HINLR_1 Register ...................................................................................... 878
6-196. PRUSS_INTC_HINLR_2 Register ...................................................................................... 879
6-197. PRUSS_INTC_HINLR_3 Register ...................................................................................... 880
6-198. PRUSS_INTC_HINLR_4 Register ...................................................................................... 881
6-199. PRUSS_INTC_HINLR_5 Register ...................................................................................... 882
6-200. PRUSS_INTC_HINLR_6 Register ...................................................................................... 883
6-201. PRUSS_INTC_HINLR_7 Register ...................................................................................... 884
6-202. PRUSS_INTC_HINLR_8 Register ...................................................................................... 885
6-203. PRUSS_INTC_HINLR_9 Register ...................................................................................... 886
..........................................................................................
PRU-ICSS UART Protocol Formats ....................................................................................
PRU-ICSS UART Clock Generation Diagram.........................................................................
Relationships Between PRU-ICSS UART Data Bit, BCLK, and Input Clock .....................................
PRU-ICSS UART Block Diagram .......................................................................................
PRU-ICSS UART Interrupt Request Enable Paths ...................................................................
UART Interface Using Autoflow Diagram ..............................................................................
Autoflow Functional Timing Waveforms for UART0_RTS ..........................................................
Autoflow Functional Timing Waveforms for UART0_CTS ..........................................................
PRUSS_UART_RBR_THR_REGISTERS Register ..................................................................
PRUSS_UART_INTERRUPT_ENABLE_REGISTER Register .....................................................
PRUSS_UART_INTERRUPT_IDENTIFICATION_REGISTER_FIFO_CONTROL_REGISTER Register ....
PRUSS_UART_LINE_CONTROL_REGISTER Register ............................................................
PRUSS_UART_MODEM_CONTROL_REGISTER Register .......................................................
PRUSS_UART_LINE_STATUS_REGISTER Register ..............................................................
PRUSS_UART_MODEM_STATUS_REGISTER Register ..........................................................
6-204. PRUSS_INTC_HIER Register
887
6-205.
889
6-206.
6-207.
6-208.
6-209.
6-210.
6-211.
6-212.
6-213.
6-214.
6-215.
6-216.
6-217.
6-218.
6-219.
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
891
892
894
896
900
901
901
904
905
907
910
912
914
918
17
www.ti.com
920
6-221.
921
6-222.
6-223.
6-224.
6-225.
6-226.
6-227.
6-228.
6-229.
6-230.
6-231.
6-232.
6-233.
6-234.
6-235.
6-236.
6-237.
6-238.
6-239.
6-240.
6-241.
6-242.
6-243.
6-244.
6-245.
6-246.
6-247.
6-248.
6-249.
6-250.
6-251.
6-252.
6-253.
6-254.
6-255.
6-256.
6-257.
6-258.
6-259.
6-260.
6-261.
6-262.
6-263.
6-264.
6-265.
6-266.
6-267.
6-268.
18
...................................................................
PRUSS_UART_DIVISOR_REGISTER_LSB_ Register .............................................................
PRUSS_UART_DIVISOR_REGISTER_MSB_ Register.............................................................
PRUSS_UART_PERIPHERAL_ID_REGISTER Register ...........................................................
PRUSS_UART_POWERMANAGEMENT_AND_EMULATION_REGISTER Register...........................
PRUSS_UART_MODE_DEFINITION_REGISTER Register ........................................................
PRUSS_ECAP_TSCNT Register .......................................................................................
PRUSS_ECAP_CNTPHS Register .....................................................................................
PRUSS_ECAP_CAP1 Register .........................................................................................
PRUSS_ECAP_CAP2 Register .........................................................................................
PRUSS_ECAP_CAP3 Register .........................................................................................
PRUSS_ECAP_CAP4 Register .........................................................................................
PRUSS_ECAP_ECCTL1 Register .....................................................................................
PRUSS_ECAP_ECCTL2 Register .....................................................................................
PRUSS_ECAP_ECEINT Register ......................................................................................
PRUSS_ECAP_ECFLG Register .......................................................................................
PRUSS_ECAP_ECCLR Register .......................................................................................
PRUSS_ECAP_ECFRC Register ......................................................................................
PRUSS_ECAP_PID Register ...........................................................................................
MII_RT Block Diagram ...................................................................................................
Auto-forward ...............................................................................................................
Auto-forward with PRU Snoop ..........................................................................................
8- or 16-bit Processing with On-the-Fly Modifications ...............................................................
32-byte Double Buffer or Ping-Pong Processing ....................................................................
Data Nibble Structure ....................................................................................................
PRU R30, R31 Operations ..............................................................................................
Reading and Writing FIFO Data ........................................................................................
RX Data Latch .............................................................................................................
Start of Frame Detection .................................................................................................
CRC Error Detection .....................................................................................................
RX Error Detection........................................................................................................
Error Detection Window with Running Counter .......................................................................
RX L1 to PRU Interface ..................................................................................................
MII RX Data to PRU R31 (R) and RX FIFO ...........................................................................
RX L2 to PRU Interface ..................................................................................................
Data and Status Register Dependency ................................................................................
PRU to TX L1 Interface ..................................................................................................
PRU to TX MII Interface .................................................................................................
TX Mask Mode (PRUSS_MII_RT_TXCFG0/1 [TX_32_MODE_EN] = 0)..........................................
RX L1 to TX L1 Interface ................................................................................................
MII Receive Multiplexer ..................................................................................................
MII Transmit Multiplexer .................................................................................................
Scratch Pad Mode ........................................................................................................
PRUSS_MII_RT_RXCFG0 Register ...................................................................................
PRUSS_MII_RT_RXCFG1 Register ...................................................................................
PRUSS_MII_RT_TXCFG0 Register ....................................................................................
PRUSS_MII_RT_TXCFG1 Register ....................................................................................
PRUSS_MII_RT_TX_CRC0 Register ..................................................................................
PRUSS_MII_RT_TX_CRC1 Register ..................................................................................
6-220. PRUSS_UART_SCRATCH_REGISTER Register
List of Figures
922
923
924
926
929
930
931
932
933
934
935
937
940
942
944
946
948
950
950
951
951
951
952
952
953
954
954
955
955
955
956
956
959
960
962
962
963
963
966
967
967
969
971
973
977
981
982
SPRUHY8I – January 2016 – Revised March 2019
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6-269. PRUSS_MII_RT_TX_IPG0 Register ................................................................................... 983
6-270. PRUSS_MII_RT_TX_IPG1 Register ................................................................................... 984
6-271. PRUSS_MII_RT_PRS0 Register ....................................................................................... 985
6-272. PRUSS_MII_RT_PRS1 Register ....................................................................................... 986
6-273. PRUSS_MII_RT_RX_FRMS0 Register ................................................................................ 987
6-274. PRUSS_MII_RT_RX_FRMS1 Register ................................................................................ 988
6-275. PRUSS_MII_RT_RX_PCNT0 Register ................................................................................ 989
6-276. PRUSS_MII_RT_RX_PCNT1 Register ................................................................................ 990
6-277. PRUSS_MII_RT_RX_ERR0 Register .................................................................................. 991
6-278. PRUSS_MII_RT_RX_ERR1 Register .................................................................................. 993
6-279. PRUSS_MII_RT_RXFLV0 Register .................................................................................... 995
6-280. PRUSS_MII_RT_RXFLV1 Register .................................................................................... 996
.................................................................................... 997
.................................................................................... 998
Device PRU-ICSS MII MDIO Management Interface Overview .................................................... 999
PRUSS_MII_MDIO_VER Register .................................................................................... 1005
PRUSS_MII_MDIO_CONTROL Register ............................................................................ 1006
PRUSS_MII_MDIO_ALIVE Register .................................................................................. 1008
PRUSS_MII_MDIO_LINK Register ................................................................................... 1009
PRUSS_MII_MDIO_LINKINTRAW Register ......................................................................... 1010
PRUSS_MII_MDIO_LINKINTMASKED Register.................................................................... 1011
PRUSS_MII_MDIO_USERINTRAW Register ....................................................................... 1012
PRUSS_MII_MDIO_USERINTMASKED Register .................................................................. 1013
PRUSS_MII_MDIO_USERINTMASKSET Register ................................................................. 1014
PRUSS_MII_MDIO_USERINTMASKCLR Register ................................................................ 1015
PRUSS_MII_MDIO_USERACCESS0 Register ..................................................................... 1016
PRUSS_MII_MDIO_USERPHYSEL0 Register ...................................................................... 1018
PRUSS_MII_MDIO_USERACCESS1 Register ..................................................................... 1019
PRUSS_MII_MDIO_USERPHYSEL1 Register ...................................................................... 1020
IEP Functional Block Diagram ......................................................................................... 1021
PRU-ICSS IEP SYNC0 Signal Generation Modes ................................................................. 1024
Examples of the Dependent Mode of SYNC1 ...................................................................... 1025
IEP DIGIO Data In ...................................................................................................... 1027
IEP DIGIO Data Out .................................................................................................... 1028
PRUSS_IEP_GLOBAL_CFG Register ............................................................................... 1033
PRUSS_IEP_STATUS Register ....................................................................................... 1034
PRUSS_IEP_COMPENSATION Register ........................................................................... 1035
PRUSS_IEP_SLOW_COMPENSATION Register .................................................................. 1036
PRUSS_IEP_LOW_COUNTER Register ............................................................................ 1037
PRUSS_IEP_HIGH_COUNTER Register ............................................................................ 1038
PRUSS_IEP_CAPTURE_CFG Register ............................................................................. 1039
PRUSS_IEP_CAPTURE_STATUS Register ........................................................................ 1041
PRUSS_IEP_CAPTURE_RISE00 Register.......................................................................... 1043
PRUSS_IEP_CAPTURE_RISE10 Register.......................................................................... 1044
PRUSS_IEP_CAPTURE_RISE01 Register.......................................................................... 1045
PRUSS_IEP_CAPTURE_RISE11 Register.......................................................................... 1046
PRUSS_IEP_CAPTURE_RISE02 Register.......................................................................... 1047
PRUSS_IEP_CAPTURE_RISE12 Register.......................................................................... 1048
PRUSS_IEP_CAPTURE_RISE03 Register.......................................................................... 1049
6-281. PRUSS_MII_RT_TXFLV0 Register
6-282. PRUSS_MII_RT_TXFLV1 Register
6-283.
6-284.
6-285.
6-286.
6-287.
6-288.
6-289.
6-290.
6-291.
6-292.
6-293.
6-294.
6-295.
6-296.
6-297.
6-298.
6-299.
6-300.
6-301.
6-302.
6-303.
6-304.
6-305.
6-306.
6-307.
6-308.
6-309.
6-310.
6-311.
6-312.
6-313.
6-314.
6-315.
6-316.
6-317.
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
List of Figures
19
www.ti.com
6-318. PRUSS_IEP_CAPTURE_RISE13 Register.......................................................................... 1050
6-319. PRUSS_IEP_CAPTURE_RISE04 Register.......................................................................... 1051
6-320. PRUSS_IEP_CAPTURE_RISE14 Register.......................................................................... 1052
6-321. PRUSS_IEP_CAPTURE_RISE05 Register.......................................................................... 1053
6-322. PRUSS_IEP_CAPTURE_RISE15 Register.......................................................................... 1054
6-323. PRUSS_IEP_CAPTURE_RISE06 Register.......................................................................... 1055
6-324. PRUSS_IEP_CAPTURE_RISE16 Register.......................................................................... 1056
1057
6-326. PRUSS_IEP_CAPTURE_FALL16 Register
1058
6-327.
1059
6-328.
6-329.
6-330.
6-331.
6-332.
6-333.
6-334.
6-335.
6-336.
6-337.
6-338.
6-339.
6-340.
6-341.
6-342.
6-343.
6-344.
6-345.
6-346.
6-347.
6-348.
6-349.
6-350.
6-351.
6-352.
6-353.
6-354.
6-355.
6-356.
6-357.
6-358.
6-359.
6-360.
6-361.
6-362.
6-363.
6-364.
6-365.
6-366.
20
.........................................................................
.........................................................................
PRUSS_IEP_CAPTURE_RISE07 Register..........................................................................
PRUSS_IEP_CAPTURE_RISE17 Register..........................................................................
PRUSS_IEP_CAPTURE_FALL07 Register .........................................................................
PRUSS_IEP_CAPTURE_FALL17 Register .........................................................................
PRUSS_IEP_COMPARE_CFG Register ............................................................................
PRUSS_IEP_COMPARE_STATUS Register .......................................................................
PRUSS_IEP_COMPARE00 Register .................................................................................
PRUSS_IEP_COMPARE10 Register .................................................................................
PRUSS_IEP_COMPARE01 Register .................................................................................
PRUSS_IEP_COMPARE11 Register .................................................................................
PRUSS_IEP_COMPARE02 Register .................................................................................
PRUSS_IEP_COMPARE12 Register .................................................................................
PRUSS_IEP_COMPARE03 Register .................................................................................
PRUSS_IEP_COMPARE13 Register .................................................................................
PRUSS_IEP_COMPARE04 Register .................................................................................
PRUSS_IEP_COMPARE14 Register .................................................................................
PRUSS_IEP_COMPARE05 Register .................................................................................
PRUSS_IEP_COMPARE15 Register .................................................................................
PRUSS_IEP_COMPARE06 Register .................................................................................
PRUSS_IEP_COMPARE16 Register .................................................................................
PRUSS_IEP_COMPARE07 Register .................................................................................
PRUSS_IEP_COMPARE17 Register .................................................................................
PRUSS_IEP_RXIPG0 Register .......................................................................................
PRUSS_IEP_RXIPG1 Register .......................................................................................
PRUSS_IEP_COMPARE08 Register .................................................................................
PRUSS_IEP_COMPARE18 Register .................................................................................
PRUSS_IEP_COMPARE09 Register .................................................................................
PRUSS_IEP_COMPARE19 Register .................................................................................
PRUSS_IEP_COMPARE010 Register ...............................................................................
PRUSS_IEP_COMPARE110 Register ...............................................................................
PRUSS_IEP_COMPARE011 Register ...............................................................................
PRUSS_IEP_COMPARE111 Register ...............................................................................
PRUSS_IEP_COMPARE012 Register ...............................................................................
PRUSS_IEP_COMPARE112 Register ...............................................................................
PRUSS_IEP_COMPARE013 Register ...............................................................................
PRUSS_IEP_COMPARE113 Register ...............................................................................
PRUSS_IEP_COMPARE014 Register ...............................................................................
PRUSS_IEP_COMPARE114 Register ...............................................................................
PRUSS_IEP_COMPARE015 Register ...............................................................................
PRUSS_IEP_COMPARE115 Register ...............................................................................
6-325. PRUSS_IEP_CAPTURE_FALL06 Register
List of Figures
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
SPRUHY8I – January 2016 – Revised March 2019
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.......................................................
PRUSS_IEP_HIGH_COUNTER_RESET_VALUE Register .......................................................
PRUSS_IEP_PWM Register ...........................................................................................
PRUSS_IEP_SYNC_CTRL Register .................................................................................
PRUSS_IEP_SYNC_FIRST_STAT Register ........................................................................
PRUSS_IEP_SYNC0_STAT Register ................................................................................
PRUSS_IEP_SYNC1_STAT Register ................................................................................
PRUSS_IEP_SYNC_PWIDTH Register ..............................................................................
PRUSS_IEP_SYNC0_PERIOD Register ............................................................................
PRUSS_IEP_SYNC1_DELAY Register ..............................................................................
PRUSS_IEP_SYNC_START Register ...............................................................................
PRUSS_IEP_WD_PREDIV Register .................................................................................
PRUSS_IEP_PDI_WD_TIM Register .................................................................................
PRUSS_IEP_PD_WD_TIM Register .................................................................................
PRUSS_IEP_WD_STATUS Register .................................................................................
PRUSS_IEP_WD_EXP_CNT Register ...............................................................................
PRUSS_IEP_WD_CTRL Register ....................................................................................
PRUSS_IEP_DIGIO_CTRL Register .................................................................................
PRUSS_IEP_DIGIO_STATUS Register .............................................................................
PRUSS_IEP_DIGIO_DATA_IN Register .............................................................................
PRUSS_IEP_DIGIO_DATA_IN_RAW Register .....................................................................
PRUSS_IEP_DIGIO_DATA_OUT Register ..........................................................................
PRUSS_IEP_DIGIO_DATA_OUT_EN Register ....................................................................
PRUSS_IEP_DIGIO_EXP Register ...................................................................................
MSMC Integration .......................................................................................................
MSMC Functional Block Diagram .....................................................................................
MSMC Memory Organisation ..........................................................................................
MPAX Segment Register Set Layout .................................................................................
Error Detection and Correction ........................................................................................
MSMC_PID Register ....................................................................................................
MSMC_SMEDCC Register ............................................................................................
MSMC_SMCERRAR Register .........................................................................................
MSMC_SMCERRXR Register .........................................................................................
MSMC_SMNCERRAR Register .......................................................................................
MSMC_SMNCERRXR Register .......................................................................................
MSMC_SMCEA Register...............................................................................................
MSMC_SMNCEA Register .............................................................................................
MSMC_SMSECC Register .............................................................................................
MSMC_SMPFAR Register .............................................................................................
MSMC_SMPFXR Register .............................................................................................
MSMC_SMPFR Register ...............................................................................................
MSMC_SMPFCR Register .............................................................................................
MSMC_SBNDC0 Register .............................................................................................
MSMC_SBNDM Register ..............................................................................................
MSMC_SBNDE Register ...............................................................................................
MSMC_CFGLCK Register .............................................................................................
MSMC_CFGULCK Register ...........................................................................................
MSMC_CFGLCKSTAT Register ......................................................................................
MSMC_SMS_MPAX_LCK Register ..................................................................................
6-367. PRUSS_IEP_LOW_COUNTER_RESET_VALUE Register
1099
6-368.
1100
6-369.
6-370.
6-371.
6-372.
6-373.
6-374.
6-375.
6-376.
6-377.
6-378.
6-379.
6-380.
6-381.
6-382.
6-383.
6-384.
6-385.
6-386.
6-387.
6-388.
6-389.
6-390.
7-1.
7-2.
7-3.
7-4.
7-5.
7-6.
7-7.
7-8.
7-9.
7-10.
7-11.
7-12.
7-13.
7-14.
7-15.
7-16.
7-17.
7-18.
7-19.
7-20.
7-21.
7-22.
7-23.
7-24.
7-25.
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
1101
1102
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1119
1120
1121
1122
1123
1124
1128
1131
1133
1135
1139
1148
1149
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
21
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7-26.
7-27.
7-28.
7-29.
7-30.
7-31.
7-32.
7-33.
7-34.
7-35.
7-36.
7-37.
7-38.
7-39.
7-40.
7-41.
7-42.
7-43.
7-44.
7-45.
7-46.
7-47.
7-48.
7-49.
7-50.
7-51.
7-52.
7-53.
7-54.
7-55.
7-56.
7-57.
7-58.
7-59.
7-60.
7-61.
7-62.
7-63.
7-64.
7-65.
7-66.
7-67.
7-68.
7-69.
7-70.
7-71.
7-72.
7-73.
7-74.
22
................................................................................
MSMC_SMS_MPAX_LCKSTAT Register............................................................................
MSMC_SES_MPAX_LCK Register ...................................................................................
MSMC_SES_MPAX_ULCK Register .................................................................................
MSMC_SES_MPAX_LCKSTAT Register ............................................................................
MSMC_SMESTAT Register ...........................................................................................
MSMC_SMIRSTAT Register...........................................................................................
MSMC_SMIRC Register ...............................................................................................
MSMC_SMIESTAT Register ...........................................................................................
MSMC_SMIEC Register ................................................................................................
MSMC_SMS_MPAXL_x_y Register ..................................................................................
MSMC_SMS_MPAXH_x_y Register..................................................................................
MSMC_SES_MPAXL_x_y Register ..................................................................................
MSMC_SES_MPAXH_x_y Register ..................................................................................
EMIF Overview ..........................................................................................................
Example EMIF Configuration without ECC ..........................................................................
Example EMIF Configuration with ECC ..............................................................................
EMIF Integration .........................................................................................................
Block Diagram of EMIF FIFOs.........................................................................................
DDR3L SDRAM Column, Row, and Bank Access When EBANK = 0 ...........................................
Data Bus Obfuscation ..................................................................................................
EMIF_MIDR Register ...................................................................................................
EMIF_STATUS Register ...............................................................................................
EMIF_SDCFG Register.................................................................................................
EMIF_SDRFC Register .................................................................................................
EMIF_SDTIM1 Register ................................................................................................
EMIF_SDTIM2 Register ................................................................................................
EMIF_SDTIM3 Register ................................................................................................
EMIF_SDTIM4 Register ................................................................................................
EMIF_PMCTL Register .................................................................................................
EMIF_VBUSM_CONFIG Register ....................................................................................
EMIF_PERF_CNT_1 Register .........................................................................................
EMIF_PERF_CNT_2 Register .........................................................................................
EMIF_PERF_CNT_CFG Register.....................................................................................
EMIF_PERF_CNT_SEL Register .....................................................................................
EMIF_PERF_CNT_TIM Register......................................................................................
EMIF_IRQ_EOI Register ...............................................................................................
EMIF_IRQSTATUS_RAW_SYS Register ............................................................................
EMIF_IRQSTATUS_SYS Register ....................................................................................
EMIF_IRQENABLE_SET_SYS Register .............................................................................
EMIF_IRQENABLE_CLR_SYS Register .............................................................................
EMIF_ZQ_CONFIG Register ..........................................................................................
EMIF_PRI_COS_MAP Register .......................................................................................
EMIF_MSTID_COS_1_MAP Register ................................................................................
EMIF_MSTID_COS_2_MAP Register ................................................................................
EMIF_ECCCTL Register ...............................................................................................
EMIF_ECCADDR1 Register ...........................................................................................
EMIF_ECCADDR2 Register ...........................................................................................
EMIF_RWTHRESH Register ..........................................................................................
MSMC_SMS_MPAX_ULCK Register
List of Figures
1169
1170
1171
1172
1173
1174
1175
1177
1178
1179
1181
1182
1184
1186
1187
1190
1191
1193
1196
1202
1208
1214
1215
1217
1220
1221
1223
1225
1227
1229
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1244
1246
1248
1250
1252
1253
1254
SPRUHY8I – January 2016 – Revised March 2019
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7-75.
EMIF_ONE_BIT_ECC_ERR_CNT Register ......................................................................... 1255
7-76.
EMIF_ONE_BIT_ECC_ERR_THRSH Register ..................................................................... 1256
7-77.
EMIF_ONE_BIT_ECC_ERR_DIST_1 Register
7-78.
EMIF_ONE_BIT_ECC_ERR_ADDR_LOG Register ................................................................ 1258
7-79.
EMIF_TWO_BIT_ECC_ERR_ADDR_LOG Register ............................................................... 1259
7-80.
EMIF_ONE_BIT_ECC_ERR_DIST_2 Register
7-81.
7-82.
7-83.
7-84.
7-85.
7-86.
7-87.
7-88.
7-89.
7-90.
7-91.
7-92.
7-93.
7-94.
7-95.
7-96.
7-97.
7-98.
7-99.
7-100.
7-101.
7-102.
7-103.
7-104.
7-105.
7-106.
7-107.
7-108.
7-109.
7-110.
7-111.
7-112.
7-113.
7-114.
7-115.
7-116.
7-117.
7-118.
7-119.
7-120.
7-121.
7-122.
7-123.
.....................................................................
.....................................................................
DDR_PHY_PIR Register ...............................................................................................
DDR_PHY_PGCR0 Register ..........................................................................................
DDR_PHY_PGCR1 Register ..........................................................................................
DDR_PHY_PGCR2 Register ..........................................................................................
DDR_PHY_PGSR0 Register ..........................................................................................
DDR_PHY_PGSR1 Register ..........................................................................................
DDR_PHY_PLLCR Register ...........................................................................................
DDR_PHY_PTR0 Register .............................................................................................
DDR_PHY_PTR1 Register .............................................................................................
DDR_PHY_PTR2 Register .............................................................................................
DDR_PHY_PTR3 Register .............................................................................................
DDR_PHY_PTR4 Register .............................................................................................
DDR_PHY_ACIOCR Register .........................................................................................
DDR_PHY_DXCCR Register ..........................................................................................
DDR_PHY_DCR Register ..............................................................................................
DDR_PHY_DTPR0 Register ...........................................................................................
DDR_PHY_DTPR1 Register ...........................................................................................
DDR_PHY_DTPR2 Register ...........................................................................................
DDR_PHY_MR0 Register ..............................................................................................
DDR_PHY_MR1 Register ..............................................................................................
DDR_PHY_MR2 Register ..............................................................................................
DDR_PHY_MR3 Register ..............................................................................................
DDR_PHY_ODTCR Register ..........................................................................................
DDR_PHY_DTCR Register ............................................................................................
DDR_PHY_ZQ0CR0 Register .........................................................................................
DDR_PHY_ZQ0CR1 Register .........................................................................................
DDR_PHY_ZQ0SR0 Register .........................................................................................
DDR_PHY_ZQ0SR1 Register .........................................................................................
DDR_PHY_ZQ1CR0 Register .........................................................................................
DDR_PHY_ZQ1CR1 Register .........................................................................................
DDR_PHY_ZQ1SR0 Register .........................................................................................
DDR_PHY_ZQ1SR1 Register .........................................................................................
DDR_PHY_ZQ2CR0 Register .........................................................................................
DDR_PHY_ZQ2CR1 Register .........................................................................................
DDR_PHY_ZQ2SR0 Register .........................................................................................
DDR_PHY_ZQ2SR1 Register .........................................................................................
DDR_PHY_DX0GCR Register ........................................................................................
DDR_PHY_DX0GSR0 Register .......................................................................................
DDR_PHY_DX0GSR2 Register .......................................................................................
DDR_PHY_DX0LCDLR0 Register ....................................................................................
DDR_PHY_DX0LCDLR1 Register ....................................................................................
DDR_PHY_DX0LCDLR2 Register ....................................................................................
DDR_PHY_DX0MDLR Register .......................................................................................
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
1257
1260
1261
1264
1267
1270
1272
1274
1275
1277
1278
1279
1280
1281
1282
1283
1285
1287
1288
1290
1292
1294
1296
1298
1299
1301
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1318
1320
1322
1323
1324
1325
23
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7-124. DDR_PHY_DX0GTR Register......................................................................................... 1326
7-125. DDR_PHY_DX1GCR Register ........................................................................................ 1328
7-126. DDR_PHY_DX1GSR0 Register ....................................................................................... 1331
7-127. DDR_PHY_DX1GSR2 Register ....................................................................................... 1333
7-128. DDR_PHY_DX1LCDLR0 Register .................................................................................... 1335
7-129. DDR_PHY_DX1LCDLR1 Register .................................................................................... 1336
7-130. DDR_PHY_DX1LCDLR2 Register .................................................................................... 1337
7-131. DDR_PHY_DX1MDLR Register ....................................................................................... 1338
7-132. DDR_PHY_DX1GTR Register......................................................................................... 1339
7-133. DDR_PHY_DX2GCR Register ........................................................................................ 1341
7-134. DDR_PHY_DX2GSR0 Register ....................................................................................... 1344
7-135. DDR_PHY_DX2GSR2 Register ....................................................................................... 1346
7-136. DDR_PHY_DX2LCDLR0 Register .................................................................................... 1348
7-137. DDR_PHY_DX2LCDLR1 Register .................................................................................... 1349
7-138. DDR_PHY_DX2LCDLR2 Register .................................................................................... 1350
7-139. DDR_PHY_DX2MDLR Register ....................................................................................... 1351
7-140. DDR_PHY_DX2GTR Register......................................................................................... 1352
7-141. DDR_PHY_DX3GCR Register ........................................................................................ 1354
7-142. DDR_PHY_DX3GSR0 Register ....................................................................................... 1357
7-143. DDR_PHY_DX3GSR2 Register ....................................................................................... 1359
7-144. DDR_PHY_DX3LCDLR0 Register .................................................................................... 1361
7-145. DDR_PHY_DX3LCDLR1 Register .................................................................................... 1362
7-146. DDR_PHY_DX3LCDLR2 Register .................................................................................... 1363
7-147. DDR_PHY_DX3MDLR Register ....................................................................................... 1364
7-148. DDR_PHY_DX3GTR Register......................................................................................... 1365
7-149. DDR_PHY_DX8GCR Register ........................................................................................ 1367
7-150. DDR_PHY_DX8GSR0 Register ....................................................................................... 1370
7-151. DDR_PHY_DX8GSR2 Register ....................................................................................... 1372
7-152. DDR_PHY_DX8LCDLR0 Register .................................................................................... 1374
7-153. DDR_PHY_DX8LCDLR1 Register .................................................................................... 1375
7-154. DDR_PHY_DX8LCDLR2 Register .................................................................................... 1376
7-155. DDR_PHY_DX8MDLR Register ....................................................................................... 1377
7-156. DDR_PHY_DX8GTR Register......................................................................................... 1378
7-157. GPMC Overview ......................................................................................................... 1380
7-158. GPMC to 16-Bit Address/Data-Multiplexed Memory................................................................ 1382
7-159. GPMC to 16-Bit Non-Multiplexed Memory ........................................................................... 1382
7-160. GPMC to 8-Bit Non-Multiplexed Memory
............................................................................
1383
7-161. GPMC to 8-Bit NAND Device .......................................................................................... 1383
7-162. GPMC Integration ....................................................................................................... 1386
7-163. GPMC Block Diagram .................................................................................................. 1389
7-164. Chip-Select Address Mapping and Decoding Mask ................................................................ 1393
7-165. Wait Behavior During an Asynchronous Single Read Access (GPMCFCLKDivider = 1) ...................... 1396
7-166. Wait Behavior During a Synchronous Read Burst Access
........................................................
1398
7-167. Read-to-Read for an Address-Data Multiplexed Device, on Different Chip-Select, Without Bus
Turnaround (nCS Attached to a Fast Device) ....................................................................... 1400
7-168. Read- to-Read/Write for an Address-Data Multiplexed Device, on Different Chip-Select, With Bus
Turnaround ............................................................................................................... 1400
7-169. Read-to-Read/Write for a Address-Data or AAD-Multiplexed Device, on Same Chip-Select, With Bus
Turnaround ............................................................................................................... 1401
7-170. Asynchronous Single Read on an Address/Data-Multiplexed Device ............................................ 1410
24
List of Figures
SPRUHY8I – January 2016 – Revised March 2019
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7-171. Two Asynchronous Single-Read Accesses on an Address/Data-Multiplexed Device (32-Bit Read Split
Into 2 x 16-Bit Read) .................................................................................................... 1411
7-172. Asynchronous Single-Write on an Address/Data-Multiplexed Device ............................................ 1412
7-173. Asynchronous Single Read on an AAD-Multiplexed Device....................................................... 1414
7-174. Asynchronous Single Write on an AAD-Multiplexed Device ....................................................... 1415
7-175. Synchronous Single Read (GPMCFCLKDIVIDER = 0) ............................................................ 1417
7-176. Synchronous Single Read (GPMCFCLKDIVIDER = 1) ............................................................ 1418
7-177. Synchronous Multiple (Burst) Read (GPMCFCLKDIVIDER = 0).................................................. 1420
7-178. Synchronous Multiple (Burst) Read (GPMCFCLKDIVIDER = 1).................................................. 1421
7-179. Synchronous Single Write on an Address/Data-Multiplexed Device ............................................. 1422
7-180. Synchronous Multiple Write (Burst Write) in Address/Data-Multiplexed Mode .................................. 1423
7-181. Synchronous Multiple Write (Burst Write) in Address/Address/Data-Multiplexed Mode ....................... 1424
......................................
Asynchronous Single Write on an Address/Data-non-multiplexed Device ......................................
Asynchronous Multiple (Page Mode) Read ..........................................................................
NAND Command Latch Cycle .........................................................................................
NAND Address Latch Cycle ...........................................................................................
NAND Data Read Cycle ................................................................................................
NAND Data Write Cycle ................................................................................................
Hamming Code Accumulation Algorithm (1/2) ......................................................................
Hamming Code Accumulation Algorithm (2/2) ......................................................................
ECC Computation for a 256-Byte Data Stream (Read or Write) ..................................................
ECC Computation for a 512-Byte Data Stream (Read or Write) ..................................................
128 Word16 ECC Computation .......................................................................................
256 Word16 ECC Computation .......................................................................................
Manual Mode Sequence and Mapping ...............................................................................
NAND Page Mapping and ECC: Per-Sector Schemes.............................................................
NAND Page Mapping and ECC: Pooled Spare Schemes .........................................................
NAND Page Mapping and ECC: Per-Sector Schemes, With Separate ECC ...................................
NAND Read Cycle Optimization Timing Description ...............................................................
Programming Model Top-Level Diagram .............................................................................
NOR Interfacing Timing Parameters Diagram .......................................................................
NAND Command Latch Cycle Timing Simplified Example ........................................................
Synchronous NOR Single Read Simplified Example ...............................................................
Asynchronous NOR Single Write Simplified Example ..............................................................
GPMC Connection to an External NOR Flash Memory ............................................................
Synchronous Burst Read Access (Timing Parameters in Clock Cycles) ........................................
Asynchronous Single Read Access (Timing Parameters in Clock Cycles) ......................................
Asynchronous Single Write Access (Timing Parameters in Clock Cycles) ......................................
GPMC_REVISION Register ...........................................................................................
GPMC_SYSCONFIG Register ........................................................................................
GPMC_SYSSTATUS Register ........................................................................................
GPMC_IRQSTATUS Register .........................................................................................
GPMC_IRQENABLE Register .........................................................................................
GPMC_TIMEOUT_CONTROL Register .............................................................................
GPMC_ERR_ADDRESS Register ....................................................................................
GPMC_ERR_TYPE Register ..........................................................................................
GPMC_CONFIG Register ..............................................................................................
GPMC_STATUS Register ..............................................................................................
7-182. Asynchronous Single Read on an Address/Data-non-multiplexed Device
1426
7-183.
1427
7-184.
7-185.
7-186.
7-187.
7-188.
7-189.
7-190.
7-191.
7-192.
7-193.
7-194.
7-195.
7-196.
7-197.
7-198.
7-199.
7-200.
7-201.
7-202.
7-203.
7-204.
7-205.
7-206.
7-207.
7-208.
7-209.
7-210.
7-211.
7-212.
7-213.
7-214.
7-215.
7-216.
7-217.
7-218.
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
1428
1433
1434
1435
1435
1440
1441
1441
1442
1443
1443
1448
1452
1453
1454
1461
1463
1468
1472
1476
1478
1480
1482
1483
1484
1490
1491
1493
1494
1496
1498
1499
1500
1502
1504
25
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7-219. GPMC_CONFIG1_i Register .......................................................................................... 1505
7-220. GPMC_CONFIG2_i Register .......................................................................................... 1508
7-221. GPMC_CONFIG3_i Register .......................................................................................... 1510
7-222. GPMC_CONFIG4_i Register .......................................................................................... 1512
7-223. GPMC_CONFIG5_i Register .......................................................................................... 1514
7-224. GPMC_CONFIG6_i Register .......................................................................................... 1516
7-225. GPMC_CONFIG7_i Register .......................................................................................... 1518
7-226. GPMC_NAND_COMMAND_i Register ............................................................................... 1520
7-227. GPMC_NAND_ADDRESS_i Register ................................................................................ 1521
7-228. GPMC_NAND_DATA_i Register ...................................................................................... 1522
7-229. GPMC_PREFETCH_CONFIG1 Register ............................................................................ 1523
7-230. GPMC_PREFETCH_CONFIG2 Register ............................................................................ 1526
7-231. GPMC_PREFETCH_CONTROL Register ........................................................................... 1527
7-232. GPMC_PREFETCH_STATUS Register .............................................................................. 1528
7-233. GPMC_ECC_CONFIG Register ....................................................................................... 1530
7-234. GPMC_ECC_CONTROL Register .................................................................................... 1532
7-235. GPMC_ECC_SIZE_CONFIG Register ............................................................................... 1534
7-236. GPMC_ECCj_RESULT Register ...................................................................................... 1536
7-237. GPMC_BCH_RESULT0_i Register ................................................................................... 1538
7-238. GPMC_BCH_RESULT1_i Register ................................................................................... 1539
7-239. GPMC_BCH_RESULT2_i Register ................................................................................... 1540
7-240. GPMC_BCH_RESULT3_i Register ................................................................................... 1541
7-241. GPMC_BCH_SWDATA Register...................................................................................... 1542
7-242. GPMC_BCH_RESULT4_i Register ................................................................................... 1543
7-243. GPMC_BCH_RESULT5_i Register ................................................................................... 1544
7-244. GPMC_BCH_RESULT6_i Register ................................................................................... 1545
7-245. ELM Overview ........................................................................................................... 1547
7-246. ELM Integration .......................................................................................................... 1548
7-247. ELM_REVISION Register .............................................................................................. 1561
7-248. ELM_SYSCONFIG Register ........................................................................................... 1562
7-249. ELM_SYSSTATUS Register ........................................................................................... 1564
1565
7-251. ELM_IRQENABLE Register
1567
7-252.
1569
7-253.
7-254.
7-255.
7-256.
7-257.
7-258.
7-259.
7-260.
7-261.
7-262.
7-263.
7-264.
7-265.
7-266.
7-267.
26
...........................................................................................
...........................................................................................
ELM_LOCATION_CONFIG Register .................................................................................
ELM_PAGE_CTRL Register ...........................................................................................
ELM_SYNDROME_FRAGMENT_0_i Register......................................................................
ELM_SYNDROME_FRAGMENT_1_i Register......................................................................
ELM_SYNDROME_FRAGMENT_2_i Register......................................................................
ELM_SYNDROME_FRAGMENT_3_i Register......................................................................
ELM_SYNDROME_FRAGMENT_4_i Register......................................................................
ELM_SYNDROME_FRAGMENT_5_i Register......................................................................
ELM_SYNDROME_FRAGMENT_6_i Register......................................................................
ELM_LOCATION_STATUS_i Register ...............................................................................
ELM_ERROR_LOCATION_0_i Register .............................................................................
ELM_ERROR_LOCATION_1_i Register .............................................................................
ELM_ERROR_LOCATION_2_i Register .............................................................................
ELM_ERROR_LOCATION_3_i Register .............................................................................
ELM_ERROR_LOCATION_4_i Register .............................................................................
ELM_ERROR_LOCATION_5_i Register .............................................................................
7-250. ELM_IRQSTATUS Register
List of Figures
1570
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
SPRUHY8I – January 2016 – Revised March 2019
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7-268. ELM_ERROR_LOCATION_6_i Register ............................................................................. 1586
7-269. ELM_ERROR_LOCATION_7_i Register ............................................................................. 1587
7-270. ELM_ERROR_LOCATION_8_i Register ............................................................................. 1588
7-271. ELM_ERROR_LOCATION_9_i Register ............................................................................. 1589
7-272. ELM_ERROR_LOCATION_10_i Register ........................................................................... 1590
7-273. ELM_ERROR_LOCATION_11_i Register ........................................................................... 1591
7-274. ELM_ERROR_LOCATION_12_i Register ........................................................................... 1592
7-275. ELM_ERROR_LOCATION_13_i Register ........................................................................... 1593
7-276. ELM_ERROR_LOCATION_14_i Register ........................................................................... 1594
7-277. ELM_ERROR_LOCATION_15_i Register ........................................................................... 1595
8-1.
Message Manager Integration ......................................................................................... 1598
8-2.
Message Manager Proxy/Queue Mapping ........................................................................... 1603
8-3.
Message Manager – Message Structure............................................................................. 1608
8-4.
PAGE_PROXY_CFG_REG_0_0 to PAGE_PROXY_CFG_REG_31_0 Register............................... 1617
8-5.
PROXY_QUEUE_CFG_REG_0_0 to PROXY_QUEUE_CFG_REG_31_63 Register ......................... 1619
8-6.
INTR_RAW_STATUS_SET_REG Register.......................................................................... 1621
8-7.
INTR_ENABLED_STATUS_SET_REG Register ................................................................... 1622
8-8.
INTR_ENABLE_REG Register
8-9.
INTR_CLEAR_REG Register .......................................................................................... 1624
8-10.
EOI_REG Register ...................................................................................................... 1625
8-11.
PROXY_ERROR_STATUS_REG Register .......................................................................... 1626
8-12.
REVISION_REG Register .............................................................................................. 1628
8-13.
INTR_RAW_STATUS_SET_REG Register.......................................................................... 1629
8-14.
INTR_ENABLED_STATUS_SET_REG Register ................................................................... 1630
8-15.
INTR_ENABLE_REG Register ........................................................................................ 1631
8-16.
INTR_CLEAR_REG Register .......................................................................................... 1632
8-17.
EOI_REG Register ...................................................................................................... 1633
8-18.
NEXT_INDEX_REG_0 to NEXT_INDEX_REG_127 Register
1635
8-19.
INDEX_REG_0 to INDEX_REG_63 Register
1637
8-20.
8-21.
8-22.
8-23.
8-24.
8-25.
8-26.
8-27.
8-28.
8-29.
8-30.
8-31.
8-32.
8-33.
8-34.
8-35.
8-36.
8-37.
8-38.
8-39.
.......................................................................................
....................................................
.......................................................................
ECC_REVISION Register ..............................................................................................
ECC_VECTOR Register ...............................................................................................
ECC_MISC_STATUS Register ........................................................................................
ECC_WRAPPER_REVISION Register ...............................................................................
ECC_CONTROL Register..............................................................................................
ECC_ERROR_CONTROL1 Register .................................................................................
ECC_ERROR_CONTROL2 Register .................................................................................
ECC_ERROR_STATUS1 Register ...................................................................................
ECC_ERROR_STATUS2 Register ...................................................................................
ECC_EOI Register ......................................................................................................
ECC_INT_STATUS_0 to ECC_INT_STATUS_15 Register .......................................................
ECC_INT_ENABLE_0 to ECC_INT_ENABLE_15 Register .......................................................
ECC_INT_CLEAR_0 to ECC_INT_CLEAR_15 Register ..........................................................
QUEUE_DATA_REG_0_0_0 to QUEUE_DATA_REG_31_64_31 Register ....................................
Semaphore Module Overview .........................................................................................
Semaphore Integration .................................................................................................
Semaphore Module Block Diagram ...................................................................................
SEM_PID Register ......................................................................................................
SEM_RST_RUN Register ..............................................................................................
SEM_EOI Register ......................................................................................................
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
1623
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1653
1654
1655
1658
1664
1665
1666
27
www.ti.com
8-40.
SEM_0 to SEM_63 Register ........................................................................................... 1667
8-41.
ISEM_0 to ISEM_63 Register
8-42.
QSEM_0 to QSEM_63 Register ....................................................................................... 1669
8-43.
SEMFLAGL_0 to SEMFLAGL_15 Register .......................................................................... 1670
8-44.
SEMFLAGL_CLEAR_0 to SEMFLAGL_CLEAR_15 Register ..................................................... 1671
8-45.
SEMFLAGH_0 to SEMFLAGH_15 Register ......................................................................... 1672
8-46.
SEMFLAGH_CLEAR_0 to SEMFLAGH_CLEAR_15 Register .................................................... 1673
8-47.
SEMFLAGL_SET_0 to SEMFLAGL_SET_15 Register ............................................................ 1674
8-48.
SEMFLAGH_SET_0 to SEMFLAGH_SET_15 Register
8-49.
8-50.
8-51.
9-1.
9-2.
9-3.
9-4.
9-5.
9-6.
9-7.
9-8.
9-9.
9-10.
9-11.
9-12.
9-13.
9-14.
9-15.
9-16.
9-17.
9-18.
10-1.
10-2.
10-3.
10-4.
10-5.
10-6.
10-7.
10-8.
10-9.
10-10.
10-11.
10-12.
10-13.
10-14.
10-15.
10-16.
10-17.
10-18.
10-19.
28
.........................................................................................
...........................................................
SEMERR Register ......................................................................................................
SEMERR_CLEAR Register ............................................................................................
SEMERR_SET Register ................................................................................................
SoC Interrupt Topology .................................................................................................
CIC Block Diagram ......................................................................................................
Channel Mapping Block Diagram .....................................................................................
CIC_REVISION_REG Register........................................................................................
CIC_GLOBAL_ENABLE_HINT_REG Register ......................................................................
CIC_STATUS_SET_INDEX_REG Register .........................................................................
CIC_STATUS_CLR_INDEX_REG Register .........................................................................
CIC_ENABLE_SET_INDEX_REG Register .........................................................................
CIC_ENABLE_CLR_INDEX_REG Register .........................................................................
CIC_HINT_ENABLE_SET_INDEX_REG Register .................................................................
CIC_HINT_ENABLE_CLR_INDEX_REG Register .................................................................
CIC_RAW_STATUS_REG0 to CIC_RAW_STATUS_REG12 Register ..........................................
CIC_ENA_STATUS_REG0 to CIC_ENA_STATUS_REG12 Register ...........................................
CIC_ENABLE_REG0 to CIC_ENABLE_REG12 Register .........................................................
CIC_ENABLE_CLR_REG0 to CIC_ENABLE_CLR_REG12 Register ...........................................
CIC_CH_MAP_REG0 to CIC_CH_MAP_REG103 Register.......................................................
CIC_HINT_MAP_REG0 to CIC_HINT_MAP_REG25 Register ...................................................
CIC_ENABLE_HINT_REG0 to CIC_ENABLE_HINT_REG3 Register ...........................................
EDMA Controllers Overview ...........................................................................................
EDMA_0 Controller Integration ........................................................................................
EDMA_1 Controller Integration ........................................................................................
EDMA Controller Block Diagram ......................................................................................
EDMA Channel Controller Block Diagram ...........................................................................
EDMA Transfer Controller Block Diagram ...........................................................................
Definition of ACNT, BCNT, and CCNT ...............................................................................
A-Synchronized Transfers (ACNT = n, BCNT = 4, CCNT = 3)....................................................
AB-Synchronized Transfers (ACNT = n, BCNT = 4, CCNT = 3) ..................................................
PaRAM Set ...............................................................................................................
Channel Options Parameter (OPT) ...................................................................................
Linked Transfer Example ...............................................................................................
Link-to-Self Transfer Example .........................................................................................
DMA/QDMA Channel to PaRAM Mapping ...........................................................................
Shadow Region Registers .............................................................................................
Interrupt Diagram ........................................................................................................
Error Interrupt Operation ...............................................................................................
PaRAM Set Content for Proxied Memory Protection Example ....................................................
Proxied Memory Protection Example .................................................................................
List of Figures
1668
1675
1676
1677
1678
1681
1684
1685
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1714
1718
1719
1726
1727
1729
1730
1731
1732
1733
1735
1741
1742
1748
1749
1753
1757
1760
1761
SPRUHY8I – January 2016 – Revised March 2019
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10-20. EDMA Prioritization ..................................................................................................... 1767
10-21. Block Move Example
...................................................................................................
1770
10-22. Block Move Example PaRAM Configuration......................................................................... 1771
10-23. Subframe Extraction Example ......................................................................................... 1772
10-24. Subframe Extraction Example PaRAM Configuration .............................................................. 1773
..................................................................................................
Data Sorting Example PaRAM Configuration .......................................................................
Servicing Incoming Non-Bursting Peripheral Data Example ......................................................
Servicing Incoming Non-Bursting Peripheral Data Example PaRAM Configuration ...........................
Servicing Peripheral Burst Example ..................................................................................
Servicing Peripheral Burst Example PaRAM Configuration .......................................................
Servicing Continuous Non-Bursting Peripheral Data Example ....................................................
Servicing Continuous Non-Bursting Peripheral Data Example PaRAM Configuration ........................
Servicing Continuous Non-Bursting Peripheral Data Example Reload PaRAM Configuration ...............
Ping-Pong Buffering for Non-Bursting Peripheral Data Example .................................................
Ping-Pong Buffering for Non-Bursting Peripheral Example PaRAM Configuration ............................
Ping-Pong Buffering for Non-Bursting Peripheral Example Pong PaRAM Configuration .....................
Ping-Pong Buffering for Non-Bursting Peripheral Example Ping PaRAM Configuration ......................
Intermediate Transfer Completion Chaining Example ..............................................................
Single Large Block Transfer Example ................................................................................
Smaller Packet Data Transfers Example.............................................................................
EDMACC_PID Register ................................................................................................
EDMACC_CCCFG Register ...........................................................................................
EDMACC_DCHMAP0 to EDMACC_DCHMAP63 Register ........................................................
EDMACC_QCHMAP0 to EDMACC_QCHMAP7 Register .........................................................
EDMACC_DMAQNUM0 to EDMACC_DMAQNUM7 Register ....................................................
EDMACC_QDMAQNUM Register ....................................................................................
EDMACC_QUETCMAP Register .....................................................................................
EDMACC_QUEPRI Register ..........................................................................................
EDMACC_EMR Register ...............................................................................................
EDMACC_EMRH Register .............................................................................................
EDMACC_EMCR Register .............................................................................................
EDMACC_EMCRH Register ...........................................................................................
EDMACC_QEMR Register .............................................................................................
EDMACC_QEMCR Register ...........................................................................................
EDMACC_CCERR Register ...........................................................................................
EDMACC_CCERRCLR Register ......................................................................................
EDMACC_EEVAL Register ............................................................................................
EDMACC_DRAE0 Register ............................................................................................
EDMACC_DRAEH0 Register ..........................................................................................
EDMACC_DRAE1 Register ............................................................................................
EDMACC_DRAEH1 Register ..........................................................................................
EDMACC_DRAE2 Register ............................................................................................
EDMACC_DRAEH2 Register ..........................................................................................
EDMACC_DRAE3 Register ............................................................................................
EDMACC_DRAEH3 Register ..........................................................................................
EDMACC_DRAE4 Register ............................................................................................
EDMACC_DRAEH4 Register ..........................................................................................
EDMACC_DRAE5 Register ............................................................................................
10-25. Data Sorting Example
1774
10-26.
1775
10-27.
10-28.
10-29.
10-30.
10-31.
10-32.
10-33.
10-34.
10-35.
10-36.
10-37.
10-38.
10-39.
10-40.
10-41.
10-42.
10-43.
10-44.
10-45.
10-46.
10-47.
10-48.
10-49.
10-50.
10-51.
10-52.
10-53.
10-54.
10-55.
10-56.
10-57.
10-58.
10-59.
10-60.
10-61.
10-62.
10-63.
10-64.
10-65.
10-66.
10-67.
10-68.
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
1776
1777
1778
1779
1780
1781
1782
1784
1785
1786
1786
1788
1788
1789
1798
1799
1801
1802
1803
1806
1808
1810
1811
1812
1814
1815
1816
1817
1818
1820
1822
1823
1824
1824
1825
1826
1827
1827
1828
1829
1830
1830
29
www.ti.com
10-69. EDMACC_DRAEH5 Register .......................................................................................... 1831
10-70. EDMACC_DRAE6 Register ............................................................................................ 1832
10-71. EDMACC_DRAEH6 Register .......................................................................................... 1833
10-72. EDMACC_DRAE7 Register ............................................................................................ 1833
10-73. EDMACC_DRAEH7 Register .......................................................................................... 1834
.................................................................
10-75. EDMACC_Q0E0 to EDMACC_Q3E15 Register ....................................................................
10-76. EDMACC_QSTAT0 to EDMACC_QSTAT3 Register ...............................................................
10-77. EDMACC_QWMTHRA Register ......................................................................................
10-78. EDMACC_CCSTAT Register ..........................................................................................
10-79. EDMACC_MPFAR Register ...........................................................................................
10-80. EDMACC_MPFSR Register ...........................................................................................
10-81. EDMACC_MPFCR Register ...........................................................................................
10-82. EDMACC_MPPAG Register ...........................................................................................
10-83. EDMACC_MPPA0 to EDMACC_MPPA7 Register .................................................................
10-84. EDMACC_ER Register .................................................................................................
10-85. EDMACC_ERH Register ...............................................................................................
10-86. EDMACC_ECR Register ...............................................................................................
10-87. EDMACC_ECRH Register .............................................................................................
10-88. EDMACC_ESR Register ...............................................................................................
10-89. EDMACC_ESRH Register .............................................................................................
10-90. EDMACC_CER Register ...............................................................................................
10-91. EDMACC_CERH Register .............................................................................................
10-92. EDMACC_EER Register ...............................................................................................
10-93. EDMACC_EERH Register .............................................................................................
10-94. EDMACC_EECR Register .............................................................................................
10-95. EDMACC_EECRH Register ...........................................................................................
10-96. EDMACC_EESR Register .............................................................................................
10-97. EDMACC_EESRH Register ...........................................................................................
10-98. EDMACC_SER Register ...............................................................................................
10-99. EDMACC_SERH Register .............................................................................................
10-100. EDMACC_SECR Register ............................................................................................
10-101. EDMACC_SECRH Register ..........................................................................................
10-102. EDMACC_IER Register ...............................................................................................
10-103. EDMACC_IERH Register .............................................................................................
10-104. EDMACC_IECR Register .............................................................................................
10-105. EDMACC_IECRH Register ...........................................................................................
10-106. EDMACC_IESR Register .............................................................................................
10-107. EDMACC_IESRH Register ...........................................................................................
10-108. EDMACC_IPR Register ...............................................................................................
10-109. EDMACC_IPRH Register .............................................................................................
10-110. EDMACC_ICR Register ...............................................................................................
10-111. EDMACC_ICRH Register .............................................................................................
10-112. EDMACC_IEVAL Register ............................................................................................
10-113. EDMACC_QER Register .............................................................................................
10-114. EDMACC_QEER Register ............................................................................................
10-115. EDMACC_QEECR Register ..........................................................................................
10-116. EDMACC_QEESR Register ..........................................................................................
10-117. EDMACC_QSER Register ............................................................................................
10-74. EDMACC_QRAE0 to EDMACC_QRAE7 Register
30
List of Figures
1836
1837
1839
1841
1843
1845
1846
1848
1849
1851
1853
1855
1856
1857
1858
1860
1861
1863
1864
1866
1867
1868
1869
1870
1871
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1884
1885
1886
1887
1889
1891
1892
1893
1894
SPRUHY8I – January 2016 – Revised March 2019
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10-118. EDMACC_QSECR Register .......................................................................................... 1895
10-119. EDMATC_PID Register ............................................................................................... 1901
10-120. EDMATC_TCCFG Register
..........................................................................................
1902
10-121. EDMATC_TCSTAT Register ......................................................................................... 1903
10-122. EDMATC_ERRSTAT Register ....................................................................................... 1905
10-123. EDMATC_ERREN Register .......................................................................................... 1907
10-124. EDMATC_ERRCLR Register......................................................................................... 1909
10-125. EDMATC_ERRDET Register......................................................................................... 1910
10-126. EDMATC_ERRCMD Register ........................................................................................ 1912
10-127. EDMATC_RDRATE Register......................................................................................... 1913
..........................................................................................
10-129. EDMATC_SASRC Register ..........................................................................................
10-130. EDMATC_SACNT Register ..........................................................................................
10-131. EDMATC_SADST Register ...........................................................................................
10-132. EDMATC_SABIDX Register ..........................................................................................
10-133. EDMATC_SAMPPRXY Register .....................................................................................
10-134. EDMATC_SACNTRLD Register .....................................................................................
10-135. EDMATC_SASRCBREF Register ...................................................................................
10-136. EDMATC_SADSTBREF Register ...................................................................................
10-137. EDMATC_DFCNTRLD Register .....................................................................................
10-138. EDMATC_DFSRCBREF Register ...................................................................................
10-139. EDMATC_DFDSTBREF Register ...................................................................................
10-140. EDMATC_DFOPT0 Register .........................................................................................
10-141. EDMATC_DFSRC0 Register .........................................................................................
10-142. EDMATC_DFCNT0 Register .........................................................................................
10-143. EDMATC_DFDST0 Register .........................................................................................
10-144. EDMATC_DFBIDX0 Register ........................................................................................
10-145. EDMATC_DFMPPRXY0 Register ...................................................................................
10-146. EDMATC_DFOPT1 Register .........................................................................................
10-147. EDMATC_DFSRC1 Register .........................................................................................
10-148. EDMATC_DFCNT1 Register .........................................................................................
10-149. EDMATC_DFDST1 Register .........................................................................................
10-150. EDMATC_DFBIDX1 Register ........................................................................................
10-151. EDMATC_DFMPPRXY1 Register ...................................................................................
10-152. EDMATC_DFOPT2 Register .........................................................................................
10-153. EDMATC_DFSRC2 Register .........................................................................................
10-154. EDMATC_DFCNT2 Register .........................................................................................
10-155. EDMATC_DFDST2 Register .........................................................................................
10-156. EDMATC_DFBIDX2 Register ........................................................................................
10-157. EDMATC_DFMPPRXY2 Register ...................................................................................
10-158. EDMATC_DFOPT3 Register .........................................................................................
10-159. EDMATC_DFSRC3 Register .........................................................................................
10-160. EDMATC_DFCNT3 Register .........................................................................................
10-161. EDMATC_DFDST3 Register .........................................................................................
10-162. EDMATC_DFBIDX3 Register ........................................................................................
10-163. EDMATC_DFMPPRXY3 Register ...................................................................................
11-1. ASRC Overview Diagram ..............................................................................................
11-2. ASRC Integration Diagram .............................................................................................
11-3. ASRC Block Diagram ...................................................................................................
10-128. EDMATC_SAOPT Register
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
1915
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1930
1931
1932
1933
1934
1935
1937
1938
1939
1940
1941
1942
1944
1945
1946
1947
1948
1949
1951
1952
1953
1954
1955
1957
1959
1963
31
www.ti.com
11-4.
ASRC Input and Output Clock Zone Controls ....................................................................... 1966
11-5.
ASRC Stream Mode Audio Data Write for Channel N
11-6.
ASRC Stream Mode Audio Data Read for Channel N ............................................................. 1970
11-7.
ASRC Group Mode Audio Data Write for Channels of Group N .................................................. 1971
11-8.
ASRC Group Mode Audio Data Read from Channels of Group N
11-9.
ASRC Group Mode Example .......................................................................................... 1973
.............................................................
...............................................
1969
1971
11-10. ASRC Stream Mode Example ......................................................................................... 1975
11-11. ASRC_PID Register
....................................................................................................
1984
11-12. ASRC_SYSCONFIG Register ......................................................................................... 1985
1986
11-14. ASRC_IFIRQRAW Register
1987
11-15.
1989
11-16.
11-17.
11-18.
11-19.
11-20.
11-21.
11-22.
11-23.
11-24.
11-25.
11-26.
11-27.
11-28.
11-29.
11-30.
11-31.
11-32.
11-33.
11-34.
11-35.
11-36.
11-37.
11-38.
11-39.
11-40.
11-41.
11-42.
11-43.
11-44.
11-45.
11-46.
11-47.
11-48.
11-49.
11-50.
11-51.
11-52.
32
...............................................................................................
...........................................................................................
ASRC_IFIRQENSTS Register .........................................................................................
ASRC_IFIRQENSET Register .........................................................................................
ASRC_IFIRQENCLR Register.........................................................................................
ASRC_OFIRQRAW Register ..........................................................................................
ASRC_OFIRQENSTS Register .......................................................................................
ASRC_OFIRQENSET Register .......................................................................................
ASRC_OFIRQENCLR Register .......................................................................................
ASRC_IGIRQRAW Register ...........................................................................................
ASRC_IGIRQENSTS Register ........................................................................................
ASRC_IGIRQENSET Register ........................................................................................
ASRC_IGIRQENCLR Register ........................................................................................
ASRC_OGIRQRAW Register ..........................................................................................
ASRC_OGIRQENSTS Register .......................................................................................
ASRC_OGIRQENSET Register .......................................................................................
ASRC_OGIRQENCLR Register .......................................................................................
ASRC_ERIRQRAW Register ..........................................................................................
ASRC_ERIRQENSTS Register .......................................................................................
ASRC_ERIRQENSET Register .......................................................................................
ASRC_ERIRQENCLR Register .......................................................................................
ASRC_IGRPSEL_0 to ASRC_IGRPSEL_3 Register ...............................................................
ASRC_OGRPSEL_0 to ASRC_OGRPSEL_3 Register ............................................................
ASRC_ICKDIV Register ................................................................................................
ASRC_OCKDIV Register...............................................................................................
ASRC_SRCFFCTRL_0 Register ......................................................................................
ASRC_SRCCTRL_0 Register .........................................................................................
ASRC_SRCSTS_0 Register ...........................................................................................
ASRC_GFFCTRL_0 Register .........................................................................................
ASRC_GSRCCTRL_0 Register .......................................................................................
ASRC_ICKGENSTL_0 Register .......................................................................................
ASRC_ICKGENSTH_0 Register ......................................................................................
ASRC_ICKGENRTL_0 Register ......................................................................................
ASRC_ICKGENRTH_0 Register ......................................................................................
ASRC_ICKLPRTL_0 Register .........................................................................................
ASRC_ICKPRTH_0 Register ..........................................................................................
ASRC_ICKZCNT_0 Register ..........................................................................................
ASRC_ICKZCTRL_0 Register .........................................................................................
ASRC_OCKGENSTL_0 Register .....................................................................................
ASRC_OCKGENSTH_0 Register .....................................................................................
11-13. ASRC_IRQEOI Register
List of Figures
1991
1993
1995
1997
1999
2001
2003
2004
2005
2006
2007
2008
2009
2010
2011
2013
2015
2017
2019
2022
2025
2026
2027
2029
2031
2032
2034
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
SPRUHY8I – January 2016 – Revised March 2019
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11-53. ASRC_OCKGENRTL_0 Register ..................................................................................... 2046
11-54. ASRC_OCKGENRTH_0 Register ..................................................................................... 2047
11-55. ASRC_OCKLPRTL_0 Register ........................................................................................ 2048
11-56. ASRC_OCKLPRTH_0 Register ....................................................................................... 2049
11-57. ASRC_OCKLPSTL_0 Register ........................................................................................ 2050
.......................................................................................
11-59. ASRC_OCKZCNT_0 Register .........................................................................................
11-60. ASRC_OCKZCTRL_0 Register .......................................................................................
11-61. ASRC_ICKLPORTL_0 Register .......................................................................................
11-62. ASRC_ICKLPORTH_0 Register ......................................................................................
11-63. ASRC_OCKLPORTL_0 Register......................................................................................
11-64. ASRC_OCKLPORTH_0 Register .....................................................................................
11-65. ASRC_GIFDATAL_0 Register .........................................................................................
11-66. ASRC_GIFDATAR_0 Register ........................................................................................
11-67. ASRC_GOFDATAL_0 Register .......................................................................................
11-68. ASRC_GOFDATAR_0 Register .......................................................................................
11-69. ASRC_SIFDATAL_0 Register .........................................................................................
11-70. ASRC_SIFDATAR_0 Register.........................................................................................
11-71. ASRC_SOFDATAL_0 Register ........................................................................................
11-72. ASRC_SOFDATAR_0 Register .......................................................................................
11-73. DCAN Overview .........................................................................................................
11-74. DCAN Typical Application ..............................................................................................
11-75. DCAN_0 Integration.....................................................................................................
11-76. DCAN_1 Integration.....................................................................................................
11-77. DCAN Block Diagram ...................................................................................................
11-78. Error and Status Change Interrupts...................................................................................
11-79. Message Objects Interrupts ............................................................................................
11-80. Local Power-Down Mode Flow Diagram .............................................................................
11-81. Software Handling of a FIFO Buffer (Interrupt Driven) .............................................................
11-82. Bit Timing .................................................................................................................
11-83. The Propagation Time Segment ......................................................................................
11-84. Synchronization on Late and Early Edges ...........................................................................
11-85. Filtering of Short Dominant Spikes ....................................................................................
11-86. Structure of the CAN Core’s CAN Protocol Controller .............................................................
11-87. Data Transfer Between IF1/IF2 Registers and Message RAM ...................................................
11-88. CAN Module General Initialization Flow ..............................................................................
11-89. CAN Bit-Timing Configuration .........................................................................................
11-90. CAN Core in Silent Mode ..............................................................................................
11-91. CAN Core in Loopback Mode .........................................................................................
11-92. CAN Core in External Loopback Mode ...............................................................................
11-93. CAN Core in Loop Back Combined With Silent Mode .............................................................
11-94. DCAN_CTL Register ....................................................................................................
11-95. DCAN_ES Register .....................................................................................................
11-96. DCAN_ERRC Register .................................................................................................
11-97. DCAN_BTR Register ...................................................................................................
11-98. DCAN_INT Register ....................................................................................................
11-99. DCAN_TEST Register ..................................................................................................
11-100. DCAN_PERR Register ................................................................................................
11-101. DCAN_REL Register ..................................................................................................
11-58. ASRC_OCKLPSTH_0 Register
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
2051
2052
2053
2054
2055
2056
2057
2060
2061
2062
2063
2066
2067
2068
2069
2070
2072
2074
2075
2077
2079
2080
2081
2090
2091
2092
2094
2095
2096
2099
2106
2107
2110
2110
2111
2112
2116
2119
2122
2123
2125
2127
2129
2130
33
www.ti.com
11-102. DCAN_ECCDIAG Register ........................................................................................... 2131
11-103. DCAN_ECCDIAG_STAT Register ................................................................................... 2132
11-104. DCAN_ECC_CS Register
............................................................................................
2133
11-105. DCAN_ECC_SERR Register ......................................................................................... 2135
11-106. DCAN_ABOTR Register .............................................................................................. 2136
11-107. DCAN_TXRQ_X Register ............................................................................................. 2137
11-108. DCAN_TXRQ12 Register ............................................................................................. 2139
11-109. DCAN_TXRQ34 Register ............................................................................................. 2140
11-110. DCAN_TXRQ56 Register ............................................................................................. 2141
11-111. DCAN_TXRQ78 Register ............................................................................................. 2142
11-112. DCAN_NWDAT_X Register .......................................................................................... 2143
2145
11-114. DCAN_NWDAT34 Register
2146
11-115.
2147
11-116.
11-117.
11-118.
11-119.
11-120.
11-121.
11-122.
11-123.
11-124.
11-125.
11-126.
11-127.
11-128.
11-129.
11-130.
11-131.
11-132.
11-133.
11-134.
11-135.
11-136.
11-137.
11-138.
11-139.
11-140.
11-141.
11-142.
11-143.
11-144.
11-145.
11-146.
11-147.
11-148.
11-149.
11-150.
34
..........................................................................................
..........................................................................................
DCAN_NWDAT56 Register ..........................................................................................
DCAN_NWDAT78 Register ..........................................................................................
DCAN_INTPND_X Register ..........................................................................................
DCAN_INTPND12 Register ..........................................................................................
DCAN_INTPND34 Register ..........................................................................................
DCAN_INTPND56 Register ..........................................................................................
DCAN_INTPND78 Register ..........................................................................................
DCAN_MSGVAL_X Register .........................................................................................
DCAN_MSGVAL12 Register .........................................................................................
DCAN_MSGVAL34 Register .........................................................................................
DCAN_MSGVAL56 Register .........................................................................................
DCAN_MSGVAL78 Register .........................................................................................
DCAN_INTMUX12 Register ..........................................................................................
DCAN_INTMUX34 Register ..........................................................................................
DCAN_INTMUX56 Register ..........................................................................................
DCAN_INTMUX78 Register ..........................................................................................
DCAN_IF1CMD Register .............................................................................................
DCAN_IF1MSK Register ..............................................................................................
DCAN_IF1ARB Register ..............................................................................................
DCAN_IF1MCTL Register ............................................................................................
DCAN_IF1DATA Register ............................................................................................
DCAN_IF1DATB Register ............................................................................................
DCAN_IF2CMD Register .............................................................................................
DCAN_IF2MSK Register ..............................................................................................
DCAN_IF2ARB Register ..............................................................................................
DCAN_IF2MCTL Register ............................................................................................
DCAN_IF2DATA Register ............................................................................................
DCAN_IF2DATB Register ............................................................................................
DCAN_IF3OBS Register ..............................................................................................
DCAN_IF3MSK Register ..............................................................................................
DCAN_IF3ARB Register ..............................................................................................
DCAN_IF3MCTL Register ............................................................................................
DCAN_IF3DATA Register ............................................................................................
DCAN_IF3DATB Register ............................................................................................
DCAN_IF3UPD12 Register ...........................................................................................
DCAN_IF3UPD34 Register ...........................................................................................
11-113. DCAN_NWDAT12 Register
List of Figures
2148
2149
2151
2152
2153
2154
2155
2157
2158
2159
2160
2161
2162
2163
2164
2165
2168
2170
2172
2174
2175
2176
2179
2181
2183
2185
2186
2187
2189
2190
2192
2194
2195
2196
2197
SPRUHY8I – January 2016 – Revised March 2019
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11-151. DCAN_IF3UPD56 Register ........................................................................................... 2198
11-152. DCAN_IF3UPD78 Register ........................................................................................... 2199
11-153. DSS Overview .......................................................................................................... 2201
11-154. DSS Environment ...................................................................................................... 2202
11-155. DISPC VP1 Pixel Data Color-12 Active Matrix ..................................................................... 2204
11-156. DISPC VP1 Pixel Data Color-16 Active Matrix ..................................................................... 2205
11-157. DISPC VP1 Pixel Data Color-18 Active Matrix ..................................................................... 2205
11-158. DISPC VP1 Pixel Data Color-24 Active Matrix ..................................................................... 2206
11-159. DISPC Active Matrix Timing Diagram of Configuration 1 (Start of Frame) ..................................... 2207
11-160. DISPC Active Matrix Timing Diagram of Configuration 1 (Between Lines)
....................................
2207
11-161. DISPC Active Matrix Timing Diagram of Configuration 1 (Between Frames) .................................. 2207
11-162. DISPC Active Matrix Timing Diagram of Configuration 1 (End of Frame) ...................................... 2207
11-163. DISPC Active Matrix Timing Diagram of Configuration 2 (Start of Frame) ..................................... 2208
....................................
DISPC Active Matrix Timing Diagram of Configuration 2 (Between Frames) ..................................
DISPC Active Matrix Timing Diagram of Configuration 2 (End of Frame) ......................................
DISPC Active Matrix Timing Diagram of Configuration 3 (Start of Frame) .....................................
DISPC Active Matrix Timing Diagram of Configuration 3 (Between Lines) ....................................
DISPC Active Matrix Timing Diagram of Configuration 3 (Between Frames) ..................................
DISPC Active Matrix Timing Diagram of Configuration 3 (End of Frame) ......................................
11-164. DISPC Active Matrix Timing Diagram of Configuration 2 (Between Lines)
11-165.
11-166.
11-167.
11-168.
11-169.
11-170.
2208
2208
2209
2209
2209
2210
2210
11-171. RFBI External Generation of TE Signal Based on Logical OR Operation Between HSYNC and VSYNC
(Active High) ............................................................................................................. 2212
..........................................................................................
RFBI Display Data Read ..............................................................................................
RFBI Read to Write and Write to Read .............................................................................
DSS Integration ........................................................................................................
DISPC Architecture Overview ........................................................................................
DISPC YUV4:2:2 Predecimation .....................................................................................
DISPC Video Pipeline Configuration ................................................................................
DISPC VID1 CLUT Data Memory Organization ...................................................................
DISPC VID1 YUV4:2:0 to ARGB48 Using Scaler Unit for Resampling Chrominance ........................
DISPC VID1 YUV4:2:2 to ARGB48 Using Scaler Unit for Resampling Chrominance ........................
DISPC Video Up-sampling ...........................................................................................
11-172. RFBI Command Data Write
2213
11-173.
2214
11-174.
11-175.
11-176.
11-177.
11-178.
11-179.
11-180.
11-181.
11-182.
2214
2215
2218
2225
2228
2230
2230
2230
2231
11-183. DISPC VID1 Macro-Architecture of the Horizontal Scaling for A, R, G, and B Components (5-tap
Restriction) ............................................................................................................... 2233
11-184. DISPC VID1 Macro-Architecture of the Vertical Scaling for A, R, G, and B Components (5 and 3 taps).. 2233
11-185. DISPC VID1 Macro-Architecture of the Horizontal Scaling for Y, Cr, and Cb Components (5-tap
Restriction) ............................................................................................................... 2234
11-186. DISPC VID1 Macro-Architecture of the Vertical Scaling for Y, Cr, and Cb Components (5 and 3 taps) ... 2234
11-187. DISPC VID1 YCbCr to RGB Registers (FULLRANGE = 0), 12-Bit Outputs ................................... 2238
11-188. DISPC VID1 YCbCr to RGB Registers (FULLRANGE = 1), 12-Bit Outputs ................................... 2238
11-189. DISPC VP1 Output Architecture ..................................................................................... 2239
11-190. DISPC Data Memory Organization for Gamma Mode in VP1 Output .......................................... 2239
11-191. DISPC VP1 CPR Matrix............................................................................................... 2240
11-192. DISPC VP1 CPR Macro-Architecture ............................................................................... 2241
........................................................
........................................................
DISPC VP1 Data Mapping in BT.656 Mode ........................................................................
DISPC VP1 Data Mapping in BT.1120 Mode ......................................................................
DISPC BT Mode Bit-Assignment for the Fourth Byte of EAV/SAV Codes .....................................
11-193. DISPC VP1 CSC RGB to YUV Registers (FullRange=0)
2241
11-194. DISPC VP1 CSC RGB to YUV Registers (FullRange=1)
2241
11-195.
2242
11-196.
11-197.
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
2242
2243
35
www.ti.com
2245
11-199.
2246
11-200.
11-201.
11-202.
11-203.
11-204.
11-205.
11-206.
11-207.
11-208.
11-209.
11-210.
11-211.
11-212.
11-213.
11-214.
11-215.
11-216.
11-217.
11-218.
11-219.
11-220.
11-221.
11-222.
11-223.
11-224.
11-225.
11-226.
11-227.
11-228.
11-229.
11-230.
11-231.
11-232.
11-233.
11-234.
11-235.
11-236.
11-237.
11-238.
11-239.
11-240.
11-241.
11-242.
11-243.
11-244.
11-245.
11-246.
36
..........................................................................
DISPC VP1 TDM 9-Bit Interface Settings ..........................................................................
DISPC VP1 TDM 12-Bit Interface Settings .........................................................................
DISPC VP1 TDM 16-Bit Interface Settings .........................................................................
DISPC VP1 Timing Values (Display Screen) ......................................................................
DISPC Example TV Timing Formats ................................................................................
DISPC RFBI Data Stall Signal Diagram ............................................................................
DISPC RFBI Data Stall Signal Diagram with Handcheck ........................................................
RFBI Architecture Overview ..........................................................................................
RFBI Data Stall Signal Diagram .....................................................................................
RFBI Data Stall Signal Diagram with Handshake .................................................................
RFBI 8-Bit Interface Settings .........................................................................................
RFBI 9-Bit Interface Settings .........................................................................................
RFBI 12-Bit Interface Settings........................................................................................
RFBI 16-Bit Interface Settings........................................................................................
DSS_REVISION Register .............................................................................................
DSS_SYSCONFIG Register ..........................................................................................
DSS_SYSSTATUS Register .........................................................................................
DSS_RFBI_CTRL Register ...........................................................................................
DSS_DPI_CTRL Register ............................................................................................
DSS_DEBUG_CFG Register .........................................................................................
DISPC_REVISION Register ..........................................................................................
DISPC_SYSCONFIG Register .......................................................................................
DISPC_SYSSTATUS Register .......................................................................................
DISPC_IRQ_EOI Register ............................................................................................
DISPC_IRQSTATUS_RAW Register................................................................................
DISPC_IRQSTATUS Register .......................................................................................
DISPC_IRQENABLE_SET Register .................................................................................
DISPC_IRQENABLE_CLR Register ................................................................................
DISPC_IRQWAKEEN Register ......................................................................................
DISPC_GLOBAL_MFLAG_ATTRIBUTE Register .................................................................
DISPC_GLOBAL_BUFFER Register ................................................................................
DISPC_BA0_FLIPIMMEDIATE_EN Register ......................................................................
DISPC_DBG_CONTROL Register ..................................................................................
DISPC_DBG_STATUS Register .....................................................................................
DISPC_CLKGATING_DISABLE Register ..........................................................................
DISPC_VID1_ACCUH_0 to DISPC_VID1_ACCUH_1 Register .................................................
DISPC_VID1_ACCUH2_0 to DISPC_VID1_ACCUH2_1 Register ..............................................
DISPC_VID1_ACCUV_0 to DISPC_VID1_ACCUV_1 Register .................................................
DISPC_VID1_ACCUV2_0 to DISPC_VID1_ACCUV2_1 Register ..............................................
DISPC_VID1_ATTRIBUTES Register...............................................................................
DISPC_VID1_ATTRIBUTES2 Register .............................................................................
DISPC_VID1_BA_0 to DISPC_VID1_BA_1 Register .............................................................
DISPC_VID1_BA_UV_0 to DISPC_VID1_BA_UV_1 Register ..................................................
DISPC_VID1_BUF_SIZE_STATUS Register ......................................................................
DISPC_VID1_BUF_THRESHOLD Register ........................................................................
DISPC_VID1_CONV_COEF0 Register .............................................................................
DISPC_VID1_CONV_COEF1 Register .............................................................................
DISPC_VID1_CONV_COEF2 Register .............................................................................
11-198. DISPC VP1 TDM 8-Bit Interface Settings
List of Figures
2247
2248
2250
2250
2251
2252
2253
2255
2256
2261
2262
2263
2264
2268
2269
2270
2271
2272
2273
2275
2276
2278
2279
2280
2282
2284
2286
2288
2290
2291
2293
2294
2295
2296
2305
2306
2307
2308
2309
2314
2316
2317
2318
2319
2320
2321
2322
SPRUHY8I – January 2016 – Revised March 2019
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11-247. DISPC_VID1_CONV_COEF3 Register ............................................................................. 2323
11-248. DISPC_VID1_CONV_COEF4 Register ............................................................................. 2324
11-249. DISPC_VID1_CONV_COEF5 Register ............................................................................. 2325
11-250. DISPC_VID1_CONV_COEF6 Register ............................................................................. 2326
11-251. DISPC_VID1_FIRH Register ......................................................................................... 2327
.......................................................................................
DISPC_VID1_FIRV Register .........................................................................................
DISPC_VID1_FIRV2 Register ........................................................................................
DISPC_VID1_FIR_COEF_H0_0 to DISPC_VID1_FIR_COEF_H0_8 Register ................................
DISPC_VID1_FIR_COEF_H0_C_0 to DISPC_VID1_FIR_COEF_H0_C_8 Register .........................
DISPC_VID1_FIR_COEF_H12_0 to DISPC_VID1_FIR_COEF_H12_15 Register ...........................
DISPC_VID1_FIR_COEF_H12_C_0 to DISPC_VID1_FIR_COEF_H12_C_15 Register ....................
DISPC_VID1_FIR_COEF_V0_0 to DISPC_VID1_FIR_COEF_V0_8 Register ................................
DISPC_VID1_FIR_COEF_V0_C_0 to DISPC_VID1_FIR_COEF_V0_C_8 Register .........................
DISPC_VID1_FIR_COEF_V12_0 to DISPC_VID1_FIR_COEF_V12_15 Register ...........................
DISPC_VID1_FIR_COEF_V12_C_0 to DISPC_VID1_FIR_COEF_V12_C_15 Register.....................
DISPC_VID1_GLOBAL_ALPHA Register ..........................................................................
DISPC_VID1_IRQENABLE Register ................................................................................
DISPC_VID1_IRQSTATUS Register ................................................................................
DISPC_VID1_MFLAG_THRESHOLD Register ....................................................................
DISPC_VID1_PICTURE_SIZE Register ............................................................................
DISPC_VID1_PIXEL_INC Register .................................................................................
DISPC_VID1_POSITION Register ..................................................................................
DISPC_VID1_PRELOAD Register ..................................................................................
DISPC_VID1_ROW_INC Register...................................................................................
DISPC_VID1_SIZE Register .........................................................................................
DISPC_VID1_CLUT Register ........................................................................................
DISPC_OVR1_CONFIG Register ...................................................................................
DISPC_OVR1_DEFAULT_COLOR Register.......................................................................
DISPC_OVR1_DEFAULT_COLOR2 Register .....................................................................
DISPC_OVR1_TRANS_COLOR_MAX Register ..................................................................
DISPC_OVR1_TRANS_COLOR_MAX2 Register .................................................................
DISPC_OVR1_TRANS_COLOR_MIN Register ...................................................................
DISPC_OVR1_TRANS_COLOR_MIN2 Register ..................................................................
DISPC_VP1_CONFIG Register ......................................................................................
DISPC_VP1_CONTROL Register ...................................................................................
DISPC_VP1_CPR_COEF_B Register ..............................................................................
DISPC_VP1_CPR_COEF_G Register ..............................................................................
DISPC_VP1_CPR_COEF_R Register ..............................................................................
DISPC_VP1_DATA_CYCLE_0 to DISPC_VP1_DATA_CYCLE_2 Register ...................................
DISPC_VP1_GAMMA_TABLE Register ............................................................................
DISPC_VP1_IRQENABLE Register .................................................................................
DISPC_VP1_IRQSTATUS Register .................................................................................
DISPC_VP1_LINE_NUMBER Register .............................................................................
DISPC_VP1_POL_FREQ Register ..................................................................................
DISPC_VP1_SIZE_SCREEN Register .............................................................................
DISPC_VP1_TIMING_H Register ...................................................................................
DISPC_VP1_TIMING_V Register ...................................................................................
RFBI_REVISION Register ............................................................................................
11-252. DISPC_VID1_FIRH2 Register
11-253.
11-254.
11-255.
11-256.
11-257.
11-258.
11-259.
11-260.
11-261.
11-262.
11-263.
11-264.
11-265.
11-266.
11-267.
11-268.
11-269.
11-270.
11-271.
11-272.
11-273.
11-274.
11-275.
11-276.
11-277.
11-278.
11-279.
11-280.
11-281.
11-282.
11-283.
11-284.
11-285.
11-286.
11-287.
11-288.
11-289.
11-290.
11-291.
11-292.
11-293.
11-294.
11-295.
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2342
2344
2345
2346
2347
2348
2349
2350
2351
2354
2356
2357
2358
2359
2360
2361
2365
2368
2371
2372
2373
2374
2375
2376
2378
2380
2381
2383
2384
2385
2389
37
www.ti.com
11-296. RFBI_SYSCONFIG Register ......................................................................................... 2390
11-297. RFBI_SYSSTATUS Register ......................................................................................... 2392
11-298. RFBI_CONTROL Register ............................................................................................ 2394
11-299. RFBI_PIXEL_CNT Register .......................................................................................... 2396
11-300. RFBI_LINE_NUMBER Register ...................................................................................... 2397
11-301. RFBI_CMD Register ................................................................................................... 2398
11-302. RFBI_PARAM Register ............................................................................................... 2399
11-303. RFBI_DATA Register .................................................................................................. 2400
2401
11-305.
2402
11-306.
11-307.
11-308.
11-309.
11-310.
11-311.
11-312.
11-313.
11-314.
11-315.
11-316.
11-317.
11-318.
11-319.
11-320.
11-321.
11-322.
11-323.
11-324.
11-325.
11-326.
11-327.
11-328.
11-329.
11-330.
11-331.
11-332.
11-333.
11-334.
11-335.
11-336.
11-337.
11-338.
11-339.
11-340.
11-341.
11-342.
11-343.
11-344.
38
.................................................................................................
RFBI_STATUS Register ..............................................................................................
RFBI_CONFIG__0 Register ..........................................................................................
RFBI_ONOFF_TIME__0 Register ...................................................................................
RFBI_CYCLE_TIME__0 Register ...................................................................................
RFBI_DATA_CYCLE1__0 Register .................................................................................
RFBI_DATA_CYCLE2__0 Register .................................................................................
RFBI_DATA_CYCLE3__0 Register .................................................................................
RFBI_CONFIG__1 Register ..........................................................................................
RFBI_ONOFF_TIME__1 Register ...................................................................................
RFBI_CYCLE_TIME__1 Register ...................................................................................
RFBI_DATA_CYCLE1__1 Register .................................................................................
RFBI_DATA_CYCLE2__1 Register .................................................................................
RFBI_DATA_CYCLE3__1 Register .................................................................................
RFBI_VSYNC_WIDTH Register .....................................................................................
RFBI_HSYNC_WIDTH Register .....................................................................................
eCAP External Interface I/Os ........................................................................................
eCAP Integration .......................................................................................................
eCAP Daisy-Chain Connectivity .....................................................................................
Multiple eCAP Modules ...............................................................................................
eCAP Input Events ....................................................................................................
Capture and APWM Modes of Operation ...........................................................................
Capture Function Diagram ...........................................................................................
Event Prescale Control ................................................................................................
Prescale Function Waveforms .......................................................................................
eCAP Continuous/One-shot Block Diagram .......................................................................
eCAP Counter and Synchronization Block Diagram .............................................................
Interrupts in eCAP Module............................................................................................
PWM Waveform Details Of eCAP APWM Mode Operation .....................................................
PWMSS_ECAP_TSCNT Register ...................................................................................
PWMSS_ECAP_CNTPHS Register .................................................................................
PWMSS_ECAP_CAP1 Register .....................................................................................
PWMSS_ECAP_CAP2 Register .....................................................................................
PWMSS_ECAP_CAP3 Register .....................................................................................
PWMSS_ECAP_CAP4 Register .....................................................................................
PWMSS_ECAP_ECCTL1 Register ..................................................................................
PWMSS_ECAP_ECCTL2 Register ..................................................................................
PWMSS_ECAP_ECEINT Register ..................................................................................
PWMSS_ECAP_ECFLG Register ...................................................................................
PWMSS_ECAP_ECCLR Register ...................................................................................
PWMSS_ECAP_ECFRC Register ...................................................................................
11-304. RFBI_READ Register
List of Figures
2403
2406
2407
2409
2410
2411
2412
2415
2416
2418
2419
2420
2421
2422
2424
2425
2426
2427
2428
2430
2431
2432
2432
2433
2434
2436
2437
2440
2441
2442
2443
2444
2445
2446
2448
2450
2451
2452
2453
SPRUHY8I – January 2016 – Revised March 2019
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.......................................................................................
Multiple ePWM Modules ..............................................................................................
Submodules and Signal Connections for an ePWM Module .....................................................
ePWM Submodules and Critical Internal Signal Interconnects ..................................................
ePWM External Interface I/Os .......................................................................................
ePWM Integration .....................................................................................................
ePWM Tripzone Connectivity Detail .................................................................................
Daisy-Chain Connectivity between ePWM Modules ..............................................................
Interconnectivity of ADC start of conversion .......................................................................
ePWM Time-Base Submodule .......................................................................................
ePWM Time-Base Submodule Signals and Registers ............................................................
ePWM Time-Base Frequency and Period ..........................................................................
ePWM Time-Base Counter Synchronization Scheme 1 ..........................................................
ePWM Time-Base Up-Count Mode Waveforms ...................................................................
ePWM Time-Base Down-Count Mode Waveforms ................................................................
11-345. PWMSS_ECAP_PID Register
11-346.
11-347.
11-348.
11-349.
11-350.
11-351.
11-352.
11-353.
11-354.
11-355.
11-356.
11-357.
11-358.
11-359.
2454
2456
2457
2458
2460
2462
2465
2467
2469
2474
2475
2477
2478
2479
2480
11-360. ePWM Time-Base Up-Down-Count Waveforms, EPWM_TBCTL[13] PHSDIR = 0 Count Down on
Synchronization Event .................................................................................................. 2481
11-361. ePWM Time-Base Up-Down Count Waveforms, EPWM_TBCTL[13] PHSDIR = 1 Count Up on
Synchronization Event .................................................................................................. 2482
11-362. ePWM Counter-Compare Submodule
..............................................................................
2483
11-363. ePWM Counter-Compare Submodule Signals and Registers ................................................... 2484
11-364. Compare A Dual Shadow register ................................................................................... 2485
11-365. Compare B Dual Shadow register ................................................................................... 2486
11-366. ePWM Counter-Compare Event Waveforms in Up-Count Mode ................................................ 2487
11-367. ePWM Counter-Compare Events in Down-Count Mode.......................................................... 2487
11-368. ePWM Counter-Compare Events in Up-Down-Count Mode, EPWM_TBCTL[13] PHSDIR = 0 Count
Down on Synchronization Event ...................................................................................... 2488
11-369. ePWM Counter-Compare Events in Up-Down-Count Mode, EPWM_TBCTL[13] PHSDIR = 1 Count Up
on Synchronization Event ............................................................................................. 2488
11-370. ePWM Action-Qualifier Submodule.................................................................................. 2489
11-371. ePWM Action-Qualifier Submodule Inputs and Outputs .......................................................... 2490
11-372. Possible Action-Qualifier Actions for EPWMxA and EPWMxB Outputs ........................................ 2491
11-373. ePWM Up-Down-Count Mode Symmetrical Waveform ........................................................... 2494
11-374. Up, Single Edge Asymmetric Waveform, With Independent Modulation on EPWMxA and EPWMxB —
Active High ............................................................................................................... 2495
11-375. Up, Single Edge Asymmetric Waveform With Independent Modulation on EPWMxA and EPWMxB —
Active Low ................................................................................................................ 2497
11-376. Up-Count, Pulse Placement Asymmetric Waveform With Independent Modulation on EPWMxA .......... 2499
11-377. Up-Down-Count, Dual Edge Symmetric Waveform, With Independent Modulation on EPWMxA and
EPWMxB — Active Low ................................................................................................ 2501
11-378. Up-Down-Count, Dual Edge Symmetric Waveform, With Independent Modulation on EPWMxA and
EPWMxB — Complementary .......................................................................................... 2503
11-379. Up-Down-Count, Dual Edge Asymmetric Waveform, With Independent Modulation on EPWMxA —
Active Low ................................................................................................................ 2505
11-380. Dead-Band Generator Submodule .................................................................................. 2507
11-381. Configuration Options for the ePWM Dead-Band Generator Submodule ...................................... 2508
11-382. Dead-Band Waveforms for Typical Cases (0% < Duty < 100%) ................................................ 2510
11-383. PWM-Chopper Submodule ........................................................................................... 2511
11-384. PWM-Chopper Submodule Signals and Registers ................................................................ 2512
11-385. Simple ePWM-Chopper Submodule Waveforms Showing Chopping Action Only ............................ 2513
11-386. ePWM-Chopper Submodule Waveforms Showing the First Pulse and Subsequent Sustaining Pulses ... 2513
SPRUHY8I – January 2016 – Revised March 2019
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11-387. ePWM-Chopper Submodule Waveforms Showing the Pulse Width (Duty Cycle) Control of Sustaining
Pulses ..................................................................................................................... 2514
11-388. ePWM Trip-Zone Submodule ........................................................................................ 2515
11-389. ePWM Trip-Zone Submodule Mode Control Logic ................................................................ 2518
11-390. ePWM Trip-Zone Submodule Interrupt Logic ...................................................................... 2519
11-391. ePWM Event-Trigger Submodule .................................................................................... 2519
11-392. ePWM Event-Trigger Submodule Inter-Connectivity to Interrupt Controller
...................................
2520
11-393. ePWM Event-Trigger Submodule Showing Event Inputs and Prescaled Outputs ............................ 2521
11-394. ePWM Event-Trigger Interrupt Generator .......................................................................... 2523
11-395. ePWM Event-Trigger SOCA Pulse Generator ..................................................................... 2523
11-396. ePWM Event-Trigger SOCB Pulse Generator ..................................................................... 2524
11-397. HRPWM System Interface ............................................................................................ 2525
11-398. Resolution Calculations for Conventionally Generated PWM .................................................... 2526
11-399. Operating Logic Using MEP .......................................................................................... 2527
11-400. Required PWM Waveform for a Requested Duty = 40.5% ....................................................... 2529
11-401. Low % Duty Cycle Range Limitation Example When PWM Frequency = 1 MHz ............................. 2531
11-402. High % Duty Cycle Range Limitation Example when PWM Frequency = 1 MHz ............................. 2531
11-403. EPWM_TBCTL Register .............................................................................................. 2536
11-404. EPWM_TBSTS Register .............................................................................................. 2539
11-405. HRPWM_TBPHSHR Register ........................................................................................ 2540
11-406. EPWM_TBPHS Register .............................................................................................. 2541
11-407. EPWM_TBCNT Register .............................................................................................. 2542
2543
11-409.
2544
11-410.
11-411.
11-412.
11-413.
11-414.
11-415.
11-416.
11-417.
11-418.
11-419.
11-420.
11-421.
11-422.
11-423.
11-424.
11-425.
11-426.
11-427.
11-428.
11-429.
11-430.
11-431.
11-432.
11-433.
11-434.
40
.............................................................................................
EPWM_CMPCTL Register............................................................................................
HRPWM_CMPAHR Register .........................................................................................
EPWM_CMPA Register ...............................................................................................
EPWM_CMPB Register ...............................................................................................
EPWM_AQCTLA Register ............................................................................................
EPWM_AQCTLB Register ............................................................................................
EPWM_AQSFRC Register ...........................................................................................
EPWM_AQCSFRC Register .........................................................................................
EPWM_DBCTL Register ..............................................................................................
EPWM_DBRED Register .............................................................................................
EPWM_DBFED Register .............................................................................................
EPWM_TZSEL Register ..............................................................................................
EPWM_TZCTL Register ..............................................................................................
EPWM_TZEINT Register .............................................................................................
EPWM_TZFLG Register ..............................................................................................
EPWM_TZCLR Register ..............................................................................................
EPWM_TZFRC Register ..............................................................................................
EPWM_ETSEL Register ..............................................................................................
EPWM_ETPS Register ................................................................................................
EPWM_ETFLG Register ..............................................................................................
EPWM_ETCLR Register ..............................................................................................
EPWM_ETFRC Register ..............................................................................................
EPWM_PCCTL Register ..............................................................................................
HRPWM_HRCTL Register............................................................................................
Optical Encoder Disk .................................................................................................
QEP Encoder Output Signal for Forward/Reverse Movement ...................................................
11-408. EPWM_TBPRD Register
List of Figures
2546
2547
2549
2551
2553
2555
2557
2558
2560
2561
2562
2565
2566
2567
2569
2570
2571
2573
2575
2577
2578
2580
2582
2584
2585
SPRUHY8I – January 2016 – Revised March 2019
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11-435. Index Pulse Example ................................................................................................. 2585
11-436. eQEP External Interface I/Os
........................................................................................
2588
11-437. eQEP Integration ....................................................................................................... 2589
11-438. Functional Block Diagram of the eQEP Peripheral ............................................................... 2591
11-439. Functional Block Diagram of Decoder Unit ......................................................................... 2593
11-440. Quadrature Decoder State Machine ................................................................................. 2595
11-441. Quadrature-clock and Direction Decoding .......................................................................... 2595
11-442. Position Counter Reset by Index Pulse for 1000 Line Encoder (QPOSMAX = 3999 or F9Fh) ............. 2597
........................................................
Software Index Marker for 1000-line Encoder (EQEP_QEPCTL[5-4] IEL = 0b01)............................
eQEP Strobe Event Latch (EQEP_QEPCTL[6] SEL = 0b1).....................................................
eQEP Position-compare Unit ........................................................................................
eQEP Position-compare Event Generation Points ................................................................
eQEP Position-compare Sync Output Pulse Stretcher...........................................................
eQEP Edge Capture Unit ............................................................................................
Unit Position Event for Low Speed Measurement (EQEP_QCAPCTL[UPPS] = 0010) ......................
eQEP Edge Capture Unit - Timing Details .........................................................................
eQEP Watchdog Timer ...............................................................................................
eQEP Unit Time Base ................................................................................................
EQEP Interrupt Generation ..........................................................................................
EQEP_QPOSCNT Register ..........................................................................................
EQEP_QPOSINIT Register ...........................................................................................
EQEP_QPOSMAX Register ..........................................................................................
EQEP_QPOSCMP Register ..........................................................................................
EQEP_QPOSILAT Register ..........................................................................................
EQEP_QPOSSLAT Register .........................................................................................
EQEP_QPOSLAT Register ...........................................................................................
EQEP_QUTMR Register ..............................................................................................
EQEP_QUPRD Register ..............................................................................................
EQEP_QWDTMR Register ...........................................................................................
EQEP_QWDPRD Register ...........................................................................................
EQEP_QDECCTL Register ...........................................................................................
EQEP_QEPCTL Register .............................................................................................
EQEP_QCAPCTL Register ...........................................................................................
EQEP_QPOSCTL Register ...........................................................................................
EQEP_QEINT Register ...............................................................................................
EQEP_QFLG Register ................................................................................................
EQEP_QCLR Register ................................................................................................
EQEP_QFRC Register ................................................................................................
EQEP_QEPSTS Register .............................................................................................
EQEP_QCTMR Register ..............................................................................................
EQEP_QCPRD Register ..............................................................................................
EQEP_QCTMRLAT Register .........................................................................................
EQEP_QCPRDLAT Register .........................................................................................
EQEP_REVID Register ...............................................................................................
GPIO Overview.........................................................................................................
GPIO Typical Application .............................................................................................
GPIO_0 and GPIO_1 Signal Connections ..........................................................................
GPIO Integration .......................................................................................................
11-443. Position Counter Underflow/Overflow (QPOSMAX = 4)
2598
11-444.
2600
11-445.
11-446.
11-447.
11-448.
11-449.
11-450.
11-451.
11-452.
11-453.
11-454.
11-455.
11-456.
11-457.
11-458.
11-459.
11-460.
11-461.
11-462.
11-463.
11-464.
11-465.
11-466.
11-467.
11-468.
11-469.
11-470.
11-471.
11-472.
11-473.
11-474.
11-475.
11-476.
11-477.
11-478.
11-479.
11-480.
11-481.
11-482.
11-483.
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
2601
2602
2603
2603
2605
2605
2606
2607
2608
2608
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2625
2627
2629
2630
2632
2634
2636
2638
2640
2641
2642
2643
2644
2645
2647
2648
2649
41
www.ti.com
11-484. GPIO Block Diagram .................................................................................................. 2651
11-485. GPIO_PID Register .................................................................................................... 2664
11-486. GPIO_BINTEN Register
..............................................................................................
2665
11-487. GPIO_DIR01 Register ................................................................................................. 2666
11-488. GPIO_OUT_DATA01 Register ....................................................................................... 2667
2668
11-490.
2669
11-491.
11-492.
11-493.
11-494.
11-495.
11-496.
11-497.
11-498.
11-499.
11-500.
11-501.
11-502.
11-503.
11-504.
11-505.
11-506.
11-507.
11-508.
11-509.
11-510.
11-511.
11-512.
11-513.
11-514.
11-515.
11-516.
11-517.
11-518.
11-519.
11-520.
11-521.
11-522.
11-523.
11-524.
11-525.
11-526.
11-527.
11-528.
11-529.
11-530.
11-531.
11-532.
42
.......................................................................................
GPIO_CLR_DATA01 Register .......................................................................................
GPIO_IN_DATA01 Register ..........................................................................................
GPIO_SET_RIS_TRIG01 Register ..................................................................................
GPIO_CLR_RIS_TRIG01 Register ..................................................................................
GPIO_SET_FAL_TRIG01 Register ..................................................................................
GPIO_CLR_FAL_TRIG01 Register .................................................................................
GPIO_INTSTAT01 Register ..........................................................................................
GPIO_DIR23 Register .................................................................................................
GPIO_OUT_DATA23 Register .......................................................................................
GPIO_SET_DATA23 Register .......................................................................................
GPIO_CLR_DATA23 Register .......................................................................................
GPIO_IN_DATA23 Register ..........................................................................................
GPIO_SET_RIS_TRIG23 Register ..................................................................................
GPIO_CLR_RIS_TRIG23 Register ..................................................................................
GPIO_SET_FAL_TRIG23 Register ..................................................................................
GPIO_CLR_FAL_TRIG23 Register .................................................................................
GPIO_INTSTAT23 Register ..........................................................................................
GPIO_DIR45 Register .................................................................................................
GPIO_OUT_DATA45 Register .......................................................................................
GPIO_SET_DATA45 Register .......................................................................................
GPIO_CLR_DATA45 Register .......................................................................................
GPIO_IN_DATA45 Register ..........................................................................................
GPIO_SET_RIS_TRIG45 Register ..................................................................................
GPIO_CLR_RIS_TRIG45 Register ..................................................................................
GPIO_SET_FAL_TRIG45 Register ..................................................................................
GPIO_CLR_FAL_TRIG45 Register .................................................................................
GPIO_INTSTAT45 Register ..........................................................................................
GPIO_DIR67 Register .................................................................................................
GPIO_OUT_DATA67 Register .......................................................................................
GPIO_SET_DATA67 Register .......................................................................................
GPIO_CLR_DATA67 Register .......................................................................................
GPIO_IN_DATA67 Register ..........................................................................................
GPIO_SET_RIS_TRIG67 Register ..................................................................................
GPIO_CLR_RIS_TRIG67 Register ..................................................................................
GPIO_SET_FAL_TRIG67 Register ..................................................................................
GPIO_CLR_FAL_TRIG67 Register .................................................................................
GPIO_INTSTAT67 Register ..........................................................................................
GPIO_DIR8 Register ..................................................................................................
GPIO_OUT_DATA8 Register ........................................................................................
GPIO_SET_DATA8 Register .........................................................................................
GPIO_CLR_DATA8 Register .........................................................................................
GPIO_IN_DATA8 Register ...........................................................................................
GPIO_SET_RIS_TRIG8 Register ....................................................................................
11-489. GPIO_SET_DATA01 Register
List of Figures
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
SPRUHY8I – January 2016 – Revised March 2019
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...................................................................................
GPIO_SET_FAL_TRIG8 Register ...................................................................................
GPIO_CLR_FAL_TRIG8 Register ...................................................................................
GPIO_INTSTAT8 Register............................................................................................
I2C Modules Overview ................................................................................................
Multiple I2C Modules Connected ....................................................................................
I2C Integration ..........................................................................................................
I2C Block Diagram .....................................................................................................
Clocking Diagram for the I2C Module ...............................................................................
I2C Data Transfer ......................................................................................................
I2C Module 7-Bit Addressing Format (FDF = 0, XA = 0 in I2C_ICMDR) .......................................
I2C Module Free Data Format (FDF = 1 in I2C_ICMDR).........................................................
I2C Module 7-Bit Addressing Format With Repeated START Condition .......................................
Bit Transfer on the I2C-Bus ...........................................................................................
I2C START and STOP Condition Events ...........................................................................
Arbitration Procedure Between Two Master-Transmitters ........................................................
Synchronization of Two I2C Clock Generators During Arbitration ...............................................
I2C_ICOAR Register ..................................................................................................
I2C_ICIMR Register ...................................................................................................
I2C_ICSTR Register ...................................................................................................
Roles of the Clock Divide-Down Values (ICCL and ICCH) .......................................................
I2C_ICCLKL Register .................................................................................................
I2C_ICCLKH Register .................................................................................................
I2C_ICCNT Register ...................................................................................................
I2C_ICDRR Register ..................................................................................................
I2C_ICSAR Register ...................................................................................................
I2C_ICDXR Register ..................................................................................................
I2C_ICMDR Register ..................................................................................................
Block Diagram Showing the Effects of the Digital Loopback Mode (DLB) Bit .................................
I2C_ICIVR Register ....................................................................................................
I2C_ICEMDR Register ................................................................................................
I2C_ICPSC Register ...................................................................................................
I2C_ICPID1 Register ..................................................................................................
I2C_ICPID2 Register ..................................................................................................
Example I2C Interface ................................................................................................
Normal Read Cycle ....................................................................................................
Bus-Hang Read Cycle.................................................................................................
I2C Master Bus Hang .................................................................................................
Multiple Master Bus Hang ............................................................................................
McASP Modules Overview ...........................................................................................
McASP Modules Environment .......................................................................................
McASP Definition of Bit, Word, and Slot ............................................................................
McASP Bit Order and Word Alignment Within a Slot Examples .................................................
McASP Definition of Frame and Frame-Sync Width ..............................................................
McASP TDM Format - 6 Channel Example .......................................................................
McASP I2S Format Overview .........................................................................................
McASP Biphase-Mark Code ..........................................................................................
McASP S/PDIF Subframe Format ...................................................................................
McASP S/PDIF Frame Format .......................................................................................
11-533. GPIO_CLR_RIS_TRIG8 Register
2712
11-534.
2713
11-535.
11-536.
11-537.
11-538.
11-539.
11-540.
11-541.
11-542.
11-543.
11-544.
11-545.
11-546.
11-547.
11-548.
11-549.
11-550.
11-551.
11-552.
11-553.
11-554.
11-555.
11-556.
11-557.
11-558.
11-559.
11-560.
11-561.
11-562.
11-563.
11-564.
11-565.
11-566.
11-567.
11-568.
11-569.
11-570.
11-571.
11-572.
11-573.
11-574.
11-575.
11-576.
11-577.
11-578.
11-579.
11-580.
11-581.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Figures
2714
2715
2716
2718
2720
2722
2724
2725
2726
2726
2726
2727
2727
2729
2729
2733
2734
2736
2740
2741
2742
2743
2744
2745
2746
2747
2751
2752
2753
2754
2755
2756
2757
2758
2758
2759
2760
2761
2764
2768
2769
2770
2771
2772
2773
2774
2774
43
www.ti.com
11-582. McASP Integration ..................................................................................................... 2776
11-583. McASP Module Block Diagram ...................................................................................... 2779
11-584. McASP Transmit Clock Generator Block Diagram ................................................................ 2781
11-585. McASP Receive Clock Generator Block Diagram ................................................................. 2782
11-586. McASP Frame Sync Generator Block Diagram .................................................................... 2783
11-587. McASP Individual Serializer and Connections ..................................................................... 2785
11-588. McASP Transmit Format Unit ........................................................................................ 2787
11-589. McASP Receive Format Unit ......................................................................................... 2790
....................................................................................
McASP Transmit DMA Event (XEVENT) Generation in TDM Time Slots ......................................
McASP CPU Service Time Upon Transmit DMA Event (AXEVT) ...............................................
McASP CPU Service Time Upon Receive Event (AREVT) ......................................................
McASP DMA Transmit and Receive Event in an Audio Example – One Event ...............................
McASP Audio FIFO (AFIFO) Block Diagram .......................................................................
McASP Serializers Operation in Loopback Mode .................................................................
McASP Transmit Clock Failure Detection Circuit Block Diagram ...............................................
McASP Receive Clock Failure Detection Circuit Block Diagram ................................................
MCASP_REV Register ................................................................................................
MCASP_PWRIDLESYSCONFIG Register .........................................................................
MCASP_PFUNC Register ............................................................................................
MCASP_PDIR Register ...............................................................................................
MCASP_PDOUT Register ............................................................................................
MCASP_PDIN Register ...............................................................................................
MCASP_PDSET Register ............................................................................................
MCASP_PDCLR Register ............................................................................................
MCASP_GBLCTL Register ...........................................................................................
MCASP_AMUTE Register ............................................................................................
MCASP_DLBCTL Register ...........................................................................................
MCASP_DITCTL Register ............................................................................................
MCASP_RGBLCTL Register .........................................................................................
MCASP_RMASK Register ............................................................................................
MCASP_RFMT Register ..............................................................................................
MCASP_AFSRCTL Register .........................................................................................
MCASP_ACLKRCTL Register .......................................................................................
MCASP_AHCLKRCTL Register .....................................................................................
MCASP_RTDM Register ..............................................................................................
MCASP_RINTCTL Register ..........................................................................................
MCASP_RSTAT Register .............................................................................................
MCASP_RSLOT Register ............................................................................................
MCASP_RCLKCHK Register.........................................................................................
MCASP_REVTCTL Register .........................................................................................
MCASP_XGBLCTL Register .........................................................................................
MCASP_XMASK Register ............................................................................................
MCASP_XFMT Register ..............................................................................................
MCASP_AFSXCTL Register .........................................................................................
MCASP_ACLKXCTL Register .......................................................................................
MCASP_AHCLKXCTL Register......................................................................................
MCASP_XTDM Register ..............................................................................................
MCASP_XINTCTL Register ..........................................................................................
11-590. McASP Burst Frame Sync Mode
11-591.
11-592.
11-593.
11-594.
11-595.
11-596.
11-597.
11-598.
11-599.
11-600.
11-601.
11-602.
11-603.
11-604.
11-605.
11-606.
11-607.
11-608.
11-609.
11-610.
11-611.
11-612.
11-613.
11-614.
11-615.
11-616.
11-617.
11-618.
11-619.
11-620.
11-621.
11-622.
11-623.
11-624.
11-625.
11-626.
11-627.
11-628.
11-629.
11-630.
44
List of Figures
2793
2795
2800
2801
2803
2805
2810
2814
2815
2822
2823
2824
2826
2828
2830
2832
2834
2836
2839
2842
2844
2846
2848
2849
2851
2853
2855
2857
2858
2860
2863
2864
2866
2867
2869
2870
2873
2875
2877
2879
2880
SPRUHY8I – January 2016 – Revised March 2019
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11-631. MCASP_XSTAT Register ............................................................................................. 2882
11-632. MCASP_XSLOT Register ............................................................................................. 2885
11-633. MCASP_XCLKCHK Register ......................................................................................... 2886
11-634. MCASP_XEVTCTL Register ......................................................................................... 2888
11-635. MCASP_DITCSRA0 Register ........................................................................................ 2889
11-636. MCASP_DITCSRA1 Register ........................................................................................ 2890
11-637. MCASP_DITCSRA2 Register ........................................................................................ 2891
11-638. MCASP_DITCSRA3 Register ........................................................................................ 2892
11-639. MCASP_DITCSRA4 Register ........................................................................................ 2893
11-640. MCASP_DITCSRA5 Register ........................................................................................ 2894
11-641. MCASP_DITCSRB0 Register ........................................................................................ 2895
11-642. MCASP_DITCSRB1 Register ........................................................................................ 2896
11-643. MCASP_DITCSRB2 Register ........................................................................................ 2897
11-644. MCASP_DITCSRB3 Register ........................................................................................ 2898
11-645. MCASP_DITCSRB4 Register ........................................................................................ 2899
11-646. MCASP_DITCSRB5 Register ........................................................................................ 2900
11-647. MCASP_DITUDRA0 Register ........................................................................................ 2901
11-648. MCASP_DITUDRA1 Register ........................................................................................ 2902
11-649. MCASP_DITUDRA2 Register ........................................................................................ 2903
11-650. MCASP_DITUDRA3 Register ........................................................................................ 2904
11-651. MCASP_DITUDRA4 Register ........................................................................................ 2905
11-652. MCASP_DITUDRA5 Register ........................................................................................ 2906
11-653. MCASP_DITUDRB0 Register ........................................................................................ 2907
11-654. MCASP_DITUDRB1 Register ........................................................................................ 2908
11-655. MCASP_DITUDRB2 Register ........................................................................................ 2909
11-656. MCASP_DITUDRB3 Register ........................................................................................ 2910
11-657. MCASP_DITUDRB4 Register ........................................................................................ 2911
11-658. MCASP_DITUDRB5 Register ........................................................................................ 2912
11-659. MCASP_SRCTL0 Register ........................................................................................... 2913
11-660. MCASP_SRCTL1 Register ........................................................................................... 2915
11-661. MCASP_SRCTL2 Register ........................................................................................... 2917
11-662. MCASP_SRCTL3 Register ........................................................................................... 2919
11-663. MCASP_SRCTL4 Register ........................................................................................... 2921
11-664. MCASP_SRCTL5 Register ........................................................................................... 2923
11-665. MCASP_SRCTL6 Register ........................................................................................... 2925
11-666. MCASP_SRCTL7 Register ........................................................................................... 2927
11-667. MCASP_SRCTL8 Register ........................................................................................... 2929
11-668. MCASP_SRCTL9 Register ........................................................................................... 2931
11-669. MCASP_SRCTL10 Register .......................................................................................... 2933
11-670. MCASP_SRCTL11 Register .......................................................................................... 2935
11-671. MCASP_SRCTL12 Register .......................................................................................... 2937
11-672. MCASP_SRCTL13 Register .......................................................................................... 2939
11-673. MCASP_SRCTL14 Register .......................................................................................... 2941
11-674. MCASP_SRCTL15 Register .......................................................................................... 2943
11-675. MCASP_XBUF0 Register ............................................................................................. 2945
11-676. MCASP_XBUF1 Register ............................................................................................. 2946
11-677. MCASP_XBUF2 Register ............................................................................................. 2947
11-678. MCASP_XBUF3 Register ............................................................................................. 2948
11-679. MCASP_XBUF4 Register ............................................................................................. 2949
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
45
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11-680. MCASP_XBUF5 Register ............................................................................................. 2950
11-681. MCASP_XBUF6 Register ............................................................................................. 2951
11-682. MCASP_XBUF7 Register ............................................................................................. 2952
11-683. MCASP_XBUF8 Register ............................................................................................. 2953
11-684. MCASP_XBUF9 Register ............................................................................................. 2954
11-685. MCASP_XBUF10 Register ........................................................................................... 2955
11-686. MCASP_XBUF11 Register ........................................................................................... 2956
11-687. MCASP_XBUF12 Register ........................................................................................... 2957
11-688. MCASP_XBUF13 Register ........................................................................................... 2958
11-689. MCASP_XBUF14 Register ........................................................................................... 2959
11-690. MCASP_XBUF15 Register ........................................................................................... 2960
11-691. MCASP_RBUF0 Register ............................................................................................. 2961
11-692. MCASP_RBUF1 Register ............................................................................................. 2962
11-693. MCASP_RBUF2 Register ............................................................................................. 2963
11-694. MCASP_RBUF3 Register ............................................................................................. 2964
11-695. MCASP_RBUF4 Register ............................................................................................. 2965
11-696. MCASP_RBUF5 Register ............................................................................................. 2966
11-697. MCASP_RBUF6 Register ............................................................................................. 2967
11-698. MCASP_RBUF7 Register ............................................................................................. 2968
11-699. MCASP_RBUF8 Register ............................................................................................. 2969
11-700. MCASP_RBUF9 Register ............................................................................................. 2970
11-701. MCASP_RBUF10 Register ........................................................................................... 2971
11-702. MCASP_RBUF11 Register ........................................................................................... 2972
11-703. MCASP_RBUF12 Register ........................................................................................... 2973
11-704. MCASP_RBUF13 Register ........................................................................................... 2974
11-705. MCASP_RBUF14 Register ........................................................................................... 2975
11-706. MCASP_RBUF15 Register ........................................................................................... 2976
11-707. MCASP_WFIFOCTL Register ........................................................................................ 2977
.......................................................................................
MCASP_RFIFOCTL Register ........................................................................................
MCASP_RFIFOSTS Register ........................................................................................
MCASP_XBUF Register ..............................................................................................
MCASP_RBUF Register ..............................................................................................
McBSP Module Overview .............................................................................................
McBSP Module Environment .........................................................................................
McBSP Integration .....................................................................................................
McBSP Block Diagram ................................................................................................
Clock and Frame Generation.........................................................................................
Transmit Data Clocking ...............................................................................................
Receive Data Clocking ................................................................................................
Sample Rate Generator Block Diagram ............................................................................
CLKG Synchronization and FSG Generation When GSYNC = 1 and CLKGDV = 1 .........................
CLKG Synchronization and FSG Generation When GSYNC = 1 and CLKGDV = 3 .........................
Digital Loopback Mode ................................................................................................
Programmable Frame Period and Width ...........................................................................
Dual-Phase Frame Example .........................................................................................
Single-Phase Frame of Four 8-Bit Elements .......................................................................
Single-Phase Frame of One 32-Bit Element .......................................................................
Data Delay ..............................................................................................................
11-708. MCASP_WFIFOSTS Register
11-709.
11-710.
11-711.
11-712.
11-713.
11-714.
11-715.
11-716.
11-717.
11-718.
11-719.
11-720.
11-721.
11-722.
11-723.
11-724.
11-725.
11-726.
11-727.
11-728.
46
List of Figures
2979
2980
2982
2983
2985
2986
2988
2989
2991
2992
2993
2993
2994
2996
2997
2997
2999
3001
3003
3003
3004
SPRUHY8I – January 2016 – Revised March 2019
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11-729. 2-Bit Data Delay Used to Discard Framing Bit ..................................................................... 3004
11-730. McBSP Standard Operation .......................................................................................... 3008
11-731. Receive Operation ..................................................................................................... 3009
11-732. Transmit Operation .................................................................................................... 3010
11-733. Maximum Frame Frequency for Transmit and Receive
..........................................................
3010
11-734. Unexpected Frame Synchronization With (R/X)FIG = 0 .......................................................... 3011
11-735. Unexpected Frame Synchronization With (R/X)FIG = 1 .......................................................... 3012
11-736. Maximum Frame Frequency Operation With 8-Bit Data .......................................................... 3012
11-737. Data Packing at Maximum Frame Frequency With (R/X)FIG = 1 ............................................... 3013
11-738. Serial Port Receive Overrun .......................................................................................... 3014
11-739. Serial Port Receive Overrun Avoided ............................................................................... 3014
11-740. Decision Tree Response to Receive Frame Synchronization Pulse ............................................ 3015
11-741. Unexpected Receive Frame Synchronization Pulse .............................................................. 3016
........................................................................................
Transmit Empty ........................................................................................................
Transmit Empty Avoided ..............................................................................................
Decision Tree Response to Transmit Frame Synchronization Pulse ...........................................
Unexpected Transmit Frame Synchronization Pulse..............................................................
McBSP Buffer FIFO (BFIFO) Block Diagram ......................................................................
DX Timing for Multi-channel Operation .............................................................................
Alternating Between the Channels of Partition A and the Channels of Partition B ............................
Reassigning Channel Blocks Throughout a McBSP Data Transfer .............................................
McBSP Data Transfer in the 8-Partition Mode .....................................................................
Activity on McBSP Pins for the Possible Values of XMCM ......................................................
Companding Flow......................................................................................................
Companding Flow......................................................................................................
Transmit Data Companding Format in MCBSP_DXR ............................................................
Companding of Internal Data .........................................................................................
MCBSP_DRR Register ................................................................................................
MCBSP_DXR Register ................................................................................................
MCBSP_SPCR Register ..............................................................................................
MCBSP_RCR Register ................................................................................................
MCBSP_XCR Register ................................................................................................
MCBSP_SRGR Register ..............................................................................................
MCBSP_MCR Register ...............................................................................................
MCBSP_RCERE0 Register ..........................................................................................
MCBSP_RCERE1 Register ..........................................................................................
MCBSP_RCERE2 Register ..........................................................................................
MCBSP_RCERE3 Register ..........................................................................................
MCBSP_XCERE0 Register ...........................................................................................
MCBSP_XCERE1 Register ...........................................................................................
MCBSP_XCERE2 Register ...........................................................................................
MCBSP_XCERE3 Register ...........................................................................................
MCBSP_PCR Register ................................................................................................
MCBSP_BFIFOREV Register ........................................................................................
MCBSP_WFIFOCTL Register ........................................................................................
MCBSP_WFIFOSTS Register .......................................................................................
MCBSP_RFIFOCTL Register ........................................................................................
MCBSP_RFIFOSTS Register ........................................................................................
11-742. Transmit with Data Overwrite
11-743.
11-744.
11-745.
11-746.
11-747.
11-748.
11-749.
11-750.
11-751.
11-752.
11-753.
11-754.
11-755.
11-756.
11-757.
11-758.
11-759.
11-760.
11-761.
11-762.
11-763.
11-764.
11-765.
11-766.
11-767.
11-768.
11-769.
11-770.
11-771.
11-772.
11-773.
11-774.
11-775.
11-776.
11-777.
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
List of Figures
3016
3017
3017
3018
3019
3019
3022
3024
3024
3025
3031
3032
3032
3032
3033
3047
3048
3049
3053
3055
3057
3059
3064
3068
3072
3076
3080
3092
3104
3116
3128
3131
3132
3134
3135
3137
47
www.ti.com
11-778. MLB Overview .......................................................................................................... 3138
11-779. MLB Subsystem Environment ........................................................................................ 3140
11-780. MLB Subsystem Integration .......................................................................................... 3141
11-781. MLBSS Structural Overview .......................................................................................... 3143
11-782. MLBSS DBR Directional Relationship............................................................................... 3147
3148
11-784.
3153
11-785.
11-786.
11-787.
11-788.
11-789.
11-790.
11-791.
11-792.
11-793.
11-794.
11-795.
11-796.
11-797.
11-798.
11-799.
11-800.
11-801.
11-802.
11-803.
11-804.
11-805.
11-806.
11-807.
11-808.
11-809.
11-810.
11-811.
11-812.
11-813.
11-814.
11-815.
11-816.
11-817.
11-818.
11-819.
11-820.
11-821.
11-822.
11-823.
11-824.
11-825.
11-826.
48
.................................................................................
DMA Descriptor Table Endian Options .............................................................................
Ping-Pong System Memory Structure ...............................................................................
Single-Packet Mode Memory Space ................................................................................
Multi-Packet Mode System Memory .................................................................................
MLBSS Software and Data Tx Flow Overview .....................................................................
MLBSS Software and Data Rx Flow Overview ....................................................................
MLB_MLBC0 Register ................................................................................................
MLB_MS0 Register ....................................................................................................
MLB_MS1 Register ....................................................................................................
MLB_MSS Register ....................................................................................................
MLB_MSD Register ...................................................................................................
MLB_MIEN Register ...................................................................................................
MLB_MLBC1 Register ................................................................................................
MLB_HCTL Register ..................................................................................................
MLB_HCMR0 Register ................................................................................................
MLB_HCMR1 Register ................................................................................................
MLB_HCER0 Register ................................................................................................
MLB_HCER1 Register ................................................................................................
MLB_HCBR0 Register ................................................................................................
MLB_HCBR1 Register ................................................................................................
MLB_MDAT0 Register ................................................................................................
MLB_MDAT1 Register ................................................................................................
MLB_MDAT2 Register ................................................................................................
MLB_MDAT3 Register ................................................................................................
MLB_MDWE0 Register ...............................................................................................
MLB_MDWE1 Register ...............................................................................................
MLB_MDWE2 Register ...............................................................................................
MLB_MDWE3 Register ...............................................................................................
MLB_MCTL Register ..................................................................................................
MLB_MADR Register..................................................................................................
MLB_ACTL Register ...................................................................................................
MLB_ACSR0 Register ................................................................................................
MLB_ACSR1 Register ................................................................................................
MLB_ACMR0 Register ................................................................................................
MLB_ACMR1 Register ................................................................................................
MMCi Overview (i = 0 to 1) ...........................................................................................
MMCi Host Controller Connected to a MMC/SD/SDIO Card or eMMC Device (where i = 0 to 1) ..........
Sequential Read Operation (MMCs Only) ..........................................................................
Sequential Write Operation (MMCs Only) ..........................................................................
Multiple Block Read Operation .......................................................................................
Multiple Block Write Operation With Card Busy Signal ...........................................................
Command Token Format .............................................................................................
Response Token Format (R1, R3, R4, R5, R6, R7) ..............................................................
11-783. Synchronous Data Buffer Structure
List of Figures
3154
3156
3157
3158
3159
3171
3173
3174
3175
3177
3178
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3200
3201
3202
3203
3204
3207
3209
3209
3209
3210
3211
3211
SPRUHY8I – January 2016 – Revised March 2019
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11-827. Response Token Format (R2)........................................................................................ 3211
11-828. Data Token Format for 1-Bit Transfers.............................................................................. 3212
11-829. Data Token Format for 4-Bit Transfers.............................................................................. 3212
11-830. Data Token Format for 8-Bit Transfers.............................................................................. 3213
11-831. MMC Integration
.......................................................................................................
3214
11-832. MMC Diagram .......................................................................................................... 3216
11-833. ADMA Block Diagram Overview ..................................................................................... 3223
11-834. ADMA Finite State-Machine .......................................................................................... 3225
11-835. DMA Receive Mode ................................................................................................... 3227
11-836. DMA Transmit Mode................................................................................................... 3228
11-837. Buffer Management for a Write ...................................................................................... 3230
11-838. Buffer Management for a Read ...................................................................................... 3231
11-839. Busy Time-Out for R1b, R5b Response Type
.....................................................................
3234
11-840. Busy Time-Out After Write CRC Status ............................................................................. 3234
11-841. Write CRC Status Time-Out .......................................................................................... 3235
..................................................................................................
Boot Acknowledge Time-Out When Using CMD0 .................................................................
Boot Acknowledge Time-Out When CMD Line Tied to 0 .........................................................
Output Driven on Falling Edge .......................................................................................
Boot Mode Using the CMD0 Timing Diagram ......................................................................
Boot Mode With CMD Line Tied to 0 Timing Diagram ............................................................
MMC Controller Software Reset Flow ...............................................................................
MMC Controller Bus Configuration ..................................................................................
MMC Controller Card Identification and Selection – Part 1 ......................................................
MMC Controller Card Identification and Selection – Part 2 ......................................................
MMC Controller Read/Write Transfer Flow in DMA Slave Mode With interrupt ...............................
MMC Controller Read/Write Transfer Flow in DMA Mode With Polling ........................................
MMC Controller Read/Write Transfer Flow Without DMA and With Polling ....................................
MMC Controller Read/Write in CE-ATA Mode .....................................................................
MMC Controller Suspend Flow ......................................................................................
MMC Controller Resume Flow .......................................................................................
MMC Controller Command Transfer Flow With Polling ...........................................................
MMC Controller Command Transfer Flow With interrupts........................................................
MMC Controller Clock Frequency Change Flow...................................................................
MMC Controller Bus Width Configuration Flow ....................................................................
MMC Controller Boot Using CMD0 ..................................................................................
MMC Controller Boot With CMD Line Tied to 0 ....................................................................
MMCHS_HL_REV Register ..........................................................................................
MMCHS_HL_HWINFO Register .....................................................................................
MMCHS_HL_SYSCONFIG Register ................................................................................
MMCHS_SYSCONFIG Register .....................................................................................
MMCHS_SYSSTATUS Register .....................................................................................
MMCHS_CSRE Register .............................................................................................
MMCHS_SYSTEST Register.........................................................................................
MMCHS_CON Register ...............................................................................................
MMCHS_PWCNT Register ...........................................................................................
MMCHS_DLL Register ................................................................................................
MMCHS_SDMASA Register .........................................................................................
MMCHS_BLK Register ................................................................................................
11-842. Read Data Time-Out
3235
11-843.
3236
11-844.
11-845.
11-846.
11-847.
11-848.
11-849.
11-850.
11-851.
11-852.
11-853.
11-854.
11-855.
11-856.
11-857.
11-858.
11-859.
11-860.
11-861.
11-862.
11-863.
11-864.
11-865.
11-866.
11-867.
11-868.
11-869.
11-870.
11-871.
11-872.
11-873.
11-874.
11-875.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Figures
3236
3238
3239
3239
3243
3244
3245
3246
3248
3249
3250
3251
3253
3254
3255
3256
3257
3258
3259
3260
3263
3264
3266
3268
3270
3271
3272
3276
3282
3283
3285
3286
49
www.ti.com
11-876. MMCHS_ARG Register ............................................................................................... 3288
11-877. MMCHS_CMD Register ............................................................................................... 3289
11-878. MMCHS_RSP10 Register ............................................................................................ 3294
11-879. MMCHS_RSP32 Register ............................................................................................ 3295
11-880. MMCHS_RSP54 Register ............................................................................................ 3296
11-881. MMCHS_RSP76 Register ............................................................................................ 3297
11-882. MMCHS_DATA Register .............................................................................................. 3298
11-883. MMCHS_PSTATE Register
..........................................................................................
3299
11-884. MMCHS_HCTL Register .............................................................................................. 3304
11-885. MMCHS_SYSCTL Register
..........................................................................................
3308
11-886. MMCHS_STAT Register .............................................................................................. 3311
11-887. MMCHS_IE Register .................................................................................................. 3318
11-888. MMCHS_ISE Register
................................................................................................
3321
11-889. MMCHS_AC12 Register .............................................................................................. 3324
11-890. MMCHS_CAPA Register
.............................................................................................
3328
11-891. MMCHS_CAPA2 Register ............................................................................................ 3332
11-892. MMCHS_CUR_CAPA Register ...................................................................................... 3336
.................................................................................................
.........................................................................................
MMCHS_ADMASAL Register ........................................................................................
MMCHS_PVINITSD Register ........................................................................................
MMCHS_PVHSSDR12 Register .....................................................................................
MMCHS_PVSDR25SDR50 Register ................................................................................
MMCHS_PVSDR104DDR50 Register ..............................................................................
MMCHS_REV Register ...............................................................................................
NSS Overview ..........................................................................................................
Navigator Subsystem Hardware Block Diagram ...................................................................
Packet Queuing Data Structure Diagram ...........................................................................
Host Packet Tx Operation – Complete Packet Return ............................................................
Host Packet Tx Operation – Automatic Buffer Recycling Packet Return .......................................
Monolithic Packet Tx Operation ......................................................................................
Packet Receive Operation (Host Packet) ...........................................................................
Monolithic Packet Receive Operation ...............................................................................
EMAC Overview........................................................................................................
MII Interface Typical Application .....................................................................................
RMII Interface Typical Application ...................................................................................
RGMII Interface Typical Application .................................................................................
EMAC Integration ......................................................................................................
CPTS Integration .......................................................................................................
EMAC Top Level Block Diagram ....................................................................................
CPSW_2U Block Diagram ............................................................................................
The Network Static with AVB .........................................................................................
AVB Network & PTP Clock Entities .................................................................................
IEEE 1722 Packets ....................................................................................................
Cross Time Stamping and Presentation Timestamps.............................................................
AV Stream Queuing/Policing .........................................................................................
CPTS Block Diagram ..................................................................................................
Event FIFO Misalignment Condition .................................................................................
11-893. MMCHS_FE Register
3337
11-894. MMCHS_ADMAES Register
3340
11-895.
3342
11-896.
11-897.
11-898.
11-899.
11-900.
11-901.
11-902.
11-903.
11-904.
11-905.
11-906.
11-907.
11-908.
11-909.
11-910.
11-911.
11-912.
11-913.
11-914.
11-915.
11-916.
11-917.
11-918.
11-919.
11-920.
11-921.
11-922.
11-923.
3343
3345
3347
3349
3351
3352
3357
3366
3371
3372
3373
3375
3376
3392
3395
3396
3397
3399
3400
3402
3404
3414
3415
3416
3417
3418
3443
3446
11-924. Partial Ethernet-II Frames Showing Register Mapping of EtherTypes for a Simple Frame (1), a Single
50
List of Figures
SPRUHY8I – January 2016 – Revised March 2019
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1Q Tag Added (2), and Two 1Q Tags Added (3) ................................................................... 3447
11-925. SS_IDVER Register ................................................................................................... 3460
11-926. SS_CONTROL Register .............................................................................................. 3461
.......................................................................................
SS_SUBSSYSTEM_STATUS Register .............................................................................
CPSW_IDVER Register ...............................................................................................
CPSW_CONTROL Register ..........................................................................................
CPSW_EM_CONTROL Register ....................................................................................
CPSW_STAT_PORT_EN Register ..................................................................................
CPSW_SOFT_IDLE Register ........................................................................................
CPSW_EEE_PRESCALE Register ..................................................................................
CPSW_P0_CONTROL Register .....................................................................................
CPSW_P0_FLOW_ID_OFFSET Register ..........................................................................
p0_blk_cnt Register ...................................................................................................
p0_port_vlan Register .................................................................................................
CPSW_P0_PRI_CTL Register .......................................................................................
p0_rx_pri_map Register...............................................................................................
CPSW_P0_RX_MAXLEN Register ..................................................................................
CPSW_P0_IDLE2LPI Register .......................................................................................
p0_lpi2wake Register..................................................................................................
CPSW_P0_EEE_STATUS Register .................................................................................
CPSW_P0_RX_DSCP_MAP_0 to CPSW_P0_RX_DSCP_MAP_7 Register ..................................
CPSW_P0_PRI_SEND_0 to CPSW_P0_PRI_SEND_7 Register ...............................................
CPSW_P0_PRI_IDLE_0 to CPSW_P0_PRI_IDLE_7 Register ..................................................
CPSW_P0_SRC_ID_A Register .....................................................................................
CPSW_P1_RESERVED Register ...................................................................................
CPSW_P1_CONTROL Register .....................................................................................
CPSW_P1_MAX_BLKS Register ....................................................................................
CPSW_P1_BLK_CNT Register ......................................................................................
CPSW_P1_PORT_VLAN Register ..................................................................................
CPSW_P1_PRI_CTL Register .......................................................................................
CPSW_P1_RX_PRI_MAP Register .................................................................................
CPSW_P1_RX_MAXLEN Register ..................................................................................
CPSW_P1_IDLE2LPI Register .......................................................................................
CPSW_P1_LPI2WAKE Register .....................................................................................
CPSW_P1_EEE_STATUS Register .................................................................................
CPSW_P1_RX_DSCP_MAP_0 to CPSW_P1_RX_DSCP_MAP_7 Register ..................................
CPSW_P1_PRI_SEND_0 to CPSW_P1_PRI_SEND_7 Register ...............................................
CPSW_P1_PRI_IDLE_0 to CPSW_P1_PRI_IDLE_7 Register ..................................................
CPSW_P1_SA_L Register............................................................................................
CPSW_P1_SA_H Register ...........................................................................................
CPSW_P1_TS_CTL Register ........................................................................................
CPSW_P1_TS_SEQ_LTYPE Register .............................................................................
CPSW_P1_TS_VLAN_LTYPE Register ............................................................................
CPSW_P1_TS_CTL_LTYPE2 Register.............................................................................
CPSW_P1_TS_CTL2 Register .......................................................................................
CPSW_P1_MAC_CONTROL Register .............................................................................
CPSW_P1_MAC_STATUS Register ................................................................................
CPSW_P1_MAC_SOFT_RESET Register .........................................................................
11-927. SS_RGMII_STATUS Register
3462
11-928.
3463
11-929.
11-930.
11-931.
11-932.
11-933.
11-934.
11-935.
11-936.
11-937.
11-938.
11-939.
11-940.
11-941.
11-942.
11-943.
11-944.
11-945.
11-946.
11-947.
11-948.
11-949.
11-950.
11-951.
11-952.
11-953.
11-954.
11-955.
11-956.
11-957.
11-958.
11-959.
11-960.
11-961.
11-962.
11-963.
11-964.
11-965.
11-966.
11-967.
11-968.
11-969.
11-970.
11-971.
11-972.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Figures
3467
3468
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3502
3503
3504
3505
3506
3508
3509
3510
3512
3513
3516
3518
51
www.ti.com
11-973. CPSW_P1_MAC_BOFFTEST Register............................................................................. 3519
11-974. CPSW_P1_MAC_RX_PAUSETIMER Register .................................................................... 3520
11-975. CPSW_P1_MAC_TX_PAUSETIMER Register .................................................................... 3521
.........................................................................
11-977. CPSW_P1_MAC_TX_GAP Register ................................................................................
11-978. ALE_IDVER Register ..................................................................................................
11-979. ALE_STATUS Register ...............................................................................................
11-980. ALE_CONTROL Register .............................................................................................
11-981. ALE_PRESCALE Register............................................................................................
11-982. ALE_AGING_TIMER Register .......................................................................................
11-983. ALE_TABLE_CONTROL Register ...................................................................................
11-984. ALE_TABLE_WORD2 Register ......................................................................................
11-985. ALE_TABLE_WORD1 Register ......................................................................................
11-986. table_word0 Register ..................................................................................................
11-987. ALE_PORT_CONTROL_0 to ALE_PORT_CONTROL_7 Register .............................................
11-988. ALE_UNKNOWN_VLAN Register ...................................................................................
11-989. ALE_UNKNOWN_UREG_MCAST_FLOOD Register .............................................................
11-990. ALE_UNKNOWN_REG_MCAST_FLOOD Register ...............................................................
11-991. ALE_FORCE_UNTAGGED_EGRESS Register ...................................................................
11-992. ALE_VLAN_MASK_MUX_0 to ALE_VLAN_MASK_MUX_3 Register ..........................................
11-993. ALE_POLICER_PORT_OUI Register ...............................................................................
11-994. ALE_POLICER_DA_SA Register ....................................................................................
11-995. ALE_POLICER_VLAN Register......................................................................................
11-996. ALE_POLICER_ETHERTYPE_IPSA Register .....................................................................
11-997. ALE_POLICER_IPDA Register ......................................................................................
11-998. ALE_POLICER_TBL_CTL Register .................................................................................
11-999. ALE_THREAD_DEF Register ........................................................................................
11-1000. ALE_THREAD_CTL Register .......................................................................................
11-1001. ALE_THREAD_VAL Register .......................................................................................
11-1002. CPTS_IDVER Register ..............................................................................................
11-1003. CPTS_CONTROL Register .........................................................................................
11-1004. CPTS_RFTCLK_SEL Register .....................................................................................
11-1005. CPTS_TS_PUSH Register ..........................................................................................
11-1006. CPTS_TS_LOAD_LOW_VAL Register ............................................................................
11-1007. CPTS_TS_LOAD_EN Register .....................................................................................
11-1008. CPTS_TS_LOW_COMP_VAL Register ...........................................................................
11-1009. CPTS_TS_COMP_LEN Register...................................................................................
11-1010. CPTS_INTSTAT_RAW Register ...................................................................................
11-1011. CPTS_INTSTAT_MASKED Register ..............................................................................
11-1012. CPTS_INT_ENABLE Register ......................................................................................
11-1013. CPTS_TS_COMP_NUDGE Register ..............................................................................
11-1014. CPTS_EVENT_POP Register ......................................................................................
11-1015. CPTS_EVENT_0 Register ..........................................................................................
11-1016. CPTS_EVENT_1 Register ..........................................................................................
11-1017. CPTS_EVENT_HIGH Register .....................................................................................
11-1018. CPTS_EVENT_3 Register ..........................................................................................
11-1019. CPTS_TS_LOAD_HIGH_VAL Register ...........................................................................
11-1020. CPTS_TS_COMP_HIGH_VAL Register ..........................................................................
11-1021. MDIO_VERSION Register ..........................................................................................
11-976. CPSW_P1_MAC_EMCONTROL Register
52
List of Figures
3522
3523
3526
3527
3528
3531
3532
3533
3534
3535
3536
3537
3539
3540
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3554
3555
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3575
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
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11-1022. MDIO_CONTROL Register ......................................................................................... 3576
11-1023. MDIO_ALIVE Register ............................................................................................... 3578
11-1024. MDIO_LINK Register
................................................................................................
3579
11-1025. MDIO_LINK_INT_RAW Register ................................................................................... 3580
11-1026. MDIO_LINK_INT_MASKED Register .............................................................................. 3581
.................................................................................
MDIO_USER_INT_MASKED Register ............................................................................
MDIO_USER_INT_MASK_SET Register .........................................................................
MDIO_USER_INT_MASK_CLEAR Register......................................................................
MDIO_USER_ACCESS_0 to MDIO_USER_ACCESS_1 Register ............................................
MDIO_USER_PHY_SEL_0 to MDIO_USER_PHY_SEL_1 Register ..........................................
ECC_REVISION Register ...........................................................................................
ECC_VECTOR Register .............................................................................................
ECC_MISC_STATUS Register .....................................................................................
ECC_WRAPPER_REVISION Register ............................................................................
ECC_CONTROL Register ...........................................................................................
ECC_ERROR_CONTROL1 Register ..............................................................................
ECC_ERROR_CONTROL2 Register ..............................................................................
ECC_ERROR_STATUS1 Register ................................................................................
ECC_ERROR_STATUS2 Register ................................................................................
ECC_EOI Register ...................................................................................................
ECC_INT_STATUS_0 to ECC_INT_STATUS_15 Register ....................................................
ECC_INT_ENABLE_0 to ECC_INT_ENABLE_15 Register ....................................................
ECC_INT_CLEAR_0 to ECC_INT_CLEAR_15 Register ........................................................
REVISION_REGISTER Register ...................................................................................
INTD_REVISION_REG Register ...................................................................................
INTD_CONTROL_REG Register ...................................................................................
INTD_EOI_REG Register ...........................................................................................
INTD_INTR_VECTOR_REG Register .............................................................................
INTD_STATUS_REG0 Register ....................................................................................
INTD_STATUS_CLR_REG0 Register .............................................................................
INTD_INTCNT_REG0 Register.....................................................................................
INTD_INTR_VECTOR_REG_HOST Register ....................................................................
CDMA_REVISION_REG Register .................................................................................
CDMA_PERF_CONTROL_REG Register ........................................................................
CDMA_EMULATION_CONTROL_REG Register ................................................................
CDMA_PRIORITY_CONTROL_REG Register ...................................................................
CDMA_QM_BASE_ADDRESS_REG_0 to CDMA_QM_BASE_ADDRESS_REG_3 Register ............
11-1027. MDIO_USER_INT_RAW Register
3582
11-1028.
3583
11-1029.
11-1030.
11-1031.
11-1032.
11-1033.
11-1034.
11-1035.
11-1036.
11-1037.
11-1038.
11-1039.
11-1040.
11-1041.
11-1042.
11-1043.
11-1044.
11-1045.
11-1046.
11-1047.
11-1048.
11-1049.
11-1050.
11-1051.
11-1052.
11-1053.
11-1054.
11-1055.
11-1056.
11-1057.
11-1058.
11-1059.
3584
3585
3586
3588
3590
3591
3592
3593
3594
3595
3596
3597
3599
3600
3601
3602
3603
3605
3607
3608
3609
3610
3611
3613
3614
3615
3617
3618
3619
3620
3621
11-1060. CDMA_TX_CHANNEL_SCHEDULER_CONFIG_REG_0 to
CDMA_TX_CHANNEL_SCHEDULER_CONFIG_REG_8 Register .............................................. 3623
11-1061. CDMA_TX_CHANNEL_GLOBAL_CONFIG_REG_A_0 to
CDMA_TX_CHANNEL_GLOBAL_CONFIG_REG_A_8 Register ................................................. 3625
11-1062. CDMA_TX_CHANNEL_GLOBAL_CONFIG_REG_B_0 to
CDMA_TX_CHANNEL_GLOBAL_CONFIG_REG_B_8 Register ................................................. 3627
11-1063. CDMA_RX_CHANNEL_GLOBAL_CONFIG_REG_0 to
CDMA_RX_CHANNEL_GLOBAL_CONFIG_REG_25 Register .................................................. 3630
.........
.........
CDMA_RX_FLOW_CONFIG_REG_C_0 to CDMA_RX_FLOW_CONFIG_REG_C_31 Register .........
CDMA_RX_FLOW_CONFIG_REG_D_0 to CDMA_RX_FLOW_CONFIG_REG_D_31 Register .........
11-1064. CDMA_RX_FLOW_CONFIG_REG_A_0 to CDMA_RX_FLOW_CONFIG_REG_A_31 Register
3632
11-1065. CDMA_RX_FLOW_CONFIG_REG_B_0 to CDMA_RX_FLOW_CONFIG_REG_B_31 Register
3634
11-1066.
3635
11-1067.
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
List of Figures
3637
53
www.ti.com
.........
CDMA_RX_FLOW_CONFIG_REG_F_0 to CDMA_RX_FLOW_CONFIG_REG_F_31 Register ..........
CDMA_RX_FLOW_CONFIG_REG_G_0 to CDMA_RX_FLOW_CONFIG_REG_G_31 Register .........
CDMA_RX_FLOW_CONFIG_REG_H_0 to CDMA_RX_FLOW_CONFIG_REG_H_31 Register .........
QM_REVISION_REG Register .....................................................................................
QM_QUEUE_DIVERSION_REG Register ........................................................................
QM_LINKING_RAM_REGION_0_BASE_ADDRESS_REG Register .........................................
QM_LINKING_RAM_REGION_0_SIZE_REG Register .........................................................
QM_LINKING_RAM_REGION_1_BASE_ADDRESS_REG Register .........................................
11-1068. CDMA_RX_FLOW_CONFIG_REG_E_0 to CDMA_RX_FLOW_CONFIG_REG_E_31 Register
3638
11-1069.
3639
11-1070.
11-1071.
11-1072.
11-1073.
11-1074.
11-1075.
11-1076.
11-1077. QM_FREE_DESCRIPTOR_STARVE_COUNT_REG_0 to
QM_FREE_DESCRIPTOR_STARVE_COUNT_REG_15 Register
..............................................
3640
3642
3645
3646
3647
3648
3649
3650
11-1078. QM_MEMORY_REGION_BASE_ADDRESS_REG_0 to
QM_MEMORY_REGION_BASE_ADDRESS_REG_15 Register ................................................. 3652
11-1079. QM_MEMORY_REGION_START_INDEX_REG_0 to
QM_MEMORY_REGION_START_INDEX_REG_15 Register .................................................... 3653
11-1080. QM_MEMORY_REGION_DESCRIPTOR_SETUP_REG_0 to
QM_MEMORY_REGION_DESCRIPTOR_SETUP_REG_15 Register .......................................... 3654
3656
11-1082.
3657
11-1083.
11-1084.
11-1085.
11-1086.
11-1087.
11-1088.
11-1089.
11-1090.
11-1091.
11-1092.
11-1093.
11-1094.
11-1095.
11-1096.
11-1097.
11-1098.
11-1099.
11-1100.
11-1101.
11-1102.
11-1103.
11-1104.
11-1105.
11-1106.
11-1107.
11-1108.
11-1109.
11-1110.
11-1111.
11-1112.
11-1113.
54
...............................................
QM_QUEUE_REG_B_0 to QM_QUEUE_REG_B_63 Register ...............................................
QM_QUEUE_REG_C_0 to QM_QUEUE_REG_C_63 Register ...............................................
QM_QUEUE_REG_D_0 to QM_QUEUE_REG_D_63 Register ...............................................
QM_REG_A_0 to QM_REG_A_63 Register ......................................................................
QM_REG_B_0 to QM_REG_B_63 Register ......................................................................
QM_REG_C_0 to QM_REG_C_63 Register .....................................................................
QM_REG_D_0 to QM_REG_D_63 Register .....................................................................
PCIe Controller Subsystem Overview .............................................................................
PCIe SS Enviroment .................................................................................................
PCIe SS Integration ..................................................................................................
PCIe SS Block Diagram .............................................................................................
PCIe Example Topology .............................................................................................
Outbound Address Translation .....................................................................................
Example Base Address Register Configuration ..................................................................
Mapping of the PCIe SS Address Space 0 .......................................................................
PCIe Power Management State Transitions ......................................................................
ASPM Link State Transitions .......................................................................................
Software–driven Link Power State Transition ....................................................................
ASPM L0s Transition ................................................................................................
Link Power States L0 and L1 .......................................................................................
Link states L2/L3 Ready, L2 and L3 states .......................................................................
PCIE_PHY_MOD_VER Register ...................................................................................
PCIE_PHY_LANE_PLL_STS Register ............................................................................
PCIE_PHY_LANExCTL_STS Register ............................................................................
PCIE_PHY_PLL_CTRL Register ...................................................................................
PCIE_PHY_COMMA_LINK_DELAY Register ....................................................................
PCIE_PHY_CMU_WAIT Register ..................................................................................
PCIE_ECC_REVISION Register ...................................................................................
PCIE_ECC_VECTOR Register .....................................................................................
PCIE_ECC_MISC_STATUS Register .............................................................................
PCIE_ECC_WRAPPER_REVISION Register ....................................................................
PCIE_ECC_CONTROL Register ...................................................................................
11-1081. QM_QUEUE_REG_A_0 to QM_QUEUE_REG_A_63 Register
List of Figures
3658
3659
3661
3662
3663
3664
3665
3667
3668
3670
3672
3677
3684
3685
3703
3704
3704
3706
3707
3710
3721
3722
3724
3726
3728
3729
3731
3732
3733
3734
3735
SPRUHY8I – January 2016 – Revised March 2019
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11-1114. PCIE_ECC_ERROR_CONTROL1 Register ...................................................................... 3736
11-1115. PCIE_ECC_ERROR_CONTROL2 Register ...................................................................... 3737
11-1116. PCIE_ECC_ERROR_STATUS1 Register ......................................................................... 3738
11-1117. PCIE_ECC_ERROR_STATUS2 Register ......................................................................... 3740
11-1118. PCIE_ECC_EOI Register
...........................................................................................
3741
11-1119. PCIE_ECC_INT_STATUS_0 to PCIE_ECC_INT_STATUS_15 Register ..................................... 3742
11-1120. PCIE_ECC_INT_ENABLE_0 to PCIE_ECC_INT_ENABLE_15 Register ..................................... 3743
11-1121. PCIE_ECC_INT_CLEAR_0 to PCIE_ECC_INT_CLEAR_15 Register ........................................ 3744
11-1122. PCIE_PID Register ................................................................................................... 3749
11-1123. PCIE_CMD_STATUS Register ..................................................................................... 3750
11-1124. PCIE_CFG_SETUP Register ....................................................................................... 3752
11-1125. PCIE_IOBASE Register ............................................................................................. 3753
11-1126. PCIE_TLPCFG Register ............................................................................................. 3754
11-1127. PCIE_RSTCMD Register ............................................................................................ 3755
11-1128. PCIE_PMCMD Register ............................................................................................. 3756
.............................................................................................
PCIE_ACT_STATUS Register ......................................................................................
PCIE_OB_SIZE Register ............................................................................................
PCIE_DIAG_CTRL Register ........................................................................................
PCIE_ENDIAN Register .............................................................................................
PCIE_PRIORITY Register ..........................................................................................
PCIE_IRQ_EOI Register ............................................................................................
PCIE_MSI_IRQ Register ............................................................................................
PCIE_EP_IRQ_SET Register .......................................................................................
PCIE_EP_IRQ_CLR Register ......................................................................................
PCIE_EP_IRQ_STATUS Register .................................................................................
PCIE_GPR0 Register ................................................................................................
PCIE_GPR1 Register ................................................................................................
PCIE_GPR2 Register ................................................................................................
PCIE_GPR3 Register ................................................................................................
PCIE_MSI0_IRQ_STATUS_RAW Register .......................................................................
PCIE_MSI0_IRQ_STATUS Register ..............................................................................
PCIE_MSI0_IRQ_ENABLE_SET Register ........................................................................
PCIE_MSI0_IRQ_ENABLE_CLR Register ........................................................................
PCIE_MSI1_IRQ_STATUS_RAW Register .......................................................................
PCIE_MSI1_IRQ_STATUS Register ..............................................................................
PCIE_MSI1_IRQ_ENABLE_SET Register ........................................................................
PCIE_MSI1_IRQ_ENABLE_CLR Register ........................................................................
PCIE_MSI2_IRQ_STATUS_RAW Register .......................................................................
PCIE_MSI2_IRQ_STATUS Register ..............................................................................
PCIE_MSI2_IRQ_ENABLE_SET Register ........................................................................
PCIE_MSI2_IRQ_ENABLE_CLR Register ........................................................................
PCIE_MSI3_IRQ_STATUS_RAW Register .......................................................................
PCIE_MSI3_IRQ_STATUS Register ..............................................................................
PCIE_MSI3_IRQ_ENABLE_SET Register ........................................................................
PCIE_MSI3_IRQ_ENABLE_CLR Register ........................................................................
PCIE_MSI4_IRQ_STATUS_RAW Register .......................................................................
PCIE_MSI4_IRQ_STATUS Register ..............................................................................
PCIE_MSI4_IRQ_ENABLE_SET Register ........................................................................
11-1129. PCIE_PMCFG Register
3757
11-1130.
3758
11-1131.
11-1132.
11-1133.
11-1134.
11-1135.
11-1136.
11-1137.
11-1138.
11-1139.
11-1140.
11-1141.
11-1142.
11-1143.
11-1144.
11-1145.
11-1146.
11-1147.
11-1148.
11-1149.
11-1150.
11-1151.
11-1152.
11-1153.
11-1154.
11-1155.
11-1156.
11-1157.
11-1158.
11-1159.
11-1160.
11-1161.
11-1162.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Figures
3759
3760
3761
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771
3772
3773
3774
3775
3776
3777
3778
3779
3780
3781
3782
3783
3784
3785
3786
3787
3788
3789
3790
55
www.ti.com
11-1163. PCIE_MSI4_IRQ_ENABLE_CLR Register ........................................................................ 3791
11-1164. PCIE_MSI5_IRQ_STATUS_RAW Register ....................................................................... 3792
11-1165. PCIE_MSI5_IRQ_STATUS Register
..............................................................................
3793
11-1166. PCIE_MSI5_IRQ_ENABLE_SET Register ........................................................................ 3794
11-1167. PCIE_MSI5_IRQ_ENABLE_CLR Register ........................................................................ 3795
11-1168. PCIE_MSI6_IRQ_STATUS_RAW Register ....................................................................... 3796
11-1169. PCIE_MSI6_IRQ_STATUS Register
..............................................................................
3797
11-1170. PCIE_MSI6_IRQ_ENABLE_SET Register ........................................................................ 3798
11-1171. PCIE_MSI6_IRQ_ENABLE_CLR Register ........................................................................ 3799
11-1172. PCIE_MSI7_IRQ_STATUS_RAW Register ....................................................................... 3800
..............................................................................
PCIE_MSI7_IRQ_ENABLE_SET Register ........................................................................
PCIE_MSI7_IRQ_ENABLE_CLR Register ........................................................................
PCIE_LEGACY_A_IRQ_STATUS_RAW Register ...............................................................
PCIE_LEGACY_A_IRQ_STATUS Register.......................................................................
PCIE_LEGACY_A_IRQ_ENABLE_SET Register ................................................................
PCIE_LEGACY_A_IRQ_ENABLE_CLR Register ................................................................
PCIE_LEGACY_B_IRQ_STATUS_RAW Register ...............................................................
PCIE_LEGACY_B_IRQ_STATUS Register.......................................................................
PCIE_LEGACY_B_IRQ_ENABLE_SET Register ................................................................
PCIE_LEGACY_B_IRQ_ENABLE_CLR Register ................................................................
PCIE_LEGACY_C_IRQ_STATUS_RAW Register ...............................................................
PCIE_LEGACY_C_IRQ_STATUS Register ......................................................................
PCIE_LEGACY_C_IRQ_ENABLE_SET Register ................................................................
PCIE_LEGACY_C_IRQ_ENABLE_CLR Register................................................................
PCIE_LEGACY_D_IRQ_STATUS_RAW Register ...............................................................
PCIE_LEGACY_D_IRQ_STATUS Register ......................................................................
PCIE_LEGACY_D_IRQ_ENABLE_SET Register ................................................................
PCIE_LEGACY_D_IRQ_ENABLE_CLR Register................................................................
PCIE_ERR_IRQ_STATUS_RAW Register .......................................................................
PCIE_ERR_IRQ_STATUS Register ...............................................................................
PCIE_ERR_IRQ_ENABLE_SET Register ........................................................................
PCIE_ERR_IRQ_ENABLE_CLR Register ........................................................................
PCIE_PMRST_IRQ_STATUS_RAW Register....................................................................
PCIE_PMRST_IRQ_STATUS Register ...........................................................................
PCIE_PMRST_ENABLE_SET Register ...........................................................................
PCIE_PMRST_ENABLE_CLR Register ...........................................................................
PCIE_OB_OFFSET_INDEXn Register ............................................................................
PCIE_OB_OFFSETn_HI Register .................................................................................
PCIE_IB_BAR0 Register ............................................................................................
PCIE_IB_START0_LO Register ....................................................................................
PCIE_IB_START0_HI Register .....................................................................................
PCIE_IB_OFFSET0 Register .......................................................................................
PCIE_IB_BAR1 Register ............................................................................................
PCIE_IB_START1_LO Register ....................................................................................
PCIE_IB_START1_HI Register .....................................................................................
PCIE_IB_OFFSET1 Register .......................................................................................
PCIE_IB_BAR2 Register ............................................................................................
PCIE_IB_START2_LO Register ....................................................................................
11-1173. PCIE_MSI7_IRQ_STATUS Register
11-1174.
11-1175.
11-1176.
11-1177.
11-1178.
11-1179.
11-1180.
11-1181.
11-1182.
11-1183.
11-1184.
11-1185.
11-1186.
11-1187.
11-1188.
11-1189.
11-1190.
11-1191.
11-1192.
11-1193.
11-1194.
11-1195.
11-1196.
11-1197.
11-1198.
11-1199.
11-1200.
11-1201.
11-1202.
11-1203.
11-1204.
11-1205.
11-1206.
11-1207.
11-1208.
11-1209.
11-1210.
11-1211.
56
List of Figures
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3824
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840
3841
SPRUHY8I – January 2016 – Revised March 2019
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11-1212. PCIE_IB_START2_HI Register ..................................................................................... 3842
11-1213. PCIE_IB_OFFSET2 Register ....................................................................................... 3843
11-1214. PCIE_IB_BAR3 Register ............................................................................................ 3844
11-1215. PCIE_IB_START3_LO Register .................................................................................... 3845
11-1216. PCIE_IB_START3_HI Register ..................................................................................... 3846
11-1217. PCIE_IB_OFFSET3 Register ....................................................................................... 3847
11-1218. PCIE_VENDOR_DEVICE_ID Register ............................................................................ 3849
11-1219. PCIE_STATUS_COMMAND Register ............................................................................. 3850
11-1220. PCIE_CLASSCODE_REVID Register ............................................................................. 3852
11-1221. PCIE_BIST_HEADER Register
....................................................................................
3854
11-1222. PCIE_BAR0 Register ................................................................................................ 3855
11-1223. PCIE_BAR0_MASK Register ....................................................................................... 3857
11-1224. PCIE_BAR1 Register ................................................................................................ 3858
11-1225. PCIE_BAR1_MASK Register ....................................................................................... 3860
11-1226. PCIE_BAR1 (64 bit BAR0) Register ............................................................................... 3861
11-1227. PCIE_BAR1_MASK (64 bit BAR0) Register ...................................................................... 3862
11-1228. PCIE_BAR2 Register ................................................................................................ 3863
11-1229. PCIE_BAR2_MASK Register ....................................................................................... 3865
11-1230. PCIE_BAR3 Register ................................................................................................ 3866
11-1231. PCIE_BAR3_MASK Register ....................................................................................... 3868
11-1232. PCIE_BAR3 (64 bit BAR2) Register ............................................................................... 3869
11-1233. PCIE_BAR3_MASK (64 bit BAR2) Register ...................................................................... 3870
11-1234. PCIE_BAR4 Register ................................................................................................ 3871
11-1235. PCIE_BAR4_MASK Register ....................................................................................... 3872
11-1236. PCIE_BAR5 Register ................................................................................................ 3873
11-1237. PCIE_BAR5_MASK Register ....................................................................................... 3874
11-1238. PCIE_BAR5 (64 bit BAR4) Register ............................................................................... 3875
11-1239. PCIE_BAR5_MASK (64 bit BAR4) Register ...................................................................... 3876
11-1240. PCIE_SUBSYS_VNDR_ID Register ............................................................................... 3877
11-1241. PCIE_EXPNSN_ROM Register
....................................................................................
3878
11-1242. PCIE_CAP_PTR Register ........................................................................................... 3879
11-1243. PCIE_INT_PIN Register ............................................................................................. 3880
11-1244. PCIE_BIST_HEADER Register
....................................................................................
3882
11-1245. PCIE_BAR0 Register ................................................................................................ 3883
11-1246. PCIE_BAR0_MASK Register ....................................................................................... 3885
11-1247. PCIE_BAR1 Register ................................................................................................ 3886
11-1248. PCIE_BAR1_MASK Register ....................................................................................... 3888
11-1249. PCIE_BAR1 (64 bit BAR0) Register ............................................................................... 3889
11-1250. PCIE_BAR1_MASK (64 bit BAR0) Register ...................................................................... 3890
11-1251. PCIE_BUSNUM Register............................................................................................ 3891
11-1252. PCIE_SECSTAT Register ........................................................................................... 3892
11-1253. PCIE_MEMSPACE Register ........................................................................................ 3894
11-1254. PCIE_PREFETCH_MEM Register ................................................................................. 3895
11-1255. PCIE_PREFETCH_BASE Register ................................................................................ 3896
11-1256. PCIE_PREFETCH_LIMIT Register ................................................................................ 3897
11-1257. PCIE_IOSPACE Register ........................................................................................... 3898
11-1258. PCIE_CAP_PTR Register ........................................................................................... 3899
11-1259. PCIE_EXPNSN_ROM Register
....................................................................................
3900
11-1260. PCIE_BRIDGE_INT Register ....................................................................................... 3901
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
57
www.ti.com
11-1261. PCIE_PMCAP Register .............................................................................................. 3904
11-1262. PCIE_PM_CTL_STAT Register .................................................................................... 3905
11-1263. PCIE_MSI_CAP Register
...........................................................................................
3908
11-1264. PCIE_MSI_LOW32 Register ........................................................................................ 3910
11-1265. PCIE_MSI_UP32 Register .......................................................................................... 3911
11-1266. PCIE_MSI_DATA Register .......................................................................................... 3912
11-1267. PCIE_CAP Register .................................................................................................. 3914
11-1268. PCIE_DEVICE_CAP Register ...................................................................................... 3915
11-1269. PCIE_DEV_STAT_CTRL Register ................................................................................. 3916
11-1270. PCIE_LINK_CAP Register .......................................................................................... 3918
11-1271. PCIE_LINK_STAT_CTRL Register ................................................................................ 3920
11-1272. PCIE_SLOT_CAP Register ......................................................................................... 3922
11-1273. PCIE_SLOT_STAT_CTRL Register ............................................................................... 3924
11-1274. PCIE_ROOT_CTRL_CAP Register ................................................................................ 3926
11-1275. PCIE_ROOT_STATUS Register ................................................................................... 3927
11-1276. PCIE_DEV_CAP2 Register ......................................................................................... 3928
11-1277. PCIE_DEV_STAT_CTRL2 Register ............................................................................... 3929
11-1278. PCIE_LINK_CTRL2 Register ....................................................................................... 3930
............................................................................................
PCIE_UNCERR Register ............................................................................................
PCIE_UNCERR_MASK Register...................................................................................
PCIE_UNCERR_SVRTY Register .................................................................................
PCIE_CERR Register ................................................................................................
PCIE_CERR_MASK Register ......................................................................................
PCIE_ACCR Register ................................................................................................
PCIE_HDR_LOG0 Register .........................................................................................
PCIE_HDR_LOG1 Register .........................................................................................
PCIE_HDR_LOG2 Register .........................................................................................
PCIE_HDR_LOG3 Register .........................................................................................
PCIE_RC_ERR_CMD Register.....................................................................................
PCIE_RC_ERR_ST Register .......................................................................................
PCIE_ERR_SRC_ID Register ......................................................................................
PCIE_PL_ACKTIMER Register ....................................................................................
PCIE_PL_OMSG Register ..........................................................................................
PCIE_PL_FORCE_LINK Register .................................................................................
PCIE_ACK_FREQ Register .........................................................................................
PCIE_PL_LINK_CTRL Register ....................................................................................
PCIE_LANE_SKEW Register .......................................................................................
PCIE_SYM_NUM Register ..........................................................................................
PCIE_SYMTIMER_FLTMASK Register ...........................................................................
PCIE_FLT_MASK2 Register ........................................................................................
PCIE_DEBUG0 Register ............................................................................................
PCIE_DEBUG1 Register ............................................................................................
PCIE_PL_GEN2 Register ...........................................................................................
QSPI Module ..........................................................................................................
QSPI Connected to an External Quad-SPI Flash Memory .....................................................
QSPI Integration ......................................................................................................
QSPI Block Diagram .................................................................................................
Read Data Capture Logic ...........................................................................................
11-1279. PCIE_EXTCAP Register
11-1280.
11-1281.
11-1282.
11-1283.
11-1284.
11-1285.
11-1286.
11-1287.
11-1288.
11-1289.
11-1290.
11-1291.
11-1292.
11-1293.
11-1294.
11-1295.
11-1296.
11-1297.
11-1298.
11-1299.
11-1300.
11-1301.
11-1302.
11-1303.
11-1304.
11-1305.
11-1306.
11-1307.
11-1308.
11-1309.
58
List of Figures
3933
3934
3935
3936
3938
3939
3940
3941
3942
3943
3944
3945
3946
3947
3949
3950
3951
3952
3954
3956
3957
3958
3960
3961
3962
3964
3965
3967
3968
3970
3972
SPRUHY8I – January 2016 – Revised March 2019
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11-1310. ECC Aggregator Block Diagram .................................................................................... 3984
11-1311. QSPI_CONFIG_REG Register ..................................................................................... 3994
11-1312. QSPI_DEV_INSTR_RD_CONFIG_REG Register ............................................................... 3997
11-1313. QSPI_DEV_INSTR_WR_CONFIG_REG Register ............................................................... 3999
11-1314. QSPI_DEV_DELAY_REG Register ................................................................................ 4001
11-1315. QSPI_RD_DATA_CAPTURE_REG Register ..................................................................... 4002
11-1316. QSPI_DEV_SIZE_CONFIG_REG Register ....................................................................... 4003
11-1317. QSPI_SRAM_PARTITION_CFG_REG Register ................................................................. 4005
11-1318. QSPI_IND_AHB_ADDR_TRIGGER_REG Register ............................................................. 4006
11-1319. QSPI_REMAP_ADDR_REG Register ............................................................................. 4007
11-1320. QSPI_MODE_BIT_CONFIG_REG Register ...................................................................... 4008
11-1321. QSPI_SRAM_FILL_REG Register ................................................................................. 4009
11-1322. QSPI_TX_THRESH_REG Register ................................................................................ 4010
...............................................................................
QSPI_WRITE_COMPLETION_CTRL_REG Register ...........................................................
QSPI_NO_OF_POLLS_BEF_EXP_REG Register ...............................................................
QSPI_IRQ_STATUS_REG Register ...............................................................................
QSPI_IRQ_MASK_REG Register ..................................................................................
QSPI_LOWER_WR_PROT_REG Register .......................................................................
QSPI_UPPER_WR_PROT_REG Register .......................................................................
QSPI_WR_PROT_CTRL_REG Register ..........................................................................
QSPI_INDIRECT_READ_XFER_CTRL_REG Register .........................................................
QSPI_INDIRECT_READ_XFER_WATERMARK_REG Register ..............................................
QSPI_INDIRECT_READ_XFER_START_REG Register .......................................................
QSPI_INDIRECT_READ_XFER_NUM_BYTES_REG Register ...............................................
QSPI_INDIRECT_WRITE_XFER_CTRL_REG Register........................................................
QSPI_INDIRECT_WRITE_XFER_WATERMARK_REG Register .............................................
QSPI_INDIRECT_WRITE_XFER_START_REG Register ......................................................
QSPI_INDIRECT_WRITE_XFER_NUM_BYTES_REG Register ..............................................
QSPI_FLASH_CMD_CTRL_REG Register .......................................................................
QSPI_FLASH_CMD_ADDR_REG Register ......................................................................
QSPI_FLASH_RD_DATA_LOWER_REG Register..............................................................
QSPI_FLASH_RD_DATA_UPPER_REG Register ..............................................................
QSPI_FLASH_WR_DATA_LOWER_REG Register .............................................................
QSPI_FLASH_WR_DATA_UPPER_REG Register..............................................................
QSPI_POLLING_FLASH_STATUS_REG Register ..............................................................
QSPI_MODULE_ID_REG Register ................................................................................
QSPI_ECC_REVISION Register ...................................................................................
QSPI_ECC_VECTOR Register .....................................................................................
QSPI_ECC_MISC_STATUS Register .............................................................................
QSPI_ECC_WRAPPER_REVISION Register ....................................................................
QSPI_ECC_CONTROL Register ...................................................................................
QSPI_ECC_ERROR_CONTROL1 Register ......................................................................
QSPI_ECC_ERROR_CONTROL2 Register ......................................................................
QSPI_ECC_ERROR_STATUS1 Register.........................................................................
QSPI_ECC_ERROR_STATUS2 Register.........................................................................
QSPI_ECC_EOI Register ...........................................................................................
QSPI_ECC_INT_STATUS_0 to QSPI_ECC_INT_STATUS_15 Register ....................................
QSPI_ECC_INT_ENABLE_0 to QSPI_ECC_INT_ENABLE_15 Register ....................................
11-1323. QSPI_RX_THRESH_REG Register
11-1324.
11-1325.
11-1326.
11-1327.
11-1328.
11-1329.
11-1330.
11-1331.
11-1332.
11-1333.
11-1334.
11-1335.
11-1336.
11-1337.
11-1338.
11-1339.
11-1340.
11-1341.
11-1342.
11-1343.
11-1344.
11-1345.
11-1346.
11-1347.
11-1348.
11-1349.
11-1350.
11-1351.
11-1352.
11-1353.
11-1354.
11-1355.
11-1356.
11-1357.
11-1358.
SPRUHY8I – January 2016 – Revised March 2019
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List of Figures
4011
4012
4014
4015
4017
4019
4020
4021
4022
4024
4025
4026
4027
4029
4030
4031
4032
4034
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4047
4048
4049
4051
4052
4053
4054
59
www.ti.com
11-1359. QSPI_ECC_INT_CLEAR_0 to QSPI_ECC_INT_CLEAR_15 Register ........................................ 4055
11-1360. SPI Modules SPI0, SPI1, SPI2, and SPI3
........................................................................
4056
11-1361. SPI Interface Signals in Master Mode ............................................................................. 4057
11-1362. SPI Interface Signals in Slave Mode............................................................................... 4058
11-1363. Format for Transmitting 12-Bit Word ............................................................................... 4059
11-1364. Format for 10-Bit Received Word .................................................................................. 4059
4060
11-1366. Clock Mode with POLARITY = 0 and PHASE = 1(1)
4060
11-1367.
4061
11-1368.
11-1369.
11-1370.
11-1371.
11-1372.
11-1373.
11-1374.
11-1375.
11-1376.
11-1377.
11-1378.
11-1379.
11-1380.
11-1381.
11-1382.
11-1383.
11-1384.
11-1385.
11-1386.
11-1387.
11-1388.
11-1389.
11-1390.
11-1391.
11-1392.
11-1393.
11-1394.
11-1395.
11-1396.
11-1397.
11-1398.
11-1399.
11-1400.
11-1401.
11-1402.
11-1403.
11-1404.
11-1405.
11-1406.
11-1407.
60
.............................................................
.............................................................
Clock Mode with POLARITY = 1 and PHASE = 0(1) .............................................................
Clock Mode with POLARITY = 1 and PHASE = 1(1) .............................................................
SPI Data Transfer, Five Bits per Character (4-Pin with Chip Select Option) .................................
SPI Integration ........................................................................................................
SPI Block Diagram ...................................................................................................
SPI 3-Pin Option ......................................................................................................
SPI 4-Pin Option with SPIm_SCSnx pin ..........................................................................
Example: tC2TDELAY = 8 SPI_VBUSP_CLK Cycles .................................................................
Example: tT2CDELAY = 4 SPI_VBUSP_CLK Cycles .................................................................
SPIGCR0 Register ...................................................................................................
SPIGCR1 Register ...................................................................................................
SPIINT0 Register .....................................................................................................
SPILVL Register ......................................................................................................
SPIFLG Register .....................................................................................................
SPIPC0 Register .....................................................................................................
SPIDAT0 Register ....................................................................................................
SPIDAT1 Register ....................................................................................................
SPIBUF Register .....................................................................................................
SPIEMU Register .....................................................................................................
SPIDELAY Register ..................................................................................................
SPIDEF Register .....................................................................................................
SPIFMT0 to SPIFMT3 Register ....................................................................................
SPI_INTVEC0 Register ..............................................................................................
SPI_INTVEC1 Register ..............................................................................................
SPIREV Register .....................................................................................................
Timers Overview ......................................................................................................
Timers External System Interface ..................................................................................
Timers Integration ....................................................................................................
Timers Block Diagram ...............................................................................................
64-Bit Timer Mode Block Diagram .................................................................................
Dual 32-Bit Timers Chained Mode Block Diagram ...............................................................
Dual 32-Bit Timers Chained Mode Example ......................................................................
Dual 32-Bit Timers Unchained Mode Block Diagram ............................................................
Dual 32-Bit Timers Unchained Mode Example ...................................................................
Timer Clock Source Block Diagram ................................................................................
32-Bit Timer Counter Overflow Example ..........................................................................
Timer in Watchdog Timer Mode ....................................................................................
Watchdog Timer Operation State Diagram .......................................................................
Timer Initialization ....................................................................................................
TIMER_PID12 Register ..............................................................................................
TIMER_EMUMGT_CLKSPD Register .............................................................................
11-1365. Clock Mode with POLARITY = 0 and PHASE = 0(1)
List of Figures
4061
4062
4063
4065
4066
4067
4069
4069
4075
4076
4078
4080
4082
4085
4087
4088
4091
4094
4096
4098
4099
4101
4103
4105
4107
4108
4110
4113
4114
4115
4115
4116
4117
4120
4124
4126
4127
4130
4133
4134
SPRUHY8I – January 2016 – Revised March 2019
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11-1408. TIMER_GPINT_EN Register ........................................................................................ 4136
11-1409. TIMER_GPDIR_DAT Register ...................................................................................... 4138
11-1410. TIMER_CNTLO Register ............................................................................................ 4140
11-1411. TIMER_CNTHI Register ............................................................................................. 4142
11-1412. TIMER_PRDLO Register ............................................................................................ 4143
11-1413. TIMER_PRDHI Register ............................................................................................. 4144
11-1414. TIMER_TCR Register ................................................................................................ 4145
11-1415. TIMER_TGCR Register
.............................................................................................
4149
11-1416. TIMER_WDTCR Register ........................................................................................... 4151
11-1417. TIMER_RELLO Register ............................................................................................ 4153
11-1418. TIMER_RELHI Register ............................................................................................. 4154
11-1419. TIMER_CAPLO Register ............................................................................................ 4155
11-1420. TIMER_CAPHI Register ............................................................................................. 4156
11-1421. TIMER_INTCTL_STAT Register ................................................................................... 4157
11-1422. UART Overview
......................................................................................................
4159
11-1423. UART Mode Bus System Overview ................................................................................ 4161
11-1424. UART Frame Data Format .......................................................................................... 4162
11-1425. UART Integration ..................................................................................................... 4163
11-1426. UART Functional Block Diagram ................................................................................... 4165
.................................................................................
..............................................
UART Protocol Formats .............................................................................................
Baud Rate Generation ...............................................................................................
Autoflow Control Example ..........................................................................................
Autoflow Functional Timing Waveforms for RTS ................................................................
Autoflow Functional Timing Waveforms for CTS ................................................................
UART Interrupt Request Enable Paths ...........................................................................
UART_RBR Register ................................................................................................
UART_THR Register .................................................................................................
UART_IER Register ..................................................................................................
UART_IIR Register ...................................................................................................
UART_FCR Register .................................................................................................
UART_LCR Register .................................................................................................
UART_MCR Register ................................................................................................
UART_LSR Register .................................................................................................
UART_MSR Register ................................................................................................
UART_SCR Register ................................................................................................
UART_DLL Register .................................................................................................
UART_DLH Register .................................................................................................
UART_PID Register ..................................................................................................
UART_PWREMU_MGMT Register ................................................................................
UART_MDR Register ................................................................................................
USB Overview ........................................................................................................
USB Subsystem Environment ......................................................................................
USB_0 Controller Application: USB2.0 DRD .....................................................................
USB_0 Controller Application: USB2.0 Host ......................................................................
USB_0 Controller Application: USB2.0 Device ...................................................................
USB_1 Controller Application: USB2.0 DRD .....................................................................
USB_1 Controller Application: USB2.0 Host ......................................................................
11-1427. UART Clock Generation Diagram
4166
11-1428. Relationships Between Data Bit, BCLK, and UART Input Clock
4167
11-1429.
4170
11-1430.
11-1431.
11-1432.
11-1433.
11-1434.
11-1435.
11-1436.
11-1437.
11-1438.
11-1439.
11-1440.
11-1441.
11-1442.
11-1443.
11-1444.
11-1445.
11-1446.
11-1447.
11-1448.
11-1449.
11-1450.
11-1451.
11-1452.
11-1453.
11-1454.
11-1455.
11-1456.
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
List of Figures
4170
4173
4173
4174
4176
4180
4181
4183
4185
4187
4189
4191
4193
4197
4199
4200
4202
4203
4204
4206
4207
4210
4212
4213
4213
4214
4214
61
www.ti.com
11-1457. USB_1 Controller Application: USB2.0 Device ................................................................... 4215
11-1458. USB_0 Integration .................................................................................................... 4216
11-1459. USB_1 Integration .................................................................................................... 4217
12-1.
SoC Trace Architecture ................................................................................................. 4241
12-2.
Tracer Connection....................................................................................................... 4247
12-3.
CBA Event Connections ................................................................................................ 4248
12-4.
Tracer Generation ....................................................................................................... 4251
12-5.
Example—Event A to Tracer
4252
12-6.
Example—Event B to Tracer
4253
12-7.
12-8.
12-9.
12-10.
12-11.
62
..........................................................................................
..........................................................................................
Status Message Format ................................................................................................
Status Message Format ................................................................................................
Event Message Format .................................................................................................
Statistic Message Format ..............................................................................................
STM Message Format ..................................................................................................
List of Figures
4254
4254
4255
4255
4256
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
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List of Tables
.....................................................................................................
2-1.
Device Memory Map
3-1.
System Interconnect Integration Attributes ............................................................................ 223
3-2.
System Interconnect Clocks and Resets .............................................................................. 224
3-3.
TeraNet_DMA Connectivity Matrix
3-4.
TeraNet_DMA Bridge Connectivity Matrix ............................................................................. 227
3-5.
TeraNet_CFG Connectivity Matrix (Part 1) ............................................................................ 229
3-6.
TeraNet_CFG Connectivity Matrix (Part 2) ............................................................................ 230
3-7.
TeraNet_AON Connectivity Matrix...................................................................................... 231
3-8.
MPU Integration Attributes............................................................................................... 234
3-9.
MPU Clocks and Resets ................................................................................................. 235
3-10.
MPU Hardware Requests................................................................................................ 235
3-11.
Protection Levels.......................................................................................................... 237
3-12.
Request Type Access Controls
3-13.
MPU Events ............................................................................................................... 239
3-14.
Memory Regions Protected by MPUs .................................................................................. 240
3-15.
Master IDs ................................................................................................................. 240
3-16.
PrivIDs...................................................................................................................... 241
3-17.
MPU Instances ............................................................................................................ 243
3-18.
MPU Registers ............................................................................................................ 243
3-19.
MPU Registers ............................................................................................................ 244
3-20.
MPU Registers ............................................................................................................ 245
3-21.
MPU Registers ............................................................................................................ 245
3-22.
MPU_REVID Instances .................................................................................................. 247
3-23.
MPU_REVID Register Field Descriptions
3-24.
Register Call Summary for MPU_REVID .............................................................................. 247
3-25.
MPU_CONFIG Instances ................................................................................................ 248
3-26.
MPU_CONFIG Register Field Descriptions ........................................................................... 248
3-27.
Reset Values of the MPU_CONFIG Register Fields ................................................................. 249
3-28.
Register Call Summary for MPU_CONFIG ............................................................................ 250
3-29.
MPU_IRAWSTAT Instances
3-30.
3-31.
3-32.
3-33.
3-34.
3-35.
3-36.
3-37.
3-38.
3-39.
3-40.
3-41.
3-42.
3-43.
3-44.
3-45.
3-46.
.....................................................................................
........................................................................................
.............................................................................
............................................................................................
MPU_IRAWSTAT Register Field Descriptions ........................................................................
Register Call Summary for MPU_IRAWSTAT ........................................................................
MPU_IENSTAT Instances ...............................................................................................
MPU_IENSTAT Register Field Descriptions ..........................................................................
Register Call Summary for MPU_IENSTAT ...........................................................................
MPU_IENSET Instances .................................................................................................
MPU_IENSET Register Field Descriptions ............................................................................
Register Call Summary for MPU_IENSET ............................................................................
MPU_IENCLR Instances.................................................................................................
MPU_IENCLR Register Field Descriptions ............................................................................
Register Call Summary for MPU_IENCLR ............................................................................
MPU_EOI Instances ......................................................................................................
MPU_EOI Register Field Descriptions .................................................................................
Register Call Summary for MPU_EOI..................................................................................
MPU_PROGx_MPSAR Instances ......................................................................................
MPU_PROGx_MPSAR Register Field Descriptions .................................................................
Reset Values of the MPU_PROGx_MPSAR Registers (x = 0 to 15) ..............................................
SPRUHY8I – January 2016 – Revised March 2019
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List of Tables
209
226
237
247
251
251
252
253
253
254
255
255
256
257
257
258
259
259
259
260
260
260
63
www.ti.com
3-47.
Register Call Summary for MPU_PROGx_MPSAR .................................................................. 262
3-48.
MPU_PROGx_MPEAR Instances ...................................................................................... 263
3-49.
MPU_PROGx_MPEAR Register Field Descriptions ................................................................. 263
3-50.
Reset Values of the MPU_PROGx_MPEAR Registers (x = 0 to 15) .............................................. 263
3-51.
Register Call Summary for MPU_PROGx_MPEAR .................................................................. 265
3-52.
MPU_PROGx_MPPAR Instances ...................................................................................... 266
3-53.
MPU_PROGx_MPPAR Register Field Descriptions ................................................................. 266
3-54.
Reset Values of the MPU_PROGx_MPPAR Registers (x = 0 to 15) .............................................. 268
3-55.
Register Call Summary for MPU_PROGx_MPPAR .................................................................. 269
3-56.
MPU_FLTADDRR Instances ............................................................................................ 270
3-57.
MPU_FLTADDRR Register Field Descriptions ....................................................................... 270
3-58.
Register Call Summary for MPU_FLTADDRR ........................................................................ 270
3-59.
MPU_FLTSTAT Instances ............................................................................................... 271
3-60.
MPU_FLTSTAT Register Field Descriptions .......................................................................... 271
3-61.
Register Call Summary for MPU_FLTSTAT
3-62.
MPU_FLTCLR Instances ................................................................................................ 273
3-63.
MPU_FLTCLR Register Field Descriptions
3-64.
Register Call Summary for MPU_FLTCLR ............................................................................ 274
4-1.
BootROM Boot Modes ................................................................................................... 277
4-2.
Sleep/I2C Slave Boot Configuration Field Description
4-3.
PCIe Boot Configuration Field Description ............................................................................ 285
4-4.
BAR Config/PCIE Window Sizes ....................................................................................... 285
4-5.
I2C Mode Boot Configuration Field Description
4-6.
SPI without PLL Mode Boot Configuration Field Descriptions ...................................................... 287
4-7.
SPI Initial Read Address ................................................................................................. 287
4-8.
SPI with PLL Mode Boot Configuration Field Description ........................................................... 288
4-9.
QSPI Mode Boot Configuration Field Description .................................................................... 289
4-10.
QSPI Command/Pin Configuration ..................................................................................... 289
4-11.
XIP Mode Boot Configuration Field Description ...................................................................... 290
4-12.
Ethernet Mode Boot Configuration Field Description
4-13.
USB Mode Boot Configuration Field Description ..................................................................... 292
4-14.
MMCSD Mode Boot Configuration Field Description
4-15.
UART Mode Boot Configuration Field Description ................................................................... 294
4-16.
Reference Clock Values ................................................................................................. 295
4-17.
Boot Parameter Table Common Parameters ......................................................................... 296
4-18.
Boot Mode Values ........................................................................................................ 296
4-19.
PLL Configuration Field Description .................................................................................... 297
4-20.
Sleep Boot Parameter Table ............................................................................................ 297
4-21.
PCIE Boot Parameter Table ............................................................................................. 297
4-22.
I2C/I2C Slave/I2C Master Write Boot Parameter Table ............................................................... 298
4-23.
SPI Boot Parameter Table ............................................................................................... 299
4-24.
QSPI Boot Parameter Table
4-25.
XIP Boot Parameter Table ............................................................................................... 301
4-26.
Wait Pin Configuration ................................................................................................... 302
4-27.
BOOTP/TFTP Boot Parameter Table .................................................................................. 303
4-28.
USB Boot Parameter Table
4-29.
4-30.
4-31.
64
..........................................................................
...........................................................................
...............................................................
......................................................................
................................................................
................................................................
............................................................................................
.............................................................................................
MMCSD Boot Parameter Table .........................................................................................
UART Boot Parameter Table ............................................................................................
DDR_EMIF Configuration Table ........................................................................................
List of Tables
272
273
284
286
291
293
300
304
305
305
306
SPRUHY8I – January 2016 – Revised March 2019
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www.ti.com
4-32.
GP Header Boot Image Format ......................................................................................... 308
4-33.
QSPI Protocol ............................................................................................................. 311
4-34.
ARMSS Boot RAM Memory Map
4-35.
Calls to ARMSS BootROM Functions .................................................................................. 316
5-1.
BOOT_CFG Integration Attributes ...................................................................................... 320
5-2.
BOOT_CFG Clocks and Resets ........................................................................................ 320
5-3.
BOOT_CFG Hardware Requests ....................................................................................... 321
5-4.
Description Of The Pad Configuration Register Bits ................................................................. 322
5-5.
BOOTCFG_PADCONFIG0 to BOOTCFG_PADCONFIG259 Reset Values ...................................... 323
5-6.
BOOT_CFG Events
5-7.
Summary of the IPC Registers .......................................................................................... 326
5-8.
Summary of the Registers Associated With the Device External Signals ......................................... 327
5-9.
LRESETn and NMIn Decoding.......................................................................................... 328
5-10.
Summary of the Event Mux Registers ................................................................................. 329
5-11.
Summary of the Scratchpad Registers
5-12.
Summary of the MLB IOs Control Registers .......................................................................... 334
5-13.
Summary of the Device Reset Status Registers...................................................................... 335
5-14.
Summary of the DSP Boot Address Associated Registers
5-15.
Summary of the eCAP/ePWM/eQEP Control and Status Registers ............................................... 336
5-16.
Summary of the NSS MAC Address Registers ....................................................................... 336
5-17.
Summary of the ARMSS Endian Configuration Registers
5-18.
5-19.
5-20.
5-21.
5-22.
5-23.
5-24.
5-25.
5-26.
5-27.
5-28.
5-29.
5-30.
5-31.
5-32.
5-33.
5-34.
5-35.
5-36.
5-37.
5-38.
5-39.
5-40.
5-41.
5-42.
5-43.
5-44.
5-45.
......................................................................................
......................................................................................................
................................................................................
.........................................................
..........................................................
BOOTCFG_ARMENDIAN_CFGx_0 to BOOTCFG_ARMENDIAN_CFGx_2 Reset Values ....................
Summary of the ARMSS and DEBUG_SS Trace Buffer Associated Registers ..................................
Reset Values of the ARMSS and DEBUG_SS Trace Buffer Associated Registers .............................
Summary of the PLL Control Registers ................................................................................
Summary of the Clock Muxing, Enabling and Division Registers ..................................................
Summary of the USB0 and USB1 PHY Control Registers ..........................................................
BOOT_CFG Instances ...................................................................................................
BOOT_CFG Registers ...................................................................................................
BOOTCFG_REVISION Instances ......................................................................................
BOOTCFG_REVISION Register Field Descriptions .................................................................
Register Call Summary for BOOTCFG_REVISION ..................................................................
BOOTCFG_JTAGID Instances .........................................................................................
BOOTCFG_JTAGID Register Field Descriptions .....................................................................
Register Call Summary for BOOTCFG_JTAGID .....................................................................
BOOTCFG_DEVSTAT Instances .......................................................................................
BOOTCFG_DEVSTAT Register Field Descriptions ..................................................................
Register Call Summary for BOOTCFG_DEVSTAT ..................................................................
BOOTCFG_KICK0 Instances ...........................................................................................
BOOTCFG_KICK0 Register Field Descriptions ......................................................................
Register Call Summary for BOOTCFG_KICK0 .......................................................................
BOOTCFG_KICK1 Instances ...........................................................................................
BOOTCFG_KICK1 Register Field Descriptions ......................................................................
Register Call Summary for BOOTCFG_KICK1 .......................................................................
BOOTCFG_DSP_BOOT_ADDR0 Instances ..........................................................................
BOOTCFG_DSP_BOOT_ADDR0 Register Field Descriptions .....................................................
Register Call Summary for BOOTCFG_DSP_BOOT_ADDR0 .....................................................
BOOTCFG_INTR_RAW_STAT_SET Instances ......................................................................
BOOTCFG_INTR_RAW_STAT_SET Register Field Descriptions .................................................
SPRUHY8I – January 2016 – Revised March 2019
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List of Tables
315
325
333
335
336
337
337
337
338
338
339
340
340
345
345
345
346
346
346
347
347
347
349
349
349
350
350
350
351
351
351
352
352
65
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5-46.
Register Call Summary for BOOTCFG_INTR_RAW_STAT_SET.................................................. 352
5-47.
BOOTCFG_INTR_ENABLED_STAT_CLR Instances
5-48.
BOOTCFG_INTR_ENABLED_STAT_CLR Register Field Descriptions........................................... 353
5-49.
Register Call Summary for BOOTCFG_INTR_ENABLED_STAT_CLR ........................................... 353
5-50.
BOOTCFG_INTR_ENABLE Instances ................................................................................. 354
5-51.
BOOTCFG_INTR_ENABLE Register Field Descriptions ............................................................ 354
5-52.
Register Call Summary for BOOTCFG_INTR_ENABLE
5-53.
BOOTCFG_INTR_ENABLE_CLR Instances .......................................................................... 355
5-54.
BOOTCFG_INTR_ENABLE_CLR Register Field Descriptions ..................................................... 355
5-55.
Register Call Summary for BOOTCFG_INTR_ENABLE_CLR
355
5-56.
BOOTCFG_EOI Instances
356
5-57.
5-58.
5-59.
5-60.
5-61.
5-62.
5-63.
5-64.
5-65.
5-66.
5-67.
5-68.
5-69.
5-70.
5-71.
5-72.
5-73.
5-74.
5-75.
5-76.
5-77.
5-78.
5-79.
5-80.
5-81.
5-82.
5-83.
5-84.
5-85.
5-86.
5-87.
5-88.
5-89.
5-90.
5-91.
5-92.
5-93.
5-94.
66
...............................................................
............................................................
.....................................................
..............................................................................................
BOOTCFG_EOI Register Field Descriptions ..........................................................................
Register Call Summary for BOOTCFG_EOI ..........................................................................
BOOTCFG_FAULT_ADDR Instances .................................................................................
BOOTCFG_FAULT_ADDR Register Field Descriptions.............................................................
Register Call Summary for BOOTCFG_FAULT_ADDR .............................................................
BOOTCFG_FAULT_STAT Instances ..................................................................................
BOOTCFG_FAULT_STAT Register Field Descriptions .............................................................
Register Call Summary for BOOTCFG_FAULT_STAT ..............................................................
BOOTCFG_FAULT_CLR Instances ....................................................................................
BOOTCFG_FAULT_CLR Register Field Descriptions ...............................................................
Register Call Summary for BOOTCFG_FAULT_CLR ...............................................................
BOOTCFG_MACID0 Instances .........................................................................................
BOOTCFG_MACID0 Register Field Descriptions ....................................................................
Register Call Summary for BOOTCFG_MACID0 .....................................................................
BOOTCFG_MACID1 Instances .........................................................................................
BOOTCFG_MACID1 Register Field Descriptions ....................................................................
Register Call Summary for BOOTCFG_MACID1 .....................................................................
BOOTCFG_PCIEVENDORID Instances...............................................................................
BOOTCFG_PCIEVENDORID Register Field Descriptions ..........................................................
Register Call Summary for BOOTCFG_PCIEVENDORID ..........................................................
BOOTCFG_LRSTNMISTAT_CLR Instances .........................................................................
BOOTCFG_LRSTNMISTAT_CLR Register Field Descriptions .....................................................
Register Call Summary for BOOTCFG_LRSTNMISTAT_CLR .....................................................
BOOTCFG_RESET_STAT_CLR Instances ...........................................................................
BOOTCFG_RESET_STAT_CLR Register Field Descriptions ......................................................
Register Call Summary for BOOTCFG_RESET_STAT_CLR.......................................................
BOOTCFG_BOOT_COMPLETE Instances ...........................................................................
BOOTCFG_BOOT_COMPLETE Register Field Descriptions ......................................................
Register Call Summary for BOOTCFG_BOOT_COMPLETE .......................................................
BOOTCFG_RESET_STAT Instances ..................................................................................
BOOTCFG_RESET_STAT Register Field Descriptions .............................................................
Register Call Summary for BOOTCFG_RESET_STAT .............................................................
BOOTCFG_LRSTNMISTAT Instances ................................................................................
BOOTCFG_LRSTNMISTAT Register Field Descriptions............................................................
Register Call Summary for BOOTCFG_LRSTNMISTAT ............................................................
BOOTCFG_DEVCFG Instances ........................................................................................
BOOTCFG_DEVCFG Register Field Descriptions ...................................................................
Register Call Summary for BOOTCFG_DEVCFG....................................................................
List of Tables
353
354
356
356
357
357
357
358
358
358
359
359
359
360
360
360
361
361
361
362
362
362
363
363
363
364
364
364
365
365
365
366
366
366
367
367
367
368
368
368
SPRUHY8I – January 2016 – Revised March 2019
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www.ti.com
5-95.
BOOTCFG_PWR_STATE Instances................................................................................... 369
5-96.
BOOTCFG_PWR_STATE Register Field Descriptions .............................................................. 369
5-97.
Register Call Summary for BOOTCFG_PWR_STATE .............................................................. 369
5-98.
BOOTCFG_INITIATOR_PRIORITY0 Instances ...................................................................... 370
5-99.
BOOTCFG_INITIATOR_PRIORITY0 Register Field Descriptions ................................................. 370
5-100. Register Call Summary for BOOTCFG_INITIATOR_PRIORITY0 .................................................. 371
5-101. BOOTCFG_INITIATOR_PRIORITY1 Instances ...................................................................... 372
5-102. BOOTCFG_INITIATOR_PRIORITY1 Register Field Descriptions ................................................. 372
5-103. Register Call Summary for BOOTCFG_INITIATOR_PRIORITY1 .................................................. 372
5-104. BOOTCFG_NMIGR0 Instances......................................................................................... 373
5-105. BOOTCFG_NMIGR0 Register Field Descriptions .................................................................... 373
5-106. Register Call Summary for BOOTCFG_NMIGR0
....................................................................
373
5-107. BOOTCFG_IPCGR0 Instances ......................................................................................... 374
5-108. BOOTCFG_IPCGR0 Register Field Descriptions .................................................................... 374
5-109. Register Call Summary for BOOTCFG_IPCGR0 ..................................................................... 374
5-110. BOOTCFG_IPCGR8 Instances ......................................................................................... 376
5-111. BOOTCFG_IPCGR8 Register Field Descriptions .................................................................... 376
5-112. Register Call Summary for BOOTCFG_IPCGR8 ..................................................................... 376
5-113. BOOTCFG_IPCGR11 Instances........................................................................................ 378
5-114. BOOTCFG_IPCGR11 Register Field Descriptions ................................................................... 378
5-115. Register Call Summary for BOOTCFG_IPCGR11 ................................................................... 378
5-116. BOOTCFG_IPCGR12 Instances........................................................................................ 380
5-117. BOOTCFG_IPCGR12 Register Field Descriptions ................................................................... 380
5-118. Register Call Summary for BOOTCFG_IPCGR12 ................................................................... 380
5-119. BOOTCFG_IPCGR13 Instances........................................................................................ 382
5-120. BOOTCFG_IPCGR13 Register Field Descriptions ................................................................... 382
5-121. Register Call Summary for BOOTCFG_IPCGR13 ................................................................... 382
5-122. BOOTCFG_IPCGR14 Instances........................................................................................ 384
5-123. BOOTCFG_IPCGR14 Register Field Descriptions ................................................................... 384
5-124. Register Call Summary for BOOTCFG_IPCGR14 ................................................................... 384
5-125. BOOTCFG_IPCGRH Instances......................................................................................... 386
5-126. BOOTCFG_IPCGRH Register Field Descriptions .................................................................... 386
5-127. Register Call Summary for BOOTCFG_IPCGRH
....................................................................
387
5-128. BOOTCFG_IPCAR0 Instances ......................................................................................... 388
5-129. BOOTCFG_IPCAR0 Register Field Descriptions..................................................................... 388
5-130. Register Call Summary for BOOTCFG_IPCAR0 ..................................................................... 388
5-131. BOOTCFG_IPCAR8 Instances ......................................................................................... 389
5-132. BOOTCFG_IPCAR8 Register Field Descriptions..................................................................... 389
5-133. Register Call Summary for BOOTCFG_IPCAR8 ..................................................................... 389
5-134. BOOTCFG_IPCAR11 Instances ........................................................................................ 390
5-135. BOOTCFG_IPCAR11 Register Field Descriptions ................................................................... 390
5-136. Register Call Summary for BOOTCFG_IPCAR11.................................................................... 390
5-137. BOOTCFG_IPCAR12 Instances ........................................................................................ 391
5-138. BOOTCFG_IPCAR12 Register Field Descriptions ................................................................... 391
5-139. Register Call Summary for BOOTCFG_IPCAR12.................................................................... 391
5-140. BOOTCFG_IPCAR13 Instances ........................................................................................ 392
5-141. BOOTCFG_IPCAR13 Register Field Descriptions ................................................................... 392
5-142. Register Call Summary for BOOTCFG_IPCAR13.................................................................... 392
5-143. BOOTCFG_IPCAR14 Instances ........................................................................................ 393
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
67
www.ti.com
5-144. BOOTCFG_IPCAR14 Register Field Descriptions ................................................................... 393
5-145. Register Call Summary for BOOTCFG_IPCAR14.................................................................... 393
5-146. BOOTCFG_IPCARH Instances ......................................................................................... 394
5-147. BOOTCFG_IPCARH Register Field Descriptions .................................................................... 394
5-148. Register Call Summary for BOOTCFG_IPCARH ..................................................................... 394
5-149. BOOTCFG_TINPSEL0 Instances ...................................................................................... 395
5-150. BOOTCFG_TINPSEL0 Register Field Descriptions.................................................................. 395
5-151. Register Call Summary for BOOTCFG_TINPSEL0 .................................................................. 396
5-152. BOOTCFG_TINPSEL1 Instances ...................................................................................... 397
5-153. BOOTCFG_TINPSEL1 Register Field Descriptions.................................................................. 397
5-154. Register Call Summary for BOOTCFG_TINPSEL1 .................................................................. 397
5-155. BOOTCFG_TOUTPSEL0 Instances ................................................................................... 398
5-156. BOOTCFG_TOUTPSEL0 Register Field Descriptions............................................................... 398
5-157. Register Call Summary for BOOTCFG_TOUTPSEL0 ............................................................... 399
5-158. BOOTCFG_RSTMUX0 Instances ...................................................................................... 400
400
5-160.
401
5-161.
5-162.
5-163.
5-164.
5-165.
5-166.
5-167.
5-168.
5-169.
5-170.
5-171.
5-172.
5-173.
5-174.
5-175.
5-176.
5-177.
5-178.
5-179.
5-180.
5-181.
5-182.
5-183.
5-184.
5-185.
5-186.
5-187.
5-188.
5-189.
5-190.
5-191.
5-192.
68
.................................................................
Register Call Summary for BOOTCFG_RSTMUX0 ..................................................................
BOOTCFG_RSTMUX8 Instances ......................................................................................
BOOTCFG_RSTMUX8 Register Field Descriptions .................................................................
Register Call Summary for BOOTCFG_RSTMUX8 ..................................................................
BOOTCFG_MAIN_PLL_CTL0 Instances ..............................................................................
BOOTCFG_MAIN_PLL_CTL0 Register Field Descriptions .........................................................
Register Call Summary for BOOTCFG_MAIN_PLL_CTL0 ..........................................................
BOOTCFG_MAIN_PLL_CTL1 Instances ..............................................................................
BOOTCFG_MAIN_PLL_CTL1 Register Field Descriptions .........................................................
Register Call Summary for BOOTCFG_MAIN_PLL_CTL1 ..........................................................
BOOTCFG_NSS_PLL_CTL0 Instances ...............................................................................
BOOTCFG_NSS_PLL_CTL0 Register Field Descriptions ..........................................................
Register Call Summary for BOOTCFG_NSS_PLL_CTL0 ...........................................................
BOOTCFG_NSS_PLL_CTL1 Instances ...............................................................................
BOOTCFG_NSS_PLL_CTL1 Register Field Descriptions ..........................................................
Register Call Summary for BOOTCFG_NSS_PLL_CTL1 ...........................................................
BOOTCFG_DDR3A_PLL_CTL0 Instances............................................................................
BOOTCFG_DDR3A_PLL_CTL0 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_DDR3A_PLL_CTL0 .......................................................
BOOTCFG_DDR3A_PLL_CTL1 Instances............................................................................
BOOTCFG_DDR3A_PLL_CTL1 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_DDR3A_PLL_CTL1 .......................................................
BOOTCFG_ARM_PLL_CTL0 Instances ...............................................................................
BOOTCFG_ARM_PLL_CTL0 Register Field Descriptions ..........................................................
Register Call Summary for BOOTCFG_ARM_PLL_CTL0 ..........................................................
BOOTCFG_ARM_PLL_CTL1 Instances ...............................................................................
BOOTCFG_ARM_PLL_CTL1 Register Field Descriptions ..........................................................
Register Call Summary for BOOTCFG_ARM_PLL_CTL1 ..........................................................
BOOTCFG_DSS_PLL_CTL0 Instances ...............................................................................
BOOTCFG_DSS_PLL_CTL0 Register Field Descriptions ..........................................................
Register Call Summary for BOOTCFG_DSS_PLL_CTL0 ...........................................................
BOOTCFG_DSS_PLL_CTL1 Instances ...............................................................................
BOOTCFG_DSS_PLL_CTL1 Register Field Descriptions ..........................................................
5-159. BOOTCFG_RSTMUX0 Register Field Descriptions
List of Tables
402
402
403
404
404
404
405
405
405
406
406
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407
407
407
408
408
408
409
409
410
411
411
411
412
412
412
413
413
413
414
414
SPRUHY8I – January 2016 – Revised March 2019
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5-193. Register Call Summary for BOOTCFG_DSS_PLL_CTL1 ........................................................... 414
5-194. BOOTCFG_ICSS_PLL_CTL0 Instances
..............................................................................
415
5-195. BOOTCFG_ICSS_PLL_CTL0 Register Field Descriptions.......................................................... 415
5-196. Register Call Summary for BOOTCFG_ICSS_PLL_CTL0 .......................................................... 415
5-197. BOOTCFG_ICSS_PLL_CTL1 Instances
..............................................................................
416
5-198. BOOTCFG_ICSS_PLL_CTL1 Register Field Descriptions.......................................................... 416
5-199. Register Call Summary for BOOTCFG_ICSS_PLL_CTL1 .......................................................... 416
5-200. BOOTCFG_UART_PLL_CTL0 Instances ............................................................................. 417
5-201. BOOTCFG_UART_PLL_CTL0 Register Field Descriptions......................................................... 417
5-202. Register Call Summary for BOOTCFG_UART_PLL_CTL0 ......................................................... 417
5-203. BOOTCFG_UART_PLL_CTL1 Instances ............................................................................. 418
5-204. BOOTCFG_UART_PLL_CTL1 Register Field Descriptions......................................................... 418
5-205. Register Call Summary for BOOTCFG_UART_PLL_CTL1 ......................................................... 418
5-206. BOOTCFG_ARMENDIAN_CFGx_0 Instances ....................................................................... 419
5-207. BOOTCFG_ARMENDIAN_CFGx_0 Register Field Descriptions................................................... 419
5-208. Register Call Summary for BOOTCFG_ARMENDIAN_CFGx_0 ................................................... 419
5-209. BOOTCFG_ARMENDIAN_CFGx_1 Instances ....................................................................... 420
5-210. BOOTCFG_ARMENDIAN_CFGx_1 Register Field Descriptions................................................... 420
5-211. Register Call Summary for BOOTCFG_ARMENDIAN_CFGx_1 ................................................... 420
5-212. BOOTCFG_ARMENDIAN_CFGx_2 Instances ....................................................................... 422
5-213. BOOTCFG_ARMENDIAN_CFGx_2 Register Field Descriptions................................................... 422
5-214. Register Call Summary for BOOTCFG_ARMENDIAN_CFGx_2 ................................................... 422
5-215. BOOTCFG_ARMTBR_TRBx_W0 Instances .......................................................................... 423
5-216. BOOTCFG_ARMTBR_TRBx_W0 Register Field Descriptions ..................................................... 423
5-217. Register Call Summary for BOOTCFG_ARMTBR_TRBx_W0 ...................................................... 423
5-218. BOOTCFG_ARMTBR_TRBx_W1 Instances .......................................................................... 424
5-219. BOOTCFG_ARMTBR_TRBx_W1 Register Field Descriptions ..................................................... 424
5-220. Register Call Summary for BOOTCFG_ARMTBR_TRBx_W1 ...................................................... 424
5-221. BOOTCFG_ARMTBR_TRBx_W2 Instances .......................................................................... 425
5-222. BOOTCFG_ARMTBR_TRBx_W2 Register Field Descriptions ..................................................... 425
5-223. Register Call Summary for BOOTCFG_ARMTBR_TRBx_W2 ...................................................... 425
5-224. BOOTCFG_ARMTBR_TRBx_W3 Instances .......................................................................... 426
5-225. BOOTCFG_ARMTBR_TRBx_W3 Register Field Descriptions ..................................................... 426
5-226. Register Call Summary for BOOTCFG_ARMTBR_TRBx_W3 ...................................................... 426
5-227. BOOTCFG_ARMTBR_SHDW_TRBx_W0 Instances ................................................................ 427
...........................................
Register Call Summary for BOOTCFG_ARMTBR_SHDW_TRBx_W0 ............................................
BOOTCFG_ARMTBR_SHDW_TRBx_W1 Instances ................................................................
BOOTCFG_ARMTBR_SHDW_TRBx_W1 Register Field Descriptions ...........................................
Register Call Summary for BOOTCFG_ARMTBR_SHDW_TRBx_W1 ............................................
BOOTCFG_ARMTBR_SHDW_TRBx_W2 Instances ................................................................
BOOTCFG_ARMTBR_SHDW_TRBx_W2 Register Field Descriptions ...........................................
Register Call Summary for BOOTCFG_ARMTBR_SHDW_TRBx_W2 ............................................
BOOTCFG_ARMTBR_SHDW_TRBx_W3 Instances ................................................................
BOOTCFG_ARMTBR_SHDW_TRBx_W3 Register Field Descriptions ...........................................
Register Call Summary for BOOTCFG_ARMTBR_SHDW_TRBx_W3 ............................................
BOOTCFG_DBGTBR_TRBx_W0 Instances ..........................................................................
BOOTCFG_DBGTBR_TRBx_W0 Register Field Descriptions .....................................................
Register Call Summary for BOOTCFG_DBGTBR_TRBx_W0 ......................................................
5-228. BOOTCFG_ARMTBR_SHDW_TRBx_W0 Register Field Descriptions
427
5-229.
427
5-230.
5-231.
5-232.
5-233.
5-234.
5-235.
5-236.
5-237.
5-238.
5-239.
5-240.
5-241.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
428
428
428
429
429
429
430
430
430
431
431
431
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5-242. BOOTCFG_DBGTBR_TRBx_W1 Instances .......................................................................... 432
5-243. BOOTCFG_DBGTBR_TRBx_W1 Register Field Descriptions ..................................................... 432
5-244. Register Call Summary for BOOTCFG_DBGTBR_TRBx_W1 ...................................................... 432
5-245. BOOTCFG_DBGTBR_TRBx_W2 Instances .......................................................................... 433
5-246. BOOTCFG_DBGTBR_TRBx_W2 Register Field Descriptions ..................................................... 433
5-247. Register Call Summary for BOOTCFG_DBGTBR_TRBx_W2 ...................................................... 433
5-248. BOOTCFG_DBGTBR_TRBx_W3 Instances .......................................................................... 434
5-249. BOOTCFG_DBGTBR_TRBx_W3 Register Field Descriptions ..................................................... 434
5-250. Register Call Summary for BOOTCFG_DBGTBR_TRBx_W3 ...................................................... 434
5-251. BOOTCFG_DBGTBR_SHDW_TRBx_W0 Instances ................................................................ 435
435
5-253.
435
5-254.
5-255.
5-256.
5-257.
5-258.
5-259.
5-260.
5-261.
5-262.
5-263.
5-264.
5-265.
5-266.
5-267.
5-268.
5-269.
5-270.
5-271.
5-272.
5-273.
5-274.
5-275.
5-276.
5-277.
5-278.
5-279.
5-280.
5-281.
5-282.
5-283.
5-284.
5-285.
5-286.
5-287.
5-288.
5-289.
5-290.
70
...........................................
Register Call Summary for BOOTCFG_DBGTBR_SHDW_TRBx_W0 ............................................
BOOTCFG_DBGTBR_SHDW_TRBx_W1 Instances ................................................................
BOOTCFG_DBGTBR_SHDW_TRBx_W1 Register Field Descriptions ...........................................
Register Call Summary for BOOTCFG_DBGTBR_SHDW_TRBx_W1 ............................................
BOOTCFG_DBGTBR_SHDW_TRBx_W2 Instances ................................................................
BOOTCFG_DBGTBR_SHDW_TRBx_W2 Register Field Descriptions ...........................................
Register Call Summary for BOOTCFG_DBGTBR_SHDW_TRBx_W2 ............................................
BOOTCFG_DBGTBR_SHDW_TRBx_W3 Instances ................................................................
BOOTCFG_DBGTBR_SHDW_TRBx_W3 Register Field Descriptions ...........................................
Register Call Summary for BOOTCFG_DBGTBR_SHDW_TRBx_W3 ............................................
BOOTCFG_SPARE1 Instances ........................................................................................
BOOTCFG_SPARE1 Register Field Descriptions ....................................................................
Register Call Summary for BOOTCFG_SPARE1 ....................................................................
BOOTCFG_DDR_CLKCTL Instances .................................................................................
BOOTCFG_DDR_CLKCTL Register Field Descriptions.............................................................
Register Call Summary for BOOTCFG_DDR_CLKCTL .............................................................
BOOTCFG_ICSS_CLKCTL Instances .................................................................................
BOOTCFG_ICSS_CLKCTL Register Field Descriptions ............................................................
Register Call Summary for BOOTCFG_ICSS_CLKCTL .............................................................
BOOTCFG_ETHERNET_CLKCTL Instances .........................................................................
BOOTCFG_ETHERNET_CLKCTL Register Field Descriptions ....................................................
Register Call Summary for BOOTCFG_ETHERNET_CLKCTL ....................................................
BOOTCFG_USB0_CLKCTL Instances ................................................................................
BOOTCFG_USB0_CLKCTL Register Field Descriptions ...........................................................
Register Call Summary for BOOTCFG_USB0_CLKCTL ............................................................
BOOTCFG_USB1_CLKCTL Instances ................................................................................
BOOTCFG_USB1_CLKCTL Register Field Descriptions ...........................................................
Register Call Summary for BOOTCFG_USB1_CLKCTL ............................................................
BOOTCFG_SERIALPORT_CLKCTL Instances ......................................................................
BOOTCFG_SERIALPORT_CLKCTL Register Field Descriptions .................................................
Register Call Summary for BOOTCFG_SERIALPORT_CLKCTL ..................................................
BOOTCFG_OSC_CTL Instances .......................................................................................
BOOTCFG_OSC_CTL Register Field Descriptions ..................................................................
Register Call Summary for BOOTCFG_OSC_CTL ..................................................................
BOOTCFG_PCIE_CLKCTL Instances .................................................................................
BOOTCFG_PCIE_CLKCTL Register Field Descriptions ............................................................
Register Call Summary for BOOTCFG_PCIE_CLKCTL .............................................................
BOOTCFG_CHIP_MISC_CTL0 Instances ............................................................................
5-252. BOOTCFG_DBGTBR_SHDW_TRBx_W0 Register Field Descriptions
List of Tables
436
436
436
437
437
437
438
438
438
439
439
439
440
440
440
441
441
441
442
442
442
443
443
443
444
444
444
445
445
446
447
447
448
449
449
449
450
SPRUHY8I – January 2016 – Revised March 2019
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.......................................................
Register Call Summary for BOOTCFG_CHIP_MISC_CTL0 ........................................................
BOOTCFG_SYSENDSTAT Instances .................................................................................
BOOTCFG_SYSENDSTAT Register Field Descriptions ............................................................
Register Call Summary for BOOTCFG_SYSENDSTAT .............................................................
BOOTCFG_PLLLOCK_PINCTL Instances ............................................................................
BOOTCFG_PLLLOCK_PINCTL Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_PLLLOCK_PINCTL........................................................
BOOTCFG_PLLLOCK_STAT Instances...............................................................................
BOOTCFG_PLLLOCK_STAT Register Field Descriptions ..........................................................
Register Call Summary for BOOTCFG_PLLLOCK_STAT ..........................................................
BOOTCFG_PLLLOCK_EVAL Instances...............................................................................
BOOTCFG_PLLLOCK_EVAL Register Field Descriptions ..........................................................
Register Call Summary for BOOTCFG_PLLLOCK_EVAL ..........................................................
BOOTCFG_PLLCLKSEL_STAT Instances............................................................................
BOOTCFG_PLLCLKSEL_STAT Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_PLLCLKSEL_STAT .......................................................
BOOTCFG_USB0_PHY_CTL0 Instances .............................................................................
BOOTCFG_USB0_PHY_CTL0 Register Field Descriptions ........................................................
Register Call Summary for BOOTCFG_USB0_PHY_CTL0 .........................................................
BOOTCFG_USB0_PHY_CTL1 Instances .............................................................................
BOOTCFG_USB0_PHY_CTL1 Register Field Descriptions ........................................................
Register Call Summary for BOOTCFG_USB0_PHY_CTL1 .........................................................
BOOTCFG_USB0_PHY_CTL2 Instances .............................................................................
BOOTCFG_USB0_PHY_CTL2 Register Field Descriptions ........................................................
Register Call Summary for BOOTCFG_USB0_PHY_CTL2 .........................................................
BOOTCFG_USB0_PHY_CTL4 Instances .............................................................................
BOOTCFG_USB0_PHY_CTL4 Register Field Descriptions ........................................................
Register Call Summary for BOOTCFG_USB0_PHY_CTL4 .........................................................
BOOTCFG_USB1_PHY_CTL0 Instances .............................................................................
BOOTCFG_USB1_PHY_CTL0 Register Field Descriptions ........................................................
Register Call Summary for BOOTCFG_USB1_PHY_CTL0 .........................................................
BOOTCFG_USB1_PHY_CTL1 Instances .............................................................................
BOOTCFG_USB1_PHY_CTL1 Register Field Descriptions ........................................................
Register Call Summary for BOOTCFG_USB1_PHY_CTL1 .........................................................
BOOTCFG_USB1_PHY_CTL2 Instances .............................................................................
BOOTCFG_USB1_PHY_CTL2 Register Field Descriptions ........................................................
Register Call Summary for BOOTCFG_USB1_PHY_CTL2 .........................................................
BOOTCFG_USB1_PHY_CTL4 Instances .............................................................................
BOOTCFG_USB1_PHY_CTL4 Register Field Descriptions ........................................................
Register Call Summary for BOOTCFG_USB1_PHY_CTL4 .........................................................
BOOTCFG_USB0_EBC_IN_CTL Instances ..........................................................................
BOOTCFG_USB0_EBC_IN_CTL Register Field Descriptions .....................................................
Register Call Summary for BOOTCFG_USB0_EBC_IN_CTL ......................................................
BOOTCFG_USB1_EBC_IN_CTL Instances ..........................................................................
BOOTCFG_USB1_EBC_IN_CTL Register Field Descriptions .....................................................
Register Call Summary for BOOTCFG_USB1_EBC_IN_CTL ......................................................
BOOTCFG_SCRATCH0 Instances.....................................................................................
BOOTCFG_SCRATCH0 Register Field Descriptions ................................................................
5-291. BOOTCFG_CHIP_MISC_CTL0 Register Field Descriptions
450
5-292.
450
5-293.
5-294.
5-295.
5-296.
5-297.
5-298.
5-299.
5-300.
5-301.
5-302.
5-303.
5-304.
5-305.
5-306.
5-307.
5-308.
5-309.
5-310.
5-311.
5-312.
5-313.
5-314.
5-315.
5-316.
5-317.
5-318.
5-319.
5-320.
5-321.
5-322.
5-323.
5-324.
5-325.
5-326.
5-327.
5-328.
5-329.
5-330.
5-331.
5-332.
5-333.
5-334.
5-335.
5-336.
5-337.
5-338.
5-339.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
451
451
451
452
452
452
453
453
454
455
455
456
457
457
457
458
458
458
459
459
459
460
460
462
463
463
464
465
465
466
467
467
467
468
468
470
471
471
472
473
473
473
474
474
474
475
475
71
www.ti.com
5-340. Register Call Summary for BOOTCFG_SCRATCH0 ................................................................ 475
5-341. BOOTCFG_SCRATCH1 Instances..................................................................................... 476
5-342. BOOTCFG_SCRATCH1 Register Field Descriptions ................................................................ 476
5-343. Register Call Summary for BOOTCFG_SCRATCH1 ................................................................ 476
5-344. BOOTCFG_SCRATCH2 Instances..................................................................................... 477
5-345. BOOTCFG_SCRATCH2 Register Field Descriptions ................................................................ 477
5-346. Register Call Summary for BOOTCFG_SCRATCH2 ................................................................ 477
5-347. BOOTCFG_SCRATCH3 Instances..................................................................................... 478
5-348. BOOTCFG_SCRATCH3 Register Field Descriptions ................................................................ 478
5-349. Register Call Summary for BOOTCFG_SCRATCH3 ................................................................ 478
5-350. BOOTCFG_SCRATCH4 Instances..................................................................................... 479
5-351. BOOTCFG_SCRATCH4 Register Field Descriptions ................................................................ 479
5-352. Register Call Summary for BOOTCFG_SCRATCH4 ................................................................ 479
5-353. BOOTCFG_SCRATCH5 Instances..................................................................................... 480
5-354. BOOTCFG_SCRATCH5 Register Field Descriptions ................................................................ 480
5-355. Register Call Summary for BOOTCFG_SCRATCH5 ................................................................ 480
5-356. BOOTCFG_SCRATCH6 Instances..................................................................................... 481
5-357. BOOTCFG_SCRATCH6 Register Field Descriptions ................................................................ 481
5-358. Register Call Summary for BOOTCFG_SCRATCH6 ................................................................ 481
5-359. BOOTCFG_SCRATCH7 Instances..................................................................................... 482
5-360. BOOTCFG_SCRATCH7 Register Field Descriptions ................................................................ 482
5-361. Register Call Summary for BOOTCFG_SCRATCH7 ................................................................ 482
5-362. BOOTCFG_SCRATCH8 Instances..................................................................................... 483
5-363. BOOTCFG_SCRATCH8 Register Field Descriptions ................................................................ 483
5-364. Register Call Summary for BOOTCFG_SCRATCH8 ................................................................ 483
5-365. BOOTCFG_SCRATCH9 Instances..................................................................................... 484
5-366. BOOTCFG_SCRATCH9 Register Field Descriptions ................................................................ 484
5-367. Register Call Summary for BOOTCFG_SCRATCH9 ................................................................ 484
5-368. BOOTCFG_SCRATCH10 Instances ................................................................................... 485
5-369. BOOTCFG_SCRATCH10 Register Field Descriptions .............................................................. 485
5-370. Register Call Summary for BOOTCFG_SCRATCH10 ............................................................... 485
5-371. BOOTCFG_SCRATCH11 Instances ................................................................................... 486
5-372. BOOTCFG_SCRATCH11 Register Field Descriptions .............................................................. 486
5-373. Register Call Summary for BOOTCFG_SCRATCH11 ............................................................... 486
5-374. BOOTCFG_SCRATCH12 Instances ................................................................................... 487
5-375. BOOTCFG_SCRATCH12 Register Field Descriptions .............................................................. 487
5-376. Register Call Summary for BOOTCFG_SCRATCH12 ............................................................... 487
5-377. BOOTCFG_SCRATCH13 Instances ................................................................................... 488
5-378. BOOTCFG_SCRATCH13 Register Field Descriptions .............................................................. 488
5-379. Register Call Summary for BOOTCFG_SCRATCH13 ............................................................... 488
5-380. BOOTCFG_SCRATCH14 Instances ................................................................................... 489
5-381. BOOTCFG_SCRATCH14 Register Field Descriptions .............................................................. 489
5-382. Register Call Summary for BOOTCFG_SCRATCH14 ............................................................... 489
5-383. BOOTCFG_SCRATCH15 Instances ................................................................................... 490
5-384. BOOTCFG_SCRATCH15 Register Field Descriptions .............................................................. 490
5-385. Register Call Summary for BOOTCFG_SCRATCH15 ............................................................... 490
5-386. BOOTCFG_DSP_BOOT_ADDR0_NS Instances
....................................................................
491
5-387. BOOTCFG_DSP_BOOT_ADDR0_NS Register Field Descriptions ................................................ 491
5-388. Register Call Summary for BOOTCFG_DSP_BOOT_ADDR0_NS ................................................ 491
72
List of Tables
SPRUHY8I – January 2016 – Revised March 2019
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5-389. BOOTCFG_OBSCLKCTL Instances ................................................................................... 492
5-390. BOOTCFG_OBSCLKCTL Register Field Descriptions .............................................................. 492
5-391. Register Call Summary for BOOTCFG_OBSCLKCTL ............................................................... 493
5-392. BOOTCFG_EFUSE_BOOTROM Instances ........................................................................... 494
5-393. BOOTCFG_EFUSE_BOOTROM Register Field Descriptions ...................................................... 494
......................................................
BOOTCFG_EVENT_MUXCTL0 Instances ............................................................................
BOOTCFG_EVENT_MUXCTL0 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL0 ........................................................
BOOTCFG_EVENT_MUXCTL1 Instances ............................................................................
BOOTCFG_EVENT_MUXCTL1 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL1 ........................................................
BOOTCFG_EVENT_MUXCTL2 Instances ............................................................................
BOOTCFG_EVENT_MUXCTL2 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL2 ........................................................
BOOTCFG_EVENT_MUXCTL3 Instances ............................................................................
BOOTCFG_EVENT_MUXCTL3 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL3 ........................................................
BOOTCFG_EVENT_MUXCTL4 Instances ............................................................................
BOOTCFG_EVENT_MUXCTL4 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL4 ........................................................
BOOTCFG_EVENT_MUXCTL5 Instances ............................................................................
BOOTCFG_EVENT_MUXCTL5 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL5 ........................................................
BOOTCFG_EVENT_MUXCTL6 Instances ............................................................................
BOOTCFG_EVENT_MUXCTL6 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL6 ........................................................
BOOTCFG_EVENT_MUXCTL7 Instances ............................................................................
BOOTCFG_EVENT_MUXCTL7 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL7 ........................................................
BOOTCFG_EVENT_MUXCTL8 Instances ............................................................................
BOOTCFG_EVENT_MUXCTL8 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL8 ........................................................
BOOTCFG_EVENT_MUXCTL9 Instances ............................................................................
BOOTCFG_EVENT_MUXCTL9 Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL9 ........................................................
BOOTCFG_EVENT_MUXCTL10 Instances ..........................................................................
BOOTCFG_EVENT_MUXCTL10 Register Field Descriptions ......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL10 ......................................................
BOOTCFG_EVENT_MUXCTL11 Instances ..........................................................................
BOOTCFG_EVENT_MUXCTL11 Register Field Descriptions ......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL11 ......................................................
BOOTCFG_EVENT_MUXCTL12 Instances ..........................................................................
BOOTCFG_EVENT_MUXCTL12 Register Field Descriptions ......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL12 ......................................................
BOOTCFG_EVENT_MUXCTL13 Instances ..........................................................................
BOOTCFG_EVENT_MUXCTL13 Register Field Descriptions ......................................................
Register Call Summary for BOOTCFG_EVENT_MUXCTL13 ......................................................
BOOTCFG_DCAN_RAMINIT Instances ...............................................................................
5-394. Register Call Summary for BOOTCFG_EFUSE_BOOTROM
5-395.
5-396.
5-397.
5-398.
5-399.
5-400.
5-401.
5-402.
5-403.
5-404.
5-405.
5-406.
5-407.
5-408.
5-409.
5-410.
5-411.
5-412.
5-413.
5-414.
5-415.
5-416.
5-417.
5-418.
5-419.
5-420.
5-421.
5-422.
5-423.
5-424.
5-425.
5-426.
5-427.
5-428.
5-429.
5-430.
5-431.
5-432.
5-433.
5-434.
5-435.
5-436.
5-437.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
494
495
495
495
496
496
496
497
497
497
498
498
498
499
499
499
500
500
500
501
501
501
502
502
502
503
503
503
504
504
504
505
505
505
506
506
506
507
507
507
508
508
508
509
73
www.ti.com
5-438. BOOTCFG_DCAN_RAMINIT Register Field Descriptions .......................................................... 509
5-439. Register Call Summary for BOOTCFG_DCAN_RAMINIT........................................................... 509
5-440. BOOTCFG_ETHERNET_CFG Instances ............................................................................. 510
5-441. BOOTCFG_ETHERNET_CFG Register Field Descriptions......................................................... 510
5-442. Register Call Summary for BOOTCFG_ETHERNET_CFG ......................................................... 510
511
5-444.
511
5-445.
5-446.
5-447.
5-448.
5-449.
5-450.
5-451.
5-452.
5-453.
5-454.
5-455.
5-456.
5-457.
5-458.
5-459.
5-460.
5-461.
5-462.
5-463.
5-464.
5-465.
5-466.
5-467.
5-468.
5-469.
5-470.
5-471.
5-472.
5-473.
5-474.
5-475.
5-476.
5-477.
5-478.
5-479.
5-480.
5-481.
5-482.
5-483.
5-484.
5-485.
5-486.
74
............................................................................
BOOTCFG_MLB_SIG_IO_CTL Register Field Descriptions ........................................................
Register Call Summary for BOOTCFG_MLB_SIG_IO_CTL ........................................................
BOOTCFG_MLB_DAT_IO_CTL Instances ............................................................................
BOOTCFG_MLB_DAT_IO_CTL Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_MLB_DAT_IO_CTL .......................................................
BOOTCFG_MLB_CLK_IO_CTL Instances ............................................................................
BOOTCFG_MLB_CLK_IO_CTL Register Field Descriptions .......................................................
Register Call Summary for BOOTCFG_MLB_CLK_IO_CTL........................................................
BOOTCFG_EPWM_CTL Instances ....................................................................................
BOOTCFG_EPWM_CTL Register Field Descriptions ...............................................................
Register Call Summary for BOOTCFG_EPWM_CTL ................................................................
BOOTCFG_ECAP_CAPEVT_CTL Instances .........................................................................
BOOTCFG_ECAP_CAPEVT_CTL Register Field Descriptions ....................................................
Register Call Summary for BOOTCFG_ECAP_CAPEVT_CTL.....................................................
BOOTCFG_EQEP_STAT Instances ...................................................................................
BOOTCFG_EQEP_STAT Register Field Descriptions ..............................................................
Register Call Summary for BOOTCFG_EQEP_STAT ...............................................................
BOOTCFG_LVDS_BG_CTL Instances ................................................................................
BOOTCFG_LVDS_BG_CTL Register Field Descriptions ...........................................................
Register Call Summary for BOOTCFG_LVDS_BG_CTL ............................................................
BOOTCFG_LDO_USB_CTL Instances ................................................................................
BOOTCFG_LDO_USB_CTL Register Field Descriptions ...........................................................
Register Call Summary for BOOTCFG_LDO_USB_CTL ............................................................
BOOTCFG_LDO_PCIE_CTL Instances ...............................................................................
BOOTCFG_LDO_PCIE_CTL Register Field Descriptions ..........................................................
Register Call Summary for BOOTCFG_LDO_PCIE_CTL ...........................................................
BOOTCFG_PADCONFIG0 to BOOTCFG_PADCONFIG259 Instances ..........................................
BOOTCFG_PADCONFIG0 to BOOTCFG_PADCONFIG259 Register Field Descriptions .....................
Register Call Summary for BOOTCFG_PADCONFIG0 .............................................................
Power Domains ...........................................................................................................
Clock Domains ............................................................................................................
Module States .............................................................................................................
PSC Instances ............................................................................................................
PSC Registers.............................................................................................................
PID Instances .............................................................................................................
PID Register Field Descriptions .........................................................................................
Register Call Summary for PID .........................................................................................
PTCMD Instances ........................................................................................................
PTCMD Register Field Descriptions....................................................................................
Register Call Summary for PTCMD ....................................................................................
PTSTAT Instances........................................................................................................
PTSTAT Register Field Descriptions ...................................................................................
Register Call Summary for PTSTAT ...................................................................................
5-443. BOOTCFG_MLB_SIG_IO_CTL Instances
List of Tables
511
512
512
512
513
513
513
514
514
515
516
516
516
517
517
517
518
518
518
519
519
519
520
520
520
521
521
522
524
525
527
529
529
530
530
530
531
531
531
532
532
532
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
5-487. PDSTAT0 to PDSTAT17 Instances .................................................................................... 533
5-488. PDSTAT0 to PDSTAT17 Register Field Descriptions
...............................................................
533
5-489. Register Call Summary for PDSTAT0 to PDSTAT17 ................................................................ 533
5-490. PDCTL0 to PDCTL17 Instances ........................................................................................ 534
5-491. PDCTL0 to PDCTL17 Register Field Descriptions ................................................................... 534
...................................................................................
MDSTAT0 to MDSTAT31 Instances ...................................................................................
MDSTAT0 to MDSTAT31 Register Field Descriptions...............................................................
Register Call Summary for MDSTAT0 to MDSTAT31 ...............................................................
MDCTL0 to MDCTL31 Instances .......................................................................................
MDCTL0 to MDCTL31 Register Field Descriptions ..................................................................
Register Call Summary for MDCTL0 to MDCTL31 ...................................................................
Reset Types ...............................................................................................................
Mapping of Reset Requestors to Reset Controller Outputs .........................................................
Mapping of Reset Controller Reset Outputs to Modules ............................................................
Reset Mapping and Description ........................................................................................
SYS_OSCCLK Clock Selection .........................................................................................
DDR PLL Clock Selection ...............................................................................................
OBS_CLK Clock Selection ..............................................................................................
MAIN PLL Stabilization, Lock, and Reset Times .....................................................................
PLL Controller Instances .................................................................................................
PLL Controller Registers ................................................................................................
PLLCTL Instances ........................................................................................................
PLLCTL Register Field Descriptions ...................................................................................
Register Call Summary for PLLCTL ....................................................................................
SECCTL Instances .......................................................................................................
SECCTL Register Field Descriptions ..................................................................................
Register Call Summary for SECCTL ...................................................................................
PLLM Instances ...........................................................................................................
PLLM Register Field Descriptions ......................................................................................
Register Call Summary for PLLM .......................................................................................
PLLDIV1 Instances .......................................................................................................
PLLDIV1 Register Field Descriptions ..................................................................................
Register Call Summary for PLLDIV1 ...................................................................................
PLLDIV2 Instances .......................................................................................................
PLLDIV2 Register Field Descriptions ..................................................................................
Register Call Summary for PLLDIV2 ...................................................................................
PLLDIV3 Instances .......................................................................................................
PLLDIV3 Register Field Descriptions ..................................................................................
Register Call Summary for PLLDIV3 ...................................................................................
PLLDIV4 Instances .......................................................................................................
PLLDIV4 Register Field Descriptions ..................................................................................
Register Call Summary for PLLDIV4 ...................................................................................
PLLCMD Instances .......................................................................................................
PLLCMD Register Field Descriptions ..................................................................................
Register Call Summary for PLLCMD ...................................................................................
PLLSTAT Instances ......................................................................................................
PLLSTAT Register Field Descriptions .................................................................................
Register Call Summary for PLLSTAT ..................................................................................
5-492. Register Call Summary for PDCTLx
534
5-493.
535
5-494.
5-495.
5-496.
5-497.
5-498.
5-499.
5-500.
5-501.
5-502.
5-503.
5-504.
5-505.
5-506.
5-507.
5-508.
5-509.
5-510.
5-511.
5-512.
5-513.
5-514.
5-515.
5-516.
5-517.
5-518.
5-519.
5-520.
5-521.
5-522.
5-523.
5-524.
5-525.
5-526.
5-527.
5-528.
5-529.
5-530.
5-531.
5-532.
5-533.
5-534.
5-535.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
535
536
537
537
537
538
545
545
547
555
555
556
561
569
569
570
570
571
572
572
572
573
573
573
574
574
574
575
575
575
576
576
576
577
577
577
578
578
578
579
579
579
75
www.ti.com
5-536. ALNCTL Instances........................................................................................................ 580
5-537. ALNCTL Register Field Descriptions ................................................................................... 580
5-538. Register Call Summary for ALNCTL ................................................................................... 581
582
5-540.
582
5-541.
5-542.
5-543.
5-544.
5-545.
5-546.
5-547.
5-548.
5-549.
5-550.
5-551.
5-552.
5-553.
5-554.
5-555.
5-556.
5-557.
6-1.
6-2.
6-3.
6-4.
6-5.
6-6.
6-7.
6-8.
6-9.
6-10.
6-11.
6-12.
6-13.
6-14.
6-15.
6-16.
6-17.
6-18.
6-19.
6-20.
6-21.
6-22.
6-23.
6-24.
6-25.
6-26.
6-27.
76
....................................................................................................
DCHANGE Register Field Descriptions ................................................................................
Register Call Summary for DCHANGE ................................................................................
SYSTAT Instances .......................................................................................................
SYSTAT Register Field Descriptions ...................................................................................
Register Call Summary for SYSTAT ...................................................................................
RSTYPE Instances .......................................................................................................
RSTYPE Register Field Descriptions ..................................................................................
Register Call Summary for RSTYPE ...................................................................................
RSCTRL Instances .......................................................................................................
RSCTRL Register Field Descriptions ..................................................................................
Register Call Summary for RSCTRL ...................................................................................
RSCFG Instances ........................................................................................................
RSCFG Register Field Descriptions ....................................................................................
Register Call Summary for RSCFG ....................................................................................
RSISO Instances..........................................................................................................
RSISO Register Field Descriptions .....................................................................................
Register Call Summary for RSISO .....................................................................................
Module Clock Distribution................................................................................................
Cortex-A15 Processor Core Supported Features ....................................................................
AINTC Interrupt Sources .................................................................................................
AXI2VBUS_MASTER Instances ........................................................................................
AXI2VBUS_MASTER Registers ........................................................................................
AXI2VBUS_MASTER Registers – R/W Modes .......................................................................
AXI2VBUS_PID Instances ...............................................................................................
AXI2VBUS_PID Register Field Descriptions ..........................................................................
Register Call Summary for AXI2VBUS_PID ..........................................................................
AXI2VBUS_CMD_PRI Instances .......................................................................................
AXI2VBUS_CMD_PRI Register Field Definitions.....................................................................
Register Call Summary for AXI2VBUS_CMD_PRI ...................................................................
AXI2VBUS_CPU0_END Instances .....................................................................................
AXI2VBUS_CPU0_END Register Field Definitions ..................................................................
Register Call Summary for AXI2VBUS_CPU0_END.................................................................
ARM_VBUSP Instances .................................................................................................
ARM_VBUSP Registers .................................................................................................
ARM_PID Instances ......................................................................................................
ARM_PID Register Field Descriptions .................................................................................
Register Call Summary for ARM_PID ..................................................................................
ARM_INTC_PID Instances ..............................................................................................
ARM_INTC_PID Register Field Descriptions .........................................................................
Register Call Summary for ARM_INTC_PID ..........................................................................
STM_DISABLE Instances ...............................................................................................
STM_DISABLE Register Field Descriptions...........................................................................
Register Call Summary for STM_DISABLE ...........................................................................
PD_CPU0_PTCMD Instances ..........................................................................................
PD_CPU0_PTCMD Register Field Descriptions......................................................................
5-539. DCHANGE Instances
List of Tables
583
584
584
584
585
585
585
586
586
586
587
587
588
589
589
589
590
598
601
613
613
613
614
614
614
615
615
615
616
616
616
617
617
618
618
618
619
619
619
620
620
620
621
621
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
6-28.
Register Call Summary for PD_CPU0_PTCMD ...................................................................... 621
6-29.
PD_CPU0_PDSTAT Instances ......................................................................................... 622
6-30.
PD_CPU0_PDSTAT Register Field Descriptions..................................................................... 622
6-31.
Register Call Summary for PD_CPU0_PDSTAT ..................................................................... 622
6-32.
PD_CPU0_PDCTL Instances ........................................................................................... 623
6-33.
PD_CPU0_PDCTL Register Field Descriptions ...................................................................... 623
6-34.
Register Call Summary for PD_CPU0_PDCTL ....................................................................... 623
6-35.
DSP Integration Attributes ............................................................................................... 626
6-36.
DSP Clocks and Resets ................................................................................................. 626
6-37.
C66x DSP Interrupt Sources ............................................................................................ 626
6-38.
C66x CorePac Registers
6-39.
6-40.
6-41.
6-42.
6-43.
6-44.
6-45.
6-46.
6-47.
6-48.
6-49.
6-50.
6-51.
6-52.
6-53.
6-54.
6-55.
6-56.
6-57.
6-58.
6-59.
6-60.
6-61.
6-62.
6-63.
6-64.
6-65.
6-66.
6-67.
6-68.
6-69.
6-70.
6-71.
6-72.
6-73.
6-74.
6-75.
6-76.
................................................................................................
DSP ECC/Parity Support ................................................................................................
PRU-ICSS_0 I/O Signals ................................................................................................
PRU-ICSS_1 I/O Signals ................................................................................................
PRU-ICSS Integration Attributes ........................................................................................
PRU-ICSS Clocks and Resets ..........................................................................................
PRU-ICSS Hardware Requests .........................................................................................
PRU-ICSS Local Instruction Memory Map ............................................................................
PRU-ICSS Local Data Memory Map ...................................................................................
PRU-ICSS Global Memory Map ........................................................................................
PRU_ICSS_CFG Instances .............................................................................................
PRU_ICSS_CFG Registers .............................................................................................
PRUSS_REVID Instances ...............................................................................................
PRUSS_REVID Register Field Descriptions ..........................................................................
Register Call Summary for PRUSS_REVID ...........................................................................
PRUSS_GPCFG0 Instances ............................................................................................
PRUSS_GPCFG0 Register Field Descriptions .......................................................................
Register Call Summary for PRUSS_GPCFG0 ........................................................................
PRUSS_GPCFG1 Instances ............................................................................................
PRUSS_GPCFG1 Register Field Descriptions .......................................................................
Register Call Summary for PRUSS_GPCFG1 ........................................................................
PRUSS_CGR Instances .................................................................................................
PRUSS_CGR Register Field Descriptions ............................................................................
Register Call Summary for PRUSS_CGR .............................................................................
PRUSS_PMAO Instances ...............................................................................................
PRUSS_PMAO Register Field Descriptions ..........................................................................
Register Call Summary for PRUSS_PMAO ...........................................................................
PRUSS_MII_RT Instances ..............................................................................................
PRUSS_MII_RT Register Field Descriptions .........................................................................
Register Call Summary for PRUSS_MII_RT ..........................................................................
PRUSS_IEPCLK Instances..............................................................................................
PRUSS_IEPCLK Register Field Descriptions .........................................................................
Register Call Summary for PRUSS_IEPCLK .........................................................................
PRUSS_SPP Instances ..................................................................................................
PRUSS_SPP Register Field Descriptions .............................................................................
Register Call Summary for PRUSS_SPP .............................................................................
PRUSS_PIN_MX Instances .............................................................................................
PRUSS_PIN_MX Register Field Descriptions ........................................................................
Register Call Summary for PRUSS_PIN_MX .........................................................................
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
630
636
641
645
656
656
657
659
659
661
662
662
663
663
663
664
664
665
667
667
668
669
669
671
672
672
672
673
673
673
674
674
674
675
675
675
676
676
676
77
www.ti.com
6-77.
PRU Features ............................................................................................................. 677
6-78.
PRU0/1 Constant Table .................................................................................................. 679
6-79.
Real-Time Status Interface Mapping (R31) Field Descriptions ..................................................... 680
6-80.
Event Interface Mapping (R31) Field Descriptions ................................................................... 681
6-81.
PRU R31 (GPI) Modes ................................................................................................... 682
6-82.
PRU GPI Signals and Configurations .................................................................................. 682
6-83.
PRU EGPIs Effective Clock Values .................................................................................... 684
6-84.
PRU R30 (EGPO) Output Mode ........................................................................................ 685
6-85.
GPO Mode Descriptions ................................................................................................. 685
6-86.
Effective Clock Values ................................................................................................... 687
6-87.
PRU GPI Signals and Configurations for Sigma Delta
6-88.
6-89.
6-90.
6-91.
6-92.
6-93.
6-94.
6-95.
6-96.
6-97.
6-98.
6-99.
6-100.
6-101.
6-102.
6-103.
6-104.
6-105.
6-106.
6-107.
6-108.
6-109.
6-110.
6-111.
6-112.
6-113.
6-114.
6-115.
6-116.
6-117.
6-118.
6-119.
6-120.
6-121.
6-122.
6-123.
6-124.
6-125.
78
..............................................................
External Clock Sources ..................................................................................................
Sigma Delta PRU Registers: R31 ......................................................................................
Sigma Delta PRU Registers: R30 ......................................................................................
Data_out[23:0] Configuration Options ..................................................................................
PRU GPI/GPO Signals and Configurations for Peripheral I/F ......................................................
Peripheral I/F RX .........................................................................................................
Peripheral I/F TX ..........................................................................................................
Clock Rate Examples for 192-MHz PRUSSn_UART_GFCLK Clock Source .....................................
MPY/MAC XFR ID .......................................................................................................
MAC_CTRL_STATUS Register (R25) Field Descriptions ..........................................................
CRC Register to PRU Port Mapping ...................................................................................
Scratch Pad XFR ID ......................................................................................................
Scratch Pad XFR Collision and Stall Conditions .....................................................................
Mapping of the RAM IDs to the ECC RAMs ..........................................................................
PRU-ICSS_ECC_CFG Instances .......................................................................................
PRU-ICSS_ECC_CFG Registers .......................................................................................
ECC_REVISION Instances ..............................................................................................
ECC_REVISION Register Field Descriptions .........................................................................
Register Call Summary for ECC_REVISION..........................................................................
ECC_VECTOR Instances ...............................................................................................
ECC_VECTOR Register Field Descriptions ...........................................................................
Register Call Summary for ECC_VECTOR ...........................................................................
ECC_MISC_STATUS Instances ........................................................................................
ECC_MISC_STATUS Register Field Descriptions ...................................................................
Register Call Summary for ECC_MISC_STATUS....................................................................
ECC_WRAPPER_REVISION Instances ...............................................................................
ECC_WRAPPER_REVISION Register Field Descriptions ..........................................................
Register Call Summary for ECC_WRAPPER_REVISION ..........................................................
ECC_CONTROL Instances..............................................................................................
ECC_CONTROL Register Field Descriptions .........................................................................
Register Call Summary for ECC_CONTROL .........................................................................
ECC_ERROR_CONTROL1 Instances .................................................................................
ECC_ERROR_CONTROL1 Register Field Descriptions ............................................................
Register Call Summary for ECC_ERROR_CONTROL1.............................................................
ECC_ERROR_CONTROL2 Instances .................................................................................
ECC_ERROR_CONTROL2 Register Field Descriptions ............................................................
Register Call Summary for ECC_ERROR_CONTROL2.............................................................
ECC_ERROR_STATUS1 Instances ...................................................................................
List of Tables
688
691
691
691
693
694
697
697
699
708
708
711
713
713
716
717
717
718
718
718
719
719
719
720
720
720
721
721
721
722
722
722
723
723
723
724
724
724
725
SPRUHY8I – January 2016 – Revised March 2019
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6-126. ECC_ERROR_STATUS1 Register Field Descriptions............................................................... 725
6-127. Register Call Summary for ECC_ERROR_STATUS1 ............................................................... 726
6-128. ECC_ERROR_STATUS2 Instances ................................................................................... 727
6-129. ECC_ERROR_STATUS2 Register Field Descriptions............................................................... 727
6-130. Register Call Summary for ECC_ERROR_STATUS2 ............................................................... 727
6-131. ECC_EOI Instances ...................................................................................................... 728
6-132. ECC_EOI Register Field Descriptions ................................................................................. 728
6-133. Register Call Summary for ECC_EOI .................................................................................. 728
6-134. ECC_INT_STATUS_0 to ECC_INT_STATUS_15 Instances ....................................................... 729
6-135. ECC_INT_STATUS_0 to ECC_INT_STATUS_15 Register Field Descriptions
..................................
729
6-136. Register Call Summary for ECC_INT_STATUS_0 ................................................................... 729
6-137. ECC_INT_ENABLE_0 to ECC_INT_ENABLE_15 Instances ....................................................... 730
6-138. ECC_INT_ENABLE_0 to ECC_INT_ENABLE_15 Register Field Descriptions
..................................
730
6-139. Register Call Summary for ECC_INT_ENABLE_0 ................................................................... 730
6-140. ECC_INT_CLEAR_0 to ECC_INT_CLEAR_15 Instances
..........................................................
731
6-141. ECC_INT_CLEAR_0 to ECC_INT_CLEAR_15 Register Field Descriptions ...................................... 731
6-142. Register Call Summary for ECC_INT_CLEAR_0 ..................................................................... 731
6-143. PRU-ICSS_PRU_CTRL Instances ..................................................................................... 732
.....................................................................................
PRU_CONTROL Instances..............................................................................................
PRU_CONTROL Register Field Descriptions .........................................................................
Register Call Summary for PRU_CONTROL .........................................................................
PRU_STATUS Instances ................................................................................................
PRU_STATUS Register Field Descriptions ...........................................................................
Register Call Summary for PRU_STATUS ............................................................................
PRU_WAKEUP_EN Instances ..........................................................................................
PRU_WAKEUP_EN Register Field Descriptions .....................................................................
Register Call Summary for PRU_WAKEUP_EN......................................................................
PRU_CYCLE Instances ..................................................................................................
PRU_CYCLE Register Field Descriptions .............................................................................
Register Call Summary for PRU_CYCLE .............................................................................
PRU_STALL Instances ..................................................................................................
PRU_STALL Register Field Descriptions ..............................................................................
Register Call Summary for PRU_STALL ..............................................................................
PRU_CTBIR0 Instances .................................................................................................
PRU_CTBIR0 Register Field Descriptions ............................................................................
Register Call Summary for PRU_CTBIR0 .............................................................................
PRU_CTBIR1 Instances .................................................................................................
PRU_CTBIR1 Register Field Descriptions ............................................................................
Register Call Summary for PRU_CTBIR1 .............................................................................
PRU_CTPPR0 Instances ................................................................................................
PRU_CTPPR0 Register Field Descriptions ...........................................................................
Register Call Summary for PRU_CTPPR0 ............................................................................
PRU_CTPPR1 Instances ................................................................................................
PRU_CTPPR1 Register Field Descriptions ...........................................................................
Register Call Summary for PRU_CTPPR1 ............................................................................
PRU-ICSS_PRU_DEBUG Instances ...................................................................................
PRU-ICSS_PRU_DEBUG Registers ...................................................................................
PRU_ICSS_DBG_GPREG0 Instances ................................................................................
6-144. PRU-ICSS_PRU_CTRL Registers
732
6-145.
733
6-146.
6-147.
6-148.
6-149.
6-150.
6-151.
6-152.
6-153.
6-154.
6-155.
6-156.
6-157.
6-158.
6-159.
6-160.
6-161.
6-162.
6-163.
6-164.
6-165.
6-166.
6-167.
6-168.
6-169.
6-170.
6-171.
6-172.
6-173.
6-174.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
733
734
735
735
735
736
736
736
737
737
737
738
738
738
739
739
739
740
740
740
741
741
741
742
742
742
743
743
747
79
www.ti.com
6-175. PRU_ICSS_DBG_GPREG0 Register Field Descriptions............................................................ 747
6-176. Register Call Summary for PRU_ICSS_DBG_GPREG0 ............................................................ 747
6-177. PRU_ICSS_DBG_GPREG1 Instances ................................................................................ 748
6-178. PRU_ICSS_DBG_GPREG1 Register Field Descriptions............................................................ 748
6-179. Register Call Summary for PRU_ICSS_DBG_GPREG1 ............................................................ 748
6-180. PRU_ICSS_DBG_GPREG2 Instances ................................................................................ 749
6-181. PRU_ICSS_DBG_GPREG2 Register Field Descriptions............................................................ 749
6-182. Register Call Summary for PRU_ICSS_DBG_GPREG2 ............................................................ 749
6-183. PRU_ICSS_DBG_GPREG3 Instances ................................................................................ 750
6-184. PRU_ICSS_DBG_GPREG3 Register Field Descriptions............................................................ 750
6-185. Register Call Summary for PRU_ICSS_DBG_GPREG3 ............................................................ 750
6-186. PRU_ICSS_DBG_GPREG4 Instances ................................................................................ 751
6-187. PRU_ICSS_DBG_GPREG4 Register Field Descriptions............................................................ 751
6-188. Register Call Summary for PRU_ICSS_DBG_GPREG4 ............................................................ 751
6-189. PRU_ICSS_DBG_GPREG5 Instances ................................................................................ 752
6-190. PRU_ICSS_DBG_GPREG5 Register Field Descriptions............................................................ 752
6-191. Register Call Summary for PRU_ICSS_DBG_GPREG5 ............................................................ 752
6-192. PRU_ICSS_DBG_GPREG6 Instances ................................................................................ 753
6-193. PRU_ICSS_DBG_GPREG6 Register Field Descriptions............................................................ 753
6-194. Register Call Summary for PRU_ICSS_DBG_GPREG6 ............................................................ 753
6-195. PRU_ICSS_DBG_GPREG7 Instances ................................................................................ 754
6-196. PRU_ICSS_DBG_GPREG7 Register Field Descriptions............................................................ 754
6-197. Register Call Summary for PRU_ICSS_DBG_GPREG7 ............................................................ 754
6-198. PRU_ICSS_DBG_GPREG8 Instances ................................................................................ 755
6-199. PRU_ICSS_DBG_GPREG8 Register Field Descriptions............................................................ 755
6-200. Register Call Summary for PRU_ICSS_DBG_GPREG8 ............................................................ 755
6-201. PRU_ICSS_DBG_GPREG9 Instances ................................................................................ 756
6-202. PRU_ICSS_DBG_GPREG9 Register Field Descriptions............................................................ 756
6-203. Register Call Summary for PRU_ICSS_DBG_GPREG9 ............................................................ 756
6-204. PRU_ICSS_DBG_GPREG10 Instances ............................................................................... 757
6-205. PRU_ICSS_DBG_GPREG10 Register Field Descriptions .......................................................... 757
6-206. Register Call Summary for PRU_ICSS_DBG_GPREG10........................................................... 757
6-207. PRU_ICSS_DBG_GPREG11 Instances ............................................................................... 758
6-208. PRU_ICSS_DBG_GPREG11 Register Field Descriptions .......................................................... 758
6-209. Register Call Summary for PRU_ICSS_DBG_GPREG11........................................................... 758
6-210. PRU_ICSS_DBG_GPREG12 Instances ............................................................................... 759
6-211. PRU_ICSS_DBG_GPREG12 Register Field Descriptions .......................................................... 759
6-212. Register Call Summary for PRU_ICSS_DBG_GPREG12........................................................... 759
6-213. PRU_ICSS_DBG_GPREG13 Instances ............................................................................... 760
6-214. PRU_ICSS_DBG_GPREG13 Register Field Descriptions .......................................................... 760
6-215. Register Call Summary for PRU_ICSS_DBG_GPREG13........................................................... 760
6-216. PRU_ICSS_DBG_GPREG14 Instances ............................................................................... 761
6-217. PRU_ICSS_DBG_GPREG14 Register Field Descriptions .......................................................... 761
6-218. Register Call Summary for PRU_ICSS_DBG_GPREG14........................................................... 761
6-219. PRU_ICSS_DBG_GPREG15 Instances ............................................................................... 762
6-220. PRU_ICSS_DBG_GPREG15 Register Field Descriptions .......................................................... 762
6-221. Register Call Summary for PRU_ICSS_DBG_GPREG15........................................................... 762
6-222. PRU_ICSS_DBG_GPREG16 Instances ............................................................................... 763
6-223. PRU_ICSS_DBG_GPREG16 Register Field Descriptions .......................................................... 763
80
List of Tables
SPRUHY8I – January 2016 – Revised March 2019
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6-224. Register Call Summary for PRU_ICSS_DBG_GPREG16........................................................... 763
6-225. PRU_ICSS_DBG_GPREG17 Instances ............................................................................... 764
6-226. PRU_ICSS_DBG_GPREG17 Register Field Descriptions .......................................................... 764
6-227. Register Call Summary for PRU_ICSS_DBG_GPREG17........................................................... 764
6-228. PRU_ICSS_DBG_GPREG18 Instances ............................................................................... 765
6-229. PRU_ICSS_DBG_GPREG18 Register Field Descriptions .......................................................... 765
6-230. Register Call Summary for PRU_ICSS_DBG_GPREG18........................................................... 765
6-231. PRU_ICSS_DBG_GPREG19 Instances ............................................................................... 766
6-232. PRU_ICSS_DBG_GPREG19 Register Field Descriptions .......................................................... 766
6-233. Register Call Summary for PRU_ICSS_DBG_GPREG19........................................................... 766
6-234. PRU_ICSS_DBG_GPREG20 Instances ............................................................................... 767
6-235. PRU_ICSS_DBG_GPREG20 Register Field Descriptions .......................................................... 767
6-236. Register Call Summary for PRU_ICSS_DBG_GPREG20........................................................... 767
6-237. PRU_ICSS_DBG_GPREG21 Instances ............................................................................... 768
6-238. PRU_ICSS_DBG_GPREG21 Register Field Descriptions .......................................................... 768
6-239. Register Call Summary for PRU_ICSS_DBG_GPREG21........................................................... 768
6-240. PRU_ICSS_DBG_GPREG22 Instances ............................................................................... 769
6-241. PRU_ICSS_DBG_GPREG22 Register Field Descriptions .......................................................... 769
6-242. Register Call Summary for PRU_ICSS_DBG_GPREG22........................................................... 769
6-243. PRU_ICSS_DBG_GPREG23 Instances ............................................................................... 770
6-244. PRU_ICSS_DBG_GPREG23 Register Field Descriptions .......................................................... 770
6-245. Register Call Summary for PRU_ICSS_DBG_GPREG23........................................................... 770
6-246. PRU_ICSS_DBG_GPREG24 Instances ............................................................................... 771
6-247. PRU_ICSS_DBG_GPREG24 Register Field Descriptions .......................................................... 771
6-248. Register Call Summary for PRU_ICSS_DBG_GPREG24........................................................... 771
6-249. PRU_ICSS_DBG_GPREG25 Instances ............................................................................... 772
6-250. PRU_ICSS_DBG_GPREG25 Register Field Descriptions .......................................................... 772
6-251. Register Call Summary for PRU_ICSS_DBG_GPREG25........................................................... 772
6-252. PRU_ICSS_DBG_GPREG26 Instances ............................................................................... 773
6-253. PRU_ICSS_DBG_GPREG26 Register Field Descriptions .......................................................... 773
6-254. Register Call Summary for PRU_ICSS_DBG_GPREG26........................................................... 773
6-255. PRU_ICSS_DBG_GPREG27 Instances ............................................................................... 774
6-256. PRU_ICSS_DBG_GPREG27 Register Field Descriptions .......................................................... 774
6-257. Register Call Summary for PRU_ICSS_DBG_GPREG27........................................................... 774
6-258. PRU_ICSS_DBG_GPREG28 Instances ............................................................................... 775
6-259. PRU_ICSS_DBG_GPREG28 Register Field Descriptions .......................................................... 775
6-260. Register Call Summary for PRU_ICSS_DBG_GPREG28........................................................... 775
6-261. PRU_ICSS_DBG_GPREG29 Instances ............................................................................... 776
6-262. PRU_ICSS_DBG_GPREG29 Register Field Descriptions .......................................................... 776
6-263. Register Call Summary for PRU_ICSS_DBG_GPREG29........................................................... 776
6-264. PRU_ICSS_DBG_GPREG30 Instances ............................................................................... 777
6-265. PRU_ICSS_DBG_GPREG30 Register Field Descriptions .......................................................... 777
6-266. Register Call Summary for PRU_ICSS_DBG_GPREG30........................................................... 777
6-267. PRU_ICSS_DBG_GPREG31 Instances ............................................................................... 778
6-268. PRU_ICSS_DBG_GPREG31 Register Field Descriptions .......................................................... 778
6-269. Register Call Summary for PRU_ICSS_DBG_GPREG31........................................................... 778
6-270. PRU_ICSS_DBG_CT_REG0 Instances ............................................................................... 779
6-271. PRU_ICSS_DBG_CT_REG0 Register Field Descriptions .......................................................... 779
6-272. Register Call Summary for PRU_ICSS_DBG_CT_REG0 ........................................................... 779
SPRUHY8I – January 2016 – Revised March 2019
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List of Tables
81
www.ti.com
6-273. PRU_ICSS_DBG_CT_REG1 Instances ............................................................................... 780
6-274. PRU_ICSS_DBG_CT_REG1 Register Field Descriptions .......................................................... 780
6-275. Register Call Summary for PRU_ICSS_DBG_CT_REG1 ........................................................... 780
6-276. PRU_ICSS_DBG_CT_REG2 Instances ............................................................................... 781
6-277. PRU_ICSS_DBG_CT_REG2 Register Field Descriptions .......................................................... 781
6-278. Register Call Summary for PRU_ICSS_DBG_CT_REG2 ........................................................... 781
6-279. PRU_ICSS_DBG_CT_REG3 Instances ............................................................................... 782
6-280. PRU_ICSS_DBG_CT_REG3 Register Field Descriptions .......................................................... 782
6-281. Register Call Summary for PRU_ICSS_DBG_CT_REG3 ........................................................... 782
6-282. PRU_ICSS_DBG_CT_REG4 Instances ............................................................................... 783
6-283. PRU_ICSS_DBG_CT_REG4 Register Field Descriptions .......................................................... 783
6-284. Register Call Summary for PRU_ICSS_DBG_CT_REG4 ........................................................... 783
6-285. PRU_ICSS_DBG_CT_REG5 Instances ............................................................................... 784
6-286. PRU_ICSS_DBG_CT_REG5 Register Field Descriptions .......................................................... 784
6-287. Register Call Summary for PRU_ICSS_DBG_CT_REG5 ........................................................... 784
6-288. PRU_ICSS_DBG_CT_REG6 Instances ............................................................................... 785
6-289. PRU_ICSS_DBG_CT_REG6 Register Field Descriptions .......................................................... 785
6-290. Register Call Summary for PRU_ICSS_DBG_CT_REG6 ........................................................... 785
6-291. PRU_ICSS_DBG_CT_REG7 Instances ............................................................................... 786
6-292. PRU_ICSS_DBG_CT_REG7 Register Field Descriptions .......................................................... 786
6-293. Register Call Summary for PRU_ICSS_DBG_CT_REG7 ........................................................... 786
6-294. PRU_ICSS_DBG_CT_REG8 Instances ............................................................................... 787
6-295. PRU_ICSS_DBG_CT_REG8 Register Field Descriptions .......................................................... 787
6-296. Register Call Summary for PRU_ICSS_DBG_CT_REG8 ........................................................... 787
6-297. PRU_ICSS_DBG_CT_REG9 Instances ............................................................................... 788
6-298. PRU_ICSS_DBG_CT_REG9 Register Field Descriptions .......................................................... 788
6-299. Register Call Summary for PRU_ICSS_DBG_CT_REG9 ........................................................... 788
6-300. PRU_ICSS_DBG_CT_REG10 Instances .............................................................................. 789
6-301. PRU_ICSS_DBG_CT_REG10 Register Field Descriptions ......................................................... 789
6-302. Register Call Summary for PRU_ICSS_DBG_CT_REG10
.........................................................
789
6-303. PRU_ICSS_DBG_CT_REG11 Instances .............................................................................. 790
6-304. PRU_ICSS_DBG_CT_REG11 Register Field Descriptions ......................................................... 790
6-305. Register Call Summary for PRU_ICSS_DBG_CT_REG11
.........................................................
790
6-306. PRU_ICSS_DBG_CT_REG12 Instances .............................................................................. 791
6-307. PRU_ICSS_DBG_CT_REG12 Register Field Descriptions ......................................................... 791
.........................................................
PRU_ICSS_DBG_CT_REG13 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG13 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG13 .........................................................
PRU_ICSS_DBG_CT_REG14 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG14 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG14 .........................................................
PRU_ICSS_DBG_CT_REG15 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG15 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG15 .........................................................
PRU_ICSS_DBG_CT_REG16 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG16 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG16 .........................................................
PRU_ICSS_DBG_CT_REG17 Instances ..............................................................................
6-308. Register Call Summary for PRU_ICSS_DBG_CT_REG12
6-309.
6-310.
6-311.
6-312.
6-313.
6-314.
6-315.
6-316.
6-317.
6-318.
6-319.
6-320.
6-321.
82
List of Tables
791
792
792
792
793
793
793
794
794
794
795
795
795
796
SPRUHY8I – January 2016 – Revised March 2019
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6-322. PRU_ICSS_DBG_CT_REG17 Register Field Descriptions ......................................................... 796
6-323. Register Call Summary for PRU_ICSS_DBG_CT_REG17
.........................................................
796
6-324. PRU_ICSS_DBG_CT_REG18 Instances .............................................................................. 797
6-325. PRU_ICSS_DBG_CT_REG18 Register Field Descriptions ......................................................... 797
6-326. Register Call Summary for PRU_ICSS_DBG_CT_REG18
.........................................................
797
6-327. PRU_ICSS_DBG_CT_REG19 Instances .............................................................................. 798
6-328. PRU_ICSS_DBG_CT_REG19 Register Field Descriptions ......................................................... 798
6-329. Register Call Summary for PRU_ICSS_DBG_CT_REG19
.........................................................
798
6-330. PRU_ICSS_DBG_CT_REG20 Instances .............................................................................. 799
6-331. PRU_ICSS_DBG_CT_REG20 Register Field Descriptions ......................................................... 799
.........................................................
PRU_ICSS_DBG_CT_REG21 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG21 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG21 .........................................................
PRU_ICSS_DBG_CT_REG22 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG22 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG22 .........................................................
PRU_ICSS_DBG_CT_REG23 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG23 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG23 .........................................................
PRU_ICSS_DBG_CT_REG24 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG24 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG24 .........................................................
PRU_ICSS_DBG_CT_REG25 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG25 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG25 .........................................................
PRU_ICSS_DBG_CT_REG26 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG26 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG26 .........................................................
PRU_ICSS_DBG_CT_REG27 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG27 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG27 .........................................................
PRU_ICSS_DBG_CT_REG28 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG28 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG28 .........................................................
PRU_ICSS_DBG_CT_REG29 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG29 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG29 .........................................................
PRU_ICSS_DBG_CT_REG30 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG30 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG30 .........................................................
PRU_ICSS_DBG_CT_REG31 Instances ..............................................................................
PRU_ICSS_DBG_CT_REG31 Register Field Descriptions .........................................................
Register Call Summary for PRU_ICSS_DBG_CT_REG31 .........................................................
PRU-ICSS_0/ PRU-ICSS_1 Internal Interrupts .......................................................................
PRU-ICSS_0 MII_RT Mode Interrupts .................................................................................
PRU-ICSS_1 MII_RT Mode Interrupts .................................................................................
PRU-ICSS_0 System Events............................................................................................
PRU-ICSS_1 System Events............................................................................................
6-332. Register Call Summary for PRU_ICSS_DBG_CT_REG20
6-333.
6-334.
6-335.
6-336.
6-337.
6-338.
6-339.
6-340.
6-341.
6-342.
6-343.
6-344.
6-345.
6-346.
6-347.
6-348.
6-349.
6-350.
6-351.
6-352.
6-353.
6-354.
6-355.
6-356.
6-357.
6-358.
6-359.
6-360.
6-361.
6-362.
6-363.
6-364.
6-365.
6-366.
6-367.
6-368.
6-369.
6-370.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
799
800
800
800
801
801
801
802
802
802
803
803
803
804
804
804
805
805
805
806
806
806
807
807
807
808
808
808
809
809
809
810
810
810
816
817
818
819
820
83
www.ti.com
6-371. PRU-ICSS_INTC Instances ............................................................................................. 822
6-372. PRU-ICSS_INTC Registers
.............................................................................................
822
6-373. PRUSS_INTC_REVID Instances ....................................................................................... 825
6-374. PRUSS_INTC_REVID Register Field Descriptions .................................................................. 825
6-375. Register Call Summary for PRUSS_INTC_REVID ................................................................... 825
826
6-377.
826
6-378.
6-379.
6-380.
6-381.
6-382.
6-383.
6-384.
6-385.
6-386.
6-387.
6-388.
6-389.
6-390.
6-391.
6-392.
6-393.
6-394.
6-395.
6-396.
6-397.
6-398.
6-399.
6-400.
6-401.
6-402.
6-403.
6-404.
6-405.
6-406.
6-407.
6-408.
6-409.
6-410.
6-411.
6-412.
6-413.
6-414.
6-415.
6-416.
6-417.
6-418.
6-419.
84
...........................................................................................
PRUSS_INTC_CR Register Field Descriptions .......................................................................
Register Call Summary for PRUSS_INTC_CR .......................................................................
PRUSS_INTC_GER Instances .........................................................................................
PRUSS_INTC_GER Register Field Descriptions .....................................................................
Register Call Summary for PRUSS_INTC_GER .....................................................................
PRUSS_INTC_GNLR Instances ........................................................................................
PRUSS_INTC_GNLR Register Field Descriptions ...................................................................
Register Call Summary for PRUSS_INTC_GNLR....................................................................
PRUSS_INTC_SISR Instances .........................................................................................
PRUSS_INTC_SISR Register Field Descriptions ....................................................................
Register Call Summary for PRUSS_INTC_SISR .....................................................................
PRUSS_INTC_SICR Instances .........................................................................................
PRUSS_INTC_SICR Register Field Descriptions ....................................................................
Register Call Summary for PRUSS_INTC_SICR .....................................................................
PRUSS_INTC_EISR Instances .........................................................................................
PRUSS_INTC_EISR Register Field Descriptions ....................................................................
Register Call Summary for PRUSS_INTC_EISR .....................................................................
PRUSS_INTC_EICR Instances .........................................................................................
PRUSS_INTC_EICR Register Field Descriptions ....................................................................
Register Call Summary for PRUSS_INTC_EICR .....................................................................
PRUSS_INTC_HIEISR Instances ......................................................................................
PRUSS_INTC_HIEISR Register Field Descriptions..................................................................
Register Call Summary for PRUSS_INTC_HIEISR ..................................................................
PRUSS_INTC_HIDISR Instances ......................................................................................
PRUSS_INTC_HIDISR Register Field Descriptions .................................................................
Register Call Summary for PRUSS_INTC_HIDISR ..................................................................
PRUSS_INTC_GPIR Instances .........................................................................................
PRUSS_INTC_GPIR Register Field Descriptions ....................................................................
Register Call Summary for PRUSS_INTC_GPIR ....................................................................
PRUSS_INTC_SRSR0 Instances ......................................................................................
PRUSS_INTC_SRSR0 Register Field Descriptions..................................................................
Register Call Summary for PRUSS_INTC_SRSR0 ..................................................................
PRUSS_INTC_SRSR1 Instances ......................................................................................
PRUSS_INTC_SRSR1 Register Field Descriptions..................................................................
Register Call Summary for PRUSS_INTC_SRSR1 ..................................................................
PRUSS_INTC_SECR0 Instances ......................................................................................
PRUSS_INTC_SECR0 Register Field Descriptions..................................................................
Register Call Summary for PRUSS_INTC_SECR0 ..................................................................
PRUSS_INTC_SECR1 Instances ......................................................................................
PRUSS_INTC_SECR1 Register Field Descriptions..................................................................
Register Call Summary for PRUSS_INTC_SECR1 ..................................................................
PRUSS_INTC_ESR0 Instances ........................................................................................
PRUSS_INTC_ESR0 Register Field Descriptions ...................................................................
6-376. PRUSS_INTC_CR Instances
List of Tables
826
827
827
827
828
828
828
829
829
829
830
830
830
831
831
831
832
832
832
833
833
833
834
834
834
835
835
835
836
836
836
837
837
837
838
838
838
839
839
839
840
840
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
6-420. Register Call Summary for PRUSS_INTC_ESR0 .................................................................... 840
6-421. PRUSS_INTC_ERS1 Instances ........................................................................................ 841
6-422. PRUSS_INTC_ERS1 Register Field Descriptions
...................................................................
841
6-423. Register Call Summary for PRUSS_INTC_ERS1 .................................................................... 841
6-424. PRUSS_INTC_ECR0 Instances ........................................................................................ 842
6-425. PRUSS_INTC_ECR0 Register Field Descriptions ................................................................... 842
6-426. Register Call Summary for PRUSS_INTC_ECR0 .................................................................... 842
6-427. PRUSS_INTC_ECR1 Instances ........................................................................................ 843
6-428. PRUSS_INTC_ECR1 Register Field Descriptions ................................................................... 843
6-429. Register Call Summary for PRUSS_INTC_ECR1 .................................................................... 843
6-430. PRUSS_INTC_CMR_0 Instances ...................................................................................... 844
6-431. PRUSS_INTC_CMR_0 Register Field Descriptions
.................................................................
844
6-432. Register Call Summary for PRUSS_INTC_CMR_0 .................................................................. 844
6-433. PRUSS_INTC_CMR_1 Instances ...................................................................................... 845
6-434. PRUSS_INTC_CMR_1 Register Field Descriptions
.................................................................
845
6-435. Register Call Summary for PRUSS_INTC_CMR_1 .................................................................. 845
6-436. PRUSS_INTC_CMR_2 Instances ...................................................................................... 846
6-437. PRUSS_INTC_CMR_2 Register Field Descriptions
.................................................................
846
6-438. Register Call Summary for PRUSS_INTC_CMR_2 .................................................................. 846
6-439. PRUSS_INTC_CMR_3 Instances ...................................................................................... 847
.................................................................
Register Call Summary for PRUSS_INTC_CMR_3 ..................................................................
PRUSS_INTC_CMR_4 Instances ......................................................................................
PRUSS_INTC_CMR_4 Register Field Descriptions .................................................................
Register Call Summary for PRUSS_INTC_CMR_4 ..................................................................
PRUSS_INTC_CMR_5 Instances ......................................................................................
PRUSS_INTC_CMR_5 Register Field Descriptions .................................................................
Register Call Summary for PRUSS_INTC_CMR_5 ..................................................................
PRUSS_INTC_CMR_6 Instances ......................................................................................
PRUSS_INTC_CMR_6 Register Field Descriptions .................................................................
Register Call Summary for PRUSS_INTC_CMR_6 ..................................................................
PRUSS_INTC_CMR_7 Instances ......................................................................................
PRUSS_INTC_CMR_7 Register Field Descriptions .................................................................
Register Call Summary for PRUSS_INTC_CMR_7 ..................................................................
PRUSS_INTC_CMR_8 Instances ......................................................................................
PRUSS_INTC_CMR_8 Register Field Descriptions .................................................................
Register Call Summary for PRUSS_INTC_CMR_8 ..................................................................
PRUSS_INTC_CMR_9 Instances ......................................................................................
PRUSS_INTC_CMR_9 Register Field Descriptions .................................................................
Register Call Summary for PRUSS_INTC_CMR_9 ..................................................................
PRUSS_INTC_CMR_10 Instances .....................................................................................
PRUSS_INTC_CMR_10 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_CMR_10 ................................................................
PRUSS_INTC_CMR_11 Instances .....................................................................................
PRUSS_INTC_CMR_11 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_CMR_11 ................................................................
PRUSS_INTC_CMR_12 Instances .....................................................................................
PRUSS_INTC_CMR_12 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_CMR_12 ................................................................
6-440. PRUSS_INTC_CMR_3 Register Field Descriptions
6-441.
6-442.
6-443.
6-444.
6-445.
6-446.
6-447.
6-448.
6-449.
6-450.
6-451.
6-452.
6-453.
6-454.
6-455.
6-456.
6-457.
6-458.
6-459.
6-460.
6-461.
6-462.
6-463.
6-464.
6-465.
6-466.
6-467.
6-468.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
847
847
848
848
848
849
849
849
850
850
850
851
851
851
852
852
852
853
853
853
854
854
854
855
855
855
856
856
856
85
www.ti.com
6-469. PRUSS_INTC_CMR_13 Instances ..................................................................................... 857
6-470. PRUSS_INTC_CMR_13 Register Field Descriptions ................................................................ 857
6-471. Register Call Summary for PRUSS_INTC_CMR_13
................................................................
857
6-472. PRUSS_INTC_CMR_14 Instances ..................................................................................... 858
6-473. PRUSS_INTC_CMR_14 Register Field Descriptions ................................................................ 858
858
6-475.
859
6-476.
6-477.
6-478.
6-479.
6-480.
6-481.
6-482.
6-483.
6-484.
6-485.
6-486.
6-487.
6-488.
6-489.
6-490.
6-491.
6-492.
6-493.
6-494.
6-495.
6-496.
6-497.
6-498.
6-499.
6-500.
6-501.
6-502.
6-503.
6-504.
6-505.
6-506.
6-507.
6-508.
6-509.
6-510.
6-511.
6-512.
6-513.
6-514.
6-515.
6-516.
6-517.
86
................................................................
PRUSS_INTC_CMR_15 Instances .....................................................................................
PRUSS_INTC_CMR_15 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_CMR_15 ................................................................
PRUSS_INTC_HMR0 Instances ........................................................................................
PRUSS_INTC_HMR0 Register Field Descriptions ...................................................................
Register Call Summary for PRUSS_INTC_HMR0 ...................................................................
PRUSS_INTC_HMR1 Instances ........................................................................................
PRUSS_INTC_HMR1 Register Field Descriptions ...................................................................
Register Call Summary for PRUSS_INTC_HMR1 ...................................................................
PRUSS_INTC_HMR2 Instances ........................................................................................
PRUSS_INTC_HMR2 Register Field Descriptions ...................................................................
Register Call Summary for PRUSS_INTC_HMR2 ...................................................................
PRUSS_INTC_HIPIR_0 Instances .....................................................................................
PRUSS_INTC_HIPIR_0 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_HIPIR_0 .................................................................
PRUSS_INTC_HIPIR_1 Instances .....................................................................................
PRUSS_INTC_HIPIR_1 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_HIPIR_1 .................................................................
PRUSS_INTC_HIPIR_2 Instances .....................................................................................
PRUSS_INTC_HIPIR_2 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_HIPIR_2 .................................................................
PRUSS_INTC_HIPIR_3 Instances .....................................................................................
PRUSS_INTC_HIPIR_3 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_HIPIR_3 .................................................................
PRUSS_INTC_HIPIR_4 Instances .....................................................................................
PRUSS_INTC_HIPIR_4 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_HIPIR_4 .................................................................
PRUSS_INTC_HIPIR_5 Instances .....................................................................................
PRUSS_INTC_HIPIR_5 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_HIPIR_5 .................................................................
PRUSS_INTC_HIPIR_6 Instances .....................................................................................
PRUSS_INTC_HIPIR_6 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_HIPIR_6 .................................................................
PRUSS_INTC_HIPIR_7 Instances .....................................................................................
PRUSS_INTC_HIPIR_7 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_HIPIR_7 .................................................................
PRUSS_INTC_HIPIR_8 Instances .....................................................................................
PRUSS_INTC_HIPIR_8 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_HIPIR_8 .................................................................
PRUSS_INTC_HIPIR_9 Instances .....................................................................................
PRUSS_INTC_HIPIR_9 Register Field Descriptions ................................................................
Register Call Summary for PRUSS_INTC_HIPIR_9 .................................................................
PRUSS_INTC_SIPR0 Instances........................................................................................
6-474. Register Call Summary for PRUSS_INTC_CMR_14
List of Tables
859
859
860
860
860
861
861
861
862
862
862
863
863
863
864
864
864
865
865
865
866
866
866
867
867
867
868
868
868
869
869
869
870
870
870
871
871
871
872
872
872
873
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
6-518. PRUSS_INTC_SIPR0 Register Field Descriptions ................................................................... 873
6-519. Register Call Summary for PRUSS_INTC_SIPR0 ................................................................... 873
6-520. PRUSS_INTC_SIPR1 Instances........................................................................................ 874
6-521. PRUSS_INTC_SIPR1 Register Field Descriptions ................................................................... 874
6-522. Register Call Summary for PRUSS_INTC_SIPR1 ................................................................... 874
6-523. PRUSS_INTC_SITR0 Instances ........................................................................................ 875
6-524. PRUSS_INTC_SITR0 Register Field Descriptions ................................................................... 875
6-525. Register Call Summary for PRUSS_INTC_SITR0
...................................................................
875
6-526. PRUSS_INTC_SITR1 Instances ........................................................................................ 876
6-527. PRUSS_INTC_SITR1 Register Field Descriptions ................................................................... 876
...................................................................
PRUSS_INTC_HINLR_0 Instances ....................................................................................
PRUSS_INTC_HINLR_0 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_INTC_HINLR_0 ................................................................
PRUSS_INTC_HINLR_1 Instances ....................................................................................
PRUSS_INTC_HINLR_1 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_INTC_HINLR_1 ................................................................
PRUSS_INTC_HINLR_2 Instances ....................................................................................
PRUSS_INTC_HINLR_2 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_INTC_HINLR_2 ................................................................
PRUSS_INTC_HINLR_3 Instances ....................................................................................
PRUSS_INTC_HINLR_3 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_INTC_HINLR_3 ................................................................
PRUSS_INTC_HINLR_4 Instances ....................................................................................
PRUSS_INTC_HINLR_4 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_INTC_HINLR_4 ................................................................
PRUSS_INTC_HINLR_5 Instances ....................................................................................
PRUSS_INTC_HINLR_5 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_INTC_HINLR_5 ................................................................
PRUSS_INTC_HINLR_6 Instances ....................................................................................
PRUSS_INTC_HINLR_6 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_INTC_HINLR_6 ................................................................
PRUSS_INTC_HINLR_7 Instances ....................................................................................
PRUSS_INTC_HINLR_7 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_INTC_HINLR_7 ................................................................
PRUSS_INTC_HINLR_8 Instances ....................................................................................
PRUSS_INTC_HINLR_8 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_INTC_HINLR_8 ................................................................
PRUSS_INTC_HINLR_9 Instances ....................................................................................
PRUSS_INTC_HINLR_9 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_INTC_HINLR_9 ................................................................
PRUSS_INTC_HIER Instances .........................................................................................
PRUSS_INTC_HIER Register Field Descriptions ....................................................................
Register Call Summary for PRUSS_INTC_HIER .....................................................................
PRUSS_UART0 Signal Descriptions ...................................................................................
Relationship Between ST, EPS, and PEN Bits in UART_LCR ....................................................
Number of STOP Bits Generated ......................................................................................
Baud Rate Examples for 192-MHZ PRU-ICSS UART Input Clock and 16× Over-sampling Mode ............
Baud Rate Examples for 192-MHZ PRU-ICSS UART Input Clock and 13× Over-sampling Mode ............
6-528. Register Call Summary for PRUSS_INTC_SITR1
6-529.
6-530.
6-531.
6-532.
6-533.
6-534.
6-535.
6-536.
6-537.
6-538.
6-539.
6-540.
6-541.
6-542.
6-543.
6-544.
6-545.
6-546.
6-547.
6-548.
6-549.
6-550.
6-551.
6-552.
6-553.
6-554.
6-555.
6-556.
6-557.
6-558.
6-559.
6-560.
6-561.
6-562.
6-563.
6-564.
6-565.
6-566.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
876
877
877
877
878
878
878
879
879
879
880
880
880
881
881
881
882
882
882
883
883
883
884
884
884
885
885
885
886
886
886
887
887
887
888
890
890
892
892
87
www.ti.com
6-567. PRU-ICSS UART Interrupt Requests Descriptions................................................................... 895
6-568. Interrupt Identification and Interrupt Clearing Information ........................................................... 897
6-569. Character Time for Word Lengths ...................................................................................... 899
6-570. PRU-ICSS_UART Instances ............................................................................................ 903
............................................................................................
................................................................
PRUSS_UART_RBR_THR_REGISTERS Register Field Descriptions ............................................
Register Call Summary for PRUSS_UART_RBR_THR_REGISTERS ............................................
PRUSS_UART_INTERRUPT_ENABLE_REGISTER Instances ...................................................
PRUSS_UART_INTERRUPT_ENABLE_REGISTER Register Field Descriptions ...............................
Register Call Summary for PRUSS_UART_INTERRUPT_ENABLE_REGISTER ...............................
PRUSS_UART_INTERRUPT_IDENTIFICATION_REGISTER_FIFO_CONTROL_REGISTER Instances ...
6-571. PRU-ICSS_UART Registers
903
6-572. PRUSS_UART_RBR_THR_REGISTERS Instances
904
6-573.
904
6-574.
6-575.
6-576.
6-577.
6-578.
904
905
905
906
907
6-579. PRUSS_UART_INTERRUPT_IDENTIFICATION_REGISTER_FIFO_CONTROL_REGISTER Register
Field Descriptions ......................................................................................................... 907
6-580. Register Call Summary for
PRUSS_UART_INTERRUPT_IDENTIFICATION_REGISTER_FIFO_CONTROL_REGISTER ............... 909
6-581. PRUSS_UART_LINE_CONTROL_REGISTER Instances .......................................................... 910
910
6-583.
911
6-584.
6-585.
6-586.
6-587.
6-588.
6-589.
6-590.
6-591.
6-592.
6-593.
6-594.
6-595.
6-596.
6-597.
6-598.
6-599.
6-600.
6-601.
6-602.
6-603.
6-604.
6-605.
6-606.
6-607.
6-608.
6-609.
6-610.
6-611.
6-612.
6-613.
88
.....................................
Register Call Summary for PRUSS_UART_LINE_CONTROL_REGISTER ......................................
PRUSS_UART_MODEM_CONTROL_REGISTER Instances ......................................................
PRUSS_UART_MODEM_CONTROL_REGISTER Register Field Descriptions .................................
Register Call Summary for PRUSS_UART_MODEM_CONTROL_REGISTER ..................................
PRUSS_UART_LINE_STATUS_REGISTER Instances .............................................................
PRUSS_UART_LINE_STATUS_REGISTER Register Field Descriptions ........................................
Register Call Summary for PRUSS_UART_LINE_STATUS_REGISTER.........................................
PRUSS_UART_MODEM_STATUS_REGISTER Instances ........................................................
PRUSS_UART_MODEM_STATUS_REGISTER Register Field Descriptions ....................................
Register Call Summary for PRUSS_UART_MODEM_STATUS_REGISTER ....................................
PRUSS_UART_SCRATCH_REGISTER Instances ..................................................................
PRUSS_UART_SCRATCH_REGISTER Register Field Descriptions .............................................
Register Call Summary for PRUSS_UART_SCRATCH_REGISTER ..............................................
PRUSS_UART_DIVISOR_REGISTER_LSB_ Instances ............................................................
PRUSS_UART_DIVISOR_REGISTER_LSB_ Register Field Descriptions .......................................
Register Call Summary for PRUSS_UART_DIVISOR_REGISTER_LSB_........................................
PRUSS_UART_DIVISOR_REGISTER_MSB_ Instances ...........................................................
PRUSS_UART_DIVISOR_REGISTER_MSB_ Register Field Descriptions ......................................
Register Call Summary for PRUSS_UART_DIVISOR_REGISTER_MSB_ .......................................
PRUSS_UART_PERIPHERAL_ID_REGISTER Instances ..........................................................
PRUSS_UART_PERIPHERAL_ID_REGISTER Register Field Descriptions .....................................
Register Call Summary for PRUSS_UART_PERIPHERAL_ID_REGISTER .....................................
PRUSS_UART_POWERMANAGEMENT_AND_EMULATION_REGISTER Instances .........................
PRUSS_UART_POWERMANAGEMENT_AND_EMULATION_REGISTER Register Field Descriptions ....
Register Call Summary for PRUSS_UART_POWERMANAGEMENT_AND_EMULATION_REGISTER .....
PRUSS_UART_MODE_DEFINITION_REGISTER Instances ......................................................
PRUSS_UART_MODE_DEFINITION_REGISTER Register Field Descriptions .................................
Register Call Summary for PRUSS_UART_MODE_DEFINITION_REGISTER ..................................
PRU-ICSS_ECAP Instances ............................................................................................
PRU-ICSS_ECAP Registers ............................................................................................
PRUSS_ECAP_TSCNT Instances .....................................................................................
6-582. PRUSS_UART_LINE_CONTROL_REGISTER Register Field Descriptions
List of Tables
912
912
913
914
914
917
918
918
919
920
920
920
921
921
921
922
922
922
923
923
923
924
924
925
926
926
926
928
928
929
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
................................................................
Register Call Summary for PRUSS_ECAP_TSCNT .................................................................
PRUSS_ECAP_CNTPHS Instances ...................................................................................
PRUSS_ECAP_CNTPHS Register Field Descriptions ..............................................................
Register Call Summary for PRUSS_ECAP_CNTPHS ...............................................................
PRUSS_ECAP_CAP1 Instances .......................................................................................
PRUSS_ECAP_CAP1 Register Field Descriptions ..................................................................
Register Call Summary for PRUSS_ECAP_CAP1 ...................................................................
PRUSS_ECAP_CAP2 Instances .......................................................................................
PRUSS_ECAP_CAP2 Register Field Descriptions ..................................................................
Register Call Summary for PRUSS_ECAP_CAP2 ...................................................................
PRUSS_ECAP_CAP3 Instances .......................................................................................
PRUSS_ECAP_CAP3 Register Field Descriptions ..................................................................
Register Call Summary for PRUSS_ECAP_CAP3 ...................................................................
PRUSS_ECAP_CAP4 Instances .......................................................................................
PRUSS_ECAP_CAP4 Register Field Descriptions ..................................................................
Register Call Summary for PRUSS_ECAP_CAP4 ...................................................................
PRUSS_ECAP_ECCTL1 Instances ....................................................................................
PRUSS_ECAP_ECCTL1 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_ECAP_ECCTL1 ................................................................
PRUSS_ECAP_ECCTL2 Instances ....................................................................................
PRUSS_ECAP_ECCTL2 Register Field Descriptions ...............................................................
Register Call Summary for PRUSS_ECAP_ECCTL2 ................................................................
PRUSS_ECAP_ECEINT Instances ....................................................................................
PRUSS_ECAP_ECEINT Register Field Descriptions................................................................
Register Call Summary for PRUSS_ECAP_ECEINT ................................................................
PRUSS_ECAP_ECFLG Instances .....................................................................................
PRUSS_ECAP_ECFLG Register Field Descriptions ................................................................
Register Call Summary for PRUSS_ECAP_ECFLG .................................................................
PRUSS_ECAP_ECCLR Instances .....................................................................................
PRUSS_ECAP_ECCLR Register Field Descriptions ................................................................
Register Call Summary for PRUSS_ECAP_ECCLR .................................................................
PRUSS_ECAP_ECFRC Instances .....................................................................................
PRUSS_ECAP_ECFRC Register Field Descriptions ................................................................
Register Call Summary for PRUSS_ECAP_ECFRC .................................................................
PRUSS_ECAP_PID Instances ..........................................................................................
PRUSS_ECAP_PID Register Field Descriptions .....................................................................
Register Call Summary for PRUSS_ECAP_PID......................................................................
Data Path Configuration Comparison ..................................................................................
Frame Structure ...........................................................................................................
TX CRC Programming Models ..........................................................................................
PRU R31: Receive Interface Data and Status (Read Mode) .......................................................
RX L2 Status ..............................................................................................................
RX L2 XFR ID .............................................................................................................
TX Push ....................................................................................................................
PRU R31: Command Interface (Write Mode) .........................................................................
RX Nibble and Byte Order ...............................................................................................
TX Nibble and Byte Order ...............................................................................................
Preamble Configuration Options ........................................................................................
6-614. PRUSS_ECAP_TSCNT Register Field Descriptions
6-615.
6-616.
6-617.
6-618.
6-619.
6-620.
6-621.
6-622.
6-623.
6-624.
6-625.
6-626.
6-627.
6-628.
6-629.
6-630.
6-631.
6-632.
6-633.
6-634.
6-635.
6-636.
6-637.
6-638.
6-639.
6-640.
6-641.
6-642.
6-643.
6-644.
6-645.
6-646.
6-647.
6-648.
6-649.
6-650.
6-651.
6-652.
6-653.
6-654.
6-655.
6-656.
6-657.
6-658.
6-659.
6-660.
6-661.
6-662.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
929
929
930
930
930
931
931
931
932
932
932
933
933
933
934
934
934
935
935
936
937
937
939
940
940
941
942
942
943
944
944
945
946
946
947
948
948
948
950
952
953
958
960
961
962
963
965
965
965
89
www.ti.com
6-663. PRU-ICSS MII RT Instances ............................................................................................ 968
6-664. PRU-ICSS MII RT Registers ............................................................................................ 968
6-665. PRUSS_MII_RT_RXCFG0 Instances .................................................................................. 969
6-666. PRUSS_MII_RT_RXCFG0 Register Field Descriptions ............................................................. 969
6-667. Register Call Summary for PRUSS_MII_RT_RXCFG0.............................................................. 970
6-668. PRUSS_MII_RT_RXCFG1 Instances .................................................................................. 971
6-669. PRUSS_MII_RT_RXCFG1 Register Field Descriptions ............................................................. 971
6-670. Register Call Summary for PRUSS_MII_RT_RXCFG1.............................................................. 972
6-671. PRUSS_MII_RT_TXCFG0 Instances .................................................................................. 973
6-672. PRUSS_MII_RT_TXCFG0 Register Field Descriptions ............................................................. 973
6-673. Register Call Summary for PRUSS_MII_RT_TXCFG0 .............................................................. 976
6-674. PRUSS_MII_RT_TXCFG1 Instances .................................................................................. 977
6-675. PRUSS_MII_RT_TXCFG1 Register Field Descriptions ............................................................. 977
6-676. Register Call Summary for PRUSS_MII_RT_TXCFG1 .............................................................. 980
6-677. PRUSS_MII_RT_TX_CRC0 Instances
................................................................................
981
6-678. PRUSS_MII_RT_TX_CRC0 Register Field Descriptions ............................................................ 981
6-679. Register Call Summary for PRUSS_MII_RT_TX_CRC0 ............................................................ 981
6-680. PRUSS_MII_RT_TX_CRC1 Instances
................................................................................
982
6-681. PRUSS_MII_RT_TX_CRC1 Register Field Descriptions ............................................................ 982
6-682. Register Call Summary for PRUSS_MII_RT_TX_CRC1 ............................................................ 982
6-683. PRUSS_MII_RT_TX_IPG0 Instances .................................................................................. 983
6-684. PRUSS_MII_RT_TX_IPG0 Register Field Descriptions ............................................................. 983
6-685. Register Call Summary for PRUSS_MII_RT_TX_IPG0
.............................................................
983
6-686. PRUSS_MII_RT_TX_IPG1 Instances .................................................................................. 984
6-687. PRUSS_MII_RT_TX_IPG1 Register Field Descriptions ............................................................. 984
984
6-689.
985
6-690.
6-691.
6-692.
6-693.
6-694.
6-695.
6-696.
6-697.
6-698.
6-699.
6-700.
6-701.
6-702.
6-703.
6-704.
6-705.
6-706.
6-707.
6-708.
6-709.
6-710.
6-711.
90
.............................................................
PRUSS_MII_RT_PRS0 Instances ......................................................................................
PRUSS_MII_RT_PRS0 Register Field Descriptions .................................................................
Register Call Summary for PRUSS_MII_RT_PRS0 .................................................................
PRUSS_MII_RT_PRS1 Instances ......................................................................................
PRUSS_MII_RT_PRS1 Register Field Descriptions .................................................................
Register Call Summary for PRUSS_MII_RT_PRS1 .................................................................
PRUSS_MII_RT_RX_FRMS0 Instances ..............................................................................
PRUSS_MII_RT_RX_FRMS0 Register Field Descriptions..........................................................
Register Call Summary for PRUSS_MII_RT_RX_FRMS0 ..........................................................
PRUSS_MII_RT_RX_FRMS1 Instances ..............................................................................
PRUSS_MII_RT_RX_FRMS1 Register Field Descriptions..........................................................
Register Call Summary for PRUSS_MII_RT_RX_FRMS1 ..........................................................
PRUSS_MII_RT_RX_PCNT0 Instances ...............................................................................
PRUSS_MII_RT_RX_PCNT0 Register Field Descriptions ..........................................................
Register Call Summary for PRUSS_MII_RT_RX_PCNT0 ..........................................................
PRUSS_MII_RT_RX_PCNT1 Instances ...............................................................................
PRUSS_MII_RT_RX_PCNT1 Register Field Descriptions ..........................................................
Register Call Summary for PRUSS_MII_RT_RX_PCNT1 ..........................................................
PRUSS_MII_RT_RX_ERR0 Instances ................................................................................
PRUSS_MII_RT_RX_ERR0 Register Field Descriptions............................................................
Register Call Summary for PRUSS_MII_RT_RX_ERR0 ............................................................
PRUSS_MII_RT_RX_ERR1 Instances ................................................................................
PRUSS_MII_RT_RX_ERR1 Register Field Descriptions............................................................
6-688. Register Call Summary for PRUSS_MII_RT_TX_IPG1
List of Tables
985
985
986
986
986
987
987
987
988
988
988
989
989
989
990
990
990
991
991
992
993
993
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
6-712. Register Call Summary for PRUSS_MII_RT_RX_ERR1 ............................................................ 994
6-713. PRUSS_MII_RT_RXFLV0 Instances................................................................................... 995
6-714. PRUSS_MII_RT_RXFLV0 Register Field Descriptions .............................................................. 995
.............................................................. 995
PRUSS_MII_RT_RXFLV1 Instances................................................................................... 996
PRUSS_MII_RT_RXFLV1 Register Field Descriptions .............................................................. 996
Register Call Summary for PRUSS_MII_RT_RXFLV1 .............................................................. 996
PRUSS_MII_RT_TXFLV0 Instances ................................................................................... 997
PRUSS_MII_RT_TXFLV0 Register Field Descriptions .............................................................. 997
Register Call Summary for PRUSS_MII_RT_TXFLV0 ............................................................... 997
PRUSS_MII_RT_TXFLV1 Instances ................................................................................... 998
PRUSS_MII_RT_TXFLV1 Register Field Descriptions .............................................................. 998
Register Call Summary for PRUSS_MII_RT_TXFLV1 ............................................................... 998
MII MDIO Frame Formats ............................................................................................... 999
PRU-ICSS MII MDIO Control and Interface Signals ................................................................ 1000
Summary of the PRU-ICSS MII MDIO Functional Registers ...................................................... 1002
PRU-ICSS MII MDIO Instances ....................................................................................... 1004
PRU-ICSS MII MDIO Registers ....................................................................................... 1004
PRUSS_MII_MDIO_VER Instances .................................................................................. 1005
PRUSS_MII_MDIO_VER Register Field Descriptions ............................................................. 1005
Register Call Summary for PRUSS_MII_MDIO_VER .............................................................. 1005
PRUSS_MII_MDIO_CONTROL Instances ........................................................................... 1006
PRUSS_MII_MDIO_CONTROL Register Field Descriptions ...................................................... 1006
Register Call Summary for PRUSS_MII_MDIO_CONTROL ...................................................... 1007
PRUSS_MII_MDIO_ALIVE Instances ................................................................................ 1008
PRUSS_MII_MDIO_ALIVE Register Field Descriptions ........................................................... 1008
Register Call Summary for PRUSS_MII_MDIO_ALIVE ............................................................ 1008
PRUSS_MII_MDIO_LINK Instances .................................................................................. 1009
PRUSS_MII_MDIO_LINK Register Field Descriptions ............................................................. 1009
Register Call Summary for PRUSS_MII_MDIO_LINK.............................................................. 1009
PRUSS_MII_MDIO_LINKINTRAW Instances ....................................................................... 1010
PRUSS_MII_MDIO_LINKINTRAW Register Field Descriptions .................................................. 1010
Register Call Summary for PRUSS_MII_MDIO_LINKINTRAW ................................................... 1010
PRUSS_MII_MDIO_LINKINTMASKED Instances .................................................................. 1011
PRUSS_MII_MDIO_LINKINTMASKED Register Field Descriptions ............................................. 1011
Register Call Summary for PRUSS_MII_MDIO_LINKINTMASKED .............................................. 1011
PRUSS_MII_MDIO_USERINTRAW Instances ...................................................................... 1012
PRUSS_MII_MDIO_USERINTRAW Register Field Descriptions ................................................. 1012
Register Call Summary for PRUSS_MII_MDIO_USERINTRAW ................................................. 1012
PRUSS_MII_MDIO_USERINTMASKED Instances................................................................. 1013
PRUSS_MII_MDIO_USERINTMASKED Register Field Descriptions ............................................ 1013
Register Call Summary for PRUSS_MII_MDIO_USERINTMASKED ............................................ 1013
PRUSS_MII_MDIO_USERINTMASKSET Instances ............................................................... 1014
PRUSS_MII_MDIO_USERINTMASKSET Register Field Descriptions .......................................... 1014
Register Call Summary for PRUSS_MII_MDIO_USERINTMASKSET ........................................... 1014
PRUSS_MII_MDIO_USERINTMASKCLR Instances ............................................................... 1015
PRUSS_MII_MDIO_USERINTMASKCLR Register Field Descriptions .......................................... 1015
Register Call Summary for PRUSS_MII_MDIO_USERINTMASKCLR ........................................... 1015
PRUSS_MII_MDIO_USERACCESS0 Instances .................................................................... 1016
6-715. Register Call Summary for PRUSS_MII_RT_RXFLV0
6-716.
6-717.
6-718.
6-719.
6-720.
6-721.
6-722.
6-723.
6-724.
6-725.
6-726.
6-727.
6-728.
6-729.
6-730.
6-731.
6-732.
6-733.
6-734.
6-735.
6-736.
6-737.
6-738.
6-739.
6-740.
6-741.
6-742.
6-743.
6-744.
6-745.
6-746.
6-747.
6-748.
6-749.
6-750.
6-751.
6-752.
6-753.
6-754.
6-755.
6-756.
6-757.
6-758.
6-759.
6-760.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
91
www.ti.com
6-761. PRUSS_MII_MDIO_USERACCESS0 Register Field Descriptions ............................................... 1016
6-762. Register Call Summary for PRUSS_MII_MDIO_USERACCESS0
...............................................
1017
6-763. PRUSS_MII_MDIO_USERPHYSEL0 Instances .................................................................... 1018
...............................................
Register Call Summary for PRUSS_MII_MDIO_USERPHYSEL0 ................................................
PRUSS_MII_MDIO_USERACCESS1 Instances ....................................................................
PRUSS_MII_MDIO_USERACCESS1 Register Field Descriptions ...............................................
Register Call Summary for PRUSS_MII_MDIO_USERACCESS1 ...............................................
PRUSS_MII_MDIO_USERPHYSEL1 Instances ....................................................................
PRUSS_MII_MDIO_USERPHYSEL1 Register Field Descriptions ...............................................
Register Call Summary for PRUSS_MII_MDIO_USERPHYSEL1 ................................................
Industrial Ethernet Timer Mode Mapping ............................................................................
PRU-ICSS_IEP Instances ..............................................................................................
PRU-ICSS_IEP Registers ..............................................................................................
PRUSS_IEP_GLOBAL_CFG Instances ..............................................................................
PRUSS_IEP_GLOBAL_CFG Register Field Descriptions .........................................................
Register Call Summary for PRUSS_IEP_GLOBAL_CFG..........................................................
PRUSS_IEP_STATUS Instances .....................................................................................
PRUSS_IEP_STATUS Register Field Descriptions ................................................................
Register Call Summary for PRUSS_IEP_STATUS .................................................................
PRUSS_IEP_COMPENSATION Instances ..........................................................................
PRUSS_IEP_COMPENSATION Register Field Descriptions .....................................................
Register Call Summary for PRUSS_IEP_COMPENSATION ......................................................
PRUSS_IEP_SLOW_COMPENSATION Instances ................................................................
PRUSS_IEP_SLOW_COMPENSATION Register Field Descriptions ............................................
Register Call Summary for PRUSS_IEP_SLOW_COMPENSATION ............................................
PRUSS_IEP_LOW_COUNTER Instances ...........................................................................
PRUSS_IEP_LOW_COUNTER Register Field Descriptions ......................................................
Register Call Summary for PRUSS_IEP_LOW_COUNTER.......................................................
PRUSS_IEP_HIGH_COUNTER Instances ..........................................................................
PRUSS_IEP_HIGH_COUNTER Register Field Descriptions .....................................................
Register Call Summary for PRUSS_IEP_HIGH_COUNTER ......................................................
PRUSS_IEP_CAPTURE_CFG Instances ............................................................................
PRUSS_IEP_CAPTURE_CFG Register Field Descriptions .......................................................
Register Call Summary for PRUSS_IEP_CAPTURE_CFG .......................................................
PRUSS_IEP_CAPTURE_STATUS Instances .......................................................................
PRUSS_IEP_CAPTURE_STATUS Register Field Descriptions ..................................................
Register Call Summary for PRUSS_IEP_CAPTURE_STATUS ..................................................
PRUSS_IEP_CAPTURE_RISE00 Instances ........................................................................
PRUSS_IEP_CAPTURE_RISE00 Register Field Descriptions ...................................................
Register Call Summary for PRUSS_IEP_CAPTURE_RISE00 ....................................................
PRUSS_IEP_CAPTURE_RISE10 Instances ........................................................................
PRUSS_IEP_CAPTURE_RISE10 Register Field Descriptions ...................................................
Register Call Summary for PRUSS_IEP_CAPTURE_RISE10 ....................................................
PRUSS_IEP_CAPTURE_RISE01 Instances ........................................................................
PRUSS_IEP_CAPTURE_RISE01 Register Field Descriptions ...................................................
Register Call Summary for PRUSS_IEP_CAPTURE_RISE01 ....................................................
PRUSS_IEP_CAPTURE_RISE11 Instances ........................................................................
PRUSS_IEP_CAPTURE_RISE11 Register Field Descriptions ...................................................
6-764. PRUSS_MII_MDIO_USERPHYSEL0 Register Field Descriptions
6-765.
6-766.
6-767.
6-768.
6-769.
6-770.
6-771.
6-772.
6-773.
6-774.
6-775.
6-776.
6-777.
6-778.
6-779.
6-780.
6-781.
6-782.
6-783.
6-784.
6-785.
6-786.
6-787.
6-788.
6-789.
6-790.
6-791.
6-792.
6-793.
6-794.
6-795.
6-796.
6-797.
6-798.
6-799.
6-800.
6-801.
6-802.
6-803.
6-804.
6-805.
6-806.
6-807.
6-808.
6-809.
92
List of Tables
1018
1018
1019
1019
1019
1020
1020
1020
1023
1029
1029
1033
1033
1033
1034
1034
1034
1035
1035
1035
1036
1036
1036
1037
1037
1037
1038
1038
1038
1039
1039
1040
1041
1041
1042
1043
1043
1043
1044
1044
1044
1045
1045
1045
1046
1046
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
6-810. Register Call Summary for PRUSS_IEP_CAPTURE_RISE11 .................................................... 1046
6-811. PRUSS_IEP_CAPTURE_RISE02 Instances ........................................................................ 1047
6-812. PRUSS_IEP_CAPTURE_RISE02 Register Field Descriptions ................................................... 1047
6-813. Register Call Summary for PRUSS_IEP_CAPTURE_RISE02 .................................................... 1047
6-814. PRUSS_IEP_CAPTURE_RISE12 Instances ........................................................................ 1048
6-815. PRUSS_IEP_CAPTURE_RISE12 Register Field Descriptions ................................................... 1048
6-816. Register Call Summary for PRUSS_IEP_CAPTURE_RISE12 .................................................... 1048
6-817. PRUSS_IEP_CAPTURE_RISE03 Instances ........................................................................ 1049
6-818. PRUSS_IEP_CAPTURE_RISE03 Register Field Descriptions ................................................... 1049
6-819. Register Call Summary for PRUSS_IEP_CAPTURE_RISE03 .................................................... 1049
6-820. PRUSS_IEP_CAPTURE_RISE13 Instances ........................................................................ 1050
6-821. PRUSS_IEP_CAPTURE_RISE13 Register Field Descriptions ................................................... 1050
6-822. Register Call Summary for PRUSS_IEP_CAPTURE_RISE13 .................................................... 1050
6-823. PRUSS_IEP_CAPTURE_RISE04 Instances ........................................................................ 1051
6-824. PRUSS_IEP_CAPTURE_RISE04 Register Field Descriptions ................................................... 1051
6-825. Register Call Summary for PRUSS_IEP_CAPTURE_RISE04 .................................................... 1051
6-826. PRUSS_IEP_CAPTURE_RISE14 Instances ........................................................................ 1052
6-827. PRUSS_IEP_CAPTURE_RISE14 Register Field Descriptions ................................................... 1052
6-828. Register Call Summary for PRUSS_IEP_CAPTURE_RISE14 .................................................... 1052
6-829. PRUSS_IEP_CAPTURE_RISE05 Instances ........................................................................ 1053
6-830. PRUSS_IEP_CAPTURE_RISE05 Register Field Descriptions ................................................... 1053
6-831. Register Call Summary for PRUSS_IEP_CAPTURE_RISE05 .................................................... 1053
6-832. PRUSS_IEP_CAPTURE_RISE15 Instances ........................................................................ 1054
6-833. PRUSS_IEP_CAPTURE_RISE15 Register Field Descriptions ................................................... 1054
6-834. Register Call Summary for PRUSS_IEP_CAPTURE_RISE15 .................................................... 1054
6-835. PRUSS_IEP_CAPTURE_RISE06 Instances ........................................................................ 1055
6-836. PRUSS_IEP_CAPTURE_RISE06 Register Field Descriptions ................................................... 1055
6-837. Register Call Summary for PRUSS_IEP_CAPTURE_RISE06 .................................................... 1055
6-838. PRUSS_IEP_CAPTURE_RISE16 Instances ........................................................................ 1056
6-839. PRUSS_IEP_CAPTURE_RISE16 Register Field Descriptions ................................................... 1056
6-840. Register Call Summary for PRUSS_IEP_CAPTURE_RISE16 .................................................... 1056
6-841. PRUSS_IEP_CAPTURE_FALL06 Instances ........................................................................ 1057
6-842. PRUSS_IEP_CAPTURE_FALL06 Register Field Descriptions ................................................... 1057
6-843. Register Call Summary for PRUSS_IEP_CAPTURE_FALL06 .................................................... 1057
6-844. PRUSS_IEP_CAPTURE_FALL16 Instances ........................................................................ 1058
6-845. PRUSS_IEP_CAPTURE_FALL16 Register Field Descriptions ................................................... 1058
6-846. Register Call Summary for PRUSS_IEP_CAPTURE_FALL16 .................................................... 1058
6-847. PRUSS_IEP_CAPTURE_RISE07 Instances ........................................................................ 1059
6-848. PRUSS_IEP_CAPTURE_RISE07 Register Field Descriptions ................................................... 1059
6-849. Register Call Summary for PRUSS_IEP_CAPTURE_RISE07 .................................................... 1059
6-850. PRUSS_IEP_CAPTURE_RISE17 Instances ........................................................................ 1060
6-851. PRUSS_IEP_CAPTURE_RISE17 Register Field Descriptions ................................................... 1060
6-852. Register Call Summary for PRUSS_IEP_CAPTURE_RISE17 .................................................... 1060
6-853. PRUSS_IEP_CAPTURE_FALL07 Instances ........................................................................ 1061
6-854. PRUSS_IEP_CAPTURE_FALL07 Register Field Descriptions ................................................... 1061
6-855. Register Call Summary for PRUSS_IEP_CAPTURE_FALL07 .................................................... 1061
6-856. PRUSS_IEP_CAPTURE_FALL17 Instances ........................................................................ 1062
6-857. PRUSS_IEP_CAPTURE_FALL17 Register Field Descriptions ................................................... 1062
6-858. Register Call Summary for PRUSS_IEP_CAPTURE_FALL17 .................................................... 1062
SPRUHY8I – January 2016 – Revised March 2019
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List of Tables
93
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6-859. PRUSS_IEP_COMPARE_CFG Instances ........................................................................... 1063
6-860. PRUSS_IEP_COMPARE_CFG Register Field Descriptions ...................................................... 1063
6-861. Register Call Summary for PRUSS_IEP_COMPARE_CFG ....................................................... 1063
6-862. PRUSS_IEP_COMPARE_STATUS Instances ...................................................................... 1064
6-863. PRUSS_IEP_COMPARE_STATUS Register Field Descriptions ................................................. 1064
6-864. Register Call Summary for PRUSS_IEP_COMPARE_STATUS .................................................. 1064
6-865. PRUSS_IEP_COMPARE00 Instances ............................................................................... 1065
6-866. PRUSS_IEP_COMPARE00 Register Field Descriptions .......................................................... 1065
6-867. Register Call Summary for PRUSS_IEP_COMPARE00 ........................................................... 1065
6-868. PRUSS_IEP_COMPARE10 Instances ............................................................................... 1066
6-869. PRUSS_IEP_COMPARE10 Register Field Descriptions .......................................................... 1066
6-870. Register Call Summary for PRUSS_IEP_COMPARE10 ........................................................... 1066
6-871. PRUSS_IEP_COMPARE01 Instances ............................................................................... 1067
6-872. PRUSS_IEP_COMPARE01 Register Field Descriptions .......................................................... 1067
6-873. Register Call Summary for PRUSS_IEP_COMPARE01 ........................................................... 1067
6-874. PRUSS_IEP_COMPARE11 Instances ............................................................................... 1068
6-875. PRUSS_IEP_COMPARE11 Register Field Descriptions .......................................................... 1068
6-876. Register Call Summary for PRUSS_IEP_COMPARE11 ........................................................... 1068
6-877. PRUSS_IEP_COMPARE02 Instances ............................................................................... 1069
6-878. PRUSS_IEP_COMPARE02 Register Field Descriptions .......................................................... 1069
6-879. Register Call Summary for PRUSS_IEP_COMPARE02 ........................................................... 1069
6-880. PRUSS_IEP_COMPARE12 Instances ............................................................................... 1070
6-881. PRUSS_IEP_COMPARE12 Register Field Descriptions .......................................................... 1070
6-882. Register Call Summary for PRUSS_IEP_COMPARE12 ........................................................... 1070
6-883. PRUSS_IEP_COMPARE03 Instances ............................................................................... 1071
6-884. PRUSS_IEP_COMPARE03 Register Field Descriptions .......................................................... 1071
6-885. Register Call Summary for PRUSS_IEP_COMPARE03 ........................................................... 1071
6-886. PRUSS_IEP_COMPARE13 Instances ............................................................................... 1072
6-887. PRUSS_IEP_COMPARE13 Register Field Descriptions .......................................................... 1072
6-888. Register Call Summary for PRUSS_IEP_COMPARE13 ........................................................... 1072
6-889. PRUSS_IEP_COMPARE04 Instances ............................................................................... 1073
6-890. PRUSS_IEP_COMPARE04 Register Field Descriptions .......................................................... 1073
6-891. Register Call Summary for PRUSS_IEP_COMPARE04 ........................................................... 1073
6-892. PRUSS_IEP_COMPARE14 Instances ............................................................................... 1074
6-893. PRUSS_IEP_COMPARE14 Register Field Descriptions .......................................................... 1074
6-894. Register Call Summary for PRUSS_IEP_COMPARE14 ........................................................... 1074
6-895. PRUSS_IEP_COMPARE05 Instances ............................................................................... 1075
6-896. PRUSS_IEP_COMPARE05 Register Field Descriptions .......................................................... 1075
6-897. Register Call Summary for PRUSS_IEP_COMPARE05 ........................................................... 1075
6-898. PRUSS_IEP_COMPARE15 Instances ............................................................................... 1076
6-899. PRUSS_IEP_COMPARE15 Register Field Descriptions .......................................................... 1076
6-900. Register Call Summary for PRUSS_IEP_COMPARE15 ........................................................... 1076
6-901. PRUSS_IEP_COMPARE06 Instances ............................................................................... 1077
6-902. PRUSS_IEP_COMPARE06 Register Field Descriptions .......................................................... 1077
6-903. Register Call Summary for PRUSS_IEP_COMPARE06 ........................................................... 1077
6-904. PRUSS_IEP_COMPARE16 Instances ............................................................................... 1078
6-905. PRUSS_IEP_COMPARE16 Register Field Descriptions .......................................................... 1078
6-906. Register Call Summary for PRUSS_IEP_COMPARE16 ........................................................... 1078
6-907. PRUSS_IEP_COMPARE07 Instances ............................................................................... 1079
94
List of Tables
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
6-908. PRUSS_IEP_COMPARE07 Register Field Descriptions .......................................................... 1079
6-909. Register Call Summary for PRUSS_IEP_COMPARE07 ........................................................... 1079
6-910. PRUSS_IEP_COMPARE17 Instances ............................................................................... 1080
6-911. PRUSS_IEP_COMPARE17 Register Field Descriptions .......................................................... 1080
6-912. Register Call Summary for PRUSS_IEP_COMPARE17 ........................................................... 1080
6-913. PRUSS_IEP_RXIPG0 Instances ...................................................................................... 1081
6-914. PRUSS_IEP_RXIPG0 Register Field Descriptions ................................................................. 1081
6-915. Register Call Summary for PRUSS_IEP_RXIPG0 .................................................................. 1081
6-916. PRUSS_IEP_RXIPG1 Instances ...................................................................................... 1082
6-917. PRUSS_IEP_RXIPG1 Register Field Descriptions ................................................................. 1082
6-918. Register Call Summary for PRUSS_IEP_RXIPG1 .................................................................. 1082
6-919. PRUSS_IEP_COMPARE08 Instances ............................................................................... 1083
6-920. PRUSS_IEP_COMPARE08 Register Field Descriptions .......................................................... 1083
6-921. Register Call Summary for PRUSS_IEP_COMPARE08 ........................................................... 1083
6-922. PRUSS_IEP_COMPARE18 Instances ............................................................................... 1084
6-923. PRUSS_IEP_COMPARE18 Register Field Descriptions .......................................................... 1084
6-924. Register Call Summary for PRUSS_IEP_COMPARE18 ........................................................... 1084
6-925. PRUSS_IEP_COMPARE09 Instances ............................................................................... 1085
6-926. PRUSS_IEP_COMPARE09 Register Field Descriptions .......................................................... 1085
6-927. Register Call Summary for PRUSS_IEP_COMPARE09 ........................................................... 1085
6-928. PRUSS_IEP_COMPARE19 Instances ............................................................................... 1086
6-929. PRUSS_IEP_COMPARE19 Register Field Descriptions .......................................................... 1086
6-930. Register Call Summary for PRUSS_IEP_COMPARE19 ........................................................... 1086
6-931. PRUSS_IEP_COMPARE010 Instances .............................................................................. 1087
6-932. PRUSS_IEP_COMPARE010 Register Field Descriptions ......................................................... 1087
.........................................................
PRUSS_IEP_COMPARE110 Instances ..............................................................................
PRUSS_IEP_COMPARE110 Register Field Descriptions .........................................................
Register Call Summary for PRUSS_IEP_COMPARE110 .........................................................
PRUSS_IEP_COMPARE011 Instances ..............................................................................
PRUSS_IEP_COMPARE011 Register Field Descriptions .........................................................
Register Call Summary for PRUSS_IEP_COMPARE011 .........................................................
PRUSS_IEP_COMPARE111 Instances ..............................................................................
PRUSS_IEP_COMPARE111 Register Field Descriptions .........................................................
Register Call Summary for PRUSS_IEP_COMPARE111 .........................................................
PRUSS_IEP_COMPARE012 Instances ..............................................................................
PRUSS_IEP_COMPARE012 Register Field Descriptions .........................................................
Register Call Summary for PRUSS_IEP_COMPARE012 .........................................................
PRUSS_IEP_COMPARE112 Instances ..............................................................................
PRUSS_IEP_COMPARE112 Register Field Descriptions .........................................................
Register Call Summary for PRUSS_IEP_COMPARE112 .........................................................
PRUSS_IEP_COMPARE013 Instances ..............................................................................
PRUSS_IEP_COMPARE013 Register Field Descriptions .........................................................
Register Call Summary for PRUSS_IEP_COMPARE013 .........................................................
PRUSS_IEP_COMPARE113 Instances ..............................................................................
PRUSS_IEP_COMPARE113 Register Field Descriptions .........................................................
Register Call Summary for PRUSS_IEP_COMPARE113 .........................................................
PRUSS_IEP_COMPARE014 Instances ..............................................................................
PRUSS_IEP_COMPARE014 Register Field Descriptions .........................................................
6-933. Register Call Summary for PRUSS_IEP_COMPARE010
6-934.
6-935.
6-936.
6-937.
6-938.
6-939.
6-940.
6-941.
6-942.
6-943.
6-944.
6-945.
6-946.
6-947.
6-948.
6-949.
6-950.
6-951.
6-952.
6-953.
6-954.
6-955.
6-956.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1087
1088
1088
1088
1089
1089
1089
1090
1090
1090
1091
1091
1091
1092
1092
1092
1093
1093
1093
1094
1094
1094
1095
1095
95
www.ti.com
.........................................................
6-958. PRUSS_IEP_COMPARE114 Instances ..............................................................................
6-959. PRUSS_IEP_COMPARE114 Register Field Descriptions .........................................................
6-960. Register Call Summary for PRUSS_IEP_COMPARE114 .........................................................
6-961. PRUSS_IEP_COMPARE015 Instances ..............................................................................
6-962. PRUSS_IEP_COMPARE015 Register Field Descriptions .........................................................
6-963. Register Call Summary for PRUSS_IEP_COMPARE015 .........................................................
6-964. PRUSS_IEP_COMPARE115 Instances ..............................................................................
6-965. PRUSS_IEP_COMPARE115 Register Field Descriptions .........................................................
6-966. Register Call Summary for PRUSS_IEP_COMPARE115 .........................................................
6-967. PRUSS_IEP_LOW_COUNTER_RESET_VALUE Instances ......................................................
6-968. PRUSS_IEP_LOW_COUNTER_RESET_VALUE Register Field Descriptions .................................
6-969. Register Call Summary for PRUSS_IEP_LOW_COUNTER_RESET_VALUE ..................................
6-970. PRUSS_IEP_HIGH_COUNTER_RESET_VALUE Instances .....................................................
6-971. PRUSS_IEP_HIGH_COUNTER_RESET_VALUE Register Field Descriptions.................................
6-972. Register Call Summary for PRUSS_IEP_HIGH_COUNTER_RESET_VALUE .................................
6-973. PRUSS_IEP_PWM Instances .........................................................................................
6-974. PRUSS_IEP_PWM Register Field Descriptions ....................................................................
6-975. Register Call Summary for PRUSS_IEP_PWM .....................................................................
6-976. PRUSS_IEP_SYNC_CTRL Instances ................................................................................
6-977. PRUSS_IEP_SYNC_CTRL Register Field Descriptions ...........................................................
6-978. Register Call Summary for PRUSS_IEP_SYNC_CTRL ...........................................................
6-979. PRUSS_IEP_SYNC_FIRST_STAT Instances.......................................................................
6-980. PRUSS_IEP_SYNC_FIRST_STAT Register Field Descriptions ..................................................
6-981. Register Call Summary for PRUSS_IEP_SYNC_FIRST_STAT ..................................................
6-982. PRUSS_IEP_SYNC0_STAT Instances ..............................................................................
6-983. PRUSS_IEP_SYNC0_STAT Register Field Descriptions..........................................................
6-984. Register Call Summary for PRUSS_IEP_SYNC0_STAT ..........................................................
6-985. PRUSS_IEP_SYNC1_STAT Instances ..............................................................................
6-986. PRUSS_IEP_SYNC1_STAT Register Field Descriptions..........................................................
6-987. Register Call Summary for PRUSS_IEP_SYNC1_STAT ..........................................................
6-988. PRUSS_IEP_SYNC_PWIDTH Instances ............................................................................
6-989. PRUSS_IEP_SYNC_PWIDTH Register Field Descriptions .......................................................
6-990. Register Call Summary for PRUSS_IEP_SYNC_PWIDTH ........................................................
6-991. PRUSS_IEP_SYNC0_PERIOD Instances ...........................................................................
6-992. PRUSS_IEP_SYNC0_PERIOD Register Field Descriptions ......................................................
6-993. Register Call Summary for PRUSS_IEP_SYNC0_PERIOD .......................................................
6-994. PRUSS_IEP_SYNC1_DELAY Instances ............................................................................
6-995. PRUSS_IEP_SYNC1_DELAY Register Field Descriptions ........................................................
6-996. Register Call Summary for PRUSS_IEP_SYNC1_DELAY ........................................................
6-997. PRUSS_IEP_SYNC_START Instances ..............................................................................
6-998. PRUSS_IEP_SYNC_START Register Field Descriptions .........................................................
6-999. Register Call Summary for PRUSS_IEP_SYNC_START ..........................................................
6-1000. PRUSS_IEP_WD_PREDIV Instances ..............................................................................
6-1001. PRUSS_IEP_WD_PREDIV Register Field Descriptions..........................................................
6-1002. Register Call Summary for PRUSS_IEP_WD_PREDIV ..........................................................
6-1003. PRUSS_IEP_PDI_WD_TIM Instances ..............................................................................
6-1004. PRUSS_IEP_PDI_WD_TIM Register Field Descriptions .........................................................
6-1005. Register Call Summary for PRUSS_IEP_PDI_WD_TIM .........................................................
6-957. Register Call Summary for PRUSS_IEP_COMPARE014
96
List of Tables
1095
1096
1096
1096
1097
1097
1097
1098
1098
1098
1099
1099
1099
1100
1100
1100
1101
1101
1101
1102
1102
1103
1104
1104
1104
1105
1105
1105
1106
1106
1106
1107
1107
1107
1108
1108
1108
1109
1109
1109
1110
1110
1110
1111
1111
1111
1112
1112
1112
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
..............................................................................
6-1007. PRUSS_IEP_PD_WD_TIM Register Field Descriptions ..........................................................
6-1008. Register Call Summary for PRUSS_IEP_PD_WD_TIM ..........................................................
6-1009. PRUSS_IEP_WD_STATUS Instances ..............................................................................
6-1010. PRUSS_IEP_WD_STATUS Register Field Descriptions .........................................................
6-1011. Register Call Summary for PRUSS_IEP_WD_STATUS .........................................................
6-1012. PRUSS_IEP_WD_EXP_CNT Instances ............................................................................
6-1013. PRUSS_IEP_WD_EXP_CNT Register Field Descriptions .......................................................
6-1014. Register Call Summary for PRUSS_IEP_WD_EXP_CNT ........................................................
6-1015. PRUSS_IEP_WD_CTRL Instances .................................................................................
6-1016. PRUSS_IEP_WD_CTRL Register Field Descriptions.............................................................
6-1017. Register Call Summary for PRUSS_IEP_WD_CTRL .............................................................
6-1018. PRUSS_IEP_DIGIO_CTRL Instances ..............................................................................
6-1019. PRUSS_IEP_DIGIO_CTRL Register Field Descriptions .........................................................
6-1020. Register Call Summary for PRUSS_IEP_DIGIO_CTRL ..........................................................
6-1021. PRUSS_IEP_DIGIO_STATUS Instances ...........................................................................
6-1022. PRUSS_IEP_DIGIO_STATUS Register Field Descriptions ......................................................
6-1023. Register Call Summary for PRUSS_IEP_DIGIO_STATUS ......................................................
6-1024. PRUSS_IEP_DIGIO_DATA_IN Instances ..........................................................................
6-1025. PRUSS_IEP_DIGIO_DATA_IN Register Field Descriptions .....................................................
6-1026. Register Call Summary for PRUSS_IEP_DIGIO_DATA_IN......................................................
6-1027. PRUSS_IEP_DIGIO_DATA_IN_RAW Instances ..................................................................
6-1028. PRUSS_IEP_DIGIO_DATA_IN_RAW Register Field Descriptions .............................................
6-1029. Register Call Summary for PRUSS_IEP_DIGIO_DATA_IN_RAW ..............................................
6-1030. PRUSS_IEP_DIGIO_DATA_OUT Instances .......................................................................
6-1031. PRUSS_IEP_DIGIO_DATA_OUT Register Field Descriptions ..................................................
6-1032. Register Call Summary for PRUSS_IEP_DIGIO_DATA_OUT ...................................................
6-1033. PRUSS_IEP_DIGIO_DATA_OUT_EN Instances ..................................................................
6-1034. PRUSS_IEP_DIGIO_DATA_OUT_EN Register Field Descriptions .............................................
6-1035. Register Call Summary for PRUSS_IEP_DIGIO_DATA_OUT_EN .............................................
6-1036. PRUSS_IEP_DIGIO_EXP Instances ................................................................................
6-1037. PRUSS_IEP_DIGIO_EXP Register Field Descriptions ...........................................................
6-1038. Register Call Summary for PRUSS_IEP_DIGIO_EXP............................................................
7-1.
MSMC Integration Attributes ...........................................................................................
7-2.
MSMC Clocks and Resets .............................................................................................
7-3.
MSMC Hardware Requests ............................................................................................
7-4.
Starvation Counters per Requestor ...................................................................................
7-5.
MPAX Segment Size Encoding .......................................................................................
7-6.
MSMC Protection Fault Reporting Register List ....................................................................
7-7.
Replacement Address Used as Per-Segment Size .................................................................
7-8.
MSMC EDC Registers ..................................................................................................
7-9.
Soft Error Correction Actions ..........................................................................................
7-10. MSMC Interrupt Control Registers ....................................................................................
7-11. MSMC Configuration Write Lock Registers ..........................................................................
7-12. MSMC Memory Regions ...............................................................................................
7-13. MSMC Instances ........................................................................................................
7-14. MSMC Registers ........................................................................................................
7-15. MSMC_PID Instances ..................................................................................................
7-16. MSMC_PID Register Field Descriptions .............................................................................
6-1006. PRUSS_IEP_PD_WD_TIM Instances
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1113
1113
1113
1114
1114
1114
1115
1115
1115
1116
1116
1116
1117
1117
1118
1119
1119
1119
1120
1120
1120
1121
1121
1121
1122
1122
1122
1123
1123
1123
1124
1124
1125
1128
1129
1130
1133
1136
1137
1137
1139
1140
1142
1143
1144
1146
1146
1148
1148
97
www.ti.com
7-17.
Register Call Summary for MSMC_PID .............................................................................. 1148
7-18.
MSMC_SMEDCC Instances ........................................................................................... 1149
7-19.
MSMC_SMEDCC Register Field Descriptions ...................................................................... 1149
7-20.
Register Call Summary for MSMC_SMEDCC ....................................................................... 1150
7-21.
MSMC_SMCERRAR Instances ....................................................................................... 1151
7-22.
MSMC_SMCERRAR Register Field Descriptions
7-23.
7-24.
7-25.
7-26.
7-27.
7-28.
7-29.
7-30.
7-31.
7-32.
7-33.
7-34.
7-35.
7-36.
7-37.
7-38.
7-39.
7-40.
7-41.
7-42.
7-43.
7-44.
7-45.
7-46.
7-47.
7-48.
7-49.
7-50.
7-51.
7-52.
7-53.
7-54.
7-55.
7-56.
7-57.
7-58.
7-59.
7-60.
7-61.
7-62.
7-63.
7-64.
7-65.
98
..................................................................
Register Call Summary for MSMC_SMCERRAR ...................................................................
MSMC_SMCERRXR Instances .......................................................................................
MSMC_SMCERRXR Register Field Descriptions ..................................................................
Register Call Summary for MSMC_SMCERRXR ...................................................................
MSMC_SMNCERRAR Instances .....................................................................................
MSMC_SMNCERRAR Register Field Descriptions ................................................................
Register Call Summary for MSMC_SMNCERRAR .................................................................
MSMC_SMNCERRXR Instances .....................................................................................
MSMC_SMNCERRXR Register Field Descriptions ................................................................
Register Call Summary for MSMC_SMNCERRXR .................................................................
MSMC_SMCEA Instances .............................................................................................
MSMC_SMCEA Register Field Descriptions ........................................................................
Register Call Summary for MSMC_SMCEA .........................................................................
MSMC_SMNCEA Instances ...........................................................................................
MSMC_SMNCEA Register Field Descriptions ......................................................................
Register Call Summary for MSMC_SMNCEA .......................................................................
MSMC_SMSECC Instances ...........................................................................................
MSMC_SMSECC Register Field Descriptions ......................................................................
Register Call Summary for MSMC_SMSECC .......................................................................
MSMC_SMPFAR Instances ...........................................................................................
MSMC_SMPFAR Register Field Descriptions .......................................................................
Register Call Summary for MSMC_SMPFAR .......................................................................
MSMC_SMPFXR Instances ...........................................................................................
MSMC_SMPFXR Register Field Descriptions .......................................................................
Register Call Summary for MSMC_SMPFXR .......................................................................
MSMC_SMPFR Instances .............................................................................................
MSMC_SMPFR Register Field Descriptions ........................................................................
Register Call Summary for MSMC_SMPFR .........................................................................
MSMC_SMPFCR Instances ...........................................................................................
MSMC_SMPFCR Register Field Descriptions ......................................................................
Register Call Summary for MSMC_SMPFCR .......................................................................
MSMC_SBNDC0 Instances ............................................................................................
MSMC_SBNDC0 Register Field Descriptions .......................................................................
Register Call Summary for MSMC_SBNDC0 .......................................................................
MSMC_SBNDM Instances .............................................................................................
MSMC_SBNDM Register Field Descriptions ........................................................................
Register Call Summary for MSMC_SBNDM .........................................................................
MSMC_SBNDE Instances .............................................................................................
MSMC_SBNDE Register Field Descriptions.........................................................................
Register Call Summary for MSMC_SBNDE .........................................................................
MSMC_CFGLCK Instances ............................................................................................
MSMC_CFGLCK Register Field Descriptions .......................................................................
Register Call Summary for MSMC_CFGLCK .......................................................................
List of Tables
1151
1151
1152
1152
1152
1153
1153
1153
1154
1154
1154
1155
1155
1155
1156
1156
1156
1157
1157
1157
1158
1158
1158
1159
1159
1159
1160
1160
1160
1161
1161
1161
1162
1162
1162
1163
1163
1163
1164
1164
1164
1165
1165
1165
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
7-66.
MSMC_CFGULCK Instances .......................................................................................... 1166
7-67.
MSMC_CFGULCK Register Field Descriptions ..................................................................... 1166
7-68.
Register Call Summary for MSMC_CFGULCK...................................................................... 1166
7-69.
MSMC_CFGLCKSTAT Instances ..................................................................................... 1167
7-70.
MSMC_CFGLCKSTAT Register Field Descriptions ................................................................ 1167
7-71.
Register Call Summary for MSMC_CFGLCKSTAT................................................................. 1167
7-72.
MSMC_SMS_MPAX_LCK Instances ................................................................................. 1168
7-73.
MSMC_SMS_MPAX_LCK Register Field Descriptions ............................................................ 1168
7-74.
Register Call Summary for MSMC_SMS_MPAX_LCK ............................................................. 1168
7-75.
MSMC_SMS_MPAX_ULCK Instances ............................................................................... 1169
7-76.
MSMC_SMS_MPAX_ULCK Register Field Descriptions .......................................................... 1169
7-77.
Register Call Summary for MSMC_SMS_MPAX_ULCK ........................................................... 1169
7-78.
MSMC_SMS_MPAX_LCKSTAT Instances .......................................................................... 1170
7-79.
MSMC_SMS_MPAX_LCKSTAT Register Field Descriptions ..................................................... 1170
7-80.
Register Call Summary for MSMC_SMS_MPAX_LCKSTAT ...................................................... 1170
7-81.
MSMC_SES_MPAX_LCK Instances
7-82.
7-83.
7-84.
7-85.
7-86.
7-87.
7-88.
7-89.
7-90.
7-91.
7-92.
7-93.
7-94.
7-95.
7-96.
7-97.
7-98.
7-99.
7-100.
7-101.
7-102.
7-103.
7-104.
7-105.
7-106.
7-107.
7-108.
7-109.
7-110.
7-111.
7-112.
7-113.
7-114.
.................................................................................
MSMC_SES_MPAX_LCK Register Field Descriptions.............................................................
Register Call Summary for MSMC_SES_MPAX_LCK .............................................................
MSMC_SES_MPAX_ULCK Instances ...............................................................................
MSMC_SES_MPAX_ULCK Register Field Descriptions ...........................................................
Register Call Summary for MSMC_SES_MPAX_ULCK ...........................................................
MSMC_SES_MPAX_LCKSTAT Instances ..........................................................................
MSMC_SES_MPAX_LCKSTAT Register Field Descriptions ......................................................
Register Call Summary for MSMC_SES_MPAX_LCKSTAT ......................................................
MSMC_SMESTAT Instances ..........................................................................................
MSMC_SMESTAT Register Field Descriptions .....................................................................
Register Call Summary for MSMC_SMESTAT ......................................................................
MSMC_SMIRSTAT Instances .........................................................................................
MSMC_SMIRSTAT Register Field Descriptions ....................................................................
Register Call Summary for MSMC_SMIRSTAT .....................................................................
MSMC_SMIRC Instances ..............................................................................................
MSMC_SMIRC Register Field Descriptions .........................................................................
Register Call Summary for MSMC_SMIRC ..........................................................................
MSMC_SMIESTAT Instances .........................................................................................
MSMC_SMIESTAT Register Field Descriptions ....................................................................
Register Call Summary for MSMC_SMIESTAT .....................................................................
MSMC_SMIEC Instances ..............................................................................................
MSMC_SMIEC Register Field Descriptions .........................................................................
Register Call Summary for MSMC_SMIEC ..........................................................................
MSMC_SMS_MPAXL_x_y Instances ................................................................................
MSMC_SMS_MPAXL_x_y Register Field Descriptions ............................................................
Register Call Summary for MSMC_SMS_MPAXL_x_y ............................................................
MSMC_SMS_MPAXH_x_y Instances ................................................................................
MSMC_SMS_MPAXH_x_y Register Field Descriptions ...........................................................
Register Call Summary for MSMC_SMS_MPAXH_x_y ............................................................
MSMC_SES_MPAXL_x_y Instances .................................................................................
MSMC_SES_MPAXL_x_y Register Field Descriptions ............................................................
Register Call Summary for MSMC_SES_MPAXL_x_y .............................................................
MSMC_SES_MPAXH_x_y Instances ................................................................................
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1171
1171
1171
1172
1172
1172
1173
1173
1173
1174
1174
1174
1175
1175
1176
1177
1177
1177
1178
1178
1178
1179
1179
1179
1181
1181
1182
1182
1182
1183
1184
1184
1185
1186
99
www.ti.com
7-115. MSMC_SES_MPAXH_x_y Register Field Descriptions ............................................................ 1186
7-116. Register Call Summary for MSMC_SES_MPAXH_x_y ............................................................ 1186
7-117. EMIF IO signals
.........................................................................................................
1192
7-118. EMIF Integration Attributes............................................................................................. 1193
7-119. EMIF Clocks and Resets ............................................................................................... 1193
7-120. EMIF Hardware Requests .............................................................................................. 1194
7-121. EMIF controller FIFOs Description .................................................................................... 1195
7-122. 64-Byte Linear Read Starting at Address 0h ........................................................................ 1200
7-123. 64-Byte Linear Read Starting at Address 10h ....................................................................... 1200
7-124. 64-Byte Linear Read Starting at Address 18h ....................................................................... 1200
7-125. Turnaround Time ........................................................................................................ 1201
7-126. Bank Configuration Register Fields for Address Mapping ......................................................... 1201
7-127. Logical Address-to-SDRAM Address Mapping
.....................................................................
1202
7-128. EMIF Events ............................................................................................................. 1206
7-129. Performance Counter Filter Configuration ........................................................................... 1206
7-130. EMIF and DDR_PHY Instances ....................................................................................... 1209
7-131. EMIF and DDR_PHY Registers ....................................................................................... 1209
7-132. EMIF_MIDR Instances.................................................................................................. 1214
7-133. EMIF_MIDR Register Field Descriptions ............................................................................. 1214
7-134. Register Call Summary for EMIF_MIDR ............................................................................. 1214
7-135. EMIF_STATUS Instances .............................................................................................. 1215
7-136. EMIF_STATUS Register Field Descriptions ......................................................................... 1215
7-137. Register Call Summary for EMIF_STATUS.......................................................................... 1215
7-138. EMIF_SDCFG Instances ............................................................................................... 1217
7-139. EMIF_SDCFG Register Field Descriptions .......................................................................... 1217
7-140. Register Call Summary for EMIF_SDCFG ........................................................................... 1219
7-141. EMIF_SDRFC Instances ............................................................................................... 1220
7-142. EMIF_SDRFC Register Field Descriptions
..........................................................................
1220
7-143. Register Call Summary for EMIF_SDRFC ........................................................................... 1220
7-144. EMIF_SDTIM1 Instances............................................................................................... 1221
7-145. EMIF_SDTIM1 Register Field Descriptions .......................................................................... 1221
7-146. Register Call Summary for EMIF_SDTIM1 .......................................................................... 1222
7-147. EMIF_SDTIM2 Instances............................................................................................... 1223
7-148. EMIF_SDTIM2 Register Field Descriptions .......................................................................... 1223
7-149. Register Call Summary for EMIF_SDTIM2 .......................................................................... 1224
7-150. EMIF_SDTIM3 Instances............................................................................................... 1225
7-151. EMIF_SDTIM3 Register Field Descriptions .......................................................................... 1225
7-152. Register Call Summary for EMIF_SDTIM3 .......................................................................... 1226
7-153. EMIF_SDTIM4 Instances............................................................................................... 1227
7-154. EMIF_SDTIM4 Register Field Descriptions .......................................................................... 1227
7-155. Register Call Summary for EMIF_SDTIM4 .......................................................................... 1228
7-156. EMIF_PMCTL Instances ............................................................................................... 1229
7-157. EMIF_PMCTL Register Field Descriptions........................................................................... 1229
7-158. Register Call Summary for EMIF_PMCTL ........................................................................... 1230
7-159. EMIF_VBUSM_CONFIG Instances ................................................................................... 1231
7-160. EMIF_VBUSM_CONFIG Register Field Descriptions .............................................................. 1231
7-161. Register Call Summary for EMIF_VBUSM_CONFIG ............................................................... 1231
7-162. EMIF_PERF_CNT_1 Instances ....................................................................................... 1232
7-163. EMIF_PERF_CNT_1 Register Field Descriptions
100
List of Tables
..................................................................
1232
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
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7-164. Register Call Summary for EMIF_PERF_CNT_1 ................................................................... 1232
7-165. EMIF_PERF_CNT_2 Instances ....................................................................................... 1233
7-166. EMIF_PERF_CNT_2 Register Field Descriptions
..................................................................
1233
7-167. Register Call Summary for EMIF_PERF_CNT_2 ................................................................... 1233
7-168. EMIF_PERF_CNT_CFG Instances ................................................................................... 1234
7-169. EMIF_PERF_CNT_CFG Register Field Descriptions .............................................................. 1234
7-170. Register Call Summary for EMIF_PERF_CNT_CFG ............................................................... 1234
7-171. EMIF_PERF_CNT_SEL Instances .................................................................................... 1235
7-172. EMIF_PERF_CNT_SEL Register Field Descriptions ............................................................... 1235
7-173. Register Call Summary for EMIF_PERF_CNT_SEL
...............................................................
1235
7-174. EMIF_PERF_CNT_TIM Instances .................................................................................... 1236
7-175. EMIF_PERF_CNT_TIM Register Field Descriptions ............................................................... 1236
7-176. Register Call Summary for EMIF_PERF_CNT_TIM ................................................................ 1236
7-177. EMIF_IRQ_EOI Instances.............................................................................................. 1237
7-178. EMIF_IRQ_EOI Register Field Descriptions ......................................................................... 1237
7-179. Register Call Summary for EMIF_IRQ_EOI ......................................................................... 1237
7-180. EMIF_IRQSTATUS_RAW_SYS Instances .......................................................................... 1238
7-181. EMIF_IRQSTATUS_RAW_SYS Register Field Descriptions...................................................... 1238
7-182. Register Call Summary for EMIF_IRQSTATUS_RAW_SYS ...................................................... 1238
7-183. EMIF_IRQSTATUS_SYS Instances .................................................................................. 1239
7-184. EMIF_IRQSTATUS_SYS Register Field Descriptions ............................................................. 1239
7-185. Register Call Summary for EMIF_IRQSTATUS_SYS .............................................................. 1239
7-186. EMIF_IRQENABLE_SET_SYS Instances
...........................................................................
1240
7-187. EMIF_IRQENABLE_SET_SYS Register Field Descriptions....................................................... 1240
7-188. Register Call Summary for EMIF_IRQENABLE_SET_SYS ....................................................... 1240
7-189. EMIF_IRQENABLE_CLR_SYS Instances ........................................................................... 1241
7-190. EMIF_IRQENABLE_CLR_SYS Register Field Descriptions
......................................................
1241
7-191. Register Call Summary for EMIF_IRQENABLE_CLR_SYS ....................................................... 1241
7-192. EMIF_ZQ_CONFIG Instances ......................................................................................... 1242
7-193. EMIF_ZQ_CONFIG Register Field Descriptions .................................................................... 1242
....................................................................
EMIF_PRI_COS_MAP Instances .....................................................................................
EMIF_PRI_COS_MAP Register Field Descriptions ................................................................
Register Call Summary for EMIF_PRI_COS_MAP .................................................................
EMIF_MSTID_COS_1_MAP Instances ..............................................................................
EMIF_MSTID_COS_1_MAP Register Field Descriptions..........................................................
Register Call Summary for EMIF_MSTID_COS_1_MAP ..........................................................
EMIF_MSTID_COS_2_MAP Instances ..............................................................................
EMIF_MSTID_COS_2_MAP Register Field Descriptions..........................................................
Register Call Summary for EMIF_MSTID_COS_2_MAP ..........................................................
EMIF_ECCCTL Instances ..............................................................................................
EMIF_ECCCTL Register Field Descriptions .........................................................................
Register Call Summary for EMIF_ECCCTL .........................................................................
EMIF_ECCADDR1 Instances ..........................................................................................
EMIF_ECCADDR1 Register Field Descriptions .....................................................................
Register Call Summary for EMIF_ECCADDR1 .....................................................................
EMIF_ECCADDR2 Instances ..........................................................................................
EMIF_ECCADDR2 Register Field Descriptions .....................................................................
Register Call Summary for EMIF_ECCADDR2 .....................................................................
7-194. Register Call Summary for EMIF_ZQ_CONFIG
1243
7-195.
1244
7-196.
7-197.
7-198.
7-199.
7-200.
7-201.
7-202.
7-203.
7-204.
7-205.
7-206.
7-207.
7-208.
7-209.
7-210.
7-211.
7-212.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1244
1245
1246
1246
1247
1248
1248
1249
1250
1250
1251
1252
1252
1252
1253
1253
1253
101
www.ti.com
7-213. EMIF_RWTHRESH Instances ......................................................................................... 1254
7-214. EMIF_RWTHRESH Register Field Descriptions .................................................................... 1254
7-215. Register Call Summary for EMIF_RWTHRESH ..................................................................... 1254
.......................................................................
EMIF_ONE_BIT_ECC_ERR_CNT Register Field Descriptions ...................................................
Register Call Summary for EMIF_ONE_BIT_ECC_ERR_CNT ...................................................
EMIF_ONE_BIT_ECC_ERR_THRSH Instances ....................................................................
EMIF_ONE_BIT_ECC_ERR_THRSH Register Field Descriptions ...............................................
Register Call Summary for EMIF_ONE_BIT_ECC_ERR_THRSH ...............................................
EMIF_ONE_BIT_ECC_ERR_DIST_1 Instances ....................................................................
EMIF_ONE_BIT_ECC_ERR_DIST_1 Register Field Descriptions ...............................................
Register Call Summary for EMIF_ONE_BIT_ECC_ERR_DIST_1 ................................................
EMIF_ONE_BIT_ECC_ERR_ADDR_LOG Instances ..............................................................
EMIF_ONE_BIT_ECC_ERR_ADDR_LOG Register Field Descriptions .........................................
Register Call Summary for EMIF_ONE_BIT_ECC_ERR_ADDR_LOG ..........................................
EMIF_TWO_BIT_ECC_ERR_ADDR_LOG Instances ..............................................................
EMIF_TWO_BIT_ECC_ERR_ADDR_LOG Register Field Descriptions .........................................
Register Call Summary for EMIF_TWO_BIT_ECC_ERR_ADDR_LOG .........................................
EMIF_ONE_BIT_ECC_ERR_DIST_2 Instances ....................................................................
EMIF_ONE_BIT_ECC_ERR_DIST_2 Register Field Descriptions ...............................................
Register Call Summary for EMIF_ONE_BIT_ECC_ERR_DIST_2 ................................................
DDR_PHY_PIR Instances..............................................................................................
DDR_PHY_PIR Register Field Descriptions .........................................................................
Register Call Summary for DDR_PHY_PIR .........................................................................
DDR_PHY_PGCR0 Instances .........................................................................................
DDR_PHY_PGCR0 Register Field Descriptions ....................................................................
Register Call Summary for DDR_PHY_PGCR0 ....................................................................
DDR_PHY_PGCR1 Instances .........................................................................................
DDR_PHY_PGCR1 Register Field Descriptions ....................................................................
Register Call Summary for DDR_PHY_PGCR1 ....................................................................
DDR_PHY_PGCR2 Instances .........................................................................................
DDR_PHY_PGCR2 Register Field Descriptions ....................................................................
Register Call Summary for DDR_PHY_PGCR2 ....................................................................
DDR_PHY_PGSR0 Instances .........................................................................................
DDR_PHY_PGSR0 Register Field Descriptions ....................................................................
Register Call Summary for DDR_PHY_PGSR0 .....................................................................
DDR_PHY_PGSR1 Instances .........................................................................................
DDR_PHY_PGSR1 Register Field Descriptions ....................................................................
Register Call Summary for DDR_PHY_PGSR1 .....................................................................
DDR_PHY_PLLCR Instances .........................................................................................
DDR_PHY_PLLCR Register Field Descriptions.....................................................................
Register Call Summary for DDR_PHY_PLLCR .....................................................................
DDR_PHY_PTR0 Instances ...........................................................................................
DDR_PHY_PTR0 Register Field Descriptions ......................................................................
Register Call Summary for DDR_PHY_PTR0 .......................................................................
DDR_PHY_PTR1 Instances ...........................................................................................
DDR_PHY_PTR1 Register Field Descriptions ......................................................................
Register Call Summary for DDR_PHY_PTR1 .......................................................................
DDR_PHY_PTR2 Instances ...........................................................................................
7-216. EMIF_ONE_BIT_ECC_ERR_CNT Instances
7-217.
7-218.
7-219.
7-220.
7-221.
7-222.
7-223.
7-224.
7-225.
7-226.
7-227.
7-228.
7-229.
7-230.
7-231.
7-232.
7-233.
7-234.
7-235.
7-236.
7-237.
7-238.
7-239.
7-240.
7-241.
7-242.
7-243.
7-244.
7-245.
7-246.
7-247.
7-248.
7-249.
7-250.
7-251.
7-252.
7-253.
7-254.
7-255.
7-256.
7-257.
7-258.
7-259.
7-260.
7-261.
102
List of Tables
1255
1255
1255
1256
1256
1256
1257
1257
1257
1258
1258
1258
1259
1259
1259
1260
1260
1260
1261
1261
1263
1264
1264
1266
1267
1267
1269
1270
1270
1271
1272
1272
1273
1274
1274
1274
1275
1275
1276
1277
1277
1277
1278
1278
1278
1279
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
7-262. DDR_PHY_PTR2 Register Field Descriptions ...................................................................... 1279
7-263. Register Call Summary for DDR_PHY_PTR2 ....................................................................... 1279
7-264. DDR_PHY_PTR3 Instances ........................................................................................... 1280
7-265. DDR_PHY_PTR3 Register Field Descriptions ...................................................................... 1280
7-266. Register Call Summary for DDR_PHY_PTR3 ....................................................................... 1280
7-267. DDR_PHY_PTR4 Instances ........................................................................................... 1281
7-268. DDR_PHY_PTR4 Register Field Descriptions ...................................................................... 1281
7-269. Register Call Summary for DDR_PHY_PTR4 ....................................................................... 1281
7-270. DDR_PHY_ACIOCR Instances........................................................................................ 1282
7-271. DDR_PHY_ACIOCR Register Field Descriptions ................................................................... 1282
7-272. Register Call Summary for DDR_PHY_ACIOCR ................................................................... 1282
7-273. DDR_PHY_DXCCR Instances
........................................................................................
1283
7-274. DDR_PHY_DXCCR Register Field Descriptions .................................................................... 1283
7-275. Register Call Summary for DDR_PHY_DXCCR .................................................................... 1284
7-276. DDR_PHY_DCR Instances ............................................................................................ 1285
.......................................................................
Register Call Summary for DDR_PHY_DCR ........................................................................
DDR_PHY_DTPR0 Instances .........................................................................................
DDR_PHY_DTPR0 Register Field Descriptions ....................................................................
Register Call Summary for DDR_PHY_DTPR0 .....................................................................
DDR_PHY_DTPR1 Instances .........................................................................................
DDR_PHY_DTPR1 Register Field Descriptions ....................................................................
Register Call Summary for DDR_PHY_DTPR1 .....................................................................
DDR_PHY_DTPR2 Instances .........................................................................................
DDR_PHY_DTPR2 Register Field Descriptions ....................................................................
Register Call Summary for DDR_PHY_DTPR2 .....................................................................
DDR_PHY_MR0 Instances ............................................................................................
DDR_PHY_MR0 Register Field Descriptions........................................................................
Register Call Summary for DDR_PHY_MR0 ........................................................................
DDR_PHY_MR1 Instances ............................................................................................
DDR_PHY_MR1 Register Field Descriptions........................................................................
Register Call Summary for DDR_PHY_MR1 ........................................................................
DDR_PHY_MR2 Instances ............................................................................................
DDR_PHY_MR2 Register Field Descriptions........................................................................
Register Call Summary for DDR_PHY_MR2 ........................................................................
DDR_PHY_MR3 Instances ............................................................................................
DDR_PHY_MR3 Register Field Descriptions........................................................................
Register Call Summary for DDR_PHY_MR3 ........................................................................
DDR_PHY_ODTCR Instances ........................................................................................
DDR_PHY_ODTCR Register Field Descriptions ....................................................................
Register Call Summary for DDR_PHY_ODTCR ....................................................................
DDR_PHY_DTCR Instances...........................................................................................
DDR_PHY_DTCR Register Field Descriptions ......................................................................
Register Call Summary for DDR_PHY_DTCR ......................................................................
DDR_PHY_ZQ0CR0 Instances .......................................................................................
DDR_PHY_ZQ0CR0 Register Field Descriptions...................................................................
Register Call Summary for DDR_PHY_ZQ0CR0 ...................................................................
DDR_PHY_ZQ0CR1 Instances .......................................................................................
DDR_PHY_ZQ0CR1 Register Field Descriptions...................................................................
7-277. DDR_PHY_DCR Register Field Descriptions
1285
7-278.
1286
7-279.
7-280.
7-281.
7-282.
7-283.
7-284.
7-285.
7-286.
7-287.
7-288.
7-289.
7-290.
7-291.
7-292.
7-293.
7-294.
7-295.
7-296.
7-297.
7-298.
7-299.
7-300.
7-301.
7-302.
7-303.
7-304.
7-305.
7-306.
7-307.
7-308.
7-309.
7-310.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1287
1287
1287
1288
1288
1289
1290
1290
1291
1292
1292
1293
1294
1294
1295
1296
1296
1297
1298
1298
1298
1299
1299
1299
1301
1301
1302
1303
1303
1303
1304
1304
103
www.ti.com
7-311. Register Call Summary for DDR_PHY_ZQ0CR1 ................................................................... 1304
7-312. DDR_PHY_ZQ0SR0 Instances........................................................................................ 1305
7-313. DDR_PHY_ZQ0SR0 Register Field Descriptions ................................................................... 1305
7-314. Register Call Summary for DDR_PHY_ZQ0SR0 ................................................................... 1305
7-315. DDR_PHY_ZQ0SR1 Instances........................................................................................ 1306
7-316. DDR_PHY_ZQ0SR1 Register Field Descriptions ................................................................... 1306
7-317. Register Call Summary for DDR_PHY_ZQ0SR1 ................................................................... 1306
7-318. DDR_PHY_ZQ1CR0 Instances
.......................................................................................
1307
7-319. DDR_PHY_ZQ1CR0 Register Field Descriptions................................................................... 1307
7-320. Register Call Summary for DDR_PHY_ZQ1CR0 ................................................................... 1307
1308
7-322.
1308
7-323.
7-324.
7-325.
7-326.
7-327.
7-328.
7-329.
7-330.
7-331.
7-332.
7-333.
7-334.
7-335.
7-336.
7-337.
7-338.
7-339.
7-340.
7-341.
7-342.
7-343.
7-344.
7-345.
7-346.
7-347.
7-348.
7-349.
7-350.
7-351.
7-352.
7-353.
7-354.
7-355.
7-356.
7-357.
7-358.
7-359.
104
.......................................................................................
DDR_PHY_ZQ1CR1 Register Field Descriptions...................................................................
Register Call Summary for DDR_PHY_ZQ1CR1 ...................................................................
DDR_PHY_ZQ1SR0 Instances........................................................................................
DDR_PHY_ZQ1SR0 Register Field Descriptions ...................................................................
Register Call Summary for DDR_PHY_ZQ1SR0 ...................................................................
DDR_PHY_ZQ1SR1 Instances........................................................................................
DDR_PHY_ZQ1SR1 Register Field Descriptions ...................................................................
Register Call Summary for DDR_PHY_ZQ1SR1 ...................................................................
DDR_PHY_ZQ2CR0 Instances .......................................................................................
DDR_PHY_ZQ2CR0 Register Field Descriptions...................................................................
Register Call Summary for DDR_PHY_ZQ2CR0 ...................................................................
DDR_PHY_ZQ2CR1 Instances .......................................................................................
DDR_PHY_ZQ2CR1 Register Field Descriptions...................................................................
Register Call Summary for DDR_PHY_ZQ2CR1 ...................................................................
DDR_PHY_ZQ2SR0 Instances........................................................................................
DDR_PHY_ZQ2SR0 Register Field Descriptions ...................................................................
Register Call Summary for DDR_PHY_ZQ2SR0 ...................................................................
DDR_PHY_ZQ2SR1 Instances........................................................................................
DDR_PHY_ZQ2SR1 Register Field Descriptions ...................................................................
Register Call Summary for DDR_PHY_ZQ2SR1 ...................................................................
DDR_PHY_DX0GCR Instances .......................................................................................
DDR_PHY_DX0GCR Register Field Descriptions ..................................................................
Register Call Summary for DDR_PHY_DX0GCR...................................................................
DDR_PHY_DX0GSR0 Instances .....................................................................................
DDR_PHY_DX0GSR0 Register Field Descriptions .................................................................
Register Call Summary for DDR_PHY_DX0GSR0 .................................................................
DDR_PHY_DX0GSR2 Instances .....................................................................................
DDR_PHY_DX0GSR2 Register Field Descriptions .................................................................
Register Call Summary for DDR_PHY_DX0GSR2 .................................................................
DDR_PHY_DX0LCDLR0 Instances ..................................................................................
DDR_PHY_DX0LCDLR0 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX0LCDLR0 ..............................................................
DDR_PHY_DX0LCDLR1 Instances ..................................................................................
DDR_PHY_DX0LCDLR1 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX0LCDLR1 ..............................................................
DDR_PHY_DX0LCDLR2 Instances ..................................................................................
DDR_PHY_DX0LCDLR2 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX0LCDLR2 ..............................................................
7-321. DDR_PHY_ZQ1CR1 Instances
List of Tables
1308
1309
1309
1309
1310
1310
1310
1311
1311
1311
1312
1312
1312
1313
1313
1313
1314
1314
1314
1315
1315
1317
1318
1318
1319
1320
1320
1321
1322
1322
1322
1323
1323
1323
1324
1324
1324
SPRUHY8I – January 2016 – Revised March 2019
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7-360. DDR_PHY_DX0MDLR Instances ..................................................................................... 1325
7-361. DDR_PHY_DX0MDLR Register Field Descriptions ................................................................ 1325
7-362. Register Call Summary for DDR_PHY_DX0MDLR ................................................................. 1325
7-363. DDR_PHY_DX0GTR Instances ....................................................................................... 1326
7-364. DDR_PHY_DX0GTR Register Field Descriptions .................................................................. 1326
7-365. Register Call Summary for DDR_PHY_DX0GTR ................................................................... 1327
7-366. DDR_PHY_DX1GCR Instances ....................................................................................... 1328
7-367. DDR_PHY_DX1GCR Register Field Descriptions .................................................................. 1328
7-368. Register Call Summary for DDR_PHY_DX1GCR................................................................... 1330
7-369. DDR_PHY_DX1GSR0 Instances
.....................................................................................
1331
7-370. DDR_PHY_DX1GSR0 Register Field Descriptions ................................................................. 1331
7-371. Register Call Summary for DDR_PHY_DX1GSR0 ................................................................. 1332
7-372. DDR_PHY_DX1GSR2 Instances
.....................................................................................
1333
7-373. DDR_PHY_DX1GSR2 Register Field Descriptions ................................................................. 1333
7-374. Register Call Summary for DDR_PHY_DX1GSR2 ................................................................. 1334
..................................................................................
DDR_PHY_DX1LCDLR0 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX1LCDLR0 ..............................................................
DDR_PHY_DX1LCDLR1 Instances ..................................................................................
DDR_PHY_DX1LCDLR1 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX1LCDLR1 ..............................................................
DDR_PHY_DX1LCDLR2 Instances ..................................................................................
DDR_PHY_DX1LCDLR2 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX1LCDLR2 ..............................................................
DDR_PHY_DX1MDLR Instances .....................................................................................
DDR_PHY_DX1MDLR Register Field Descriptions ................................................................
Register Call Summary for DDR_PHY_DX1MDLR .................................................................
DDR_PHY_DX1GTR Instances .......................................................................................
DDR_PHY_DX1GTR Register Field Descriptions ..................................................................
Register Call Summary for DDR_PHY_DX1GTR ...................................................................
DDR_PHY_DX2GCR Instances .......................................................................................
DDR_PHY_DX2GCR Register Field Descriptions ..................................................................
Register Call Summary for DDR_PHY_DX2GCR...................................................................
DDR_PHY_DX2GSR0 Instances .....................................................................................
DDR_PHY_DX2GSR0 Register Field Descriptions .................................................................
Register Call Summary for DDR_PHY_DX2GSR0 .................................................................
DDR_PHY_DX2GSR2 Instances .....................................................................................
DDR_PHY_DX2GSR2 Register Field Descriptions .................................................................
Register Call Summary for DDR_PHY_DX2GSR2 .................................................................
DDR_PHY_DX2LCDLR0 Instances ..................................................................................
DDR_PHY_DX2LCDLR0 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX2LCDLR0 ..............................................................
DDR_PHY_DX2LCDLR1 Instances ..................................................................................
DDR_PHY_DX2LCDLR1 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX2LCDLR1 ..............................................................
DDR_PHY_DX2LCDLR2 Instances ..................................................................................
DDR_PHY_DX2LCDLR2 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX2LCDLR2 ..............................................................
DDR_PHY_DX2MDLR Instances .....................................................................................
7-375. DDR_PHY_DX1LCDLR0 Instances
1335
7-376.
1335
7-377.
7-378.
7-379.
7-380.
7-381.
7-382.
7-383.
7-384.
7-385.
7-386.
7-387.
7-388.
7-389.
7-390.
7-391.
7-392.
7-393.
7-394.
7-395.
7-396.
7-397.
7-398.
7-399.
7-400.
7-401.
7-402.
7-403.
7-404.
7-405.
7-406.
7-407.
7-408.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1335
1336
1336
1336
1337
1337
1337
1338
1338
1338
1339
1339
1340
1341
1341
1343
1344
1344
1345
1346
1346
1347
1348
1348
1348
1349
1349
1349
1350
1350
1350
1351
105
www.ti.com
7-409. DDR_PHY_DX2MDLR Register Field Descriptions ................................................................ 1351
7-410. Register Call Summary for DDR_PHY_DX2MDLR ................................................................. 1351
7-411. DDR_PHY_DX2GTR Instances ....................................................................................... 1352
7-412. DDR_PHY_DX2GTR Register Field Descriptions .................................................................. 1352
7-413. Register Call Summary for DDR_PHY_DX2GTR ................................................................... 1353
7-414. DDR_PHY_DX3GCR Instances ....................................................................................... 1354
7-415. DDR_PHY_DX3GCR Register Field Descriptions .................................................................. 1354
7-416. Register Call Summary for DDR_PHY_DX3GCR................................................................... 1356
1357
7-418.
1357
7-419.
7-420.
7-421.
7-422.
7-423.
7-424.
7-425.
7-426.
7-427.
7-428.
7-429.
7-430.
7-431.
7-432.
7-433.
7-434.
7-435.
7-436.
7-437.
7-438.
7-439.
7-440.
7-441.
7-442.
7-443.
7-444.
7-445.
7-446.
7-447.
7-448.
7-449.
7-450.
7-451.
7-452.
7-453.
7-454.
7-455.
7-456.
7-457.
106
.....................................................................................
DDR_PHY_DX3GSR0 Register Field Descriptions .................................................................
Register Call Summary for DDR_PHY_DX3GSR0 .................................................................
DDR_PHY_DX3GSR2 Instances .....................................................................................
DDR_PHY_DX3GSR2 Register Field Descriptions .................................................................
Register Call Summary for DDR_PHY_DX3GSR2 .................................................................
DDR_PHY_DX3LCDLR0 Instances ..................................................................................
DDR_PHY_DX3LCDLR0 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX3LCDLR0 ..............................................................
DDR_PHY_DX3LCDLR1 Instances ..................................................................................
DDR_PHY_DX3LCDLR1 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX3LCDLR1 ..............................................................
DDR_PHY_DX3LCDLR2 Instances ..................................................................................
DDR_PHY_DX3LCDLR2 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX3LCDLR2 ..............................................................
DDR_PHY_DX3MDLR Instances .....................................................................................
DDR_PHY_DX3MDLR Register Field Descriptions ................................................................
Register Call Summary for DDR_PHY_DX3MDLR .................................................................
DDR_PHY_DX3GTR Instances .......................................................................................
DDR_PHY_DX3GTR Register Field Descriptions ..................................................................
Register Call Summary for DDR_PHY_DX3GTR ...................................................................
DDR_PHY_DX8GCR Instances .......................................................................................
DDR_PHY_DX8GCR Register Field Descriptions ..................................................................
Register Call Summary for DDR_PHY_DX8GCR...................................................................
DDR_PHY_DX8GSR0 Instances .....................................................................................
DDR_PHY_DX8GSR0 Register Field Descriptions .................................................................
Register Call Summary for DDR_PHY_DX8GSR0 .................................................................
DDR_PHY_DX8GSR2 Instances .....................................................................................
DDR_PHY_DX8GSR2 Register Field Descriptions .................................................................
Register Call Summary for DDR_PHY_DX8GSR2 .................................................................
DDR_PHY_DX8LCDLR0 Instances ..................................................................................
DDR_PHY_DX8LCDLR0 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX8LCDLR0 ..............................................................
DDR_PHY_DX8LCDLR1 Instances ..................................................................................
DDR_PHY_DX8LCDLR1 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX8LCDLR1 ..............................................................
DDR_PHY_DX8LCDLR2 Instances ..................................................................................
DDR_PHY_DX8LCDLR2 Register Field Descriptions ..............................................................
Register Call Summary for DDR_PHY_DX8LCDLR2 ..............................................................
DDR_PHY_DX8MDLR Instances .....................................................................................
DDR_PHY_DX8MDLR Register Field Descriptions ................................................................
7-417. DDR_PHY_DX3GSR0 Instances
List of Tables
1358
1359
1359
1360
1361
1361
1361
1362
1362
1362
1363
1363
1363
1364
1364
1364
1365
1365
1366
1367
1367
1369
1370
1370
1371
1372
1372
1373
1374
1374
1374
1375
1375
1375
1376
1376
1376
1377
1377
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
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7-458. Register Call Summary for DDR_PHY_DX8MDLR ................................................................. 1377
7-459. DDR_PHY_DX8GTR Instances ....................................................................................... 1378
7-460. DDR_PHY_DX8GTR Register Field Descriptions .................................................................. 1378
7-461. Register Call Summary for DDR_PHY_DX8GTR ................................................................... 1379
7-462. GPMC I/O Description .................................................................................................. 1384
7-463. GPMC Pin Multiplexing Options ....................................................................................... 1384
7-464. GPMC Integration Attributes ........................................................................................... 1386
7-465. GPMC Clocks and Resets ............................................................................................. 1386
7-466. GPMC Hardware Requests ............................................................................................ 1387
7-467. GPMC Clocks ............................................................................................................ 1390
7-468. GPMC_CLK Configuration ............................................................................................. 1390
7-469. GPMC Local Power-Management Features ......................................................................... 1390
7-470. GPMC Interrupt Events ................................................................................................. 1390
7-471. Idle Cycle Insertion Configuration ..................................................................................... 1402
7-472. Chip-Select Configuration for NAND Interfacing .................................................................... 1431
7-473. ECC Enable Settings ................................................................................................... 1439
7-474. Flattened BCH Codeword Mapping (512 Bytes + 104 Bits) ....................................................... 1444
7-475. Aligned Message Byte Mapping in 8-Bit NAND ..................................................................... 1445
...................................................................
Aligned Nibble Mapping of Message in 8-Bit NAND ................................................................
Misaligned Nibble Mapping of Message in 8-Bit NAND ............................................................
Aligned Nibble Mapping of Message in 16-Bit NAND ..............................................................
Misaligned Nibble Mapping of Message in 16-Bit NAND (1 Unused Nibble)....................................
Misaligned Nibble Mapping of Message in 16-Bit NAND (2 Unused Nibbles) ..................................
Misaligned Nibble Mapping of Message in 16-Bit NAND (3 Unused Nibbles) ..................................
Prefetch Mode Configuration ..........................................................................................
Write-Posting Mode Configuration ....................................................................................
GPMC Configuration in NOR Mode...................................................................................
GPMC Configuration in NAND Mode .................................................................................
Reset GPMC .............................................................................................................
NOR Memory Type .....................................................................................................
NOR Chip-Select Configuration .......................................................................................
NOR Timings Configuration ............................................................................................
WAIT Pin Configuration ................................................................................................
Enable Chip-Select ......................................................................................................
NAND Memory Type ....................................................................................................
NAND Chip-Select Configuration......................................................................................
Asynchronous Read and Write Operations ..........................................................................
ECC Engine ..............................................................................................................
Prefetch and Write-Posting Engine ...................................................................................
WAIT Pin Configuration ................................................................................................
Enable Chip-Select ......................................................................................................
Mode Parameters Check List .........................................................................................
Access Type Parameters Check List ................................................................................
Timing Parameters ......................................................................................................
NAND Formulas Description ..........................................................................................
Synchronous NOR Formulas Description ...........................................................................
Asynchronous NOR Formulas Description ..........................................................................
GPMC Signals ...........................................................................................................
7-476. Aligned Message Byte Mapping in 16-Bit NAND
7-477.
7-478.
7-479.
7-480.
7-481.
7-482.
7-483.
7-484.
7-485.
7-486.
7-487.
7-488.
7-489.
7-490.
7-491.
7-492.
7-493.
7-494.
7-495.
7-496.
7-497.
7-498.
7-499.
7-500.
7-501.
7-502.
7-503.
7-504.
7-505.
7-506.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1445
1446
1446
1446
1446
1446
1447
1457
1458
1464
1464
1464
1464
1465
1465
1465
1465
1465
1465
1466
1466
1466
1467
1467
1467
1467
1469
1471
1472
1476
1479
107
www.ti.com
7-507. Useful Timing Parameters on the Memory Side .................................................................... 1480
7-508. Calculating GPMC Timing Parameters ............................................................................... 1481
7-509. AC Characteristics for Asynchronous Read Access ................................................................ 1482
1483
7-511.
1484
7-512.
7-513.
7-514.
7-515.
7-516.
7-517.
7-518.
7-519.
7-520.
7-521.
7-522.
7-523.
7-524.
7-525.
7-526.
7-527.
7-528.
7-529.
7-530.
7-531.
7-532.
7-533.
7-534.
7-535.
7-536.
7-537.
7-538.
7-539.
7-540.
7-541.
7-542.
7-543.
7-544.
7-545.
7-546.
7-547.
7-548.
7-549.
7-550.
7-551.
7-552.
7-553.
7-554.
7-555.
108
......................................................
AC Characteristics for Asynchronous Single Write (Memory Side)...............................................
GPMC Timing Parameters for Asynchronous Single Write ........................................................
Supported Memory Interfaces .........................................................................................
NAND Interface Bus Operations Summary ..........................................................................
NOR Interface Bus Operations Summary ............................................................................
GPMC Instances ........................................................................................................
GPMC Registers ........................................................................................................
GPMC_REVISION Instances ..........................................................................................
GPMC_REVISION Register Field Descriptions .....................................................................
Register Call Summary for GPMC_REVISION ......................................................................
GPMC_SYSCONFIG Instances .......................................................................................
GPMC_SYSCONFIG Register Field Descriptions ..................................................................
Register Call Summary for GPMC_SYSCONFIG ...................................................................
GPMC_SYSSTATUS Instances .......................................................................................
GPMC_SYSSTATUS Register Field Descriptions ..................................................................
Register Call Summary for GPMC_SYSSTATUS...................................................................
GPMC_IRQSTATUS Instances .......................................................................................
GPMC_IRQSTATUS Register Field Descriptions...................................................................
Register Call Summary for GPMC_IRQSTATUS ...................................................................
GPMC_IRQENABLE Instances .......................................................................................
GPMC_IRQENABLE Register Field Descriptions...................................................................
Register Call Summary for GPMC_IRQENABLE ...................................................................
GPMC_TIMEOUT_CONTROL Instances ............................................................................
GPMC_TIMEOUT_CONTROL Register Field Descriptions .......................................................
Register Call Summary for GPMC_TIMEOUT_CONTROL ........................................................
GPMC_ERR_ADDRESS Instances...................................................................................
GPMC_ERR_ADDRESS Register Field Descriptions ..............................................................
Register Call Summary for GPMC_ERR_ADDRESS ..............................................................
GPMC_ERR_TYPE Instances.........................................................................................
GPMC_ERR_TYPE Register Field Descriptions ....................................................................
Register Call Summary for GPMC_ERR_TYPE ....................................................................
GPMC_CONFIG Instances ............................................................................................
GPMC_CONFIG Register Field Descriptions........................................................................
Register Call Summary for GPMC_CONFIG ........................................................................
GPMC_STATUS Instances ............................................................................................
GPMC_STATUS Register Field Descriptions .......................................................................
Register Call Summary for GPMC_STATUS ........................................................................
GPMC_CONFIG1_i Instances .........................................................................................
GPMC_CONFIG1_i Register Field Descriptions ....................................................................
Register Call Summary for GPMC_CONFIG1_i ....................................................................
GPMC_CONFIG2_i Instances .........................................................................................
GPMC_CONFIG2_i Register Field Descriptions ....................................................................
Register Call Summary for GPMC_CONFIG2_i ....................................................................
GPMC_CONFIG3_i Instances .........................................................................................
GPMC_CONFIG3_i Register Field Descriptions ....................................................................
7-510. GPMC Timing Parameters for Asynchronous Read Access
List of Tables
1484
1485
1486
1487
1488
1488
1490
1490
1490
1491
1491
1491
1493
1493
1493
1494
1494
1495
1496
1496
1497
1498
1498
1498
1499
1499
1499
1500
1500
1500
1502
1502
1502
1504
1504
1504
1505
1505
1507
1508
1508
1509
1510
1510
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
....................................................................
GPMC_CONFIG4_i Instances .........................................................................................
GPMC_CONFIG4_i Register Field Descriptions ....................................................................
Register Call Summary for GPMC_CONFIG4_i ....................................................................
GPMC_CONFIG5_i Instances .........................................................................................
GPMC_CONFIG5_i Register Field Descriptions ....................................................................
Register Call Summary for GPMC_CONFIG5_i ....................................................................
GPMC_CONFIG6_i Instances .........................................................................................
GPMC_CONFIG6_i Register Field Descriptions ....................................................................
Register Call Summary for GPMC_CONFIG6_i ....................................................................
GPMC_CONFIG7_i Instances .........................................................................................
GPMC_CONFIG7_i Register Field Descriptions ....................................................................
Register Call Summary for GPMC_CONFIG7_i ....................................................................
GPMC_NAND_COMMAND_i Instances .............................................................................
GPMC_NAND_COMMAND_i Register Field Descriptions.........................................................
Register Call Summary for GPMC_NAND_COMMAND_i .........................................................
GPMC_NAND_ADDRESS_i Instances...............................................................................
GPMC_NAND_ADDRESS_i Register Field Descriptions ..........................................................
Register Call Summary for GPMC_NAND_ADDRESS_i ..........................................................
GPMC_NAND_DATA_i Instances ....................................................................................
GPMC_NAND_DATA_i Register Field Descriptions................................................................
Register Call Summary for GPMC_NAND_DATA_i ................................................................
GPMC_PREFETCH_CONFIG1 Instances ...........................................................................
GPMC_PREFETCH_CONFIG1 Register Field Descriptions ......................................................
Register Call Summary for GPMC_PREFETCH_CONFIG1.......................................................
GPMC_PREFETCH_CONFIG2 Instances ...........................................................................
GPMC_PREFETCH_CONFIG2 Register Field Descriptions ......................................................
Register Call Summary for GPMC_PREFETCH_CONFIG2.......................................................
GPMC_PREFETCH_CONTROL Instances..........................................................................
GPMC_PREFETCH_CONTROL Register Field Descriptions .....................................................
Register Call Summary for GPMC_PREFETCH_CONTROL .....................................................
GPMC_PREFETCH_STATUS Instances ............................................................................
GPMC_PREFETCH_STATUS Register Field Descriptions .......................................................
Register Call Summary for GPMC_PREFETCH_STATUS ........................................................
GPMC_ECC_CONFIG Instances .....................................................................................
GPMC_ECC_CONFIG Register Field Descriptions ................................................................
Register Call Summary for GPMC_ECC_CONFIG .................................................................
GPMC_ECC_CONTROL Instances ..................................................................................
GPMC_ECC_CONTROL Register Field Descriptions ..............................................................
Register Call Summary for GPMC_ECC_CONTROL ..............................................................
GPMC_ECC_SIZE_CONFIG Instances ..............................................................................
GPMC_ECC_SIZE_CONFIG Register Field Descriptions .........................................................
Register Call Summary for GPMC_ECC_SIZE_CONFIG .........................................................
GPMC_ECCj_RESULT Instances ....................................................................................
GPMC_ECCj_RESULT Register Field Descriptions................................................................
Register Call Summary for GPMC_ECCj_RESULT ................................................................
GPMC_BCH_RESULT0_i Instances .................................................................................
GPMC_BCH_RESULT0_i Register Field Descriptions.............................................................
Register Call Summary for GPMC_BCH_RESULT0_i .............................................................
7-556. Register Call Summary for GPMC_CONFIG3_i
1511
7-557.
1512
7-558.
7-559.
7-560.
7-561.
7-562.
7-563.
7-564.
7-565.
7-566.
7-567.
7-568.
7-569.
7-570.
7-571.
7-572.
7-573.
7-574.
7-575.
7-576.
7-577.
7-578.
7-579.
7-580.
7-581.
7-582.
7-583.
7-584.
7-585.
7-586.
7-587.
7-588.
7-589.
7-590.
7-591.
7-592.
7-593.
7-594.
7-595.
7-596.
7-597.
7-598.
7-599.
7-600.
7-601.
7-602.
7-603.
7-604.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1512
1513
1514
1514
1515
1516
1516
1517
1518
1518
1518
1520
1520
1520
1521
1521
1521
1522
1522
1522
1523
1523
1524
1526
1526
1526
1527
1527
1527
1528
1528
1529
1530
1530
1531
1532
1532
1533
1534
1534
1535
1536
1536
1537
1538
1538
1538
109
www.ti.com
1539
7-606.
1539
7-607.
7-608.
7-609.
7-610.
7-611.
7-612.
7-613.
7-614.
7-615.
7-616.
7-617.
7-618.
7-619.
7-620.
7-621.
7-622.
7-623.
7-624.
7-625.
7-626.
7-627.
7-628.
7-629.
7-630.
7-631.
7-632.
7-633.
7-634.
7-635.
7-636.
7-637.
7-638.
7-639.
7-640.
7-641.
7-642.
7-643.
7-644.
7-645.
7-646.
7-647.
7-648.
7-649.
7-650.
7-651.
7-652.
7-653.
110
.................................................................................
GPMC_BCH_RESULT1_i Register Field Descriptions.............................................................
Register Call Summary for GPMC_BCH_RESULT1_i .............................................................
GPMC_BCH_RESULT2_i Instances .................................................................................
GPMC_BCH_RESULT2_i Register Field Descriptions.............................................................
Register Call Summary for GPMC_BCH_RESULT2_i .............................................................
GPMC_BCH_RESULT3_i Instances .................................................................................
GPMC_BCH_RESULT3_i Register Field Descriptions.............................................................
Register Call Summary for GPMC_BCH_RESULT3_i .............................................................
GPMC_BCH_SWDATA Instances ....................................................................................
GPMC_BCH_SWDATA Register Field Descriptions ...............................................................
Register Call Summary for GPMC_BCH_SWDATA ................................................................
GPMC_BCH_RESULT4_i Instances .................................................................................
GPMC_BCH_RESULT4_i Register Field Descriptions.............................................................
Register Call Summary for GPMC_BCH_RESULT4_i .............................................................
GPMC_BCH_RESULT5_i Instances .................................................................................
GPMC_BCH_RESULT5_i Register Field Descriptions.............................................................
Register Call Summary for GPMC_BCH_RESULT5_i .............................................................
GPMC_BCH_RESULT6_i Instances .................................................................................
GPMC_BCH_RESULT6_i Register Field Descriptions.............................................................
Register Call Summary for GPMC_BCH_RESULT6_i .............................................................
ELM Integration Attributes .............................................................................................
ELM Clocks and Resets ................................................................................................
ELM Hardware Requests...............................................................................................
Local Power-Management Features ..................................................................................
ELM Events ..............................................................................................................
ELM_LOCATION_STATUS_i Value Decoding .....................................................................
ELM Processing Initialization ..........................................................................................
ELM Processing Completion for Continuous Mode .................................................................
ELM Processing Completion for Page Mode ........................................................................
Use Case: Continuous Mode ..........................................................................................
16-Bit NAND Sector Buffer Address Map ............................................................................
Use Case: Page Mode .................................................................................................
ELM Instances ...........................................................................................................
ELM Registers ...........................................................................................................
ELM_REVISION Instances ............................................................................................
ELM_REVISION Register Field Descriptions ........................................................................
Register Call Summary for ELM_REVISION ........................................................................
ELM_SYSCONFIG Instances .........................................................................................
ELM_SYSCONFIG Register Field Descriptions .....................................................................
Register Call Summary for ELM_SYSCONFIG .....................................................................
ELM_SYSSTATUS Instances .........................................................................................
ELM_SYSSTATUS Register Field Descriptions.....................................................................
Register Call Summary for ELM_SYSSTATUS .....................................................................
ELM_IRQSTATUS Instances ..........................................................................................
ELM_IRQSTATUS Register Field Descriptions .....................................................................
Register Call Summary for ELM_IRQSTATUS ......................................................................
ELM_IRQENABLE Instances ..........................................................................................
ELM_IRQENABLE Register Field Descriptions .....................................................................
7-605. GPMC_BCH_RESULT1_i Instances
List of Tables
1539
1540
1540
1540
1541
1541
1541
1542
1542
1542
1543
1543
1543
1544
1544
1544
1545
1545
1545
1548
1548
1549
1550
1550
1551
1553
1553
1554
1554
1555
1556
1559
1559
1561
1561
1561
1562
1562
1563
1564
1564
1564
1565
1565
1566
1567
1567
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
7-654. Register Call Summary for ELM_IRQENABLE ...................................................................... 1567
7-655. ELM_LOCATION_CONFIG Instances................................................................................ 1569
7-656. ELM_LOCATION_CONFIG Register Field Descriptions ........................................................... 1569
7-657. Register Call Summary for ELM_LOCATION_CONFIG ........................................................... 1569
7-658. ELM_PAGE_CTRL Instances ......................................................................................... 1570
7-659. ELM_PAGE_CTRL Register Field Descriptions..................................................................... 1570
7-660. Register Call Summary for ELM_PAGE_CTRL ..................................................................... 1570
7-661. ELM_SYNDROME_FRAGMENT_0_i Instances .................................................................... 1572
7-662. ELM_SYNDROME_FRAGMENT_0_i Register Field Descriptions ............................................... 1572
7-663. Register Call Summary for ELM_SYNDROME_FRAGMENT_0_i ................................................ 1572
7-664. ELM_SYNDROME_FRAGMENT_1_i Instances .................................................................... 1573
7-665. ELM_SYNDROME_FRAGMENT_1_i Register Field Descriptions ............................................... 1573
7-666. Register Call Summary for ELM_SYNDROME_FRAGMENT_1_i ................................................ 1573
7-667. ELM_SYNDROME_FRAGMENT_2_i Instances .................................................................... 1574
7-668. ELM_SYNDROME_FRAGMENT_2_i Register Field Descriptions ............................................... 1574
7-669. Register Call Summary for ELM_SYNDROME_FRAGMENT_2_i ................................................ 1574
7-670. ELM_SYNDROME_FRAGMENT_3_i Instances .................................................................... 1575
7-671. ELM_SYNDROME_FRAGMENT_3_i Register Field Descriptions ............................................... 1575
7-672. Register Call Summary for ELM_SYNDROME_FRAGMENT_3_i ................................................ 1575
7-673. ELM_SYNDROME_FRAGMENT_4_i Instances .................................................................... 1576
7-674. ELM_SYNDROME_FRAGMENT_4_i Register Field Descriptions ............................................... 1576
7-675. Register Call Summary for ELM_SYNDROME_FRAGMENT_4_i ................................................ 1576
7-676. ELM_SYNDROME_FRAGMENT_5_i Instances .................................................................... 1577
7-677. ELM_SYNDROME_FRAGMENT_5_i Register Field Descriptions ............................................... 1577
7-678. Register Call Summary for ELM_SYNDROME_FRAGMENT_5_i ................................................ 1577
7-679. ELM_SYNDROME_FRAGMENT_6_i Instances .................................................................... 1578
7-680. ELM_SYNDROME_FRAGMENT_6_i Register Field Descriptions ............................................... 1578
7-681. Register Call Summary for ELM_SYNDROME_FRAGMENT_6_i ................................................ 1578
7-682. ELM_LOCATION_STATUS_i Instances ............................................................................. 1579
7-683. ELM_LOCATION_STATUS_i Register Field Descriptions......................................................... 1579
7-684. Register Call Summary for ELM_LOCATION_STATUS_i ......................................................... 1579
7-685. ELM_ERROR_LOCATION_0_i Instances ........................................................................... 1580
7-686. ELM_ERROR_LOCATION_0_i Register Field Descriptions
......................................................
1580
7-687. Register Call Summary for ELM_ERROR_LOCATION_0_i ....................................................... 1580
7-688. ELM_ERROR_LOCATION_1_i Instances ........................................................................... 1581
......................................................
Register Call Summary for ELM_ERROR_LOCATION_1_i .......................................................
ELM_ERROR_LOCATION_2_i Instances ...........................................................................
ELM_ERROR_LOCATION_2_i Register Field Descriptions ......................................................
Register Call Summary for ELM_ERROR_LOCATION_2_i .......................................................
ELM_ERROR_LOCATION_3_i Instances ...........................................................................
ELM_ERROR_LOCATION_3_i Register Field Descriptions ......................................................
Register Call Summary for ELM_ERROR_LOCATION_3_i .......................................................
ELM_ERROR_LOCATION_4_i Instances ...........................................................................
ELM_ERROR_LOCATION_4_i Register Field Descriptions ......................................................
Register Call Summary for ELM_ERROR_LOCATION_4_i .......................................................
ELM_ERROR_LOCATION_5_i Instances ...........................................................................
ELM_ERROR_LOCATION_5_i Register Field Descriptions ......................................................
Register Call Summary for ELM_ERROR_LOCATION_5_i .......................................................
7-689. ELM_ERROR_LOCATION_1_i Register Field Descriptions
1581
7-690.
1581
7-691.
7-692.
7-693.
7-694.
7-695.
7-696.
7-697.
7-698.
7-699.
7-700.
7-701.
7-702.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1582
1582
1582
1583
1583
1583
1584
1584
1584
1585
1585
1585
111
www.ti.com
7-703. ELM_ERROR_LOCATION_6_i Instances ........................................................................... 1586
7-704. ELM_ERROR_LOCATION_6_i Register Field Descriptions
......................................................
1586
7-705. Register Call Summary for ELM_ERROR_LOCATION_6_i ....................................................... 1586
7-706. ELM_ERROR_LOCATION_7_i Instances ........................................................................... 1587
7-707. ELM_ERROR_LOCATION_7_i Register Field Descriptions
......................................................
1587
7-708. Register Call Summary for ELM_ERROR_LOCATION_7_i ....................................................... 1587
7-709. ELM_ERROR_LOCATION_8_i Instances ........................................................................... 1588
7-710. ELM_ERROR_LOCATION_8_i Register Field Descriptions
......................................................
1588
7-711. Register Call Summary for ELM_ERROR_LOCATION_8_i ....................................................... 1588
7-712. ELM_ERROR_LOCATION_9_i Instances ........................................................................... 1589
1589
7-714.
1589
7-715.
7-716.
7-717.
7-718.
7-719.
7-720.
7-721.
7-722.
7-723.
7-724.
7-725.
7-726.
7-727.
7-728.
7-729.
7-730.
7-731.
7-732.
8-1.
8-2.
8-3.
8-4.
8-5.
8-6.
8-7.
8-8.
8-9.
8-10.
8-11.
8-12.
8-13.
8-14.
8-15.
8-16.
8-17.
8-18.
8-19.
112
......................................................
Register Call Summary for ELM_ERROR_LOCATION_9_i .......................................................
ELM_ERROR_LOCATION_10_i Instances ..........................................................................
ELM_ERROR_LOCATION_10_i Register Field Descriptions .....................................................
Register Call Summary for ELM_ERROR_LOCATION_10_i .....................................................
ELM_ERROR_LOCATION_11_i Instances ..........................................................................
ELM_ERROR_LOCATION_11_i Register Field Descriptions .....................................................
Register Call Summary for ELM_ERROR_LOCATION_11_i .....................................................
ELM_ERROR_LOCATION_12_i Instances ..........................................................................
ELM_ERROR_LOCATION_12_i Register Field Descriptions .....................................................
Register Call Summary for ELM_ERROR_LOCATION_12_i .....................................................
ELM_ERROR_LOCATION_13_i Instances ..........................................................................
ELM_ERROR_LOCATION_13_i Register Field Descriptions .....................................................
Register Call Summary for ELM_ERROR_LOCATION_13_i .....................................................
ELM_ERROR_LOCATION_14_i Instances ..........................................................................
ELM_ERROR_LOCATION_14_i Register Field Descriptions .....................................................
Register Call Summary for ELM_ERROR_LOCATION_14_i .....................................................
ELM_ERROR_LOCATION_15_i Instances ..........................................................................
ELM_ERROR_LOCATION_15_i Register Field Descriptions .....................................................
Register Call Summary for ELM_ERROR_LOCATION_15_i .....................................................
Message Manager Integration Attributes .............................................................................
Message Manager Clocks and Resets ...............................................................................
Message Manager Hardware Requests ..............................................................................
Message Manager SoC Configuration ...............................................................................
Message Manager Proxy Assignment ................................................................................
Message Manager Queue Assignment...............................................................................
Message Manager Interrupt Types ...................................................................................
Message Manager RAMs and ECC Options ........................................................................
Proxy Queue Physical Memory........................................................................................
Message Manager Memory Regions .................................................................................
MSGMGR_PROXY_PAGE_CONFIG Registers ....................................................................
PAGE_PROXY_CFG_REG_0_0 to PAGE_PROXY_CFG_REG_31_0 Register Field Descriptions ........
MSGMGR_PROXY_CONFIG Registers .............................................................................
PROXY_QUEUE_CFG_REG_0_0 to PROXY_QUEUE_CFG_REG_31_63 Register Field Descriptions...
MSGMGR_PROXY_GLOBAL_CONFIG Registers .................................................................
INTR_RAW_STATUS_SET_REG Register Field Descriptions ...................................................
INTR_ENABLED_STATUS_SET_REG Register Field Descriptions .............................................
INTR_ENABLE_REG Register Field Descriptions ..................................................................
INTR_CLEAR_REG Register Field Descriptions ...................................................................
7-713. ELM_ERROR_LOCATION_9_i Register Field Descriptions
List of Tables
1590
1590
1590
1591
1591
1591
1592
1592
1592
1593
1593
1593
1594
1594
1594
1595
1595
1595
1599
1599
1600
1602
1603
1605
1610
1610
1612
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
8-20.
EOI_REG Register Field Descriptions ................................................................................ 1625
8-21.
PROXY_ERROR_STATUS_REG Register Field Descriptions
8-22.
MSGMGR_GLOBAL_CONFIG Registers ............................................................................ 1627
8-23.
REVISION_REG Register Field Descriptions
8-24.
8-25.
8-26.
8-27.
8-28.
8-29.
8-30.
8-31.
8-32.
8-33.
8-34.
8-35.
8-36.
8-37.
8-38.
8-39.
8-40.
8-41.
8-42.
8-43.
8-44.
8-45.
8-46.
8-47.
8-48.
8-49.
8-50.
8-51.
8-52.
8-53.
8-54.
8-55.
8-56.
8-57.
8-58.
8-59.
8-60.
8-61.
8-62.
8-63.
8-64.
8-65.
8-66.
8-67.
8-68.
...................................................
.......................................................................
INTR_RAW_STATUS_SET_REG Register Field Descriptions ...................................................
INTR_ENABLED_STATUS_SET_REG Register Field Descriptions .............................................
INTR_ENABLE_REG Register Field Descriptions ..................................................................
INTR_CLEAR_REG Register Field Descriptions ...................................................................
EOI_REG Register Field Descriptions ................................................................................
MSGMGR_LINKING_RAM_DEBUG Registers .....................................................................
NEXT_INDEX_REG_0 to NEXT_INDEX_REG_127 Register Field Descriptions ..............................
MSGMGR_QUEUE_STATE_DEBUG Registers ....................................................................
INDEX_REG_0 to INDEX_REG_63 Register Field Descriptions .................................................
MSGMGR_ECC_AGGR Registers ...................................................................................
ECC_REVISION Register Field Descriptions........................................................................
ECC_VECTOR Register Field Descriptions .........................................................................
ECC_MISC_STATUS Register Field Descriptions..................................................................
ECC_WRAPPER_REVISION Register Field Descriptions ........................................................
ECC_CONTROL Register Field Descriptions .......................................................................
ECC_ERROR_CONTROL1 Register Field Descriptions ..........................................................
ECC_ERROR_CONTROL2 Register Field Descriptions ..........................................................
ECC_ERROR_STATUS1 Register Field Descriptions .............................................................
ECC_ERROR_STATUS2 Register Field Descriptions .............................................................
ECC_EOI Register Field Descriptions ................................................................................
ECC_INT_STATUS_0 to ECC_INT_STATUS_15 Register Field Descriptions .................................
ECC_INT_ENABLE_0 to ECC_INT_ENABLE_15 Register Field Descriptions .................................
ECC_INT_CLEAR_0 to ECC_INT_CLEAR_15 Register Field Descriptions ....................................
MSGMGR_QUEUE_PROXY Registers ..............................................................................
QUEUE_DATA_REG_0_0_0 to QUEUE_DATA_REG_31_64_31 Register Field Descriptions ..............
Semaphore Integration Attributes .....................................................................................
Semaphore Clocks and Resets .......................................................................................
Semaphore Hardware Requests ......................................................................................
SEMAPHORE Instances ...............................................................................................
SEMAPHORE Registers ...............................................................................................
SEM_PID Instances.....................................................................................................
SEM_PID Register Field Descriptions ................................................................................
Register Call Summary for SEM_PID ................................................................................
SEM_RST_RUN Instances ............................................................................................
SEM_RST_RUN Register Field Descriptions........................................................................
Register Call Summary for SEM_RST_RUN ........................................................................
SEM_EOI Instances ....................................................................................................
SEM_EOI Register Field Descriptions ................................................................................
Register Call Summary for SEM_EOI ................................................................................
SEM_0 to SEM_63 Instances .........................................................................................
SEM_0 to SEM_63 Register Field Descriptions.....................................................................
Register Call Summary for SEM_0 ...................................................................................
ISEM_0 to ISEM_63 Instances ........................................................................................
ISEM_0 to ISEM_63 Register Field Descriptions ...................................................................
Register Call Summary for ISEM_0...................................................................................
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1626
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1656
1656
1656
1663
1663
1664
1664
1664
1665
1665
1665
1666
1666
1666
1667
1667
1667
1668
1668
1668
113
www.ti.com
8-69.
QSEM_0 to QSEM_63 Instances ..................................................................................... 1669
8-70.
QSEM_0 to QSEM_63 Register Field Descriptions
8-71.
Register Call Summary for QSEM_0 ................................................................................. 1669
8-72.
SEMFLAGL_0 to SEMFLAGL_15 Instances ........................................................................ 1670
8-73.
SEMFLAGL_0 to SEMFLAGL_15 Register Field Descriptions
8-74.
Register Call Summary for SEMFLAGL_0 ........................................................................... 1670
8-75.
SEMFLAGL_CLEAR_0 to SEMFLAGL_CLEAR_15 Instances ................................................... 1671
8-76.
SEMFLAGL_CLEAR_0 to SEMFLAGL_CLEAR_15 Register Field Descriptions
8-77.
Register Call Summary for SEMFLAGL_CLEAR_0 ................................................................ 1671
8-78.
SEMFLAGH_0 to SEMFLAGH_15 Instances
8-79.
SEMFLAGH_0 to SEMFLAGH_15 Register Field Descriptions................................................... 1672
8-80.
Register Call Summary for SEMFLAGH_0 .......................................................................... 1672
8-81.
SEMFLAGH_CLEAR_0 to SEMFLAGH_CLEAR_15 Instances
8-82.
SEMFLAGH_CLEAR_0 to SEMFLAGH_CLEAR_15 Register Field Descriptions.............................. 1673
8-83.
Register Call Summary for SEMFLAGH_CLEAR_0 ................................................................ 1673
8-84.
SEMFLAGL_SET_0 to SEMFLAGL_SET_15 Instances ........................................................... 1674
8-85.
SEMFLAGL_SET_0 to SEMFLAGL_SET_15 Register Field Descriptions ...................................... 1674
8-86.
Register Call Summary for SEMFLAGL_SET_0 .................................................................... 1674
8-87.
SEMFLAGH_SET_0 to SEMFLAGH_SET_15 Instances .......................................................... 1675
8-88.
SEMFLAGH_SET_0 to SEMFLAGH_SET_15 Register Field Descriptions ..................................... 1675
8-89.
Register Call Summary for SEMFLAGH_SET_0.................................................................... 1675
8-90.
SEMERR Instances ..................................................................................................... 1676
8-91.
SEMERR Register Field Descriptions ................................................................................ 1676
8-92.
Register Call Summary for SEMERR ................................................................................. 1676
8-93.
SEMERR_CLEAR Instances
8-94.
SEMERR_CLEAR Register Field Descriptions...................................................................... 1677
8-95.
Register Call Summary for SEMERR_CLEAR ...................................................................... 1677
8-96.
SEMERR_SET Instances .............................................................................................. 1678
8-97.
SEMERR_SET Register Field Descriptions ......................................................................... 1678
8-98.
Register Call Summary for SEMERR_SET .......................................................................... 1678
9-1.
EOI Values ............................................................................................................... 1682
9-2.
CIC Integration Attributes
9-3.
CIC Clocks and Resets ................................................................................................. 1683
9-4.
CIC Hardware Requests
9-5.
9-6.
9-7.
9-8.
9-9.
9-10.
9-11.
9-12.
9-13.
9-14.
9-15.
9-16.
9-17.
9-18.
9-19.
114
................................................................
...................................................
..............................
.......................................................................
..................................................
..........................................................................................
..............................................................................................
...............................................................................................
Interrupt Service Sequence ............................................................................................
CIC Instances ............................................................................................................
CIC Registers ............................................................................................................
CIC_REVISION_REG Instances ......................................................................................
CIC_REVISION_REG Register Field Descriptions .................................................................
Register Call Summary for CIC_REVISION_REG ..................................................................
CIC_GLOBAL_ENABLE_HINT_REG Instances ....................................................................
CIC_GLOBAL_ENABLE_HINT_REG Register Field Descriptions ...............................................
Register Call Summary for CIC_GLOBAL_ENABLE_HINT_REG ................................................
CIC_STATUS_SET_INDEX_REG Instances ........................................................................
CIC_STATUS_SET_INDEX_REG Register Field Descriptions ...................................................
Register Call Summary for CIC_STATUS_SET_INDEX_REG....................................................
CIC_STATUS_CLR_INDEX_REG Instances ........................................................................
CIC_STATUS_CLR_INDEX_REG Register Field Descriptions ...................................................
Register Call Summary for CIC_STATUS_CLR_INDEX_REG ...................................................
List of Tables
1669
1670
1671
1672
1673
1677
1683
1683
1685
1687
1687
1688
1688
1688
1689
1689
1689
1690
1690
1690
1691
1691
1691
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
9-20.
CIC_ENABLE_SET_INDEX_REG Instances ........................................................................ 1692
9-21.
CIC_ENABLE_SET_INDEX_REG Register Field Descriptions ................................................... 1692
9-22.
Register Call Summary for CIC_ENABLE_SET_INDEX_REG.................................................... 1692
9-23.
CIC_ENABLE_CLR_INDEX_REG Instances ........................................................................ 1693
9-24.
CIC_ENABLE_CLR_INDEX_REG Register Field Descriptions ................................................... 1693
9-25.
Register Call Summary for CIC_ENABLE_CLR_INDEX_REG
9-26.
9-27.
9-28.
9-29.
9-30.
9-31.
9-32.
9-33.
9-34.
9-35.
9-36.
9-37.
9-38.
9-39.
9-40.
9-41.
9-42.
9-43.
9-44.
9-45.
9-46.
9-47.
9-48.
9-49.
9-50.
9-51.
9-52.
9-53.
10-1.
10-2.
10-3.
10-4.
10-5.
10-6.
10-7.
10-8.
10-9.
10-10.
10-11.
10-12.
10-13.
10-14.
10-15.
...................................................
CIC_HINT_ENABLE_SET_INDEX_REG Instances ................................................................
CIC_HINT_ENABLE_SET_INDEX_REG Register Field Descriptions ...........................................
Register Call Summary for CIC_HINT_ENABLE_SET_INDEX_REG ............................................
CIC_HINT_ENABLE_CLR_INDEX_REG Instances ................................................................
CIC_HINT_ENABLE_CLR_INDEX_REG Register Field Descriptions ...........................................
Register Call Summary for CIC_HINT_ENABLE_CLR_INDEX_REG............................................
CIC_RAW_STATUS_REG0 to CIC_RAW_STATUS_REG12 Instances ........................................
CIC_RAW_STATUS_REG0 to CIC_RAW_STATUS_REG12 Register Field Descriptions ...................
Register Call Summary for CIC_RAW_STATUS_REG0 ...........................................................
CIC_ENA_STATUS_REG0 to CIC_ENA_STATUS_REG12 Instances ..........................................
CIC_ENA_STATUS_REG0 to CIC_ENA_STATUS_REG12 Register Field Descriptions .....................
Register Call Summary for CIC_ENA_STATUS_REG0 ...........................................................
CIC_ENABLE_REG0 to CIC_ENABLE_REG12 Instances ........................................................
CIC_ENABLE_REG0 to CIC_ENABLE_REG12 Register Field Descriptions ...................................
Register Call Summary for CIC_ENABLE_REG0...................................................................
CIC_ENABLE_CLR_REG0 to CIC_ENABLE_CLR_REG12 Instances ..........................................
CIC_ENABLE_CLR_REG0 to CIC_ENABLE_CLR_REG12 Register Field Descriptions .....................
Register Call Summary for CIC_ENABLE_CLR_REG0 ............................................................
CIC_CH_MAP_REG0 to CIC_CH_MAP_REG103 Instances .....................................................
CIC_CH_MAP_REG0 to CIC_CH_MAP_REG103 Register Field Descriptions ................................
Register Call Summary for CIC_CH_MAP_REG0 ..................................................................
CIC_HINT_MAP_REG0 to CIC_HINT_MAP_REG25 Instances ..................................................
CIC_HINT_MAP_REG0 to CIC_HINT_MAP_REG25 Register Field Descriptions .............................
Register Call Summary for CIC_HINT_MAP_REG0................................................................
CIC_ENABLE_HINT_REG0 to CIC_ENABLE_HINT_REG3 Instances ..........................................
CIC_ENABLE_HINT_REG0 to CIC_ENABLE_HINT_REG3 Register Field Descriptions .....................
Register Call Summary for CIC_ENABLE_HINT_REG0 ...........................................................
CIC Input Events Mapping .............................................................................................
EDMA Channel Controllers Configuration ...........................................................................
EDMA Transfer Controllers Configuration ...........................................................................
EDMA Controller – Terms and Definitions ...........................................................................
EDMA Integration Attributes ...........................................................................................
EDMA Clocks and Resets..............................................................................................
EDMA Hardware Requests ............................................................................................
EDMACC_0 Synchronization Events .................................................................................
EDMACC_1 Synchronization Events .................................................................................
EDMA Parameter RAM Contents ....................................................................................
EDMA Channel Parameter Description ..............................................................................
Channel Options Parameters (OPT) Field Descriptions ...........................................................
Dummy and Null Transfer Request ...................................................................................
Parameter Updates in EDMACC (for Non-Null, Non-Dummy PaRAM Set) ....................................
Expected Number of Transfers for Non-Null Transfer ..............................................................
Shadow Region Registers .............................................................................................
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1693
1694
1694
1694
1695
1695
1695
1696
1696
1696
1697
1697
1697
1698
1698
1698
1699
1699
1699
1700
1700
1700
1701
1701
1701
1702
1702
1702
1703
1715
1715
1716
1719
1720
1720
1722
1723
1732
1733
1735
1739
1739
1746
1749
115
www.ti.com
10-16. Chain Event Triggers ................................................................................................... 1751
10-17. EDMA Transfer Completion Interrupts
...............................................................................
1751
10-18. EDMA Error Interrupts .................................................................................................. 1752
10-19. Number of Interrupts .................................................................................................... 1753
10-20. Allowed Accesses ....................................................................................................... 1757
10-21. MPPA Registers to Region Assignment .............................................................................. 1758
10-22. Example Access Denied
...............................................................................................
1758
10-23. Example Access Allowed............................................................................................... 1759
10-24. Read/Write Command Optimization Rules........................................................................... 1764
10-25. Debug Checklist ......................................................................................................... 1790
10-26. EDMACC Instances ..................................................................................................... 1793
10-27. EDMACC Registers
....................................................................................................
1793
10-28. EDMACC_PID Instances ............................................................................................... 1798
10-29. EDMACC_PID Register Field Descriptions .......................................................................... 1798
10-30. Register Call Summary for EDMACC_PID
..........................................................................
1798
10-31. EDMACC_CCCFG Instances .......................................................................................... 1799
10-32. EDMACC_CCCFG Register Field Descriptions ..................................................................... 1799
10-33. Register Call Summary for EDMACC_CCCFG
.....................................................................
1800
10-34. EDMACC_DCHMAP0 to EDMACC_DCHMAP63 Instances ...................................................... 1801
10-35. EDMACC_DCHMAP0 to EDMACC_DCHMAP63 Register Field Descriptions
.................................
1801
10-36. Register Call Summary for EDMACC_DCHMAP0 .................................................................. 1801
10-37. EDMACC_QCHMAP0 to EDMACC_QCHMAP7 Instances
.......................................................
1802
10-38. EDMACC_QCHMAP0 to EDMACC_QCHMAP7 Register Field Descriptions ................................... 1802
10-39. Register Call Summary for EDMACC_QCHMAP0 .................................................................. 1802
10-40. EDMACC_DMAQNUM0 to EDMACC_DMAQNUM7 Instances ................................................... 1803
10-41. EDMACC_DMAQNUM0 to EDMACC_DMAQNUM7 Register Field Descriptions .............................. 1803
10-42. Register Call Summary for EDMACC_DMAQNUM0 ............................................................... 1805
10-43. EDMACC_QDMAQNUM Instances ................................................................................... 1806
10-44. EDMACC_QDMAQNUM Register Field Descriptions .............................................................. 1806
10-45. Register Call Summary for EDMACC_QDMAQNUM ............................................................... 1807
10-46. EDMACC_QUETCMAP Instances .................................................................................... 1808
10-47. EDMACC_QUETCMAP Register Field Descriptions ............................................................... 1808
10-48. Register Call Summary for EDMACC_QUETCMAP ................................................................ 1809
10-49. EDMACC_QUEPRI Instances ......................................................................................... 1810
10-50. EDMACC_QUEPRI Register Field Descriptions .................................................................... 1810
10-51. Register Call Summary for EDMACC_QUEPRI ..................................................................... 1810
10-52. EDMACC_EMR Instances ............................................................................................. 1811
10-53. EDMACC_EMR Register Field Descriptions
........................................................................
1811
10-54. Register Call Summary for EDMACC_EMR ......................................................................... 1811
10-55. EDMACC_EMRH Instances ........................................................................................... 1812
......................................................................
Register Call Summary for EDMACC_EMRH .......................................................................
EDMACC_EMCR Instances ...........................................................................................
EDMACC_EMCR Register Field Descriptions ......................................................................
Register Call Summary for EDMACC_EMCR .......................................................................
EDMACC_EMCRH Instances .........................................................................................
EDMACC_EMCRH Register Field Descriptions.....................................................................
Register Call Summary for EDMACC_EMCRH .....................................................................
EDMACC_QEMR Instances ...........................................................................................
10-56. EDMACC_EMRH Register Field Descriptions
10-57.
10-58.
10-59.
10-60.
10-61.
10-62.
10-63.
10-64.
116
List of Tables
1813
1813
1814
1814
1814
1815
1815
1815
1816
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
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10-65. EDMACC_QEMR Register Field Descriptions ...................................................................... 1816
10-66. Register Call Summary for EDMACC_QEMR ....................................................................... 1816
10-67. EDMACC_QEMCR Instances ......................................................................................... 1817
....................................................................
10-69. Register Call Summary for EDMACC_QEMCR .....................................................................
10-70. EDMACC_CCERR Instances ..........................................................................................
10-71. EDMACC_CCERR Register Field Descriptions .....................................................................
10-72. Register Call Summary for EDMACC_CCERR .....................................................................
10-73. EDMACC_CCERRCLR Instances ....................................................................................
10-74. EDMACC_CCERRCLR Register Field Descriptions ...............................................................
10-75. Register Call Summary for EDMACC_CCERRCLR ................................................................
10-76. EDMACC_EEVAL Instances...........................................................................................
10-77. EDMACC_EEVAL Register Field Descriptions ......................................................................
10-78. Register Call Summary for EDMACC_EEVAL ......................................................................
10-79. EDMACC_DRAE0 Instances ..........................................................................................
10-80. EDMACC_DRAE0 Register Field Descriptions .....................................................................
10-81. Register Call Summary for EDMACC_DRAE0 ......................................................................
10-82. EDMACC_DRAEH0 Instances ........................................................................................
10-83. EDMACC_DRAEH0 Register Field Descriptions ...................................................................
10-84. Register Call Summary for EDMACC_DRAEH0 ....................................................................
10-85. EDMACC_DRAE1 Instances ..........................................................................................
10-86. EDMACC_DRAE1 Register Field Descriptions .....................................................................
10-87. Register Call Summary for EDMACC_DRAE1 ......................................................................
10-88. EDMACC_DRAEH1 Instances ........................................................................................
10-89. EDMACC_DRAEH1 Register Field Descriptions ...................................................................
10-90. Register Call Summary for EDMACC_DRAEH1 ....................................................................
10-91. EDMACC_DRAE2 Instances ..........................................................................................
10-92. EDMACC_DRAE2 Register Field Descriptions .....................................................................
10-93. Register Call Summary for EDMACC_DRAE2 ......................................................................
10-94. EDMACC_DRAEH2 Instances ........................................................................................
10-95. EDMACC_DRAEH2 Register Field Descriptions ...................................................................
10-96. Register Call Summary for EDMACC_DRAEH2 ....................................................................
10-97. EDMACC_DRAE3 Instances ..........................................................................................
10-98. EDMACC_DRAE3 Register Field Descriptions .....................................................................
10-99. Register Call Summary for EDMACC_DRAE3 ......................................................................
10-100. EDMACC_DRAEH3 Instances .......................................................................................
10-101. EDMACC_DRAEH3 Register Field Descriptions ..................................................................
10-102. Register Call Summary for EDMACC_DRAEH3 ...................................................................
10-103. EDMACC_DRAE4 Instances .........................................................................................
10-104. EDMACC_DRAE4 Register Field Descriptions ....................................................................
10-105. Register Call Summary for EDMACC_DRAE4.....................................................................
10-106. EDMACC_DRAEH4 Instances .......................................................................................
10-107. EDMACC_DRAEH4 Register Field Descriptions ..................................................................
10-108. Register Call Summary for EDMACC_DRAEH4 ...................................................................
10-109. EDMACC_DRAE5 Instances .........................................................................................
10-110. EDMACC_DRAE5 Register Field Descriptions ....................................................................
10-111. Register Call Summary for EDMACC_DRAE5.....................................................................
10-112. EDMACC_DRAEH5 Instances .......................................................................................
10-113. EDMACC_DRAEH5 Register Field Descriptions ..................................................................
10-68. EDMACC_QEMCR Register Field Descriptions
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1817
1817
1818
1818
1819
1820
1820
1821
1822
1822
1822
1823
1823
1823
1824
1824
1824
1824
1825
1825
1825
1825
1826
1826
1826
1826
1827
1827
1827
1827
1828
1828
1828
1828
1828
1829
1829
1829
1829
1830
1830
1830
1831
1831
1831
1831
117
www.ti.com
10-114. Register Call Summary for EDMACC_DRAEH5 ................................................................... 1831
10-115. EDMACC_DRAE6 Instances ......................................................................................... 1832
10-116. EDMACC_DRAE6 Register Field Descriptions .................................................................... 1832
10-117. Register Call Summary for EDMACC_DRAE6..................................................................... 1832
10-118. EDMACC_DRAEH6 Instances ....................................................................................... 1832
10-119. EDMACC_DRAEH6 Register Field Descriptions .................................................................. 1833
10-120. Register Call Summary for EDMACC_DRAEH6 ................................................................... 1833
10-121. EDMACC_DRAE7 Instances ......................................................................................... 1833
10-122. EDMACC_DRAE7 Register Field Descriptions .................................................................... 1834
10-123. Register Call Summary for EDMACC_DRAE7..................................................................... 1834
10-124. EDMACC_DRAEH7 Instances ....................................................................................... 1834
10-125. EDMACC_DRAEH7 Register Field Descriptions .................................................................. 1834
10-126. Register Call Summary for EDMACC_DRAEH7 ................................................................... 1835
..............................................................
EDMACC_QRAE0 to EDMACC_QRAE7 Register Field Descriptions ..........................................
Register Call Summary for EDMACC_QRAE0 ....................................................................
EDMACC_Q0E0 to EDMACC_Q3E15 Instances .................................................................
EDMACC_Q0E0 to EDMACC_Q3E15 Register Field Descriptions .............................................
Register Call Summary for EDMACC_Q0E0 .......................................................................
EDMACC_QSTAT0 to EDMACC_QSTAT3 Instances ............................................................
EDMACC_QSTAT0 to EDMACC_QSTAT3 Register Field Descriptions .......................................
Register Call Summary for EDMACC_QSTAT0 ...................................................................
EDMACC_QWMTHRA Instances ....................................................................................
EDMACC_QWMTHRA Register Field Descriptions ...............................................................
Register Call Summary for EDMACC_QWMTHRA ...............................................................
EDMACC_CCSTAT Instances .......................................................................................
EDMACC_CCSTAT Register Field Descriptions ..................................................................
Register Call Summary for EDMACC_CCSTAT ...................................................................
EDMACC_MPFAR Instances ........................................................................................
EDMACC_MPFAR Register Field Descriptions ....................................................................
Register Call Summary for EDMACC_MPFAR ....................................................................
EDMACC_MPFSR Instances ........................................................................................
EDMACC_MPFSR Register Field Descriptions ....................................................................
Register Call Summary for EDMACC_MPFSR ....................................................................
EDMACC_MPFCR Instances ........................................................................................
EDMACC_MPFCR Register Field Descriptions ...................................................................
Register Call Summary for EDMACC_MPFCR ....................................................................
EDMACC_MPPAG Instances ........................................................................................
EDMACC_MPPAG Register Field Descriptions ...................................................................
Register Call Summary for EDMACC_MPPAG ....................................................................
EDMACC_MPPA0 to EDMACC_MPPA7 Instances ..............................................................
EDMACC_MPPA0 to EDMACC_MPPA7 Register Field Descriptions ..........................................
Register Call Summary for EDMACC_MPPA0 ....................................................................
EDMACC_ER Instances ..............................................................................................
EDMACC_ER Register Field Descriptions .........................................................................
Register Call Summary for EDMACC_ER ..........................................................................
EDMACC_ERH Instances ............................................................................................
EDMACC_ERH Register Field Descriptions .......................................................................
Register Call Summary for EDMACC_ERH ........................................................................
10-127. EDMACC_QRAE0 to EDMACC_QRAE7 Instances
10-128.
10-129.
10-130.
10-131.
10-132.
10-133.
10-134.
10-135.
10-136.
10-137.
10-138.
10-139.
10-140.
10-141.
10-142.
10-143.
10-144.
10-145.
10-146.
10-147.
10-148.
10-149.
10-150.
10-151.
10-152.
10-153.
10-154.
10-155.
10-156.
10-157.
10-158.
10-159.
10-160.
10-161.
10-162.
118
List of Tables
1836
1836
1836
1837
1837
1838
1839
1839
1840
1841
1841
1842
1843
1843
1844
1845
1845
1845
1846
1846
1847
1848
1848
1848
1849
1849
1850
1851
1851
1852
1853
1854
1854
1854
1855
1855
SPRUHY8I – January 2016 – Revised March 2019
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10-163. EDMACC_ECR Instances ............................................................................................ 1856
10-164. EDMACC_ECR Register Field Descriptions
.......................................................................
1856
10-165. Register Call Summary for EDMACC_ECR ........................................................................ 1856
10-166. EDMACC_ECRH Instances .......................................................................................... 1857
10-167. EDMACC_ECRH Register Field Descriptions
.....................................................................
1857
10-168. Register Call Summary for EDMACC_ECRH ...................................................................... 1857
10-169. EDMACC_ESR Instances ............................................................................................ 1858
10-170. EDMACC_ESR Register Field Descriptions
.......................................................................
1858
10-171. Register Call Summary for EDMACC_ESR ........................................................................ 1858
10-172. EDMACC_ESRH Instances
..........................................................................................
1860
10-173. EDMACC_ESRH Register Field Descriptions...................................................................... 1860
10-174. Register Call Summary for EDMACC_ESRH ...................................................................... 1860
10-175. EDMACC_CER Instances ............................................................................................ 1861
.......................................................................
Register Call Summary for EDMACC_CER ........................................................................
EDMACC_CERH Instances ..........................................................................................
EDMACC_CERH Register Field Descriptions .....................................................................
Register Call Summary for EDMACC_CERH ......................................................................
EDMACC_EER Instances ............................................................................................
EDMACC_EER Register Field Descriptions .......................................................................
Register Call Summary for EDMACC_EER ........................................................................
EDMACC_EERH Instances ..........................................................................................
EDMACC_EERH Register Field Descriptions......................................................................
Register Call Summary for EDMACC_EERH ......................................................................
EDMACC_EECR Instances ..........................................................................................
EDMACC_EECR Register Field Descriptions......................................................................
Register Call Summary for EDMACC_EECR ......................................................................
EDMACC_EECRH Instances ........................................................................................
EDMACC_EECRH Register Field Descriptions ....................................................................
Register Call Summary for EDMACC_EECRH ....................................................................
EDMACC_EESR Instances ..........................................................................................
EDMACC_EESR Register Field Descriptions ......................................................................
Register Call Summary for EDMACC_EESR ......................................................................
EDMACC_EESRH Instances.........................................................................................
EDMACC_EESRH Register Field Descriptions ....................................................................
Register Call Summary for EDMACC_EESRH ....................................................................
EDMACC_SER Instances ............................................................................................
EDMACC_SER Register Field Descriptions .......................................................................
Register Call Summary for EDMACC_SER ........................................................................
EDMACC_SERH Instances ..........................................................................................
EDMACC_SERH Register Field Descriptions......................................................................
Register Call Summary for EDMACC_SERH ......................................................................
EDMACC_SECR Instances ..........................................................................................
EDMACC_SECR Register Field Descriptions......................................................................
Register Call Summary for EDMACC_SECR ......................................................................
EDMACC_SECRH Instances ........................................................................................
EDMACC_SECRH Register Field Descriptions ....................................................................
Register Call Summary for EDMACC_SECRH ....................................................................
EDMACC_IER Instances .............................................................................................
10-176. EDMACC_CER Register Field Descriptions
1861
10-177.
1861
10-178.
10-179.
10-180.
10-181.
10-182.
10-183.
10-184.
10-185.
10-186.
10-187.
10-188.
10-189.
10-190.
10-191.
10-192.
10-193.
10-194.
10-195.
10-196.
10-197.
10-198.
10-199.
10-200.
10-201.
10-202.
10-203.
10-204.
10-205.
10-206.
10-207.
10-208.
10-209.
10-210.
10-211.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
1863
1863
1863
1864
1864
1864
1866
1866
1866
1867
1867
1867
1868
1868
1868
1869
1869
1869
1870
1870
1870
1871
1871
1871
1873
1873
1873
1874
1874
1874
1875
1875
1875
1876
119
www.ti.com
10-212. EDMACC_IER Register Field Descriptions......................................................................... 1876
10-213. Register Call Summary for EDMACC_IER ......................................................................... 1876
10-214. EDMACC_IERH Instances
...........................................................................................
1877
10-215. EDMACC_IERH Register Field Descriptions ....................................................................... 1877
10-216. Register Call Summary for EDMACC_IERH ....................................................................... 1877
1878
10-218.
1878
10-219.
10-220.
10-221.
10-222.
10-223.
10-224.
10-225.
10-226.
10-227.
10-228.
10-229.
10-230.
10-231.
10-232.
10-233.
10-234.
10-235.
10-236.
10-237.
10-238.
10-239.
10-240.
10-241.
10-242.
10-243.
10-244.
10-245.
10-246.
10-247.
10-248.
10-249.
10-250.
10-251.
10-252.
10-253.
10-254.
10-255.
10-256.
10-257.
10-258.
10-259.
10-260.
120
...........................................................................................
EDMACC_IECR Register Field Descriptions .......................................................................
Register Call Summary for EDMACC_IECR .......................................................................
EDMACC_IECRH Instances .........................................................................................
EDMACC_IECRH Register Field Descriptions .....................................................................
Register Call Summary for EDMACC_IECRH .....................................................................
EDMACC_IESR Instances............................................................................................
EDMACC_IESR Register Field Descriptions .......................................................................
Register Call Summary for EDMACC_IESR .......................................................................
EDMACC_IESRH Instances ..........................................................................................
EDMACC_IESRH Register Field Descriptions .....................................................................
Register Call Summary for EDMACC_IESRH .....................................................................
EDMACC_IPR Instances .............................................................................................
EDMACC_IPR Register Field Descriptions.........................................................................
Register Call Summary for EDMACC_IPR .........................................................................
EDMACC_IPRH Instances ...........................................................................................
EDMACC_IPRH Register Field Descriptions .......................................................................
Register Call Summary for EDMACC_IPRH .......................................................................
EDMACC_ICR Instances .............................................................................................
EDMACC_ICR Register Field Descriptions ........................................................................
Register Call Summary for EDMACC_ICR .........................................................................
EDMACC_ICRH Instances ...........................................................................................
EDMACC_ICRH Register Field Descriptions ......................................................................
Register Call Summary for EDMACC_ICRH .......................................................................
EDMACC_IEVAL Instances ..........................................................................................
EDMACC_IEVAL Register Field Descriptions .....................................................................
Register Call Summary for EDMACC_IEVAL ......................................................................
EDMACC_QER Instances ............................................................................................
EDMACC_QER Register Field Descriptions .......................................................................
Register Call Summary for EDMACC_QER ........................................................................
EDMACC_QEER Instances ..........................................................................................
EDMACC_QEER Register Field Descriptions .....................................................................
Register Call Summary for EDMACC_QEER ......................................................................
EDMACC_QEECR Instances ........................................................................................
EDMACC_QEECR Register Field Descriptions ...................................................................
Register Call Summary for EDMACC_QEECR ....................................................................
EDMACC_QEESR Instances ........................................................................................
EDMACC_QEESR Register Field Descriptions ....................................................................
Register Call Summary for EDMACC_QEESR ....................................................................
EDMACC_QSER Instances ..........................................................................................
EDMACC_QSER Register Field Descriptions .....................................................................
Register Call Summary for EDMACC_QSER ......................................................................
EDMACC_QSECR Instances ........................................................................................
EDMACC_QSECR Register Field Descriptions ...................................................................
10-217. EDMACC_IECR Instances
List of Tables
1878
1879
1879
1879
1880
1880
1880
1881
1881
1881
1882
1882
1882
1884
1884
1884
1885
1885
1885
1886
1886
1886
1887
1887
1887
1889
1889
1890
1891
1891
1891
1892
1892
1892
1893
1893
1893
1894
1894
1894
1895
1895
SPRUHY8I – January 2016 – Revised March 2019
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10-261. Register Call Summary for EDMACC_QSECR .................................................................... 1895
10-262. EDMATC Instances .................................................................................................... 1896
.............................................................................................
.............................................................................................
EDMATC_PID Instances ..............................................................................................
EDMATC_PID Register Field Descriptions .........................................................................
Register Call Summary for EDMATC_PID .........................................................................
EDMATC_TCCFG Instances .........................................................................................
EDMATC_TCCFG Register Field Descriptions ....................................................................
Register Call Summary for EDMATC_TCCFG.....................................................................
EDMATC_TCSTAT Instances ........................................................................................
EDMATC_TCSTAT Register Field Descriptions ...................................................................
Register Call Summary for EDMATC_TCSTAT ...................................................................
EDMATC_ERRSTAT Instances......................................................................................
EDMATC_ERRSTAT Register Field Descriptions .................................................................
Register Call Summary for EDMATC_ERRSTAT .................................................................
EDMATC_ERREN Instances .........................................................................................
EDMATC_ERREN Register Field Descriptions ....................................................................
Register Call Summary for EDMATC_ERREN ....................................................................
EDMATC_ERRCLR Instances .......................................................................................
EDMATC_ERRCLR Register Field Descriptions ..................................................................
Register Call Summary for EDMATC_ERRCLR ...................................................................
EDMATC_ERRDET Instances .......................................................................................
EDMATC_ERRDET Register Field Descriptions ..................................................................
Register Call Summary for EDMATC_ERRDET ...................................................................
EDMATC_ERRCMD Instances ......................................................................................
EDMATC_ERRCMD Register Field Descriptions .................................................................
Register Call Summary for EDMATC_ERRCMD ..................................................................
EDMATC_RDRATE Instances .......................................................................................
EDMATC_RDRATE Register Field Descriptions ..................................................................
Register Call Summary for EDMATC_RDRATE ...................................................................
EDMATC_SAOPT Instances .........................................................................................
EDMATC_SAOPT Register Field Descriptions ....................................................................
Register Call Summary for EDMATC_SAOPT .....................................................................
EDMATC_SASRC Instances .........................................................................................
EDMATC_SASRC Register Field Descriptions ....................................................................
Register Call Summary for EDMATC_SASRC.....................................................................
EDMATC_SACNT Instances .........................................................................................
EDMATC_SACNT Register Field Descriptions ....................................................................
Register Call Summary for EDMATC_SACNT .....................................................................
EDMATC_SADST Instances .........................................................................................
EDMATC_SADST Register Field Descriptions ....................................................................
Register Call Summary for EDMATC_SADST .....................................................................
EDMATC_SABIDX Instances ........................................................................................
EDMATC_SABIDX Register Field Descriptions ...................................................................
Register Call Summary for EDMATC_SABIDX ....................................................................
EDMATC_SAMPPRXY Instances ...................................................................................
EDMATC_SAMPPRXY Register Field Descriptions ..............................................................
Register Call Summary for EDMATC_SAMPPRXY ...............................................................
10-263. EDMATC Registers (1/2)
1896
10-264. EDMATC Registers (2/2)
1898
10-265.
1901
10-266.
10-267.
10-268.
10-269.
10-270.
10-271.
10-272.
10-273.
10-274.
10-275.
10-276.
10-277.
10-278.
10-279.
10-280.
10-281.
10-282.
10-283.
10-284.
10-285.
10-286.
10-287.
10-288.
10-289.
10-290.
10-291.
10-292.
10-293.
10-294.
10-295.
10-296.
10-297.
10-298.
10-299.
10-300.
10-301.
10-302.
10-303.
10-304.
10-305.
10-306.
10-307.
10-308.
10-309.
SPRUHY8I – January 2016 – Revised March 2019
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List of Tables
1901
1901
1902
1902
1902
1903
1903
1904
1905
1905
1905
1907
1907
1907
1909
1909
1909
1910
1910
1910
1912
1912
1912
1913
1913
1914
1915
1915
1916
1917
1917
1917
1918
1918
1918
1919
1919
1919
1920
1920
1920
1921
1921
1921
121
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10-310. EDMATC_SACNTRLD Instances .................................................................................... 1922
10-311. EDMATC_SACNTRLD Register Field Descriptions ............................................................... 1922
10-312. Register Call Summary for EDMATC_SACNTRLD
...............................................................
1922
10-313. EDMATC_SASRCBREF Instances .................................................................................. 1923
10-314. EDMATC_SASRCBREF Register Field Descriptions ............................................................. 1923
.............................................................
EDMATC_SADSTBREF Instances ..................................................................................
EDMATC_SADSTBREF Register Field Descriptions .............................................................
Register Call Summary for EDMATC_SADSTBREF ..............................................................
EDMATC_DFCNTRLD Instances ....................................................................................
EDMATC_DFCNTRLD Register Field Descriptions ...............................................................
Register Call Summary for EDMATC_DFCNTRLD ...............................................................
EDMATC_DFSRCBREF Instances ..................................................................................
EDMATC_DFSRCBREF Register Field Descriptions .............................................................
Register Call Summary for EDMATC_DFSRCBREF .............................................................
EDMATC_DFDSTBREF Instances ..................................................................................
EDMATC_DFDSTBREF Register Field Descriptions .............................................................
Register Call Summary for EDMATC_DFDSTBREF ..............................................................
EDMATC_DFOPT0 Instances .......................................................................................
EDMATC_DFOPT0 Register Field Descriptions ...................................................................
Register Call Summary for EDMATC_DFOPT0 ...................................................................
EDMATC_DFSRC0 Instances .......................................................................................
EDMATC_DFSRC0 Register Field Descriptions...................................................................
Register Call Summary for EDMATC_DFSRC0 ...................................................................
EDMATC_DFCNT0 Instances .......................................................................................
EDMATC_DFCNT0 Register Field Descriptions ...................................................................
Register Call Summary for EDMATC_DFCNT0 ...................................................................
EDMATC_DFDST0 Instances ........................................................................................
EDMATC_DFDST0 Register Field Descriptions ...................................................................
Register Call Summary for EDMATC_DFDST0 ...................................................................
EDMATC_DFBIDX0 Instances .......................................................................................
EDMATC_DFBIDX0 Register Field Descriptions ..................................................................
Register Call Summary for EDMATC_DFBIDX0 ..................................................................
EDMATC_DFMPPRXY0 Instances ..................................................................................
EDMATC_DFMPPRXY0 Register Field Descriptions .............................................................
Register Call Summary for EDMATC_DFMPPRXY0 .............................................................
EDMATC_DFOPT1 Instances .......................................................................................
EDMATC_DFOPT1 Register Field Descriptions ...................................................................
Register Call Summary for EDMATC_DFOPT1 ...................................................................
EDMATC_DFSRC1 Instances .......................................................................................
EDMATC_DFSRC1 Register Field Descriptions...................................................................
Register Call Summary for EDMATC_DFSRC1 ...................................................................
EDMATC_DFCNT1 Instances .......................................................................................
EDMATC_DFCNT1 Register Field Descriptions ...................................................................
Register Call Summary for EDMATC_DFCNT1 ...................................................................
EDMATC_DFDST1 Instances ........................................................................................
EDMATC_DFDST1 Register Field Descriptions ...................................................................
Register Call Summary for EDMATC_DFDST1 ...................................................................
EDMATC_DFBIDX1 Instances .......................................................................................
10-315. Register Call Summary for EDMATC_SASRCBREF
10-316.
10-317.
10-318.
10-319.
10-320.
10-321.
10-322.
10-323.
10-324.
10-325.
10-326.
10-327.
10-328.
10-329.
10-330.
10-331.
10-332.
10-333.
10-334.
10-335.
10-336.
10-337.
10-338.
10-339.
10-340.
10-341.
10-342.
10-343.
10-344.
10-345.
10-346.
10-347.
10-348.
10-349.
10-350.
10-351.
10-352.
10-353.
10-354.
10-355.
10-356.
10-357.
10-358.
122
List of Tables
1923
1924
1924
1924
1925
1925
1925
1926
1926
1926
1927
1927
1927
1928
1928
1929
1930
1930
1930
1931
1931
1931
1932
1932
1932
1933
1933
1933
1934
1934
1934
1935
1935
1936
1937
1937
1937
1938
1938
1938
1939
1939
1939
1940
SPRUHY8I – January 2016 – Revised March 2019
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10-359. EDMATC_DFBIDX1 Register Field Descriptions .................................................................. 1940
10-360. Register Call Summary for EDMATC_DFBIDX1
..................................................................
1940
10-361. EDMATC_DFMPPRXY1 Instances .................................................................................. 1941
10-362. EDMATC_DFMPPRXY1 Register Field Descriptions ............................................................. 1941
.............................................................
.......................................................................................
10-365. EDMATC_DFOPT2 Register Field Descriptions ...................................................................
10-366. Register Call Summary for EDMATC_DFOPT2 ...................................................................
10-367. EDMATC_DFSRC2 Instances .......................................................................................
10-368. EDMATC_DFSRC2 Register Field Descriptions...................................................................
10-369. Register Call Summary for EDMATC_DFSRC2 ...................................................................
10-370. EDMATC_DFCNT2 Instances .......................................................................................
10-371. EDMATC_DFCNT2 Register Field Descriptions ...................................................................
10-372. Register Call Summary for EDMATC_DFCNT2 ...................................................................
10-373. EDMATC_DFDST2 Instances ........................................................................................
10-374. EDMATC_DFDST2 Register Field Descriptions ...................................................................
10-375. Register Call Summary for EDMATC_DFDST2 ...................................................................
10-376. EDMATC_DFBIDX2 Instances .......................................................................................
10-377. EDMATC_DFBIDX2 Register Field Descriptions ..................................................................
10-378. Register Call Summary for EDMATC_DFBIDX2 ..................................................................
10-379. EDMATC_DFMPPRXY2 Instances ..................................................................................
10-380. EDMATC_DFMPPRXY2 Register Field Descriptions .............................................................
10-381. Register Call Summary for EDMATC_DFMPPRXY2 .............................................................
10-382. EDMATC_DFOPT3 Instances .......................................................................................
10-383. EDMATC_DFOPT3 Register Field Descriptions ...................................................................
10-384. Register Call Summary for EDMATC_DFOPT3 ...................................................................
10-385. EDMATC_DFSRC3 Instances .......................................................................................
10-386. EDMATC_DFSRC3 Register Field Descriptions...................................................................
10-387. Register Call Summary for EDMATC_DFSRC3 ...................................................................
10-388. EDMATC_DFCNT3 Instances .......................................................................................
10-389. EDMATC_DFCNT3 Register Field Descriptions ...................................................................
10-390. Register Call Summary for EDMATC_DFCNT3 ...................................................................
10-391. EDMATC_DFDST3 Instances ........................................................................................
10-392. EDMATC_DFDST3 Register Field Descriptions ...................................................................
10-393. Register Call Summary for EDMATC_DFDST3 ...................................................................
10-394. EDMATC_DFBIDX3 Instances .......................................................................................
10-395. EDMATC_DFBIDX3 Register Field Descriptions ..................................................................
10-396. Register Call Summary for EDMATC_DFBIDX3 ..................................................................
10-397. EDMATC_DFMPPRXY3 Instances ..................................................................................
10-398. EDMATC_DFMPPRXY3 Register Field Descriptions .............................................................
10-399. Register Call Summary for EDMATC_DFMPPRXY3 .............................................................
11-1. ASRC Integration Attributes............................................................................................
11-2. ASRC Clocks and Resets ..............................................................................................
11-3. ASRC Hardware Requests.............................................................................................
11-4. ASRC Data Packing at the SRC Interface ...........................................................................
11-5. ASRC Data Packing at the VBUS Interface When Auto Alignment is Disabled ................................
11-6. ASRC Input Data Packing at the VBUS Interface When Auto Alignment is Enabled ..........................
11-7. ASRC Output Data Packing at the VBUS Interface When Auto Alignment is Enabled ........................
11-8. ASRC Interrupts .........................................................................................................
10-363. Register Call Summary for EDMATC_DFMPPRXY1
1941
10-364. EDMATC_DFOPT2 Instances
1942
SPRUHY8I – January 2016 – Revised March 2019
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List of Tables
1942
1943
1944
1944
1944
1945
1945
1945
1946
1946
1946
1947
1947
1947
1948
1948
1948
1949
1949
1950
1951
1951
1951
1952
1952
1952
1953
1953
1953
1954
1954
1954
1955
1955
1955
1960
1960
1960
1964
1964
1965
1965
1967
123
www.ti.com
11-9.
11-10.
11-11.
11-12.
11-13.
11-14.
11-15.
11-16.
11-17.
11-18.
11-19.
11-20.
11-21.
11-22.
11-23.
11-24.
11-25.
11-26.
11-27.
11-28.
11-29.
11-30.
11-31.
11-32.
11-33.
11-34.
11-35.
11-36.
11-37.
11-38.
11-39.
11-40.
11-41.
11-42.
11-43.
11-44.
11-45.
11-46.
11-47.
11-48.
11-49.
11-50.
11-51.
11-52.
11-53.
11-54.
11-55.
11-56.
11-57.
124
.....................................................................................................
ASRC Configuration and Status Instances ..........................................................................
ASRC Configuration and Status Registers ..........................................................................
ASRC_PID Instances ...................................................................................................
ASRC_PID Register Field Descriptions ..............................................................................
Register Call Summary for ASRC_PID ...............................................................................
ASRC_SYSCONFIG Instances........................................................................................
ASRC_SYSCONFIG Register Field Descriptions ...................................................................
Register Call Summary for ASRC_SYSCONFIG ...................................................................
ASRC_IRQEOI Instances ..............................................................................................
ASRC_IRQEOI Register Field Descriptions .........................................................................
Register Call Summary for ASRC_IRQEOI ..........................................................................
ASRC_IFIRQRAW Instances ..........................................................................................
ASRC_IFIRQRAW Register Field Descriptions .....................................................................
Register Call Summary for ASRC_IFIRQRAW ......................................................................
ASRC_IFIRQENSTS Instances .......................................................................................
ASRC_IFIRQENSTS Register Field Descriptions ..................................................................
Register Call Summary for ASRC_IFIRQENSTS ...................................................................
ASRC_IFIRQENSET Instances .......................................................................................
ASRC_IFIRQENSET Register Field Descriptions ..................................................................
Register Call Summary for ASRC_IFIRQENSET ...................................................................
ASRC_IFIRQENCLR Instances .......................................................................................
ASRC_IFIRQENCLR Register Field Descriptions ..................................................................
Register Call Summary for ASRC_IFIRQENCLR ...................................................................
ASRC_OFIRQRAW Instances.........................................................................................
ASRC_OFIRQRAW Register Field Descriptions ....................................................................
Register Call Summary for ASRC_OFIRQRAW ....................................................................
ASRC_OFIRQENSTS Instances ......................................................................................
ASRC_OFIRQENSTS Register Field Descriptions .................................................................
Register Call Summary for ASRC_OFIRQENSTS ..................................................................
ASRC_OFIRQENSET Instances ......................................................................................
ASRC_OFIRQENSET Register Field Descriptions .................................................................
Register Call Summary for ASRC_OFIRQENSET ..................................................................
ASRC_OFIRQENCLR Instances ......................................................................................
ASRC_OFIRQENCLR Register Field Descriptions .................................................................
Register Call Summary for ASRC_OFIRQENCLR .................................................................
ASRC_IGIRQRAW Instances .........................................................................................
ASRC_IGIRQRAW Register Field Descriptions .....................................................................
Register Call Summary for ASRC_IGIRQRAW .....................................................................
ASRC_IGIRQENSTS Instances .......................................................................................
ASRC_IGIRQENSTS Register Field Descriptions ..................................................................
Register Call Summary for ASRC_IGIRQENSTS...................................................................
ASRC_IGIRQENSET Instances .......................................................................................
ASRC_IGIRQENSET Register Field Descriptions ..................................................................
Register Call Summary for ASRC_IGIRQENSET...................................................................
ASRC_IGIRQENCLR Instances .......................................................................................
ASRC_IGIRQENCLR Register Field Descriptions ..................................................................
Register Call Summary for ASRC_IGIRQENCLR ..................................................................
ASRC_OGIRQRAW Instances ........................................................................................
ASRC DMA Events
List of Tables
1969
1977
1977
1984
1984
1984
1985
1985
1985
1986
1986
1986
1987
1987
1988
1989
1989
1990
1991
1991
1992
1993
1993
1994
1995
1995
1996
1997
1997
1998
1999
1999
2000
2001
2001
2002
2003
2003
2003
2004
2004
2004
2005
2005
2005
2006
2006
2006
2007
SPRUHY8I – January 2016 – Revised March 2019
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www.ti.com
11-58. ASRC_OGIRQRAW Register Field Descriptions ................................................................... 2007
11-59. Register Call Summary for ASRC_OGIRQRAW .................................................................... 2007
11-60. ASRC_OGIRQENSTS Instances
.....................................................................................
2008
11-61. ASRC_OGIRQENSTS Register Field Descriptions ................................................................. 2008
11-62. Register Call Summary for ASRC_OGIRQENSTS ................................................................. 2008
.....................................................................................
11-64. ASRC_OGIRQENSET Register Field Descriptions .................................................................
11-65. Register Call Summary for ASRC_OGIRQENSET .................................................................
11-66. ASRC_OGIRQENCLR Instances .....................................................................................
11-67. ASRC_OGIRQENCLR Register Field Descriptions ................................................................
11-68. Register Call Summary for ASRC_OGIRQENCLR .................................................................
11-69. ASRC_ERIRQRAW Instances.........................................................................................
11-70. ASRC_ERIRQRAW Register Field Descriptions ....................................................................
11-71. Register Call Summary for ASRC_ERIRQRAW ....................................................................
11-72. ASRC_ERIRQENSTS Instances ......................................................................................
11-73. ASRC_ERIRQENSTS Register Field Descriptions .................................................................
11-74. Register Call Summary for ASRC_ERIRQENSTS ..................................................................
11-75. ASRC_ERIRQENSET Instances ......................................................................................
11-76. ASRC_ERIRQENSET Register Field Descriptions .................................................................
11-77. Register Call Summary for ASRC_ERIRQENSET ..................................................................
11-78. ASRC_ERIRQENCLR Instances ......................................................................................
11-79. ASRC_ERIRQENCLR Register Field Descriptions .................................................................
11-80. Register Call Summary for ASRC_ERIRQENCLR .................................................................
11-81. ASRC_IGRPSEL_0 to ASRC_IGRPSEL_3 Instances .............................................................
11-82. ASRC_IGRPSEL_0 to ASRC_IGRPSEL_3 Register Field Descriptions ........................................
11-83. Register Call Summary for ASRC_IGRPSEL_0 ....................................................................
11-84. ASRC_OGRPSEL_0 to ASRC_OGRPSEL_3 Instances ..........................................................
11-85. ASRC_OGRPSEL_0 to ASRC_OGRPSEL_3 Register Field Descriptions ......................................
11-86. Register Call Summary for ASRC_OGRPSEL_0 ...................................................................
11-87. ASRC_ICKDIV Instances ..............................................................................................
11-88. ASRC_ICKDIV Register Field Descriptions ..........................................................................
11-89. Register Call Summary for ASRC_ICKDIV ..........................................................................
11-90. ASRC_OCKDIV Instances .............................................................................................
11-91. ASRC_OCKDIV Register Field Descriptions ........................................................................
11-92. Register Call Summary for ASRC_OCKDIV .........................................................................
11-93. ASRC_SRCFFCTRL_0 Instances ....................................................................................
11-94. ASRC_SRCFFCTRL_0 Register Field Descriptions................................................................
11-95. Register Call Summary for ASRC_SRCFFCTRL_0 ................................................................
11-96. ASRC_SRCCTRL_0 Instances ........................................................................................
11-97. ASRC_SRCCTRL_0 Register Field Descriptions ...................................................................
11-98. Register Call Summary for ASRC_SRCCTRL_0 ...................................................................
11-99. ASRC_SRCSTS_0 Instances .........................................................................................
11-100. ASRC_SRCSTS_0 Register Field Descriptions ...................................................................
11-101. Register Call Summary for ASRC_SRCSTS_0 ....................................................................
11-102. ASRC_GFFCTRL_0 Instances .......................................................................................
11-103. ASRC_GFFCTRL_0 Register Field Descriptions ..................................................................
11-104. Register Call Summary for ASRC_GFFCTRL_0 ..................................................................
11-105. ASRC_GSRCCTRL_0 Instances ....................................................................................
11-106. ASRC_GSRCCTRL_0 Register Field Descriptions ...............................................................
11-63. ASRC_OGIRQENSET Instances
SPRUHY8I – January 2016 – Revised March 2019
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List of Tables
2009
2009
2009
2010
2010
2010
2011
2011
2012
2013
2013
2014
2015
2015
2016
2017
2017
2018
2019
2019
2021
2022
2022
2024
2025
2025
2025
2026
2026
2026
2027
2027
2028
2029
2029
2030
2031
2031
2031
2032
2032
2033
2034
2034
125
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11-107. Register Call Summary for ASRC_GSRCCTRL_0 ................................................................ 2035
11-108. ASRC_ICKGENSTL_0 Instances .................................................................................... 2036
11-109. ASRC_ICKGENSTL_0 Register Field Descriptions ............................................................... 2036
2036
11-111.
2037
11-112.
11-113.
11-114.
11-115.
11-116.
11-117.
11-118.
11-119.
11-120.
11-121.
11-122.
11-123.
11-124.
11-125.
11-126.
11-127.
11-128.
11-129.
11-130.
11-131.
11-132.
11-133.
11-134.
11-135.
11-136.
11-137.
11-138.
11-139.
11-140.
11-141.
11-142.
11-143.
11-144.
11-145.
11-146.
11-147.
11-148.
11-149.
11-150.
11-151.
11-152.
11-153.
11-154.
11-155.
126
...............................................................
ASRC_ICKGENSTH_0 Instances ...................................................................................
ASRC_ICKGENSTH_0 Register Field Descriptions ..............................................................
Register Call Summary for ASRC_ICKGENSTH_0 ...............................................................
ASRC_ICKGENRTL_0 Instances ....................................................................................
ASRC_ICKGENRTL_0 Register Field Descriptions ...............................................................
Register Call Summary for ASRC_ICKGENRTL_0 ...............................................................
ASRC_ICKGENRTH_0 Instances ...................................................................................
ASRC_ICKGENRTH_0 Register Field Descriptions ..............................................................
Register Call Summary for ASRC_ICKGENRTH_0 ...............................................................
ASRC_ICKLPRTL_0 Instances ......................................................................................
ASRC_ICKLPRTL_0 Register Field Descriptions .................................................................
Register Call Summary for ASRC_ICKLPRTL_0 ..................................................................
ASRC_ICKPRTH_0 Instances .......................................................................................
ASRC_ICKPRTH_0 Register Field Descriptions ..................................................................
Register Call Summary for ASRC_ICKPRTH_0 ...................................................................
ASRC_ICKZCNT_0 Instances .......................................................................................
ASRC_ICKZCNT_0 Register Field Descriptions...................................................................
Register Call Summary for ASRC_ICKZCNT_0 ...................................................................
ASRC_ICKZCTRL_0 Instances ......................................................................................
ASRC_ICKZCTRL_0 Register Field Descriptions .................................................................
Register Call Summary for ASRC_ICKZCTRL_0..................................................................
ASRC_OCKGENSTL_0 Instances ..................................................................................
ASRC_OCKGENSTL_0 Register Field Descriptions ..............................................................
Register Call Summary for ASRC_OCKGENSTL_0 ..............................................................
ASRC_OCKGENSTH_0 Instances ..................................................................................
ASRC_OCKGENSTH_0 Register Field Descriptions .............................................................
Register Call Summary for ASRC_OCKGENSTH_0 ..............................................................
ASRC_OCKGENRTL_0 Instances ..................................................................................
ASRC_OCKGENRTL_0 Register Field Descriptions .............................................................
Register Call Summary for ASRC_OCKGENRTL_0 ..............................................................
ASRC_OCKGENRTH_0 Instances ..................................................................................
ASRC_OCKGENRTH_0 Register Field Descriptions .............................................................
Register Call Summary for ASRC_OCKGENRTH_0..............................................................
ASRC_OCKLPRTL_0 Instances .....................................................................................
ASRC_OCKLPRTL_0 Register Field Descriptions ................................................................
Register Call Summary for ASRC_OCKLPRTL_0.................................................................
ASRC_OCKLPRTH_0 Instances ....................................................................................
ASRC_OCKLPRTH_0 Register Field Descriptions................................................................
Register Call Summary for ASRC_OCKLPRTH_0 ................................................................
ASRC_OCKLPSTL_0 Instances .....................................................................................
ASRC_OCKLPSTL_0 Register Field Descriptions ................................................................
Register Call Summary for ASRC_OCKLPSTL_0 .................................................................
ASRC_OCKLPSTH_0 Instances ....................................................................................
ASRC_OCKLPSTH_0 Register Field Descriptions ................................................................
Register Call Summary for ASRC_OCKLPSTH_0 ................................................................
11-110. Register Call Summary for ASRC_ICKGENSTL_0
List of Tables
2037
2037
2038
2038
2038
2039
2039
2039
2040
2040
2040
2041
2041
2041
2042
2042
2042
2043
2043
2043
2044
2044
2044
2045
2045
2045
2046
2046
2046
2047
2047
2047
2048
2048
2048
2049
2049
2049
2050
2050
2050
2051
2051
2051
SPRUHY8I – January 2016 – Revised March 2019
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11-156. ASRC_OCKZCNT_0 Instances ...................................................................................... 2052
11-157. ASRC_OCKZCNT_0 Register Field Descriptions ................................................................. 2052
11-158. Register Call Summary for ASRC_OCKZCNT_0 .................................................................. 2052
....................................................................................
ASRC_OCKZCTRL_0 Register Field Descriptions ................................................................
Register Call Summary for ASRC_OCKZCTRL_0 ................................................................
ASRC_ICKLPORTL_0 Instances ....................................................................................
ASRC_ICKLPORTL_0 Register Field Descriptions ...............................................................
Register Call Summary for ASRC_ICKLPORTL_0 ................................................................
ASRC_ICKLPORTH_0 Instances ....................................................................................
ASRC_ICKLPORTH_0 Register Field Descriptions ...............................................................
Register Call Summary for ASRC_ICKLPORTH_0 ...............................................................
ASRC_OCKLPORTL_0 Instances ...................................................................................
ASRC_OCKLPORTL_0 Register Field Descriptions ..............................................................
Register Call Summary for ASRC_OCKLPORTL_0 ..............................................................
ASRC_OCKLPORTH_0 Instances ..................................................................................
ASRC_OCKLPORTH_0 Register Field Descriptions .............................................................
Register Call Summary for ASRC_OCKLPORTH_0 ..............................................................
ASRC Group Data Instances .........................................................................................
ASRC Group Data Registers .........................................................................................
ASRC_GIFDATAL_0 Instances ......................................................................................
ASRC_GIFDATAL_0 Register Field Descriptions .................................................................
Register Call Summary for ASRC_GIFDATAL_0..................................................................
ASRC_GIFDATAR_0 Instances .....................................................................................
ASRC_GIFDATAR_0 Register Field Descriptions .................................................................
Register Call Summary for ASRC_GIFDATAR_0 .................................................................
ASRC_GOFDATAL_0 Instances ....................................................................................
ASRC_GOFDATAL_0 Register Field Descriptions ................................................................
Register Call Summary for ASRC_GOFDATAL_0 ................................................................
ASRC_GOFDATAR_0 Instances ....................................................................................
ASRC_GOFDATAR_0 Register Field Descriptions ...............................................................
Register Call Summary for ASRC_GOFDATAR_0 ................................................................
ASRC Stream Data Instances........................................................................................
ASRC Stream Data Registers ........................................................................................
ASRC_SIFDATAL_0 Instances ......................................................................................
ASRC_SIFDATAL_0 Register Field Descriptions .................................................................
Register Call Summary for ASRC_SIFDATAL_0 ..................................................................
ASRC_SIFDATAR_0 Instances ......................................................................................
ASRC_SIFDATAR_0 Register Field Descriptions .................................................................
Register Call Summary for ASRC_SIFDATAR_0 .................................................................
ASRC_SOFDATAL_0 Instances .....................................................................................
ASRC_SOFDATAL_0 Register Field Descriptions ................................................................
Register Call Summary for ASRC_SOFDATAL_0.................................................................
ASRC_SOFDATAR_0 Instances ....................................................................................
ASRC_SOFDATAR_0 Register Field Descriptions................................................................
Register Call Summary for ASRC_SOFDATAR_0 ................................................................
DCAN I/O Description .................................................................................................
DCAN Integration Attributes ..........................................................................................
DCAN Clocks and Resets ............................................................................................
11-159. ASRC_OCKZCTRL_0 Instances
2053
11-160.
2053
11-161.
11-162.
11-163.
11-164.
11-165.
11-166.
11-167.
11-168.
11-169.
11-170.
11-171.
11-172.
11-173.
11-174.
11-175.
11-176.
11-177.
11-178.
11-179.
11-180.
11-181.
11-182.
11-183.
11-184.
11-185.
11-186.
11-187.
11-188.
11-189.
11-190.
11-191.
11-192.
11-193.
11-194.
11-195.
11-196.
11-197.
11-198.
11-199.
11-200.
11-201.
11-202.
11-203.
11-204.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
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List of Tables
2053
2054
2054
2054
2055
2055
2055
2056
2056
2056
2057
2057
2057
2058
2058
2060
2060
2060
2061
2061
2061
2062
2062
2062
2063
2063
2063
2064
2064
2066
2066
2066
2067
2067
2067
2068
2068
2068
2069
2069
2069
2072
2075
2075
127
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11-205. DCAN Hardware Requests ........................................................................................... 2076
11-206. Initialization of a Transmit Object .................................................................................... 2084
11-207. Initialization of a single Receive Object for Data Frames
........................................................
2084
11-208. Initialization of a Single Receive Object for Remote Frames .................................................... 2085
11-209. Parameters of the CAN Bit Time..................................................................................... 2091
11-210. Example For Bit Timing ............................................................................................... 2097
11-211. Structure of a Message Object ....................................................................................... 2100
11-212. Message Object Field Descriptions.................................................................................. 2100
11-213. Message RAM Addressing in Debug/Suspend and RDA Modes................................................ 2102
11-214. ECC RAM Representation ............................................................................................ 2103
11-215. Message RAM Representation in Debug/Suspend Mode ........................................................ 2104
11-216. Message RAM Representation in RAM Direct Access Mode .................................................... 2105
11-217. DCAN Instances
.......................................................................................................
2113
11-218. DCAN Registers........................................................................................................ 2113
11-219. DCAN_CTL Instances ................................................................................................. 2116
11-220. DCAN_CTL Register Field Descriptions ............................................................................ 2116
11-221. Register Call Summary for DCAN_CTL............................................................................. 2118
11-222. DCAN_ES Instances .................................................................................................. 2119
.............................................................................
Register Call Summary for DCAN_ES ..............................................................................
DCAN_ERRC Instances ..............................................................................................
DCAN_ERRC Register Field Descriptions .........................................................................
Register Call Summary for DCAN_ERRC ..........................................................................
DCAN_BTR Instances ................................................................................................
DCAN_BTR Register Field Descriptions ............................................................................
Register Call Summary for DCAN_BTR ............................................................................
DCAN_INT Instances..................................................................................................
DCAN_INT Register Field Descriptions .............................................................................
Register Call Summary for DCAN_INT .............................................................................
DCAN_TEST Instances ...............................................................................................
DCAN_TEST Register Field Descriptions ..........................................................................
Register Call Summary for DCAN_TEST ...........................................................................
DCAN_PERR Instances ..............................................................................................
DCAN_PERR Register Field Descriptions..........................................................................
Register Call Summary for DCAN_PERR ..........................................................................
DCAN_REL Instances .................................................................................................
DCAN_REL Register Field Descriptions ............................................................................
Register Call Summary for DCAN_REL ............................................................................
DCAN_ECCDIAG Instances ..........................................................................................
DCAN_ECCDIAG Register Field Descriptions .....................................................................
Register Call Summary for DCAN_ECCDIAG .....................................................................
DCAN_ECCDIAG_STAT Instances .................................................................................
DCAN_ECCDIAG_STAT Register Field Descriptions ............................................................
Register Call Summary for DCAN_ECCDIAG_STAT .............................................................
DCAN_ECC_CS Instances ...........................................................................................
DCAN_ECC_CS Register Field Descriptions ......................................................................
Register Call Summary for DCAN_ECC_CS .......................................................................
DCAN_ECC_SERR Instances .......................................................................................
DCAN_ECC_SERR Register Field Descriptions ..................................................................
11-223. DCAN_ES Register Field Descriptions
11-224.
11-225.
11-226.
11-227.
11-228.
11-229.
11-230.
11-231.
11-232.
11-233.
11-234.
11-235.
11-236.
11-237.
11-238.
11-239.
11-240.
11-241.
11-242.
11-243.
11-244.
11-245.
11-246.
11-247.
11-248.
11-249.
11-250.
11-251.
11-252.
11-253.
128
List of Tables
2119
2121
2122
2122
2122
2123
2123
2124
2125
2125
2125
2127
2127
2128
2129
2129
2129
2130
2130
2130
2131
2131
2131
2132
2132
2132
2133
2133
2134
2135
2135
SPRUHY8I – January 2016 – Revised March 2019
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11-254. Register Call Summary for DCAN_ECC_SERR ................................................................... 2135
11-255. DCAN_ABOTR Instances ............................................................................................. 2136
11-256. DCAN_ABOTR Register Field Descriptions ........................................................................ 2136
11-257. Register Call Summary for DCAN_ABOTR ........................................................................ 2136
11-258. DCAN_TXRQ_X Instances ........................................................................................... 2137
11-259. DCAN_TXRQ_X Register Field Descriptions ...................................................................... 2137
11-260. Register Call Summary for DCAN_TXRQ_X ....................................................................... 2138
11-261. DCAN_TXRQ12 Instances
...........................................................................................
2139
11-262. DCAN_TXRQ12 Register Field Descriptions....................................................................... 2139
11-263. Register Call Summary for DCAN_TXRQ12 ....................................................................... 2139
...........................................................................................
DCAN_TXRQ34 Register Field Descriptions.......................................................................
Register Call Summary for DCAN_TXRQ34 .......................................................................
DCAN_TXRQ56 Instances ...........................................................................................
DCAN_TXRQ56 Register Field Descriptions.......................................................................
Register Call Summary for DCAN_TXRQ56 .......................................................................
DCAN_TXRQ78 Instances ...........................................................................................
DCAN_TXRQ78 Register Field Descriptions.......................................................................
Register Call Summary for DCAN_TXRQ78 .......................................................................
DCAN_NWDAT_X Instances .........................................................................................
DCAN_NWDAT_X Register Field Descriptions ....................................................................
Register Call Summary for DCAN_NWDAT_X ....................................................................
DCAN_NWDAT12 Instances .........................................................................................
DCAN_NWDAT12 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_NWDAT12 .....................................................................
DCAN_NWDAT34 Instances .........................................................................................
DCAN_NWDAT34 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_NWDAT34 .....................................................................
DCAN_NWDAT56 Instances .........................................................................................
DCAN_NWDAT56 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_NWDAT56 .....................................................................
DCAN_NWDAT78 Instances .........................................................................................
DCAN_NWDAT78 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_NWDAT78 .....................................................................
DCAN_INTPND_X Instances.........................................................................................
DCAN_INTPND_X Register Field Descriptions ....................................................................
Register Call Summary for DCAN_INTPND_X ....................................................................
DCAN_INTPND12 Instances .........................................................................................
DCAN_INTPND12 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_INTPND12.....................................................................
DCAN_INTPND34 Instances .........................................................................................
DCAN_INTPND34 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_INTPND34.....................................................................
DCAN_INTPND56 Instances .........................................................................................
DCAN_INTPND56 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_INTPND56.....................................................................
DCAN_INTPND78 Instances .........................................................................................
DCAN_INTPND78 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_INTPND78.....................................................................
11-264. DCAN_TXRQ34 Instances
2140
11-265.
2140
11-266.
11-267.
11-268.
11-269.
11-270.
11-271.
11-272.
11-273.
11-274.
11-275.
11-276.
11-277.
11-278.
11-279.
11-280.
11-281.
11-282.
11-283.
11-284.
11-285.
11-286.
11-287.
11-288.
11-289.
11-290.
11-291.
11-292.
11-293.
11-294.
11-295.
11-296.
11-297.
11-298.
11-299.
11-300.
11-301.
11-302.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2140
2141
2141
2141
2142
2142
2142
2143
2143
2144
2145
2145
2145
2146
2146
2146
2147
2147
2147
2148
2148
2148
2149
2149
2150
2151
2151
2151
2152
2152
2152
2153
2153
2153
2154
2154
2154
129
www.ti.com
2155
11-304.
2155
11-305.
11-306.
11-307.
11-308.
11-309.
11-310.
11-311.
11-312.
11-313.
11-314.
11-315.
11-316.
11-317.
11-318.
11-319.
11-320.
11-321.
11-322.
11-323.
11-324.
11-325.
11-326.
11-327.
11-328.
11-329.
11-330.
11-331.
11-332.
11-333.
11-334.
11-335.
11-336.
11-337.
11-338.
11-339.
11-340.
11-341.
11-342.
11-343.
11-344.
11-345.
11-346.
11-347.
11-348.
11-349.
11-350.
11-351.
130
.......................................................................................
DCAN_MSGVAL_X Register Field Descriptions...................................................................
Register Call Summary for DCAN_MSGVAL_X ...................................................................
DCAN_MSGVAL12 Instances ........................................................................................
DCAN_MSGVAL12 Register Field Descriptions ...................................................................
Register Call Summary for DCAN_MSGVAL12 ...................................................................
DCAN_MSGVAL34 Instances ........................................................................................
DCAN_MSGVAL34 Register Field Descriptions ...................................................................
Register Call Summary for DCAN_MSGVAL34 ...................................................................
DCAN_MSGVAL56 Instances ........................................................................................
DCAN_MSGVAL56 Register Field Descriptions ...................................................................
Register Call Summary for DCAN_MSGVAL56 ...................................................................
DCAN_MSGVAL78 Instances ........................................................................................
DCAN_MSGVAL78 Register Field Descriptions ...................................................................
Register Call Summary for DCAN_MSGVAL78 ...................................................................
DCAN_INTMUX12 Instances.........................................................................................
DCAN_INTMUX12 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_INTMUX12 ....................................................................
DCAN_INTMUX34 Instances.........................................................................................
DCAN_INTMUX34 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_INTMUX34 ....................................................................
DCAN_INTMUX56 Instances.........................................................................................
DCAN_INTMUX56 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_INTMUX56 ....................................................................
DCAN_INTMUX78 Instances.........................................................................................
DCAN_INTMUX78 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_INTMUX78 ....................................................................
DCAN_IF1CMD Instances ............................................................................................
DCAN_IF1CMD Register Field Descriptions .......................................................................
Register Call Summary for DCAN_IF1CMD........................................................................
DCAN_IF1MSK Instances ............................................................................................
DCAN_IF1MSK Register Field Descriptions .......................................................................
Register Call Summary for DCAN_IF1MSK ........................................................................
DCAN_IF1ARB Instances ............................................................................................
DCAN_IF1ARB Register Field Descriptions ........................................................................
Register Call Summary for DCAN_IF1ARB ........................................................................
DCAN_IF1MCTL Instances ...........................................................................................
DCAN_IF1MCTL Register Field Descriptions ......................................................................
Register Call Summary for DCAN_IF1MCTL ......................................................................
DCAN_IF1DATA Instances ...........................................................................................
DCAN_IF1DATA Register Field Descriptions ......................................................................
Register Call Summary for DCAN_IF1DATA.......................................................................
DCAN_IF1DATB Instances ...........................................................................................
DCAN_IF1DATB Register Field Descriptions ......................................................................
Register Call Summary for DCAN_IF1DATB.......................................................................
DCAN_IF2CMD Instances ............................................................................................
DCAN_IF2CMD Register Field Descriptions .......................................................................
Register Call Summary for DCAN_IF2CMD........................................................................
DCAN_IF2MSK Instances ............................................................................................
11-303. DCAN_MSGVAL_X Instances
List of Tables
2156
2157
2157
2157
2158
2158
2158
2159
2159
2159
2160
2160
2160
2161
2161
2161
2162
2162
2162
2163
2163
2163
2164
2164
2164
2165
2165
2167
2168
2168
2169
2170
2170
2171
2172
2172
2173
2174
2174
2174
2175
2175
2175
2176
2176
2178
2179
SPRUHY8I – January 2016 – Revised March 2019
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.......................................................................
Register Call Summary for DCAN_IF2MSK ........................................................................
DCAN_IF2ARB Instances ............................................................................................
DCAN_IF2ARB Register Field Descriptions ........................................................................
Register Call Summary for DCAN_IF2ARB ........................................................................
DCAN_IF2MCTL Instances ...........................................................................................
DCAN_IF2MCTL Register Field Descriptions ......................................................................
Register Call Summary for DCAN_IF2MCTL ......................................................................
DCAN_IF2DATA Instances ...........................................................................................
DCAN_IF2DATA Register Field Descriptions ......................................................................
Register Call Summary for DCAN_IF2DATA.......................................................................
DCAN_IF2DATB Instances ...........................................................................................
DCAN_IF2DATB Register Field Descriptions ......................................................................
Register Call Summary for DCAN_IF2DATB.......................................................................
DCAN_IF3OBS Instances ............................................................................................
DCAN_IF3OBS Register Field Descriptions .......................................................................
Register Call Summary for DCAN_IF3OBS ........................................................................
DCAN_IF3MSK Instances ............................................................................................
DCAN_IF3MSK Register Field Descriptions .......................................................................
Register Call Summary for DCAN_IF3MSK ........................................................................
DCAN_IF3ARB Instances ............................................................................................
DCAN_IF3ARB Register Field Descriptions ........................................................................
Register Call Summary for DCAN_IF3ARB ........................................................................
DCAN_IF3MCTL Instances ...........................................................................................
DCAN_IF3MCTL Register Field Descriptions ......................................................................
Register Call Summary for DCAN_IF3MCTL ......................................................................
DCAN_IF3DATA Instances ...........................................................................................
DCAN_IF3DATA Register Field Descriptions ......................................................................
Register Call Summary for DCAN_IF3DATA.......................................................................
DCAN_IF3DATB Instances ...........................................................................................
DCAN_IF3DATB Register Field Descriptions ......................................................................
Register Call Summary for DCAN_IF3DATB.......................................................................
DCAN_IF3UPD12 Instances .........................................................................................
DCAN_IF3UPD12 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_IF3UPD12 .....................................................................
DCAN_IF3UPD34 Instances .........................................................................................
DCAN_IF3UPD34 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_IF3UPD34 .....................................................................
DCAN_IF3UPD56 Instances .........................................................................................
DCAN_IF3UPD56 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_IF3UPD56 .....................................................................
DCAN_IF3UPD78 Instances .........................................................................................
DCAN_IF3UPD78 Register Field Descriptions ....................................................................
Register Call Summary for DCAN_IF3UPD78 .....................................................................
DISPC Video Port Signals for MIPI DPI 2.0, or BT.656 or BT.1120 ............................................
DISPC VP1 Programmable Fields for Active Matrix Display ....................................................
RFBI Interface Signals to/from Peripheral LCD ....................................................................
RFBI Programmable Timing Fields in RFBI Mode ................................................................
DSS Integration Attributes ............................................................................................
11-352. DCAN_IF2MSK Register Field Descriptions
2179
11-353.
2180
11-354.
11-355.
11-356.
11-357.
11-358.
11-359.
11-360.
11-361.
11-362.
11-363.
11-364.
11-365.
11-366.
11-367.
11-368.
11-369.
11-370.
11-371.
11-372.
11-373.
11-374.
11-375.
11-376.
11-377.
11-378.
11-379.
11-380.
11-381.
11-382.
11-383.
11-384.
11-385.
11-386.
11-387.
11-388.
11-389.
11-390.
11-391.
11-392.
11-393.
11-394.
11-395.
11-396.
11-397.
11-398.
11-399.
11-400.
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2181
2181
2182
2183
2183
2184
2185
2185
2185
2186
2186
2186
2187
2187
2188
2189
2189
2189
2190
2190
2191
2192
2192
2193
2194
2194
2194
2195
2195
2195
2196
2196
2196
2197
2197
2197
2198
2198
2198
2199
2199
2199
2203
2206
2210
2212
2215
131
www.ti.com
..............................................................................................
DSS Hardware Requests .............................................................................................
DISPC Interrupts - First Level ........................................................................................
DISPC Interrupts - Second Level - VID1 Pipeline .................................................................
DISPC Interrupts - Second Level - VP1 Output ...................................................................
DISPC DMA Buffer Size ..............................................................................................
DISPC Register Settings for Accessing Image in Internal Memory .............................................
DISPC Memory Formats Support ....................................................................................
DISPC VID1 Replication: ARGB Pixel Formats Remapping into ARGB48-12121212 .......................
DISPC VID1 Line Buffer Width for Scaler Unit .....................................................................
11-401. DSS Clocks and Resets
11-402.
11-403.
11-404.
11-405.
11-406.
11-407.
11-408.
11-409.
11-410.
2216
2216
2220
2220
2221
2221
2222
2226
2229
2232
11-411. DISPC Register Bit-Fields Associated to Coefficients for ARGB and Y Configuration in VID Horizontal
Scaler ..................................................................................................................... 2234
11-412. DISPC VID1 Vertical and Horizontal Accumulator Phases ....................................................... 2236
11-413. DISPC VID1 CSC - YUV to RGB Register Bitfield Settings ...................................................... 2237
11-414. DISPC VP1 CPR, or RGB to YUV Conversion Coefficients with Associated Register Bitfields ............. 2240
11-415. DISPC BT Mode Bit Function ........................................................................................ 2243
11-416. DISPC BT Mode Status of Protection Bits as F, V and H Vary ................................................. 2243
11-417. DISPC VP1 PPL and LLP Value for HD Standard ................................................................ 2251
11-418. RFBI DMA Requests Events ......................................................................................... 2254
11-419. RFBI Read/Write Function Description
.............................................................................
2257
11-420. RFBI Minimum Cycle Time for CS/WE Always Asserted ......................................................... 2258
11-421. RFBI Timings Configuration .......................................................................................... 2260
11-422. RFBI Minimum Pulse Width (HSYNC/VSYNC) .................................................................... 2266
11-423. RFBI Hardware Status Features ..................................................................................... 2266
11-424. DSSUL_0_CFG Instances ............................................................................................ 2267
11-425. DSSUL_0_CFG Registers ............................................................................................ 2267
11-426. DSS_REVISION Instances ........................................................................................... 2268
11-427. DSS_REVISION Register Field Descriptions ...................................................................... 2268
11-428. Register Call Summary for DSS_REVISION ....................................................................... 2268
11-429. DSS_SYSCONFIG Instances ........................................................................................ 2269
11-430. DSS_SYSCONFIG Register Field Descriptions ................................................................... 2269
11-431. Register Call Summary for DSS_SYSCONFIG .................................................................... 2269
11-432. DSS_SYSSTATUS Instances ........................................................................................ 2270
11-433. DSS_SYSSTATUS Register Field Descriptions ................................................................... 2270
11-434. Register Call Summary for DSS_SYSSTATUS .................................................................... 2270
11-435. DSS_RFBI_CTRL Instances ......................................................................................... 2271
11-436. DSS_RFBI_CTRL Register Field Descriptions
....................................................................
2271
11-437. Register Call Summary for DSS_RFBI_CTRL ..................................................................... 2271
11-438. DSS_DPI_CTRL Instances ........................................................................................... 2272
11-439. DSS_DPI_CTRL Register Field Descriptions ...................................................................... 2272
11-440. Register Call Summary for DSS_DPI_CTRL ....................................................................... 2272
11-441. DSS_DEBUG_CFG Instances ....................................................................................... 2273
2273
11-443.
2273
11-444.
11-445.
11-446.
11-447.
11-448.
132
..................................................................
Register Call Summary for DSS_DEBUG_CFG ...................................................................
DISPC_COMMON Instances .........................................................................................
DISPC_COMMON Registers .........................................................................................
DISPC_REVISION Instances ........................................................................................
DISPC_REVISION Register Field Descriptions....................................................................
Register Call Summary for DISPC_REVISION ....................................................................
11-442. DSS_DEBUG_CFG Register Field Descriptions
List of Tables
2274
2274
2275
2275
2275
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
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.....................................................................................
DISPC_SYSCONFIG Register Field Descriptions .................................................................
Register Call Summary for DISPC_SYSCONFIG .................................................................
DISPC_SYSSTATUS Instances .....................................................................................
DISPC_SYSSTATUS Register Field Descriptions ................................................................
Register Call Summary for DISPC_SYSSTATUS .................................................................
DISPC_IRQ_EOI Instances ..........................................................................................
DISPC_IRQ_EOI Register Field Descriptions......................................................................
Register Call Summary for DISPC_IRQ_EOI ......................................................................
DISPC_IRQSTATUS_RAW Instances ..............................................................................
DISPC_IRQSTATUS_RAW Register Field Descriptions .........................................................
Register Call Summary for DISPC_IRQSTATUS_RAW ..........................................................
DISPC_IRQSTATUS Instances ......................................................................................
DISPC_IRQSTATUS Register Field Descriptions .................................................................
Register Call Summary for DISPC_IRQSTATUS..................................................................
DISPC_IRQENABLE_SET Instances ...............................................................................
DISPC_IRQENABLE_SET Register Field Descriptions ..........................................................
Register Call Summary for DISPC_IRQENABLE_SET ...........................................................
DISPC_IRQENABLE_CLR Instances ...............................................................................
DISPC_IRQENABLE_CLR Register Field Descriptions ..........................................................
Register Call Summary for DISPC_IRQENABLE_CLR ...........................................................
DISPC_IRQWAKEEN Instances .....................................................................................
DISPC_IRQWAKEEN Register Field Descriptions ................................................................
Register Call Summary for DISPC_IRQWAKEEN.................................................................
DISPC_GLOBAL_MFLAG_ATTRIBUTE Instances ...............................................................
DISPC_GLOBAL_MFLAG_ATTRIBUTE Register Field Descriptions ..........................................
Register Call Summary for DISPC_GLOBAL_MFLAG_ATTRIBUTE ...........................................
DISPC_GLOBAL_BUFFER Instances ..............................................................................
DISPC_GLOBAL_BUFFER Register Field Descriptions .........................................................
Register Call Summary for DISPC_GLOBAL_BUFFER ..........................................................
DISPC_BA0_FLIPIMMEDIATE_EN Instances .....................................................................
DISPC_BA0_FLIPIMMEDIATE_EN Register Field Descriptions ................................................
Register Call Summary for DISPC_BA0_FLIPIMMEDIATE_EN ................................................
DISPC_DBG_CONTROL Instances .................................................................................
DISPC_DBG_CONTROL Register Field Descriptions ............................................................
Register Call Summary for DISPC_DBG_CONTROL ............................................................
DISPC_DBG_STATUS Instances ...................................................................................
DISPC_DBG_STATUS Register Field Descriptions ..............................................................
Register Call Summary for DISPC_DBG_STATUS ...............................................................
DISPC_CLKGATING_DISABLE Instances .........................................................................
DISPC_CLKGATING_DISABLE Register Field Descriptions ....................................................
Register Call Summary for DISPC_CLKGATING_DISABLE.....................................................
DISPC_VID1 Instances ...............................................................................................
DISPC_VID1 Registers ...............................................................................................
DISPC_VID1_ACCUH_0 to DISPC_VID1_ACCUH_1 Instances ...............................................
DISPC_VID1_ACCUH_0 to DISPC_VID1_ACCUH_1 Register Field Descriptions ...........................
Register Call Summary for DISPC_VID1_ACCUH_0 .............................................................
DISPC_VID1_ACCUH2_0 to DISPC_VID1_ACCUH2_1 Instances ............................................
DISPC_VID1_ACCUH2_0 to DISPC_VID1_ACCUH2_1 Register Field Descriptions ........................
11-449. DISPC_SYSCONFIG Instances
2276
11-450.
2276
11-451.
11-452.
11-453.
11-454.
11-455.
11-456.
11-457.
11-458.
11-459.
11-460.
11-461.
11-462.
11-463.
11-464.
11-465.
11-466.
11-467.
11-468.
11-469.
11-470.
11-471.
11-472.
11-473.
11-474.
11-475.
11-476.
11-477.
11-478.
11-479.
11-480.
11-481.
11-482.
11-483.
11-484.
11-485.
11-486.
11-487.
11-488.
11-489.
11-490.
11-491.
11-492.
11-493.
11-494.
11-495.
11-496.
11-497.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2277
2278
2278
2278
2279
2279
2279
2280
2280
2281
2282
2282
2283
2284
2284
2285
2286
2286
2287
2288
2288
2289
2290
2290
2290
2291
2291
2292
2293
2293
2293
2294
2294
2294
2295
2295
2295
2296
2296
2297
2299
2299
2305
2305
2305
2306
2306
133
www.ti.com
2306
11-499.
2307
11-500.
11-501.
11-502.
11-503.
11-504.
11-505.
11-506.
11-507.
11-508.
11-509.
11-510.
11-511.
11-512.
11-513.
11-514.
11-515.
11-516.
11-517.
11-518.
11-519.
11-520.
11-521.
11-522.
11-523.
11-524.
11-525.
11-526.
11-527.
11-528.
11-529.
11-530.
11-531.
11-532.
11-533.
11-534.
11-535.
11-536.
11-537.
11-538.
11-539.
11-540.
11-541.
11-542.
11-543.
11-544.
11-545.
11-546.
134
...........................................................
DISPC_VID1_ACCUV_0 to DISPC_VID1_ACCUV_1 Instances ................................................
DISPC_VID1_ACCUV_0 to DISPC_VID1_ACCUV_1 Register Field Descriptions ...........................
Register Call Summary for DISPC_VID1_ACCUV_0 .............................................................
DISPC_VID1_ACCUV2_0 to DISPC_VID1_ACCUV2_1 Instances .............................................
DISPC_VID1_ACCUV2_0 to DISPC_VID1_ACCUV2_1 Register Field Descriptions ........................
Register Call Summary for DISPC_VID1_ACCUV2_0............................................................
DISPC_VID1_ATTRIBUTES Instances .............................................................................
DISPC_VID1_ATTRIBUTES Register Field Descriptions ........................................................
Register Call Summary for DISPC_VID1_ATTRIBUTES .........................................................
DISPC_VID1_ATTRIBUTES2 Instances ...........................................................................
DISPC_VID1_ATTRIBUTES2 Register Field Descriptions .......................................................
Register Call Summary for DISPC_VID1_ATTRIBUTES2 .......................................................
DISPC_VID1_BA_0 to DISPC_VID1_BA_1 Instances ...........................................................
DISPC_VID1_BA_0 to DISPC_VID1_BA_1 Register Field Descriptions .......................................
Register Call Summary for DISPC_VID1_BA_0 ...................................................................
DISPC_VID1_BA_UV_0 to DISPC_VID1_BA_UV_1 Instances .................................................
DISPC_VID1_BA_UV_0 to DISPC_VID1_BA_UV_1 Register Field Descriptions ............................
Register Call Summary for DISPC_VID1_BA_UV_0 ..............................................................
DISPC_VID1_BUF_SIZE_STATUS Instances .....................................................................
DISPC_VID1_BUF_SIZE_STATUS Register Field Descriptions ................................................
Register Call Summary for DISPC_VID1_BUF_SIZE_STATUS ................................................
DISPC_VID1_BUF_THRESHOLD Instances ......................................................................
DISPC_VID1_BUF_THRESHOLD Register Field Descriptions .................................................
Register Call Summary for DISPC_VID1_BUF_THRESHOLD ..................................................
DISPC_VID1_CONV_COEF0 Instances ...........................................................................
DISPC_VID1_CONV_COEF0 Register Field Descriptions .......................................................
Register Call Summary for DISPC_VID1_CONV_COEF0 .......................................................
DISPC_VID1_CONV_COEF1 Instances ...........................................................................
DISPC_VID1_CONV_COEF1 Register Field Descriptions .......................................................
Register Call Summary for DISPC_VID1_CONV_COEF1 .......................................................
DISPC_VID1_CONV_COEF2 Instances ...........................................................................
DISPC_VID1_CONV_COEF2 Register Field Descriptions .......................................................
Register Call Summary for DISPC_VID1_CONV_COEF2 .......................................................
DISPC_VID1_CONV_COEF3 Instances ...........................................................................
DISPC_VID1_CONV_COEF3 Register Field Descriptions .......................................................
Register Call Summary for DISPC_VID1_CONV_COEF3 .......................................................
DISPC_VID1_CONV_COEF4 Instances ...........................................................................
DISPC_VID1_CONV_COEF4 Register Field Descriptions .......................................................
Register Call Summary for DISPC_VID1_CONV_COEF4 .......................................................
DISPC_VID1_CONV_COEF5 Instances ...........................................................................
DISPC_VID1_CONV_COEF5 Register Field Descriptions .......................................................
Register Call Summary for DISPC_VID1_CONV_COEF5 .......................................................
DISPC_VID1_CONV_COEF6 Instances ...........................................................................
DISPC_VID1_CONV_COEF6 Register Field Descriptions .......................................................
Register Call Summary for DISPC_VID1_CONV_COEF6 .......................................................
DISPC_VID1_FIRH Instances .......................................................................................
DISPC_VID1_FIRH Register Field Descriptions ...................................................................
Register Call Summary for DISPC_VID1_FIRH ...................................................................
11-498. Register Call Summary for DISPC_VID1_ACCUH2_0
List of Tables
2307
2307
2308
2308
2308
2309
2309
2313
2314
2314
2314
2316
2316
2316
2317
2317
2317
2318
2318
2318
2319
2319
2319
2320
2320
2320
2321
2321
2321
2322
2322
2322
2323
2323
2323
2324
2324
2324
2325
2325
2325
2326
2326
2326
2327
2327
2327
SPRUHY8I – January 2016 – Revised March 2019
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www.ti.com
11-547. DISPC_VID1_FIRH2 Instances ...................................................................................... 2328
11-548. DISPC_VID1_FIRH2 Register Field Descriptions ................................................................. 2328
11-549. Register Call Summary for DISPC_VID1_FIRH2 .................................................................. 2328
11-550. DISPC_VID1_FIRV Instances ........................................................................................ 2329
11-551. DISPC_VID1_FIRV Register Field Descriptions ................................................................... 2329
...................................................................
DISPC_VID1_FIRV2 Instances ......................................................................................
DISPC_VID1_FIRV2 Register Field Descriptions .................................................................
Register Call Summary for DISPC_VID1_FIRV2 ..................................................................
DISPC_VID1_FIR_COEF_H0_0 to DISPC_VID1_FIR_COEF_H0_8 Instances ..............................
DISPC_VID1_FIR_COEF_H0_0 to DISPC_VID1_FIR_COEF_H0_8 Register Field Descriptions .........
Register Call Summary for DISPC_VID1_FIR_COEF_H0_0 ....................................................
DISPC_VID1_FIR_COEF_H0_C_0 to DISPC_VID1_FIR_COEF_H0_C_8 Instances .......................
DISPC_VID1_FIR_COEF_H0_C_0 to DISPC_VID1_FIR_COEF_H0_C_8 Register Field Descriptions ..
Register Call Summary for DISPC_VID1_FIR_COEF_H0_C_0 .................................................
DISPC_VID1_FIR_COEF_H12_0 to DISPC_VID1_FIR_COEF_H12_15 Instances ..........................
DISPC_VID1_FIR_COEF_H12_0 to DISPC_VID1_FIR_COEF_H12_15 Register Field Descriptions .....
Register Call Summary for DISPC_VID1_FIR_COEF_H12_0 ...................................................
DISPC_VID1_FIR_COEF_H12_C_0 to DISPC_VID1_FIR_COEF_H12_C_15 Instances ...................
11-552. Register Call Summary for DISPC_VID1_FIRV
2329
11-553.
2330
11-554.
11-555.
11-556.
11-557.
11-558.
11-559.
11-560.
11-561.
11-562.
11-563.
11-564.
11-565.
2330
2330
2331
2331
2331
2332
2332
2332
2333
2333
2333
2334
11-566. DISPC_VID1_FIR_COEF_H12_C_0 to DISPC_VID1_FIR_COEF_H12_C_15 Register Field
Descriptions .............................................................................................................. 2334
11-567. Register Call Summary for DISPC_VID1_FIR_COEF_H12_C_0 ............................................... 2334
..............................
DISPC_VID1_FIR_COEF_V0_0 to DISPC_VID1_FIR_COEF_V0_8 Register Field Descriptions ..........
Register Call Summary for DISPC_VID1_FIR_COEF_V0_0 ....................................................
DISPC_VID1_FIR_COEF_V0_C_0 to DISPC_VID1_FIR_COEF_V0_C_8 Instances........................
DISPC_VID1_FIR_COEF_V0_C_0 to DISPC_VID1_FIR_COEF_V0_C_8 Register Field Descriptions ...
Register Call Summary for DISPC_VID1_FIR_COEF_V0_C_0 .................................................
DISPC_VID1_FIR_COEF_V12_0 to DISPC_VID1_FIR_COEF_V12_15 Instances ..........................
DISPC_VID1_FIR_COEF_V12_0 to DISPC_VID1_FIR_COEF_V12_15 Register Field Descriptions .....
Register Call Summary for DISPC_VID1_FIR_COEF_V12_0 ...................................................
DISPC_VID1_FIR_COEF_V12_C_0 to DISPC_VID1_FIR_COEF_V12_C_15 Instances ...................
11-568. DISPC_VID1_FIR_COEF_V0_0 to DISPC_VID1_FIR_COEF_V0_8 Instances
11-569.
11-570.
11-571.
11-572.
11-573.
11-574.
11-575.
11-576.
11-577.
2335
2335
2335
2336
2336
2336
2337
2337
2337
2338
11-578. DISPC_VID1_FIR_COEF_V12_C_0 to DISPC_VID1_FIR_COEF_V12_C_15 Register Field
Descriptions .............................................................................................................. 2338
11-579. Register Call Summary for DISPC_VID1_FIR_COEF_V12_C_0
...............................................
2338
11-580. DISPC_VID1_GLOBAL_ALPHA Instances ......................................................................... 2339
11-581. DISPC_VID1_GLOBAL_ALPHA Register Field Descriptions .................................................... 2339
....................................................
DISPC_VID1_IRQENABLE Instances ..............................................................................
DISPC_VID1_IRQENABLE Register Field Descriptions..........................................................
Register Call Summary for DISPC_VID1_IRQENABLE ..........................................................
DISPC_VID1_IRQSTATUS Instances ..............................................................................
DISPC_VID1_IRQSTATUS Register Field Descriptions..........................................................
Register Call Summary for DISPC_VID1_IRQSTATUS ..........................................................
DISPC_VID1_MFLAG_THRESHOLD Instances ..................................................................
DISPC_VID1_MFLAG_THRESHOLD Register Field Descriptions..............................................
Register Call Summary for DISPC_VID1_MFLAG_THRESHOLD ..............................................
DISPC_VID1_PICTURE_SIZE Instances ..........................................................................
DISPC_VID1_PICTURE_SIZE Register Field Descriptions ......................................................
11-582. Register Call Summary for DISPC_VID1_GLOBAL_ALPHA
11-583.
11-584.
11-585.
11-586.
11-587.
11-588.
11-589.
11-590.
11-591.
11-592.
11-593.
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2339
2340
2340
2341
2342
2342
2343
2344
2344
2344
2345
2345
135
www.ti.com
11-594. Register Call Summary for DISPC_VID1_PICTURE_SIZE ...................................................... 2345
11-595. DISPC_VID1_PIXEL_INC Instances ................................................................................ 2346
11-596. DISPC_VID1_PIXEL_INC Register Field Descriptions ........................................................... 2346
11-597. Register Call Summary for DISPC_VID1_PIXEL_INC ............................................................ 2346
11-598. DISPC_VID1_POSITION Instances ................................................................................. 2347
11-599. DISPC_VID1_POSITION Register Field Descriptions ............................................................ 2347
11-600. Register Call Summary for DISPC_VID1_POSITION ............................................................. 2347
11-601. DISPC_VID1_PRELOAD Instances ................................................................................. 2348
11-602. DISPC_VID1_PRELOAD Register Field Descriptions ............................................................ 2348
11-603. Register Call Summary for DISPC_VID1_PRELOAD ............................................................. 2348
11-604. DISPC_VID1_ROW_INC Instances ................................................................................. 2349
11-605. DISPC_VID1_ROW_INC Register Field Descriptions ............................................................ 2349
11-606. Register Call Summary for DISPC_VID1_ROW_INC ............................................................. 2349
11-607. DISPC_VID1_SIZE Instances ........................................................................................ 2350
11-608. DISPC_VID1_SIZE Register Field Descriptions ................................................................... 2350
11-609. Register Call Summary for DISPC_VID1_SIZE.................................................................... 2350
11-610. DISPC_VID1_CLUT Instances ....................................................................................... 2351
11-611. DISPC_VID1_CLUT Register Field Descriptions .................................................................. 2351
2351
11-613.
2353
11-614.
11-615.
11-616.
11-617.
11-618.
11-619.
11-620.
11-621.
11-622.
11-623.
11-624.
11-625.
11-626.
11-627.
11-628.
11-629.
11-630.
11-631.
11-632.
11-633.
11-634.
11-635.
11-636.
11-637.
11-638.
11-639.
11-640.
11-641.
11-642.
136
..................................................................
DISPC_OVR1 Instances ..............................................................................................
DISPC_OVR1 Registers ..............................................................................................
DISPC_OVR1_CONFIG Instances ..................................................................................
DISPC_OVR1_CONFIG Register Field Descriptions .............................................................
Register Call Summary for DISPC_OVR1_CONFIG ..............................................................
DISPC_OVR1_DEFAULT_COLOR Instances .....................................................................
DISPC_OVR1_DEFAULT_COLOR Register Field Descriptions ................................................
Register Call Summary for DISPC_OVR1_DEFAULT_COLOR .................................................
DISPC_OVR1_DEFAULT_COLOR2 Instances....................................................................
DISPC_OVR1_DEFAULT_COLOR2 Register Field Descriptions ...............................................
Register Call Summary for DISPC_OVR1_DEFAULT_COLOR2 ...............................................
DISPC_OVR1_TRANS_COLOR_MAX Instances .................................................................
DISPC_OVR1_TRANS_COLOR_MAX Register Field Descriptions ............................................
Register Call Summary for DISPC_OVR1_TRANS_COLOR_MAX .............................................
DISPC_OVR1_TRANS_COLOR_MAX2 Instances ...............................................................
DISPC_OVR1_TRANS_COLOR_MAX2 Register Field Descriptions...........................................
Register Call Summary for DISPC_OVR1_TRANS_COLOR_MAX2 ...........................................
DISPC_OVR1_TRANS_COLOR_MIN Instances ..................................................................
DISPC_OVR1_TRANS_COLOR_MIN Register Field Descriptions .............................................
Register Call Summary for DISPC_OVR1_TRANS_COLOR_MIN .............................................
DISPC_OVR1_TRANS_COLOR_MIN2 Instances ................................................................
DISPC_OVR1_TRANS_COLOR_MIN2 Register Field Descriptions ...........................................
Register Call Summary for DISPC_OVR1_TRANS_COLOR_MIN2 ............................................
DISPC_VP1 Instances ................................................................................................
DISPC_VP1 Registers ................................................................................................
DISPC_VP1_CONFIG Instances ....................................................................................
DISPC_VP1_CONFIG Register Field Descriptions ...............................................................
Register Call Summary for DISPC_VP1_CONFIG ................................................................
DISPC_VP1_CONTROL Instances .................................................................................
DISPC_VP1_CONTROL Register Field Descriptions .............................................................
11-612. Register Call Summary for DISPC_VID1_CLUT
List of Tables
2353
2354
2354
2355
2356
2356
2356
2357
2357
2357
2358
2358
2358
2359
2359
2359
2360
2360
2360
2361
2361
2361
2363
2363
2365
2365
2367
2368
2368
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
11-643. Register Call Summary for DISPC_VP1_CONTROL ............................................................. 2370
11-644. DISPC_VP1_CPR_COEF_B Instances ............................................................................. 2371
11-645. DISPC_VP1_CPR_COEF_B Register Field Descriptions ........................................................ 2371
........................................................
DISPC_VP1_CPR_COEF_G Instances ............................................................................
DISPC_VP1_CPR_COEF_G Register Field Descriptions ........................................................
Register Call Summary for DISPC_VP1_CPR_COEF_G ........................................................
DISPC_VP1_CPR_COEF_R Instances.............................................................................
DISPC_VP1_CPR_COEF_R Register Field Descriptions ........................................................
Register Call Summary for DISPC_VP1_CPR_COEF_R ........................................................
DISPC_VP1_DATA_CYCLE_0 to DISPC_VP1_DATA_CYCLE_2 Instances .................................
DISPC_VP1_DATA_CYCLE_0 to DISPC_VP1_DATA_CYCLE_2 Register Field Descriptions ............
Register Call Summary for DISPC_VP1_DATA_CYCLE_0 ......................................................
DISPC_VP1_GAMMA_TABLE Instances ..........................................................................
DISPC_VP1_GAMMA_TABLE Register Field Descriptions ......................................................
Register Call Summary for DISPC_VP1_GAMMA_TABLE ......................................................
DISPC_VP1_IRQENABLE Instances ...............................................................................
DISPC_VP1_IRQENABLE Register Field Descriptions ..........................................................
Register Call Summary for DISPC_VP1_IRQENABLE ...........................................................
DISPC_VP1_IRQSTATUS Instances ...............................................................................
DISPC_VP1_IRQSTATUS Register Field Descriptions ..........................................................
Register Call Summary for DISPC_VP1_IRQSTATUS ...........................................................
DISPC_VP1_LINE_NUMBER Instances ...........................................................................
DISPC_VP1_LINE_NUMBER Register Field Descriptions .......................................................
Register Call Summary for DISPC_VP1_LINE_NUMBER .......................................................
DISPC_VP1_POL_FREQ Instances ................................................................................
DISPC_VP1_POL_FREQ Register Field Descriptions ...........................................................
Register Call Summary for DISPC_VP1_POL_FREQ ............................................................
DISPC_VP1_SIZE_SCREEN Instances ............................................................................
DISPC_VP1_SIZE_SCREEN Register Field Descriptions .......................................................
Register Call Summary for DISPC_VP1_SIZE_SCREEN ........................................................
DISPC_VP1_TIMING_H Instances ..................................................................................
DISPC_VP1_TIMING_H Register Field Descriptions .............................................................
Register Call Summary for DISPC_VP1_TIMING_H..............................................................
DISPC_VP1_TIMING_V Instances ..................................................................................
DISPC_VP1_TIMING_V Register Field Descriptions .............................................................
Register Call Summary for DISPC_VP1_TIMING_V ..............................................................
RFBI Instances .........................................................................................................
RFBI Registers .........................................................................................................
RFBI_REVISION Instances ..........................................................................................
RFBI_REVISION Register Field Descriptions ......................................................................
Register Call Summary for RFBI_REVISION ......................................................................
RFBI_SYSCONFIG Instances .......................................................................................
RFBI_SYSCONFIG Register Field Descriptions ...................................................................
Register Call Summary for RFBI_SYSCONFIG ...................................................................
RFBI_SYSSTATUS Instances .......................................................................................
RFBI_SYSSTATUS Register Field Descriptions...................................................................
Register Call Summary for RFBI_SYSSTATUS ...................................................................
RFBI_CONTROL Instances ..........................................................................................
11-646. Register Call Summary for DISPC_VP1_CPR_COEF_B
2371
11-647.
2372
11-648.
11-649.
11-650.
11-651.
11-652.
11-653.
11-654.
11-655.
11-656.
11-657.
11-658.
11-659.
11-660.
11-661.
11-662.
11-663.
11-664.
11-665.
11-666.
11-667.
11-668.
11-669.
11-670.
11-671.
11-672.
11-673.
11-674.
11-675.
11-676.
11-677.
11-678.
11-679.
11-680.
11-681.
11-682.
11-683.
11-684.
11-685.
11-686.
11-687.
11-688.
11-689.
11-690.
11-691.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2372
2372
2373
2373
2373
2374
2374
2374
2375
2375
2375
2376
2376
2377
2378
2378
2379
2380
2380
2380
2381
2381
2382
2383
2383
2383
2384
2384
2384
2385
2385
2385
2387
2387
2389
2389
2389
2390
2390
2391
2392
2392
2392
2394
137
www.ti.com
2394
11-693.
2395
11-694.
11-695.
11-696.
11-697.
11-698.
11-699.
11-700.
11-701.
11-702.
11-703.
11-704.
11-705.
11-706.
11-707.
11-708.
11-709.
11-710.
11-711.
11-712.
11-713.
11-714.
11-715.
11-716.
11-717.
11-718.
11-719.
11-720.
11-721.
11-722.
11-723.
11-724.
11-725.
11-726.
11-727.
11-728.
11-729.
11-730.
11-731.
11-732.
11-733.
11-734.
11-735.
11-736.
11-737.
11-738.
11-739.
11-740.
138
.....................................................................
Register Call Summary for RFBI_CONTROL ......................................................................
RFBI_PIXEL_CNT Instances .........................................................................................
RFBI_PIXEL_CNT Register Field Descriptions ....................................................................
Register Call Summary for RFBI_PIXEL_CNT ....................................................................
RFBI_LINE_NUMBER Instances ....................................................................................
RFBI_LINE_NUMBER Register Field Descriptions ...............................................................
Register Call Summary for RFBI_LINE_NUMBER ................................................................
RFBI_CMD Instances .................................................................................................
RFBI_CMD Register Field Descriptions ............................................................................
Register Call Summary for RFBI_CMD .............................................................................
RFBI_PARAM Instances ..............................................................................................
RFBI_PARAM Register Field Descriptions .........................................................................
Register Call Summary for RFBI_PARAM..........................................................................
RFBI_DATA Instances ................................................................................................
RFBI_DATA Register Field Descriptions ...........................................................................
Register Call Summary for RFBI_DATA ............................................................................
RFBI_READ Instances ................................................................................................
RFBI_READ Register Field Descriptions ...........................................................................
Register Call Summary for RFBI_READ ............................................................................
RFBI_STATUS Instances .............................................................................................
RFBI_STATUS Register Field Descriptions ........................................................................
Register Call Summary for RFBI_STATUS ........................................................................
RFBI_CONFIG__0 Instances ........................................................................................
RFBI_CONFIG__0 Register Field Descriptions....................................................................
Register Call Summary for RFBI_CONFIG__0 ....................................................................
RFBI_ONOFF_TIME__0 Instances .................................................................................
RFBI_ONOFF_TIME__0 Register Field Descriptions .............................................................
Register Call Summary for RFBI_ONOFF_TIME__0 .............................................................
RFBI_CYCLE_TIME__0 Instances ..................................................................................
RFBI_CYCLE_TIME__0 Register Field Descriptions .............................................................
Register Call Summary for RFBI_CYCLE_TIME__0 ..............................................................
RFBI_DATA_CYCLE1__0 Instances ................................................................................
RFBI_DATA_CYCLE1__0 Register Field Descriptions ...........................................................
Register Call Summary for RFBI_DATA_CYCLE1__0 ...........................................................
RFBI_DATA_CYCLE2__0 Instances ................................................................................
RFBI_DATA_CYCLE2__0 Register Field Descriptions ...........................................................
Register Call Summary for RFBI_DATA_CYCLE2__0 ...........................................................
RFBI_DATA_CYCLE3__0 Instances ................................................................................
RFBI_DATA_CYCLE3__0 Register Field Descriptions ...........................................................
Register Call Summary for RFBI_DATA_CYCLE3__0 ...........................................................
RFBI_CONFIG__1 Instances ........................................................................................
RFBI_CONFIG__1 Register Field Descriptions....................................................................
Register Call Summary for RFBI_CONFIG__1 ....................................................................
RFBI_ONOFF_TIME__1 Instances .................................................................................
RFBI_ONOFF_TIME__1 Register Field Descriptions .............................................................
Register Call Summary for RFBI_ONOFF_TIME__1 .............................................................
RFBI_CYCLE_TIME__1 Instances ..................................................................................
RFBI_CYCLE_TIME__1 Register Field Descriptions .............................................................
11-692. RFBI_CONTROL Register Field Descriptions
List of Tables
2396
2396
2396
2397
2397
2397
2398
2398
2398
2399
2399
2399
2400
2400
2400
2401
2401
2401
2402
2402
2402
2403
2403
2404
2406
2406
2406
2407
2407
2408
2409
2409
2409
2410
2410
2410
2411
2411
2411
2412
2412
2413
2415
2415
2415
2416
2416
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
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www.ti.com
11-741. Register Call Summary for RFBI_CYCLE_TIME__1 .............................................................. 2417
11-742. RFBI_DATA_CYCLE1__1 Instances ................................................................................ 2418
11-743. RFBI_DATA_CYCLE1__1 Register Field Descriptions ........................................................... 2418
...........................................................
RFBI_DATA_CYCLE2__1 Instances ................................................................................
RFBI_DATA_CYCLE2__1 Register Field Descriptions ...........................................................
Register Call Summary for RFBI_DATA_CYCLE2__1 ...........................................................
RFBI_DATA_CYCLE3__1 Instances ................................................................................
RFBI_DATA_CYCLE3__1 Register Field Descriptions ...........................................................
Register Call Summary for RFBI_DATA_CYCLE3__1 ...........................................................
RFBI_VSYNC_WIDTH Instances ....................................................................................
RFBI_VSYNC_WIDTH Register Field Descriptions ...............................................................
Register Call Summary for RFBI_VSYNC_WIDTH ...............................................................
RFBI_HSYNC_WIDTH Instances ....................................................................................
RFBI_HSYNC_WIDTH Register Field Descriptions ...............................................................
Register Call Summary for RFBI_HSYNC_WIDTH ...............................................................
eCAP Subsystems I/O Signals .......................................................................................
eCAP Integration Attributes...........................................................................................
eCAP Clocks and Resets .............................................................................................
eCAP Hardware Requests ............................................................................................
eCAPMUX0 and eCAPMUX1 Input Event Mapping...............................................................
eCAP Control and Status Functional Registers ....................................................................
eCAP Instances ........................................................................................................
eCAP Registers ........................................................................................................
PWMSS_ECAP_TSCNT Instances .................................................................................
PWMSS_ECAP_TSCNT Register Field Descriptions .............................................................
PWMSS_ECAP_CNTPHS Instances ...............................................................................
PWMSS_ECAP_CNTPHS Register Field Descriptions ...........................................................
PWMSS_ECAP_CAP1 Instances ...................................................................................
PWMSS_ECAP_CAP1 Register Field Descriptions ...............................................................
PWMSS_ECAP_CAP2 Instances ...................................................................................
PWMSS_ECAP_CAP2 Register Field Descriptions ...............................................................
PWMSS_ECAP_CAP3 Instances ...................................................................................
PWMSS_ECAP_CAP3 Register Field Descriptions ...............................................................
PWMSS_ECAP_CAP4 Instances ...................................................................................
PWMSS_ECAP_CAP4 Register Field Descriptions ...............................................................
PWMSS_ECAP_ECCTL1 Instances ................................................................................
PWMSS_ECAP_ECCTL1 Register Field Descriptions ...........................................................
PWMSS_ECAP_ECCTL2 Instances ................................................................................
PWMSS_ECAP_ECCTL2 Register Field Descriptions ...........................................................
PWMSS_ECAP_ECEINT Instances .................................................................................
PWMSS_ECAP_ECEINT Register Field Descriptions ............................................................
PWMSS_ECAP_ECFLG Instances .................................................................................
PWMSS_ECAP_ECFLG Register Field Descriptions .............................................................
PWMSS_ECAP_ECCLR Instances .................................................................................
PWMSS_ECAP_ECCLR Register Field Descriptions.............................................................
PWMSS_ECAP_ECFRC Instances .................................................................................
PWMSS_ECAP_ECFRC Register Field Descriptions ............................................................
PWMSS_ECAP_PID Instances ......................................................................................
11-744. Register Call Summary for RFBI_DATA_CYCLE1__1
2418
11-745.
2419
11-746.
11-747.
11-748.
11-749.
11-750.
11-751.
11-752.
11-753.
11-754.
11-755.
11-756.
11-757.
11-758.
11-759.
11-760.
11-761.
11-762.
11-763.
11-764.
11-765.
11-766.
11-767.
11-768.
11-769.
11-770.
11-771.
11-772.
11-773.
11-774.
11-775.
11-776.
11-777.
11-778.
11-779.
11-780.
11-781.
11-782.
11-783.
11-784.
11-785.
11-786.
11-787.
11-788.
11-789.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2419
2419
2420
2420
2420
2421
2421
2421
2422
2422
2422
2423
2425
2425
2426
2428
2438
2439
2439
2440
2440
2441
2441
2442
2442
2443
2443
2444
2444
2445
2445
2446
2446
2448
2448
2450
2450
2451
2451
2452
2452
2453
2453
2454
139
www.ti.com
11-790. PWMSS_ECAP_PID Register Field Descriptions ................................................................. 2454
11-791. ePWM Subsystems I/O Signals ...................................................................................... 2458
11-792. ePWM Integration Attributes.......................................................................................... 2463
11-793. ePWM Clocks and Resets ............................................................................................ 2463
11-794. ePWM Hardware Requests........................................................................................... 2463
11-795. Device Limitations for the ePWM Functional Interfaces .......................................................... 2466
11-796. Submodule Configuration Parameters .............................................................................. 2471
11-797. ePWM Time-Base Submodule Registers .......................................................................... 2475
11-798. ePWM Time-Base Submodule Key Signals ........................................................................ 2476
11-799. ePWM Counter-Compare Submodule Registers
.................................................................
2483
11-800. ePWM Counter-Compare Submodule Key Signals ............................................................... 2484
11-801. ePWM Action-Qualifier Submodule Registers
.....................................................................
2489
11-802. ePWM Action-Qualifier Submodule Possible Input Events ....................................................... 2490
2492
11-804.
2492
11-805.
11-806.
11-807.
11-808.
11-809.
11-810.
11-811.
11-812.
11-813.
11-814.
11-815.
11-816.
11-817.
11-818.
11-819.
11-820.
11-821.
11-822.
11-823.
11-824.
11-825.
11-826.
11-827.
11-828.
11-829.
11-830.
11-831.
11-832.
11-833.
11-834.
11-835.
11-836.
11-837.
11-838.
140
...............................................
ePWM Action-Qualifier Event Priority for Up-Count Mode .......................................................
ePWM Action-Qualifier Event Priority for Down-Count Mode ....................................................
Behavior if CMPA/CMPB is Greater than the Period .............................................................
EPWMx Initialization for ..............................................................................................
EPWMx Run Time Changes for .....................................................................................
EPWMx Initialization for ..............................................................................................
EPWMx Run Time Changes for .....................................................................................
EPWMx Initialization for ..............................................................................................
EPWMx Run Time Changes for .....................................................................................
EPWMx Initialization for ..............................................................................................
EPWMx Run Time Changes for .....................................................................................
EPWMx Initialization for ..............................................................................................
EPWMx Run Time Changes for .....................................................................................
EPWMx Initialization for ..............................................................................................
EPWMx Run Time Changes for .....................................................................................
Dead-Band Generator Submodule Registers ......................................................................
Classical Dead-Band Operating Modes ............................................................................
ePWM-Chopper Submodule Registers.............................................................................
ePWM Trip-Zone Submodule Registers ...........................................................................
Possible Actions On an ePWM Trip Event .........................................................................
ePWM Event-Trigger Submodule Registers .......................................................................
Resolution for PWM and HRPWM ...................................................................................
HRPWM Submodule Registers ......................................................................................
Relationship Between MEP Steps, PWM Frequency and Resolution ..........................................
CMPA vs Duty (left), and [CMPA:CMPAHR] vs Duty (right) .....................................................
ePWM / HRPWM Module Control and Status Registers Grouped by Submodule ............................
ePWM Instances .......................................................................................................
ePWM Registers .......................................................................................................
ePWM Registers .......................................................................................................
EPWM_TBCTL Instances .............................................................................................
EPWM_TBCTL Register Field Descriptions ........................................................................
Register Call Summary for EPWM_TBCTL ........................................................................
EPWM_TBSTS Instances ............................................................................................
EPWM_TBSTS Register Field Descriptions ........................................................................
Register Call Summary for EPWM_TBSTS ........................................................................
11-803. ePWM Action-Qualifier Event Priority for Up-Down-Count Mode
List of Tables
2492
2493
2496
2496
2498
2498
2500
2500
2502
2502
2504
2504
2506
2506
2507
2509
2511
2516
2517
2520
2526
2527
2528
2529
2531
2533
2533
2534
2536
2536
2538
2539
2539
2539
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
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11-839. HRPWM_TBPHSHR Instances ...................................................................................... 2540
11-840. HRPWM_TBPHSHR Register Field Descriptions
.................................................................
2540
11-841. Register Call Summary for HRPWM_TBPHSHR .................................................................. 2540
11-842. EPWM_TBPHS Instances ............................................................................................ 2541
11-843. EPWM_TBPHS Register Field Descriptions
.......................................................................
2541
11-844. Register Call Summary for EPWM_TBPHS ........................................................................ 2541
11-845. EPWM_TBCNT Instances ............................................................................................ 2542
11-846. EPWM_TBCNT Register Field Descriptions
.......................................................................
2542
11-847. Register Call Summary for EPWM_TBCNT ........................................................................ 2542
11-848. EPWM_TBPRD Instances ............................................................................................ 2543
11-849. EPWM_TBPRD Register Field Descriptions ....................................................................... 2543
11-850. Register Call Summary for EPWM_TBPRD ........................................................................ 2543
11-851. EPWM_CMPCTL Instances .......................................................................................... 2544
11-852. EPWM_CMPCTL Register Field Descriptions ..................................................................... 2544
11-853. Register Call Summary for EPWM_CMPCTL ...................................................................... 2545
.......................................................................................
HRPWM_CMPAHR Register Field Descriptions...................................................................
Register Call Summary for HRPWM_CMPAHR ...................................................................
EPWM_CMPA Instances .............................................................................................
EPWM_CMPA Register Field Descriptions.........................................................................
Register Call Summary for EPWM_CMPA .........................................................................
EPWM_CMPB Instances .............................................................................................
EPWM_CMPB Register Field Descriptions.........................................................................
Register Call Summary for EPWM_CMPB .........................................................................
EPWM_AQCTLA Instances ..........................................................................................
EPWM_AQCTLA Register Field Descriptions......................................................................
Register Call Summary for EPWM_AQCTLA ......................................................................
EPWM_AQCTLB Instances ..........................................................................................
EPWM_AQCTLB Register Field Descriptions......................................................................
Register Call Summary for EPWM_AQCTLB ......................................................................
EPWM_AQSFRC Instances ..........................................................................................
EPWM_AQSFRC Register Field Descriptions .....................................................................
Register Call Summary for EPWM_AQSFRC ......................................................................
EPWM_AQCSFRC Instances ........................................................................................
EPWM_AQCSFRC Register Field Descriptions ...................................................................
Register Call Summary for EPWM_AQCSFRC ....................................................................
EPWM_DBCTL Instances ............................................................................................
EPWM_DBCTL Register Field Descriptions .......................................................................
Register Call Summary for EPWM_DBCTL ........................................................................
EPWM_DBRED Instances ............................................................................................
EPWM_DBRED Register Field Descriptions .......................................................................
Register Call Summary for EPWM_DBRED .......................................................................
EPWM_DBFED Instances ............................................................................................
EPWM_DBFED Register Field Descriptions .......................................................................
Register Call Summary for EPWM_DBFED ........................................................................
EPWM_TZSEL Instances .............................................................................................
EPWM_TZSEL Register Field Descriptions ........................................................................
Register Call Summary for EPWM_TZSEL ........................................................................
EPWM_TZCTL Instances .............................................................................................
11-854. HRPWM_CMPAHR Instances
2546
11-855.
2546
11-856.
11-857.
11-858.
11-859.
11-860.
11-861.
11-862.
11-863.
11-864.
11-865.
11-866.
11-867.
11-868.
11-869.
11-870.
11-871.
11-872.
11-873.
11-874.
11-875.
11-876.
11-877.
11-878.
11-879.
11-880.
11-881.
11-882.
11-883.
11-884.
11-885.
11-886.
11-887.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2546
2547
2547
2548
2549
2549
2550
2551
2551
2552
2553
2553
2554
2555
2555
2556
2557
2557
2557
2558
2558
2559
2560
2560
2560
2561
2561
2561
2562
2562
2564
2565
141
www.ti.com
11-888. EPWM_TZCTL Register Field Descriptions ........................................................................ 2565
11-889. Register Call Summary for EPWM_TZCTL
........................................................................
2565
11-890. EPWM_TZEINT Instances ............................................................................................ 2566
11-891. EPWM_TZEINT Register Field Descriptions ....................................................................... 2566
11-892. Register Call Summary for EPWM_TZEINT
.......................................................................
2566
11-893. EPWM_TZFLG Instances ............................................................................................. 2567
11-894. EPWM_TZFLG Register Field Descriptions ........................................................................ 2567
11-895. Register Call Summary for EPWM_TZFLG ........................................................................ 2568
2569
11-897.
2569
11-898.
11-899.
11-900.
11-901.
11-902.
11-903.
11-904.
11-905.
11-906.
11-907.
11-908.
11-909.
11-910.
11-911.
11-912.
11-913.
11-914.
11-915.
11-916.
11-917.
11-918.
11-919.
11-920.
11-921.
11-922.
11-923.
11-924.
11-925.
11-926.
11-927.
11-928.
11-929.
11-930.
11-931.
11-932.
11-933.
11-934.
11-935.
11-936.
142
............................................................................................
EPWM_TZCLR Register Field Descriptions ........................................................................
Register Call Summary for EPWM_TZCLR ........................................................................
EPWM_TZFRC Instances ............................................................................................
EPWM_TZFRC Register Field Descriptions .......................................................................
Register Call Summary for EPWM_TZFRC ........................................................................
EPWM_ETSEL Instances .............................................................................................
EPWM_ETSEL Register Field Descriptions ........................................................................
Register Call Summary for EPWM_ETSEL ........................................................................
EPWM_ETPS Instances ..............................................................................................
EPWM_ETPS Register Field Descriptions .........................................................................
Register Call Summary for EPWM_ETPS ..........................................................................
EPWM_ETFLG Instances ............................................................................................
EPWM_ETFLG Register Field Descriptions ........................................................................
Register Call Summary for EPWM_ETFLG ........................................................................
EPWM_ETCLR Instances ............................................................................................
EPWM_ETCLR Register Field Descriptions .......................................................................
Register Call Summary for EPWM_ETCLR ........................................................................
EPWM_ETFRC Instances ............................................................................................
EPWM_ETFRC Register Field Descriptions .......................................................................
Register Call Summary for EPWM_ETFRC ........................................................................
EPWM_PCCTL Instances ............................................................................................
EPWM_PCCTL Register Field Descriptions .......................................................................
Register Call Summary for EPWM_PCCTL ........................................................................
HRPWM_HRCTL Instances ..........................................................................................
HRPWM_HRCTL Register Field Descriptions .....................................................................
Register Call Summary for HRPWM_HRCTL ......................................................................
eQEP Subsystems I/O Signals .......................................................................................
eQEP Integration Attributes ..........................................................................................
eQEP Clocks and Resets .............................................................................................
eQEP Hardware Requests ...........................................................................................
Device Limitations for the eQEP Functional Interfaces ...........................................................
Quadrature Decoder Truth Table ...................................................................................
eQEP Control and Status Functional Registers ...................................................................
eQEP Instances ........................................................................................................
eQEP Registers ........................................................................................................
EQEP_QPOSCNT Instances .........................................................................................
EQEP_QPOSCNT Register Field Descriptions ....................................................................
Register Call Summary for EQEP_QPOSCNT ....................................................................
EQEP_QPOSINIT Instances .........................................................................................
EQEP_QPOSINIT Register Field Descriptions ....................................................................
11-896. EPWM_TZCLR Instances
List of Tables
2569
2570
2570
2570
2571
2571
2572
2573
2573
2574
2575
2575
2575
2577
2577
2577
2578
2578
2579
2580
2580
2581
2582
2582
2583
2587
2589
2589
2590
2590
2594
2609
2610
2610
2612
2612
2612
2613
2613
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
11-937. Register Call Summary for EQEP_QPOSINIT ..................................................................... 2613
11-938. EQEP_QPOSMAX Instances
........................................................................................
2614
11-939. EQEP_QPOSMAX Register Field Descriptions.................................................................... 2614
11-940. Register Call Summary for EQEP_QPOSMAX .................................................................... 2614
11-941. EQEP_QPOSCMP Instances ........................................................................................ 2615
...................................................................
Register Call Summary for EQEP_QPOSCMP ....................................................................
EQEP_QPOSILAT Instances.........................................................................................
EQEP_QPOSILAT Register Field Descriptions ....................................................................
Register Call Summary for EQEP_QPOSILAT ....................................................................
EQEP_QPOSSLAT Instances .......................................................................................
EQEP_QPOSSLAT Register Field Descriptions ...................................................................
Register Call Summary for EQEP_QPOSSLAT ...................................................................
EQEP_QPOSLAT Instances .........................................................................................
EQEP_QPOSLAT Register Field Descriptions ....................................................................
Register Call Summary for EQEP_QPOSLAT .....................................................................
EQEP_QUTMR Instances ............................................................................................
EQEP_QUTMR Register Field Descriptions .......................................................................
Register Call Summary for EQEP_QUTMR ........................................................................
EQEP_QUPRD Instances ............................................................................................
EQEP_QUPRD Register Field Descriptions .......................................................................
Register Call Summary for EQEP_QUPRD ........................................................................
EQEP_QWDTMR Instances ..........................................................................................
EQEP_QWDTMR Register Field Descriptions .....................................................................
Register Call Summary for EQEP_QWDTMR .....................................................................
EQEP_QWDPRD Instances ..........................................................................................
EQEP_QWDPRD Register Field Descriptions .....................................................................
Register Call Summary for EQEP_QWDPRD .....................................................................
EQEP_QDECCTL Instances .........................................................................................
EQEP_QDECCTL Register Field Descriptions ....................................................................
Register Call Summary for EQEP_QDECCTL .....................................................................
EQEP_QEPCTL Instances ...........................................................................................
EQEP_QEPCTL Register Field Descriptions ......................................................................
Register Call Summary for EQEP_QEPCTL .......................................................................
EQEP_QCAPCTL Instances .........................................................................................
EQEP_QCAPCTL Register Field Descriptions ....................................................................
Register Call Summary for EQEP_QCAPCTL .....................................................................
EQEP_QPOSCTL Instances .........................................................................................
EQEP_QPOSCTL Register Field Descriptions ....................................................................
Register Call Summary for EQEP_QPOSCTL .....................................................................
EQEP_QEINT Instances ..............................................................................................
EQEP_QEINT Register Field Descriptions .........................................................................
Register Call Summary for EQEP_QEINT..........................................................................
EQEP_QFLG Instances ...............................................................................................
EQEP_QFLG Register Field Descriptions ..........................................................................
Register Call Summary for EQEP_QFLG ..........................................................................
EQEP_QCLR Instances...............................................................................................
EQEP_QCLR Register Field Descriptions ..........................................................................
Register Call Summary for EQEP_QCLR ..........................................................................
11-942. EQEP_QPOSCMP Register Field Descriptions
2615
11-943.
2615
11-944.
11-945.
11-946.
11-947.
11-948.
11-949.
11-950.
11-951.
11-952.
11-953.
11-954.
11-955.
11-956.
11-957.
11-958.
11-959.
11-960.
11-961.
11-962.
11-963.
11-964.
11-965.
11-966.
11-967.
11-968.
11-969.
11-970.
11-971.
11-972.
11-973.
11-974.
11-975.
11-976.
11-977.
11-978.
11-979.
11-980.
11-981.
11-982.
11-983.
11-984.
11-985.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2616
2616
2616
2617
2617
2617
2618
2618
2618
2619
2619
2619
2620
2620
2620
2621
2621
2621
2622
2622
2622
2623
2623
2624
2625
2625
2626
2627
2627
2628
2629
2629
2629
2630
2630
2631
2632
2632
2633
2634
2634
2635
143
www.ti.com
..............................................................................................
11-987. EQEP_QFRC Register Field Descriptions..........................................................................
11-988. Register Call Summary for EQEP_QFRC ..........................................................................
11-989. EQEP_QEPSTS Instances ...........................................................................................
11-990. EQEP_QEPSTS Register Field Descriptions ......................................................................
11-991. Register Call Summary for EQEP_QEPSTS .......................................................................
11-992. EQEP_QCTMR Instances ............................................................................................
11-993. EQEP_QCTMR Register Field Descriptions .......................................................................
11-994. Register Call Summary for EQEP_QCTMR ........................................................................
11-995. EQEP_QCPRD Instances ............................................................................................
11-996. EQEP_QCPRD Register Field Descriptions .......................................................................
11-997. Register Call Summary for EQEP_QCPRD ........................................................................
11-998. EQEP_QCTMRLAT Instances .......................................................................................
11-999. EQEP_QCTMRLAT Register Field Descriptions ..................................................................
11-1000. Register Call Summary for EQEP_QCTMRLAT .................................................................
11-1001. EQEP_QCPRDLAT Instances ......................................................................................
11-1002. EQEP_QCPRDLAT Register Field Descriptions .................................................................
11-1003. Register Call Summary for EQEP_QCPRDLAT..................................................................
11-1004. EQEP_REVID Instances ............................................................................................
11-1005. EQEP_REVID Register Field Descriptions .......................................................................
11-1006. Register Call Summary for EQEP_REVID ........................................................................
11-1007. GPIO Description .....................................................................................................
11-1008. GPIO Integration Attributes .........................................................................................
11-1009. GPIO Clocks and Resets ............................................................................................
11-1010. GPIO Hardware Requests ..........................................................................................
11-1011. GPIO Interrupt and EDMA Event Configuration Options ........................................................
11-1012. GPIOMUX Input Event Mapping ...................................................................................
11-1013. Global Initialization of Surrounding Modules ......................................................................
11-1014. GPIO Global Initialization ............................................................................................
11-1015. GPIO Read Input Register ..........................................................................................
11-1016. GPIO Set Bit Function ...............................................................................................
11-1017. GPIO Clear Bit Function .............................................................................................
11-1018. GPIO Instances .......................................................................................................
11-1019. GPIO Registers .......................................................................................................
11-1020. GPIO_PID Instances .................................................................................................
11-1021. GPIO_PID Register Field Descriptions ............................................................................
11-1022. Register Call Summary for GPIO_PID.............................................................................
11-1023. GPIO_BINTEN Instances ...........................................................................................
11-1024. GPIO_BINTEN Register Field Descriptions.......................................................................
11-1025. Register Call Summary for GPIO_BINTEN .......................................................................
11-1026. GPIO_DIR01 Instances ..............................................................................................
11-1027. GPIO_DIR01 Register Field Descriptions .........................................................................
11-1028. Register Call Summary for GPIO_DIR01 .........................................................................
11-1029. GPIO_OUT_DATA01 Instances ....................................................................................
11-1030. GPIO_OUT_DATA01 Register Field Descriptions ...............................................................
11-1031. Register Call Summary for GPIO_OUT_DATA01 ................................................................
11-1032. GPIO_SET_DATA01 Instances ....................................................................................
11-1033. GPIO_SET_DATA01 Register Field Descriptions................................................................
11-1034. Register Call Summary for GPIO_SET_DATA01 ................................................................
11-986. EQEP_QFRC Instances
144
List of Tables
2636
2636
2637
2638
2638
2639
2640
2640
2640
2641
2641
2641
2642
2642
2642
2643
2643
2643
2644
2644
2644
2647
2649
2649
2650
2652
2653
2660
2660
2660
2661
2661
2662
2662
2664
2664
2664
2665
2665
2665
2666
2666
2666
2667
2667
2667
2668
2668
2668
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
11-1035. GPIO_CLR_DATA01 Instances .................................................................................... 2669
11-1036. GPIO_CLR_DATA01 Register Field Descriptions
...............................................................
2669
11-1037. Register Call Summary for GPIO_CLR_DATA01 ................................................................ 2669
11-1038. GPIO_IN_DATA01 Instances ....................................................................................... 2670
11-1039. GPIO_IN_DATA01 Register Field Descriptions .................................................................. 2670
11-1040. Register Call Summary for GPIO_IN_DATA01 ................................................................... 2670
11-1041. GPIO_SET_RIS_TRIG01 Instances ............................................................................... 2671
11-1042. GPIO_SET_RIS_TRIG01 Register Field Descriptions .......................................................... 2671
11-1043. Register Call Summary for GPIO_SET_RIS_TRIG01 ........................................................... 2671
11-1044. GPIO_CLR_RIS_TRIG01 Instances ............................................................................... 2672
11-1045. GPIO_CLR_RIS_TRIG01 Register Field Descriptions .......................................................... 2672
11-1046. Register Call Summary for GPIO_CLR_RIS_TRIG01 ........................................................... 2672
11-1047. GPIO_SET_FAL_TRIG01 Instances ............................................................................... 2673
11-1048. GPIO_SET_FAL_TRIG01 Register Field Descriptions .......................................................... 2673
..........................................................
..............................................................................
GPIO_CLR_FAL_TRIG01 Register Field Descriptions ..........................................................
Register Call Summary for GPIO_CLR_FAL_TRIG01 ..........................................................
GPIO_INTSTAT01 Instances .......................................................................................
GPIO_INTSTAT01 Register Field Descriptions ..................................................................
Register Call Summary for GPIO_INTSTAT01 ...................................................................
GPIO_DIR23 Instances ..............................................................................................
GPIO_DIR23 Register Field Descriptions .........................................................................
Register Call Summary for GPIO_DIR23 .........................................................................
GPIO_OUT_DATA23 Instances ....................................................................................
GPIO_OUT_DATA23 Register Field Descriptions ...............................................................
Register Call Summary for GPIO_OUT_DATA23 ................................................................
GPIO_SET_DATA23 Instances ....................................................................................
GPIO_SET_DATA23 Register Field Descriptions................................................................
Register Call Summary for GPIO_SET_DATA23 ................................................................
GPIO_CLR_DATA23 Instances ....................................................................................
GPIO_CLR_DATA23 Register Field Descriptions ...............................................................
Register Call Summary for GPIO_CLR_DATA23 ................................................................
GPIO_IN_DATA23 Instances .......................................................................................
GPIO_IN_DATA23 Register Field Descriptions ..................................................................
Register Call Summary for GPIO_IN_DATA23 ...................................................................
GPIO_SET_RIS_TRIG23 Instances ...............................................................................
GPIO_SET_RIS_TRIG23 Register Field Descriptions ..........................................................
Register Call Summary for GPIO_SET_RIS_TRIG23 ...........................................................
GPIO_CLR_RIS_TRIG23 Instances ...............................................................................
GPIO_CLR_RIS_TRIG23 Register Field Descriptions ..........................................................
Register Call Summary for GPIO_CLR_RIS_TRIG23 ...........................................................
GPIO_SET_FAL_TRIG23 Instances ...............................................................................
GPIO_SET_FAL_TRIG23 Register Field Descriptions ..........................................................
Register Call Summary for GPIO_SET_FAL_TRIG23 ..........................................................
GPIO_CLR_FAL_TRIG23 Instances ..............................................................................
GPIO_CLR_FAL_TRIG23 Register Field Descriptions ..........................................................
Register Call Summary for GPIO_CLR_FAL_TRIG23 ..........................................................
GPIO_INTSTAT23 Instances .......................................................................................
11-1049. Register Call Summary for GPIO_SET_FAL_TRIG01
2673
11-1050. GPIO_CLR_FAL_TRIG01 Instances
2674
11-1051.
11-1052.
11-1053.
11-1054.
11-1055.
11-1056.
11-1057.
11-1058.
11-1059.
11-1060.
11-1061.
11-1062.
11-1063.
11-1064.
11-1065.
11-1066.
11-1067.
11-1068.
11-1069.
11-1070.
11-1071.
11-1072.
11-1073.
11-1074.
11-1075.
11-1076.
11-1077.
11-1078.
11-1079.
11-1080.
11-1081.
11-1082.
11-1083.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2674
2674
2675
2675
2675
2676
2676
2676
2677
2677
2677
2678
2678
2678
2679
2679
2679
2680
2680
2680
2681
2681
2681
2682
2682
2682
2683
2683
2683
2684
2684
2684
2685
145
www.ti.com
11-1084. GPIO_INTSTAT23 Register Field Descriptions .................................................................. 2685
11-1085. Register Call Summary for GPIO_INTSTAT23 ................................................................... 2685
11-1086. GPIO_DIR45 Instances .............................................................................................. 2686
11-1087. GPIO_DIR45 Register Field Descriptions ......................................................................... 2686
11-1088. Register Call Summary for GPIO_DIR45
.........................................................................
2686
11-1089. GPIO_OUT_DATA45 Instances .................................................................................... 2687
11-1090. GPIO_OUT_DATA45 Register Field Descriptions ............................................................... 2687
11-1091. Register Call Summary for GPIO_OUT_DATA45 ................................................................ 2687
2688
11-1093.
2688
11-1094.
11-1095.
11-1096.
11-1097.
11-1098.
11-1099.
11-1100.
11-1101.
11-1102.
11-1103.
11-1104.
11-1105.
11-1106.
11-1107.
11-1108.
11-1109.
11-1110.
11-1111.
11-1112.
11-1113.
11-1114.
11-1115.
11-1116.
11-1117.
11-1118.
11-1119.
11-1120.
11-1121.
11-1122.
11-1123.
11-1124.
11-1125.
11-1126.
11-1127.
11-1128.
11-1129.
11-1130.
11-1131.
11-1132.
146
....................................................................................
GPIO_SET_DATA45 Register Field Descriptions................................................................
Register Call Summary for GPIO_SET_DATA45 ................................................................
GPIO_CLR_DATA45 Instances ....................................................................................
GPIO_CLR_DATA45 Register Field Descriptions ...............................................................
Register Call Summary for GPIO_CLR_DATA45 ................................................................
GPIO_IN_DATA45 Instances .......................................................................................
GPIO_IN_DATA45 Register Field Descriptions ..................................................................
Register Call Summary for GPIO_IN_DATA45 ...................................................................
GPIO_SET_RIS_TRIG45 Instances ...............................................................................
GPIO_SET_RIS_TRIG45 Register Field Descriptions ..........................................................
Register Call Summary for GPIO_SET_RIS_TRIG45 ...........................................................
GPIO_CLR_RIS_TRIG45 Instances ...............................................................................
GPIO_CLR_RIS_TRIG45 Register Field Descriptions ..........................................................
Register Call Summary for GPIO_CLR_RIS_TRIG45 ...........................................................
GPIO_SET_FAL_TRIG45 Instances ...............................................................................
GPIO_SET_FAL_TRIG45 Register Field Descriptions ..........................................................
Register Call Summary for GPIO_SET_FAL_TRIG45 ..........................................................
GPIO_CLR_FAL_TRIG45 Instances ..............................................................................
GPIO_CLR_FAL_TRIG45 Register Field Descriptions ..........................................................
Register Call Summary for GPIO_CLR_FAL_TRIG45 ..........................................................
GPIO_INTSTAT45 Instances .......................................................................................
GPIO_INTSTAT45 Register Field Descriptions ..................................................................
Register Call Summary for GPIO_INTSTAT45 ...................................................................
GPIO_DIR67 Instances ..............................................................................................
GPIO_DIR67 Register Field Descriptions .........................................................................
Register Call Summary for GPIO_DIR67 .........................................................................
GPIO_OUT_DATA67 Instances ....................................................................................
GPIO_OUT_DATA67 Register Field Descriptions ...............................................................
Register Call Summary for GPIO_OUT_DATA67 ................................................................
GPIO_SET_DATA67 Instances ....................................................................................
GPIO_SET_DATA67 Register Field Descriptions................................................................
Register Call Summary for GPIO_SET_DATA67 ................................................................
GPIO_CLR_DATA67 Instances ....................................................................................
GPIO_CLR_DATA67 Register Field Descriptions ...............................................................
Register Call Summary for GPIO_CLR_DATA67 ................................................................
GPIO_IN_DATA67 Instances .......................................................................................
GPIO_IN_DATA67 Register Field Descriptions ..................................................................
Register Call Summary for GPIO_IN_DATA67 ...................................................................
GPIO_SET_RIS_TRIG67 Instances ...............................................................................
GPIO_SET_RIS_TRIG67 Register Field Descriptions ..........................................................
11-1092. GPIO_SET_DATA45 Instances
List of Tables
2688
2689
2689
2689
2690
2690
2690
2691
2691
2691
2692
2692
2692
2693
2693
2693
2694
2694
2694
2695
2695
2695
2696
2696
2696
2697
2697
2697
2698
2698
2698
2699
2699
2699
2700
2700
2700
2701
2701
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
11-1133. Register Call Summary for GPIO_SET_RIS_TRIG67 ........................................................... 2701
11-1134. GPIO_CLR_RIS_TRIG67 Instances ............................................................................... 2702
11-1135. GPIO_CLR_RIS_TRIG67 Register Field Descriptions .......................................................... 2702
11-1136. Register Call Summary for GPIO_CLR_RIS_TRIG67 ........................................................... 2702
11-1137. GPIO_SET_FAL_TRIG67 Instances ............................................................................... 2703
11-1138. GPIO_SET_FAL_TRIG67 Register Field Descriptions .......................................................... 2703
..........................................................
..............................................................................
GPIO_CLR_FAL_TRIG67 Register Field Descriptions ..........................................................
Register Call Summary for GPIO_CLR_FAL_TRIG67 ..........................................................
GPIO_INTSTAT67 Instances .......................................................................................
GPIO_INTSTAT67 Register Field Descriptions ..................................................................
Register Call Summary for GPIO_INTSTAT67 ...................................................................
GPIO_DIR8 Instances ...............................................................................................
GPIO_DIR8 Register Field Descriptions ..........................................................................
Register Call Summary for GPIO_DIR8 ...........................................................................
GPIO_OUT_DATA8 Instances .....................................................................................
GPIO_OUT_DATA8 Register Field Descriptions.................................................................
Register Call Summary for GPIO_OUT_DATA8 .................................................................
GPIO_SET_DATA8 Instances ......................................................................................
GPIO_SET_DATA8 Register Field Descriptions .................................................................
Register Call Summary for GPIO_SET_DATA8..................................................................
GPIO_CLR_DATA8 Instances ......................................................................................
GPIO_CLR_DATA8 Register Field Descriptions .................................................................
Register Call Summary for GPIO_CLR_DATA8 .................................................................
GPIO_IN_DATA8 Instances ........................................................................................
GPIO_IN_DATA8 Register Field Descriptions....................................................................
Register Call Summary for GPIO_IN_DATA8 ....................................................................
GPIO_SET_RIS_TRIG8 Instances .................................................................................
GPIO_SET_RIS_TRIG8 Register Field Descriptions ............................................................
Register Call Summary for GPIO_SET_RIS_TRIG8 ............................................................
GPIO_CLR_RIS_TRIG8 Instances ................................................................................
GPIO_CLR_RIS_TRIG8 Register Field Descriptions ............................................................
Register Call Summary for GPIO_CLR_RIS_TRIG8 ............................................................
GPIO_SET_FAL_TRIG8 Instances ................................................................................
GPIO_SET_FAL_TRIG8 Register Field Descriptions ...........................................................
Register Call Summary for GPIO_SET_FAL_TRIG8 ............................................................
GPIO_CLR_FAL_TRIG8 Instances ................................................................................
GPIO_CLR_FAL_TRIG8 Register Field Descriptions ...........................................................
Register Call Summary for GPIO_CLR_FAL_TRIG8 ............................................................
GPIO_INTSTAT8 Instances.........................................................................................
GPIO_INTSTAT8 Register Field Descriptions ....................................................................
Register Call Summary for GPIO_INTSTAT8 ....................................................................
I2C Input/Output Signals ............................................................................................
I2C Integration Attributes ............................................................................................
I2C Clocks and Resets ..............................................................................................
I2C Hardware Requests .............................................................................................
Descriptions of the I2C Interrupt Events ..........................................................................
Operating Modes of the I2C Module ...............................................................................
11-1139. Register Call Summary for GPIO_SET_FAL_TRIG67
2703
11-1140. GPIO_CLR_FAL_TRIG67 Instances
2704
11-1141.
2704
11-1142.
11-1143.
11-1144.
11-1145.
11-1146.
11-1147.
11-1148.
11-1149.
11-1150.
11-1151.
11-1152.
11-1153.
11-1154.
11-1155.
11-1156.
11-1157.
11-1158.
11-1159.
11-1160.
11-1161.
11-1162.
11-1163.
11-1164.
11-1165.
11-1166.
11-1167.
11-1168.
11-1169.
11-1170.
11-1171.
11-1172.
11-1173.
11-1174.
11-1175.
11-1176.
11-1177.
11-1178.
11-1179.
11-1180.
11-1181.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2704
2705
2705
2705
2706
2706
2706
2707
2707
2707
2708
2708
2708
2709
2709
2709
2710
2710
2710
2711
2711
2711
2712
2712
2712
2713
2713
2713
2714
2714
2714
2715
2715
2715
2718
2721
2721
2721
2725
2728
147
www.ti.com
11-1182. Generating a NACK Bit .............................................................................................. 2728
11-1183. I2C Instances .......................................................................................................... 2732
11-1184. I2C Registers .......................................................................................................... 2732
11-1185. I2C_ICOAR Instances ............................................................................................... 2733
11-1186. I2C_ICOAR Register Field Descriptions
..........................................................................
2733
11-1187. Register Call Summary for I2C_ICOAR ........................................................................... 2733
11-1188. I2C_ICIMR Instances ................................................................................................ 2734
11-1189. I2C_ICIMR Register Field Descriptions
...........................................................................
2734
11-1190. Register Call Summary for I2C_ICIMR ............................................................................ 2735
11-1191. I2C_ICSTR Instances ................................................................................................ 2736
11-1192. I2C_ICSTR Register Field Descriptions ........................................................................... 2736
2739
11-1194. I2C_ICCLKL Instances
2741
11-1195.
2741
11-1196.
11-1197.
11-1198.
11-1199.
11-1200.
11-1201.
11-1202.
11-1203.
11-1204.
11-1205.
11-1206.
11-1207.
11-1208.
11-1209.
11-1210.
11-1211.
11-1212.
11-1213.
11-1214.
11-1215.
11-1216.
11-1217.
11-1218.
11-1219.
11-1220.
11-1221.
11-1222.
11-1223.
11-1224.
11-1225.
11-1226.
11-1227.
11-1228.
11-1229.
11-1230.
148
...........................................................................
..............................................................................................
I2C_ICCLKL Register Field Descriptions..........................................................................
Register Call Summary for I2C_ICCLKL ..........................................................................
I2C_ICCLKH Instances ..............................................................................................
I2C_ICCLKH Register Field Descriptions .........................................................................
Register Call Summary for I2C_ICCLKH ..........................................................................
I2C_ICCNT Instances ................................................................................................
I2C_ICCNT Register Field Descriptions ...........................................................................
Register Call Summary for I2C_ICCNT ...........................................................................
I2C_ICDRR Instances ...............................................................................................
I2C_ICDRR Register Field Descriptions ..........................................................................
Register Call Summary for I2C_ICDRR ...........................................................................
I2C_ICSAR Instances................................................................................................
I2C_ICSAR Register Field Descriptions ...........................................................................
Register Call Summary for I2C_ICSAR ...........................................................................
I2C_ICDXR Instances ...............................................................................................
I2C_ICDXR Register Field Descriptions ...........................................................................
Register Call Summary for I2C_ICDXR ...........................................................................
I2C_ICMDR Instances ...............................................................................................
I2C_ICMDR Register Field Descriptions ..........................................................................
Master-Transmitter/Receiver Bus Activity Defined by RM, STT, and STP Bits ..............................
How the MST and FDF Bits Affect the Role of TRX Bit .........................................................
Register Call Summary for I2C_ICMDR ...........................................................................
I2C_ICIVR Instances .................................................................................................
I2C_ICIVR Register Field Descriptions ............................................................................
Register Call Summary for I2C_ICIVR ............................................................................
I2C_ICEMDR Instances .............................................................................................
I2C_ICEMDR Register Field Descriptions ........................................................................
Register Call Summary for I2C_ICEMDR .........................................................................
I2C_ICPSC Instances................................................................................................
I2C_ICPSC Register Field Descriptions ...........................................................................
Register Call Summary for I2C_ICPSC ...........................................................................
I2C_ICPID1 Instances ...............................................................................................
I2C_ICPID1 Register Field Descriptions ..........................................................................
Register Call Summary for I2C_ICPID1 ...........................................................................
I2C_ICPID2 Instances ...............................................................................................
I2C_ICPID2 Register Field Descriptions ..........................................................................
11-1193. Register Call Summary for I2C_ICSTR
List of Tables
2741
2742
2742
2742
2743
2743
2743
2744
2744
2744
2745
2745
2745
2746
2746
2746
2747
2747
2750
2750
2751
2752
2752
2752
2753
2753
2753
2754
2754
2754
2755
2755
2755
2756
2756
SPRUHY8I – January 2016 – Revised March 2019
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11-1231. Register Call Summary for I2C_ICPID2 ........................................................................... 2756
11-1232. McASP I/O Signals ................................................................................................... 2765
11-1233. McASP Biphase-Mark Encoder..................................................................................... 2773
11-1234. McASP Preamble Codes ............................................................................................ 2774
11-1235. McASP Integration Attributes ....................................................................................... 2776
.........................................................................................
McASP Hardware Requests ........................................................................................
McASP TFU TDM Mode Settings ..................................................................................
McASP TFU DIT-Mode Example Settings ........................................................................
McASP RFU Settings ................................................................................................
Local Power-Management Features ...............................................................................
McASP Channel Status and User Data for Each DIT Block ....................................................
McASP TX Events....................................................................................................
McASP RX Events ...................................................................................................
McASP Instances.....................................................................................................
McASP Configuration Space Registers ...........................................................................
McASP FIFO Configuration Space Registers ....................................................................
McASP DMA Space Registers .....................................................................................
MCASP_REV Instances .............................................................................................
MCASP_REV Register Field Descriptions ........................................................................
Register Call Summary for MCASP_REV .........................................................................
MCASP_PWRIDLESYSCONFIG Instances ......................................................................
MCASP_PWRIDLESYSCONFIG Register Field Descriptions .................................................
Register Call Summary for MCASP_PWRIDLESYSCONFIG ..................................................
MCASP_PFUNC Instances .........................................................................................
MCASP_PFUNC Register Field Descriptions ....................................................................
Register Call Summary for MCASP_PFUNC .....................................................................
MCASP_PDIR Instances ............................................................................................
MCASP_PDIR Register Field Descriptions .......................................................................
Register Call Summary for MCASP_PDIR ........................................................................
MCASP_PDOUT Instances .........................................................................................
MCASP_PDOUT Register Field Descriptions ....................................................................
Register Call Summary for MCASP_PDOUT .....................................................................
MCASP_PDIN Instances ............................................................................................
MCASP_PDIN Register Field Descriptions .......................................................................
Register Call Summary for MCASP_PDIN ........................................................................
MCASP_PDSET Instances .........................................................................................
MCASP_PDSET Register Field Descriptions .....................................................................
Register Call Summary for MCASP_PDSET .....................................................................
MCASP_PDCLR Instances .........................................................................................
MCASP_PDCLR Register Field Descriptions ....................................................................
Register Call Summary for MCASP_PDCLR .....................................................................
MCASP_GBLCTL Instances ........................................................................................
MCASP_GBLCTL Register Field Descriptions ...................................................................
Register Call Summary for MCASP_GBLCTL ....................................................................
MCASP_AMUTE Instances .........................................................................................
MCASP_AMUTE Register Field Descriptions ....................................................................
Register Call Summary for MCASP_AMUTE .....................................................................
MCASP_DLBCTL Instances ........................................................................................
11-1236. McASP Clocks and Resets
2777
11-1237.
2777
11-1238.
11-1239.
11-1240.
11-1241.
11-1242.
11-1243.
11-1244.
11-1245.
11-1246.
11-1247.
11-1248.
11-1249.
11-1250.
11-1251.
11-1252.
11-1253.
11-1254.
11-1255.
11-1256.
11-1257.
11-1258.
11-1259.
11-1260.
11-1261.
11-1262.
11-1263.
11-1264.
11-1265.
11-1266.
11-1267.
11-1268.
11-1269.
11-1270.
11-1271.
11-1272.
11-1273.
11-1274.
11-1275.
11-1276.
11-1277.
11-1278.
11-1279.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2788
2789
2791
2792
2798
2806
2807
2815
2816
2820
2820
2822
2822
2822
2823
2823
2823
2824
2824
2825
2826
2826
2827
2828
2828
2829
2830
2830
2831
2832
2832
2833
2834
2834
2835
2836
2836
2837
2839
2839
2841
2842
149
www.ti.com
11-1280. MCASP_DLBCTL Register Field Descriptions ................................................................... 2842
11-1281. Register Call Summary for MCASP_DLBCTL .................................................................... 2843
11-1282. MCASP_DITCTL Instances ......................................................................................... 2844
11-1283. MCASP_DITCTL Register Field Descriptions .................................................................... 2844
11-1284. Register Call Summary for MCASP_DITCTL ..................................................................... 2844
11-1285. MCASP_RGBLCTL Instances ...................................................................................... 2846
11-1286. MCASP_RGBLCTL Register Field Descriptions ................................................................. 2846
11-1287. Register Call Summary for MCASP_RGBLCTL .................................................................. 2847
11-1288. MCASP_RMASK Instances ......................................................................................... 2848
11-1289. MCASP_RMASK Register Field Descriptions .................................................................... 2848
11-1290. Register Call Summary for MCASP_RMASK..................................................................... 2848
11-1291. MCASP_RFMT Instances ........................................................................................... 2849
11-1292. MCASP_RFMT Register Field Descriptions ...................................................................... 2849
11-1293. Register Call Summary for MCASP_RFMT ....................................................................... 2850
11-1294. MCASP_AFSRCTL Instances ...................................................................................... 2851
2851
11-1296.
2852
11-1297.
11-1298.
11-1299.
11-1300.
11-1301.
11-1302.
11-1303.
11-1304.
11-1305.
11-1306.
11-1307.
11-1308.
11-1309.
11-1310.
11-1311.
11-1312.
11-1313.
11-1314.
11-1315.
11-1316.
11-1317.
11-1318.
11-1319.
11-1320.
11-1321.
11-1322.
11-1323.
11-1324.
11-1325.
11-1326.
11-1327.
11-1328.
150
.................................................................
Register Call Summary for MCASP_AFSRCTL ..................................................................
MCASP_ACLKRCTL Instances ....................................................................................
MCASP_ACLKRCTL Register Field Descriptions................................................................
Register Call Summary for MCASP_ACLKRCTL ................................................................
MCASP_AHCLKRCTL Instances ..................................................................................
MCASP_AHCLKRCTL Register Field Descriptions ..............................................................
Register Call Summary for MCASP_AHCLKRCTL ..............................................................
MCASP_RTDM Instances ...........................................................................................
MCASP_RTDM Register Field Descriptions ......................................................................
Register Call Summary for MCASP_RTDM ......................................................................
MCASP_RINTCTL Instances .......................................................................................
MCASP_RINTCTL Register Field Descriptions ..................................................................
Register Call Summary for MCASP_RINTCTL ...................................................................
MCASP_RSTAT Instances ..........................................................................................
MCASP_RSTAT Register Field Descriptions .....................................................................
Register Call Summary for MCASP_RSTAT .....................................................................
MCASP_RSLOT Instances .........................................................................................
MCASP_RSLOT Register Field Descriptions .....................................................................
Register Call Summary for MCASP_RSLOT .....................................................................
MCASP_RCLKCHK Instances......................................................................................
MCASP_RCLKCHK Register Field Descriptions .................................................................
Register Call Summary for MCASP_RCLKCHK .................................................................
MCASP_REVTCTL Instances ......................................................................................
MCASP_REVTCTL Register Field Descriptions .................................................................
Register Call Summary for MCASP_REVTCTL ..................................................................
MCASP_XGBLCTL Instances ......................................................................................
MCASP_XGBLCTL Register Field Descriptions .................................................................
Register Call Summary for MCASP_XGBLCTL ..................................................................
MCASP_XMASK Instances .........................................................................................
MCASP_XMASK Register Field Descriptions ....................................................................
Register Call Summary for MCASP_XMASK .....................................................................
MCASP_XFMT Instances ...........................................................................................
MCASP_XFMT Register Field Descriptions ......................................................................
11-1295. MCASP_AFSRCTL Register Field Descriptions
List of Tables
2853
2853
2854
2855
2855
2856
2857
2857
2857
2858
2858
2859
2860
2860
2861
2863
2863
2863
2864
2864
2865
2866
2866
2866
2867
2867
2868
2869
2869
2869
2870
2870
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
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11-1329. Register Call Summary for MCASP_XFMT ....................................................................... 2871
11-1330. MCASP_AFSXCTL Instances ...................................................................................... 2873
11-1331. MCASP_AFSXCTL Register Field Descriptions
.................................................................
2873
11-1332. Register Call Summary for MCASP_AFSXCTL .................................................................. 2874
11-1333. MCASP_ACLKXCTL Instances
....................................................................................
2875
11-1334. MCASP_ACLKXCTL Register Field Descriptions ................................................................ 2875
11-1335. Register Call Summary for MCASP_ACLKXCTL ................................................................ 2876
11-1336. MCASP_AHCLKXCTL Instances................................................................................... 2877
11-1337. MCASP_AHCLKXCTL Register Field Descriptions .............................................................. 2877
11-1338. Register Call Summary for MCASP_AHCLKXCTL .............................................................. 2878
11-1339. MCASP_XTDM Instances ........................................................................................... 2879
11-1340. MCASP_XTDM Register Field Descriptions ...................................................................... 2879
11-1341. Register Call Summary for MCASP_XTDM....................................................................... 2879
11-1342. MCASP_XINTCTL Instances ....................................................................................... 2880
11-1343. MCASP_XINTCTL Register Field Descriptions
..................................................................
2880
11-1344. Register Call Summary for MCASP_XINTCTL ................................................................... 2881
11-1345. MCASP_XSTAT Instances .......................................................................................... 2882
11-1346. MCASP_XSTAT Register Field Descriptions ..................................................................... 2882
.....................................................................
MCASP_XSLOT Instances ..........................................................................................
MCASP_XSLOT Register Field Descriptions .....................................................................
Register Call Summary for MCASP_XSLOT .....................................................................
MCASP_XCLKCHK Instances ......................................................................................
MCASP_XCLKCHK Register Field Descriptions .................................................................
Register Call Summary for MCASP_XCLKCHK .................................................................
MCASP_XEVTCTL Instances ......................................................................................
MCASP_XEVTCTL Register Field Descriptions .................................................................
Register Call Summary for MCASP_XEVTCTL ..................................................................
MCASP_DITCSRA0 Instances .....................................................................................
MCASP_DITCSRA0 Register Field Descriptions ................................................................
Register Call Summary for MCASP_DITCSRA0 .................................................................
MCASP_DITCSRA1 Instances .....................................................................................
MCASP_DITCSRA1 Register Field Descriptions ................................................................
Register Call Summary for MCASP_DITCSRA1 .................................................................
MCASP_DITCSRA2 Instances .....................................................................................
MCASP_DITCSRA2 Register Field Descriptions ................................................................
Register Call Summary for MCASP_DITCSRA2 .................................................................
MCASP_DITCSRA3 Instances .....................................................................................
MCASP_DITCSRA3 Register Field Descriptions ................................................................
Register Call Summary for MCASP_DITCSRA3 .................................................................
MCASP_DITCSRA4 Instances .....................................................................................
MCASP_DITCSRA4 Register Field Descriptions ................................................................
Register Call Summary for MCASP_DITCSRA4 .................................................................
MCASP_DITCSRA5 Instances .....................................................................................
MCASP_DITCSRA5 Register Field Descriptions ................................................................
Register Call Summary for MCASP_DITCSRA5 .................................................................
MCASP_DITCSRB0 Instances .....................................................................................
MCASP_DITCSRB0 Register Field Descriptions ................................................................
Register Call Summary for MCASP_DITCSRB0 .................................................................
11-1347. Register Call Summary for MCASP_XSTAT
11-1348.
11-1349.
11-1350.
11-1351.
11-1352.
11-1353.
11-1354.
11-1355.
11-1356.
11-1357.
11-1358.
11-1359.
11-1360.
11-1361.
11-1362.
11-1363.
11-1364.
11-1365.
11-1366.
11-1367.
11-1368.
11-1369.
11-1370.
11-1371.
11-1372.
11-1373.
11-1374.
11-1375.
11-1376.
11-1377.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2883
2885
2885
2885
2886
2886
2887
2888
2888
2888
2889
2889
2889
2890
2890
2890
2891
2891
2891
2892
2892
2892
2893
2893
2893
2894
2894
2894
2895
2895
2895
151
www.ti.com
11-1378. MCASP_DITCSRB1 Instances ..................................................................................... 2896
11-1379. MCASP_DITCSRB1 Register Field Descriptions ................................................................ 2896
11-1380. Register Call Summary for MCASP_DITCSRB1 ................................................................. 2896
11-1381. MCASP_DITCSRB2 Instances ..................................................................................... 2897
11-1382. MCASP_DITCSRB2 Register Field Descriptions ................................................................ 2897
11-1383. Register Call Summary for MCASP_DITCSRB2 ................................................................. 2897
11-1384. MCASP_DITCSRB3 Instances ..................................................................................... 2898
11-1385. MCASP_DITCSRB3 Register Field Descriptions ................................................................ 2898
11-1386. Register Call Summary for MCASP_DITCSRB3 ................................................................. 2898
11-1387. MCASP_DITCSRB4 Instances ..................................................................................... 2899
11-1388. MCASP_DITCSRB4 Register Field Descriptions ................................................................ 2899
11-1389. Register Call Summary for MCASP_DITCSRB4 ................................................................. 2899
11-1390. MCASP_DITCSRB5 Instances ..................................................................................... 2900
11-1391. MCASP_DITCSRB5 Register Field Descriptions ................................................................ 2900
11-1392. Register Call Summary for MCASP_DITCSRB5 ................................................................. 2900
11-1393. MCASP_DITUDRA0 Instances ..................................................................................... 2901
11-1394. MCASP_DITUDRA0 Register Field Descriptions ................................................................ 2901
11-1395. Register Call Summary for MCASP_DITUDRA0 ................................................................. 2901
11-1396. MCASP_DITUDRA1 Instances ..................................................................................... 2902
11-1397. MCASP_DITUDRA1 Register Field Descriptions ................................................................ 2902
11-1398. Register Call Summary for MCASP_DITUDRA1 ................................................................. 2902
11-1399. MCASP_DITUDRA2 Instances ..................................................................................... 2903
11-1400. MCASP_DITUDRA2 Register Field Descriptions ................................................................ 2903
11-1401. Register Call Summary for MCASP_DITUDRA2 ................................................................. 2903
11-1402. MCASP_DITUDRA3 Instances ..................................................................................... 2904
11-1403. MCASP_DITUDRA3 Register Field Descriptions ................................................................ 2904
11-1404. Register Call Summary for MCASP_DITUDRA3 ................................................................. 2904
11-1405. MCASP_DITUDRA4 Instances ..................................................................................... 2905
11-1406. MCASP_DITUDRA4 Register Field Descriptions ................................................................ 2905
11-1407. Register Call Summary for MCASP_DITUDRA4 ................................................................. 2905
11-1408. MCASP_DITUDRA5 Instances ..................................................................................... 2906
11-1409. MCASP_DITUDRA5 Register Field Descriptions ................................................................ 2906
11-1410. Register Call Summary for MCASP_DITUDRA5 ................................................................. 2906
11-1411. MCASP_DITUDRB0 Instances ..................................................................................... 2907
11-1412. MCASP_DITUDRB0 Register Field Descriptions ................................................................ 2907
11-1413. Register Call Summary for MCASP_DITUDRB0 ................................................................. 2907
11-1414. MCASP_DITUDRB1 Instances ..................................................................................... 2908
11-1415. MCASP_DITUDRB1 Register Field Descriptions ................................................................ 2908
11-1416. Register Call Summary for MCASP_DITUDRB1 ................................................................. 2908
11-1417. MCASP_DITUDRB2 Instances ..................................................................................... 2909
11-1418. MCASP_DITUDRB2 Register Field Descriptions ................................................................ 2909
11-1419. Register Call Summary for MCASP_DITUDRB2 ................................................................. 2909
11-1420. MCASP_DITUDRB3 Instances ..................................................................................... 2910
11-1421. MCASP_DITUDRB3 Register Field Descriptions ................................................................ 2910
11-1422. Register Call Summary for MCASP_DITUDRB3 ................................................................. 2910
11-1423. MCASP_DITUDRB4 Instances ..................................................................................... 2911
11-1424. MCASP_DITUDRB4 Register Field Descriptions ................................................................ 2911
11-1425. Register Call Summary for MCASP_DITUDRB4 ................................................................. 2911
11-1426. MCASP_DITUDRB5 Instances ..................................................................................... 2912
152
List of Tables
SPRUHY8I – January 2016 – Revised March 2019
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11-1427. MCASP_DITUDRB5 Register Field Descriptions ................................................................ 2912
11-1428. Register Call Summary for MCASP_DITUDRB5 ................................................................. 2912
11-1429. MCASP_SRCTL0 Instances ........................................................................................ 2913
11-1430. MCASP_SRCTL0 Register Field Descriptions ................................................................... 2913
11-1431. Register Call Summary for MCASP_SRCTL0 .................................................................... 2914
11-1432. MCASP_SRCTL1 Instances ........................................................................................ 2915
11-1433. MCASP_SRCTL1 Register Field Descriptions ................................................................... 2915
11-1434. Register Call Summary for MCASP_SRCTL1 .................................................................... 2916
11-1435. MCASP_SRCTL2 Instances ........................................................................................ 2917
11-1436. MCASP_SRCTL2 Register Field Descriptions ................................................................... 2917
11-1437. Register Call Summary for MCASP_SRCTL2 .................................................................... 2918
11-1438. MCASP_SRCTL3 Instances ........................................................................................ 2919
11-1439. MCASP_SRCTL3 Register Field Descriptions ................................................................... 2919
11-1440. Register Call Summary for MCASP_SRCTL3 .................................................................... 2920
11-1441. MCASP_SRCTL4 Instances ........................................................................................ 2921
11-1442. MCASP_SRCTL4 Register Field Descriptions ................................................................... 2921
11-1443. Register Call Summary for MCASP_SRCTL4 .................................................................... 2922
11-1444. MCASP_SRCTL5 Instances ........................................................................................ 2923
11-1445. MCASP_SRCTL5 Register Field Descriptions ................................................................... 2923
11-1446. Register Call Summary for MCASP_SRCTL5 .................................................................... 2924
11-1447. MCASP_SRCTL6 Instances ........................................................................................ 2925
11-1448. MCASP_SRCTL6 Register Field Descriptions ................................................................... 2925
11-1449. Register Call Summary for MCASP_SRCTL6 .................................................................... 2926
11-1450. MCASP_SRCTL7 Instances ........................................................................................ 2927
11-1451. MCASP_SRCTL7 Register Field Descriptions ................................................................... 2927
11-1452. Register Call Summary for MCASP_SRCTL7 .................................................................... 2928
11-1453. MCASP_SRCTL8 Instances ........................................................................................ 2929
11-1454. MCASP_SRCTL8 Register Field Descriptions ................................................................... 2929
11-1455. Register Call Summary for MCASP_SRCTL8 .................................................................... 2930
11-1456. MCASP_SRCTL9 Instances ........................................................................................ 2931
11-1457. MCASP_SRCTL9 Register Field Descriptions ................................................................... 2931
11-1458. Register Call Summary for MCASP_SRCTL9 .................................................................... 2932
11-1459. MCASP_SRCTL10 Instances ....................................................................................... 2933
11-1460. MCASP_SRCTL10 Register Field Descriptions .................................................................. 2933
11-1461. Register Call Summary for MCASP_SRCTL10 .................................................................. 2934
11-1462. MCASP_SRCTL11 Instances ....................................................................................... 2935
11-1463. MCASP_SRCTL11 Register Field Descriptions .................................................................. 2935
11-1464. Register Call Summary for MCASP_SRCTL11 .................................................................. 2936
11-1465. MCASP_SRCTL12 Instances ....................................................................................... 2937
11-1466. MCASP_SRCTL12 Register Field Descriptions .................................................................. 2937
11-1467. Register Call Summary for MCASP_SRCTL12 .................................................................. 2938
11-1468. MCASP_SRCTL13 Instances ....................................................................................... 2939
11-1469. MCASP_SRCTL13 Register Field Descriptions .................................................................. 2939
11-1470. Register Call Summary for MCASP_SRCTL13 .................................................................. 2940
11-1471. MCASP_SRCTL14 Instances ....................................................................................... 2941
11-1472. MCASP_SRCTL14 Register Field Descriptions .................................................................. 2941
11-1473. Register Call Summary for MCASP_SRCTL14 .................................................................. 2942
11-1474. MCASP_SRCTL15 Instances ....................................................................................... 2943
11-1475. MCASP_SRCTL15 Register Field Descriptions .................................................................. 2943
SPRUHY8I – January 2016 – Revised March 2019
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List of Tables
153
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11-1476. Register Call Summary for MCASP_SRCTL15 .................................................................. 2944
11-1477. MCASP_XBUF0 Instances .......................................................................................... 2945
11-1478. MCASP_XBUF0 Register Field Descriptions ..................................................................... 2945
.....................................................................
MCASP_XBUF1 Instances ..........................................................................................
MCASP_XBUF1 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_XBUF1 .....................................................................
MCASP_XBUF2 Instances ..........................................................................................
MCASP_XBUF2 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_XBUF2 .....................................................................
MCASP_XBUF3 Instances ..........................................................................................
MCASP_XBUF3 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_XBUF3 .....................................................................
MCASP_XBUF4 Instances ..........................................................................................
MCASP_XBUF4 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_XBUF4 .....................................................................
MCASP_XBUF5 Instances ..........................................................................................
MCASP_XBUF5 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_XBUF5 .....................................................................
MCASP_XBUF6 Instances ..........................................................................................
MCASP_XBUF6 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_XBUF6 .....................................................................
MCASP_XBUF7 Instances ..........................................................................................
MCASP_XBUF7 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_XBUF7 .....................................................................
MCASP_XBUF8 Instances ..........................................................................................
MCASP_XBUF8 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_XBUF8 .....................................................................
MCASP_XBUF9 Instances ..........................................................................................
MCASP_XBUF9 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_XBUF9 .....................................................................
MCASP_XBUF10 Instances ........................................................................................
MCASP_XBUF10 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_XBUF10 ....................................................................
MCASP_XBUF11 Instances ........................................................................................
MCASP_XBUF11 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_XBUF11 ....................................................................
MCASP_XBUF12 Instances ........................................................................................
MCASP_XBUF12 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_XBUF12 ....................................................................
MCASP_XBUF13 Instances ........................................................................................
MCASP_XBUF13 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_XBUF13 ....................................................................
MCASP_XBUF14 Instances ........................................................................................
MCASP_XBUF14 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_XBUF14 ....................................................................
MCASP_XBUF15 Instances ........................................................................................
MCASP_XBUF15 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_XBUF15 ....................................................................
11-1479. Register Call Summary for MCASP_XBUF0
11-1480.
11-1481.
11-1482.
11-1483.
11-1484.
11-1485.
11-1486.
11-1487.
11-1488.
11-1489.
11-1490.
11-1491.
11-1492.
11-1493.
11-1494.
11-1495.
11-1496.
11-1497.
11-1498.
11-1499.
11-1500.
11-1501.
11-1502.
11-1503.
11-1504.
11-1505.
11-1506.
11-1507.
11-1508.
11-1509.
11-1510.
11-1511.
11-1512.
11-1513.
11-1514.
11-1515.
11-1516.
11-1517.
11-1518.
11-1519.
11-1520.
11-1521.
11-1522.
11-1523.
11-1524.
154
List of Tables
2945
2946
2946
2946
2947
2947
2947
2948
2948
2948
2949
2949
2949
2950
2950
2950
2951
2951
2951
2952
2952
2952
2953
2953
2953
2954
2954
2954
2955
2955
2955
2956
2956
2956
2957
2957
2957
2958
2958
2958
2959
2959
2959
2960
2960
2960
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
11-1525. MCASP_RBUF0 Instances .......................................................................................... 2961
11-1526. MCASP_RBUF0 Register Field Descriptions ..................................................................... 2961
11-1527. Register Call Summary for MCASP_RBUF0
.....................................................................
2961
11-1528. MCASP_RBUF1 Instances .......................................................................................... 2962
11-1529. MCASP_RBUF1 Register Field Descriptions ..................................................................... 2962
.....................................................................
MCASP_RBUF2 Instances ..........................................................................................
MCASP_RBUF2 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_RBUF2 .....................................................................
MCASP_RBUF3 Instances ..........................................................................................
MCASP_RBUF3 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_RBUF3 .....................................................................
MCASP_RBUF4 Instances ..........................................................................................
MCASP_RBUF4 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_RBUF4 .....................................................................
MCASP_RBUF5 Instances ..........................................................................................
MCASP_RBUF5 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_RBUF5 .....................................................................
MCASP_RBUF6 Instances ..........................................................................................
MCASP_RBUF6 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_RBUF6 .....................................................................
MCASP_RBUF7 Instances ..........................................................................................
MCASP_RBUF7 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_RBUF7 .....................................................................
MCASP_RBUF8 Instances ..........................................................................................
MCASP_RBUF8 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_RBUF8 .....................................................................
MCASP_RBUF9 Instances ..........................................................................................
MCASP_RBUF9 Register Field Descriptions .....................................................................
Register Call Summary for MCASP_RBUF9 .....................................................................
MCASP_RBUF10 Instances ........................................................................................
MCASP_RBUF10 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_RBUF10 ....................................................................
MCASP_RBUF11 Instances ........................................................................................
MCASP_RBUF11 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_RBUF11 ....................................................................
MCASP_RBUF12 Instances ........................................................................................
MCASP_RBUF12 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_RBUF12 ....................................................................
MCASP_RBUF13 Instances ........................................................................................
MCASP_RBUF13 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_RBUF13 ....................................................................
MCASP_RBUF14 Instances ........................................................................................
MCASP_RBUF14 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_RBUF14 ....................................................................
MCASP_RBUF15 Instances ........................................................................................
MCASP_RBUF15 Register Field Descriptions ...................................................................
Register Call Summary for MCASP_RBUF15 ....................................................................
MCASP_WFIFOCTL Instances .....................................................................................
11-1530. Register Call Summary for MCASP_RBUF1
11-1531.
11-1532.
11-1533.
11-1534.
11-1535.
11-1536.
11-1537.
11-1538.
11-1539.
11-1540.
11-1541.
11-1542.
11-1543.
11-1544.
11-1545.
11-1546.
11-1547.
11-1548.
11-1549.
11-1550.
11-1551.
11-1552.
11-1553.
11-1554.
11-1555.
11-1556.
11-1557.
11-1558.
11-1559.
11-1560.
11-1561.
11-1562.
11-1563.
11-1564.
11-1565.
11-1566.
11-1567.
11-1568.
11-1569.
11-1570.
11-1571.
11-1572.
11-1573.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
2962
2963
2963
2963
2964
2964
2964
2965
2965
2965
2966
2966
2966
2967
2967
2967
2968
2968
2968
2969
2969
2969
2970
2970
2970
2971
2971
2971
2972
2972
2972
2973
2973
2973
2974
2974
2974
2975
2975
2975
2976
2976
2976
2977
155
www.ti.com
11-1574. MCASP_WFIFOCTL Register Field Descriptions ................................................................ 2977
2978
11-1576. MCASP_WFIFOSTS Instances
2979
11-1577.
2979
11-1578.
11-1579.
11-1580.
11-1581.
11-1582.
11-1583.
11-1584.
11-1585.
11-1586.
11-1587.
11-1588.
11-1589.
11-1590.
11-1591.
11-1592.
11-1593.
11-1594.
11-1595.
11-1596.
11-1597.
11-1598.
11-1599.
11-1600.
11-1601.
11-1602.
11-1603.
11-1604.
11-1605.
11-1606.
11-1607.
11-1608.
11-1609.
11-1610.
11-1611.
11-1612.
11-1613.
11-1614.
11-1615.
11-1616.
11-1617.
11-1618.
11-1619.
11-1620.
11-1621.
11-1622.
156
................................................................
....................................................................................
MCASP_WFIFOSTS Register Field Descriptions ................................................................
Register Call Summary for MCASP_WFIFOSTS ................................................................
MCASP_RFIFOCTL Instances .....................................................................................
MCASP_RFIFOCTL Register Field Descriptions ................................................................
Register Call Summary for MCASP_RFIFOCTL .................................................................
MCASP_RFIFOSTS Instances .....................................................................................
MCASP_RFIFOSTS Register Field Descriptions ................................................................
Register Call Summary for MCASP_RFIFOSTS .................................................................
MCASP_XBUF Instances ...........................................................................................
MCASP_XBUF Register Field Descriptions ......................................................................
Register Call Summary for MCASP_XBUF .......................................................................
MCASP_RBUF Instances ...........................................................................................
MCASP_RBUF Register Field Descriptions ......................................................................
Register Call Summary for MCASP_RBUF .......................................................................
McBSP Input/Output Signals........................................................................................
McBSP Integration Attributes .......................................................................................
McBSP Clocks and Resets .........................................................................................
McBSP Hardware Requests ........................................................................................
Choosing an Input Clock for the Sample Rate Generator with the SCLKME and CLKSM Bits ...........
Receive Clock Selection .............................................................................................
Transmit Clock Selection ............................................................................................
Receive Frame Synchronization Selection ........................................................................
Transmit Frame Synchronization Selection .......................................................................
MCBSP_RCR/MCBSP_XCR Fields Controlling Elements per Frame and Bits per Element ..............
Receive/Transmit Frame Length Configuration ..................................................................
Receive/Transmit Element Length Configuration ...............................................................
Effect of RJUST Bit Values With 12-Bit Example Data ABCh ..................................................
Effect of RJUST Bit Values With 20-Bit Example Data ABCDEh ..............................................
Reset State of McBSP Pins .........................................................................................
Receive Channel Assignment and Control When Two Receive Partitions are Used .......................
Transmit Channel Assignment and Control When Two Transmit Partitions are Used ......................
Receive Channel Assignment and Control When Eight Receive Partitions are Used ......................
Transmit Channel Assignment and Control When Eight Transmit Partitions are Used .....................
Use of the Receive Channel Enable Registers ...................................................................
Selecting a Transmit Multi-channel Selection Mode With the XMCM Bits ...................................
Use of the Transmit Channel Enable Registers ..................................................................
Justification of Expanded Data in MCBSP_DRR .................................................................
McBSP Emulation Modes Selectable With the FREE and SOFT Bits of MCBSP_SPCR ..................
Receiver Clock and Frame Configurations........................................................................
Transmitter Clock and Frame Configurations.....................................................................
Receiver Reset .......................................................................................................
Global Configuration .................................................................................................
Data Configuration ...................................................................................................
Frame-Sync Configuration ..........................................................................................
Clock Configuration ..................................................................................................
Take the Receiver Out of Reset ....................................................................................
11-1575. Register Call Summary for MCASP_WFIFOCTL
List of Tables
2979
2980
2980
2981
2982
2982
2982
2983
2983
2984
2985
2985
2985
2988
2990
2990
2990
2994
2998
2998
2999
3000
3001
3001
3002
3005
3005
3006
3023
3023
3025
3025
3026
3027
3029
3032
3035
3036
3036
3040
3041
3041
3041
3042
3042
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
....................................................................................................
Global Configuration .................................................................................................
Data Configuration ...................................................................................................
Frame-Sync Configuration ..........................................................................................
Clock Configuration ..................................................................................................
Take the Receiver Out of Reset ....................................................................................
MCBSP Instances ....................................................................................................
McBSP Registers .....................................................................................................
MCBSP_DRR Instances .............................................................................................
MCBSP_DRR Register Field Descriptions ........................................................................
Register Call Summary for MCBSP_DRR ........................................................................
MCBSP_DXR Instances .............................................................................................
MCBSP_DXR Register Field Descriptions ........................................................................
Register Call Summary for MCBSP_DXR ........................................................................
MCBSP_SPCR Instances ...........................................................................................
MCBSP_SPCR Register Field Descriptions ......................................................................
Register Call Summary for MCBSP_SPCR .......................................................................
MCBSP_RCR Instances .............................................................................................
MCBSP_RCR Register Field Descriptions ........................................................................
Register Call Summary for MCBSP_RCR ........................................................................
MCBSP_XCR Instances .............................................................................................
MCBSP_XCR Register Field Descriptions ........................................................................
Register Call Summary for MCBSP_XCR ........................................................................
MCBSP_SRGR Instances ...........................................................................................
MCBSP_SRGR Register Field Descriptions ......................................................................
Register Call Summary for MCBSP_SRGR ......................................................................
MCBSP_MCR Instances ............................................................................................
MCBSP_MCR Register Field Descriptions .......................................................................
Register Call Summary for MCBSP_MCR ........................................................................
MCBSP_RCERE0 Instances .......................................................................................
MCBSP_RCERE0 Register Field Descriptions ...................................................................
Register Call Summary for MCBSP_RCERE0 ...................................................................
MCBSP_RCERE1 Instances .......................................................................................
MCBSP_RCERE1 Register Field Descriptions ...................................................................
Register Call Summary for MCBSP_RCERE1 ...................................................................
MCBSP_RCERE2 Instances .......................................................................................
MCBSP_RCERE2 Register Field Descriptions ...................................................................
Register Call Summary for MCBSP_RCERE2 ...................................................................
MCBSP_RCERE3 Instances .......................................................................................
MCBSP_RCERE3 Register Field Descriptions ...................................................................
Register Call Summary for MCBSP_RCERE3 ...................................................................
MCBSP_XCERE0 Instances ........................................................................................
MCBSP_XCERE0 Register Field Descriptions ...................................................................
Register Call Summary for MCBSP_XCERE0 ...................................................................
MCBSP_XCERE1 Instances ........................................................................................
MCBSP_XCERE1 Register Field Descriptions ...................................................................
Register Call Summary for MCBSP_XCERE1 ...................................................................
MCBSP_XCERE2 Instances ........................................................................................
MCBSP_XCERE2 Register Field Descriptions ...................................................................
11-1623. Transmitter Reset
3042
11-1624.
3042
11-1625.
11-1626.
11-1627.
11-1628.
11-1629.
11-1630.
11-1631.
11-1632.
11-1633.
11-1634.
11-1635.
11-1636.
11-1637.
11-1638.
11-1639.
11-1640.
11-1641.
11-1642.
11-1643.
11-1644.
11-1645.
11-1646.
11-1647.
11-1648.
11-1649.
11-1650.
11-1651.
11-1652.
11-1653.
11-1654.
11-1655.
11-1656.
11-1657.
11-1658.
11-1659.
11-1660.
11-1661.
11-1662.
11-1663.
11-1664.
11-1665.
11-1666.
11-1667.
11-1668.
11-1669.
11-1670.
11-1671.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
3043
3043
3043
3044
3045
3045
3047
3047
3047
3048
3048
3048
3049
3049
3051
3053
3053
3054
3055
3055
3056
3057
3057
3058
3059
3060
3063
3064
3064
3067
3068
3068
3071
3072
3072
3075
3076
3076
3079
3080
3081
3091
3092
3093
3103
3104
3105
157
www.ti.com
3115
11-1673.
3116
11-1674.
11-1675.
11-1676.
11-1677.
11-1678.
11-1679.
11-1680.
11-1681.
11-1682.
11-1683.
11-1684.
11-1685.
11-1686.
11-1687.
11-1688.
11-1689.
11-1690.
11-1691.
11-1692.
11-1693.
11-1694.
11-1695.
11-1696.
11-1697.
11-1698.
11-1699.
11-1700.
11-1701.
11-1702.
11-1703.
11-1704.
11-1705.
11-1706.
11-1707.
11-1708.
11-1709.
11-1710.
11-1711.
11-1712.
11-1713.
11-1714.
11-1715.
11-1716.
11-1717.
11-1718.
11-1719.
11-1720.
158
...................................................................
MCBSP_XCERE3 Instances ........................................................................................
MCBSP_XCERE3 Register Field Descriptions ...................................................................
Register Call Summary for MCBSP_XCERE3 ...................................................................
MCBSP_PCR Instances .............................................................................................
MCBSP_PCR Register Field Descriptions ........................................................................
Register Call Summary for MCBSP_PCR ........................................................................
MCBSP_BFIFOREV Instances .....................................................................................
MCBSP_BFIFOREV Register Field Descriptions ................................................................
Register Call Summary for MCBSP_BFIFOREV .................................................................
MCBSP_WFIFOCTL Instances .....................................................................................
MCBSP_WFIFOCTL Register Field Descriptions ................................................................
Register Call Summary for MCBSP_WFIFOCTL ................................................................
MCBSP_WFIFOSTS Instances ....................................................................................
MCBSP_WFIFOSTS Register Field Descriptions ................................................................
Register Call Summary for MCBSP_WFIFOSTS ................................................................
MCBSP_RFIFOCTL Instances .....................................................................................
MCBSP_RFIFOCTL Register Field Descriptions ................................................................
Register Call Summary for MCBSP_RFIFOCTL .................................................................
MCBSP_RFIFOSTS Instances .....................................................................................
MCBSP_RFIFOSTS Register Field Descriptions ................................................................
Register Call Summary for MCBSP_RFIFOSTS .................................................................
MLB Subsystem I/O Description ...................................................................................
MLB Integration Attributes...........................................................................................
MLB Clocks and Resets .............................................................................................
MLB Hardware Requests ............................................................................................
MediaLB Channel Address to Logical Channel Mapping .......................................................
Channel Table RAM Address Mapping ............................................................................
Channel Allocation Table Entry Map ...............................................................................
Format Of Channel Allocation Table Entry ........................................................................
Field Descriptions Of Channel Allocation Table Entry ...........................................................
Format Of Synchronous Channel Descriptor Table Entry.......................................................
Field Descriptions Of Synchronous Channel Descriptor Table Entry .........................................
Format Of Isochronous Channel Descriptor Table Entry........................................................
Field Descriptions Of Isochronous Channel Descriptor Table Entry ...........................................
Format Of Asynchronous and Control Channel Descriptor Table Entry ......................................
Field Descriptions Of Asynchronous And Control Channel Descriptor Table Entry .........................
Field Descriptions Of DMA Descriptor Table .....................................................................
Format Of Synchronous DMA Descriptor Table Entry...........................................................
Format Of Isochronous DMA Descriptor Table Entry ............................................................
Format Of Single-Packet Asynchronous and Control DMA Descriptor Table Entry ........................
Format Of Multiple-Packet Asynchronous And Control DMA Descriptor Table Entry .......................
Global Initialization of Surrounding Modules ......................................................................
Channel Initialization Steps .........................................................................................
Configuring The Hardware ..........................................................................................
Programming The Routing Fabric Block ..........................................................................
Subsequence - Program The Channel Descriptor Table........................................................
Subsequence - Write To The Data Buffer RAM ..................................................................
Subsequence - Read From The Data Buffer RAM...............................................................
11-1672. Register Call Summary for MCBSP_XCERE2
List of Tables
3117
3127
3128
3128
3129
3131
3131
3131
3132
3132
3133
3134
3134
3134
3135
3135
3136
3137
3137
3137
3140
3141
3141
3142
3144
3145
3146
3146
3146
3148
3148
3149
3149
3150
3151
3152
3154
3155
3156
3157
3161
3161
3161
3162
3162
3163
3163
SPRUHY8I – January 2016 – Revised March 2019
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Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
11-1721. Programming The DMA Block ...................................................................................... 3164
11-1722. Subsequence - Program The DMA Block Ping Page............................................................ 3164
11-1723. Subsequence - Program The DMA Block Pong Page ........................................................... 3165
11-1724. Synchronizing And Unmuting The Synchronous Channel ...................................................... 3165
11-1725. Channel Servicing Steps ............................................................................................ 3166
11-1726. Servicing the DMA Interrupts ....................................................................................... 3166
11-1727. Subsequence - Reading The DMA Descriptor Table Entry ..................................................... 3167
11-1728. Servicing MLB Interrupts ............................................................................................ 3167
11-1729. Polling For MediaLB System Commands ......................................................................... 3168
11-1730. Direct Channel Table RAM Writes ................................................................................. 3168
11-1731. Direct Channel Table RAM Reads ................................................................................. 3168
11-1732. MLB Instances ........................................................................................................ 3170
11-1733. MLB Registers ........................................................................................................ 3170
.............................................................................................
MLB_MLBC0 Register Field Descriptions .........................................................................
Register Call Summary for MLB_MLBC0 .........................................................................
MLB_MS0 Instances .................................................................................................
MLB_MS0 Register Field Descriptions ............................................................................
Register Call Summary for MLB_MS0 .............................................................................
MLB_MS1 Instances .................................................................................................
MLB_MS1 Register Field Descriptions ............................................................................
Register Call Summary for MLB_MS1 .............................................................................
MLB_MSS Instances .................................................................................................
MLB_MSS Register Field Descriptions ............................................................................
Register Call Summary for MLB_MSS ............................................................................
MLB_MSD Instances ................................................................................................
MLB_MSD Register Field Descriptions ............................................................................
Register Call Summary for MLB_MSD ............................................................................
MLB_MIEN Instances ................................................................................................
MLB_MIEN Register Field Descriptions ...........................................................................
Register Call Summary for MLB_MIEN ...........................................................................
MLB_MLBC1 Instances .............................................................................................
MLB_MLBC1 Register Field Descriptions .........................................................................
Register Call Summary for MLB_MLBC1 .........................................................................
MLB_HCTL Instances ...............................................................................................
MLB_HCTL Register Field Descriptions ...........................................................................
Register Call Summary for MLB_HCTL ...........................................................................
MLB_HCMR0 Instances .............................................................................................
MLB_HCMR0 Register Field Descriptions ........................................................................
Register Call Summary for MLB_HCMR0 .........................................................................
MLB_HCMR1 Instances .............................................................................................
MLB_HCMR1 Register Field Descriptions ........................................................................
Register Call Summary for MLB_HCMR1 .........................................................................
MLB_HCER0 Instances .............................................................................................
MLB_HCER0 Register Field Descriptions.........................................................................
Register Call Summary for MLB_HCER0 .........................................................................
MLB_HCER1 Instances .............................................................................................
MLB_HCER1 Register Field Descriptions.........................................................................
Register Call Summary for MLB_HCER1 .........................................................................
11-1734. MLB_MLBC0 Instances
3171
11-1735.
3171
11-1736.
11-1737.
11-1738.
11-1739.
11-1740.
11-1741.
11-1742.
11-1743.
11-1744.
11-1745.
11-1746.
11-1747.
11-1748.
11-1749.
11-1750.
11-1751.
11-1752.
11-1753.
11-1754.
11-1755.
11-1756.
11-1757.
11-1758.
11-1759.
11-1760.
11-1761.
11-1762.
11-1763.
11-1764.
11-1765.
11-1766.
11-1767.
11-1768.
11-1769.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
3172
3173
3173
3173
3174
3174
3174
3175
3175
3176
3177
3177
3177
3178
3178
3179
3180
3180
3180
3181
3181
3181
3182
3182
3182
3183
3183
3183
3184
3184
3184
3185
3185
3185
159
www.ti.com
3186
11-1771.
3186
11-1772.
11-1773.
11-1774.
11-1775.
11-1776.
11-1777.
11-1778.
11-1779.
11-1780.
11-1781.
11-1782.
11-1783.
11-1784.
11-1785.
11-1786.
11-1787.
11-1788.
11-1789.
11-1790.
11-1791.
11-1792.
11-1793.
11-1794.
11-1795.
11-1796.
11-1797.
11-1798.
11-1799.
11-1800.
11-1801.
11-1802.
11-1803.
11-1804.
11-1805.
11-1806.
11-1807.
11-1808.
11-1809.
11-1810.
11-1811.
11-1812.
11-1813.
11-1814.
11-1815.
11-1816.
11-1817.
11-1818.
160
.............................................................................................
MLB_HCBR0 Register Field Descriptions.........................................................................
Register Call Summary for MLB_HCBR0 .........................................................................
MLB_HCBR1 Instances .............................................................................................
MLB_HCBR1 Register Field Descriptions.........................................................................
Register Call Summary for MLB_HCBR1 .........................................................................
MLB_MDAT0 Instances .............................................................................................
MLB_MDAT0 Register Field Descriptions.........................................................................
Register Call Summary for MLB_MDAT0 .........................................................................
MLB_MDAT1 Instances .............................................................................................
MLB_MDAT1 Register Field Descriptions.........................................................................
Register Call Summary for MLB_MDAT1 .........................................................................
MLB_MDAT2 Instances .............................................................................................
MLB_MDAT2 Register Field Descriptions.........................................................................
Register Call Summary for MLB_MDAT2 .........................................................................
MLB_MDAT3 Instances .............................................................................................
MLB_MDAT3 Register Field Descriptions.........................................................................
Register Call Summary for MLB_MDAT3 .........................................................................
MLB_MDWE0 Instances ............................................................................................
MLB_MDWE0 Register Field Descriptions ........................................................................
Register Call Summary for MLB_MDWE0 ........................................................................
MLB_MDWE1 Instances ............................................................................................
MLB_MDWE1 Register Field Descriptions ........................................................................
Register Call Summary for MLB_MDWE1 ........................................................................
MLB_MDWE2 Instances ............................................................................................
MLB_MDWE2 Register Field Descriptions ........................................................................
Register Call Summary for MLB_MDWE2 ........................................................................
MLB_MDWE3 Instances ............................................................................................
MLB_MDWE3 Register Field Descriptions ........................................................................
Register Call Summary for MLB_MDWE3 ........................................................................
MLB_MCTL Instances ...............................................................................................
MLB_MCTL Register Field Descriptions ..........................................................................
Register Call Summary for MLB_MCTL ...........................................................................
MLB_MADR Instances...............................................................................................
MLB_MADR Register Field Descriptions ..........................................................................
Register Call Summary for MLB_MADR ..........................................................................
MLB_ACTL Instances................................................................................................
MLB_ACTL Register Field Descriptions ...........................................................................
Register Call Summary for MLB_ACTL ...........................................................................
MLB_ACSR0 Instances .............................................................................................
MLB_ACSR0 Register Field Descriptions .........................................................................
Register Call Summary for MLB_ACSR0 .........................................................................
MLB_ACSR1 Instances .............................................................................................
MLB_ACSR1 Register Field Descriptions .........................................................................
Register Call Summary for MLB_ACSR1 .........................................................................
MLB_ACMR0 Instances .............................................................................................
MLB_ACMR0 Register Field Descriptions ........................................................................
Register Call Summary for MLB_ACMR0 .........................................................................
MLB_ACMR1 Instances .............................................................................................
11-1770. MLB_HCBR0 Instances
List of Tables
3186
3187
3187
3187
3188
3188
3188
3189
3189
3189
3190
3190
3190
3191
3191
3191
3192
3192
3192
3193
3193
3193
3194
3194
3194
3195
3195
3195
3196
3196
3196
3197
3197
3197
3198
3198
3198
3200
3200
3200
3201
3201
3201
3202
3202
3202
3203
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
www.ti.com
11-1819. MLB_ACMR1 Register Field Descriptions ........................................................................ 3203
11-1820. Register Call Summary for MLB_ACMR1 ......................................................................... 3203
11-1821. Description of MMCi host controller I/Os (where i = 0 to 1)
....................................................
3207
11-1822. Relationship Between Configuration and Name of Response Type ........................................... 3211
11-1823. MMC Integration Attributes .......................................................................................... 3215
11-1824. MMC Clocks and Resets ............................................................................................ 3215
11-1825. MMC Hardware Requests ........................................................................................... 3215
11-1826. Local Power Management Features ............................................................................... 3217
11-1827. Clock Activity Settings ............................................................................................... 3217
11-1828. Events .................................................................................................................. 3218
11-1829. Descriptor Line Overview ............................................................................................ 3223
11-1830. Available Actions of a Descriptor Line ............................................................................. 3224
11-1831. Additional Parameters of a Descriptor Line ....................................................................... 3224
11-1832. ADMA2 States Description .......................................................................................... 3226
11-1833. ADMA FSM Symbol Definition ...................................................................................... 3226
11-1834. Memory Size, BLEN, and Buffer Relationship .................................................................... 3231
11-1835. MMC, SD, SDIO Responses in the MMCHS_RSPxx Registers ............................................... 3232
11-1836. CC and TC Values Upon Error Detected.......................................................................... 3233
11-1837. MMCi Controller Transfer Stop Command Summary............................................................ 3237
11-1838. MMC Hardware Status Features ................................................................................... 3240
11-1839. MMC Preset Value Registers ....................................................................................... 3241
11-1840. Global Initialization of Surrounding Modules ...................................................................... 3242
11-1841. MMC Controller Meta Initialization Steps.......................................................................... 3242
11-1842. Subprocess Call Summary for Main Sequence – Card Identification and Selection ........................ 3246
11-1843. CMD Line Reset ...................................................................................................... 3247
11-1844. Subprocess Call Summary for Main Sequence – MMC Controller Read/Write Transfer Flow in DMA
Mode With Interrupt ..................................................................................................... 3248
11-1845. DATA Lines Reset.................................................................................................... 3249
11-1846. Subprocess Call Summary for Main Sequence – Read/Write Transfer Flow in DMA Mode With Polling 3249
11-1847. Subprocess Call Summary for Main Sequence – Read/Write Transfer Flow Without DMA With Polling
............................
Subprocess Call Summary for Main Sequence – Suspend Flow ..............................................
Subprocess Call Summary for Main Sequence - Resume Flow ...............................................
Subprocess Call Summary for Main Sequence – Command Transfer Flow With Polling ..................
Subprocess Call Summary for Main Sequence – Command Transfer Flow With Interrupts ...............
Subprocess Call Summary for Main Sequence – Bus Width Configuration Flow ...........................
Subprocess Call Summary for Main Sequence – Boot Using CMD0 .........................................
Subprocess Call Summary for Main Sequence – Boot Using CMD0 .........................................
MMC Instances .......................................................................................................
MMC Registers .......................................................................................................
MMCHS_HL_REV Instances .......................................................................................
MMCHS_HL_REV Register Field Descriptions...................................................................
Register Call Summary for MMCHS_HL_REV ...................................................................
MMCHS_HL_HWINFO Instances ..................................................................................
MMCHS_HL_HWINFO Register Field Descriptions .............................................................
Register Call Summary for MMCHS_HL_HWINFO ..............................................................
MMCHS_HL_SYSCONFIG Instances .............................................................................
MMCHS_HL_SYSCONFIG Register Field Descriptions ........................................................
Register Call Summary for MMCHS_HL_SYSCONFIG .........................................................
11-1848. Subprocess Call Summary for Main Sequence – Read/Write in CE-ATA Mode
11-1849.
11-1850.
11-1851.
11-1852.
11-1853.
11-1854.
11-1855.
11-1856.
11-1857.
11-1858.
11-1859.
11-1860.
11-1861.
11-1862.
11-1863.
11-1864.
11-1865.
11-1866.
SPRUHY8I – January 2016 – Revised March 2019
Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
List of Tables
3251
3251
3253
3254
3255
3257
3258
3259
3260
3261
3261
3263
3263
3263
3264
3264
3265
3266
3266
3267
161
www.ti.com
11-1867. MMCHS_SYSCONFIG Instances .................................................................................. 3268
11-1868. MMCHS_SYSCONFIG Register Field Descriptions ............................................................. 3268
11-1869. Register Call Summary for MMCHS_SYSCONFIG .............................................................. 3269
11-1870. MMCHS_SYSSTATUS Instances .................................................................................. 3270
11-1871. MMCHS_SYSSTATUS Register Field Descriptions ............................................................. 3270
11-1872. Register Call Summary for MMCHS_SYSSTATUS.............................................................. 3270
11-1873. MMCHS_CSRE Instances
..........................................................................................
3271
11-1874. MMCHS_CSRE Register Field Descriptions...................................................................... 3271
11-1875. Register Call Summary for MMCHS_CSRE ...................................................................... 3271
11-1876. MMCHS_SYSTEST Instances...................................................................................... 3272
11-1877. MMCHS_SYSTEST Register Field Descriptions ................................................................. 3272
11-1878. Register Call Summary for MMCHS_SYSTEST ................................................................. 3275
11-1879. MMCHS_CON Instances ............................................................................................ 3276
11-1880. MMCHS_CON Register Field Descriptions ....................................................................... 3276
11-1881. Register Call Summary for MMCHS_CON........................................................................ 3281
11-1882. MMCHS_PWCNT Instances ........................................................................................ 3282
11-1883. MMCHS_PWCNT Register Field Descriptions ................................................................... 3282
11-1884. Register Call Summary for MMCHS_PWCNT .................................................................... 3282
11-1885. MMCHS_DLL Instances ............................................................................................. 3283
11-1886. MMCHS_DLL Register Field Descriptions ........................................................................ 3283
11-1887. Register Call Summary for MMCHS_DLL ......................................................................... 3284
11-1888. MMCHS_SDMASA Instances
......................................................................................
3285
11-1889. MMCHS_SDMASA Register Field Descriptions .................................................................. 3285
11-1890. Register Call Summary for MMCHS_SDMASA .................................................................. 3285
11-1891. MMCHS_BLK Instances ............................................................................................. 3286
11-1892. MMCHS_BLK Register Field Descriptions ........................................................................ 3286
11-1893. Register Call Summary for MMCHS_BLK
........................................................................
3287
11-1894. MMCHS_ARG Instances ............................................................................................ 3288
11-1895. MMCHS_ARG Register Field Descriptions ....................................................................... 3288
11-1896. Register Call Summary for MMCHS_ARG ........................................................................ 3288
11-1897. MMCHS_CMD Instances ............................................................................................ 3289
11-1898. MMCHS_CMD Register Field Descriptions ....................................................................... 3289
11-1899. Register Call Summary for MMCHS_CMD
.......................................................................
3293
11-1900. MMCHS_RSP10 Instances ......................................................................................... 3294
11-1901. MMCHS_RSP10 Register Field Descriptions
....................................................................
3294
11-1902. Register Call Summary for MMCHS_RSP10 ..................................................................... 3294
11-1903. MMCHS_RSP32 Instances ......................................................................................... 3295
11-1904. MMCHS_RSP32 Register Field Descriptions
....................................................................
3295
11-1905. Register Call Summary for MMCHS_RSP32 ..................................................................... 3295
11-1906. MMCHS_RSP54 Instances ......................................................................................... 3296
3296
11-1908.
3296
11-1909.
11-1910.
11-1911.
11-1912.
11-1913.
11-1914.
11-1915.
162
....................................................................
Register Call Summary for MMCHS_RSP54 .....................................................................
MMCHS_RSP76 Instances .........................................................................................
MMCHS_RSP76 Register Field Descriptions ....................................................................
Register Call Summary for MMCHS_RSP76 .....................................................................
MMCHS_DATA Instances ...........................................................................................
MMCHS_DATA Register Field Descriptions ..............................................................