Texas Instruments | TMS320DM335 DMSoC Real Time Out (RTO) | User Guides | Texas Instruments TMS320DM335 DMSoC Real Time Out (RTO) User guides

Texas Instruments TMS320DM335 DMSoC Real Time Out (RTO) User guides
TMS320DM335
Digital Media System-on-Chip (DMSoC)
Real Time Out (RTO) Controller
Reference Guide
Literature Number: SPRUFY7
July 2008
2
SPRUFY7 – July 2008
Submit Documentation Feedback
Contents
Preface ........................................................................................................................................ 5
1
Introduction......................................................................................................................... 8
2
3
4
5
6
1.1
Features .................................................................................................................... 8
1.2
Functional Block Diagram ................................................................................................ 8
1.3
Industry Standard(s) Compliance Statement .......................................................................... 8
Peripheral Architecture ......................................................................................................... 9
.............................................................................................................. 9
....................................................................................................... 9
2.3
RTO Output Generation .................................................................................................. 9
2.4
Reset Considerations ................................................................................................... 10
2.5
Initialization ............................................................................................................... 11
2.6
Interrupt Support ......................................................................................................... 11
EDMA Event Support .......................................................................................................... 11
Power Management ............................................................................................................ 11
Emulation Considerations ................................................................................................... 11
Registers ........................................................................................................................... 12
6.1
RTO Controller Revision ID Register (REVID)....................................................................... 12
6.2
RTO Controller Control and Status Register (CTRL_STATUS) ................................................... 13
2.1
Clock Control
2.2
Signal Descriptions
SPRUFY7 – July 2008
Submit Documentation Feedback
Table of Contents
3
www.ti.com
List of Figures
1
2
3
4
RTO Controller Block Diagram ............................................................................................. 8
RTO Outputs State Diagram .............................................................................................. 10
RTO Controller Revision ID Register (REVID) ........................................................................ 12
RTO Controller Control and Status Register (CTRL_STATUS) ..................................................... 13
List of Tables
1
2
3
4
RTO Outputs State Table ................................................................................................. 10
RTO Controller Revision ID Register (REVID) Field Descriptions ................................................... 12
RTO Controller Control and Status Register (CTRL_STATUS) Field Descriptions ............................... 13
List of Figures
SPRUFY7 – July 2008
Submit Documentation Feedback
Read This First
SPRUFY7 – July 2008
Preface: Read Me First
This document describes the Real Time Out (RTO) controller on the TMS320DM335 Digital Media
System-on-Chip (DMSoC).
Notational Conventions
This document uses the following conventions.
• Hexadecimal numbers are shown with the suffix h. For example, the following number is 40
hexadecimal (decimal 64): 40h.
• Registers in this document are shown in figures and described in tables.
– Each register figure shows a rectangle divided into fields that represent the fields of the register.
Each field is labeled with its bit name, its beginning and ending bit numbers above, and its
read/write properties below. A legend explains the notation used for the properties.
– Reserved bits in a register figure designate a bit that is used for future device expansion.
Related Documentation from Texas Instruments
The following documents describe the TMS320DM335 Digital Media System-on-Chip (DMSoC). Copies of
these documents are available on the internet at www.ti.com.
SPRUFX7 — TMS320DM335 Digital Media System-on-Chip (DMSoC) ARM Subsystem Reference
Guide This document describes the ARM Subsystem in the TMS320DM335 Digital Media
System-on-Chip (DMSoC). The ARM subsystem is designed to give the ARM926EJ-S (ARM9)
master control of the device. In general, the ARM is responsible for configuration and control of the
device; including the components of the ARM Subsystem, the peripherals, and the external
memories.
SPRUFX8 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Video Processing Front End
(VPFE) Reference Guide This document describes the Video Processing Front End (VPFE) in the
TMS320DM335 Digital Media System-on-Chip (DMSoC).
SPRUFX9 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Video Processing Back End
(VPBE) Reference Guide This document describes the Video Processing Back End (VPBE) in the
TMS320DM335 Digital Media System-on-Chip (DMSoC).
SPRUFY0 — TMS320DM335 Digital Media System-on-Chip (DMSoC) 64-bit Timer Reference Guide
This document describes the operation of the software-programmable 64-bit timers in the
TMS320DM335 Digital Media System-on-Chip (DMSoC). Timer 0, Timer 1, and Timer 3 are used
as general-purpose (GP) timers and can be programmed in 64-bit mode, dual 32-bit unchained
mode, or dual 32-bit chained mode; Timer 2 is used only as a watchdog timer. The GP timer modes
can be used to generate periodic interrupts or enhanced direct memory access (EDMA)
synchronization events and Real Time Output (RTO) events (Timer 3 only). The watchdog timer
mode is used to provide a recovery mechanism for the device in the event of a fault condition, such
as a non-exiting code loop.
SPRUFY1 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Serial Peripheral Interface (SPI)
Reference Guide This document describes the serial peripheral interface (SPI) in the
TMS320DM335 Digital Media System-on-Chip (DMSoC). The SPI is a high-speed synchronous
serial input/output port that allows a serial bit stream of programmed length (1 to 16 bits) to be
shifted into and out of the device at a programmed bit-transfer rate. The SPI is normally used for
communication between the DMSoC and external peripherals. Typical applications include an
interface to external I/O or peripheral expansion via devices such as shift registers, display drivers,
SPI EPROMs and analog-to-digital converters.
SPRUFY7 – July 2008
Submit Documentation Feedback
Preface
5
Related Documentation from Texas Instruments
www.ti.com
SPRUFY2 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Universal Asynchronous
Receiver/Transmitter (UART) Reference Guide This document describes the universal
asynchronous receiver/transmitter (UART) peripheral in the TMS320DM335 Digital Media
System-on-Chip (DMSoC). The UART peripheral performs serial-to-parallel conversion on data
received from a peripheral device, and parallel-to-serial conversion on data received from the CPU.
SPRUFY3 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Inter-Integrated Circuit (I2C)
Peripheral Reference Guide This document describes the inter-integrated circuit (I2C) peripheral
in the TMS320DM335 Digital Media System-on-Chip (DMSoC). The I2C peripheral provides an
interface between the DMSoC and other devices compliant with the I2C-bus specification and
connected by way of an I2C-bus. External components attached to this 2-wire serial bus can
transmit and receive up to 8-bit wide data to and from the DMSoC through the I2C peripheral. This
document assumes the reader is familiar with the I2C-bus specification.
SPRUFY5 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Multimedia Card (MMC)/Secure
Digital (SD) Card Controller Reference Guide This document describes the multimedia card
(MMC)/secure digital (SD) card controller in the TMS320DM335 Digital Media System-on-Chip
(DMSoC). The MMC/SD card is used in a number of applications to provide removable data
storage. The MMC/SD controller provides an interface to external MMC and SD cards. The
communication between the MMC/SD controller and MMC/SD card(s) is performed by the MMC/SD
protocol.
SPRUFY6 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Pulse-Width Modulator (PWM)
Reference Guide This document describes the pulse-width modulator (PWM) peripheral in the
TMS320DM335 Digital Media System-on-Chip (DMSoC).
SPRUFY7 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Real-Time Out (RTO) Controller
Reference Guide This document describes the Real Time Out (RTO) controller in the
TMS320DM335 Digital Media System-on-Chip (DMSoC).
SPRUFY8 — TMS320DM335 Digital Media System-on-Chip (DMSoC) General-Purpose Input/Output
(GPIO) Reference Guide This document describes the general-purpose input/output (GPIO)
peripheral in the TMS320DM335 Digital Media System-on-Chip (DMSoC). The GPIO peripheral
provides dedicated general-purpose pins that can be configured as either inputs or outputs. When
configured as an input, you can detect the state of the input by reading the state of an internal
register. When configured as an output, you can write to an internal register to control the state
driven on the output pin.
SPRUFY9 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Universal Serial Bus (USB)
Controller Reference Guide This document describes the universal serial bus (USB) controller in
the TMS320DM335 Digital Media System-on-Chip (DMSoC). The USB controller supports data
throughput rates up to 480 Mbps. It provides a mechanism for data transfer between USB devices
and also supports host negotiation.
SPRUFZ0 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Enhanced Direct Memory
Access (EDMA) Controller Reference Guide This document describes the operation of the
enhanced direct memory access (EDMA3) controller in the TMS320DM335 Digital Media
System-on-Chip (DMSoC). The EDMA controller's primary purpose is to service user-programmed
data transfers between two memory-mapped slave endpoints on the DMSoC.
SPRUFZ1 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Asynchronous External
Memory Interface (EMIF) Reference Guide This document describes the asynchronous external
memory interface (EMIF) in the TMS320DM335 Digital Media System-on-Chip (DMSoC). The EMIF
supports a glueless interface to a variety of external devices.
SPRUFZ2 — TMS320DM335 Digital Media System-on-Chip (DMSoC) DDR2/Mobile DDR
(DDR2/mDDR) Memory Controller Reference Guide This document describes the DDR2/mDDR
memory controller in the TMS320DM335 Digital Media System-on-Chip (DMSoC). The
DDR2/mDDR memory controller is used to interface with JESD79D-2A standard compliant DDR2
SDRAM and mobile DDR devices.
6
Preface: Read Me First
SPRUFY7 – July 2008
Submit Documentation Feedback
www.ti.com
Related Documentation from Texas Instruments
SPRUFZ3 — TMS320DM335 Digital Media System-on-Chip (DMSoC) Audio Serial Port (ASP)
Reference Guide This document describes the operation of the audio serial port (ASP) audio
interface in the TMS320DM335 Digital Media System-on-Chip (DMSoC). The primary audio modes
that are supported by the ASP are the AC97 and IIS modes. In addition to the primary audio
modes, the ASP supports general serial port receive and transmit operation, but is not intended to
be used as a high-speed interface.
Trademarks
SPRUFY7 – July 2008
Submit Documentation Feedback
Preface: Read Me First
7
Reference Guide
SPRUFY7 – July 2008
Real Time Out (RTO) Controller
1
Introduction
The Real Time Out (RTO) controller works in conjunction with Timer 3 to provide signals to control
external components, such as motors.
1.1
Features
The DM335 RTO controller supports the following:
• Trigger on Timer 3 events
• Four separate output signals
1.2
Functional Block Diagram
The RTO controller takes input from the Timer 3 module and generates output signals on the RTO pins
(RTO[3:0]). You can select the input from Timer 3 to be either the signal generated by the Timer 1:2 side
or the Timer 3:4 side of Timer 3. The Timer signals are generated when the timer times-out.
For additional information on the Timer 3 module, see the TMS320DM335 DMSoC Timer/Watchdog Timer
User's Guide (literature number SPRUEY0).
Figure 1. RTO Controller Block Diagram
RTO Controller
Input event detect
Timer 3
(TINT12)
or
Timer 3
(TINT34)
Output generation
Mode
(Direct/toggle)
Output
mask
Overrun
detect
Output
pattern
RTO0
RTO1
RTO2
RTO3
Input
event
source
Overrun interrupt
1.3
Industry Standard(s) Compliance Statement
The RTO controller does not conform to any recognized industry standards.
8
Real Time Out (RTO) Controller
SPRUFY7 – July 2008
Submit Documentation Feedback
www.ti.com
2
Peripheral Architecture
2.1
Clock Control
Peripheral Architecture
The RTO controller is driven by the auxiliary clock of the PLL controller. The frequency of the auxiliary
clock is equal to the input reference clock of the PLL controller, and therefore is not affected by the
multiplier and divider values of the PLL controller.
For more information on device clocking, refer to the TMS320DM335 Digital Media System-on-Chip
(DMSoC) ARM Subsystem Reference Guide (SPRUFX7).
2.2
Signal Descriptions
The RTO controller generates signals on four separate pins: RTO[3:0]. See the device-specific data
manual for more information on these pins.
2.3
RTO Output Generation
As shown in Figure 1, the RTO controller takes input from the Timer 3 module and generates output
signals on the RTO pins: RTO[3:0]. Using the select input event source bit (SELECTBIT) in the control
and status register (CTRL_STATUS), you can select the input from Timer 3 to be either the signal
generated by the Timer 1:2 side or the Timer 3:4 side of Timer 3. The Timer signals are generated when
the timer times-out. Using the event condition detect bit (DETECTBIT) in the control and status register
(CTRL_STATUS), you can configure the RTO controller to detect the timer events. When these events are
detected the RTO controller will change the state of RTO[3:0] depending on the output mode bits
(OUTPUTMODE), the output mask bits (OPMASKDATA), and the output pattern bits
(OPPATTERNDATA).
The output mode bits (OUTPUTMODE), select the output mode of which there are two options: Direct Out
mode and Toggle mode. The output mask bits (OPMASKDATA) determine which RTO output pins
(RTO[3:0]) are masked. If a pin is masked, it’s state is not changed the next time an input event is
detected. The output pattern bits (OPPATTERNDATA) specify the next output pattern on RTO[3:0]. The
relationship between these bits and the output pattern on RTO[3:0] is shown in the state table and
diagram: Table 1 and Figure 2.
The RTO controller generates an interrupt when the output pattern bit field (OPPATTERNDATA) in the
control and status register (CTRL_STATUS) is not written prior to receiving the next input event (see
Figure 2). The status of this interrupt is reflected in the overrun condition bit (OVERRUN) in the control
and status register (CTRL_STATUS).
SPRUFY7 – July 2008
Submit Documentation Feedback
Real Time Out (RTO) Controller
9
Peripheral Architecture
www.ti.com
Table 1. RTO Outputs State Table
Mode
(OUTPUTMODE)
Mask Bits
(OPMASKDATA)
Data Pattern Bits
(OPPATTERNDATA)
Masked
x
No mask
No mask
Direct Out Mode
Masked
Toggle Mode
Previous Pin State
(RTO[3:0])
Next Pin State
(RTO[3:0])
0
0
1
1
No state change when
masked
0
x
0
Next state forced to 0
1
x
1
Next state forced to 1
0
0
1
1
No state change when
masked
0
0
Next state does not
toggle
1
1
Next state does not
toggle
0
1
Next state toggles
1
0
Next state toggles
x
No mask
Description
0
No mask
1
Figure 2. RTO Outputs State Diagram
Enable bit
(ENABLE)
ARM or DMA write
ARM or DMA write
Pattern bits
(OPPATTERNDATA)
A
Output signals
RTO[3:0]
B
C
A'
B'
Update
D
C'
Update
D'
Update
Update
Input event
(Timer 3)
Overrun
condition
detect
RTO interrupt
Interrupt triggered
2.4
2.4.1
Reset Considerations
Software Reset Considerations
A software reset (such as a reset generated by the emulator) causes the RTO controller registers to return
to their default state after reset.
2.4.2
Hardware Reset Considerations
A hardware reset of the processor causes the RTO controller registers to return to their default values
after reset.
10
Real Time Out (RTO) Controller
SPRUFY7 – July 2008
Submit Documentation Feedback
www.ti.com
2.5
EDMA Event Support
Initialization
To initialize the RTO controller, execute the following steps:
1. Select the input event source polarity (SOURCEPOLARITY): Not inverted or Inverted
2. Select the input event source (SELECTBIT): TINT12 or TINT34
3. Select the input event condition (DETECTBIT): Falling edge. It is recommended to set DETECTBIT to
2h.
4. Select the output mode (OUTPUTMODE): Direct Out Mode or Toggle Mode
5. Configure the output mask (OPMASKDATA)
6. Enable the RTO controller (ENABLE)
2.6
2.6.1
Interrupt Support
Interrupt Events and Requests
The RTO controller generates an interrupt when the output pattern bit field (OPPATTERNDATA) in the
control and status register (CTRL_STATUS) is not written prior to receiving an input event. The status of
this interrupt is reflected in the overrun condition bit (OVERRUN) in the control and status register
(CTRL_STATUS).
2.6.2
Interrupt Multiplexing
The RTO controller is supported by the ARM Interrupt Controller (AINTC) module. The register
ARM_INTMUX in the System Control Module must be used to select the interrupt source for multiplexed
interrupts. In particular, the RTO interrupt is multiplexed with other interrupts. For more information on the
System Control Module and ARM Interrupt Controller, see the, see the TMS320DM335 Digital Media
System-on-Chip (DMSoC) ARM Subsystem Reference Guide (SPRUFX7).
3
EDMA Event Support
The EDMA module has access to the registers of the RTO controller, therefore the EDMA may program
the RTO registers. Also, the RTO controller generates an EDMA synchronization event at the same time
that it generates an ARM interrupt. For EDMA synchronization events assignment, see the
TMS320DM335 Digital Media System-on-Chip (DMSoC) ARM Subsystem Reference Guide (SPRUFX7).
4
Power Management
The RTO controller can be placed in reduced-power modes to conserve power during periods of low
activity. The power management of the RTO controller is controlled by the processor Power and Sleep
Controller (PSC). The PSC acts as a master controller for power management for all of the peripherals on
the device. For detailed information on power management procedures using the PSC, see the
TMS320DM335 Digital Media System-on-Chip (DMSoC) ARM Subsystem Reference Guide (SPRUFX7).
5
Emulation Considerations
The RTO controller is not affected by emulation halt events (such as breakpoints). The interface will
continue to operate, even if an emulation halt event occurs.
SPRUFY7 – July 2008
Submit Documentation Feedback
Real Time Out (RTO) Controller
11
Registers
6
www.ti.com
Registers
The RTO controller registers are listed in and described throughout this section.
6.1
RTO Controller Revision ID Register (REVID)
The RTO controller Revision ID register is shown in Figure 3 and described in Table 2.
Figure 3. RTO Controller Revision ID Register (REVID)
31
30
29
28
27
16
SCHEME
RESERVED
FUNC
R-1
R-0
R - 0x4D0
15
11
10
8
7
6
5
0
RTL
MAJOR
CUSTOM
MINOR
R-0
R-1
R-0
R-1
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 2. RTO Controller Revision ID Register (REVID) Field Descriptions
Bit
Field
Value
Description
31-30
SCHEME
0-3h
29-28
Reserved
0
27-16
FUNC
15-11
RTL
0-1Fh
RTL revision
10-8
MAJOR
0-7h
Major number
7-6
CUSTOM
0-3h
Custom
5-0
MINOR
12
Scheme value
Reserved
0-FFFh Function
0--3Fh
Real Time Out (RTO) Controller
Minor Number
SPRUFY7 – July 2008
Submit Documentation Feedback
Registers
www.ti.com
6.2
RTO Controller Control and Status Register (CTRL_STATUS)
The RTO controller Control and Status Register (CTRL_STATUS) is shown in Figure 4 and described in
Table 3.
Figure 4. RTO Controller Control and Status Register (CTRL_STATUS)
31
22
21
18
17
16
RESERVED
OUTSTATE
SOURCEPOLARITY
OVER
RUN
R-0
R-0
R/W - 0
R/W 0
15
12
11
8
7
6
5
4
1
0
OPMASKDATA
OPPATTERNDATA
OUTPUTMODE
DETECTBIT
SELECTBIT
ENABLE
R/W - 0
R/W - 0
R/W - 0
R/W - 0
R/W - 0
R/W - 0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 3. RTO Controller Control and Status Register (CTRL_STATUS) Field Descriptions
Bit
Field
31 - 22
RESERVED
0
21 - 18
OUTSTATE
0-Fh
17
SOURCEPOLARITY
16
15 - 12
11 - 8
7
6-5
4-1
Value
Output signal status. Reflects the actual state of the output pins. The bits in this field [3:0] may
to RTO outputs [3:0].
Event source bit. Shows the source of the event.
Event source signal is active high
1
Event source signal is active low
OVERRUN
Overrun condition bit. Shows the status of overrun condition.
0
Overrun condition has not occurred. This bit is cleared by writing 0
1
Overrun condition has occurred. Writing 1 to this bit has no effect.
OPMASKDATA
Output mask. The bits in this field [3:0] map to RTO outputs [3:0].
0
Do not change state of output pin.
1
Change state of output pin depending on output pattern and output mode.
OPPATTERNDATA
Output pattern. The bits in this field [3:0] map to RTO outputs [3:0].
0
State of '0' on output pin in Direct Out mode. No state change on output pin in Toggle mode.
Use bit OUTPUTMODE to select Direct Out mode or Toggle mode.
1
State of '1' on output pin in Direct Out mode. State is toggled on output pin in Toggle mode.
Use bit OUTPUTMODE to select Direct Out mode or Toggle mode.
OUTPUTMODE
Output Mode.
0
Select Direct Out mode
1
Select Toggle mode
DETECTBIT
Input event condition detect. Select the condition on which the input event will trigger RTO
output.
00
Detect no events
01
Detect rising edge
10
Detect falling edge
11
Detect both rising and falling edge
SELECTBIT
Select input event source:
0000
Select Timer 1:2 side of Timer 3 to be the input event
0001
Select Timer 3:4 side of Timer 3 to be the input event
ENABLE
SPRUFY7 – July 2008
Submit Documentation Feedback
Reserved
0
Others
0
Description
Reserved
RTO Enable
0
Disable RTO
1
Enable RTO
Real Time Out (RTO) Controller
13
Registers
14
Real Time Out (RTO) Controller
www.ti.com
SPRUFY7 – July 2008
Submit Documentation Feedback
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Clocks and Timers
Interface
Logic
Power Mgmt
Microcontrollers
RFID
RF/IF and ZigBee® Solutions
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2008, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Related manuals

Download PDF

advertising