Texas Instruments | LM73-Q1 2.7-V, SOT-23, 11- to 14-Bit Digital Temperature Sensor With 2-Wire Interface | Datasheet | Texas Instruments LM73-Q1 2.7-V, SOT-23, 11- to 14-Bit Digital Temperature Sensor With 2-Wire Interface Datasheet

Texas Instruments LM73-Q1 2.7-V, SOT-23, 11- to 14-Bit Digital Temperature Sensor With 2-Wire Interface Datasheet
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LM73-Q1
SNIS194 – DECEMBER 2016
LM73-Q1 2.7-V, SOT-23, 11- to 14-Bit Digital Temperature Sensor With 2-Wire Interface
1 Features
3 Description
•
•
The LM73-Q1 is a digital output temperature sensor
featuring an integrated incremental Delta-Sigma
ADC. The LM73-Q1 communicates with a two-wire
interface that is compatible with SMBus and I2C
interfaces, and the host can query the LM73-Q1 at
any time to read temperature.
1
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results
– LM73-Q1 Temperature grade 1: –40°C to
125°C
– LM73-Q1 HBM ESD Classification Level 2
– LM73-Q1 CDM ESD Classification Level C6
Single Address Pin Offers Choice of Three
Selectable Addresses Per Version for a Total of
Six Possible Addresses.
SMBus and I2C-compatible Two-Wire Interface
Supports 400-kHz Operation
Shutdown Mode With One-shot Feature Available
for Very Low Average Power Consumption
Programmable Digital Temperature Resolution
From 11 Bits to 14 Bits
Fast Conversion Rate Ideal for Quick Power Up
and Measuring Rapidly Changing Temperature
Open-Drain ALERT Output Pin Goes Active When
Temperature is Above a Programmed
Temperature Limit
Very Stable, Low-noise Digital Output
UL Recognized Component
Temperature Accuracy: ±1.45°C (Maximum)
Temperature Range: –40°C to 125°C
Conversion Time
– 11-Bit (0.25°C): 14 ms (Maximum)
– 14-Bit (0.03125°C): 112 ms (Maximum)
Operating Supply Current: 320 µA (Typical)
Shutdown Supply Current: 1.9 µA (Typical)
Resolution: 0.25°C to 0.03125°C
2 Applications
•
•
•
•
•
•
•
Automotive Climate Control
Advanced Driver Assistance Systems (ADAS)
Airflow Sensor
Infotainment Processor Management
Instrument Cluster Control
UREA Sensors
HID Lamps
The LM73-Q1 operates over a wide temperature
range (–40°C to 125°C) and provides ±1.45°C
accuracy from –10°C to 80°C. The LM73-Q1 includes
four selectable resolution options that allow the
temperature conversion time and sensitivity to be
adjusted for optimal performance. The LM73-Q1
defaults to 11-bit mode (0.25°C/LSB), and will
measure temperature in a maximum time of 14 ms,
making it ideal for applications that require
temperature data very soon after power-up. In its 14bit maximum resolution mode (0.03125°C/LSB), the
LM73-Q1 is optimized to sense very small changes in
temperature.
A single multi-level address line selects one of three
unique device addresses. An open-drain ALERT
output goes active when the temperature exceeds a
programmable limit. Both the data and clock lines are
filtered for excellent noise tolerance and reliable
communication. Additionally, the LM73-Q1 has a
time-out feature that will automatically reset the clock
and data lines, if these lines are held low for an
extended period of time. This prevents a bus lock-up
condition
without
requiring
host
processor
intervention.
Device Information(1)
PART NUMBER
LM73-Q1
PACKAG
E
BODY SIZE (NOM)
SOT (6)
2.90 mm × 1.60 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Simplified Schematic
VDD = 2.7V to 5.5V
Typical bypass 0.1 PF
3
Address (set as desired for one
of three addresses)
To / from processor
2-wire interface
ADDR
SMBDAT
SMBCLK
1
6
LM73
5
ALERT
To hardware
shutdown
4
2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM73-Q1
SNIS194 – DECEMBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Temperature-to-Digital Converter Characteristics.....
Logic Electrical Characteristics- Digital DC
Characteristics ...........................................................
6.7 SMBus Digital Switching Characteristics ..................
6.8 Typical Characteristics ..............................................
7
7.4 Device Functional Modes........................................ 15
7.5 Register Map........................................................... 16
8
Application and Implementation ........................ 20
8.1 Application Information............................................ 20
8.2 Typical Application ................................................. 20
9 Power Supply Recommendations...................... 22
10 Layout................................................................... 22
10.1 Layout Guidelines ................................................. 22
10.2 Layout Example .................................................... 22
11 Device and Documentation Support ................. 23
11.1
11.2
11.3
11.4
11.5
11.6
6
7
8
Detailed Description .............................................. 9
Related Documentation .......................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
23
23
23
23
23
23
12 Mechanical, Packaging, and Orderable
Information ........................................................... 23
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
4 Revision History
2
DATE
REVISION
NOTES
December 2016
*
Initial release.
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5 Pin Configuration and Functions
DDC Package
6-Pin (SOT-23)
Top View
ADDR
1
GND
2
VDD
3
LM73
6
SMBDAT
5
ALERT
4
SMBCLK
Pin Functions
PIN
NO.
1
NAME
ADDR
TYPE
CMOS
Logic
Input
(three
levels)
EQUIVALENT CIRCUIT
FUNCTION
VDD
PIN
Snap
Back
2.5k
D1
D2
Address Select Input: One of three device addresses is selected by
connecting to ground, left floating, or connecting to VDD.
D3
GND
2
GND
Ground
Ground
3
VDD
Power
Supply Voltage
SMBCLK
CMOS
Logic
Input
PIN
4
D1
Snap
Back
Serial Clock: SMBus clock signal. Operates up to 400 kHz. Low-pass
filtered.
GND
VDD
5
ALERT
OpenDrain
Output
PIN
Snap
Back
125
D1
D2
Digital output which goes active whenever the measured temperature
exceeds a programmable temperature limit.
D3
GND
PIN
6
SMBDAT
OpenDrain
Input/Outp
ut
Snap
Back
D1
Serial Data: SMBus bi-directional data signal used to transfer serial
data synchronous to the SMBCLK. Low-pass filtered.
GND
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN
NOM
−0.3
Supply Voltage
MAX
UNIT
V to 6
V
6
V
−0.3 V to V
Voltage at SMBCLK and SMBDAT pins
−0.3
Voltage at All Other Pins
(VDD + 0.5)
6
V
±5
mA
150
°C
Input Current at Any Pin (3)
−65
Storage Temperature, Tstg
(1)
(2)
(3)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Soldering process must comply with Texas Instruments' Reflow Temperature Profile specifications. Refer to www.ti.com/packaging..
Reflow temperature profiles are different for lead-free and non-lead-free packages.
When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5
mA.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002
(1)
±2000
Charged-device model (CDM), per AEC Q100-011
±1000
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
LM73-Q1
–40
125
°C
Supply Voltage Range (VDD)
2.7
5.5
V
6.4 Thermal Information
LM73-Q1
THERMAL METRIC
(1)
DDC (SOT)
UNIT
6 PINS
RθJA
Junction-to-ambient thermal resistance
117
RθJC(top)
Junction-to-case (top) thermal resistance
55
RθJA
Junction-to-board thermal resistance
25
ψJT
Junction-to-top characterization parameter
1
ψJB
Junction-to-board characterization parameter
21
(1)
4
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SNIS194 – DECEMBER 2016
6.5 Temperature-to-Digital Converter Characteristics
Unless otherwise noted, these specifications apply for VDD = 2.7 V to 5.5 V. All limits TA = TJ = 25°C, unless otherwise noted.
TA is the ambient temperature. TJ is the junction temperature.
PARAMETER
TEST CONDITIONS
VDD = 3.3V
MAX
UNIT
TA = −40°C to -25°C
–1.85
1.85
°C
TA = −25°C to –10°C
–1.65
1.65
°C
TA = −10°C to 80°C
–1.45
1.45
°C
TA = 80°C to 115°C
–1.65
1.65
°C
-1.8
1.8
°C
TA = 115°C to 125°C
Accuracy
VDD = 2.7V
to
VDD = 4.5V
(1)
VDD > 4.5V
to
VDD = 5.5V
MIN
TA = −40°C to -25°C
-2.1
2.1
°C
TA = −25°C to –10°C
–1.75
1.75
°C
TA = −10°C to 80°C
-1.65
1.65
°C
TA = 80°C to 115°C
-1.8
1.8
°C
TA = 115°C to 125°C
-2
2
°C
TA = −40°C to -25°C
-2.4
2.4
°C
TA = −25°C to -10°C
-2.2
2.2
°C
TA = −10°C to 80°C
–1.9
1.9
°C
TA = 80°C to 115°C
-1.8
1.8
°C
-2
2
°C
TA = 115°C to 125°C
11
RES1 Bit = 0, RES0 Bit = 0
Continuous Conversion Mode,
SMBus inactive
Quiescent Current
Shutdown, bus-idle timers on
Shutdown, bus-idle timers off
Power-On Reset
Threshold
(1)
(2)
Bits
0.0625
°C/LSB
14
Bits
0.03125
°C/LSB
10.1
TA = TJ =TMIN to TMAX
14
20.2
TA = TJ =TMIN to TMAX
28
(2)
RES1 Bit = 1, RES0 Bit = 1
°C/LSB
13
RES1 Bit = 1, RES0 Bit = 1
RES1 Bit = 1, RES0 Bit = 0
Bits
0.125
RES1 Bit = 1, RES0 Bit = 0
RES1 Bit = 0, RES0 Bit = 1
°C/LSB
12
Resolution
RES1 Bit = 0, RES0 Bit = 0
Bits
0.25
RES1 Bit = 0, RES0 Bit = 1
Temperature
Conversion Time
TYP
40.4
TA = TJ =TMIN to TMAX
56
80.8
TA = TJ =TMIN to TMAX
112
320
TA = TJ =TMIN to TMAX
495
120
TA = TJ =TMIN to TMAX
175
1.9
TA = TJ =TMIN to TMAX
Measured on VDD input, falling edge TA = TJ =TMIN to TMAX
8
0.9
ms
ms
ms
ms
µA
µA
µA
V
Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the
internal power dissipation of the LM73-Q1 and the thermal resistance.
This specification is provided only to indicate how often temperature data is updated. The LM73-Q1 can be read at any time without
regard to conversion state (and will yield last conversion result).
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6.6 Logic Electrical Characteristics- Digital DC Characteristics
Unless otherwise noted, these specifications apply for VDD = 2.7 V to 5.5 V. All limits TA = TJ = 25°C, unless otherwise noted.
TA is the ambient temperature. TJ is the junction temperature.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SMBDAT, SMBCLK INPUTS
VIH
Logical 1 Input
Voltage
TA = TJ =TMIN to TMAX
VIL
Logical 0 Input
Voltage
TA = TJ =TMIN to TMAX
0.7 × VDD
V
0.3 × VDD
SMBDAT and
VIN;HYST SMBCLK Digital
Input Hysteresis
0.07 × VDD
IIH
Logical 1 Input
Current
VIN = VDD
IIL
Logical 0 Input
Current
VIN = 0 V
CIN
Input Capacitance
V
0.01
TA = TJ =TMIN to TMAX
2
–0.01
TA = TJ =TMIN to TMAX
V
–2
5
µA
µA
pF
SMBDAT, ALERT OUTPUTS
IOH
High Level Output
VOH = VDD
Current
VOL
SMBus Low Level
IOL = 3 mA
Output Voltage
0.01
TA = TJ =TMIN to TMAX
2
TA = TJ =TMIN to TMAX
0.4
µA
V
ADDRESS INPUT
VIH;ADD
Address Pin High
Input Voltage
TA = TJ =TMIN to TMAX
VIL;ADDR Address Pin Low
Input Voltage
ESS
TA = TJ =TMIN to TMAX
RESS
IIH;
ADDRESS
IIL;ADDR
ESS
6
Address Pin High
Input Current
VIN = VDD
Address Pin Low
Input Current
VIN = 0 V
VDD – 0.100
V
0.100
0.01
TA = TJ =TMIN to TMAX
2
–0.01
TA = TJ =TMIN to TMAX
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–2
V
µA
µA
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6.7 SMBus Digital Switching Characteristics
Unless otherwise noted, these specifications apply for VDD = 2.7 V to 5.5 V, CL (load capacitance) on output lines = 400 pF.
All limits TA = TJ = 25°C, unless otherwise noted. See Figure 1.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
400
kHz
fSMB
SMBus Clock Frequency
No minimum clock
frequency if TimeOut feature is
disabled.
tLOW
SMBus Clock Low Time
TA = TJ =TMIN to TMAX
300
ns
tHIGH
SMBus Clock High Time
TA = TJ =TMIN to TMAX
300
ns
tF;SMB
Output Fall Time
CL = 400 pF
IPULL-UP ≤ 3 mA
(1)
O
TA = TJ =TMIN to TMAX
TA = TJ =TMIN to TMAX
250
ns
45
ms
SMBDAT and SMBCLK Time
Low for Reset of Serial Interface
TA = TJ =TMIN to TMAX
15
Data In Setup Time to SMBCLK
High
TA = TJ =TMIN to TMAX
100
ns
tHD;DA Data Hold Time: Data In Stable
after SMBCLK Low
TI
TA = TJ =TMIN to TMAX
0
ns
tHD;DA Data Hold Time: Data Out Stable
after SMBCLK Low
TO
TA = TJ =TMIN to TMAX
30
ns
tTIMEO
UT
tSU;DAT
(2)
tHD;STA
Start Condition SMBDAT Low to
SMBCLK Low (Start condition
hold before the first clock falling
edge)
TA = TJ =TMIN to TMAX
60
ns
tSU;ST
Stop Condition SMBCLK High to
SMBDAT Low (Stop Condition
Setup)
TA = TJ =TMIN to TMAX
50
ns
SMBus Repeated Start-Condition
tSU;STA Setup Time, SMBCLK High to
SMBDAT Low
TA = TJ =TMIN to TMAX
50
ns
SMBus Free Time Between Stop
and Start Conditions
TA = TJ =TMIN to TMAX
1.2
µs
O
tBUF
tPOR
(1)
(2)
(3)
Power-On Reset Time
(3)
TA = TJ =TMIN to TMAX
1
ms
The output fall time is measured from (VIH;MIN + 0.15V) to (VIL;MAX - 0.15V).
Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM73-Q1's SMBus state machine,
setting SMBDAT and SMBCLK pins to a high impedance state.
Represents the time from VDD reaching the power-on-reset level to the LM73-Q1 communications being functional. After an additional
time equal to one temperature conversion time, valid temperature is available in the Temperature Data Register .
tLOW
tR
tF
VIH
SMBCLK
VIL
tHD;STA
tHD;DAT
tBUF
SMBDAT
VIH
VI
tHIGH
tSU;STA
tSU;DAT
tSU;STO
P
L
S
S
P
Figure 1. SMBus Communication
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6.8 Typical Characteristics
Figure 2. Operating Current vs. Temperature
Figure 3. Shutdown Current vs.Temperature
Figure 4. Typical Output Noise
8
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7 Detailed Description
7.1 Overview
The LM73-Q1 is a digital temperature sensor that senses the temperature of its die using a sigma-delta analogto-digital converter and stores the temperature in the Temperature Register. The LM73-Q1's 2-wire serial
interface is compatible with SMBus 2.0 and I2C. Please see the SMBus 2.0 specification for a detailed
description of the differences between the I2C bus and SMBus.
The temperature resolution is programmable, allowing the host system to select the optimal configuration
between sensitivity and conversion time. The LM73-Q1 can be placed in shutdown to minimize power
consumption when temperature data is not required. While in shutdown, a 1-shot conversion mode allows
system control of the conversion rate for ultimate flexibility.
7.2 Functional Block Diagram
2.7V to 5.5V
VDD
Temperature
Sensor
Circuitry
11-Bit to 14-Bit
Delta-Sigma
A/D Converter
LM73
Manufacturer's
ID Register
Control/Status
Register
Configuration
Register
Pointer
Register
and
Decode Logic
Temperature
Register
THIGH Register
Set-Point
Comparator
ALERT
TLOW Register
ADDR
Two-Wire
Serial Interface
SMBDAT
SMBCLK
GND
7.3 Feature Description
The LM73-Q1 features the following registers. See LM73-Q1 Registers for a complete list of the pointer address,
content, and reset state of each register.
• Pointer Register
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Feature Description (continued)
•
•
•
•
•
•
Temperature Register
Configuration Register
THIGH Register
TLOW Register
Control/Status Register
Identification Register
7.3.1 Power-On Reset
The power-on reset (POR) state is the point at which the supply voltage rises above the power-on reset
threshold (specified in the Electrical Characteristics), generating an internal reset. Each of the registers contains
a defined value upon POR and this data remains there until any of the following occurs:
• The first temperature conversion is completed, causing the Temperature Register and various status bits to
be updated internally, depending on the value of the measured temperature.
• The master writes different data to any Read/Write (R/W) bits, or
• The LM73-Q1 is powered down.
7.3.2 One-Shot Conversion
The LM73-Q1 features a one-shot conversion bit, which is used to initiate a single conversion and comparison
cycle when the LM73-Q1 is in shutdown mode. While the LM73-Q1 is in shutdown mode, writing a 1 to the OneShot bit in the Configuration Register will cause the LM73-Q1 to perform a single temperature conversion and
update the Temperature Register and the affected status bits. Operating the LM73-Q1 in this one-shot mode
allows for extremely low average-power consumption, making it ideal for low-power applications.
When the One-Shot bit is set, the LM73-Q1 initiates a temperature conversion. After this initiation, but before the
completion of the conversion and resultant register updates, the LM73-Q1 is in a "one-shot" state. During this
state, the Data Available (DAV) flag in the Control/Status register is 0 and the Temperature Register contains the
value 8000h (-256°C). All other registers contain the data that was present before initiating the one-shot
conversion. After the temperature measurement is complete, the DAV flag will be set to 1 and the temperature
register will contain the resultant measured temperature.
7.3.3 Temperature Data Format
The resolution of the temperature data and the size of the data word are user-selectable through bits RES1 and
RES0 in the Control/Status Register. By default, the LM73-Q1 temperature stores the measured temperature in
an 11-bit (10 bits plus sign) word with one least significant bit (LSB) equal to 0.25°C. The maximum word size is
14 bits (13-bits plus sign) with a resolution of 0.03125 °C/LSB.
CONTROL BIT
DATA FORMAT
RES1
RES0
WORD SIZE
0
0
11 bits
RESOLUTION
0.25 °C/LSB
0
1
12 bits
0.125 °C/LSB
1
0
13 bits
0.0625 °C/LSB
1
1
14 bits
0.03125 °C/LSB
The temperature data is reported in 2's complement format. The word is stored in the 16-bit Temperature
Register and is left justified in this register. Unused temperature-data bits are always reported as 0.
Table 1. 11-Bit (10-Bit Plus Sign)
TEMPERATURE
10
DIGITAL OUTPUT
BINARY
HEX
150°C
0100 1011 0000 0000
4B00h
25°C
0000 1100 1000 0000
0C80h
1°C
0000 0000 1000 0000
0080h
0.25°C
0000 0000 0010 0000
0020h
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Table 1. 11-Bit (10-Bit Plus Sign) (continued)
TEMPERATURE
DIGITAL OUTPUT
BINARY
HEX
0°C
0000 0000 0000 0000
0000h
−0.25°C
1111 1111 1110 0000
FFE0h
−1°C
1111 1111 1000 0000
FF80h
−25°C
1111 0011 1000 0000
F380h
−40°C
1110 1100 0000 0000
EC00h
Table 2. 12-Bit (11-Bit Plus Sign)
TEMPERATURE
DIGITAL OUTPUT
BINARY
HEX
150°C
0100 1011 0000 0000
4B00h
25°C
0000 1100 1000 0000
0C80h
1°C
0000 0000 1000 0000
0080h
0.125°C
0000 0000 0001 0000
0010h
0°C
0000 0000 0000 0000
0000h
−0.125°C
1111 1111 1111 0000
FFF0h
FF80h
−1°C
1111 1111 1000 0000
−25°C
1111 0011 1000 0000
F380h
−40°C
1110 1100 0000 0000
EC00h
Table 3. 13-Bit (12-Bit Plus Sign)
TEMPERATURE
DIGITAL OUTPUT
BINARY
HEX
150°C
0100 1011 0000 0000
4B00h
25°C
0000 1100 1000 0000
0C80h
1°C
0000 0000 1000 0000
0080h
0.0625°C
0000 0000 0000 1000
0008h
0°C
0000 0000 0000 0000
0000h
−0.0625°C
1111 1111 1111 1000
FFF8h
−1°C
1111 1111 1000 0000
FF80h
−25°C
1111 0011 1000 0000
F380h
−40°C
1110 1100 0000 0000
EC00h
Table 4. 14-Bit (13-Bit Plus Sign)
TEMPERATURE
DIGITAL OUTPUT
BINARY
HEX
150°C
0100 1011 0000 0000
4B00h
25°C
0000 1100 1000 0000
0C80h
1°C
0000 0000 1000 0000
0080h
0.03125°C
0000 0000 0000 0100
0004h
0°C
0000 0000 0000 0000
0000h
−0.03125°C
1111 1111 1111 1100
FFFCh
−1°C
1111 1111 1000 0000
FF80h
−25°C
1111 0011 1000 0000
F380h
−40°C
1110 1100 0000 0000
EC00h
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7.3.4 SMBus Interface
The LM73-Q1 operates as a slave on the SMBus. The SMBDAT line is bidirectional. The SMBCLK line is an
input only. The LM73-Q1 never drives the SMBCLK line and it does not support clock stretching.
The LM73-Q1 uses a 7-bit slave address. It is available in two versions. Each version can be configured for one
of three unique slave addresses, for a total of six unique address.
PART
NUMBER
ADDRESS
PIN
DEVICE
ADDRESS
LM73C0Q1
Float
Ground
VDD
1001 000
1001 001
1001 010
LM73C1Q1
Float
Ground
VDD
1001 100
1001 101
1001 110
The SMBDAT output is an open-drain output and does not have internal pull-ups. A “high” level will not be
observed on this pin until pull-up current is provided by some external source, typically a pull-up resistor. Choice
of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as
possible without effecting the SMBus desired data rate. This will minimize any internal temperature reading
errors due to internal heating of the LM73-Q1.
The LM73-Q1 features an integrated low-pass filter on both the SMBCLK and the SMBDAT line. These filters
increase communications reliability in noisy environments.
If either the SMBCLK or SMBDAT line is held low for a time greater than tTIMEOUT (see Logic Electrical
Characteristics for the value of tTIMEOUT), the LM73-Q1 state machine will reset to the SMBus idle state, releasing
the data line. Once the SMBDAT is released high, the master may initiate an SMBus start.
7.3.5 ALERT Function
The ALERT output is an over-temperature indicator. At the end of every temperature conversion, the measured
temperature is compared to the value in the THIGH Register. If the measured temperature exceeds the value
stored in THIGH, the ALERT output goes active (see Figure 5). This over-temperature condition will also cause the
ALRT_STAT bit in the Control/Status Register to change value (this bit mirrors the logic level of the ALERT pin).
The ALERT pin and the ALRT_STAT bit are cleared when any of the following occur:
• The measured temperature falls below the value stored in the TLOW Register
• A 1 is written to the ALERT Reset bit in the Configuration Register
• The master resets it through an SMBus Alert Response Address (ARA) procedure
If ALERT has been cleared by the master writing a 1 to the ALERT Reset bit, while the measured temperature
still exceeds the THIGH setpoint, ALERT will go active again after the completion of the next temperature
conversion.
Each temperature reading is associated with a Temperature High (THI) and a Temperature Low (TLOW) flag in
the Control/Status Register. A digital comparison determines whether that reading is above the THIGH setpoint or
below the TLOW setpoint. If so, the corresponding flag is set. All digital comparisons to the THIGH, and TLOW values
are based on an 11-bit temperature comparison. Regardless of the resolution setting of the LM73-Q1, the lower
three temperature LSBs will not affect the state of the ALERT output, THI flag, and TLOW flag.
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Measured Temperature
TEMPERATURE
THIGH Limit
TLOW Limit
ALERT pin
TIME
Figure 5. ALERT Temperature Response Cleared When Temperature Crosses TLOW
ALERT 5HVHW %LW VHW WR ³1´
Measured Temperature
TEMPERATURE
THIGH Limit
TLOW Limit
ALERT
(Active Low)
One
Conversion Time
TIME
Figure 6. ALERT Temperature Response Cleared by Writing a 1 to the ALERT Reset Bit.
7.3.6 Communicating With the LM73-Q1
The data registers in the LM73-Q1 are selected by the Pointer Register. At power-up the Pointer Register is set
to 00h, the location for the Temperature Register. The Pointer Register latches the last location it was set to.
Note that all Pointer Register bits are decoded; any incorrect pointer values will not be acknowledged and will not
be stored in the Pointer Register.
NOTE
A write to an invalid pointer address is not allowed. If the master writes an invalid address
to the Pointer Register, the LM73-Q1 will not acknowledge the address and the Pointer
Register will continue to contain the last value stored in it.
A Write to the LM73-Q1 will always include the address byte and the pointer byte.
A Read from the LM73-Q1 can occur in either of the following ways:
• If the location latched in the Pointer Register is correct (that is, the Pointer Register is pre-set prior to the
read), then the read can simply consist of an address byte, followed by retrieving the data byte. Most of the
time it is expected that the Pointer Register will point to Temperature Registers because that will be the data
most frequently read from the LM73-Q1.
• If the Pointer Register needs to be set, then an address byte, pointer byte, repeat start, and another address
byte will accomplish a read.
The data byte is read out of the LM73-Q1 by the most significant bit first. At the end of a read, the LM73-Q1 can
accept either an Acknowledge or No Acknowledge bit from the Master. No Acknowledge is typically used as a
signal to the slave that the Master has read its last byte.
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7.3.6.1 Reading from the LM73-Q1
1
9
1
9
1
9
SMBCLK
SMBDAT
1
0
0
1
A2
A1
A0
D15 D14 D13 D12 D11 D10
R/W
D9
D8
Ack
by
LM73
Start by
Master
D7
D6
D5
D4
D3
D2
D1
D0
Ack
by
Master
Frame 1
Serial Bus Address Byte
NoAck Stop
by
by
Master Master
Frame 2
Data Byte from LM73
Frame 3
Data Byte from LM73
Figure 7. Typical Read from a 2-Byte Register with Preset Pointer
1
9
1
9
SMBCLK
SMBDAT
1
0
0
1
A2
A1
A0
0
R/W
0
0
0
SMBDAT
(continued)
P2
P1
P0
Ack
by
LM73
Frame 1
Serial Bus Address Byte
Frame 2
Pointer Byte
1
SMBCLK
(continued)
0
Ack
by
LM73
Start by
Master
1
9
0
0
1
A2
A1
A0
9
D15 D14 D13 D12 D11 D10
R/W
Repeat
Start by
Master
1
D9
1
D8
Ack
by
LM73
D7
9
D6
D5
D4
D3
D2
D1
Ack
by
Master
Frame 3
Serial Bus Address Byte
D0
NoAck Stop
by
by
Master Master
Frame 4
Data Byte from LM73
Frame 5
Data Byte from LM73
Figure 8. Typical Pointer Set Followed by Immediate Read of a 2-Byte Register
1
9
1
9
SMBCLK
SMBDAT
1
0
0
1
A2
A1
A0 R/W
Start by
Master
Frame 1
Serial Bus Address Byte
D7
D6
D5
Ack
by
LM73
D4
D3
D2
D1
Frame 2
Data Byte from LM73
D0
NoAck Stop
by
by
Master Master
Figure 9. Typical Read from a 1-Byte Register with Preset Pointer
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1
9
1
9
SMBCLK
SMBDAT
1
0
0
1
A2
A1
A0
0
R/W
0
0
0
0
P2
P1
P0
Ack
by
LM73
Start by
Master
Ack
by
LM73
Frame 1
Serial Bus Address Byte
Frame 2
Pointer Byte
1
9
1
9
SMBCLK
(continued)
SMBDAT
(continued)
1
0
0
1
A2
A1
A0
D7
R/W
D6
D5
D4
D3
D2
D1
D0
NoAck Stop
by
by
Master Master
Ack
by
LM73
Repeat
Start by
Master
Frame 3
Serial Bus Address Byte
Frame 4
Data Byte from LM73
Figure 10. Typical Pointer Set Followed by Immediate Read of a 1-Byte Register
7.3.6.2 Writing to the LM73-Q1
1
9
1
1
9
9
SMBCLK
SMBDAT
1
0
0
1
A2
A1
A0
0
R/W
Start by
Master
0
0
0
0
P2
P1
D7
P0
Ack
by
LM73
D6
D5
D4
D3
D2
Ack
by
LM73
Frame 1
Serial Bus Address Byte
D1
D0
Ack
Stop
by
by
LM73 Master
Frame 2
Pointer Byte
Frame 3
Data Byte to LM73
Figure 11. Typical 1-Byte Write
1
9
1
9
SMBCLK
SMBDAT
1
0
0
1
A2
A1
A0
0
R/W
0
0
0
0
P2
P1
P0
Ack
by
LM73
Start by
Master
Ack
by
LM73
Frame 1
Serial Bus Address Byte
Frame 2
Pointer Byte
1
9
1
9
SMBCLK
(continued)
SMBDAT
(continued)
D15 D14 D13 D12 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
Ack
by
LM73
Frame 3
Data Byte to LM73
D1
D0
Ack
Stop
by
by
LM73 Master
Frame 4
Data Byte to LM73
Figure 12. Typical 2-Byte Write
7.4 Device Functional Modes
7.4.1 Shutdown Mode
Shutdown Mode is enabled by writing a “1” to the Full Power Down Bit, Bit 7 of the Configuration Register, and
holding it high for at least the specified maximum conversion time at the existing temperature resolution setting.
(see Temperature Conversion Time specifications under the Temperature-to-Digital Converter Characteristics).
For example, if the LM73-Q1 is set for 12-bit resolution before shutdown, then Bit 7 of the Configuration register
must go high and stay high for the specified maximum conversion time for 12-bits resolution.
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Device Functional Modes (continued)
The LM73-Q1 will always finish a temperature conversion and update the temperature registers before shutting
down.
Writing a “0” to the Full Power Down Bit restores the LM73-Q1 to normal mode. The user should wait at least the
specified maximum conversion time, at the existing resolution setting, before accurate data appears in the
temperature register.
7.5 Register Map
7.5.1 LM73-Q1 Registers
The LM73-Q1's internal registers are selected by the Pointer register. The Pointer register latches the last
location that it was set to. The pointer register and all internal registers are described below. All registers reset at
device power up.
7.5.1.1 Pointer Register
The diagram below shows the Pointer Register, the six internal registers to which it points, and their associated
pointer addresses.
SMBDAT
Interface
SMBCLK
Address
Data
Pointer Register
(selects register
for communication)
Temperature
(Read-Only)
Pointer = 00000000
Configuration
(Read-Write)
Pointer = 00000001
THIGH
(Read-Write)
Pointer = 00000010
TLOW
(Read-Write)
Pointer = 00000011
Control/Status
(Read-Write)
Pointer = 00000100
Identification
(Read-Only)
Pointer = 00000111
16
P7
P6
P5
P4
P3
0
0
0
0
0
P2
P1
P0
Register Select
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Bits
Name
Description
7:3
Not Used
Must write zeros only.
2:0
Register Select
Pointer address. Points to desired register.
See table below.
(1)
P2
P1
P0
REGISTER (1)
0
0
0
Temperature
0
0
1
Configuration
0
1
0
THIGH
0
1
1
TLOW
1
0
0
Control / Status
1
1
1
Identification
A write to an invalid pointer address is not allowed. If the master
writes an invalid address to the Pointer Register,
(a) the LM73-Q1 will not acknowledge the address and
(b) the Pointer Register will continue to contain the last value stored
in it.
7.5.1.2 Temperature Data Register
Pointer Address 00h (Read Only)
Reset State: 7FFCh (+255.96875°C)
One-Shot State: 8000h (-256°C)
D15
D14
D13
D12
D11
D10
D9
D8
SIGN
128°C
64°C
32°C
16°C
8°C
4°C
2°C
D7
D6
D5
D4
D3
D2
D1
D0
1°C
0.5°C
0.25°C
0.125°C
0.0625°C
0.03125°C
reserved
reserved
Bits
Name
Description
15:2
Temperature Data
Represents the temperature that was measured by the most recent temperature conversion. On
Power-up, this data is invalid until the Data Available (DAV) bit in the Control/Status register is high
(after the completion of the first temperature conversion). The resolution is user-programable from 11bit resolution (0.25°C/LSB) through 14-bit resolution (0.03125°C/LSB). The desired resolution is
programmed with bits 5 and 6 of the Control/Status register.
1:0
Not Used
Return zeros upon read.
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7.5.1.3 Configuration Register
Pointer Address 01h (R/W)
Reset State: 40h
D7
D6
D5
D4
D3
D2
PD
reserved
ALRT EN
ALRT POL
ALRT RST
ONE SHOT
D1
D0
reserved
Bits
Name
Description
7
Full Power Down
Writing a 1 to this bit and holding it high for at least the specified maximum conversion time, at the existing
temperature resolution setting, puts the LM73-Q1 in shutdown mode for power conservation.
Writing a 0 to this bit restores the LM73-Q1 to normal mode. Waiting one specified maximum conversion
time for the existing resolution setting assures accurate data in the temperature register.
6
reserved
User must write only a 1 to this bit
5
ALERT Enable
A 0 in this location enables the ALERT output. A 1 disables it. This bit also controls the ALERT Status bit
(the Control/Status Register, Bit 3) since that bit reflects the state of the Alert pin.
4
ALERT Polarity
When set to 1, the ALERT pin and ALERT Status bit are active-high. When 0, it is active-low.
3
ALERT Reset
Writing a 1 to this bit resets the ALERT pin and the ALERT Status bit. It will always be 0 when read.
2
One Shot
When in shutdown mode (Bit 7 is 1), initiates a single temperature conversion and update of the temperature
register with new temperature data. Has no effect when in continuous conversion mode (i.e., when Bit 7 is
0). Always returns a 0 when read.
1:0
Reserved
User must write only a 0 to these bits.
7.5.1.4 THIGH Upper-Limit Register
Pointer Address 02h (R/W)
Reset State: 7FE0h (+255.75°C)
D15
D14
D13
D12
D11
D10
D9
D8
SIGN
128°C
64°C
32°C
16°C
8°C
4°C
2°C
D4
D3
D2
D1
D0
D7
D6
D5
1°C
0.5°C
0.25°C
reserved
Bits
Name
Description
15:5
Upper-Limit
Temperature
If the measured temperature that is stored in this register exceeds this user-programmable upper
temperature limit, the ALERT pin will go active and the THIGH flag in the Control/Status register will be
set to 1. Two's complement format.
4:0
Reserved
Returns zeros upon read. Recommend writing zeros only in these bits.
7.5.1.5 TLOW Lower-Limit Register
Pointer Address 03h (R/W)
Reset State: 8000h (–256°C)
D15
D14
D13
D12
D11
D10
D9
D8
SIGN
128°C
64°C
32°C
16°C
8°C
4°C
2°C
D7
D6
D5
D4
D3
D2
D1
D0
1°C
0.5°C
0.25°C
reserved
Bits
Name
Description
15:5
Lower-Limit
Temperature
If the measured temperature that is stored in the temperature register falls below this userprogrammable lower temperature limit, the ALERT pin will be deactivated and the TLOW flag in the
Control/Status register will be set to 1. Two's complement format.
4:0
Reserved
Returns zeros upon read. Recommend writing zeros only in these bits.
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7.5.1.6 Control/Status Register
Pointer Address 04h (R/W)
Reset State: 08h
D7
D6
D5
D4
D3
D2
D1
D0
TO_DIS
RES1
RES0
reserved
ALRT_STAT
THI
TLOW
DAV
BITS
NAME
DESCRIPTION
7
Time-Out Disable
Disable the time-out feature on the SMBDAT and SMBCLK lines if set to 1. Setting this bit turns off the
bus-idle timers, enabling the LM73-Q1 to operate at lowest shutdown current.
6:5
Temperature
Resolution
Selects one of four user-programmable temperature data resolutions
00: 0.25°C/LSB, 11-bit word (10 bits plus Sign)
01: 0.125°C/LSB, 12-bit word (11 bits plus Sign)
10: 0.0625°C/LSB, 13-bit word (12 bits plus Sign)
11: 0.03125°C/LSB, 14-bit word (13 bits plus Sign)
4
reserved
Always returns zero when read. Recommend customer write zero only.
3
ALERT Pin Status
Value is 0 when ALERT output pin is low. Value is 1 when ALERT output pin is high. The ALERT output
pin is reset under any of the following conditions: (1) Cleared by writing a 1 to the ALERT Reset bit in the
configuration register, (2) Measured temperature falls below the TLOW limit, or (3) cleared via the ARA
sequence. Recommend customer write zero only.
2
Temperature High Flag
Bit is set to 1 when the measured temperature exceeds the THIGH limit stored in the programmable THIGH
register. Flag is reset to 0 when both of the following conditions are met: (1) measured temperature no
longer exceeds the programmed THIGH limit and (2) upon reading the Control/Status register. If the
temperature is not longer above the THIGH limit, this status bit remains set until it is read by the master so
that the system can check the history of what caused the ALERT output to go active. This bit is not
cleared after every read if the measured temperature is still above the THIGH limit.
1
Temperature Low Flag
Bit is set to 1 when the measured temperature falls below the TLOW limit stored in the programmable
TLOW register. Flag is reset to 0 when both of the following conditions are met: (1) measured temperature
is no longer below the programmed TLOW limit and (2) upon reading the Control/Status register. If the
temperature is no longer below the TLOW limit, the status bit remains set until it is read by the master so
that the system can check the history of what cause the ALERT output to go active. This bit is not cleared
after every read if temperature is still below TLOW limit.
0
Data Available Flag
This bit is 0 when the LM73-Q1 is in the process of converting a new temperature. It is 1 when the
conversion is done. After initiating a temperature conversion while operating in the one-shot mode, this
status bit can be monitored to indicate when the conversion is done. After triggering the one-shot
conversion, the data in the temperature register is invalid until this bit is high (that is, after completion of
the conversion). On power-up, the LM73-Q1 is in continuous conversion mode; while in continuous
conversion mode (the default mode after power-on reset) this bit will always be high. Recommend
customer write zero only.
7.5.1.7 Identification Register
Pointer Address 07h (Read Only)
Reset State: 0190h
D15
D14
D13
D12
D11
D10
D9
D8
0
0
0
0
0
0
0
1
D7
D6
D5
D4
D3
D2
D1
D0
1
0
0
1
0
0
0
0
BITS
NAME
DESCRIPTION
15:8
Manufacturer
Identification Byte
Always returns 01h to uniquely identify the manufacturer as Texas Instruments.
7:4
Product Identification
Nibble
Always returns 9h to uniquely identify this part as the LM73-Q1 Temperature Sensor.
3:0
Die Revision Step
Nibble
Always returns 0h to uniquely identify the revision as level zero.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Thermal Path Considerations
To get the expected results when measuring temperature with an integrated circuit temperature sensor like the
LM73-Q1, it is important to understand that the sensor measures its own die temperature. For the LM73-Q1, the
best thermal path between the die and the outside world is through the LM73-Q1's pins. In the SOT23 package,
all the pins on the LM73-Q1 will have an equal effect on the die temperature. Because the pins represent a good
thermal path to the LM73-Q1 die, the LM73-Q1 will provide an accurate measurement of the temperature of the
printed circuit board on which it is mounted. There is a less efficient thermal path between the plastic package
and the LM73-Q1 die. If the ambient air temperature is significantly different from the printed circuit board
temperature, it will have a small effect on the measured temperature.
8.1.2 Output Considerations: Tight Accuracy, Resolution and Low Noise
The LM73-Q1 is well suited for applications that require tight temperature measurement accuracy. In many
applications, the low temperature error can mean better system performance and, by eliminating a system
calibration step, lower production cost.
With digital resolution as fine as 0.03125 °C/LSB, the LM73-Q1 senses and reports very small changes in its
temperature, making it ideal for applications where temperature sensitivity is important. For example, the LM73Q1 enables the system to quickly identify the direction of temperature change, allowing the processor to take
compensating action before the system reaches a critical temperature.
The LM73-Q1 has very low output noise, typically 0.015°C rms, which makes it ideal for applications where
stable thermal compensation is a priority. For example, in a temperature-compensated oscillator application, the
very small deviation in successive temperature readings translates to a stable frequency output from the
oscillator.
8.2 Typical Application
VDD = 2.7V to 5.5V
Typical bypass 0.1 PF
3
Address (set as desired for one
of three addresses)
To / from processor
2-wire interface
ADDR
SMBDAT
SMBCLK
1
6
LM73
5
ALERT
To hardware
shutdown
4
2
Figure 13. Digital Temperature Sensing
8.2.1 Design Requirements
The LM73-Q1 requires positive supply voltage of 2.7 V to 5.5 V to be applied between +VDD and GND. For best
results, bypass capacitors of 100 nF and 10 μF are recommended.
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Typical Application (continued)
8.2.2 Detailed Design Procedure
The temperature resolution is programmable, allowing the host system to select the optimal configuration
between sensitivity and conversion time. The LM73-Q1 can be placed in shutdown to minimize power
consumption when temperature data is not required. While in shutdown, a 1-shot conversion mode allows
system control of the conversion rate for ultimate flexibility.
8.2.3 Application Curve
Figure 14. Typical Performance
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9 Power Supply Recommendations
In systems where there is a large amount of capacitance on the VDD node, the LM73-Q1 power supply ramp-up
time can become excessively long. Slow power-supply ramp times may result in abnormal temperature readings.
A linear power-on-ramp of less than 0.7 V/msec and an exponential ramp with an RC time constant of more than
1.25 msec is categorized as a slow power-supply ramp. To avoid errors, use the power up sequence described
below.
The software reset sequence is as follows:
1. Allow VDD to reach the specified minimum operating voltage, as specified in the Recommended Operating
Conditions section.
2. Write a 1 to the Full Power Down bit, Bit 7 of the Configuration Register, and hold it high for the specified
maximum conversion time for the initial default of 11-bits resolution. This ensures that a complete reset
operation has occurred. See the Temperature Conversion Time specifications within the Temperature-toDigital Converter Characteristics for more details.
3. Write a 0 to the Full Power Down bit to restore the LM73-Q1 to normal mode.
10 Layout
10.1 Layout Guidelines
To achieve the expected results when measuring temperature with an integrated circuit temperature sensor like
the LM73-Q1, it is important to understand that the sensor measures its own die temperature. For the LM73-Q1,
the best thermal path between the die and the outside world is through the LM73-Q1's pins. In the SOT-23
package, all the pins on the LM73-Q1 will have an equal effect on the die temperature. Because the pins
represent a good thermal path to the LM73-Q1 die, the LM73-Q1 will provide an accurate measurement of the
temperature of the printed circuit board on which it is mounted.
10.2 Layout Example
R1
VDD
SMBDAT
GND
LM73
C1
R2
VDD
SMBCLK
Figure 15. PBC Layout
22
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11 Device and Documentation Support
11.1 Related Documentation
For related documentation see the following:
Semiconductor and IC Package Thermal Metrics
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: LM73-Q1
23
PACKAGE OPTION ADDENDUM
www.ti.com
17-Mar-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM73C0QDDCRQ1
ACTIVE
SOT-23-THIN
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
730Q
LM73C1QDDCRQ1
ACTIVE
SOT-23-THIN
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
731Q
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
17-Mar-2017
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM73-Q1 :
• Catalog: LM73
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
LM73C0QDDCRQ1
SOT23-THIN
DDC
6
3000
178.0
8.4
LM73C1QDDCRQ1
SOT23-THIN
DDC
6
3000
178.0
8.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.2
3.2
1.4
4.0
8.0
Q3
3.2
3.2
1.4
4.0
8.0
Q3
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM73C0QDDCRQ1
SOT-23-THIN
DDC
6
3000
210.0
185.0
35.0
LM73C1QDDCRQ1
SOT-23-THIN
DDC
6
3000
210.0
185.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DDC0006A
SOT - 1.1 max height
SCALE 4.000
SOT
3.05
2.55
1.75
1.45
PIN 1
INDEX AREA
1.1 MAX
B
1
0.1 C
A
6
4X 0.95
3.05
2.75
1.9
4
3
0.5
0.3
0.2
0.1
TYP
0.0
6X
0 -8 TYP
0.20
TYP
0.12
C A B
C
SEATING PLANE
0.6
TYP
0.3
0.25
GAGE PLANE
4214841/A 08/2016
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC MO-193.
www.ti.com
EXAMPLE BOARD LAYOUT
DDC0006A
SOT - 1.1 max height
SOT
SYMM
6X (1.1)
1
6
6X (0.6)
SYMM
4X (0.95)
4
3
(R0.05) TYP
(2.7)
LAND PATTERN EXAMPLE
EXPLOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
SOLDERMASK DETAILS
4214841/A 08/2016
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DDC0006A
SOT - 1.1 max height
SOT
SYMM
6X (1.1)
1
6
6X (0.6)
SYMM
4X(0.95)
4
3
(R0.05) TYP
(2.7)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214841/A 08/2016
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
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TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third
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damages, costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on
ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable
warranties or warranty disclaimers for TI products.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2019, Texas Instruments Incorporated
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