Texas Instruments | LM95234 Quad Remote Diode & Local Temp Sensor w/SMBus Interface &TruTherm Tech (Rev. D) | Datasheet | Texas Instruments LM95234 Quad Remote Diode & Local Temp Sensor w/SMBus Interface &TruTherm Tech (Rev. D) Datasheet

Texas Instruments LM95234 Quad Remote Diode & Local Temp Sensor w/SMBus Interface &TruTherm Tech (Rev. D) Datasheet
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
LM95234 Quad Remote Diode and Local Temperature Sensor with SMBus Interface and
TruTherm™ Technology
Check for Samples: LM95234
FEATURES
1
•
23
•
•
•
•
•
•
•
•
•
•
•
•
Accurately Senses Die Temperature of 4
Remote ICs or Diode Junctions and Local
Temperature
TruTherm BJT Beta Compensation Technology
Accurately Senses Sub-micron Process
Thermal Diodes
Programmable Digital Filters and Analog Front
End Filter
0.125°C LSb Temperature Resolution
0.03125°C LSb Remote Temperature
Resolution with Digital Filter Enabled
+127.875°C/–128°C and 0°C/255°C Remote
Ranges
Remote Diode Fault Detection, Model
Selection and Offset Correction
Mask and Status Register Support
3 Programmable TCRIT Outputs with
Programmable Shared Hysteresis and FaultQueue
Programmable Conversion Rate and Shutdown
Mode One-shot Conversion Control
SMBus 2.0 Compatible Interface, Supports
TIMEOUT
Three-level Address Pin
14-pin WSON Package
KEY SPECIFICATIONS
•
•
•
•
Local Temperature Accuracy ±2.0°C (max)
Remote Diode Temperature Accuracy ±0.875°C
(max)
Supply Voltage 3.0V to 3.6V
Average Supply Current (1Hz conversion rate)
APPLICATIONS
•
Processor/Computer System Thermal
Management
•
•
– (e.g. Laptop, Desktop, Workstations,
Server)
Electronic Test Equipment
Office Electronics
DESCRIPTION
LM95234 is an 11-bit digital temperature sensor with
a 2-wire System Management Bus (SMBus) interface
that can very accurately monitor the temperature of
four remote diodes as well as its own temperature
that includes patent pending remote diode
TruTherm™
BJT
beta
compensation
beta
compensation technology. The four remote diodes
can be external devices such as microprocessors,
graphics processors or diode-connected 2N3904s.
The LM95234's TruTherm BJT beta compensation
technology allows sensing of 90 nm or 65 nm process
thermal diodes accurately.
The LM95234 reports temperature in two different
formats for +127.875°C/–128°C range and 0°C/255°C
range. The LM95234 TCRIT1, TCRIT2 and TCRIT3
outputs are triggered when any unmasked channel
exceeds its corresponding programmable limit and
can be used to shutdown the system, to turn on the
system fans or as a microcontroller interrupt function.
The current status of the TCRIT1, TCRIT2 and
TCRIT3 pins can be read back from the status
registers. Mask registers are available for further
control of the TCRIT outputs.
Two LM95234 remote temperature channels have
programmable digital filters while the other two
remote channels utilize a fault-queue to minimize
unwanted TCRIT events when temperature spikes
are encountered.
For optimum flexibility and accuracy, each LM95234
channel includes registers for sub-micron process or
2N3904 diode model selection as well as offset
correction. A three-level address pin allows
connection of up to 3 LM95234s to the same SMBus
master. The LM95234 includes power saving
functions such as: programmable conversion rate,
shutdown mode, and disabling of unused channels.
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TruTherm is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2013, Texas Instruments Incorporated
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Connection Diagram
NC
1
14
TCRIT3
VDD
2
13
SMBCLK
D4+
3
12
SMBDAT
D3+
4
11
TCRIT2
TCRIT1
LM95234
D-
5
10
D2+
6
9
A0
D1+
7
8
GND
Figure 1. WSON-14
TOP VIEW
Simplified Block Diagram
3.0V-3.6V
LM95234
Local
Diode Selector
D1+
Remote
Diode1
Selector
D2+
Remote
Diode2
Selector
D3+
D4+
Remote
Diode3
Selector
Remote
Diode4
Selector
D-
'-6 Converter
11-Bit or
10-Bit Plus Sign
Remote
10-bit Plus Sign
Local
Local
Temperature
Registers
TruThermTM
Temperature
Sensor
Circuitry
Remote 1
Digital Filter
Remote 1
Offset Register
Remote 2
Digital Filter
Remote 2
Offset Register
Remote 3
Status Fault
Queue
Remote 3
Offset Register
Remote 4
Status Fault
Queue
Remote 4
Offset Register
Control Logic
TCRIT1
Remote 1
Temperature
Registers
Remote 2
Temperature
Registers
Remote 3
Temperature
Registers
Remote 4
Temperature
Registers
T_CRIT
Control
Logic
TCRIT2
TCRIT3
Limit, Status
and
Mask
Registers
SMBDAT
SMBus
Interface
SMBCLK
Conversion
Rate Rgister
Diode
Configuration
Registers
General
Configuration
Registers
2
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
PIN DESCRIPTIONS
Label
Pin #
Function
Typical Connection
NC
1
No Connect
Not connected. May be left floating, connected to GND or VDD.
VDD
2
Positive Supply Voltage Input
DC Voltage from 3.0V to 3.6V. VDD should be bypassed with a
0.1 µF capacitor in parallel with 100 pF. The 100 pF capacitor
should be placed as close as possible to the power supply pin.
Noise should be kept below 200 mVp-p, a 10 µF capacitor may
be required to achieve this.
D4+
3
Diode Current Source
Fourth Diode Anode. Connected to remote discrete diodeconnected transistor junction or to the diode-connected
transistor junction on a remote IC whose die temperature is
being sensed. A capacitor is not required between D4+ and D-.
A 100 pF capacitor between D4+ and D- can be added and
may improve performance in noisy systems. Float this pin if
this thermal diode is not used.
D3+
4
Diode Current Source
Third Diode Anode. Connected to remote discrete diodeconnected transistor junction or to the diode-connected
transistor junction on a remote IC whose die temperature is
being sensed. A capacitor is not required between D3+ and D-.
A 100 pF capacitor between D3+ and D- can be added and
may improve performance in noisy systems. Float this pin if
this thermal diode is not used.
D−
5
Diode Return Current Sink
All Diode Cathodes. Common D- pin for all four remote diodes.
D2+
6
Diode Current Source
Second Diode Anode. Connected to remote discrete diodeconnected transistor junction or to the diode-connected
transistor junction on a remote IC whose die temperature is
being sensed. A capacitor is not required between D2+ and D-.
A 100 pF capacitor between D2+ and D- can be added and
may improve performance in noisy systems. Float this pin if
this thermal diode is not used.
D1+
7
Diode Current Source
First Diode Anode. Connected to remote discrete diodeconnected transistor junction or to the diode-connected
transistor junction on a remote IC whose die temperature is
being sensed. A capacitor is not required between D1+ and D-.
A 100 pF capacitor between D1+ and D- can be added and
may improve performance in noisy systems. Float this pin if
this thermal diode is not used.
GND
8
Power Supply Ground
System low noise ground.
A0
9
Digital Input
SMBus slave address select pin. Selects one of three
addresses. Can be tied to VDD, GND, or to the middle of a
resistor divider connected between VDD and GND.
TCRIT1
10
Digital Output, Open-Drain
Critical temperature output 1. Requires pull-up resistor. Active
"LOW".
TCRIT2
11
Digital Output, Open-Drain
Critical temperature output 2. Requires pull-up resistor. Active
"LOW".
SMBDAT
12
SMBus Bidirectional Data Line,
Open-Drain Output
From and to Controller; may require an external pull-up resistor
SMBCLK
13
SMBus Clock Input
From Controller; may require an external pull-up resistor
TCRIT3
14
Digital Output, Open-Drain
Critical temperature output 3. Requires pull-up resistor. Active
"LOW".
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
3
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Typical Application
+3.3V
Standby
C3
10 PF
C2
0.1 PF
C1*
100 pF
C4**
100 pF
SO
DIMM
Q1
MMBT3904
1
C5**
100 pF
2
3
HDD
Q2
MMBT3904
NC
VDD
D4+
4
D3+
5 D6 D2+
7 D1+
GPU
C6**
100 pF
R1
10k
14
TCRIT3
13
SMBCLK
12
SMBDAT
11
TCRIT2
10
TCRIT1
9
A0
8
GND
R3
10k
R4
1.3k
R5
1.3k
SMBCLK
SMBDAT
SMBus
Master
LM95234
C7**
100 pF
PROCESSOR
R2
10k
* Note, place close to LM95234 pins.
** Note, optional - place close to LM95234 pins.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)
Supply Voltage
−0.3V to 6.0V
Voltage at SMBDAT, SMBCLK, TCRIT1, TCRIT2, TCRIT3
−0.5V to 6.0V
−0.3V to (VDD + 0.3V)
Voltage at Other Pins
D− Input Current
±1 mA
Input Current at All Other Pins (2)
Package Input Current
±5 mA
(2)
30 mA
SMBDAT, TCRIT1, TCRIT2, TCRIT3 Output Sink Current
10 mA
−65°C to +150°C
Storage Temperature
ESD Susceptibility (3)
Human Body Model
2000V
Machine Model
200V
Charge Device Model
1000V
Soldering process must comply with TI’s reflow temperature profile specifications. Refer to http://www.ti.com/packaging (4)
(1)
(2)
(3)
(4)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not
apply when operating the device beyond its rated operating conditions.
When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5
mA. Parasitic components and or ESD protection circuitry are shown in Table 1 for the LM95234's pins.
Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine model, 200 pF discharged directly into each pin. Charged
Device Model (CDM) simulates a pin slowly acquiring charge (such as from a device sliding down the feeder in an automated
assembler) then rapidly being discharged.
Reflow temperature profiles are different for packages containing lead (Pb) than for those that do not.
Operating Ratings
−40°C to +140°C
Operating Temperature Range
TMIN ≤ TA ≤ TMAX
Electrical Characteristics Temperature Range
−40°C ≤ TA ≤ +125°C
LM95234CISD
Supply Voltage Range (VDD)
4
+3.0V to +3.6V
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
Temperature-to-Digital Converter Electrical Characteristics
Unless otherwise noted, these specifications apply for VDD = +3.0Vdc to 3.6Vdc. Boldface limits apply for TA = TJ = TMIN ≤
TA ≤ TMAX; all other limits TA = TJ = +25°C, unless otherwise noted.
Parameter
TA = -40°C to +125°C (3) (4)
Temperature Error Using Local Diode
Temperature Error Using Remote Diode
Typical (1)
Conditions
(5)
±1
±2
°C (max)
65 nm Intel
Processor
±0.875
°C (max)
TA = +25°C to +85°C
TD = +60°C to +100°C
MMBT3904
Transistor
±1.1
°C (max)
TA = +25°C to +85°C
TD = 40°C to +125°C
65 nm Intel
Processor
±1.0
°C (max)
TA = +25°C to +85°C
TD = −40°C to +125°C
MMBT3904
Transistor
±1.3
°C (max)
TA = −40°C to +85°C
TD = −40°C to +125°C
65 nm Intel
Processor
±3.2
°C (max)
TA = −40°C to +85°C
TD = −40°C to +125°C
MMBT3904
Transistor
±3.0
°C (max)
TA = −40°C to +85°C
TD = 125°C to +140°C
MMBT3904
Transistor
±3.3
°C (max)
11
Digital Filter Off
Digital Filter On (Remote Diodes 1 and 2
only)
Conversion Time of All Temperatures at the
Fastest Setting (6)
Quiescent Current
(7)
All Channels are Enabled in Default State
Bits
0.125
°C
11
Bits
0.125
°C
13
Bits
0.03125
°C
1100
1210
ms (max)
1 External Channel TruTherm Active
34
37
ms (max)
1 External Channel TruTherm Inactive
31
34
ms (max)
Local only
30
33
ms (max)
SMBus Inactive, 1Hz Conversion Rate,
channels in default state
570
800
µA (max)
Shutdown
360
High level
160
Low level
10
D− Source Voltage
Remote Diode Source Current
Units
(Limit)
TA = +25°C to +85°C
TD = +60°C to +100°C
Local Diode Measurement Resolution
Remote Diode Measurement Resolution
Limits (2)
µA
0.4
V
230
µA (max)
2.8
1.6
V (max)
V (min)
Power-On Reset Threshold
Measured on VDD input, falling edge
TCRIT1 Pin Temperature Threshold
Default Diodes 1 and 2 only
+110
°C
TCRIT2 Pin Temperature Threshold
Default all channels
+85
°C
TCRIT3 Pin Temperature Threshold
Default Diodes 3 and 4 only
+85
°C
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Typicals are at TA = 25°C and represent most likely parametric norm.
Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level).
Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the
internal power dissipation of the LM95234 and the thermal resistance.
Thermal resistance junction-to-ambient when attached to a 4 layer printed circuit board per JEDEC standard JESD51-7:
(a) 14-lead WSON = 90°C/W (no thermal vias, no airflow)
(b) 14-lead WSON = 63°C/W (1 thermal via, no airflow)
(c) 14-lead WSON = 43°C/W (6 thermal vias, no airflow)
(d) 14-lead WSON = 31°C/W (6 thermal vias, 900 ln. ft. / min. airflow)
Note: all quoted values include +15% error factor from nominal value.
The accuracy of the LM95234CISD is ensured when using a typical thermal diode of an Intel processor on a 65 nm process or an
MMBT3904 diode-connected transistor, as selected in the Remote Diode Model Select register. See typical performance curve for
performance with Intel processor on a 90 nm process. For further information on other thermal diodes see DIODE NON-IDEALITY or
www.ti.com.
This specification is provided only to indicate how often temperature data is updated. The LM95234 can be read at any time without
regard to conversion state (and will yield last conversion result).
Quiescent current will not increase substantially with an SMBus communication.
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
5
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Logic Electrical Characteristics
DIGITAL DC CHARACTERISTICS
Unless otherwise noted, these specifications apply for VDD = +3.0Vdc to 3.6Vdc. Boldface limits apply for TA = TJ = TMIN to
TMAX; all other limits TA= TJ=+25°C, unless otherwise noted.
Symbol
Parameter
Conditions
Typical (1)
Limits (2)
Units
(Limit)
SMBDAT, SMBCLK INPUTS
VIN(1)
Logical “1” Input Voltage
2.1
V (min)
VIN(0)
Logical “0”Input Voltage
0.8
V (max)
VIN(HYST)
SMBDAT and SMBCLK Digital Input Hysteresis
400
mV
IIN(1)
Logical “1” Input Current
VIN = VDD
0.005
10
µA (max)
IIN(0)
Logical “0” Input Current
VIN = 0V
−0.005
-10
µA (max)
CIN
Input Capacitance
5
pF
A0 DIGITAL INPUT
VIH
Input High Voltage
0.90 × VDD
V (min)
VIM
Input Middle Voltage
0.57 × VDD
V (max)
0.43 × VDD
V (min)
0.10 × VDD
V (max)
IIN(1)
VIL
Input Low Voltage
Logical "1" Input Current
VIN = VDD
−0.005
−10
µA (min)
IIN(0)
Logical "0" Input Current
VIN = 0V
0.005
10
µA (max)
CIN
Input Capacitance
5
pF
SMBDAT, TCRIT1, TCRIT2, TCRIT3 DIGITAL OUTPUTS
IOH
VOL(SMBDAT)
VOL(TCRIT)
COUT
(1)
(2)
High Level Output Current
VOH = VDD
10
µA (max)
SMBus Low Level Output Voltage
IOL = 4 mA
IOL = 6 mA
0.4
0.6
V (max)
V (max)
TCRIT1, TCRIT2, TCRIT3 Low Level Output
Voltage
IOL= 6 mA
0.4
V (max)
Digital Output Capacitance
5
pF
Typicals are at TA = 25°C and represent most likely parametric norm.
Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level).
SMBus DIGITAL SWITCHING CHARACTERISTICS
Unless otherwise noted, these specifications apply for VDD=+3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80
pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C, unless otherwise noted.
The switching characteristics of the LM95234 fully meet or exceed the published specifications of the SMBus version 2.0. The
following parameters are the timing relationships between SMBCLK and SMBDAT signals related to the LM95234. They
adhere to but are not necessarily the SMBus bus specifications.
Symbol
(1)
(2)
(3)
(4)
6
Parameter
Conditions
Typical (1)
Limits (2)
Units
(Limit)
100
10
kHz (max)
kHz (min)
fSMB
SMBus Clock Frequency
tLOW
SMBus Clock Low Time
from VIN(0)max to VIN(0)max
4.7
25
µs (min)
ms (max)
tHIGH
SMBus Clock High Time
from VIN(1)min to VIN(1)min
4.0
µs (min)
(3)
tR,SMB
SMBus Rise Time
See
tF,SMB
SMBus Fall Time
See (4)
tOF
Output Fall Time
CL = 400 pF,
IO = 3 mA (4)
1
µs (max)
0.3
µs (max)
250
ns (max)
Typicals are at TA = 25°C and represent most likely parametric norm.
Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level).
The output rise time is measured from (VIN(0)max − 0.15V) to (VIN(1)min + 0.15V).
The output fall time is measured from (VIN(1)min + 0.15V) to (VIN(0)max − 0.15V).
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
SMBus DIGITAL SWITCHING CHARACTERISTICS (continued)
Unless otherwise noted, these specifications apply for VDD=+3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80
pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C, unless otherwise noted.
The switching characteristics of the LM95234 fully meet or exceed the published specifications of the SMBus version 2.0. The
following parameters are the timing relationships between SMBCLK and SMBDAT signals related to the LM95234. They
adhere to but are not necessarily the SMBus bus specifications.
Limits (2)
Units
(Limit)
SMBDAT and SMBCLK Time Low for Reset of
Serial Interface (5)
25
35
ms (min)
ms (max)
tSU;DAT
Data In Setup Time to SMBCLK High
250
ns (min)
tHD;DAT
Data Out Stable after SMBCLK Low
300
1075
ns (min)
ns (max)
tHD;STA
Start Condition SMBDAT Low to SMBCLK Low
(Start condition hold before the first clock falling
edge)
100
ns (min)
tSU;STO
Stop Condition SMBCLK High to SMBDAT Low
(Stop Condition Setup)
100
ns (min)
tSU;STA
SMBus Repeated Start-Condition Setup Time,
SMBCLK High to SMBDAT Low
0.6
µs (min)
SMBus Free Time Between Stop and Start
Conditions
1.3
µs (min)
Symbol
tTIMEOUT
tBUF
(5)
Parameter
Typical (1)
Conditions
Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM95234's SMBus state machine,
therefore setting SMBDAT and SMBCLK pins to a high impedance state.
tLOW
tR
tF
VIH
SMBCLK
VIL
tHD;STA
tHD;DAT
tBUF
tHIGH
tSU;STA
tSU;DAT
tSU;STO
VIH
SMBDAT
VIL
P
S
S
P
Figure 2. SMBus Communication
Table 1. Parasitic components and ESD protection circuitry
Pin #
Label
Circuit
1
NC
–
2
VDD
A
3
D4+
A
4
D3+
A
5
D-
A
6
D2+
A
7
D1+
A
8
GND
–
9
A0
B
10
TCRIT1
B
11
TCRIT2
B
12
SMBDAT
B
13
SMBCLK
B
14
TCRIT2
B
Circuits for Pin ESD Protection Structure
V+
D2
PIN
D1
D3
6.5V
ESD
CLAMP
GND
Circuit A
PIN
D1
SNP
GND
Circuit B
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
7
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Typical Performance Characteristics
3.0
Thermal Diode Capacitor or PCB
Leakage Current Effect on
Remote Diode Temperature Reading
Conversion Rate Effect on
Average Power Supply Current
VDD = +3.3V
AVERAGE I DD (mA)
2.5
TA = 25°C
2.0
1.5
1.0
0.5
0.0
100
1000
10000
CONVERSION TIME (ms)
Figure 3.
Figure 4.
Remote Temperature Reading Sensitivity to
Thermal Diode Filter Capacitance,
TruTherm Disabled
Remote Temperature Reading Sensitivity to
Thermal Diode Filter Capacitance,
TruTherm Enabled
Figure 5.
Figure 6.
Intel Processor on 65 nm Process or 90 nm Process
Thermal Diode Performance Comparison
Figure 7.
8
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
FUNCTIONAL DESCRIPTION
LM95234 is an 11-bit digital temperature sensor with a 2-wire System Management Bus (SMBus) interface that
can monitor the temperature of four remote diodes as well as its own temperature. The LM95234 can be used to
very accurately monitor the temperature of up to four external devices such as microprocessors, graphics
processors or diode-connected 2N3904 transistor. The LM95234 includes TruTherm BJT beta compensation
technology that allows sensing of Intel processors 90 nm or 65 nm process thermal diodes accurately.
The LM95234 reports temperature in two different formats for +127.875°C/–128°C range and 0°C/255°C range.
The LM95234 has a Sigma-Delta ADC (Analog-to-Digital Converter) core which provides the first level of noise
imunity. For improved performance in a noisy environment the LM95234 includes programmable digital filters for
Remote Diode 1 and 2 temperature readings. When the digital filters are invoked the resolution for Remote Diode
1 and 2 readings increases to 0.03125°C. The LM95234 contains a diode model selection register that includes
bits for each channel that select between thermal diodes of Intel processors on 65 nm process or 2N3904s. For
maximum flexibility and best accuracy the LM95234 includes offset registers that allow calibration of other diode
types.
Diode fault detection circuitry in the LM95234 can detect the absence or fault state of a remote diode: whether
D+ is shorted to VDD, D- or ground, or whether D+ is floating.
The LM95234 TCRIT1, TCRIT2 and TCRIT3 active low outputs are triggered when any unmasked channel
exceeds its corresponding programmable limit and can be used to shutdown the system, to turn on the system
fans or as a microcontroller interrupt function. The current status of the TCRIT1, TCRIT2 and TCRIT3 pins can
be read back from the status registers via the SMBus interface. Two of the remote channels have two separate
limits each that control the TCRIT1 and TCRIT2 pins. The remaining two channels and the local channel each
have one limit to control both the TCRIT1 and TCRIT2 pins. The TCRIT3 pin shares the limits of the TCRIT2 pin
but allows for different masking options. All limits have a shared programmable hysteresis register.
Remote Diode 1 and 2 temperature channels have programmable digital filters while the other two remote
temperature channels utilize a fault-queue in order to avoid false triggering the TCRIT pins.
LM95234 has a three-level address pin to connect up to 3 devices to the same SMBus master. LM95234 also
has programmable conversion rate register as well as a shutdown mode for power savings. One round of
conversions can be triggered in shutdown mode by writing to the one-shot register through the SMBus interface.
LM95234 can be programmed to turn off unused channels for more power savings.
The LM95234 register set has an 8-bit data structure and includes:
1. Temperature Value Registers with signed format
– Most-Significant-Byte (MSB) and Least-Significant-Byte (LSB) Local Temperature
– MSB and LSB Remote Temperature 1
– MSB and LSB Remote Temperature 2
– MSB and LSB Remote Temperature 3
– MSB and LSB Remote Temperature 4
2. Temperature Value Registers with unsigned format
– MSB and LSB Remote Temperature 1
– MSB and LSB Remote Temperature 2
– MSB and LSB Remote Temperature 3
– MSB and LSB Remote Temperature 4
3. Diode Configuration Registers
– Diode Model Select
– Remote 1 Offset
– Remote 2 Offset
– Remote 3 Offset
– Remote 4 Offset
4. General Configuration Registers
– Configuration (Standby, Fault Queue enable for Remote 3 and 4; Conversion Rate)
– Channel Conversion Enable
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
9
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
5.
6.
7.
8.
9.
www.ti.com
– Filter Setting for Remote 1 and 2
– 1-Shot
Status Registers
– Main Status Register (Busy bit, Not Ready, Status Register 1 to 4 Flags)
– Status 1 (diode fault)
– Status 2 (TCRIT1)
– Status 3 (TCRIT2)
– Status 4 (TCRIT3)
– Diode Model Status
Mask Registers
– TCRIT1 Mask
– TCRIT2 Mask
– TCRIT3 Mask
Limit Registers
– Local Tcrit Limit
– Remote 1 Tcrit-1 Limit
– Remote 2 Tcrit-1 Limit
– Remote 3 Tcrit Limit
– Remote 4 Tcrit Limit
– Remote 1 Tcrit-2 and Tcrit-3 Limit
– Remote 2 Tcrit-2 and Tcrit-3 Limit
– Common Tcrit Hysteresis
Manufacturer ID Register
Revision ID Register
CONVERSION SEQUENCE
The LM95234 takes approximately 190 ms to convert the Local Temperature, Remote Temperatures 1 through
4, and to update all of its registers. These conversions for each thermal diode are addressed in a round robin
sequence. Only during the conversion process the busy bit (D7) in Status register (02h) is high. The conversion
rate may be modified by the Conversion Rate bits found in the Configuration Register (03h). When the
conversion rate is modified a delay is inserted between each round of conversions, the actual time for each
round remains at 190 ms (typical all channels enabled). The time a round takes depends on the number of
channels that are on. Different conversion rates will cause the LM95234 to draw different amounts of average
supply current as shown in Figure 8. This curve assumes all the channels are on. If channels are turned off the
average current will drop since the round robin time will decrease and the shutdown time will increase during
each conversion interval.
3.0
VDD = +3.3V
AVERAGE I DD (mA)
2.5
TA = 25°C
2.0
1.5
1.0
0.5
0.0
100
1000
10000
CONVERSION TIME (ms)
Figure 8. Conversion Rate Effect on Power Supply Current
10
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
POWER-ON-DEFAULT STATES
LM95234 always powers up to these known default states. The LM95234 remains in these states until after the
first conversion.
1. All Temperature readings set to 0°C until the end of the first conversion
2. Diode Model Select: Remote 1 set to 65 nm Intel processor, Remote 2-4 set to MMBT3904
3. Remote offset for all channels 0°C
4. Configuration: Active converting, Fault Queue enabled for Remote 3 and 4
5. Continuous conversion with all channels enabled, time = 1s
6. Enhanced digital filter enabled for Remote 1 and 2
7. Status Registers depends on state of thermal diode inputs
8. Local and Remote Temperature Limits for TCRIT1, TCRIT2 and TCRIT3 outputs:
Output Pin
Temperature Channel Limit
Remote 4
(°C)
Remote 3
(°C)
Remote 2
(°C)
Remote 1
(°C)
Local
(°C)
TCRIT1
Masked,
85
Masked,
85
110
110
Masked,
85
TCRIT2
85
85
85
85
85
TCRIT3
85
85
Masked,
85
Masked,
85
Masked,
85
9. Manufacturers ID set to 01h
10. Revision ID set to 79h
SMBus INTERFACE
The LM95234 operates as a slave on the SMBus, so the SMBCLK line is an input and the SMBDAT line is
bidirectional. The LM95234 never drives the SMBCLK line and it does not support clock stretching. According to
SMBus specifications, the LM95234 has a 7-bit slave address. Three SMBus device address can be selected by
connecting A0 (pin 6) to either Low, Mid-Supply or High voltages. The LM95234 has the following SMBus slave
address:
A0 Pin State
SMBus Device Address A[6:0]
Hex
Binary
Low
18h
001 1000
Mid-Supply
4Dh
100 1101
High
4Eh
100 1110
TEMPERATURE CONVERSION SEQUENCE
Each of the 5 temperature channels of LM95234 can be turned OFF independent from each other via the
Channel Enable Register. Turning off unused channels will increase the conversion speed in the fastest
conversion speed mode. If the slower conversion speed settings are used, disabling unused channels will reduce
the average power consumption of LM95234.
DIGITAL FILTER
In order to suppress erroneous remote temperature readings due to noise as well as increase the resolution of
the temperature, the LM95234 incorporates a digital filter for Remote 1 and 2 Temperature Channels. When a
filter is enabled the filtered readings are used for the TCRIT comparisons. There are two possible digital filter
settings that are enabled through the Filter Setting Register at register address 0Fh. The filter for each channel
can be set according to the following table:
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
11
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
R1F[1:0] or R2F[1:0]
Filter Setting
0
0
No Filter
0
1
Filter (equivalent to Level 2 filter of the LM86/LM89)
1
0
Reserved
1
1
Enhanced Filter (Filter with transient noise clipping)
Figure 9 through Figure 11 describe the filter output in response to a step input and an impulse input.
Figure 9. Seventeen and fifty degree step response
Figure 10. Impulse response with input transients
less than 4°C
45
LM95234 with
Filter Off
43
TEMPERATURE (oC)
41
39
37
35
LM95234 with
Filter On
33
31
29
27
25
0
50
100
150
200
SAMPLE NUMBER
Figure 11. Impulse response with input transients
great than 4°C
Figure 12. Digital Filter Response in a typical Intel
processor on a 65 nm or 90 nm process. The filter
curves were purposely offset for clarity.
Figure 12 shows the filter in use in a typical Intel processor on a 65/90 nm process system. Note that the two
curves have been purposely offset for clarity. Inserting the filter does not induce an offset as shown.
FAULT QUEUE
In order to suppress erroneous TCRIT1,TCRIT2 and TCRIT3 triggering the LM95234 incorporates a Fault Queue
for the unfiltered remote channels 3 and 4. The Fault Queue acts to ensure the remote temperature
measurement of these channels is genuinely beyond the corresponding Tcrit limit by not triggering until three
consecutive out of limit measurements have been made, see Figure 13 for an example. The Fault Queue
defaults on upon power-up. The fault queue for channels 3 and 4 can be turned ON or OFF via bits 0 and 1 of
the Configuration Register. When the fault queue is enabled, the TCRIT1, TCRIT2 and TCRIT3 pins will be
triggered if the temperature is above the Tcrit limit for 3 consecutive conversions and the corresponding mask bit
is 0 in the TCRIT Mask registers. Similarly the temperature needs to be below the Tcrit limit minus the hysteresis
value for three consecutive conversions for the TCRIT1, TRCIT2 and TCRIT3 pins to deactivate.
12
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
Remote 4 Temperature Readings
Remote 4
Tcrit Limit
Register
Value
n+11
n+9
n+10
n+8
n+7
n+6
n+5
n+4
n+3
n+2
n
n+1
Status 4
Register
R4T3 Bit
SAMPLE NUMBER
Figure 13. Fault Queue Response Diagram (with 0°C hysteresis)
TEMPERATURE DATA FORMAT
Temperature data can only be read from the Local and Remote Temperature value registers. The data format for
all temperature values is left justified 16-bit word available in two 8-bit registers. Unused bits will always report
"0". All temperature data is clamped and will not roll over when a temperature exceeds full-scale value.
Remote temperature data for all channels can be represented by an 11-bit, two's complement word or unsigned
binary word with an LSb (Least Significant Bit) equal to 0.125°C.
Table 2. 11-bit, 2's Complement (10-bit plus sign)
Temperature
Digital Output
Binary
Hex
+125°C
0111 1101 0000 0000
7D00h
+25°C
0001 1001 0000 0000
1900h
+1°C
0000 0001 0000 0000
0100h
+0.125°C
0000 0000 0010 0000
0020h
0°C
0000 0000 0000 0000
0000h
−0.125°C
1111 1111 1110 0000
FFE0h
FF00h
−1°C
1111 1111 0000 0000
−25°C
1110 0111 0000 0000
E700h
−55°C
1100 1001 0000 0000
C900h
Table 3. 11-bit, Unsigned Binary
Temperature
Digital Output
Binary
Hex
+255.875°C
1111 1111 1110 0000
FFE0h
+255°C
1111 1111 0000 0000
FF00h
+201°C
1100 1001 0000 0000
C900h
+125°C
0111 1101 0000 0000
7D00h
+25°C
0001 1001 0000 0000
1900h
+1°C
0000 0001 0000 0000
0100h
+0.125°C
0000 0000 0010 0000
0020h
0°C
0000 0000 0000 0000
0000h
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
13
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
When the digital filter is enabled on Remote 1 and 2 channels temperature data is represented by a 13-bit
unsigned binary or 12-bit plus sign (two's complement) word with an LSb equal to 0.03125°C.
Table 4. 13-bit, 2's Complement (12-bit plus sign)
Temperature
Digital Output
Binary
Hex
+125°C
0111 1101 0000 0000
7D00h
+25°C
0001 1001 0000 0000
1900h
+1°C
0000 0001 0000 0000
0100h
+0.03125°C
0000 0000 0000 1000
0008h
0°C
0000 0000 0000 0000
0000h
−0.03125°C
1111 1111 1111 1000
FFF8h
−1°C
1111 1111 0000 0000
FF00h
−25°C
1110 0111 0000 0000
E700h
−55°C
1100 1001 0000 0000
C900h
Table 5. 13-bit, Unsigned Binary
Temperature
Digital Output
Binary
Hex
+255.875°C
1111 1111 1110 0000
FFE0h
+255°C
1111 1111 0000 0000
FF00h
+201°C
1100 1001 0000 0000
C900h
+125°C
0111 1101 0000 0000
7D00h
+25°C
0001 1001 0000 0000
1900h
+1°C
0000 0001 0000 0000
0100h
+0.03125°C
0000 0000 0000 1000
0008h
0°C
0000 0000 0000 0000
0000h
Local Temperature data is only represented by an 11-bit, two's complement, word with an LSb equal to 0.125°C.
Table 6. 11-bit, 2's Complement (10-bit plus sign)
Temperature
14
Digital Output
Binary
Hex
+125°C
0111 1101 0000 0000
7D00h
+25°C
0001 1001 0000 0000
1900h
+1°C
0000 0001 0000 0000
0100h
+0.125°C
0000 0000 0010 0000
0020h
0°C
0000 0000 0000 0000
0000h
−0.125°C
1111 1111 1110 0000
FFE0h
−1°C
1111 1111 0000 0000
FF00h
−25°C
1110 0111 0000 0000
E700h
−55°C
1100 1001 0000 0000
C900h
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
SMBDAT OPEN-DRAIN OUTPUT
The SMBDAT output is an open-drain output and does not have internal pull-ups. A “high” level will not be
observed on this pin until pull-up current is provided by some external source, typically a pull-up resistor. Choice
of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as
possible without effecting the SMBus desired data rate. This will minimize any internal temperature reading
errors due to internal heating of the LM95234. The maximum resistance of the pull-up to provide a 2.1V high
level, based on LM95234 specification for High Level Output Current with the supply voltage at 3.0V, is 82 kΩ
(5%) or 88.7 kΩ (1%).
TCRIT1, TCRIT2, and TCRIT3 OUTPUTS
The LM95234's TCRIT pins are active-low open-drain outputs and do not include internal pull-up resistors. A
“high” level will not be observed on these pins until pull-up current is provided by some external source, typically
a pull-up resistor. Choice of resistor value depends on many system factors but, in general, the pull-up resistor
should be as large as possible without effecting the performance of the device receiving the signal. This will
minimize any internal temperature reading errors due to internal heating of the LM95234. The maximum
resistance of the pull-up to provide a 2.1V high level, based on LM95234 specification for High Level Output
Current with the supply voltage at 3.0V, is 82 kΩ (5%) or 88.7 kΩ (1%). The three TCRIT pins can each sink 6
mA of current and still ensure a "Logic Low" output voltage of 0.4V. If all three pins are set at maximum current
this will cause a power dissipation of 7.2 mW. This power dissipation combined with a thermal resistance of
77.8°C/W will cause the LM95234's junction temperature to rise approximately 0.6°C and thus cause the Local
temperature reading to shift. This can only be cancelled out if the environment that the LM95234 is enclosed in
has stable and controlled air flow over the LM95234, as airflow can cause the thermal resistance to change
dramatically.
Tcrit LIMITS AND TCRIT OUTPUTS
Figure 14 describes a simplified diagram of the temperature comparison and status register logic. Logic diagrams
for the TCRIT1, TCRIT2, and TCRIT3 outputs describes a simplified logic diagram of the circuitry associated with
the status registers, mask registers and the TCRIT output pins.
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
15
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Remote Temp 4
Status 2
(TCRIT1)
A
AtB
B
S
Remote 4 Tcrit Limit
Q
A
R2T1
A B
+
-
R4T1
R3T1
R
B
R1T1
LT1
A
Remote Temp 3
AtB
B
S
Remote 3 Tcrit Limit
Q
R
A
A B
+
-
Remote Temp 2
B
A
AtB
B
S
Remote 2 Tcrit-1 Limit
Q
R
A
R4T2
A B
+
-
Status 3
(TCRIT2)
B
R3T2
R2T2
Remote Temp 1
R1T2
A
LT2
AtB
B
S
Remote 1 Tcrit-1 Limit
Q
R
A
A B
+
-
B
A
AtB
B
Remote 2 Tcrit-2 & Tcrit-3
Limit
S
Q
R
A
A B
+
-
Status 4
(TCRIT3)
B
R4T3
R3T3
A
R2T3
AtB
B
Remote 1 Tcrit2 & Tcrit-3
Limit
S
Q
R1T3
LT3
R
A
A B
+
-
B
A
Local Temp
AtB
B
S
Local Tcrit Limit
Q
R
A
A B
+
-
B
Common Tcrit Hysteresis
Figure 14. Temperature Comparison Logic and Status Register Simplified Diagram
16
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
Logic diagrams for the TCRIT1, TCRIT2, and TCRIT3 outputs
Status 1
(Diode Fault)
Status 1
(Diode Fault)
R4DO
R4DO
R4DS
R4DS
R3DO
R3DO
R3DS
R3DS
R2DO
R2DO
R2DS
R2DS
R1DO
R1DO
R1DS
R1DS
Status 2
(TCRIT1)
Status 3
(TCRIT2)
R4T1
R4T2
R3T1
R3T2
R2T1
TCRIT1
R2T2
R1T1
R1T2
LT1
LT2
TCRIT1
Mask
TCRIT2
Mask
R4TM
R4TM
R3TM
R3TM
R2T1M
R2T2M
R1T1M
R1T2M
LTM
LTM
TCRIT2
Figure 15. TCRIT1 Mask Register, Status Register 1 Figure 16. TCRIT2 Mask Register, Status Register 1
and 2, and TCRIT1 output logic diagram.
and 3, and TCRIT2 output logic diagram.
Status 1 (Diode
Fault)
R4DO
R4DS
R3DO
R3DS
R2DO
R2DS
R1DO
R1DS
Status 4
(TCRIT3)
R4T3
R3T3
R2T3
TCRIT3
R1T3
LT3
TCRIT3
Mask
R4TM
R3TM
R2T2M
R1T2M
LTM
Figure 17. TCRIT3 Mask Register, Status Register 1 and 4, and TCRIT3 output logic diagram.
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
17
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
If enabled, local temperature is compared to the user programmable Local Tcrit Limit Register (Default Value =
85°C). The result of this comparison is stored in Status Register 2, Status Register 3 and Status Register 4 (see
Logic diagrams for the TCRIT1, TCRIT2, and TCRIT3 outputs).The comparison result can trigger TCRIT1 pin,
TCRIT2 pin or TCRIT3 pin depending on the settings in the TCRIT1 Mask, TCRIT2 Mask and TRCIT3 Mask
Registers (see Logic diagrams for the TCRIT1, TCRIT2, and TCRIT3 outputs). The comparison result can also
be read back from the Status Register 2, Status Register 3 and Status Register 4.
If enabled, remote temperature 1 is compared to the user programmable Remote 1 Tcrit-1 Limit Register (Default
Value 110°C) and Remote 1 Tcrit-2 Limit Register (Default Value = 85°C). The result of this comparison is stored
in Status Register 2, Status Register 3 and Status Register 4 (see Figure 14). The comparison result can trigger
TCRIT1 pin, TCRIT2 pin or TCRIT3 pin depending on the settings in the TCRIT1 Mask, TCRIT2 Mask and
TRCIT3 Mask Registers (see Logic diagrams for the TCRIT1, TCRIT2, and TCRIT3 outputs). The comparison
result can also be read back from the Status Register 2, Status Register 3 and Status Register 4. The remote
temperature 2 operates in a similar manner to remote temperature 1 using its associated user programmable
limit registers: Remote 2 Tcrit-1 Limit Register (Default Value 110°C) and Remote 2 Tcrit-2 Limit Register
(Default Value = 85°C). When enabled, the remote temperature 3 is compared to the user programmable
Remote 3 Tcrit Limit Register (Default Value 85°C). The comparison result can trigger TCRIT1 pin, TCRIT2 pin
or TCRIT3 pin depending on the settings in the TCRIT1 Mask, TCRIT2 Mask and TCRIT3 Mask Registers. The
comparison result can also be read back from the Status Register 2, Status Register 3 and Status Register 4.
The remote temperature 4 operates in a similar manner to remote temperature 3 using its associated user
programmable limit register: Remote 4 Tcrit Limit Register (Default Value 85°C).
Table 7. Limit assignments for each TCRIT output pin:
TCRIT1
TCRIT2
TCRIT3
Remote 4
Remote 4
Tcrit Limit
Remote 4
Tcrit Limit
Remote 4
Tcrit Limit
Remote 3
Remote 3
Tcrit Limit
Remote 3
Tcrit Limit
Remote 3
Tcrit Limit
Remote 2
Remote 2
Tcrit-1 Limit
Remote 2
Tcrit-2 Limit
Remote 2
Tcrit-2 Limit
Remote 1
Remote 1
Tcrit-1 Limit
Remote 1
Tcrit-2 Limit
Remote 1
Tcrit-2 Limit
Local
Local
Tcrit Limit
Local
Tcrit Limit
Local
Tcrit Limit
Local Tcrit Limit
Local Tcrit Limit Common Hysteresis
Local
Temperature
Common
Hysteresis
T_CRITn
Output Pin
Status bit LTn
Figure 18. TCRIT response diagram (masking options not included)
The TCRIT response diagram of Figure 18 shows the local temperature interaction with the Tcrit limit and
hysteresis value. As can be seen in the diagram when the local temperature exceeds the Tcrit limit register value
the LTn Status bit is set and the T_CRITn output(s) is/are activated. The Status bit(s) and outputs are not
deactivated until the temperature goes below the value calculated by subtracting the Common Hysteresis value
programmed from the limit. This diagram mainly shows an example function of the hysteresis and is not meant to
show complete function of the possible settings and options of all the TCRIT outputs and limit values.
18
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
DIODE FAULT DETECTION
The LM95234 is equipped with operational circuitry designed to detect fault conditions concerning the remote
diodes. In the event that the D+ pin is detected as shorted to GND, D−, VDD or D+ is floating, the Remote
Temperature reading is –128.000 °C if signed format is selected and 0 °C if unsigned format is selected. In
addition, the appropriate status register bits RD1M or RD2M (D1 or D0) are set.
COMMUNICATING with the LM95234
The data registers in the LM95234 are selected by the Command Register. At power-up the Command Register
is set to “00”, the location for the Read Local Temperature Register. The Command Register latches the last
location it was set to. Each data register in the LM95234 falls into one of three types of user accessibility:
1. Read only
2. Write only
3. Write/Read same address
A Write to the LM95234 will always include the address byte and the command byte. A write to any register
requires one data byte.
Reading the LM95234 can take place either of two ways:
1. If the location latched in the Command Register is correct (most of the time it is expected that the Command
Register will point to one of the Read Temperature Registers because that will be the data most frequently
read from the LM95234), then the read can simply consist of an address byte, followed by retrieving the data
byte.
2. If the Command Register needs to be set, then an address byte, command byte, repeat start, and another
address byte will accomplish a read.
The data byte has the most significant bit first. At the end of a read, the LM95234 can accept either acknowledge
or No Acknowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master
has read its last byte). It takes the LM95234 190 ms (typical, all channels enabled) to measure the temperature
of the remote diodes and internal diode. When retrieving all 11 bits from a previous remote diode temperature
measurement, the master must insure that all 11 bits are from the same temperature conversion. This may be
achieved by reading the MSB register first. The LSB will be locked after the MSB is read. The LSB will be
unlocked after being read. If the user reads MSBs consecutively, each time the MSB is read, the LSB associated
with that temperature will be locked in and override the previous LSB value locked-in.
SMBus Timing Diagrams
1
9
1
9
SMBCLK
SMBDAT
A6
A5
A4
A3
A2
A1
D7
Ack
by
LM95234
A0 R/W
Start by
Master
D6
D5
Frame 1
Serial Bus Address Byte
SMBCLK
(Continued)
SMBDAT
(Continued)
D4
D3
D2
Frame 2
Command Byte
1
D7
D1
D0
Ack
by
LM95234
9
D6
D5
D4
D3
D2
Frame 3
Data Byte
D1
D0
Ack by Stop
LM95234 by
Master
Figure 19. Serial Bus Write to the internal Command Register followed by a the Data Byte
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
19
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
1
9
1
9
SMBCLK
SMBDAT
A6
A5
A4
A3
A2
D7
Ack
by
LM95234
A1
D6
A0 R/W
Start by
Master
D5
Frame 1
Serial Bus Address Byte
D4
D3
D2
D1
D0
Ack by Stop
LM95234 by
Master
Frame 2
Command Byte
Figure 20. Serial Bus Write to the Internal Command Register
1
9
1
9
SMBCLK
SMBDAT
A6
A4
A5
A3
A2
D7
Ack
by
LM95234
A1
D6
A0 R/W
Start by
Master
Frame 1
Serial Bus Address Byte
D5
D4
D3
D2
D1
D0
NoAck Stop
by
by
Master Master
Frame 2
Data Byte from the LM95234
Figure 21. Serial Bus Read from a Register with the Internal Command Register preset to desired value.
1
9
1
9
SMBCLK
SMBDAT
A6
A5
A4
A3
A2
A1
D7
Ack
by
LM95234
D6
A0 R/W
Start by
Master
D5
Frame 1
Serial Bus Address Byte
SMBCLK
(Continued)
SMBDAT
(Continued)
9
A5
A4
A3
A2
A1
D3
D2
D1
D0
Ack Repeat
by
Start by
LM95234 Master
Frame 2
Command Byte
1
A6
D4
D7
Ack
by
LM95234
A0 R/W
Frame 3
Serial Bus Address Byte
1
9
D6
D5
D4
D3
D2
D1
D0
Frame 4
Data Byte from the LM95234
No Ack Stop
by
by
Master Master
Figure 22. Serial Bus Write followed by a Repeat Start and Immediate Read
SERIAL INTERFACE RESET
In the event that the SMBus Master is RESET while the LM95234 is transmitting on the SMBDAT line, the
LM95234 must be returned to a known state in the communication protocol. This may be done in one of two
ways:
1. When SMBDAT is LOW, the LM95234 SMBus state machine resets to the SMBus idle state if either
SMBDAT or SMBCLK are held low for more than 35ms (tTIMEOUT). Note that according to SMBus
specification 2.0 all devices are to timeout when either the SMBCLK or SMBDAT lines are held low for 2535ms. Therefore, to insure a timeout of all devices on the bus the SMBCLK or SMBDAT lines must be held
low for at least 35ms.
2. When SMBDAT is HIGH, have the master initiate an SMBus start. The LM95234 will respond properly to an
SMBus start condition at any point during the communication. After the start the LM95234 will expect an
SMBus Address address byte.
20
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
ONE-SHOT CONVERSION
The One-Shot register is used to initiate a round of conversions and comparisons when the device is in standby
mode, after which the device returns to standby. This is not a data register and it is the write operation that
causes the one-shot conversion. The data written to this address is irrelevant and is not stored. A zero will
always be read from this register. All the channels that are enabled in the Channel Enable Register will be
converted once and the TCRIT1, TCRIT2 and TCRIT3 pins will reflect the comparison results based on this
round of conversion results of the channels that are not masked.
LM95234 Registers
Command register selects which registers will be read from or written to. Data for this register should be
transmitted during the Command Byte of the SMBus write communication.
P7
P6
P5
P4
P3
P2
P1
P0
Command Byte
P0-P7: Command
Table 8. Register Summary
Register Name
Comman
d Byte
(Hex)
Read/
Write
D7
Local Temp MSB
0x10
RO
SIGN
Local Temp LSB
0x20
RO
1/2
Remote Temp 1 MSB – Signed
0x11
RO
SIGN
0x21
RO
1/2
Remote Temp 1 LSB – Signed,
Digital Filter Off
Remote Temp 1 LSB – Signed,
Digital Filter On
Remote Temp 2 MSB – Signed
Remote Temp 2 LSB – Signed,
Digital Filter Off
Remote Temp 2 LSB – Signed,
Digital Filter On
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
64
32
16
8
4
2
1
–
1/4
1/8
0
0
0
0
0
–
64
32
16
8
4
2
1
–
0
0
1/4
1/8
0
0
0
–
1/16
1/32
16
8
4
2
1
–
0
0
0
0
0
–
1/16
1/32
0x12
RO
SIGN
64
32
0x22
RO
1/2
1/4
1/8
Remote Temp 3 MSB – Signed
0x13
RO
SIGN
64
32
16
8
4
2
1
–
Remote Temp 3 LSB – Signed
0x23
RO
1/2
1/4
1/8
0
0
0
0
0
–
Remote Temp 4 MSB – Signed
0x14
RO
SIGN
64
32
16
8
4
2
1
–
Remote Temp 4 LSB – Signed
0x24
RO
1/2
1/4
1/8
0
0
0
0
0
–
Remote Temp 1 MSB – Unsigned
0x19
RO
128
64
32
16
8
4
2
1
–
0
0
0x29
RO
1/2
1/4
1/8
0
0
0
–
1/16
1/32
16
8
4
2
1
–
0
0
0
0
0
–
1/16
1/32
Remote Temp 1 LSB – Unsigned,
Digital Filter Off
Remote Temp 1 LSB – Unsigned,
Digital Filter On
Remote Temp 2 MSB – Unsigned
Remote Temp 2 LSB – Unsigned,
Digital Filter Off
Remote Temp 2 LSB – Unsigned,
Digital Filter On
0x1A
RO
128
64
32
0x2A
RO
1/2
1/4
1/8
Remote Temp 3 MSB – Unsigned
0x1B
RO
128
64
32
16
8
4
2
1
–
Remote Temp 3 LSB – Unsigned
0x2B
RO
1/2
1/4
1/8
0
0
0
0
0
–
Remote Temp 4 MSB – Unsigned
0x1C
RO
128
64
32
16
8
4
2
1
–
Remote Temp 4 LSB – Unsigned
0x2C
RO
1/2
1/4
1/8
0
0
0
0
0
–
Diode Model Select
0x30
R/W
0
0
0
R4TE
R3TE
R2TE
R1TE
0
0x02
Remote 1 Offset
0x31
R/W
SIGN
32
16
8
4
2
1
1/2
0x00
Remote 2 Offset
0x32
R/W
SIGN
32
16
8
4
2
1
1/2
0x00
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
21
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Table 8. Register Summary (continued)
Register Name
Comman
d Byte
(Hex)
Read/
Write
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
Remote 3 Offset
0x33
R/W
SIGN
32
16
8
4
2
1
1/2
0x00
Remote 4 Offset
0x34
R/W
SIGN
32
16
8
4
2
1
1/2
0x00
Configuration
0x03
R/W
–
STBY
–
–
–
–
R4QE
R3QE
0x03
Conversion Rate
0x04
R/W
–
–
–
–
–
–
CR1
CR0
0x02
Channel Conversion Enable
0x05
R/W
–
–
–
R4CE
R3CE
R2CE
R1CE
LCE
0x1F
Filter Setting
0x06
R/W
–
–
–
–
R2F1
R2F0
R1F1
R1F0
0x0F
1-shot
0x0F
WO
–
–
–
–
–
–
–
–
–
Common Status Register
0x02
RO
BUSY
NR
–
–
SR4F
SR3F
SR2F
SR1F
0x00
Status 1 (Diode Fault)
0x07
RO
R4DO
R4DS
R3DO
R3DS
R2DO
R2DS
R1DO
R1DS
–
Status 2 (TCRIT1)
0x08
RO
–
–
–
R4T1
R3T1
R2T1
R1T1
LT1
–
Status 3 (TCRIT2)
0x09
RO
–
–
–
R4T2
R3T2
R2T2
R1T2
LT2
–
Status 4 (TCRIT3)
0x0A
RO
–
–
–
R4T3
R3T3
R2T3
R1T3
LT3
–
Diode Model Status (TruTherm on
and 3904 connected)
0x38
RO
–
–
–
R4TD
R3TD
R2TD
R1TD
–
–
TCRIT1 Mask
0x0C
R/W
–
–
–
R4TM
R3TM
R2T1M
R1T1M
LTM
0x19
TCRIT2 Mask
0x0D
R/W
–
–
–
R4TM
R3TM
R2T2M
R1T2M
LTM
0x00
TCRIT3 Mask
0x0E
R/W
–
–
–
R4TM
R3TM
R2T2M
R1T2M
LTM
0x07
Local Tcrit Limit
0x40
R/W
0
64
32
16
8
4
2
1
0x55
Remote 1 Tcrit-1 Limit
0x41
R/W
128
64
32
16
8
4
2
1
0x6E
Remote 2 Tcrit-1 Limit
0x42
R/W
128
64
32
16
8
4
2
1
0x6E
Remote 3 Tcrit Limit
0x43
R/W
128
64
32
16
8
4
2
1
0x55
Remote 4 Tcrit Limit
0x44
R/W
128
64
32
16
8
4
2
1
0x55
Remote 1 Tcrit-2 and Tcrit-3 Limit
0x49
R/W
128
64
32
16
8
4
2
1
0x55
Remote 2 Tcrit-2 and Tcrit-3 Limit
0x4A
R/W
128
64
32
16
8
4
2
1
0x55
Common Tcrit Hysteresis
0x5A
R/W
0
0
0
16
8
4
2
1
0x0A
Manufacturer ID
0xFE
RO
0
0
0
0
0
0
0
1
0x01
Revision ID
0xFF
RO
0
1
1
1
1
0
0
1
0x79
VALUE REGISTERS
For data synchronization purposes, the MSB register should be read first if the user wants to read both MSB and
LSB registers. The LSB will be locked after the MSB is read. The LSB will be unlocked after being read. If the
user reads MSBs consecutively, each time the MSB is read, the LSB associated with that temperature will be
locked in and override the previous LSB value locked-in
Local Value Registers
Register Name
Command Read/
Byte
Write
(Hex)
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
Local Temp MSB
0x10
RO
SIGN
64
32
16
8
4
2
1
–
Local Temp LSB
0x20
RO
1/2
1/4
1/8
0
0
0
0
0
–
22
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
Bit(s)
Bit Name
Read/
Write
Description
7
SIGN
RO
Sign bit
6
64
RO
bit weight 64°C
5
32
RO
bit weight 32°C
4
16
RO
bit weight 16°C
3
8
RO
bit weight 8°C
2
4
RO
bit weight 4°C
1
2
RO
bit weight 2°C
0
1
RO
bit weight 1°C
Bit(s)
Bit Name
Read/
Write
Description
7
1/2
RO
bit weight 1/2°C (0.5°C)
6
1/4
RO
bit weight 1/4°C (0.25°C)
5
1/8
RO
bit weight 1/8°C (0.125°C)
4-0
0
RO
Reserved – will report "0" when read.
The Local temperature MSB value register
range is +127°C to −128°C. The value
programmed in this register is used to
determine a local temperature error event.
The Local Limit register range is 0°C to
127°C. The value programmed in this
register is used to determine a local
temperature error event.
Remote Temperature Value Registers with Signed Format
Register Name
Command Read/
Byte
Write
(Hex)
Remote Temp 1 MSB – Signed
Remote Temp 1 LSB – Signed, Digital
Filter Off
Remote Temp 1 LSB – Signed, Digital
Filter On
Remote Temp 2 MSB – Signed
Remote Temp 2 LSB – Signed, Digital
Filter Off
Remote Temp 2 LSB – Signed, Digital
Filter On
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
32
16
8
4
2
1
–
0
0
0
0
0
0
–
1/16
1/32
32
16
8
4
2
1
–
0
0
0
0
0
0
–
1/16
1/32
0x11
RO
SIGN
64
0x21
RO
1/2
1/8
0x12
RO
SIGN
64
0x22
RO
1/2
1/8
Remote Temp 3 MSB – Signed
0x13
RO
SIGN
64
32
16
8
4
2
1
–
Remote Temp 3 LSB – Signed
0x23
RO
1/2
1/8
0
0
0
0
0
0
–
Remote Temp 4 MSB – Signed
0x14
RO
SIGN
64
32
16
8
4
2
1
–
Remote Temp 4 LSB – Signed
0x24
RO
1/2
1/8
0
0
0
0
0
0
–
The Local temperature MSB value register range is +127°C to −128°C. The value programmed in this register is
used to determine a local temperature error event.
Bit(s)
Bit Name
Read/
Write
Description
7
SIGN
RO
Sign bit
6
64
RO
bit weight 64°C
5
32
RO
bit weight 32°C
4
16
RO
bit weight 16°C
3
8
RO
bit weight 8°C
2
4
RO
bit weight 4°C
1
2
RO
bit weight 2°C
0
1
RO
bit weight 1°C
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
23
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Bit(s)
Bit Name
Read/
Write
Description
7
1/2
RO
bit weight 1/2°C (0.5°C)
6
1/4
RO
bit weight 1/4°C (0.25°C)
5
1/8
RO
bit weight 1/8°C (0.125°C)
4
0 or 1/16
RO
When the digital filter is disabled this bit will always read "0".
When the digital filter is enabled this bit will report 1/16°C (0.0625°C) bit state.
3
0 or 1/32
RO
When the digital filter is disabled this bit will always read "0".
When the digital filter is enabled this bit will report 1/32°C (0.03125°C) bit state.
2-0
0
RO
Reserved – will report "0" when read.
Remote Temperature Value Registers with Unsigned Format
Register Name
Command Read/
Byte
Write
(Hex)
Remote Temp 1 MSB – Unsigned
Remote Temp 1 LSB – Unsigned,
Digital Filter Off
Remote Temp 1 LSB – Unsigned,
Digital Filter On
Remote Temp 2 MSB – Unsigned
Remote Temp 2 LSB – Unsigned,
Digital Filter Off
Remote Temp 2 LSB – Unsigned,
Digital Filter On
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
32
16
8
4
2
1
–
0
0
0
0
0
0
–
1/16
1/32
32
16
8
4
2
1
–
0
0
0
0
0
0
–
1/16
1/32
0x19
RO
128
64
0x29
RO
1/2
1/8
0x1A
RO
128
64
0x2A
RO
1/2
1/8
Remote Temp 3 MSB – Unsigned
0x1B
RO
128
64
32
16
8
4
2
1
–
Remote Temp 3 LSB – Unsigned
0x2B
RO
1/2
1/8
0
0
0
0
0
0
–
Remote Temp 4 MSB – Unsigned
0x1C
RO
128
64
32
16
8
4
2
1
–
Remote Temp 4 LSB – Unsigned
0x2C
RO
1/2
1/8
0
0
0
0
0
0
–
Bit(s)
Bit Name
Read/
Write
Description
7
SIGN
RO
bit weight 128°C
6
64
RO
bit weight 64°C
5
32
RO
bit weight 32°C
4
16
RO
bit weight 16°C
3
8
RO
bit weight 8°C
2
4
RO
bit weight 4°C
1
2
RO
bit weight 2°C
0
1
RO
bit weight 1°C
Bit(s)
Bit Name
Read/
Write
Description
7
1/2
RO
bit weight 1/2°C (0.5°C)
6
1/4
RO
bit weight 1/4°C (0.25°C)
5
1/8
RO
bit weight 1/8°C (0.125°C)
4
0 or 1/16
RO
When the digital filter is disabled this bit will always read "0".
When the digital filter is enabled this bit will report 1/16°C (0.0625°C) bit state.
3
0 or 1/32
RO
When the digital filter is disabled this bit will always read "0".
When the digital filter is enabled this bit will report 1/32°C (0.03125°C) bit state.
2-0
0
RO
Reserved – will report "0" when read.
24
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
DIODE CONFIGURATION REGISTERS
Diode Model Select
Register Name
Command Read/
Byte
Write
(Hex)
Diode Model Select
0x30
R/W
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
0
0
0
R4TE
R3TE
R2TE
R1TE
0
0x02
Bit(s)
Bit Name
Read/
Write
Description
7-5
0
RO
Reserved – will report "0" when read.
4
R4TE
R/W
Remote 4 TruTherm Enable
3
R3TE
R/W
Remote 3 TruTherm Enable
2
R2TE
R/W
Remote 2 TruTherm Enable
1
R1TE
R/W
Remote 1 TruTherm Enable
0
0
RO
Reserved – will report "0" when read.
Logic 1 selects diode model 1 TruTherm
BJT beta compensation technology enabled
(Ex: Intel 65 nm technology)
Logic 0 selects diode model 2 MMBT3904
Remote 1-4 Offset
Register Name
Command Read/
Byte
Write
(Hex)
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
Remote 1 Offset
0x31
R/W
SIGN
32
16
8
4
2
1
1/2
0x00
Remote 2 Offset
0x32
R/W
SIGN
32
16
8
4
2
1
1/2
0x00
Remote 3 Offset
0x33
R/W
SIGN
32
16
8
4
2
1
1/2
0x00
Remote 4 Offset
0x34
R/W
SIGN
32
16
8
4
2
1
1/2
0x00
Bit(s)
Bit Name
Read/
Write
Description
7
SIGN
R/W
Sign bit
6
32
R/W
bit weight 32°C
5
16
R/W
bit weight 16°C
4
8
R/W
bit weight 8°C
3
4
R/W
bit weight 4°C
2
2
R/W
bit weight 2°C
1
1
R/W
bit weight 1°C
0
1/2
R/W
bit weight 1/2°C (0.5°C)
All registers have 2’s complement format.
The offset range for each remote is
+63.5°C/−64°C. The value programmed in
this register is directly added to the actual
reading of the ADC and the modified number
is reported in the remote value registers.
CONFIGURATION REGISTERS
Main Configuration Register
Register Name
Command Read/
Byte
Write
(Hex)
Configuration
0x03
R/W
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
STBY
–
–
–
–
R4QE
R3QE
0x03
Bit(s)
Bit Name
Read/
Write
Description
7
–
RO
Reserved will report "0" when read.
6
STBY
R/W
Software Standby
1 – standby (when in this mode one conversion sequence can be initiated by writing to the
one-shot register)
0 – active/converting
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
25
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Bit(s)
Bit Name
Read/
Write
Description
5–2
–
RO
Reserved – will report "0" when read.
1
R4QE
R/W
Fault queue enable for Remote 4
1– Fault queue enabled
0– Fault queue disabled
0
R3QE
R/W
Fault queue enable for Remote 3
1– Fault queue enabled
0– Fault queue disabled
Conversion Rate Register
Register Name
Command Read/
Byte
Write
(Hex)
Conversion Rate
0x04
R/W
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
–
–
–
–
–
CR1
CR0
0x02
Bit(s)
Bit Name
Read/
Write
Description
7-2
–
RO
Reserved – will report "0" when read.
1-0
CR[1:0]
R/W
Conversion rate control bits modify the time interval for conversion of the channels enabled.
The channels enabled are converted sequentially then standby mode enabled for the
remainder of the time interval.
CR[1:0]
Conversion Rate
00
continuous (30 ms to 143 ms)
01
0.364 s
10
1s
11
2.5 s
Channel Conversion Enable
When a conversion is disabled for a particular channel it is skipped. The continuous conversion rate is effected
all other conversion rates are not effected as extra standby time is inserted in order to compensate. See
Conversion Rate Register.
Register Name
Command Read/
Byte
Write
(Hex)
Channel Conversion Enable
0x05
R/W
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
–
–
R4CE
R3CE
R2CE
R1CE
LCE
0x1F
Bit(s)
Bit Name
Read/
Write
Description
7–5
–
RO
Reserved – will report "0" when read.
4
R4CE
R/W
Remote 4 Temperature Conversion Enable
1– Remote 4 temp conversion enabled
0– Remote 4 temp conversion disabled
3
R3CE
R/W
Remote 3 Temperature Conversion Enable
1– Remote 3 temp conversion enabled
0– Remote 3 temp conversion disabled
2
R2CE
R/W
Remote 2 Temperature Conversion Enable
1– Remote 2 temp conversion enabled
0– Remote 2 temp conversion disabled
1
R1CE
R/W
Remote 1 Temperature Conversion Enable
1– Remote 1 temp conversion enabled
0– Remote 1 temp conversion disabled
0
LCE
R/W
Local Temperature Conversion Enable
1– Local temp conversion enabled
0– Local temp conversion disabled
26
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
Filter Setting
Register Name
Command Read/
Byte
Write
(Hex)
Filter Setting
0x06
R/W
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
–
–
–
R2F1
R2F0
R1F1
R1F0
0x0F
Bit(s)
Bit Name
Read/
Write
Description
7–4
–
RO
Reserved – will report "0" when read.
3–2
R2F[1:0]
R/W
Remote Channel 2 Filter Enable Bits
R2F[1:0]
1–0
R1F[1:0]
R/W
TEMPERATURE CONVERSION
SEQUENCE State
00
disable all digital filtering
01
enable basic filter
10
reserved (do not use)
11
enable enhanced filter
Remote Channel 1 Filter Enable
R1F[1:0]
Filter State
00
disable all digital filtering
01
enable basic filter
10
reserved (do not use)
11
enable enhanced filter
1-Shot
Register Name
Command Read/
Byte
Write
(Hex)
1-Shot
0x0F
WO
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
–
–
–
–
–
–
–
–
Bit(s)
Bit Name
Read/
Write
Description
7–0
-
WO
Writing to this register activates one conversion for all the enabled channels if
the chip is in standby mode (i.e. standby bit = 1). The actual data written does
not matter and is not stored.
STATUS REGISTERS
Common Status Register
Register Name
Command Read/
Byte
Write
(Hex)
Common Status Register
0x02
RO
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
BUSY
NR
–
–
SR4F
SR3F
SR2F
SR1F
0x00
Bit(s)
Bit Name
Read/
Write
Description
7
BUSY
RO
Busy bit (device converting)
6
NR
RO
Not Ready bit (30 ms), indicates power up initialization sequence is in progress
5–4
–
RO
Reserved – will report "0" when read.
3
SR4F
RO
Status Register 4 Flag:
1 – indicates that Status Register 4 has at least one bit set
0 – indicates that all of Status Register 4 bits are cleared
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
27
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Bit(s)
Bit Name
Read/
Write
Description
2
SR3F
RO
Status Register 3 Flag:
1 – indicates that Status Register 3 has at least one bit set
0 – indicates that all of Status Register 3 bits are cleared
1
SR2F
RO
Status Register 2 Flag:
1 – indicates that Status Register 2 has at least one bit set
0 – indicates that all of Status Register 2 bits are cleared
0
SR1F
RO
Status Register 1 Flag:
1 – indicates that Status Register 1 has at least one bit set
0 – indicates that all of Status Register 1 bits are cleared
Status 1 Register (Diode Fault)
Status fault bits for open or shorted diode (i.e. Short Fault: D+ shorted to Ground or D-; Open Fault: D+ shorted
to VDD, or floating). During fault conditions the temperature reading is 0 °C if unsigned value registers are read or
–128.000 °C if signed value registers are read.
Register Name
Command Read/
Byte
Write
(Hex)
Status 1 (Diode Fault)
0x07
RO
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
R4DO
R4DS
R3DO
R3DS
R2DO
R2DS
R1DO
R1DS
–
Bit(s)
Bit Name
Read/
Write
Description
7
R4DO
RO
Remote 4 diode open fault status:
1 – indicates that remote 4 diode has an "open" fault
0 – indicates that remote 4 diode does not have an "open" fault
6
R4DS
RO
Remote 4 diode short fault status:
1 – indicates that remote 4 diode has a "short" fault
0 – indicates that remote 4 diode does not have a "short" fault
5
R3DO
RO
Remote 3 diode open fault status:
1 – indicates that remote 3 diode has an "open" fault
0 – indicates that remote 3 diode does not have an "open" fault
4
R3DS
RO
Remote 3 diode short fault status:
1 – indicates that remote 3 diode has a "short" fault
0 – indicates that remote 3 diode does not have a "short" fault
3
R2DO
RO
Remote 2 diode open fault status:
1 – indicates that remote 2 diode has an "open" fault
0 – indicates that remote 2 diode does not have an "open" fault
2
R2DS
RO
Remote 2 diode short fault status:
1 – indicates that remote 2 diode has a "short" fault
0 – indicates that remote 2 diode does not have a "short" fault
1
R1DO
RO
Remote 1 diode open fault status:
1 – indicates that remote 1 diode has an "open" fault
0 – indicates that remote 1 diode does not have an "open" fault
0
R1DS
RO
Remote 1 diode short fault status:
1 – indicates that remote 1 diode has a "short" fault
0 – indicates that remote 1 diode does not have a "short" fault
Status 2 (TCRIT1)
Status bits for TCRIT1. When one or more of these bits are set and if not masked the TCRIT1 output will
activate. TCRIT1 will deactivate when all these bits are cleared.
Register Name
Status 2 (TCRIT1)
28
Command Read/
Byte
Write
(Hex)
0x08
RO
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
–
–
R4T1
R3T1
R2T1
R1T1
LT1
–
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
Bit(s)
Bit Name
Read/
Write
Description
7–5
-
RO
Reserved – will report "0" when read.
4
R4T1
RO
Remote 4 Tcrit Status:
1 – indicates that remote 4 reading is greater than or equal to the value set in Remote 4 Tcrit Limit
register
0 – indicates that that remote 4 reading is less than the value set in Remote 4 Tcrit Limit register
minus the Common Hysteresis value
3
R3T1
RO
Remote 3 Tcrit Status:
1 – indicates that remote 3 reading is greater than or equal to the value set in Remote 3 Tcrit Limit
register
0 – indicates that that remote 3 reading is less than the value set in Remote 3 Tcrit Limit register
minus the Common Hysteresis value
2
R2T1
RO
Remote 2 Tcrit-1 Status:
1 – indicates that remote 2 reading is greater than or equal to the value set in Remote 2 Tcrit-1
Limit register
0 – indicates that that remote 2 reading is less than the value set in Remote 2 Tcrit-1 Limit register
minus the Common Hysteresis value
1
R1T1
RO
Remote 1 Tcrit-1 Status:
1 – indicates that remote 1 reading is greater than or equal to the value set in Remote 1 Tcrit-1
Limit register
0 – indicates that that remote 1 reading is less than the value set in Remote 1 Tcrit-1 Limit register
minus the Common Hysteresis value
0
LT1
RO
Local Tcrit Status:
1 – indicates that local reading is greater than or equal to the value set in Local Tcrit Limit register
0 – indicates that local reading is less than the value set in Local Tcrit Limit register minus the
Common Hysteresis value
Status 3 (TCRIT2)
Status bits for TCRIT2. When one or more of these bits are set and if not masked the TCRIT2 output will
activate. TCRIT2 will deactivate when all these bits are cleared.
Register Name
Command Read/
Byte
Write
(Hex)
Status 3 (TCRIT2)
0x09
RO
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
–
–
R4T2
R3T2
R2T2
R1T2
LT2
–
Bit(s)
Bit Name
Read/
Write
Description
7–5
-
RO
Reserved – will report "0" when read.
4
R4T2
RO
Remote 4 Tcrit Status:
1 – indicates that remote 4 reading is greater than or equal to the value set in Remote 4 Tcrit Limit
register
0 – indicates that that remote 4 reading is less than the value set in Remote 4 Tcrit Limit register
minus the Common Hysteresis value
3
R3T2
RO
Remote 3 Tcrit Status:
1 – indicates that remote 3 reading is greater than or equal to the value set in Remote 3 Tcrit Limit
register
0 – indicates that that remote 3 reading is less than the value set in Remote 3 Tcrit Limit register
minus the Common Hysteresis value
2
R2T2
RO
Remote 2 Tcrit-2 Status:
1 – indicates that remote 2 reading is greater than or equal to the value set in Remote 2 Tcrit-2
Limit register
0 – indicates that that remote 2 reading is less than the value set in Remote 2 Tcrit-2 Limit register
minus the Common Hysteresis value
1
R1T2
RO
Remote 1 Tcrit-2 Status:
1 – indicates that remote 1 reading is greater than or equal to the value set in Remote 1 Tcrit-2
Limit register
0 – indicates that that remote 1 reading is less than the value set in Remote 1 Tcrit-2 Limit register
minus the Common Hysteresis value
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
29
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Bit(s)
Bit Name
Read/
Write
Description
0
LT2
RO
Local Tcrit Status:
1 – indicates that local reading is greater than or equal to the value set in Local Tcrit Limit register
0 – indicates that local reading is less than the value set in Local Tcrit Limit register minus the
Common Hysteresis value
Status 4 (TCRIT3)
Status bits for TCRIT3. When one or more of these bits are set and if not masked the TCRIT3 output will
activate. TCRIT3 will deactivate when all these bits are cleared.
Register Name
Command Read/
Byte
Write
(Hex)
Status 4 (TCRIT3)
0x0A
RO
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
–
–
R4T3
R3T3
R2T3
R1T3
LT3
–
Bit(s)
Bit Name
Read/
Write
Description
7–5
-
RO
Reserved – will report "0" when read.
4
R4T3
RO
Remote 4 Tcrit Status:
1 – indicates that remote 4 reading is greater than or equal to the value set in Remote 4 Tcrit Limit
register
0 – indicates that that remote 4 reading is less than the value set in Remote 4 Tcrit Limit register
minus the Common Hysteresis value
3
R3T3
RO
Remote 3 Tcrit Status:
1 – indicates that remote 3 reading is greater than or equal to the value set in Remote 3 Tcrit Limit
register
0 – indicates that that remote 3 reading is less than the value set in Remote 3 Tcrit Limit register
minus the Common Hysteresis value
2
R2T3
RO
Remote 2 Tcrit-2 Status:
1 – indicates that remote 2 reading is greater than or equal to the value set in Remote 2 Tcrit-2
Limit register
0 – indicates that that remote 2 reading is less than the value set in Remote 2 Tcrit-2 Limit register
minus the Common Hysteresis value
1
R1T3
RO
Remote 1 Tcrit-2 Status:
1 – indicates that remote 1 reading is greater than or equal to the value set in Remote 1 Tcrit-2
Limit register
0 – indicates that that remote 1 reading is less than the value set in Remote 1 Tcrit-2 Limit register
minus the Common Hysteresis value
0
LT3
RO
Local Tcrit Status:
1 – indicates that local reading is greater than or equal to the value set in Local Tcrit Limit register
0 – indicates that local reading is less than the value set in Local Tcrit Limit register minus the
Common Hysteresis value
Diode Model Status
Register Name
Command Read/
Byte
Write
(Hex)
Diode Model Status (TruTherm on and
3904 connected)
0x38
RO
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
–
–
R4TD
R3TD
R2TD
R1TD
–
–
Bit(s)
Bit Name
Read/
Write
Description
7-5
–
RO
Reserved – will report "0" when read.
4
R4TD
RO
Remote 4 TruTherm BJT beta compensation on and 3904 detect:
1 – indicates that for channel 4 TruTherm is ON and 3904 connected
0 – indicates proper operation
3
R3TD
RO
Remote 3 TruTherm BJT beta compensation on and 3904 detect:
1 – indicates that for channel 3 TruTherm is ON and 3904 connected
0 – indicates proper operation
30
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
Bit(s)
Bit Name
Read/
Write
Description
2
R2TD
RO
Remote 2 TruTherm BJT beta compensation on and 3904 detect:
1 – indicates that for channel 2 TruTherm is ON and 3904 connected
0 – indicates proper operation
1
R1TD
RO
Remote 1 TruTherm BJT beta compensation on and 3904 detect:
1 – indicates that for channel 4 TruTherm is ON and 3904 connected
0 – indicates proper operation
0
–
RO
Reserved – will report "0" when read.
MASK REGISTERS
TCRIT1 Mask Register
The mask bits in this register allow control over which error events propagate to the TCRIT1 pin.
Register Name
Command Read/
Byte
Write
(Hex)
TCRIT1 Mask
0x0C
R/W
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
–
–
R4TM
R3TM
R2T1
M
R1T1
M
LTM
0x19
Bit(s)
Bit Name
Read/
Write
Description
7-5
–
RO
Reserved – will report "0" when read.
4
R4TM
R/W
Remote 4 Tcrit Mask:
1 – prevents the remote 4 temperature error event from propagating to the TCRIT1 pin
0 – allows the remote 4 temperature error event to propagate to the TCRIT1 pin
3
R3TM
R/W
Remote 3 Tcrit Mask:
1 – prevents the remote 3 temperature error event from propagating to the TCRIT1 pin
0 – allows the remote 3 temperature error event to propagate to the TCRIT1 pin
2
R2T1M
R/W
Remote 2 Tcrit-1 Mask:
1 – prevents the remote 2 temperature error event from propagating to the TCRIT1 pin
0 – allows the remote 2 temperature error event to propagate to the TCRIT1 pin
1
R1T1M
R/W
Remote 1 Tcrit-1 Mask:
1 – prevents the remote 1 temperature error event from propagating to the TCRIT1 pin
0 – allows the remote 1 temperature error event to propagate to the TCRIT1 pin
0
LTM
R/W
Local Tcrit Mask:
1 – prevents the local temperature error event from propagating to the TCRIT1 pin
0 – allows the local temperature error event to propagate to the TCRIT1 pin
TCRIT2 Mask Registers
Register Name
Command Read/
Byte
Write
(Hex)
TCRIT2 Mask
0x0D
R/W
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
–
–
R4TM
R3TM
R2T2
M
R1T2
M
LTM
0x00
Bit(s)
Bit Name
Read/
Write
Description
7-5
–
RO
Reserved – will report "0" when read.
4
R4TM
R/W
Remote 4 Tcrit Mask:
1 – prevents the remote 4 temperature error event from propagating to the TCRIT2 pin
0 – allows the remote 4 temperature error event to propagate to the TCRIT2 pin
3
R3TM
R/W
Remote 3 Tcrit Mask:
1 – prevents the remote 3 temperature error event from propagating to the TCRIT2 pin
0 – allows the remote 3 temperature error event to propagate to the TCRIT2 pin
2
R2T2M
R/W
Remote 2 Tcrit-2 Mask:
1 – prevents the remote 2 temperature error event from propagating to the TCRIT2 pin
0 – allows the remote 2 temperature error event to propagate to the TCRIT2 pin
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
31
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Bit(s)
Bit Name
Read/
Write
Description
1
R1T2M
R/W
Remote 1 Tcrit-2 Mask:
1 – prevents the remote 1 temperature error event from propagating to the TCRIT2 pin
0 – allows the remote 1 temperature error event to propagate to the TCRIT2 pin
0
LTM
R/W
Local Tcrit Mask:
1 – prevents the local temperature error event from propagating to the TCRIT2 pin
0 – allows the local temperature error event to propagate to the TCRIT2 pin
TCRIT3 Mask Register
The mask bits in this register allow control over which error events propagate to the TCRIT3 pin.
Register Name
Command Read/
Byte
Write
(Hex)
TCRIT3 Mask
0x0E
R/W
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
–
–
–
R4TM
R3TM
R2T2
M
R1T2
M
LTM
0x07
Bit(s)
Bit Name
Read/
Write
Description
7-5
–
RO
Reserved – will report "0" when read.
4
R4TM
R/W
Remote 4 Tcrit Mask:
1 – prevents the remote 4 temperature error event from propagating to the TCRIT3 pin
0 – allows the remote 4 temperature error event to propagate to the TCRIT3 pin
3
R3TM
R/W
Remote 3 Tcrit Mask:
1 – prevents the remote 3 temperature error event from propagating to the TCRIT3 pin
0 – allows the remote 3 temperature error event to propagate to the TCRIT3 pin
2
R2T2M
R/W
Remote 2 Tcrit-2 Mask:
1 – prevents the remote 2 temperature error event from propagating to the TCRIT3 pin
0 – allows the remote 2 temperature error event to propagate to the TCRIT3 pin
1
R1T2M
R/W
Remote 1 Tcrit-2 Mask:
1 – prevents the remote 1 temperature error event from propagating to the TCRIT3 pin
0 – allows the remote 1 temperature error event to propagate to the TCRIT3 pin
0
LTM
R/W
Local Tcrit Mask:
1 – prevents the local temperature error event from propagating to the TCRIT3 pin
0 – allows the local temperature error event to propagate to the TCRIT3 pin
LIMIT REGISTERS
Local Limit Register
The Local Limit register range is 0°C to 127°C. The value programmed in this register is used to determine a
local temperature error event.
Register Name
Command Read/
Byte
Write
(Hex)
Local Tcrit Limit
0x40
R/W
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
0
64
32
16
8
4
2
1
0x55
Bit(s)
Bit Name
Read/
Write
Description
7
0
R0
Read only bit will always report "0".
6
64
R/W
bit weight 64°C
5
32
R/W
bit weight 32°C
4
16
R/W
bit weight 16°C
3
8
R/W
bit weight 8°C
2
4
R/W
bit weight 4°C
1
2
R/W
bit weight 2°C
32
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
Bit(s)
Bit Name
Read/
Write
Description
0
1
R/W
bit weight 1°C
Remote Limit Registers
The range for these registers is 0°C to 255°C.
Register Name
Command Read/
Byte
Write
(Hex)
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
Remote 1 Tcrit-1 Limit (used by
TCRIT1 error events)
0x41
R/W
128
64
32
16
8
4
2
1
0x6E
Remote 2 Tcrit-1 Limit (used by
TCRIT1 error events)
0x42
R/W
128
64
32
16
8
4
2
1
0x6E
Remote 3 Tcrit Limit (used by TCRIT1,
TCRIT2 and TCRIT3 error events)
0x43
R/W
128
64
32
16
8
4
2
1
0x55
Remote 4 Tcrit Limit (used by TCRIT1,
TCRIT2 and TCRIT3 error events)
0x44
R/W
128
64
32
16
8
4
2
1
0x55
Remote 1 Tcrit-2 and Tcrit3 Limit (used
by TCRIT2 and TCRIT3 error events)
0x49
R/W
128
64
32
16
8
4
2
1
0x55
Remote 2 Tcrit-2 and Tcrit3 Limit (used
by TCRIT2 and TCRIT3 error events)
0x4A
R/W
128
64
32
16
8
4
2
1
0x55
Bit(s)
Bit Name
Read/
Write
Description
7
128
R/W
bit weight 128°C
6
64
R/W
bit weight 64°C
5
32
R/W
bit weight 32°C
4
16
R/W
bit weight 16°C
3
8
R/W
bit weight 8°C
2
4
R/W
bit weight 4°C
1
2
R/W
bit weight 2°C
0
1
R/W
bit weight 1°C
Table 9. Limit assignments for each TCRIT output pin:
Output Pin
Remote 4
Remote 3
Remote 2
Remote 1
Local
TCRIT1
Remote 4 Tcrit Limit
Remote 3 Tcrit Limit
Remote 2 Tcrit-1
Limit
Remote 1 Tcrit-1
Limit
Local Tcrit Limit
TCRIT2
Remote 4 Tcrit Limit
Remote 3 Tcrit Limit
Remote 2 Tcrit-2
Limit
Remote 1 Tcrit-2
Limit
Local Tcrit Limit
TCRIT3
Remote 4 Tcrit Limit
Remote 3 Tcrit Limit
Remote 2 Tcrit-2
Limit
Remote 1 Tcrit-2
Limit
Local Tcrit Limit
Common Tcrit Hysteresis Register
The hysteresis register range is 0°C to 32°C. The value programmed in this register is used to modify all the limit
values for decreasing temperature.
Register Name
Common Tcrit Hysteresis
Command Read/
Byte
Write
(Hex)
0x5A
R/W
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
0
0
0
16
8
4
2
1
0x0A
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
33
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Bit(s)
Bit Name
Read/
Write
Description
7
0
RO
Read only bit will always report "0".
6
0
RO
Read only bit will always report "0".
5
0
RO
Read only bit will always report "0".
4
16
R/W
bit weight 16°C
3
8
R/W
bit weight 8°C
2
4
R/W
bit weight 4°C
1
2
R/W
bit weight 2°C
0
1
R/W
bit weight 1°C
IDENTIFICATION REGISTERS
Register Name
Command Read/
Byte
Write
(Hex)
D7
D6
D5
D4
D3
D2
D1
D0
POR
Default
(Hex)
Manufacturer ID
0xFE
RO
0
0
0
0
0
0
0
1
0x01
Revision ID
0xFF
RO
0
1
1
1
1
0
0
1
0x79
Applications Hints
The LM95234 can be applied easily in the same way as other integrated-circuit temperature sensors, and its
remote diode sensing capability allows it to be used in new ways as well. It can be soldered to a printed circuit
board, and because the path of best thermal conductivity is between the die and the pins, its temperature will
effectively be that of the printed circuit board lands and traces soldered to the LM95234's pins. This presumes
that the ambient air temperature is almost the same as the surface temperature of the printed circuit board; if the
air temperature is much higher or lower than the surface temperature, the actual temperature of the LM95234 die
will be at an intermediate temperature between the surface and air temperatures. Again, the primary thermal
conduction path is through the leads, so the circuit board temperature will contribute to the die temperature much
more strongly than will the air temperature.
To measure temperature external to the LM95234's die, incorporates remote diode sensing technology. This
diode can be located on the die of a target IC, allowing measurement of the IC's temperature, independent of the
LM95234's temperature. A discrete diode can also be used to sense the temperature of external objects or
ambient air. Remember that a discrete diode's temperature will be affected, and often dominated, by the
temperature of its leads. Most silicon diodes do not lend themselves well to this application. It is recommended
that an MMBT3904 transistor base emitter junction be used with the collector tied to the base.
The LM95234’s TruTherm BJT beta compensation technology allows accurate sensing of integrated thermal
diodes, such as those found on most processors. With TruTherm technology turned off, the LM95234 can
measure a diode-connected transistor such as the MMBT3904 or the thermal diode found in an AMD processor.
The LM95234 has been optimized to measure the remote thermal diode integrated in a typical Intel processor on
65 nm or 90 nm process or an MMBT3904 transistor. Using the Remote Diode Model Select register any of the
four remote inputs can be optimized for a typical Intel processor on 65 nm or 90 nm process or an MMBT3904.
DIODE NON-IDEALITY
Diode Non-Ideality Factor Effect on Accuracy
When a transistor is connected as a diode, the following relationship holds for variables VBE, T and IF:
IF = IS x
ª §KVxBEV · º
«e© t¹ -1»
«
»
¬
¼
where
•
•
34
Vt =
kT
q
q = 1.6×10−19 Coulombs (the electron charge),
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
•
•
•
•
•
•
T = Absolute Temperature in Kelvin
k = 1.38×10−23 joules/K (Boltzmann's constant),
η is the non-ideality factor of the process the diode is manufactured on,
IS = Saturation Current and is process dependent,
If = Forward Current through the base-emitter junction
VBE = Base-Emitter Voltage drop
(1)
In the active region, the -1 term is negligible and may be eliminated, yielding the following equation
ª §KVxBEV ·º
IF = IS x «e© t ¹»
«
¬
»
¼
(2)
In Equation 2, η and IS are dependant upon the process that was used in the fabrication of the particular diode.
By forcing two currents with a very controlled ratio(IF2 / IF1) and measuring the resulting voltage difference, it is
possible to eliminate the IS term. Solving for the forward voltage difference yields the relationship:
I F2
kT ·
x ln § ·
q
© ¹ © I F1¹
'VBE = K x §
(3)
Solving Equation 3 for temperature yields:
q x 'VBE
T=
§ IF2 ·
¸
© IF1 ¹
K x k x ln ¨¨
(4)
Equation 4 holds true when a diode connected transistor such as the MMBT3904 is used. When this “diode”
equation is applied to an integrated diode such as a processor transistor with its collector tied to GND as shown
in Figure 23 it will yield a wide non-ideality spread. This wide non-ideality spread is not due to true process
variation but due to the fact that Equation 4 is an approximation.
TruTherm BJT beta compensation technology uses the transistor equation, Equation 5, which is a more accurate
representation of the topology of the thermal diode found in an FPGA or processor.
T=
q x 'VBE
§I ·
K x k x ln¨¨ C2 ¸
© IC1 ¹
(5)
7
IE = IF
D1+
100 pF
PROCESSOR
IC IR
5
MMBT3904
IR
100 pF
D-
6
IF
D2+
LM95234
Figure 23. Thermal Diode Current Paths
TruTherm should only be enabled when measuring the temperature of a transistor integrated as shown in the
processor of Figure 23, because Equation 5 only applies to this topology.
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
35
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
Calculating Total System Accuracy
The voltage seen by the LM95234 also includes the IFRS voltage drop of the series resistance. The non-ideality
factor, η, is the only other parameter not accounted for and depends on the diode that is used for measurement.
Since ΔVBE is proportional to both η and T, the variations in η cannot be distinguished from variations in
temperature. Since the non-ideality factor is not controlled by the temperature sensor, it will directly add to the
inaccuracy of the sensor. For the for Intel processor on 65 nm process, Intel specifies a +4.06%/−0.897%
variation in η from part to part when the processor diode is measured by a circuit that assumes diode equation,
Equation 4, as true. As an example, assume a temperature sensor has an accuracy specification of ±1.0°C at a
temperature of 80°C (353 Kelvin) and the processor diode has a non-ideality variation of +1.19%/−0.27%. The
resulting system accuracy of the processor temperature being sensed will be:
TACC = + 1.0°C + (+4.06% of 353 K) = +15.3 °C
(6)
TACC = - 1.0°C + (−0.89% of 353 K) = −4.1 °C
(7)
and
TrueTherm technology uses the transistor equation, Equation 4, resulting in a non-ideality spread that truly
reflects the process variation which is very small. The transistor equation non-ideality spread is ±0.39% for the
Intel processor on 90 nm process. The resulting accuracy when using TruTherm BJT beta compensation
technology improves to:
TACC = ±0.75°C + (±0.39% of 353 K) = ± 2.16 °C
(8)
The next error term to be discussed is that due to the series resistance of the thermal diode and printed circuit
board traces. The thermal diode series resistance is specified on most processor data sheets. For Intel
processors in 65 nm process, this is specified at 4.52Ω typical. The LM95234 accommodates the typical series
resistance of Intel Processor on 65 nm process. The error that is not accounted for is the spread of the
processor's series resistance, that is 2.79Ω to 6.24Ω or ±1.73Ω. The equation to calculate the temperature error
due to series resistance (TER) for the LM95234 is simply:
ºC ·
§
TER = ¨0.62 : ¸ x RPCB
©
¹
(9)
Solving Equation 9 for RPCB equal to ±1.73Ω results in the additional error due to the spread in the series
resistance of ±1.07°C. The spread in error cannot be canceled out, as it would require measuring each individual
thermal diode device. This is quite difficult and impractical in a large volume production environment.
Equation 9 can also be used to calculate the additional error caused by series resistance on the printed circuit
board. Since the variation of the PCB series resistance is minimal, the bulk of the error term is always positive
and can simply be cancelled out by subtracting it from the output readings of the LM95234.
36
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
Transistor Equation ηT, non-ideality
Processor Family
Intel Processor on 65 nm process
Series R,Ω
min
typ
max
0.997
1.001
1.005
Diode Equation ηD, non-ideality
Processor Family
4.52
Series R,Ω
min
typ
max
1
1.0065
1.0125
Pentium III CPUID 68h/PGA370Socket/
Celeron
1.0057
1.008
1.0125
Pentium 4, 423 pin
0.9933
1.0045
1.0368
Pentium 4, 478 pin
0.9933
1.0045
1.0368
Pentium 4 on 0.13 micron process, 2 - 3.06
GHz
1.0011
1.0021
1.0030
3.64
Pentium 4 on 90 nm process
1.0083
1.011
1.023
3.33
Intel Processor on 65 nm process
1.000
1.009
1.050
4.52
1.00151
1.00220
1.00289
3.06
Pentium III CPUID 67h
Pentium M (Centrino)
MMBT3904
1.003
AMD Athlon MP model 6
1.002
1.008
1.016
AMD Athlon 64
1.008
1.008
1.096
AMD Opteron
1.008
1.008
1.096
AMD Sempron
1.00261
0.93
Compensating for Different Non-Ideality
In order to compensate for the errors introduced by non-ideality, the temperature sensor is calibrated for a
particular processor. Texas Instruments temperature sensors are always calibrated to the typical non-ideality and
series resistance of a given processor type. The LM95234 is calibrated for two non-ideality factors and series
resistance values thus supporting the MMBT3904 transistor and Intel processors on 65 nm process without the
requirement for additional trims. For most accurate measurements TruTherm BJT beta compensation mode
should be turned on when measuring the Intel processor on 65 nm process to minimize the error introduced by
the false non-ideality spread (see Diode Non-Ideality Factor Effect on Accuracy). When a temperature sensor
calibrated for a particular processor type is used with a different processor type, additional errors are introduced.
Temperature errors associated with non-ideality of different processor types may be reduced in a specific
temperature range of concern through use of software calibration. Typical Non-ideality specification differences
cause a gain variation of the transfer function, therefore the center of the temperature range of interest should be
the target temperature for calibration purposes. The following equation can be used to calculate the temperature
correction factor (TCF) required to compensate for a target non-ideality differing from that supported by the
LM95234.
TCF =
§ KS - KPROCESSOR · x (TCR + 273K)
KS
©
¹
where
•
•
•
ηS = LM95234 non-ideality for accuracy specification
ηPROCESSOR = Processor thermal diode typical non-ideality
TCR = center of the temperature range of interest in °C
(10)
The correction factor should be directly added to the temperature reading produced by the LM95234. For
example when using the LM95234, with the 3904 mode selected, to measure a AMD Athlon processor, with a
typical non-ideality of 1.008, for a temperature range of 60 °C to 100 °C the correction factor would calculate to:
TCF =
§1.003 - 1.008 · ˜ (80 + 273) = -1.75oC
© 1.003 ¹
(11)
Therefore, 1.75°C should be subtracted from the temperature readings of the LM95234 to compensate for the
differing typical non-ideality target.
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
37
LM95234
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
www.ti.com
PCB LAYOUT FOR MINIMIZING NOISE
Figure 24. Ideal Diode Trace Layout
In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced
on traces running between the remote temperature diode sensor and the LM95234 can cause temperature
conversion errors. Keep in mind that the signal level the LM95234 is trying to measure is in microvolts. The
following guidelines should be followed:
1. VDD should be bypassed with a 0.1 µF capacitor in parallel with 100 pF. The 100 pF capacitor should be
placed as close as possible to the power supply pin. A bulk capacitance of approximately 10 µF needs to be
in the near vicinity of the LM95234.
2. A 100 pF diode bypass capacitor is recommended to filter high frequency noise but may not be necessary.
Make sure the traces to the 100 pF capacitor are matched. Place the filter capacitors close to the LM95234
pins.
3. Ideally, the LM95234 should be placed within 10 cm of the Processor diode pins with the traces being as
straight, short and identical as possible. Trace resistance of 1Ω can cause as much as 0.62°C of error. This
error can be compensated by using simple software offset compensation.
4. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This
GND guard should not be between the D+ and D− lines. In the event that noise does couple to the diode
lines it would be ideal if it is coupled common mode. That is equally to the D+ and D− lines.
5. Avoid routing diode traces in close proximity to power supply switching or filtering inductors.
6. Avoid running diode traces close to or parallel to high speed digital and bus lines. Diode traces should be
kept at least 2 cm apart from the high speed digital traces.
7. If it is necessary to cross high speed digital traces, the diode traces and the high speed digital traces should
cross at a 90 degree angle.
8. The ideal place to connect the LM95234's GND pin is as close as possible to the Processors GND
associated with the sense diode.
9. Leakage current between D+ and GND and between D+ and D− should be kept to a minimum. Thirteen
nano-amperes of leakage can cause as much as 0.2°C of error in the diode temperature reading. Keeping
the printed circuit board as clean as possible will minimize leakage current.
Noise coupling into the digital lines greater than 400 mVp-p (typical hysteresis) and undershoot less than 500 mV
below GND, may prevent successful SMBus communication with the LM95234. SMBus no acknowledge is the
most common symptom, causing unnecessary traffic on the bus. Although the SMBus maximum frequency of
communication is rather low (100 kHz max), care still needs to be taken to ensure proper termination within a
system with multiple parts on the bus and long printed circuit board traces. An RC lowpass filter with a 3 dB
corner frequency of about 40 MHz is included on the LM95234's SMBCLK input. Additional resistance can be
added in series with the SMBDAT and SMBCLK lines to further help filter noise and ringing. Minimize noise
coupling by keeping digital traces out of switching power supply areas as well as ensuring that digital lines
containing high speed data communications cross at right angles to the SMBDAT and SMBCLK lines.
38
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
LM95234
www.ti.com
SNIS136D – AUGUST 2006 – REVISED MARCH 2013
REVISION HISTORY
Changes from Revision C (March 2013) to Revision D
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 38
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95234
39
PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
LM95234CISD/NOPB
ACTIVE
WSON
NHL
14
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 140
95234CI
LM95234CISDX/NOPB
ACTIVE
WSON
NHL
14
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 140
95234CI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM95234CISD/NOPB
WSON
NHL
14
1000
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
LM95234CISDX/NOPB
WSON
NHL
14
4500
330.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM95234CISD/NOPB
WSON
NHL
14
1000
210.0
185.0
35.0
LM95234CISDX/NOPB
WSON
NHL
14
4500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
NHL0014B
SDA14B (Rev A)
www.ti.com
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation
www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom
www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Applications Processors
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2016, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Related manuals

Download PDF

advertising