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Texas Instruments TRF7960A Reference Firmware Description Application notes
Application Report
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TRF7960A Reference Firmware Description
Josh Wyatt, Kostas Aslanidis, Andre Frantzke, Peter Reiser ........................ Texas Instruments Embedded RF
ABSTRACT
This application report describes the firmware implemented in the MSP430F2370 for use with the Texas
Instruments TRF7960A evaluation module (EVM). The TRF7960AEVM is a multiple-standard fully
integrated 13.56-MHz radio frequency identification (RFID) analog front end and data framing reader
system. This reference firmware was developed using the Code Composer Studio™ IDE v4.2.1.00004
and can be also used with IAR Embedded Workbench® IDE for MSP430.
This document is designed for readers who may or may not be experienced with firmware development for
RFID and want to understand the reference firmware and/or develop their own firmware for the
TRF7960A. This application report should be used in conjunction with the relevant ISO or device specific
standard/specification (for example, ISO15693 or ISO14443A/B), which specifies the protocol, specific
commands, and other parameters required for communication between the transponder and the reader.
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Contents
Glossary ...................................................................................................................... 3
Introduction .................................................................................................................. 3
Basic Program Flow ........................................................................................................ 4
Interrupt Service Routine (ISR) ........................................................................................... 6
Anti-Collision Sequences (Stand-Alone and Host Control) .......................................................... 11
Host Control Mode ........................................................................................................ 18
MCU to TRF7960A Communication .................................................................................... 20
Debugging .................................................................................................................. 22
References ................................................................................................................. 24
List of Figures
............................................................................
.........................................................................
main.c Flow Chart ...........................................................................................................
Interrupt Service Routine (1) ..............................................................................................
Interrupt Service Routine (2) ..............................................................................................
Interrupt Service Routine (3) .............................................................................................
ISO15693 Anti-Collision Method Flow Chart (1) ......................................................................
ISO15693 Anti-Collision Method Flow Chart (2) ......................................................................
ISO14443A Anti-Collision Method Flow Chart .........................................................................
ISO14443B Anti-Collision Method Flow Chart .........................................................................
Host Control Flow Chart ..................................................................................................
Measurement Setup for Using Trigger Feature .......................................................................
Oscilloscope Screen Example Using Trigger Feature ................................................................
1
TRF7960A EVM Application Block Diagram
3
2
TRF7960A Embedded System Block Diagram
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23
23
List of Tables
...............................................................................................
1
IRQ Status Register (0x0C)
2
Interrupt Conditions ......................................................................................................... 6
6
Code Composer Studio is a trademark of Texas Instruments.
IAR Embedded Workbench is a registered trademark of IAR Systems AB.
my-d is a trademark of Infineon.
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2
3
Data Frame Format from Host to Reader .............................................................................. 18
4
Host (PC GUI to MCU) Commands ..................................................................................... 19
5
GPIO Output Levels controlled from PC GUI Host Commands ..................................................... 20
6
NFC Type 2 Commands Implemented in TRF7960A Firmware for MSP430F2370 .............................. 20
7
Address/Command Word Distribution
8
Displayed Interrupt Events in Debug Mode ............................................................................ 22
..................................................................................
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Glossary
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1
Glossary
API
EVM
GUI
ID
MCU
NVB
PCD
PICC
PUPI
SPI
UID
UART
VCD
VICC
2
Application Programming Interface
Evaluation Module
Graphical User Interface
Integrated Circuit
Microcontroller (for example, an MSP430 device)
Number of Valid Bits
Proximity Coupling Device (Reader/Writer, ISO14443)
Proximity Integrated Circuit Card (Transponder, ISO14443)
Pseudo Unique PICC Identifier (ISO14443B)
Serial Peripheral Interface
Unique Identifier (ISO15693, ISO14443A)
Universal Asynchronous Receiver Transmitter
Vicinity Coupling Device (Reader/Writer, ISO15693)
Vicinity Integrated Circuit Card (Transponder, ISO15693)
Introduction
The TRF7960A is an integrated analog front end and data framing system for a 13.56-MHz RFID reader
system. Built-in programming options make it suitable for a wide range of applications both in proximity
and vicinity RFID systems. The reader is configured by selecting the desired protocol in the control
registers. Direct access to all control registers allows fine tuning of various reader parameters as needed.
The TRF7960A can be interfaced to an MCU such as the MSP430F2370 through a parallel 10-pin
interface (I/O-0 to I/O-7, IRQ, and Data Clock) or a 4-wire SPI (serial) as shown in Figure 1. The MCU is
the master device and initiates all communication with the TRF7960A. The anti-collision procedures (as
described in the ISO standards 14443A/B and 15693) are implemented in the MCU firmware to help the
reader detect and communicate with one PICC/VICC among several PICCs/VICCs. The MCU is also used
for communication (through a UART IC) to a higher-level host station, which is normally a personal
computer. The user can send the desired commands to the MCU through the GUI. The MCU interprets
the data received and sends appropriate commands to the TRF7960A.
NOTE: It is recommended that firmware developers review ISO14443A/B and ISO15693 if possible.
USB
Interface
Parallel or SPI
Interface
Tag
TRF7960A
USB-UART
Converter
(CP2102)
MCU
(MSP430)
Host
UART
Interface
Figure 1. TRF7960A EVM Application Block Diagram
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Basic Program Flow
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Basic Program Flow
In the reference firmware, the MCU clock is provided by the SYS_CLK output of the reader. Upon power
up, an auxiliary clock signal (60 kHz) is made available to the MCU. When the main reader enable pin
(EN) is set high, the supply regulators are activated and the 13.56-MHz oscillator is started. When the
supplies are settled and the oscillator frequency is stable, the SYS_CLK output is switched from the
auxiliary frequency of 60 kHz to the selected frequency derived from the crystal oscillator. All peripherals
(for example, UART) are initialized and parallel or SPI interface is chosen. At this time, the reader (see
Figure 2) is ready to communicate and perform the required tasks.
Figure 2. TRF7960A Embedded System Block Diagram
The firmware is capable of running in two operating modes:
• Stand-alone (demo)
• Host (terminal) control
In stand-alone mode, when power is applied to the EVM and the initialization sequence has completed,
the firmware automatically detects tags and illuminates a protocol-related LED on the EVM.
During the initialization sequence, the MCU writes appropriate bits to the Chip Status Control register
(0x00) and the ISO Control register (0x01) in the TRF7960A to select the operation mode. It then polls for
transponders in the field by executing the anti-collision sequences (as described in the ISO standards) to
obtain the UIDs/PUPIs or UIDs of PICCs or VICCs in range of the EVM antenna. This is done in the
Iso15693FindTag(), Iso14443aFindTag(), and Iso14443bFindTag() functions (in files iso15693.c,
iso14443A.c, and iso14443B.c).
The stand-alone loop is executed repeatedly until any data is received from the PC through the UART, at
which point the EVM enters the host control mode. Program execution jumps to the second loop and
depending on the data received in the UART buffer, the MCU sends commands to the 12-byte FIFO buffer
in the TRF796x. The two modes are shown in Figure 3. The switch to the host control mode from the
stand-alone mode is done via the host_control_flag.
Standards that are not needed can be disabled in the respective header file, and the source files can be
excluded from the firmware build.
NOTE: The my-d™ move functions can be enabled in the my-d.h file and then the my-d.c file can
be included in the build. The my-d move functions are used with Infineon my-d move
transponders.
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Basic Program Flow
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File: main.c
Function: main
Start
Select Oscillator
initialize UART,
TRF, SPI/Parallel
communication
and MCU clock
Yes
Check flag to see if any
data is present in
UART RXBUF
No
File: host.c
Function: HostCommands
Stand-alone
mode
Scan UART RX buffer for
data received from PC
Set registers for ISO15693
protocol and execute
anticollision sequence to
find tags
File: iso15693.c
Function: Iso15693 FindTag
Remote mode
Execute command
according to data
received
Set registers for ISO14443A
protocol and execute
anticollision sequence to
find tags
File: iso14443a.c
Function : Iso14443aFindTag
Set registers for ISO14443B
protocol and execute
anticollision sequence to
find tags
File: iso14443b.c
Function: Iso14443bFindTag
Figure 3. main.c Flow Chart
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Interrupt Service Routine (ISR)
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Interrupt Service Routine (ISR)
The TRF7960A use its IRQ (pin 13) to prompt the MCU for attention. As there are multiple reasons for
interrupt condition to occur, the TRF7960A IRQ Status register (0x0C) (see Table 1) is present and is read
when interrupt occurs to determine the cause and action to be taken. The interrupt service routines (see
Figure 4, Figure 5, and Figure 6) show the logical flow of what has been implemented in the reference
firmware.
Table 1. IRQ Status Register (0x0C)
Bit
Name
Function
Comments
B7
irq_tx
IRQ set due to end of TX
The flag is set at the start of TX, and the IRQ is sent when TX
is complete (IRQ = 1)
B6
irq_rx
IRQ set due to end of RX
The flag is set at start of RX, and the IRQ is sent when RX is
complete (IRQ = 1)
B5
irq_fifo
FIFO is high or low
Signals when the FIFO is high or low (more than 8 bits during
RX or less than 4 bits during TX).
B4
irq_err1
CRC error
RX CRC error (valid only when B7 of ISO Control register
(0x01) is set to 0)
B3
irq_err2
Parity error
RX parity error (ISO14443A)
B2
irq_err3
Byte framing or EOF error
RX framing or EOF error
B1
irq_col
Collision error
Valid only for ISO14443A or ISO15693 (single subcarrier). Bit is
set as defined by register 0x10.
B0
irq_noresp
No response interrupt
Trigger for MCU to send the next EOF/slot marker as defined
by No Response Wait Time register (0x07) (for ISO15693).
Table 2. Interrupt Conditions
Interrupt Condition
Action to Take
Transmission Complete
Reset FIFO
1. Read Collision Position register (in the TRF796x).
2. Determine the number of valid bytes and bits.
3 . Read valid received bytes and bits in FIFO and write to local buffer.
Collision Occurred
(indicated by Bit 1 in register 0x0C)
1. Read FIFO Status register (in the TRF796x) to determine the number of unread
bytes and bits in the FIFO.
2. Read the data in FIFO and write to local buffer.
3. Reset FIFO.
RX Flag Set
1. Read 9 bytes from FIFO.
2. Check if IRQ pin is still high. If yes, go to condition C.
RX Active and 9 bytes in FIFO
Set error flag
If my-d move functions are enabled check for 4-bit receive
CRC Error
Byte Framing Error
Set error flag
—
No Response Time Out
1. Reset FIFO.
2. Clear interrupt flag.
Any Other Interrupt Condition
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Interrupt Service Routine (ISR)
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NOTE: Although registers 0x0D and 0x0E give the collision position, only register 0x0E is used,
because the anti-collision command in ISO 14443A is maximum of 7 bytes long. Therefore, 8
bits (0x0D) are enough to determine the position.
The lower nibble of the Collision register (0x0E) contains the bit count and the upper nibble
contains the byte count. For example, if the collision position register holds the value 0x43
(0100 0011b), then the collision occurred in the fourth byte at bit position 3.
The anti-collision procedure in the ISO14443A standard is done in such a way that the
reader sends at least two bytes (cascade level and length information) in the anti-collision
command. The collision position is counted from this reader command on. Therefore, to
know the number of valid bytes and bits, subtract 0x20 from the Collision Position register
value.
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Interrupt Service Routine (ISR)
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File: trf796x.c
Function: Trf796xISR
Start
Read IRQ status
register
Is TX
complete?
Yes
Reset FIFO
(Direct command0x0F)
Exit
No
Has collision
occurred?
Yes
A
Yes
B
Yes
C
Yes
Give Error
Message
Yes
Give Error
Message
Yes
Give No
Response
Message
No
Is RX flag set?
No
Is RX active
and 9 bytes in
FIFO?
No
CRC Error?
No
Byte
Framing
Error?
No
No
No response
IRQ
No
Give Error
Message
(Unsupported
IRQ)
Exit
Figure 4. Interrupt Service Routine (1)
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Interrupt Service Routine (ISR)
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File: trf796x.c
Function : Trf796 xISR
A
B
Read Collision
Position Register
Is RX
Error Flag
=2?
Yes
Send Error
Message
No
Read valid bytes
and bits from the
FIFO
Stop Decoders
(Direct Command
0x16)
Reset FIFO
(Direct command
0x0F)
Exit
Read FIFO status
register to determine
number of Bytes in
FIFO
Exit
Read data from
FIFO
Any broken
bytes in
FIFO?
Yes
Read another
byte from FIFO
and mask the
remaining bits
No
Reset FIFO
(Direct command
0x0F)
Exit
Figure 5. Interrupt Service Routine (2)
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Interrupt Service Routine (ISR)
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File: trf796x.c
Function: Trf796xISR
C
Read 9 bytes
from FIFO
Is IRQ pin
high?
No
Exit
Yes
Read IRQ Status
Register
Has EOF been
received?
Yes
B
Yes
Give Error
Message
No
Receive
Error?
No
Exit
Figure 6. Interrupt Service Routine (3)
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Anti-Collision Sequences (Stand-Alone and Host Control)
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5
Anti-Collision Sequences (Stand-Alone and Host Control)
The following sections describe the anti-collision sequences that are to be executed for the corresponding
standards.
5.1
Anti-Collision Sequence for ISO15693
Anti-collision algorithm:
1. The reader sends a mask value and number of slots along with the inventory request. The number of
slots can be 1 or 16.
2. The VICC compares the least significant bits of its UID to the slot number + mask value. If it matches,
it sends a response. If number of slots is 1, comparison is made on mask value only.
3. If only one VICC responds, then there is no collision and the VCD receives the UID.
4. If the reader detects a collision, it increments the slot pointer and makes note of the slot number in
which collision occurred.
5. The reader sends an EOF to switch to the next slot. The VICC increments its slot counter on reception
of EOF.
If the number of slots is 16, steps 1 to 4 are repeated for all 16 slots.
At the end of 16 slots, the reader examines the slot pointer contents. If it is not zero, it means that collision
has occurred in one or more slots.
To determine the new mask value:
1. Increment the mask length by 4.
2. Calculate the new mask, which equals the slot number (in which the collision occurred) plus the old
mask.
3. Decrement slot pointer by 1.
4. Repeat from start with the new mask value until slot pointer is zero.
NOTE: Due to the recursive nature of the algorithm, there is a risk of stack overflow when a
collision occurs. It is highly recommended that the user implement a stack (RAM) overflow
check in the firmware.
The flow charts in Figure 7 and Figure 8 describe the firmware implementation of the anti-collision
sequence.
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File: iso15693.c
Function : Iso15693Anticollision
Start
Check if
bit 5 of flags
is set?
Yes
Number of
slots = 1
Number of
slots = 16
Setup FIFO for
writing and send
Anti-Collision
command to FIFO
Wait till end of TX
interrupt
D
Figure 7. ISO15693 Anti-Collision Method Flow Chart (1)
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File: iso15693.c
Function : Iso15693Anticollision
D
i=1
i < number
of slots
No
Yes
LED 15693 off
No
Yes
Is
Collision
number = 0 or
1 slot in
use?
Yes
No
Yes
found = 1
LED 15693 on
No
Wait till RX
complete
interrupt
Received UID
in buffer?
Yes
found = 1?
Create new mask
using collision
slot number
In
stand-alone
mode?
No
Recursive call of
InventoryRequest
with new mask
Send UID to GUI
Increment slot
pointer and make
note of collision
slot number
Yes
Collision
occurred?
No
Send no
response
message to GUI
Yes
No-response
time-out?
Exit
No
Reset FIFO
(Direct Command
= 0x0F)
No
16 slots used?
Yes
Send EOF (next
slot)
Increment i by1
Figure 8. ISO15693 Anti-Collision Method Flow Chart (2)
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Anti-Collision Sequences (Stand-Alone and Host Control)
5.2
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Anti-Collision Sequence for ISO14443A
The anti-collision loop for ISO14443A PICCs is as follows:
1. The PCD sends the anti-collision command with NVB = 0x20.
2. All PICCs respond with their UIDs.
3. If more than one PICC responds, there is a collision. If there is no collision, steps 4 to 8 should be
skipped.
4. The PCD then reads the Collision Position register to determine the number of valid bytes and bits and
reads the valid data from the FIFO.
5. The PCD assigns the value of the Collision Position register to NVB.
6. The PCD transmits the anti-collision command with the new NVB followed by the valid bits.
7. Now only the PICCs for which part of the UID is equal to the valid bits transmit the remaining bits of
the UID.
8. If a collision occurs again, steps 4 to 7 are repeated.
9. If no collision occurs, the PCD transmits the SELECT command with NVB = 0x70, followed by the
complete UID.
10. The PICC that matches the UID responds with a SAK message.
11. The PCD checks for the cascade bit in the SAK. If it is set, steps 1 to 9 are executed with the
appropriate SELECT command (host command 0xA2).
•
•
•
•
The lower nibble of the Collision register (0x0E) contains the bit count and the upper nibble contains
the byte count. For example, if the collision position register holds the value 0x43 (0100 0011b), then
the collision occurred in the fourth byte at bit position 3.
The anti-collision procedure in the ISO14443A standard is done in such a way that the reader sends at
least to bytes (cascade level and length information) in the anti-collision command. The collision
position is counted from this reader command on. Therefore, to know the number of valid bytes and
bits, subtract 0x20 from the Collision Position register and NVB.
The NVB is similar to the Collision Position register. The lower nibble of the NVB contains the bit
count, and the upper nibble contains the byte count. For example, if the NVB holds the value 0x52, it
means that there are 5 valid bytes and 2 valid bits.
The possible values of SELECT command are 0x93, 0x95, and 0x97, which correspond to the different
cascade levels (1 through 3), as defined by ISO14443A SEL coding.
The flow chart in Figure 9 describes the firmware implementation of the anti-collision sequence.
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File: iso14443a.c
Function: Iso14443 aAnticollision
Start
Transmit
Anticollision
command, NVB
and known UID
Wait for end of
TX interrupt
File: iso14443a.c
Function: Iso14443 aAnticollision
Wait for end of
TX
Data
received w/o
collision or
error?
Yes
No
Yes
Cascade
level 1?
No
Is UID
complete?
No
Combine known
and received
bytes to form
new UID
Set flag to
indicate cascade
level 2 UID is
needed
Send SELECT
command with
NVB=0x70 and
new UID
Yes
Turn LED on or
send UID to host
Exit
Yes
Yes
Cascade
level 2?
Is UID
complete?
No
Copy new UID
from local buffer
Set flag to
indicate cascade
level 3 UID is
needed
Send SELECT
command with
NVB=0x70 and
new UID
No
Yes
Cascade
level 3?
Copy new UID
from local buffer
Turn LED on or
send UID to host
Exit
No
Has collision
occurred?
Yes
Copy new UID
from local buffer
and assign
number of valid
bits to NVB
Recursive call
function
AnticollisionLoopA
with new parameters
No
Further
loops with higher
cascade levels
are needed?
Yes
Recursive call
function
AnticollisionLoopA
with new parameters
No
Exit
Figure 9. ISO14443A Anti-Collision Method Flow Chart
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Anti-Collision Sequences (Stand-Alone and Host Control)
5.3
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Anti-Collision Sequence for ISO14443B
The anti-collision sequence for ISO14443B follows the slotted Aloha approach:
1. The PCD sends the REQB command with parameter N, which specifies the number of slots.
2. Each PICC generates a random number R in the range from 1 to N.
3. The PCD sends a Slot-Marker command during every time slot.
4. The PICC responds only if R matches the slot number. Otherwise, it sends no response.
5. If multiple PICCs respond, the PCD makes note of the collision. The PCD generates a new N, and
steps 1 to 4 are repeated.
The flow chart in Figure 10 describes the firmware implementation of the anti-collision sequence.
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File: iso14443b.c
Function: Iso14443bAnticollision
Start
Send REQB
command
Wait for TX
interrupt
i=1
Is i <= N?
Collision flag
set?
Wait for RX
interrupt
Exit
Data
received w/o
collision?
Set collision flag
Recursive call function
AnticollisionSequenceB
with new N
Turn LED on or
send UID to host
Send slot- marker
command
Increment i by
one
Figure 10. ISO14443B Anti-Collision Method Flow Chart
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Host Control Mode
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Host Control Mode
The reader can be host control controlled by a higher-level host such as a personal computer. A graphical
user interface (GUI), which can be used as an API, helps users to communicate with the TRF7960A
reader through the MCU. The GUI on the host machine issues commands to the EVM MCU through a
USB to UART converter. The MCU receives the commands in the UART receive buffer, interprets them,
and sends suitable data to the register or FIFO buffer in the reader. As shown in Figure 11, the UART
receive buffer of the MCU is continuously scanned for data received from the host in UartGetLine().
To send a response to the host, the functions UartPutChar(), UartPutCrlf(), UartPutByte(), and
UartSendCString() in uart.c are used.
File: main.c
Function: main
Start
Scan UART RX
buffer for data
received from PC
File: uart .c
Function: UartGetLine
Execute
command
according to data
received
File: host .c
Function: HostCommands
Remote mode
Wait till UART
Transmit buffer is
empty
Figure 11. Host Control Flow Chart
The communication format from host to reader is organized into data frames of six fields.
Table 3. Data Frame Format from Host to Reader
SOF (0x01)
Number of bytes
0x00
0x03, 0x04
Command + Parameters
EOF (0x00, 0x00)
The data frame starts with SOF (0x01). The second byte defines the number of bytes in the frame
including SOF and EOF. The third byte should be 0x00, the fourth byte should be 0x03, and the fifth byte
should be 0x04. The sixth byte is the command code, which is followed by command parameters or data
(bytes 7 and 8). The communications ends with EOF (two bytes of 0x00).
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Host Control Mode
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6.1
Host Commands
Using the host the following commands can be executed:
Table 4. Host (PC GUI to MCU) Commands
Command
(hex)
Parameters
Example
01|0A|00|0304|100108|0000
Write 0x08 to register 0x01
0x10
Write Single
Address, data, address, data,…
0x11
Write Continuous
Address, data, data, data,…
0x12
Read Single
Address, address, address,…
01|0A|00|0304|120100|0000
Read register 01, 00
0x13
Read Continuous
Number of bytes to read, start address
01|0A|00|0304|130502|0000
Read registers 0x02 to 0x06
0x14
ISO15693
Anti-collision
Flags, command, mask length…
0x15
Direct Command
Direct command code
0x16
RAW write
Data or commands
0x18
ISO15693 Request
Command
ISO14443B Halt
Flags, command code, data…
(as specified in ISO standard)
0x0F
Direct Mode
-
0x72
Command code, address, data…
NFC Type 2 Command
(as specified in ISO standard)
0xA0
ISO14443A
Anti-collision REQA
-
01|08|00|0304|A0|0000
0xA1
ISO14443A
Anti-collision WUPA
-
01|08|00|0304|A1|0000
0xA2
ISO14443A Select
SEL, UID
0xB0
ISO14443B
Anti-collision REQB
Slots
01|09|00|0304|B004|0000
24 = 16 slots
0xB1
ISO14443B
Anti-collision WUPB
Slots
01|09|00|0304|B104|0000
24 = 16 slots
0xF3 – 0xFC
Select GPIO output
levels
-
01|08|00|0304|F7|0000
(i.e. switch LED 4 on, Table 5)
Get Firmware Version
-
01|08|00|0304|FE|0000
0xFE
6.2
Command Function
01|0B|00|0304|11002108|0000
Write 21, 08 to register 00, 01
01|0B|00|0304|14060100|0000
Flags = 0x06, command 0x01, mask length = 0
01|09|00|0304|151F|0000
Command 0x1F (reset FIFO)
01|09|00|0304|168F|0000
Send 0x8F to TRF (command 0x1F)
01|0B|00|0304|18022033|0000
ISO15693 Read Single Block 0x33
01|08|00|0304|0F|0000
01|0A|00|0304|723011|0000
Read 4 Blocks from 0x11
01|0D|00|0304|A2DE655D5ABC|0000
UID = DE655D5A, CRC = 0xBC
Request Command (0x18)
To execute ISO15693 commands and ISO14443B HALT command after setting the protocol and execute
anticollision the function HostRequestCommand() is used. Flags, command and the data, which must be
sent, are given by the GUI.
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19
MCU to TRF7960A Communication
6.3
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GPIO Control
The commands in Table 5 can be used to control GPIO output levels and switch the LEDs on the Board
on or off using the GUI. In actual customer applications, these could either be used for illustrated purpose
or for driving switches, relays, etc.
Table 5. GPIO Output Levels controlled from PC GUI
Host Commands
6.4
Host Command
(hex)
GPIO Level
Function
0xF3
P1.2 High
LED 6 On
0xF4
P1.2 Low
LED 6 Off
0xF5
P1.3 High
LED 5 On
0xF6
P1.3 Low
LED 5 Off
0xF7
P1.4 High
LED 4 On
0xF8
P1.4 Low
LED 4 Off
0xF9
P1.5 High
LED 3 On
0xFA
P1.5 Low
LED 3 Off
0xFB
P1.6 High
LED 2 On
0xFC
P1.6 Low
LED 2 Off
NFC Type 2 Command (0x72)
The NFC Type 2 commands in Table 6 are implemented in the firmware.
Table 6. NFC Type 2 Commands Implemented in TRF7960A Firmware for
MSP430F2370
Command
(hex)
Function
7
Parameters
Read (4 Blocks)
0x30
Address of first block
Write (1 Block)
0xA2
Address, Data (4 bytes)
Read 2 Blocks (my-d move)
0x31
Address of first block
Write 2 Blocks (my-d move)
0xA1
Address, data (16 bytes)
MCU to TRF7960A Communication
The interface to the microcontroller is selected by a jumper. For SPI mode, the macro SPIMODE is set to
1. For parallel mode, the macro is set to 0. If the same communication interface is always used,
SPIMODE can be set to a constant value. To communicate with the TRF7960A, one of the functions in
trf796x.c is called. After checking the selected interface either the according function in spi.c or parallel.c
is called.
7.1
Direct Command (0x15)
Trf796xDirectCommand() is used to execute a direct command. The parameter to this function is the
address of an 8-bit variable that contains the 5-bit command in bit 4 through bit 0. To set the required
Address/Command Word, the command control bit (bit 7) is set to 1 (command). The Address/Command
Word Bit is sent to the reader IC, which executes the command.
7.2
Read Single (0x12)
Trf796xReadSingle() is used to read the contents of specified reader IC registers. The parameters to this
function are the address of an array that contains the addresses of the registers to read, and the number
of registers. The 5-bit addresses (0x00 to 0x1F) are stored in bit 4 through bit 0 of the 8-bit array
elements. To set the required Address/Command Words, the Read/Write bit (BIT6) is set to 1 (read). The
function sends the Address/Commands Word to the reader IC and stores the received register values in
the array element that contained the register address as many times as required.
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MCU to TRF7960A Communication
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7.3
Read Continuous (0x13)
Trf796xReadCont() is used to read a specified number of reader IC registers starting from a given
address. The parameters are an array address and the number of registers to read out. The fist of the
8-bit array elements contains the 5-bit address of the first register. To set the required Address/Command
Word, the Read/Write bit (bit 6) and the continuous address mode bit (bit 5) are set to 1 (write, continuous
address mode). The function sends the Address/Command Word and receives the required register
values, which are stored in the array.
7.4
Write Single (0x10)
Trf796xWriteSingle() is used to write to specified reader IC registers. The parameter for this function is the
address of an array that contains the register addresses and the values to write, and the number of used
array elements, which is twice the number of registers. To get the required Address/Command Words, bit
7 to bit 5 of the 8-bit array elements containing an address are left at 0. They are sent to the reader IC
followed by the value to write.
7.5
Write Continuous (0x11)
Trf796xWriteCont() is used to write to a specified number of reader IC registers starting at a given
address. The parameters are an array address and the number of used array elements, which is one more
than the specified number of registers. The address of the first register is stored in the first 8-bit array
element and the values to write are stored in the following elements. To set the rewired
Address/Command Word, the continuous address mode bit (bit 5) is set to 1. The Address/Command
Word is sent to the reader IC followed by all the values to write.
7.6
RAW Write (0x16)
Trf796xRawWrite() is used to send a raw string to the reader chip. The function gets the address of an
array, which contains the data, which shall be sent, and the number of bytes, which shall be sent. The
Address/Command Word is not handled by the function and must be given in the right way. This allows for
example to send a direct command followed by a write request using only one function call.
NOTE: To read from or write to the FIFO, continuous mode should be used here, because only the
first FIFO register address can be addressed.
Table 7. Address/Command Word Distribution
Bit
Description
Bit Function
Address
Command
B7
Command Control Bit
0 = address
1 = command
0
1
B6
Read/Write
0 = read
1 = write
R/W
0
B5
Continuous Address Mode
Cont. Mode
Not Used
B4
Address/Command Bit 4
Address 4
Command 4
B3
Address/Command Bit 3
Address 3
Command 3
B2
Address/Command Bit 2
Address 2
Command 2
B1
Address/Command Bit 1
Address 1
Command 1
B0
Address/Command Bit 0
Address 0
Command 0
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Debugging
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Debugging
The debug and trigger features have been implemented in case the firmware developer does not have
ready access to logic analyzer but does have oscilloscope.
Alternatively, if the developer does not have access to an oscilloscope, relatively low-cost logic analyzers
are available from http://www.saleae.com/logic/ and http://www.pctestinstruments.com/.
8.1
Macro DBG Use
If the macro DBG in trf796x.h is set to 1, interrupts are displayed in host control mode. The contents of the
IRQ Status register (0x0C) is displayed as hex value in the Log Window and special events are
represented by a character shown in Table 8. This way it is possible to check, whether the expected
interrupt events occurred or not.
Table 8. Displayed Interrupt Events in Debug Mode
Character
8.2
Event Represented
T
End of TX
E
End of RX
F
FIFO Level High
x
End of RX and Error Condition
N
No Response
Use of the Trigger Function
For debugging of the firmware, the communication must be observed. For this reason, a protocol trigger
on LED 5 can be activated by setting the macro TRIGGER in msp430f2370.h to 1. This setting works for
all commands and in stand-alone mode but does not work for anti-collision sequences in host control
mode. The trigger can be used by the scope to help to capture the RF signal and validate the
communication signals and timings. Figure 12 shows an example setup, and Figure 13 shows
oscilloscope screen capture.
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Debugging
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Scope
CH1
CH2
CH3
CH4
CH1
CH2
CH3
CH4
Pickup Coil
Pickup Coil
Transponder
TRF7960AEVM
Trigger (from LED)
IRQ
GND
GND
USB Connection to Host
Figure 12. Measurement Setup for Using Trigger Feature
Figure 13. Oscilloscope Screen Example Using Trigger Feature
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References
9
References
•
•
•
•
•
•
24
www.ti.com
TRF7960A firmware project
TRF7960A data sheet (SLOS732)
Comparison of TRF7960 and TRF7960A (SLOA156)
ISO15693-3
ISO14443-3
Infineon my-d™ move (Infineon ISO14443A Products)
TRF7960A Reference Firmware Description
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