NXP SJA1105PEL/QEL/REL/SEL Series Ethernet Switches Data Sheet

NXP SJA1105PEL/QEL/REL/SEL Series Ethernet Switches Data Sheet

SJA1105P/Q/R/S

Rev. 1 — 1 November 2017 Objective short data sheet

1 Features and benefits

1.1 General features

• • • • • •

5-port store and forward architecture Each port individually configurable for 10/100 Mbit/s when operated as MII/RMII and 10/100/1000 Mbit/s when operated as RGMII or SGMII Independent I/O voltage domains: selectable 1.8/2.5/3.3 V operation for MII/RMII/ RGMII; selectable 1.8/2.5/3.3 V for host interfacing; 1.2 V core voltage domains Small footprint: LFBGA159 (12 mm × 12 mm) package Automotive Grade 2 ambient operating temperature: -40 °C to +105 °C Automotive product qualification in accordance with AEC-Q100 Rev-H

1.2 Ethernet switching and AVB features

• • • • • • • • •

IEEE 802.3 compliant IEEE 802.1Q defined tag support 4096 VLANs supported Priority-based QoS handling as specified in IEEE 802.1Q

Hardware support for IEEE 802.1AS timestamping and IEEE 802.1Qav AVB traffic shaping 16 credit-based shapers available according to IEEE 802.1Qav; shapers can be freely allocated to any priority queue on a per port basis Support for SR Class A, Class B, and Class C traffic IEEE 1588v2 one-step sync forwarding in hardware Statistics for dropped frames and buffer load

1.3 Interface features

• • • • • •

MII/RMII for interfacing with 10/100 Mbit/s PHYs/host processor (Fast Ethernet) RGMII for interfacing with 10/100/1000 Mbit/s PHYs/host processor/cascading (Gigabit Ethernet); internal delay for interface connection without external delay components SGMII for interfacing with 10/100/1000 Mbit/s PHYs/host processor/cascading MAC and PHY modes for interfacing (MII/RMII/RGMII/SGMII) directly with another switch or host processor Programmable drive strength for MII/RMII/RGMII interfaces SPI for host processor access

NXP Semiconductors

SJA1105P/Q/R/S

1.4 Other features

• • • • •

25 MHz system clock input from crystal oscillator or AC-coupled single-ended clock 25 MHz reference clock output Device reset input from host processor Synchronization output for cascading devices IEEE 1149.1/1149.6 compliant JTAG interface for TAP controller access and BSCAN

2 Related documentation

For the full data sheet and application hints, please register with DocStore at https:// www.docstore.nxp.com.

3 Ordering information

Table 1. Ordering information Type number Package Name

SJA1105PEL [1]

SJA1105QEL

[1]

Description

LFBGA159 plastic low profile fine-pitch ball grid array package; 159 balls SJA1105REL SJA1105SEL [1] Pin compatible with SJA1105 and SJA1105T.

Version

SOT1427-1 SJA1105PQRS_SDS

Objective short data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 1 November 2017

© NXP B.V. 2017. All rights reserved.

2 / 6

NXP Semiconductors

SJA1105P/Q/R/S

SJA1105PQRS_SDS

Objective short data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 1 November 2017

© NXP B.V. 2017. All rights reserved.

3 / 6

NXP Semiconductors

SJA1105P/Q/R/S

4 Legal information

4.1 Data sheet status

Document status

[1][2]

Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet

Product status

Development Qualification Production

[3]

Definition

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

[1] [2] [3] Please consult the most recently issued document before initiating or completing a design.

The term 'short data sheet' is explained in section "Definitions".

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

4.2 Definitions

Draft

— The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.

Short data sheet

— A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

Product specification

Product data sheet.

— The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the

4.3 Disclaimers

Limited warranty and liability

— Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.

Applications

— Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.

Limiting values

— Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.

Terms and conditions of commercial sale

— NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.

No offer to sell or license

— Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

Right to make changes

to the publication hereof.

— NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior SJA1105PQRS_SDS

Objective short data sheet Suitability for use in automotive applications

— This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or All information provided in this document is subject to legal disclaimers.

Rev. 1 — 1 November 2017

© NXP B.V. 2017. All rights reserved.

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applications and therefore such inclusion and/or use is at the customer's own risk.

Export control

— This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.

Translations

— A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.

4.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.

SJA1105PQRS_SDS

Objective short data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 1 November 2017

© NXP B.V. 2017. All rights reserved.

5 / 6

NXP Semiconductors

Contents

1

1.1

1.2

1.3

1.4

2 3

4

Features and benefits .........................................1

General features ................................................1

Ethernet switching and AVB features ................ 1 Interface features ...............................................1

Other features ....................................................2

Related documentation ...................................... 2 Ordering information .......................................... 2

Legal information ................................................4

SJA1105P/Q/R/S

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section 'Legal information'.

© NXP B.V. 2017.

All rights reserved.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: [email protected]

Date of release: 1 November 2017 Document identifier: SJA1105PQRS_SDS

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