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MF1S70YYX_V1
MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
Rev. 3.2 — 23 November 2017 Product data sheet 279332 COMPANY PUBLIC
1 General description
NXP Semiconductors has developed the MIFARE Classic MF1S70yyX/V1 to be used in a contactless smart card according to ISO/IEC 14443 Type A.
The MIFARE Classic EV1 4K MF1S70yyX/V1 IC is used in applications like public transport ticketing and can also be used for various other applications.
1.1 Anticollision
An intelligent anticollision function allows to operate more than one card in the field simultaneously. The anticollision algorithm selects each card individually and ensures that the execution of a transaction with a selected card is performed correctly without interference from another card in the field.
MIFARE CARD PCD energy data
001aam199
Figure 1. Contactless MIFARE system 1.2 Simple integration and user convenience
The MF1S70yyX/V1 is designed for simple integration and user convenience which allows complete ticketing transactions to be handled in less than 100 ms.
1.3 Security and privacy • • • •
Manufacturer programmed 7-byte UID or 4-byte NUID identifier for each device Random ID support Mutual three pass authentication (ISO/IEC DIS 9798-2) Individual set of two keys per sector to support multi-application with key hierarchy
1.4 Delivery options • • •
7-byte UID, 4-byte NUID Bumped die on sawn wafer MOA4 and MOA8 contactless module
NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
2 Features and benefits
•
Contactless transmission of data and energy supply
• • • •
Operating frequency of 13.56 MHz Data integrity of 16-bit CRC, parity, bit coding, bit counting Typical ticketing transaction time of < 100 ms (including backup management) Random ID support (7 Byte UID version)
• • •
Operating distance up to 100 mm depending on antenna geometry and reader configuration Data transfer of 106 kbit/s Anticollision
•
7 Byte UID or 4 Byte NUID
2.1 EEPROM • •
4 kB, organized in 32 sectors of 4 blocks and 8 sectors of 16 blocks (one block consists of 16 byte) Data retention time of 10 years
•
User definable access conditions for each memory block
•
Write endurance 200000 cycles
3 Applications
• • • •
Public transportation Electronic toll collection School and campus cards Internet cafés
4 Quick reference data
Table 1. Quick reference data Symbol Parameter
C i f i input capacitance input frequency
EEPROM characteristics
t ret retention time N endu(W) write endurance
Conditions
T amb = 22 °C T amb = 22 °C [1] T amb =22°C, f=13,56Mhz, V LaLb = 1,5 V RMS
• • • •
Access management Car parking Employee cards Loyalty
-
Min
14.9
10 100000
Typ
16.9
13.56
200000 -
Max
19.0
Unit
pF MHz year cycle MF1S70yyX_V1
Product data sheet COMPANY PUBLIC
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5 Ordering information
Table 2. Ordering information Type number Package Name Description
MF1S7001XDUD/V1 FFC Bump 8 inch wafer, 120 μm thickness, on film frame carrier, electronic fail die marking according to SECS-II format), Au bumps, 7-byte UID MF1S7001XDUD2/V1 FFC Bump 12 inch wafer, 120 μm thickness, on film frame carrier, electronic fail die marking according to SECS-II format), Au bumps, 7-byte UID MF1S7001XDUF/V1 FFC Bump 8 inch wafer, 75 μm thickness, on film frame carrier, electronic fail die marking according to SECS-II format), Au bumps, 7-byte UID MF1S7000XDA4/V1 MF1S7000XDA8/V1 MOA4 MOA8 plastic leadless module carrier package; 35 mm wide tape, 7-byte UID plastic leadless module carrier package; 35 mm wide tape, 7-byte UID MF1S7031XDUD/V1 FFC Bump 8 inch wafer, 120 μm thickness, on film frame carrier, electronic fail die marking according to SECS-II format), Au bumps, 4-byte non-unique ID MF1S7031XDUD2/V1 FFC Bump 12 inch wafer, 120 μm thickness, on film frame carrier, electronic fail die marking according to SECS-II format), Au bumps, 4-byte non-unique ID MF1S7031XDUF/V1 MF1S7030XDA4/V1 FFC Bump 8 inch wafer, 75 μm thickness, on film frame carrier, electronic fail die MOA4 marking according to SECS-II format), Au bumps, 4-byte non-unique ID plastic leadless module carrier package; 35 mm wide tape, 4-byte non-unique ID MF1S7030XDA8/V1 MOA8 plastic leadless module carrier package; 35 mm wide tape, 4-byte non-unique ID
6 Block diagram
-
Version
SOT500-2 SOT500-4 SOT500-2 SOT500-4 UART ISO/IEC 14443 TYPE A CRYPTO1 RF INTERFACE POWER ON RESET VOLTAGE REGULATOR CLOCK INPUT FILTER RESET GENERATOR LOGIC UNIT RNG CRC EEPROM
001aan006
Figure 2. Block diagram of MF1S70yyX/V1
MF1S70yyX_V1
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7 Pinning information
7.1 Pinning
The pinning for the MF1S70yyX/V1DAx is shown as an example in and not explicitly shown.
MOA4 contactless module. For the contactless module MOA8, the pinning is analogous LA top view LB
001aan002
Figure 3. Pin configuration for SOT500-2 (MOA4) Table 3. Pin allocation table Pin Symbol
LA LA LB LB
8 Functional description
Antenna coil connection LA Antenna coil connection LB MF1S70yyX_V1
Product data sheet COMPANY PUBLIC 8.1 Block description
The MF1S70yyX/V1 chip consists of a 4 kB EEPROM, RF interface and Digital Control Unit. Energy and data are transferred via an antenna consisting of a coil with a small number of turns which is directly connected to the MF1S70yyX/V1. No further external components are necessary. Refer to the document
Ref. 1 for details on antenna design.
• • •
RF interface:
–
Modulator/demodulator
– – –
Rectifier Clock regenerator Power-On Reset (POR)
–
Voltage regulator Anticollision: Multiple cards in the field may be selected and managed in sequence Authentication: Preceding any memory operation the authentication procedure ensures that access to a block is only possible via the two keys specified for each block All information provided in this document is subject to legal disclaimers.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development • • • •
Control and Arithmetic Logic Unit: Values are stored in a special redundant format and can be incremented and decremented EEPROM interface Crypto unit: The CRYPTO1 stream cipher of the MF1S70yyX/V1 is used for authentication and encryption of data exchange.
EEPROM: 4 kB is organized in 32 sectors of 4 blocks and 8 sectors of 16 blocks. One block contains 16 bytes. The last block of each sector is called "trailer", which contains two secret keys and programmable access conditions for each block in this sector.
8.2 Communication principle
The commands are initiated by the reader and controlled by the Digital Control Unit of the MF1S70yyX/V1. The command response is depending on the state of the IC and for memory operations also on the access conditions valid for the corresponding sector.
8.2.1 Request standard / all
After Power-On Reset (POR) the card answers to a request REQA or wakeup WUPA
command with the answer to request code (see Section 9.4
, ATQA according to ISO/IEC 14443A).
8.2.2 Anticollision loop
In the anticollision loop the identifier of a card is read. If there are several cards in the operating field of the reader, they can be distinguished by their identifier and one can be selected (select card) for further transactions. The unselected cards return to the idle state and wait for a new request command. If the 7-byte UID is used for anticollision and selection, two cascade levels need to be processes as defined in ISO/IEC 14443-3.
Remark:
For the 4-byte non-unique ID product versions, the identifier retrieved from the card is not defined to be unique. For further information regarding handling of non-unique identifiers see
8.2.3 Select card
With the select card command the reader selects one individual card for authentication and memory related operations. The card returns the Select AcKnowledge (SAK) code which determines the type of the selected card, see
to the document
8.2.4 Three pass authentication
After selection of a card the reader specifies the memory location of the following memory access and uses the corresponding key for the three pass authentication procedure. After a successful authentication all commands and responses are encrypted.
Remark:
The HLTA command needs to be sent encrypted to the PICC after a successful authentication in order to be accepted.
MF1S70yyX_V1
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POR Transaction Sequence Typical Transaction Time Request Standard Request All Anticollision Loop Get Identifier Identification and Selection Procedure ~2.5 ms + ~1 ms + ~1 ms without collision for 7-byte UID for each collision Select Card 3 Pass Authenticationon specific sector Authentication Procedure ~2 ms Read Block Write Block Decre ment Incre ment Re store Halt Memory Operations ~2.5 ms ~5.5 ms ~2.5 ms ~4.5 ms read block write block de-/increment transfer Transfer
001aan921
1. the command flow diagram does not include the Personalize UID Usage and the
SET_MOD_TYPE command, for details on those commands please see Section 10.1.1
Figure 4. MIFARE Classic command flow diagram 8.2.5 Memory operations
After authentication any of the following operations may be performed:
• • • • • •
Read block Write block Decrement: Decrements the contents of a block and stores the result in the internal Transfer Buffer Increment: Increments the contents of a block and stores the result in the internal Transfer Buffer Restore: Moves the contents of a block into the internal Transfer Buffer Transfer: Writes the contents of the internal Transfer Buffer to a value block MF1S70yyX_V1
Product data sheet COMPANY PUBLIC 8.3 Data integrity
Following mechanisms are implemented in the contactless communication link between reader and card to ensure very reliable data transmission:
• •
16 bits CRC per block Parity bits for each byte All information provided in this document is subject to legal disclaimers.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development • • •
Bit count checking Bit coding to distinguish between "1", "0" and "no information" Channel monitoring (protocol sequence and bit stream analysis)
8.4 Three pass authentication sequence
1. The reader specifies the sector to be accessed and chooses key A or B.
2. The card reads the secret key and the access conditions from the sector trailer. Then the card sends a number as the challenge to the reader (pass one).
3. The reader calculates the response using the secret key and additional input. The response, together with a random challenge from the reader, is then transmitted to the card (pass two).
4. The card verifies the response of the reader by comparing it with its own challenge and then it calculates the response to the challenge and transmits it (pass three).
5. The reader verifies the response of the card by comparing it to its own challenge.
After transmission of the first random challenge the communication between card and reader is encrypted.
8.5 RF interface
The RF-interface is according to the standard for contactless smart cards ISO/IEC 14443A.
For operation, the carrier field from the reader always needs to be present (with short pauses when transmitting), as it is used for the power supply of the card.
For both directions of data communication there is only one start bit at the beginning of each frame. Each byte is transmitted with a parity bit (odd parity) at the end. The LSB of the byte with the lowest address of the selected block is transmitted first. The maximum frame length is 163 bits (16 data bytes + 2 CRC bytes = 16 × 9 + 2 × 9 + 1 start bit).
8.6 Memory organization
The 4096 × 8 bit EEPROM memory is organized in 32 sectors of 4 blocks and 8 sectors of 16 blocks. One block contains 16 bytes.
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2 1 0 1 0 3 : 3 2 1 0 : : 0 : : : Block 15 14 13 : : 2 1 15 14 13 : : 2 Sector 39 32 31 0 0 1 2 3 Key A 4 Byte Number within a Block 5 6 7 8 9 10 11 12 13 14 15 Access Bits Key B Key A Key A Key A Access Bits Access Bits Access Bits Manufacturer Data Key B Key B Key B Description Sector Trailer 39 Data Data : : Data : : Data Data : Sector Trailer 32 Data Data : : Data Data Data Sector Trailer 31 Data : : Data Data : Sector Trailer 0 Data Data Manufacturer Block
001aan021
Figure 5. Memory organization 8.6.1 Manufacturer block
This is the first data block (block 0) of the first sector (sector 0). It contains the IC manufacturer data. This block is programmed and write protected in the production test.
The manufacturer block is shown in
for the 4-byte NUID and 7-byte UID version respectively.
MF1S70yyX_V1
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Byte 0 1 2 NUID 3 4 5 6 7 8 9 10 11 Manufacturer Data 12 Block 0/Sector 0 13 14 15
001aan010
Figure 6. Manufacturer block for MF1S503yX with 4-byte NUID
Byte 0 1 2 3 4 5 6 7 8 9 10 11 12 Block 0/Sector 0 13 14 15 UID Manufacturer Data
Figure 7. Manufacturer block for MF1S500yX with 7-byte UID
001aam204
8.6.2 Data blocks
One block consists of 16 bytes. The first 32 sectors contain 3 blocks and the last 8 sectors contain 15 blocks for storing data (Sector 0 contains only two data blocks and the read-only manufacturer block).
• •
The data blocks can be configured by the access bits as read/write blocks value blocks Value blocks can be used for e.g. electronic purse applications, where additional commands like increment and decrement for direct control of the stored value are provided A successful authentication has to be performed to allow any memory operation.
Remark:
The default content of the data blocks at delivery is not defined.
8.6.2.1 Value blocks
Value blocks allow performing electronic purse functions (valid commands are: read, write, increment, decrement, restore, transfer). Value blocks have a fixed data format which permits error detection and correction and a backup management.
• •
A value block can only be generated through a write operation in value block format: Value: Signifies a signed 4-byte value. The lowest significant byte of a value is stored in the lowest address byte. Negative values are stored in standard 2´s complement format. For reasons of data integrity and security, a value is stored three times, twice non-inverted and once inverted.
Adr: Signifies a 1-byte address, which can be used to save the storage address of a block, when implementing a powerful backup management. The address byte is stored four times, twice inverted and non-inverted. During increment, decrement, restore and transfer operations the address remains unchanged. It can only be altered via a write command.
MF1S70yyX_V1
Product data sheet COMPANY PUBLIC
Byte Number Description 0 1 value 2 3 4 5 value 6 7 8 9 10 value 11 12 adr 13 adr 14 15 adr adr
001aan018
Figure 8. Value blocks
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An example of a valid value block format for the decimal value 1234567d and the block address 17d is shown in
Table 4 . First, the decimal value has to be converted to the
hexadecimal representation of 0012D687h. The LSByte of the hexadecimal value is stored in Byte 0, the MSByte in Byte 3. The bit inverted hexadecimal representation of the value is FFED2978h where the LSByte is stored in Byte 4 and the MSByte in Byte 7.
The hexadecimal value of the address in the example is 11h, the bit inverted hexadecimal value is EEh.
Table 4. Value block format example Byte Number Description
Values [hex]
0 1 2 value 3 4 5 6 value 7 8 9 10 11 12 13 14 15 value adr adr adr adr
87 D6 12 00 78 29 ED FF 87 D6 12 00 11 EE 11 EE
8.6.3 Sector trailer
The sector trailer is always the last block in one sector. For the first 32 sectors this is block 3 and for the remaining 8 sectors it is block 15. Each sector has a sector trailer containing the
• •
secret keys A (mandatory) and B (optional), which return logical "0"s when read and the access conditions for the blocks of that sector, which are stored in bytes 6...9. The access bits also specify the type (data or value) of the data blocks.
If key B is not needed, the last 6 bytes of the sector trailer can be used as data bytes.
The access bits for the sector trailer have to be configured accordingly, see Section 8.7.2
.
Byte 9 of the sector trailer is available for user data. For this byte the same access rights as for byte 6, 7 and 8 apply.
When the sector trailer is read, the key bytes are blanked out by returning logical zeros.
If key B is configured to be readable, the data stored in bytes 10 to 15 is returned, see
.
All keys are set to FFFF FFFF FFFFh at chip delivery and the bytes 6, 7 and 8 are set to FF0780h.
Byte Number Description 0 1 2 3 Key A 4 5 6 7 8 Access Bits 9 10 11 12 13 14 15 Key B (optional)
001aan013
Figure 9. Sector trailer
MF1S70yyX_V1
Product data sheet COMPANY PUBLIC 8.7 Memory access
Before any memory operation can be done, the card has to be selected and
authenticated as described in Section 8.2
. The possible memory operations for an addressed block depend on the key used during authentication and the access conditions stored in the associated sector trailer.
Table 5. Memory operations Operation Description
Read reads one memory block
Valid for Block Type
read/write, value and sector trailer All information provided in this document is subject to legal disclaimers.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development Operation
Write Increment Decrement Transfer Restore
Description
writes one memory block increments the contents of a block and stores the result in the internal Transfer Buffer decrements the contents of a block and stores the result in the internal Transfer Buffer writes the contents of the internal Transfer Buffer to a block reads the contents of a block into the internal Transfer Buffer
Valid for Block Type
read/write, value and sector trailer value value value and read/write value
8.7.1 Access conditions
The access conditions for every data block and sector trailer are defined by 3 bits, which are stored non-inverted and inverted in the sector trailer of the specified sector.
The access bits control the rights of memory access using the secret keys A and B. The access conditions may be altered, provided one knows the relevant key and the current access condition allows this operation.
Remark:
With each memory access the internal logic verifies the format of the access conditions. If it detects a format violation the whole sector is irreversibly blocked.
Remark:
In the following description the access bits are mentioned in the non-inverted mode only.
The internal logic of the MF1S70yyX/V1 ensures that the commands are executed only after a successful authentication.
Table 6. Access conditions Access Bits Valid Commands
C13 C23 C33 read, write C12 C22 C32 read, write, increment, decrement, transfer, restore C11 C21 C31 read, write, increment, decrement, transfer, restore C10 C20 C30 read, write, increment, decrement, transfer, restore
Block (sectors 0 - 31)
→ 3 → 2
Block(s) (sectors 32-39)
15 10-14
Description
sector trailer data block(s) → 1 → 0 5-9 0-4 data block(s) data block(s) MF1S70yyX_V1
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Byte Number Description 0 1 2 3 Key A 4 5 6 7 8 Access Bits 9 10 11 12 13 14 Key B (optional) 15 Byte 6 Byte 7 Byte 8 Byte 9 Bit 7 C2 3 C1 3 C3 3 6 C2 2 C1 2 C3 2 5 C2 1 C1 1 C3 1 4 C2 0 3 C1 3 C1 0 C3 0 C3 C2 user data 3 3 2 C1 2 C3 2 C2 2 1 C1 1 C3 1 C2 1 0 C1 0 C3 0 C2 0
001aan003
Figure 10. Access conditions 8.7.2 Access conditions for the sector trailer
Depending on the access bits for the sector trailer (block 3, respectively block 15) the read/write access to the keys and the access bits is specified as ‘never’, ‘key A’, ‘key B’ or key A|B’ (key A or key B).
On chip delivery the access conditions for the sector trailers and key A are predefined as transport configuration. Since key B may be read in the transport configuration, new cards must be authenticated with key A. Since the access bits themselves can also be blocked, special care has to be taken during the personalization of cards.
0 1 1 0 1 1
Table 7. Access conditions for the sector trailer Access bits Access condition for KEYA Access bits
C1 C2 C3 read 0 0 0 never write key A read key A write never 1 0 1 0 0 0 never never never never key B never key A never key A|B never key A|B never 0 0 1 never key A key A key A
KEYB
read key A key A never never key A 1 0 1 1 1 1 never never never key B never never key A|B key B key A|B key B key A|B never never never never
Remark
write key A Key B may be read
[1] never Key B may be read [1]
key B never key A Key B may be read, transport configuration
key B never never [1] For this access condition key B is readable and may be used for data
8.7.3 Access conditions for data blocks
Depending on the access bits for data blocks (blocks 0...2) the read/write access is specified as ‘never’, ‘key A’, ‘key B’ or ‘key A|B’ (key A or key B). The setting of the relevant access bits defines the application and the corresponding applicable commands.
MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
1 1 0 1 1 0 0
• • • •
Read/write block: the operations read and write are allowed.
Value block: Allows the additional value operations increment, decrement, transfer and restore. With access condition ‘001’ only read and decrement are possible which reflects a non-rechargeable card. For access condition ‘110’ recharging is possible by using key B.
Manufacturer block: the read-only condition is not affected by the access bits setting!
Key management: in transport configuration key A must be used for authentication
Table 8. Access conditions for data blocks Access bits Access condition for
C1 C2 C3 read write 0 0 0 key A|B key A|B increment key A|B decrement, transfer, restore key A|B
Application
0 1 1 0 1 0 1 1 1 0 0 0 1 1 key A|B key A|B key A|B key A|B key B key B never never key B key B never key B never never never never key B never never never never never never key A|B key A|B never never never transport configuration
read/write block
read/write block
value block
value block
read/write block
read/write block
read/write block [1] If key B may be read in the corresponding Sector Trailer it cannot serve for authentication (see grey marked lines in
Trailer and using key B, the card will refuse any subsequent memory access after authentication.
9 Command overview
The MIFARE Classic card activation follows the ISO/IEC 14443 Type A. After the MIFARE Classic card has been selected, it can either be deactivated using the ISO/IEC 14443 Halt command, or the MIFARE Classic commands can be performed. For more details about the card activation refer to
MF1S70yyX_V1
Product data sheet COMPANY PUBLIC 9.1 MIFARE Classic command overview
All MIFARE Classic commands typically use the MIFARE CRYPTO1 and require an authentication.
All available commands for the MIFARE Classic EV1 4K are shown in
Table 9. Command overview Command ISO/IEC 14443
Request Wake-up Anticollision CL1 Select CL1 REQA WUPA Anticollision CL1 Select CL1
Command code (hexadecimal)
26h (7 bit) 52h (7 bit) 93h 20h 93h 70h All information provided in this document is subject to legal disclaimers.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development Command
Anticollision CL2 Select CL2 Halt Authentication with Key A Authentication with Key B Personalize UID Usage SET_MOD_TYPE MIFARE Read MIFARE Write MIFARE Decrement MIFARE Increment MIFARE Restore MIFARE Transfer
ISO/IEC 14443
Anticollision CL2 Select CL2 Halt
Command code (hexadecimal)
95h 20h 95h 70h 50h 00h 60h 61h 40h 43h 30h A0h C0h C1h C2h B0h
All commands use the coding and framing as described in Ref. 3
and
otherwise specified.
9.2 Timings
The timing shown in this document are not to scale and values are rounded to 1 μs.
All given times refer to the data frames including start of communication and end of communication. A PCD data frame contains the start of communication (1 "start bit") and the end of communication (one logic 0 + 1 bit length of unmodulated carrier). A PICC data frame contains the start of communication (1 "start bit") and the end of communication (1 bit length of no subcarrier).
The minimum command response time is specified according to
value. Depending on the command, the T
ACK or for a data frame.
as an integer n which specifies the PCD to PICC frame delay time. The frame delay time from PICC to PCD is at least 87 μs. The maximum command response time is specified as a time-out value specified for command responses defines the PCD to PICC frame delay time. It does it for either the 4-bit ACK value All command timings are according to ISO/IEC 14443-3 frame specification as shown for
the Frame Delay Time in Figure 11 . For more details refer to
.
MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
last data bit transmitted by the PCD FDT = (n* 128 + 84)/fc first modulation of the PICC 128/fc logic „1“ 256/fc end of communication (E) FDT = (n* 128 + 20)/fc 128/fc start of communication (S) 128/fc logic „0“ 256/fc end of communication (E) 128/fc start of communication (S)
aaa-006279
Figure 11. Frame Delay Time (from PCD to PICC) and T ACK and T NAK Remark:
Due to the coding of commands, the measured timings usually excludes (a part of) the end of communication. Consider this factor when comparing the specified with the measured times.
9.3 MIFARE Classic ACK and NAK
The MIFARE Classic uses a 4 bit ACK / NAK as shown in
Table 10. MIFARE ACK and NAK Code (4-bit) Transfer Buffer Validity
Ah 0h valid 1h 4h 5h valid invalid invalid
Description
Acknowledge (ACK) invalid operation parity or CRC error invalid operation parity or CRC error MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development 9.4 ATQA and SAK responses
For details on the type identification procedure please refer to
The MF1S70yyX/V1 answers to a REQA or WUPA command with the ATQA value
Table 11. ATQA response of the MF1S70yyX/V1 Sales Type Hex Value Bit Number 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
MF1S00yX MF1S03yX 00 44h 00 04h 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 MF1S700yX MF1S703yX 00 42 h 00 02 h 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
Table 12. SAK response of the MF1S70yyX/V1 Sales Type
MF1S70yyX/V1
Hex Value
18
8
0
7
0
6
0
Bit Number 5 4
1 1
3
0
2
0
1
0
Remark:
The ATQA coding in bits 7 and 8 indicate the UID size according to ISO/IEC 14443 independent from the settings of the UID usage.
Remark:
The bit numbering in the ISO/IEC 14443 starts with LSBit = bit 1, but not LSBit = bit 0. So one byte counts bit 1 to 8 instead of bit 0 to 7.
10 UID Options and Handling
The MF1S70yyX/V1 product family offers two delivery options for the UID which is stored in block 0 of sector 0.
• •
7-byte UID 4-byte NUID (Non-Unique ID) This section describes the MIFARE Classic MF1S70yyX/V1 operation when using one of the 2 UID options with respect to card selection, authentication and personalization. See also
Ref. 6 for details on how to handle UIDs and NUIDs with MIFARE Classic products.
10.1 7-byte UID Operation
All MF1S7
0
yXDyy products are featuring a 7-byte UID. This 7-byte UID is stored in block 0 of sector 0 as shown in
Figure 7 . The behaviour during anti-collision, selection and
authentication can be configured during personalization for this UID variant.
10.1.1 Personalization Options
The 7-byte UID variants of the MF1S70yyX/V1 can be operated with four different functionalities, denoted as UIDFn (UID Functionality n).
MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
1. UIDF0: anti-collision and selection with the double size UID according to ISO/IEC 14443-3 2. UIDF1: anti-collision and selection with the double size UID according to ISO/IEC 14443-3 and optional usage of a selection process shortcut 3. UIDF2: anti-collision and selection with a single size random ID according to ISO/IEC 14443-3 4. UIDF3: anti-collision and selection with a single size NUID according to ISO/IEC 14443-3 where the NUID is calculated out of the 7-byte UID The anti-collision and selection procedure and the implications on the authentication process are detailed in
The default configuration at delivery is option 1 which enables the ISO/IEC 14443-3 compliant anti-collision and selection. This configuration can be changed using the ‘Personalize UID Usage’ command. The execution of this command requires an authentication to sector 0. Once this command has been issued and accepted by the PICC, the configuration is automatically locked. A subsequently issued ‘Personalize UID Usage’ command is not executed and a NAK is replied by the PICC.
Remark:
As the configuration is changeable at delivery, it is strongly recommended to send this command at personalization of the card to prevent unwanted changes in the field. This should also be done if the default configuration is used.
Remark:
The configuration becomes effective only after PICC unselect or PICC field reset.
PCD PICC # ACK # Cmd Type 368 µs CRC PICC # NAK # T ACK T NAK ACK 59 µs NAK 59 µs T TimeOut TimeOut
Figure 12. Personalize UID Usage
001aan919
MF1S70yyX_V1
Product data sheet COMPANY PUBLIC Table 13. Personalize UID Usage command Name Code Description
Cmd 40h Set anti-collision, selection and authentication behaviour Type CRC ACK, NAK -
Encoded type of UID usage: UIDF0: 00h UIDF1: 40h UIDF2: 20h UIDF3: 60h
see
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development Table 14. Personalize UID Usage timing T ACK min T ACK max
Personalize UID Usage n=9 T TimeOut
T NAK min
n=9
T NAK max
T TimeOut
T TimeOut
10 ms
10.1.2 Anti-collision and Selection
Depending on the chosen personalization option there are certain possibilities to perform anti-collision and selection. To bring the MIFARE Classic into the ACTIVE state according to ISO/IEC 14443-3, the following sequences are available.
Sequence 1: ISO/IEC 14443-3 compliant anti-collision and selection using the cascade level 1 followed by the cascade level 2 SEL command Sequence 2: using cascade level 1 anti-collision and selection procedure followed by a Read command from block 0 Sequence 3: ISO/IEC 14443-3 compliant anti-collision and selection using the cascade level 1 SEL command
Remark:
The Read from Block 0 in Sequence 2 does not require a prior authentication to Sector 0 and is transmitted in plain data. For all other sequences, the readout from Block 0 in Sector 0 is encrypted and requires an authentication to that sector.
Remark:
The settings done with Personalize UID Usage do not change the ATQA coding.
Table 15. Available activation sequences for 7-byte UID options UID Functionality Available Activation Sequences
UIDF0 Sequence 1 UIDF1 UIDF2 UIDF3 Sequence 1, Sequence 2 Sequence 3 Sequence 3
10.1.3 Authentication
During the authentication process, 4-byte of the UID are passed on to the MIFARE Classic Authenticate command of the contactless reader IC. Depending on the activation sequence, those 4-byte are chosen differently. In general, the input parameter to the MIFARE Classic Authenticate command is the set of 4 bytes retrieved during the last cascade level from the ISO/IEC 14443-3 Type A anticollision.
Table 16. Input parameter to MIFARE Classic Authenticate UID Functionality Input to MIFARE Classic Authenticate Command
Sequence 1 CL2 bytes (UID3...UID6) Sequence 2 Sequence 3 CL1 bytes (CT, UID0...UID2) 4-byte NUID/RID (UID0...UID3) MF1S70yyX_V1
Product data sheet COMPANY PUBLIC 10.2 4-byte UID Operation
All MF1S70
3
yXDyy products are featuring a 4-byte NUID. This 4-byte NUID is stored in
block 0 of sector 0 as shown in Figure 6
.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development 10.2.1 Anti-collision and Selection
The anti-collision and selection process for the product variants featuring 4-byte NUIDs is done according to ISO/IEC 14443-3 Type A using cascade level 1 only.
10.2.2 Authentication
The input parameter to the MIFARE Classic Authenticate command is the full 4-byte UID retrieved during the anti-collision procedure. This is the same as for the activation Sequence 3 in the 7-byte UID variant.
11 Load Modulation Strength Option
The MIFARE Classic EV1 4K features the possibility to set the load modulation strength to high or normal. The default level is set to a high modulation strength and it is recommended for optimal performance to maintain this level and only switch to the low load modulation strength if the contactless system requires it.
Remark:
The configuration becomes effective only after a PICC unselect or a PICC field reset. The configuration can be changed multiple times by asserting the command.
Remark:
The MIFARE Classic EV1 4K needs to be authenticated to sector 0 with Key A to perform the SET_MOD_TYPE command. The Access Bits for sector 0 are irrelevant.
PCD PICC # ACK # Cmd Type 368 µs CRC PICC # NAK # T ACK T NAK ACK 59 µs NAK 59 µs T TimeOut TimeOut
Figure 13. SET_MOD_TYPE
001aan919
Table 17. SET_MOD_TYPE command Name Code Description
Cmd 43h Set load modulation strength Type CRC ACK, NAK -
Encoded load modulation strength: strong modulation: 01h (default) normal modulation: 00h CRC according to
Length
1 byte 1 byte 2 bytes 4-bit MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development Table 18. SET_MOD_TYPE timing T ACK min
SET_MOD_TYPE n=9
T ACK max
T TimeOut
T NAK min
n=9
T NAK max
T TimeOut
T TimeOut
5 ms The configured load modulation is shown in the manufacturer data of block 0 in sector 0.
The exact location is shown below in Figure 14 and Table 19
.
Byte Block 0/Sector 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Load Modulation Status Byte
aaa-012192
Figure 14. Byte Location of Load Modulation Status in Block 0 / Sector 0 Table 19. Load Modulation Status Indication Load Modulation Type
strong load modulation normal load modulation
Hex Value
20h (default) 00h
12 MIFARE Classic commands
7
0 0
6
0 0
5
1 0
Bit Number 4 3
0 0 0 0
2
0 0
1
0 0
0
0 0
12.1 MIFARE Authentication
The MIFARE authentication is a 3-pass mutual authentication which needs two pairs of command-response. These two parts, MIFARE authentication part 1 and part 2 are
and
shows the required timing.
PCD PICC ,,ACK'' Auth Addr 368 µs CRC T ACK Token RB 359 µs PICC ,,NAK'' T NAK NAK 59 µs Time out
Figure 15. MIFARE Authentication part 1
T TimeOut
001aan004
MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
PCD PICC # ACK # Token AB 708 µs TimeOut
Figure 16. MIFARE Authentication part 2
T ACK T TimeOut Token BA 359 µs
001aan917
Table 20. MIFARE authentication command Name Code Description
Auth (with Key A) 60h Authentication with Key A Auth (with Key B) 61h Addr Authentication with Key B
Length
1 byte 1 byte MIFARE Block address (00h to FFh) 1 byte CRC Token RB Token AB Token BA NAK -
Challenge 1 (Random Number) Challenge 2 (encrypted data) Challenge 2 (encrypted data) see
2 bytes 4 bytes 8 bytes 4 bytes 4-bit
Table 21. MIFARE authentication timing T ACK min T ACK max
Authentication part 1 n=9 T TimeOut Authentication part 2 n=9 T TimeOut
T NAK min
n=9
T NAK max
n=9
T TimeOut
1 ms 1 ms
Remark:
The minimum required time between MIFARE Authentication part 1 and part 2
is the minimum required FDT according to Ref. 4
. There is no maximum time specified.
Remark:
The MIFARE authentication and encryption requires an MIFARE reader IC (e.g. the CL RC632). For more details about the authentication command refer to the
corresponding data sheet (e.g. Ref. 5
). The 4-byte input parameter for the MIFARE
Classic Authentication is detailed in Section 10.1.3
.
12.2 MIFARE Read
The MIFARE Read requires a block address, and returns the 16 bytes of one MIFARE Classic block. The command structure is shown in
shows the required timing.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
PCD PICC ,,ACK'' Cmd Addr 368 µs CRC PICC ,,NAK'' T ACK T NAK NAK 59 µs Data 1548 µs CRC Time out
Figure 17. MIFARE Read
T TimeOut
Table 22. MIFARE Read command Name Code
Cmd 30h Addr CRC Data NAK -
Description
Read one block
Length
1 byte MIFARE Block address (00h to FFh) 1 byte
2 bytes Data content of the addressed block see
16 bytes 4-bit
001aan014
Table 23. MIFARE Read timing T ACK min
Read n=9
T ACK max
T TimeOut
T NAK min
n=9
T NAK max
T TimeOut
T TimeOut
5 ms
12.3 MIFARE Write
The MIFARE Write requires a block address, and writes 16 bytes of data into the addressed MIFARE Classic EV1 4K block. It needs two pairs of command-response.
These two parts, MIFARE Write part 1 and part 2 are shown in Figure 18
and
shows the required timing.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
PCD PICC ,,ACK'' Cmd Addr 368 µs CRC PICC ,,NAK'' T ACK T NAK ACK 59 µs NAK 59 µs Time out
Figure 18. MIFARE Write part 1
T TimeOut
001aan015
MF1S70yyX_V1
Product data sheet COMPANY PUBLIC
PCD PICC ,,ACK'' PICC ,,NAK'' Data 1558 µs CRC T ACK T NAK ACK 59 µs NAK 59 µs Time out
Figure 19. MIFARE Write part 2
T TimeOut
001aan016
Table 24. MIFARE Write command Name Code
Cmd A0h Addr CRC Data NAK -
Description
Write one block MIFARE Block or Page address (00h to FFh)
Data see
Length
1 byte 1 byte 2 bytes 16 bytes 4-bit
Table 25. MIFARE Write timing T ACK min
Write part 1 n=9 Write part 2 n=9
T ACK max
T TimeOut T TimeOut
T NAK min
n=9 n=9
T NAK max
T TimeOut T TimeOut
T TimeOut
5 ms 10 ms All information provided in this document is subject to legal disclaimers.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development Remark:
The minimum required time between MIFARE Write part 1 and part 2 is the
minimum required FDT according to Ref. 4
. There is no maximum time specified.
12.4 MIFARE Increment, Decrement and Restore
The MIFARE Increment requires a source block address and an operand. It adds the operand to the value of the addressed block, and stores the result in the Transfer Buffer.
The MIFARE Decrement requires a source block address and an operand. It subtracts the operand from the value of the addressed block, and stores the result in the Transfer Buffer.
The MIFARE Restore requires a source block address. It copies the value of the addressed block into the Transfer Buffer. The 4 byte Operand in the second part of the command is not used and may contain arbitrary values.
All three commands are responding with a NAK to the first command part if the
addressed block is not formatted to be a valid value block, see Section 8.6.2.1
.
The two parts of each command are shown in Figure 20 and Figure 21
and
.
shows the required timing.
PCD PICC ,,ACK'' Cmd Addr 368 µs CRC T ACK ACK 59 µs PICC ,,NAK'' T NAK NAK 59 µs Time out
Figure 20. MIFARE Increment, Decrement, Restore part 1
T TimeOut
001aan015
PCD PICC ,,ACK'' Data 538 µs CRC PICC ,,NAK'' T NAK NAK 59 µs MF1S70yyX_V1
Product data sheet COMPANY PUBLIC
Time out 1. Increment, Decrement and Restore part 2 does not acknowledge
Figure 21. MIFARE Increment, Decrement, Restore part 2
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T TimeOut
001aan009
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development Table 26. MIFARE Increment, Decrement and Restore command Name Code Description
Cmd C1h Increment Cmd Cmd C0h C2h Decrement Restore Addr CRC Data NAK see
CRC according to Operand (4 byte signed integer)
Length
1 byte 1 byte 1 byte MIFARE source block address (00h to FFh) 1 byte 2 bytes 4 bytes 4-bit
Table 27. MIFARE Increment, Decrement and Restore timing T ACK min T ACK max T NAK min
Increment, Decrement, and Restore part 1 n=9 T TimeOut n=9 Increment, Decrement, and Restore part 2 n=9 T TimeOut n=9
T NAK max
T TimeOut T TimeOut
T TimeOut
5 ms 5 ms
Remark:
The minimum required time between MIFARE Increment, Decrement, and
Restore part 1 and part 2 is the minimum required FDT according to Ref. 4
. There is no maximum time specified.
Remark:
The MIFARE Increment, Decrement, and Restore commands require a MIFARE Transfer to store the value into a destination block.
Remark:
The MIFARE Increment, Decrement, and Restore command part 2 does not provide an acknowledgement, so the regular time out has to be used instead.
12.5 MIFARE Transfer
The MIFARE Transfer requires a destination block address, and writes the value stored in the Transfer Buffer into one MIFARE Classic block. The command structure is shown in
shows the required timing.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
PCD PICC ,,ACK'' Cmd Addr 368 µs CRC PICC ,,NAK'' T ACK T NAK ACK 59 µs NAK 59 µs Time out
Figure 22. MIFARE Transfer
T TimeOut
001aan015
Table 28. MIFARE Transfer command Name Code Description
Cmd B0h Write the value from the Transfer Buffer into destination block Addr CRC NAK -
MIFARE destination block address (00h to FFh)
see
Length
1 byte 1 byte 2 bytes 4-bit
Table 29. MIFARE Transfer timing T ACK min
Transfer n=9
T ACK max
T TimeOut
T NAK min
n=9
T NAK max
T TimeOut
T TimeOut
10 ms
13 Limiting values
Stresses above one or more of the limiting values may cause permanent damage to the device. Exposure to limiting values for extended periods may affect device reliability.
Table 30. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
I
Symbol
I P tot T stg /pack T amb V ESD
Parameter
input current total power dissipation per package storage temperature ambient temperature electrostatic discharge voltage on LA/LB
-
Min
-55 -25 2
Max
30 120 125 70
Unit
mA mW °C °C kV [1] ANSI/ESDA/JEDEC JS-001; Human body model: C = 100 pF, R = 1.5 kΩ MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development CAUTION
This device has limited built-in ElectroStatic Discharge (ESD) protection.
The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the gates.
14 Characteristics
Table 31. Characteristics Symbol Parameter
C i f i
EEPROM characteristics
t ret retention time N endu(W) input capacitance input frequency write endurance
Conditions
T amb = 22 °C T amb = 22 °C [1] T amb =22°C, f=13,56Mhz, V LaLb = 1,5 V RMS
-
Min
14.9
10 100000
Typ
16.9
13.56
200000 -
Max
19.0
15 Wafer specification
For more details on the wafer delivery forms see
Table 32. Wafer specifications MF1S70yyXDUy Wafer
diameter maximum diameter after foil expansion die separation process thickness MF1S70yyXDUD MF1S70yyXDUF flatness Potential Good Dies per Wafer (PGDW) 200 mm typical (8 inches) 300 mm typical (12 inches) 210 mm (8 inches) not applicable (12 inches) laser dicing (8 inches) blade dicing (12 inches) 120 μm ± 15 μm 75 μm ± 10 μm not applicable 64727 (8 inches) 147540 (12 inches)
Wafer backside
material treatment roughness Si ground and stress relieve R a max = 0.5 μm R t max = 5 μm
Chip dimensions
step size
x = 658 μm (8 inches) x = 660 μm (12 inches)
Unit
pF MHz year cycle MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
gap between chips
y = 713 μm (8 inches) y = 715 μm (12 inches) typical = 19 μm minimum = 5 μm not applicable (12 inches)
Passivation
type material thickness
Au bump (substrate connected to VSS)
material hardness shear strength height height uniformity flatness size size variation under bump metallization sandwich structure PSG / nitride 500 nm / 600 nm > 99.9 % pure Au 35 to 80 HV 0.005
> 70 MPa 18 μm within a die = ±2 μm within a wafer = ±3 μm wafer to wafer = ±4 μm minimum = ±1.5 μm LA, LB, VSS, TEST
= 66 μm × 66 μm ±5 μm sputtered TiW [1] [2] The step size and the gap between chips may vary due to changing foil expansion Pads VSS and TESTIO are disconnected when wafer is sawn.
15.1 Fail die identification
Electronic wafer mapping covers the electrical test results and additionally the results of mechanical/visual inspection. No ink dots are applied.
15.2 Package outline
For more details on the contactless modules MOA4 and MOA8 please refer to
MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development PLLMC: plastic leadless module carrier package; 35 mm wide tape SOT500-2
X D A detail X 0 10 20 mm
DIMENSIONS (mm are the original dimensions) UNIT
mm
A (1) max.
0.33
D
35.05
34.95
scale For unspecified dimensions see PLLMC-drawing given in the subpackage code.
Note
1. Total package thickness, exclusive punching burr.
OUTLINE VERSION
SOT500-2
IEC
- - -
JEDEC REFERENCES JEITA
- - - - -
EUROPEAN PROJECTION ISSUE DATE
03-09-17 06-05-22
Figure 23. Package outline SOT500-2
MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development PLLMC: plastic leadless module carrier package; 35 mm wide tape SOT500-4
D X A detail X Dimensions 0 10 scale 20 mm Unit mm max nom min 0.26 35.05
35.00
34.95
For unspecified dimensions see PLLMC-drawing given in the subpackage code.
Note 1. Total package thickness, exclusive punching burr.
Outline version A (1) D IEC JEDEC References JEITA European projection SOT500-4 - - - - - - -
Figure 24. Package outline SOT500-4
sot500-4_po
Issue date 11-02-18 MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
16 Bare die outline
For more details on the wafer delivery forms, see Ref. 9
.
Chip Step (8 inches) Chip Step (12 inches) Bump size LA, LB, VSS, TEST x [µm] 658 (1) 660 60 y [µm] 713 (1) 715 60 typ. 19 (1) min. 5 typ. 19 (1) min. 5 238 LA TESTIO typ. 713 (1) 633 43 VSS LB y 43 578 x typ. 658 (1) aaa-012193 1. Laser dicing: The air gap and thus the step size may vary due to varying foil expansion 2. All dimensions in μm, pad locations measured from metal ring edge (see detail)
Figure 25. Bare die outline MF1S70yyXDUz/V1
17 Abbreviations
Table 33. Abbreviations and symbols Acronym Description
ACK ACKnowledge ATQA CRC Answer To reQuest, Type A Cyclic Redundancy Check CT EEPROM Cascade Tag (value 88h) as defined in ISO/IEC 14443-3 Type A Electrically Erasable Programmable Read-Only Memory FDT FFC IC LCR LSB Frame Delay Time Film Frame Carrier Integrated Circuit L = inductance, Capacitance, Resistance (LCR meter) Least Significant Bit MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development Acronym
NAK NUID NV PCD PICC REQA RID RF RMS RNG SAK SECS-II TiW UID WUPA
Description
Not AcKnowledge Non-Unique IDentifier Non-Volatile memory Proximity Coupling Device (Contactless Reader) Proximity Integrated Circuit Card (Contactless Card) REQuest command, Type A Random ID Radio Frequency Root Mean Square Random Number Generator Select AcKnowledge, type A SEMI Equipment Communications Standard part 2 Titanium Tungsten Unique IDentifier Wake-Up Protocol type A
18 References
[1]
MIFARE (Card) Coil Design Guide
Application note, BU-ID Document number 0117** 1 [2]
MIFARE Type Identification Procedure
Application note, BU-ID Document number 0184**
[3]
ISO/IEC 14443-2
2001 [4]
ISO/IEC 14443-3
2001 [5]
MIFARE & I-CODE CLRC632 Multiple protocol contactless reader IC
Product data sheet [6]
MIFARE and handling of UIDs
MF1S70yyX_V1
Product data sheet COMPANY PUBLIC
1 ** ... document version number All information provided in this document is subject to legal disclaimers.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
Application note, BU-ID Document number 1907**
[7]
Contactless smart card module specification MOA4
Delivery Type Description, BU-ID Document number 0823**
[8]
Contactless smart card module specification MOA8
Delivery Type Description, BU-ID Document number 1636**
[9]
General specification for 8" wafer on UV-tape with electronic fail die marking; delivery types
Delivery Type Description, BU-ID Document number 1093**
19 Revision history
Table 34. Revision history Document ID Release date Data sheet status
MF1S70yyX_V1 v.3.2 20171127 Product data sheet Modifications:
• •
12 inch FFC delivery forms added Format udpated MF1S70yyX_V1 v.3.1 20140908 Product data sheet -
Change notice
Modifications:
• •
NXP originality check support only for 1 kB memory version Wafer delivery specification reference corrected MF1S70yyX_V1 v.3.0 20140303 Product data sheet -
Supersedes
MF1S70yyX_V1 v.3.1
MF1S70yyX_V1 v.3.0
MF1S70yyX_V1
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
20 Legal information
20.1 Data sheet status Document status
Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
Product status
Development Qualification Production
Definition
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
[1] [2] [3] Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
20.2 Definitions Draft
— The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
Suitability for use
— NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Short data sheet
— A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
Product specification
Product data sheet.
— The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the
20.3 Disclaimers Limited warranty and liability
— Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes
to the publication hereof.
— NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior MF1S70yyX_V1
Product data sheet COMPANY PUBLIC Applications
— Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.
Limiting values
— Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.
Terms and conditions of commercial sale
— NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.
No offer to sell or license
— Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development Quick reference data
— The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.
Export control
— This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.
Non-automotive qualified products
— Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements.
NXP Semiconductors accepts no liability for inclusion and/or use of non automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.
Translations
— A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.
20.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
MIFARE
— is a trademark of NXP B.V.
MIFARE Classic
— is a trademark of NXP B.V.
MF1S70yyX_V1
Product data sheet COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
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© NXP B.V. 2017. All rights reserved.
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NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
Tables
Quick reference data .........................................2
Ordering information ..........................................3
Pin allocation table ............................................4
Value block format example ............................10
Memory operations ..........................................10
Access conditions ........................................... 11
Access conditions for the sector trailer ............12
Access conditions for data blocks ................... 13 Tab. 9.
Command overview .........................................13
Tab. 10. MIFARE ACK and NAK ...................................15
Tab. 11. ATQA response of the MF1S70yyX/V1 ...........16
Tab. 12. SAK response of the MF1S70yyX/V1 ............. 16
Tab. 13. Personalize UID Usage command .................. 17
Tab. 17. SET_MOD_TYPE command ...........................19
Figures
Contactless MIFARE system .............................1
Block diagram of MF1S70yyX/V1 ......................3
Pin configuration for SOT500-2 (MOA4) ........... 4
MIFARE Classic command flow diagram .......... 6
Memory organization .........................................8
Sector trailer ....................................................10
Access conditions ........................................... 12
Personalize UID Usage ...................................17
SET_MOD_TYPE ............................................19
Tab. 20. MIFARE authentication command ...................21
Tab. 21. MIFARE authentication timing .........................21
Tab. 28. MIFARE Transfer command ............................26
Tab. 29. MIFARE Transfer timing ..................................26
Tab. 30. Limiting values ................................................ 26
Tab. 31. Characteristics .................................................27
Tab. 32. Wafer specifications MF1S70yyXDUy .............27
Tab. 33. Abbreviations and symbols ............................. 31
Tab. 34. Revision history ...............................................33
MIFARE Authentication part 2 .........................21
MIFARE Read ................................................. 22
MIFARE Write part 1 .......................................23
MIFARE Write part 2 .......................................23
MIFARE Transfer ............................................ 26
Package outline SOT500-2 ............................. 29
Package outline SOT500-4 ............................. 30
Bare die outline MF1S70yyXDUz/V1 ...............31
MF1S70yyX_V1
Product data sheet COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.2 — 23 November 2017 279332
© NXP B.V. 2017. All rights reserved.
36 / 37
NXP Semiconductors MF1S70YYX_V1 MIFARE Classic EV1 4K - Mainstream contactless smart card IC for fast and easy solution development
Contents
General description ............................................ 1
Anticollision ........................................................1
Features and benefits .........................................2
EEPROM ........................................................... 2
Applications .........................................................2
Quick reference data .......................................... 2
Pinning information ............................................ 4
Pinning ...............................................................4
Functional description ........................................4
Block description ............................................... 4
Select card .........................................................5
Three pass authentication ................................. 5
Memory operations ............................................6
Data integrity ..................................................... 6
Three pass authentication sequence .................7
Manufacturer block ............................................ 8
Data blocks ........................................................9
Value blocks ...................................................... 9
Access conditions ............................................11
Command overview .......................................... 13
MIFARE Classic command overview ...............13
Timings ............................................................ 14
MIFARE Classic ACK and NAK .......................15
ATQA and SAK responses ..............................16
UID Options and Handling ............................... 16
7-byte UID Operation .......................................16
Personalization Options ...................................16
Anti-collision and Selection ..............................18
Anti-collision and Selection ..............................19
Authentication .................................................. 19
Load Modulation Strength Option ................... 19
MIFARE Classic commands .............................20
MIFARE Authentication ................................... 20
MIFARE Read ................................................. 21
MIFARE Write ..................................................22
MIFARE Increment, Decrement and Restore ...24
MIFARE Transfer .............................................25
Limiting values ..................................................26
Fail die identification ........................................28
Package outline ............................................... 28
Bare die outline .................................................31
Abbreviations .................................................... 31
References .........................................................32
Revision history ................................................ 33
Legal information ..............................................34
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section 'Legal information'.
© NXP B.V. 2017.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 23 November 2017 Document identifier: MF1S70yyX_V1 Document number: 279332
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