AKM AK4137EQ Evaluation Board Manual

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AKM AK4137EQ Evaluation Board Manual | Manualzz

[AKD4137-A]

AKD4137-A

AK4137 Evaluation Board Rev.2

GENERAL DESCRIPTION

The AKD4137-A is the evaluation board for the AK4137, 8k

768kHz asynchronous sample rate converter. This board has the optical connectors to interface with other digital audio equipments and serial interfaces for AKM AD/DA evaluation boards. The AKD4137-A achieves quick evaluation of

AK4137

Ordering guide

AKD4137-A --- Evaluation board for AK4137

Control software included with package

FUNCTION

Optical fiber connectors (for Digital Audio Interface. input x 1, output x 1.)

10pin Header (for AKM AD/DA evaluation board. input x 1, output x 1.)

On board X’tal Oscillator (input x 1, output x 1.)

< KM117203>

Figure 1. AKD4137-A Block Diagram

*Circuit schematics are attached at the end of this manual.

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2019/07

[AKD4137-A]

Evaluation Board Diagram

Board Diagram

U700

U701

J802

T2

J801

T1

J804 J800

J600

SW602

T3

J803

SW603

U1

J401

SW300

SW200

U3

J300

PORT2

PORT1

U2

J200

J400

SW600 SW601

SW400 SW402

SW401

Figure 2. AKD4137-A Board Diagram

Description

(1) U1 ( AK4137 )

2channels input/output Digital Sample Rate Converter (SRC).

(2) J200, J300 ( BNC Connector for Digital Input/Output )

J200 BNC connector : Digital Input optical signal to AK4118A(U2).

J300 BNC connector : Digital Output optical signal from AK4118A(U3).

(3) PORT1, PORT2 ( Optical Connector )

PORT1 : Digital Input optical signal to AK4118A(U2).

PORT2 : Digital Output optical signal from AK4118A(U3).

(4) J800, J801, J802, J803, J804 ( Power supply )

J800 (+5V) : +5V Power Supply

J801 (DVDD) : 3.3V/1.8V Power Supply

J802 (VDD18) : 1.8V Power Supply

J803 (D33V) : 3.3V Power Supply

J804 (DVSS) : GND

(5) U2, U3 ( AK4118A )

AK4118A has DIR, DIT and X’tal oscillator.

Transports input data to AK4137 when working in master mode, and output data from AK4137 when working in slave mode.

(6) U700 ( PIC18F4550 )

USB control chip. Sets up AK4558 registers from PC via USB port (U701).

(7) J400, J401 (BNC Connector)

Input external clock source.

(8) SW200, SW300 ( Dip-switch )

DIP type switch. Sets clock and audio format of AK4118A. DIF[2:0] used to set audio interface format and OCKS[1:0] used to master clock frequency.

SW403

< KM117203> 2019/07

- 2-

(9) SW600, SW601, SW602, SW603 ( Dip-switch )

DIP type switch. Sets clock and audio format and filter of AK4137.

(10) SW400 ( Toggle switch )

Toggle type-switch PDN for AK4137.

“H” : PDN = High

“L” : PDN = Low

(11) SW401, SW402 ( Toggle switch )

Toggle type-switch PDN for AK4118A.

“H” : PDN = High

“L” : PDN = Low

(12) SW403 ( Toggle switch )

Toggle type-switch SMUTE for AK4137.

“H” : SMUTE = High

“L” : SMUTE = Low

(13) T1, T2, T3 ( regulator )

Regulator for AK4137, AK4118A, Logic Circuit.

T1 : Regulated DVDD (3.3V) from +5V.

T2 : Regulated DVDD, DV18 (1.8V) from +5V.

T3 : Regulated D33V (3.3V) from +5V.

[AKD4137-A]

< KM117203>

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Evaluation Board Manual

Operation sequence

[1] Power supply line settings

[2] Jumped pins settings

[3] DIP switches settings

[4] Toggle switches settings

[5] Register control (Serial control)

[6] Evaluation modes

[AKD4137-A]

< KM117203>

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[1] Power supply line settings

(1-1) Power supply settings : Used the regulator (T1,T2,T3) <Default>

Set up the power supplied lines :

* Each supply line should be distributed from the power supply unit.

J800

J801

Name Color

+5V Red

DVDD Green

J802

J803

J706

DV18

D33V

DVSS

Green

Green

Black

Setting (Typ) Function

+5V Regulator power supply

+3.3V/+1.8V

AK4137 DVDD, Logic IC power supply

+1.8V

+3.3V

0V

AK4137 DV18

AK4118A 3.3V VDD,

Logic IC power supply

Ground

Comments

Should always be connected

3.3V regulator is used,

JP801=3.3V short and

JP800=REG short by default.

When jack is used,

JP800=JACK short.

When 1.8V regulator is used,

JP801=1.8V short and

JP800=REG short.

1.8V regulator is used,

JP802=REG short by default.

When jack is used,

JP802=JACK short.

3.3V regulator is used,

JP803=REG short by default.

When jack is used,

JP803=JACK short.

Should always be connected

Table 1-1.

Power supply line setting (default: used the regulator)

[AKD4137-A]

Default Settings

+5V

OPEN :

(JP801=3.3V

short and

JP800=REG short)

OPEN :

(JP802= open)

OPEN :

(JP803=REG short)

0V

< KM117203>

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[AKD4137-A]

(1-2) About jumper for power supply :

The roles of the jumper for each power supply supplied from the regulator are as follows.

Connection of the jumper for power supply :

Name

JP800 DVDD-SEL

JP801 DVDD-VSEL

JP802 DV18-SEL

JP803 D33V-SEL

JP100 DV18-SEL

Function

Select regulator power supply or jack for DVDD.

Select regulator power supply

3.3V or 1.8V for DVDD.

Select regulator power supply or jack for DV18.

Select regulator power supply or jack for D33V.

Select External power supply or LDO power supply of

AK4137 for DV18.

Comments

DVDD for AK4137 and Logic IC:

JP800=REG short : 3.3V regulator is used by default.

JP800=JACK short : Jack is used.

DVDD for AK4137 and Logic IC:

JP801=3.3V short : 3.3V regulator is used by default.

JP801=1.8V short : 1.8V regulator is used.

DV18 for AK4137:

JP802=REG short : 1.8V regulator is used.

JP802=JACK short : Jack is used.

D33V for Logic IC:

JP803=REG short : 3.3V regulator is used by default.

JP803=D3.3V short : Jack is used.

DV18 selector for AK4137:

JP100=short and JP802=open : LDO of AK4137 is used by default.

JP100=short and JP802=short : External Power supply is used.

Table 1-2. Jumper for power supply

Default Settings

REG :

JP800=REG short

REG :

JP801=3.3V short

OPEN :

JP802=Open

REG :

JP803=REG short

LDO power :

JP100=short and

JP802=open

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[AKD4137-A]

[2] Jumper pins and Port pins settings

No

1 JP100

Names

DV18-SEL

2 JP200

3 JP300

4 JP400

5 JP401

6 JP402

7 JP403

8 JP404

9 JP405

10 JP406

11 JP407

12 JP408

13 JP409

< KM117203>

RXDATA-SEL

TXDATA-SEL

BICK-R-SEL

BICK-R-PHASE

LRCK-R-SEL

SDTI-R-SEL

MCLK-R-SEL

EXT-R

TDMI-EXT-SEL

TDMI-EXT

BICK-T-SEL

BICK-T-PHASE

Default

Short

OPT

OPT

DIR

THR

DIR

DIR

DIR

Open

Open

Open

DIT

THR

Functions

Select Short / Open DV18.

Open: DV18 pin of AK4137 open.

Short: DV18 pin of AK4137 connect 1.8Vcourse. (default)

Select OPT/COAX input for RX data.

(DIR:AK4118A)

OPT: Optical input

COAX: COAX(BNC) input

Select OPT/COAX output for TX data.

(DIT:AK4118A)

OPT: Optical output

COAX: COAX(BNC) output

Select Rx BICK.

DIR: BICK-4118A-R(DIR) (default)

PORT400: PORT400-IBICK

GND: DVSS short

Select polarity (non-inverted output / inverted output) of BICK

R-SEL outputs.

THR: Non-inverted output. (default)

INV: Inverted output.

Select Rx LRCK.

DIR: LRCK-4118A-R(DIR) (default)

PORT400: PORT400-ILRCK

GND: DVSS short

Select Rx DATA.

DIR: SDTO-4118A-R(DIR) (default)

PORT400: PORT400-SDTI

GND: DVSS short

Select Rx MCLK.

DIR: MCLK-4118A-R(DIR) (default)

PORT400: PORT400-IMCLK

EXT: External MCLK (JACK: J400 EXT-R) input.

GND: DVSS short

Open: No input (default)

Short: External MCLK (JACK: J400 EXT-R) input.

Select TDMI data.

PORT400: PORT400-SDTI(DIR)

PORT401: PORT401-SDTO(DIT)

EXT: External TDMI (JP407: TDMI-EXT) input.

GND: DVSS short

Open: External TDMI (JP407: TDMI-EXT) input.

Short: DVSS short

Select Tx BICK.

DIT: BICK-4118A-T(DIT) (default)

PORT401: PORT401-OBICK

GND: DVSS short

Select polarity (non-inverted output / inverted output) of BICK-T-SEL outputs.

THR: Non-inverted output. (default)

INV: Inverted output.

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No

14 JP410

Names

LRCK-T-SEL

15 JP411 SDTO-T-SEL

16 JP412 MCLK-T-SEL

17 JP413 EXT-T

18 PORT400 RX-PORT

19 PORT401 TX-PORT

20 PORT402 PCMI-PORT

21 PORT403 PCM/DSD-SEL

22 PORT404 DSDI-PORT

23 PORT405 DSD-PORT

24 JP500

25 JP501

26 JP502

27 JP600

28 JP601

29 JP602

30 JP603

31 JP604

32 JP605

33 JP606

34 JP607

PCM/DSD-SEL1

PCM/DSD-SEL2

PCM/DSD-SEL3

DEM0

DEM1

CAD0/IDIF0

CAD1/IDIF1

IDIF2/TDO0

TDO0

SRCE-N

TEST0

< KM117203>

Default

DIT

DIT

DIT

Open

Open

Open

ALL Short

PCM

Open

Open

PCM

PCM

PCM

Short

Short

CAD0

CAD1

IDIF2

Open

Open

VSS

[AKD4137-A]

Functions

Select Tx LRCK.

DIT: LRCK-4118A-T(DIT) (default)

PORT401: PORT401-OLRCK

GND: DVSS short

Select Tx DATA.

DIR: DAUX-4118A-T(DIT) (default)

PORT401: PORT401-SDTO

GND: DVSS short

Select Tx MCLK.

DIT: MCLK-4118A-T(DIT) (default)

PORT401: PORT401-OMCLK

EXT: External MCLK (JACK: J401 EXT-T) input.

GND: DVSS short

Open: No input (default)

Short: External MCLK (JACK: J401 EXT-T) input.

Open: No input (default)

Monitor: PCM(RX) data and Clock input.

Open: No input / output (default)

Monitor: PCM(TX) data and Clock input / output.

ALL Short: RX data and Clock input. (default)

ALL Open: No data (PCM input data and clock)

PCM: PCM data and clock input / output. (default)

DSD: DSD data and clock input / output.

Open: No input (default)

Monitor: DSD data and Clock input.

Open: No input / output (default)

Monitor: DSD data and Clock input / output.

PCM: PCM data (SDTO (TX)) output. (default)

DSD: DSD data (DSDOL (TX)) output.

PCM: PCM clock (OBICK (TX)) input / output. (default)

DSD: DSD clock (ODCLK (TX)) input / output.

PCM: PCM clock (OLRCK (TX)) input / output. (default)

DSD: DSD data (DSDOR (TX)) output.

Short: DEM0 for PCM Mode. (default)

Open: DSDIL data for DSD Mode.

Short: DEM1 for PCM Mode. (default)

Open: DSDIR data for DSD Mode.

CAD0: Chip address 0 in serial control mode. (default)

IDIF0: Digital Input Format 0 in parallel control mode.

CAD1: Chip address 1 in serial control mode. (default)

IDIF1: Digital Input Format 1 in parallel control mode.

IDIF2: Digital Input Format 2 in parallel control mode.

TDO0: Test Output

Test Output TDO0 monitor pin.

Unlock status SRCE_N monitor pin.

TEST0: TEST0 input TEST00 (SW601-TEST0).

VSS: Connected to DVSS.

2019/07

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[AKD4137-A]

No

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

JP608

JP609

JP610

JP611

JP612

JP613

JP614

JP615

JP616

JP617

JP618

JP619

JP620

JP621

JP622

JP623

JP624

JP625

JP626

JP627

JP628

PORT700

Names

TEST1

Default

VSS

Functions

TEST1: TEST1 input TEST10 (SW601-TEST1).

VSS: Connected to DVSS.

XTI/OMCLK/TDMI-SEL

OMCLK-SEL

SDA/CDTI/SLOW

Open XTI=Open: Normal use. (default)

XTI=Short: XTI be connected to DVSS

OMCLK: OMCLK be connected to MCLK-Rx or MCLK-Tx.

TDMI: TDMI-EXT

R: MCLK-R (Rx MCLK) Open

T: MCLK-T (Tx MCLK)

SDA/CDTI SDA/CDTI: Control Data Output / Input in serial control mode. (default)

SLOW: Digital Filter Select in parallel control mode.

SCL/CCLK/SD SCL/CCLK SCL/CCLK: Control Data / Clock Input in serial control mode. (default)

SD: Digital Filter Select in parallel control mode.

CSN/SMUTE

ODIF1/TDO1

TDO1

ODIF0/TDO2

TDO2

TDM/TDO3

TDO3

OBIT0/TDO4

TDO4

OBIT1

OBIT1EXT

CM0/TDO5

TDO5

CM2/TDO6

TDO6

MCKO-EXT

PIC

CSN

ODIF1

Open

ODIF0

Open

TDM

CSN: Chip Select in serial control mode. (default)

SMUTE: Soft Mute in parallel control mode.

ODIF1: Audio Interface Format 1 for Output PORT.

TDO1: Test Output

Test Output TDO1 monitor pin.

ODIF0: Audio Interface Format 0 for Output PORT.

TDO2: Test Output

Test Output TDO2 monitor pin.

TDM: TDM Format select.

TDO3: Test Output

Test Output TDO3 monitor pin.

Open

OBIT0 OBIT0: Bit Length select 0 for Output PORT.

TDO4: Test Output

Open Test Output TDO4 monitor pin.

OBIT1-HL OBIT1-HL: Bit Length select 1 for Output PORT.

OBIT1-EXT: External Input Data (JP623 OBIT1EXT)

Open

CM0

External Input OBIT1 input pin.

CM0: Clock select or Mode select 0 for Output PORT.

TDO5: Test Output

Open

CM2

Test Output TDO5 monitor pin.

CM2: Clock select or Mode select 2 for Output PORT.

TDO6: Test Output

Open

Open

Open

Test Output TDO6 monitor pin.

Open: No output (default)

Short: External MCLK (JACK: J600 EXT-MCKO) output.

Pin header for write Firmware of Control soft by USB Interface.

57 PORT701 CTRL-SEL

58 JP800

59 JP801

DVDD-SEL

DVDD-VSEL

USB

REG

3.3V

Control PORT Select.

ALL USB short: USB Port U701 used.

ALL 10pin short: 10pin Port PORT700 used

Select Regulator or JACK for DVDD

REG: Regulator T1 or T2 is used (default)

JACK: JACK J801-DVDD is used.

Select Voltage for DVDD

3.3V short: 3.3V regulator T1 is used. (default)

1.8V short: 1.8V regulator T2 is used.

< KM117203> 2019/07

- 9-

No

60 JP802

Names

DV18-SEL

61 JP803 D33V-SEL

Default Functions

Open

REG

Select Regulator or JACK for DV18

REG: Regulator T2 is used.

JACK: JACK J802-DV18 is used.

Select Regulator or JACK for D33V

REG: Regulator T3 is used (default)

D3.3V: JACK J803-D3.3V is used.

Table 2-1. Jumper pin setting

[AKD4137-A]

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[AKD4137-A]

[3] DIP switches settings

1

2

3

4

5

(3-1). Setting for SW200 / SW300

(Sets AK4118A (U2 / U3) audio format and master clock setting)

No.

Switch Name Function

DIF2

DIF1

DIF0

OCKS1

OCKS0

Set-up of DIF2 pin.

Set-up of DIF1 pin.

Set-up of DIF0 pin.

Set-up of OCKS1 pin.

Set-up of OCKS0 pin.

Table 3-1. SW200 / SW300 Setting default

H

L

H

H

L

Mode

2

3

6

7

4

5

0

1

DIF2 pin

DIF2 bit

0

0

0

0

1

1

1

1

DIF1 pin

DIF1 bit

0

0

1

1

1

1

0

0

DIF0 pin

DIF0 bit

DAUX SDTO

0

1

0

1

0

1

0

1

24bit, Left justified

24bit, Left justified

24bit, Left justified

24bit, Left justified

24bit, Left justified

24bit, I

2

S

24bit, Left justified

24bit, I

2

S

16bit, Right justified

18bit, Right justified

20bit, Right justified

24bit, Right justified

24bit, Left justified

24bit, I

2

S

24bit, Left justified

24bit, I

2

S

Table 3-2. Audio format (AK4118A)

H/L

H/L

H/L

H/L

H/L

L/H

H/L

L/H

LRCK

I/O

O

O

O

O

O

O

I

I

64fs

64fs

64fs

64fs

64fs

64fs

64-128fs

64-128fs

BICK

I/O

O

O

O

O

I

I

O

O default

OCKS1 pin

OCKS1 bit

1

1

0

0

OCKS0 pin

OCKS0 bit

(X

’ tal)

MCKO1 MCKO2 fs (max)

0

1

0

1

256fs

256fs

512fs

128fs

256fs

256fs

512fs

128fs

256fs

128fs

256fs

64fs

96 kHz

96 kHz

48 kHz

192 kHz

Table 3-3. Master Clock Frequency Select (AK4118A) default

< KM117203>

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(3-2). Setting for SW600 / SW601 / SW602 / SW603 (Sets AK4137 (U1) )

No.

Switch Name Function

5

6

3

4

1

2

7

8

DEM1

DEM0

CAD1

CAD0

IDIF2

IDIF1

IDIF0

I2C

De-emphasis Control 1 in PCM mode.

De-emphasis Control 0 in PCM mode.

Chip Address 1 in serial control mode.

Chip Address 0 in serial control mode.

Digital Input Format 2 in Parallel control mode.

Digital Input Format 1 in Parallel control mode.

Digital Input Format 0 in Parallel control mode.

Select serial mode

L: 4-wire serial mode

H: I2C mode

Table 3-4. SW600 Setting (AK4137)

No.

Switch Name

1

2

TEST1

TEST0

3 PSN

4

5

6

7

SLOW

SD

ODIF1

ODIF0

8 DITHER

No.

Switch Name

1 SMSEMI

2

3

SMT1

SMT0

4 TDM

5 CLKMODE

6 VSEL

7

8

OBIT1

OBIT0

Function

TEST1 pin setting.

TEST0 pin setting.

Parallel / Serial control mode select.

L: Serial control mode

H: Parallel control mode

Digital Filter select in parallel control mode.

Digital Filter select in parallel control mode.

Audio Interface Format 1 for Output PORT.

Audio Interface Format 0 for Output PORT.

Dither Enable

L: Dither OFF

H: Dither ON

Table 3-5. SW601 Setting (AK4137)

Function

Soft Mute Semi Auto mode

L: Manual mode

H: Semi Auto mode

Soft Mute Timer select 1

Soft Mute Timer select 0

TDM Format select

L: Stereo mode (connected to DVSS)

H: TDM mode for output (connected to DVDD)

Master clock select

L: X’tal mode (connected to DVSS)

H: External master clock or TDM=”H” (connected to DVDD)

Digital Power select

L: DV18 is Output

H: DV18 is Power supply

Bit Length select 1 for Output PORT.

Bit Length select 0 for Output PORT.

Table 3-6. SW602 Setting (AK4137)

< KM117203>

- 12-

[AKD4137-A] default

L

H

L

H

L

L

H

H default

L

L

L

L

L

H

H

L default

L

L

L

L

L

L

L

L

2019/07

No.

Switch Name

1 CM3

6

7

8

4

5

2

3

-

-

-

-

CM2

CM1

CM0

Function

Clock select or Mode setting 3

Clock select or Mode setting 2

Clock select or Mode setting 1

Clock select or Mode setting 0

Not used

Not used

Not used

Not used

Table 3-7. SW603 Setting (AK4137)

[AKD4137-A] default

L

-

-

-

L

-

H

L

< KM117203>

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2019/07

[4] Toggle switches settings

Up=

H

, Down=

L

[SW400] ( Power Down (PDN) for AK4137):

Power Down (PDN) Switch for AK4137

Reset AK4137 (U1) once by brining SW400 to “L” once upon power-up.

Keep

H

” when AK4137 is in use; keep

L

” when AK4137 is not in use.

[SW401] ( Power Down (PDN) for AK4118A-Rx):

Power Down (PDN) Switch for AK4118A-Rx

Reset AK4118A (U2) once by brining SW401 to “L” once upon power-up.

Keep

H

” when AK4118A is in use; keep

L

” when AK4118A is not in use.

[SW402] ( Power Down (PDN) for AK4118A-Tx):

Power Down (PDN) Switch for AK4118A-Tx

Reset AK4118A (U3) once by brining SW402 to “L” once upon power-up.

Keep

H

” when AK4118A is in use; keep

L

” when AK4118A is not in use.

[SW403] ( Soft Mute (SMUTE) for AK4137):

Soft Mute (SMUTE) Switch for AK4137

When this switch is changed to

H

, soft mute cycle is initiated.

When returning

L

, the output mute releases.

[AKD4137-A]

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[AKD4137-A]

[5] Register control (Serial control)

AKD4137-A can be controlled via USB (serial port). Connect board to PC using the USB cable (PORT600 - serial) included with the AKD4137-A.

The control software is packed with the evaluation board. The software operation sequence is included in the evaluation board manual.

< KM117203>

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[AKD4137-A]

[6] Evaluation modes

(6-1) PCM Mode (PCMIN

SRC

PCMOUT) (Slave Mode)

Toggle switch setting:

SW400

L

H

AK4137(U1) : Used

SW401

L

H

AK4118A(U2) : Used

Table 6-1. Toggle switch setting

SW402

L

H

AK4118A(U3) : Used

Start up Control Register Setting

1: Jumpers and Dip-switches and Toggle-switches are default setting.

2: Port Reset & Write Default.

3: Set Addr: 01h =

13

” to setting Audio Data Interface Mode I2S for Input Digital Data on AK4137.

: Other control register settings are default.

Addr Register Name

01H PCMONT0

R/W

Default

D7

SLOW

R/W

0

D6

SD

R/W

0

D5 D4 D3

DEM1 DEM0

DITHER

R/W

0

R/W

1

R/W

0

Table 6-2. Addr 01H control register setting

D2

IDIF2

R/W

0

SLOW bit: Set FIR1 Filter Coefficient

0: Sharp Roll OFF Filter (default)

1: Slow Roll OFF Filter

SD bit: Set FIR1 Filter Coefficient

0: Normal Delay Filter (default)

1: Short Delay Filter

DEM1/0 bit: De-enphasis Control

00: 44.1kHz

01: OFF (default)

10: 48kHz

11: 32kHz

DITHER bit: Add Dither

0: Dither OFF (default)

1: Dither ON

IDIF2/1/0 bit: Set Audio Data Interface Mode for Input Digital Data

000: 32bit, LSB justified

001: 24bit, LSB justified

010: 32bit, MSB justified (default)

011: 32 or 16bit, I2S compatible

100: TDM 32bit, LSB justified

101: TDM 32bit, I2S compatible

110: TDM 32bit, MSB justified

111: TDM 32bit, I2S compatible

SMSEMI bit: Semi Auto Soft Mute

0: Semi Auto Soft Mute OFF (default)

1: Semi Auto Soft Mute ON

D1

IDIF1

R/W

1

D0

IDIF0

R/W

0

< KM117203> 2019/07

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[AKD4137-A]

(6-2) PCMIN

DSDOUT Mode (PCMIN

SRC

DSDOUT) (PCM

DSD Mode)

Toggle switch setting:

SW400

L

H

AK4137(U1) : Used

SW401

L

H

AK4118A(U2) : Used

SW402

L

AK4118A(U3) : Not Used

Table 6-3. Toggle switch setting

Start up Control Register Setting

1: Jumpers and Dip-switches and Toggle-switches are changed for DSD Mode for AK4137 Output.

: PORT403 =

DSD

, JP500 =

DSD

, JP501 =

DSD

, JP502 =

DSD

: SW600 =

LHLLHHH

( SW600-3,4pin (CAD1,0) =

LL

, SW600-8pin (I2C) =

H

)

: SW601 =

LLLLLHHL

(SW601-3pin (PSN) =

L

)

: SW602 =

LLLLLLLL

: SW603 =

LLLLLLLL

” or

LLLHLLLL

” or

LLHLLLLL

” or

LLHHLLLL

” or

LHLHLLLL

(SW603-1,2,3,4pin (CM3-0) = Master mode)

: Other settings are default settings.

( JP602 =

CAD0

, JP603 =

CAD1

)

2: Port Reset & Write Default.

3: Set Addr: 04h =

53

” to setting DSD Output Mode on AK4137.

Set Addr: 01h =

13

” to setting Audio Data Interface Mode I2S for Input Digital Data on AK4137.

: Other control register settings are default.

Input Data : J200 (RX-COAX) or PORT1 (RX-OPT)

Output Data : PORT405 (DSDO-PORT)

Jumpers Setting: DSD Mode

Names

PORT403 PCM/DSD-SEL

JP500

JP501

JP502

PCM/DSD-SEL1

PCM/DSD-SEL2

PCM/DSD-SEL3

Change Functions

DSD PCM: PCM data and clock input / output. (default)

DSD: DSD data and clock input / output.

DSD

DSD

PCM: PCM data (SDTO (TX)) output. (default)

DSD: DSD data (DSDOL (TX)) output.

PCM: PCM clock (OBICK (TX)) input / output. (default)

DSD: DSD clock (ODCLK (TX)) input / output.

DSD PCM: PCM clock (OLRCK (TX)) input / output. (default)

DSD: DSD data (DSDOR (TX)) output.

Table 6-4. Jumper setting

Control Register setting:

Addr Register Name

04H DSDOCONT

R/W

Default

D7

DSDCLP1

D6

DSDCLP0

D5

DSDOFS1

D4

DSDOFS0

D3

ERRMASK

R/W

0

R/W

1

R/W

0

R/W

1

R/W

0

Table 6-5. Addr 04H control register setting

D2

PMO

R/W

0

D1

OCKB

R/W

0

D0

DSDOE

R/W

0

DSDCLP1/0 bit: Set Clip processing

00: no Clip processing

01: Clip processing [-6dB] (default)

10: Clip processing [-9dB]

11: Reserved (Clip processing [-6dB])

DSDOFS1/0 bit: Set DSD Output FS

00: 64fs

01: 128fs (default)

10: 256fs

11: Reserved (128fs)

ERRMASK bit: MASK Reset

0: Error Detect and Reset (default)

1: Error Detect and Not Reset

PMO bit: Set DSD Output Phase Modulation

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[AKD4137-A]

0: Not Phase Modulation Mode (default)

1: Phase Modulation Mode

ODCKB bit: Polarity of ODCLK (DSD Output)

0: DSD data is output from ODCLK falling edge (default)

1: DSD data is output from ODCLK rising edge

DSDOE bit: DSD Output Enable

0: DSD Output Mode OFF (default)

1: DSD Output Mode ON

Addr Register Name

01H PCMONT0

R/W

Default

D7

SLOW

R/W

0

D6

SD

R/W

0

D5 D4 D3

DEM1 DEM0 DITHER

R/W

0

R/W

1

R/W

0

Table 6-6. Addr 01H control register setting

D2

IDIF2

R/W

0

IDIF2/1/0 bit: Set Audio Data Interface Mode for Input Digital Data

000: 32bit, LSB justified

001: 24bit, LSB justified

010: 32bit, MSB justified (default)

011: 32 or 16bit, I2S compatible

100: TDM 32bit, LSB justified

101: TDM 32bit, I2S compatible

110: TDM 32bit, MSB justified

111: TDM 32bit, I2S compatible

D1

IDIF1

R/W

1

D0

IDIF0

R/W

0

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[AKD4137-A]

(6-3) DSDIN

DSDOUT Mode (DSDMIN

SRC

DSDOUT) (DSD

DSD Mode)

Toggle switch setting:

SW400

L

H

AK4137(U1) : Used

SW401

H

AK4118A(U2) : Not Used

SW402

H

AK4118A(U3) : Not Used

Table 6-7. Toggle switch setting

Start up Control Register Setting

1: Jumpers and Dip-switches and Toggle-switches are changed for DSD Mode for AK4137 Input / Output.

: PORT403 =

DSD

, JP500 =

DSD

, JP501 =

DSD

, JP502 =

DSD

: JP600 = open, JP601 = open

: SW600 =

LHLLHHH

( SW600-3,4pin (CAD1,0) =

LL

, SW600-8pin (I2C) =

H

)

: SW601 =

LLLLLHHL

(SW601-3pin (PSN) =

L

)

: SW602 =

LLLLLLLL

: SW603 =

LLLLLLLL

” or

LLLHLLLL

” or

LLHLLLLL

” or

LLHHLLLL

” or

LHLHLLLL

(SW603-1,2,3,4pin (CM3-0) = Master mode)

: Other settings are default settings.

( JP602 =

CAD0

, JP603 =

CAD1

)

2: Port Reset & Write Default.

3: Set Addr: 03h =

13

” to setting DSD Input Mode on AK4137.

Set Addr: 04h =

53

” to setting DSD Output Mode on AK4137.

: Other control register settings are default.

Input Data : PORT404 (DSDI-PORT)

Output Data : PORT405 (DSDO-PORT)

Jumpers Setting: DSD Mode

Names

PORT403 PCM/DSD-SEL

JP500

JP501

JP502

JP600

JP601

PCM/DSD-SEL1

PCM/DSD-SEL2

PCM/DSD-SEL3

DEM0

DEM1

Change Functions

DSD PCM: PCM data and clock input / output. (default)

DSD: DSD data and clock input / output.

DSD

DSD

PCM: PCM data (SDTO (TX)) output. (default)

DSD: DSD data (DSDOL (TX)) output.

PCM: PCM clock (OBICK (TX)) input / output. (default)

DSD: DSD clock (ODCLK (TX)) input / output.

DSD

Open

PCM: PCM clock (OLRCK (TX)) input / output. (default)

DSD: DSD data (DSDOR (TX)) output.

Short: DEM0 for PCM Mode. (default)

Open: DSDIL data for DSD Mode.

Open Short: DEM1 for PCM Mode. (default)

Open: DSDIR data for DSD Mode.

Table 6-8. Jumper setting

Control Register setting:

Addr Register Name

03H

DSDICONT

R/W

Default

D7

PCMFSO1

R/W

0

D6

PCMFS0

D5

DSDIFS1

D4

DSDIFS0

D3

DOP

R/W

0

R/W

0

R/W

1

R/W

0

Table 6-9. Addr 04H control register setting

D2

PMI

R/W

0

D1

IDCKB

R/W

0

D0

DSDIE

R/W

0

PCMFS1/0 bit: Set PCM Output Sampling Frequency

00: 44.1kHz or 48kHz (Cuo Off 20kHz) (default)

01: 88.2kHz or 96kHz (Cut Off 40kHz)

10: 176.4kHz or 192kHz (Cut Off 80kHz)

11: More than 384kHz

DSDIFS1/0 bit: Set DSD Input FS

00: 64fs

01: 128fs (default)

10: 256fs

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[AKD4137-A]

11: Reserved (128fs)

DOP bit: Set DSD On PCM Mode

0: OFF (default)

1: ON

PMI bit: Set DSD Iput Phase Modulation

0: Not Phase Modulation Mode (default)

1: Phase Modulation Mode

IDCKB bit: Polarity of IDCLK (DSD Input)

0: DSD data is input from IDCLK falling edge (default)

1: DSD data is input from IDCLK rising edge

DSDIE bit: DSD Input Enable

0: DSD Input Mode OFF (default)

1: DSD Input Mode ON

Addr Register Name

04H DSDOCONT

R/W

Default

D7

DSDCLP1

D6

DSDCLP0

D5

DSDOFS1

D4

DSDOFS0

D3

ERRMASK

R/W

0

R/W

1

R/W

0

R/W

1

R/W

0

Table 6-10. Addr 04H control register setting

DSDOFS1/0 bit: Set DSD Output FS

00: 64fs

01: 128fs (default)

10: 256fs

11: Reserved (128fs)

ODCKB bit: Polarity of ODCLK (DSD Output)

0: DSD data is output from ODCLK falling edge (default)

1: DSD data is output from ODCLK rising edge

DSDOE bit: DSD Output Enable

0: DSD Output Mode OFF (default)

1: DSD Output Mode ON

D2

PMO

R/W

0

D1

ODCKB

R/W

0

D0

DSDOE

R/W

0

< KM117203>

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[AKD4137-A]

Control Software Manual

Set-up evaluation board and control software

1. Set up the evaluation board as needed, according to the previous terms.

2. Connect the evaluation board to a PC with USB cable.

3. USB control is recognized as HID (Human Interface Device) on PC. When it is not recognized properly, please reconnect the evaluation board to PC.

4. Insert the CD-ROM labeled “AKD137-A Evaluation Kit” into the CD-ROM drive.

5. Access the CD-ROM drive and double-click the icon “akd4137-A.exe” to open the control program.

6. Begin evaluation by following the procedure below.

The following operation screen will be shown. (Default setting)

Figure7-1. Control software window

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[AKD4137-A]

Operation Overview

Register map is controlled by this control software.

Frequently used buttons, such as the register initializing button “Write Default”, are located outside of the switching tab window. Refer to the “Dialog Box” section for details of each dialog box setting.

1. [Port Reset] : Reset connection to PC. (Set up USB interface board (AKDUSBIF-B).)

Click this button after the control software starts up and the evaluation board is connected to the PC via USB cable.

2. [Write Default] : Register Initialization.

3. [All Write]

4. [All Read]

5. [Save]

6. [Load]

Use this button to initialize the registers when the device is reset by a hardware reset.

: Execute write command for all registers displayed.

: Execute read command for all registers displayed.

: Save current register settings to a file.

: Execute data write from a saved file.

(Note.100)

7. [All Reg Write] : [All Reg Write] dialog box pops up.

8. [Data R/W] : [Data R/W] dialog box pops up.

9. [Sequence] : [Sequence] dialog box pops up.

10. [Sequence(File)] : [Sequence(File)] dialog box pops up.

11. [Read]

12. [Close]

: Read and display current register setting in register window

(on right side of main window).

Different from [All Read] as it does not reflect to the register map.

: Close Control Software window.

Note 100. The [All Read] button is only valid when the interface mode for register control is in I

2

C bus control mode.

When input dummy command settings to AK4137 and the connection error by the evaluation board to a PC with USB cable, the following No Ack error message will pop up. Click

OK

.

Figure 7-2. No ack message window

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[AKD4137-A]

Tab Functions

1. [REG] Tab: Register Map

This tab is for register read and write.

Each bit on the register map is a push-button switch.

Button Down indicates “1” and the bit name is shown in red (when read-only the name is shown in dark red).

Button Up indicates “0” and the bit name is shown in blue (when read-only the name is shown in gray)

Grayed out registers are Read-Only registers. They cannot be controlled.

The registers which are not defined on the datasheet are indicated as “---”.

Figure 7-3. [REG] window (REG 00H-06H)

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2. [Tool] Tab: Testing Tools

This tab screen is for the evaluation testing tool.

Click button for each testing tool.

[AKD4137-A]

Figure 7-4. [Tool] window

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[AKD4137-A]

Dialog boxes

1. [Write] button: Data Write Dialog

Select the [Write] button located on the right of the each corresponding address when changing two or more bits on the same address simultaneously.

Click the [Write] button for the register pop-up dialog box shown below.

When the checkbox next to the register is checked, the data will become “1”. When the checkbox is not checked, the data will become “0”. Click [OK] to write the set values to the registers, or click [Cancel] to cancel this setting.

Figure 7-5. Register set window

2. [Read] button: Data Read (Only in I

2

C-bus Control Mode)

Click the [Read] button located on the right of the each corresponding address to execute a register read.

The current register value will be displayed in the register window as well as in the upper right hand DEBUG window.

Button Down indicates “1” and the bit name is shown in red (when read only the bit name is shown in dark red).

Button Up indicates “0” and the bit name is shown in blue (when read only the bit name is shown in gray)

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[AKD4137-A]

3. [All Register Write]: All Register Write dialog box

Click [All Reg Write] button in the main window to open register setting file window shown below.

Register setting files saved by [SAVE] button may be applied.

Figure 7-6. Window of [All Reg Write]

[Open (left)] : Select a register setting file (*.akr).

[Write] : Execute register write with selected setting file.

[Write All] : Execute register write with all selected setting files.

Selected files are executed in descending order.

[Help]

[Save]

: Open help window.

: Save register setting file assignment. File name is “*.mar”.

[Open (right)]: Open saved register setting file assignment “*. mar”.

[Close] : Close dialog box and finish process.

~ Operating Suggestions ~

1. Files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mar” should be stored in the same folder.

2. When register settings are changed by [Save] button in the main window, re-read the file to reflect new register settings.

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4. [Data Read/Write]: Data R/W Dialog Box

Click the [Data R/W] button in the main window for data read/write dialog box.

Data is written to the specified address.

[AKD4137-A]

Figure 7-7. Window of [Data R/W]

[Address] Box : Input data write address in hexadecimal numbers.

[Data] Box

[Mask] Box

[Write]

[Read]

[Close]

: Input write data in hexadecimal numbers.

: Input mask data in hexadecimal numbers.

This value “ANDed” with the write data becomes the input data.

: Write data generated from Data and Mask value is written to the address specified in “Address” box.

(Note.102)

: Read data from the address specified in “Address” box. (Note.103)

: Close dialog box and finish process.

Data write will not be executed unless [Write] is clicked.

Note 102. The register map will be updated after executing the [Write] command.

Note 103. The [Read] button is only valid when the interface mode for register control is in I

2

C bus control mode.

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5. [Sequence]: Sequence Dialog Box

Click the [Sequence] button in the main window for Sequence dialog box.

Register sequence may be set and executed.

[AKD4137-A]

Figure 7-8. Window of [

Sequence

]

~ Sequence Setting ~

Set register sequence according to the following process.

1.

Select a command

Use [Select] pull-down box to choose commands.

Corresponding input boxes will be valid.

<Combo Box>

• No_use

• Register

: Not using this address

: Register write

• Reg(Mask) : Register write (Masked)

• Interval : Take an interval

• Stop

• End

: Pause the sequence

: End the sequence

2.

Input Sequence

[Address] : Data Address

[Data] : Write Data

[Mask] : Mask

This value “ANDed” with the write data becomes the input data.

When Mask = 0x00, current setting is hold.

When Mask = 0xFF, the 8bit data which is set in the [Data] box is written.

When Mask = 0x0F, lower 4bit data which is set in the [Data] box is written.

Upper 4bit is hold to current setting.

[Interval]: Interval Time

Valid boxes for each process command are shown below.

No_use : None

Register

Reg(Mask)

: [Address], [Data], [Interval]

: [Address], [Data], [Mask], [Interval]

Interval

Stop

< KM117203>

: [Interval]

: None

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[AKD4137-A]

End : None

~ Control Buttons ~

Functions of Control Buttons are shown below.

[Start] button : Execute the sequence.

[Help] button : Open a help window.

[Save] button : Save sequence settings as a file. The file name is “*.aks”.

[Open] button : Open a sequence setting file “*.aks”.

[Close] button : Close the dialog box and finishes the process.

Stop Sequence

When “Stop” command is selected in the sequence, the process is paused at this step. It is resumed by clicking the

[Start] button. The process starts from the step shown in [Start Step] box. This step number returns to “1” when the sequence is executed until the end. Input arbitrary step number to the [Start Step] box to start the process from the middle of sequence.

The process sequence can be restarted from the beginning by writing “1” to the [Start Step] box and click the [Start] button during the process.

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6. [Sequence(File)]: Sequence(File) Dialog

Click the [Sequence(File)] button to open sequence setting file dialog box shown below.

Files saved in the “Sequence setting dialog” can be applied in this dialog.

[AKD4137-A]

Figure 7-9. Window of [Sequence(File)]

[Open (left)] button : Select a sequence setting file (*.aks)

[Start ] button : Execute the sequence by the setting of selected file.

[Start All] button : Execute sequence with all selected setting files.

[Help] button

[Save] button

Selected files are executed in descending order.

: Open help window.

: Save register setting file assignment. File name is “*.mas”.

[Open (right)] button : Open saved sequence setting file assignment “*. mas”.

[Close] button :

Close dialog box and finish process.

~ Operating Suggestions ~

1. Files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mas” should be stored in the same folder.

2. When “Stop” command is selected in the sequence, the process is paused at this step and a message shown below pops up. The sequence is resumed by clicking “OK” button.

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[AKD4137-A]

Measurement Results

[Measurement condition]

Measurement unit

Power Supply

Band width

Resolution (Bit)

XTI Input

Output PORT

Temperature

: Audio Precision, System Two Cascade

: DVDD=3.3V (VSEL=L)

: 20Hz

FSO/2

: 24bit

: Use X’Tal (X1)

: Slave Mode

: Room

[Measurement Result]

SRC Characteristics

THD+N (Input = 1kHz, 0dBFS)

FSO/FSI = 48kHz/48kHz

FSO/FSI = 48kHz/44.1kHz

FSO/FSI = 48kHz/192kHz

FSO/FSI = 192kHz/48kHz

Worst Case (FSO/FSI = 32kHz/176.4kHz)

Dynamic Range (Input = 1kHz,

60dBFS)

FSO/FSI = 48kHz/48kHz

FSO/FSI = 48kHz/44.1kHz

FSO/FSI = 48kHz/192kHz

FSO/FSI = 192kHz/48kHz

Worst Case(FSO/FSI = 48kHz/32kHz)

Dynamic Range (Input = 1kHz,

60dBFS, A-weighted)

FSO/FSI = 44.1kHz/48kHz

Lch

SDTO

Rch

Unit

140.9

140.9

dB

132.4

132.4

dB

142.8

142.8

dB

130.4

130.4

dB

113.8

113.8

dB

141.7

141.7

dB

141.4

141.3

dB

143.1

143.1

dB

133.8

133.7

dB

141.5

141.5

dB

146.2

146.2

dB

< KM117203>

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[Plots]

AK4137FFT

FSO/FSI=44.1kHz/48kHz, 1kHz/0dBFSInput d

B

F

S

-70

-80

-90

-100

-110

-120

-130

-140

-150

-160

-170

-180

-190

+0

-10

-20

-30

-40

-50

-60

-200

20 50 100 200 500

Hz

1k 2k 5k

Figure8-1.FFTPlot(Input=0dBFS)

AK4137FFT

FSO/FSI=44.1kHz/48kHz, 1kHz/-60dBFSInput

10k 20k d

B

F

S

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

+0

-10

-20

-30

-140

-150

-160

-170

-180

-190

-200

20 50 100 200 500

Hz

1k 2k

Figure8-2.FFTPlot(Input=-60dBFS)

5k 10k 20k

[AKD4137-A]

< KM117203> 2019/07

- 32-

-110

-115

F

S d

B

-120

-125

-130

-135

-140

-145

-100

-105

-90

-95

-150

20

AK4137THD+Nvs.Input Level

FSO/FSI=44.1kHz/48kHz, fin=1kHz

F

S d

B

-142

-144

-146

-148

-134

-136

-138

-140

-120

-122

-124

-126

-128

-130

-132

-150

-140 -130 -120 -110 -100 -90 -80 -70 dBFS

-60 -50 -40 -30 -20 -10 +0

[AKD4137-A]

Figure8-3.THD+Nvs.InputLevel

AK4137THD+Nvs.Input Frequency

FSO/FSI=44.1kHz/48kHz, 0dBFSInput

10k 20k 50 100 200 500

Hz

1k 2k 5k

Figure8-4.THD+Nvs.InputFrequency(Input=0dBFS)

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AK4137THD+Nvs.Input Frequency

FSO/FSI=44.1kHz/48kHz, -60dBFSInput

-110

-115

F

S d

B

-120

-125

-130

-135

-100

-105

-90

-95

-140

-145

-150

20 50 100 200 500

Hz

1k 2k 5k 10k 20k

F

S d

B

+0

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

-150

-140 -130

Figure8-5.THD+Nvs.InputFrequency(Input=-60dBFS)

AK4137Linearity

FSO/FSI=44.1kHz/48kHz, fin=1kHz

-120 -110 -100 -90 -80 -70 dBFS

-60 -50 -40 -30 -20 -10 +0

Figure8-6.Linearity

[AKD4137-A]

< KM117203> 2019/07

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d

B

F

S

+1

+0.5

-0

-0.5

-1

-1.5

-2

-2.5

-3

-3.5

-6

-6.5

-7

-7.5

-4

-4.5

-5

-5.5

-8 d

B

F

S

[AKD4137-A]

AK4137 Frequency Response

FSI=44.1kHz/48kHz/96kHz/192kHz

FSO=44.1kHz, 0dBFS Input

+1

+0.5

-0

-0.5

-1

-1.5

-2

-2.5

-3

-3.5

-4

-4.5

-5

-5.5

-6

F S I = 1 9 2 k

F S I = 9 6 k

F S I = 4 8 k

F S I = 4 4 . 1 k

-6.5

-7

FSI: Yellow=44.1kHz/Blue=48kHz/Red=96kHz/Green=192kHz

-7.5

-8

2k 4k 6k 8k 10k 12k 14k 16k 18k 20k

Hz

22k

Figure8-7. Frequency Response (FSO=44.1kHz)

AK4137 Frequency Response

FSI=48kHz/96kHz/192kHz

FSO=48kHz, 0dBFS Input

F S I = 1 9 2 k

F S I = 9 6 k

F S I = 4 8 k

FSI: Blue=48kHz/Red=96kHz/Green=192kHz

2k 4k 6k 8k 10k 12k

Hz

14k 16k 18k

Figure8-8. Frequency Response (FSO=48kHz)

20k 22k 24k

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R E V IS I ON H IS T OR Y

D a t e

( Y Y / M M / D D )

1 4 / 0 7 / 0 2

M a n u a l

R e v i s i o n

K M 1 1 7 2 0 0

1 5 / 0 3 / 1 0

1 5 / 0 4 / 1 7

1 9 / 0 7 / 1 0

K M 1 1 7 2 0 1

K M 1 1 7 2 0 2

K M 1 1 7 2 0 3

B o a r d

R e v i s i o n

0

1

2

2

R e a s o n

F i r s t e d i t i o n

C h a n g e

C h a n g e

C h a n g e

P a g e

-

-

-

-

C o n t e n t s

B o a r d R e v i s i o n c h a n g e d

B o a r d R e v i s i o n c h a n g e d

C o n t r o l S o f t V e r s i o n U p

[AKD4137-A]

< KM117203>

- 36-

2019/07

[AKD4137-A]

I M P O R T A N T N O T I C E

0 . A s a h i K a s e i M i c r o d e v i c e s C o r p o r a t i o n ( “ A K M ” ) r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o t h e i n f o r m a t i o n c o n t a i n e d i n t h i s d o c u m e n t w i t h o u t n o t i c e . W h e n y o u c o n s i d e r a n y u s e o r a p p l i c a t i o n o f A K M p r o d u c t s t i p u l a t e d i n t h i s d o c u m e n t ( “ P r o d u c t ” ) , p l e a s e m a k e i n q u i r i e s t h e s a l e s o f f i c e o f A K M o r a u t h o r i z e d d i s t r i b u t o r s a s t o c u r r e n t s t a t u s o f t h e P r o d u c t s .

1 . A l l i n f o r m a t i o n i n c l u d e d i n t h i s d o c u m e n t a r e p r o v i d e d o n l y t o i l l u s t r a t e t h e o p e r a t i o n a n d a p p l i c a t i o n e x a m p l e s o f A K M P r o d u c t s . A K M n e i t h e r m a k e s w a r r a n t i e s o r r e p r e s e n t a t i o n s w i t h r e s p e c t t o t h e a c c u r a c y o r c o m p l e t e n e s s o f t h e i n f o r m a t i o n c o n t a i n e d i n t h i s d o c u m e n t n o r g r a n t s a n y l i c e n s e t o a n y i n t e l l e c t u a l p r o p e r t y r i g h t s o r a n y o t h e r r i g h t s o f A K M o r a n y t h i r d p a r t y w i t h r e s p e c t t o t h e i n f o r m a t i o n i n t h i s d o c u m e n t . Y o u a r e f u l l y r e s p o n s i b l e f o r u s e o f s u c h i n f o r m a t i o n c o n t a i n e d i n t h i s d o c u m e n t i n y o u r p r o d u c t d e s i g n o r a p p l i c a t i o n s . A K M

A S S U M E S N O L I A B I L I T Y F O R A N Y L O S S E S I N C U R R E D B Y Y O U O R T H I R D P A R T I E S

A R I S I N G F R O M T H E U S E O F S U C H I N F O R M A T I O N I N Y O U R P R O D U C T D E S I G N O R

A P P L I C A T I O N S .

2 . T h e P r o d u c t i s n e i t h e r i n t e n d e d n o r w a r r a n t e d f o r u s e i n e q u i p m e n t o r s y s t e m s t h a t r e q u i r e e x t r a o r d i n a r i l y h i g h l e v e l s o f q u a l i t y a n d / o r r e l i a b i l i t y a n d / o r a m a l f u n c t i o n o r f a i l u r e o f w h i c h m a y c a u s e l o s s o f h u m a n l i f e , b o d i l y i n j u r y , s e r i o u s p r o p e r t y d a m a g e o r s e r i o u s p u b l i c i m p a c t , i n c l u d i n g b u t n o t l i m i t e d t o , e q u i p m e n t u s e d i n n u c l e a r f a c i l i t i e s , e q u i p m e n t u s e d i n t h e a e r o s p a c e i n d u s t r y , m e d i c a l e q u i p m e n t , e q u i p m e n t u s e d f o r a u t o m o b i l e s , t r a i n s , s h i p s a n d o t h e r t r a n s p o r t a t i o n , t r a f f i c s i g n a l i n g e q u i p m e n t , e q u i p m e n t u s e d t o c o n t r o l c o mb u s t i o n s o r e x p l o s i o n s , s a f e t y d e v i c e s , e l e v a t o r s a n d e s c a l a t o r s , d e v i c e s r e l a t e d t o e l e c t r i c p o w e r , a n d e q u i p m e n t u s e d i n f i n a n c e - r e l a t e d f i e l d s . D o n o t u s e P r o d u c t f o r t h e a b o v e u s e u n l e s s s p e c i f i c a l l y a g r e e d b y A K M i n w r i t i n g .

3 . T h o u g h A K M w o r k s c o n t i n u a l l y t o i m p r o v e t h e P r o d u c t ’ s q u a l i t y a n d r e l i a b i l i t y , y o u a r e r e s p o n s i b l e f o r c o m p l y i n g w i t h s a f e t y s t a n d a r d s a n d f o r p r o v i d i n g a d e q u a t e d e s i g n s a n d s a f e g u a r d s f o r y o u r h a r d w a r e , s o f t w a r e a n d s y s t e m s w h i c h m i n i m i z e r i s k a n d a v o i d s i t u a t i o n s i n w h i c h a m a l f u n c t i o n o r f a i l u r e o f t h e P r o d u c t c o u l d c a u s e l o s s o f h u m a n l i f e , b o d i l y i n j u r y o r d a m a g e t o p r o p e r t y , i n c l u d i n g d a t a l o s s o r c o r r u p t i o n .

4 . D o n o t u s e o r o t h e r w i s e m a k e a v a i l a b l e t h e P r o d u c t o r r e l a t e d t e c h n o l o g y o r a n y i n f o r m a t i o n c o n t a i n e d i n t h i s d o c u m e n t f o r a n y m i l i t a r y p u r p o s e s , i n c l u d i n g w i t h o u t l i m i t a t i o n , f o r t h e d e s i g n , d e v e l o p m e n t , u s e , s t o c k p i l i n g o r m a n u f a c t u r i n g o f n u c l e a r , c h e m i c a l , o r b i o l o g i c a l w e a p o n s o r m i s s i l e t e c h n o l o g y p r o d u c t s ( m a s s d e s t r u c t i o n w e a p o n s ) . W h e n e x p o r t i n g t h e

P r o d u c t s o r r e l a t e d t e c h n o l o g y o r a n y i n f o r m a t i o n c o n t a i n e d i n t h i s d o c u m e n t , y o u s h o u l d c o m p l y w i t h t h e a p p l i c a b l e e x p o r t c o n t r o l l a w s a n d r e g u l a t i o n s a n d f o l l o w t h e p r o c e d u r e s r e q u i r e d b y s u c h l a w s a n d r e g u l a t i o n s . T h e P r o d u c t s a n d r e l a t e d t e c h n o l o g y m a y n o t b e u s e d f o r o r i n c o r p o r a t e d i n t o a n y p r o d u c t s o r s y s t e m s w h o s e m a n u f a c t u r e , u s e , o r s a l e i s p r o h i b i t e d u n d e r a n y a p p l i c a b l e d o m e s t i c o r f o r e i g n l a w s o r r e g u l a t i o n s .

5 . P l e a s e c o n t a c t A K M s a l e s r e p r e s e n t a t i v e f o r d e t a i l s a s t o e n v i r o n m e n t a l m a t t e r s s u c h a s t h e

R o H S c o m p a t i b i l i t y o f t h e P r o d u c t . P l e a s e u s e t h e P r o d u c t i n c o m p l i a n c e w i t h a l l a p p l i c a b l e l a w s a n d r e g u l a t i o n s t h a t r e g u l a t e t h e i n c l u s i o n o r u s e o f c o n t r o l l e d s u b s t a n c e s , i n c l u d i n g w i t h o u t l i m i t a t i o n , t h e E U R o H S D i r e c t i v e . A K M a s s u m e s n o l i a b i l i t y f o r d a m a g e s o r l o s s e s o c c u r r i n g a s a r e s u l t o f n o n c o m p l i a n c e w i t h a p p l i c a b l e l a w s a n d r e g u l a t i o n s .

6 . R e s a l e o f t h e P r o d u c t w i t h p r o v i s i o n s d i f f e r e n t f r o m t h e s t a t e m e n t a n d / o r t e c h n i c a l f e a t u r e s s e t f o r t h i n t h i s d o c u m e n t s h a l l i m m e d i a t e l y v o i d a n y w a r r a n t y g r a n t e d b y A K M f o r t h e P r o d u c t a n d s h a l l n o t c r e a t e o r e x t e n d i n a n y m a n n e r w h a t s o e v e r , a n y l i a b i l i t y o f A K M .

7 . T h i s d o c u m e n t m a y n o t b e r e p r o d u c e d o r d u p l i c a t e d , i n a n y f o r m , i n w h o l e o r i n p a r t , w i t h o u t p r i o r w r i t t e n c o n s e n t o f A K M .

R e v . 1

< KM117203> 2019/07

- 37-

A

D

C

B

E

5

X100, X101 = open, NX5032GA

X100 Frequency Check -> Xtal=Daishinku

X101 Frequency Check -> Xtal=NDK (NX5032GA)

RDS100, RDS101 = 0ohm, 0ohm

RD100 = 0ohm

CXO100, CXI100 = 10pF, 10pF

RDS100 0 RD100 0

XTO

XTO

4

CXO100 10p

X101

24.576MHz

XTI/OMCLK/TDMI

XTI/OMCLK/TDMI

RDS101 0

X100

22.5792MHz

CXI100 10p

DVSS

CN3

48pin_3

R111

0

R113

1M

R112

0

R114

1M

C104

1u

C105

1u

C106

0.1u

C107

0.1u

DVSS

3

R115

0

R116

0

R117

0

R118

0

R119

51

R120

51

R121

51

R122

0

R123

0

2

OBIT0/TDO4

TP136

OBIT1

TP137

CM0/TDO5

TP138

CM1

TP139

CM2/TDO6

TP140

CM3

TP141

VSEL

TP142

DV18

TP143

DVSS

TP144

DVDD

TP145

CN4

48pin_4

45

46

43

44

47

48

41

42

39

40

37

38

R100 0

OBIT0/TDO4

R101 0

OBIT1

R102 0

CM0/TDO5

R103 0

CM1

R104 0

CM2/TDO6

R105 0

CM3

R106 0

VSEL

DV18

R107 0

R108

1M

C100

10u

+

DVSS

DVDD

R110

R109

1M

C102

1u

+

0

C101

0.1u

C103

0.1u

JP100

DV18-SEL

DVSS

37

OBIT0/TDO4

38

OBIT1

39

CM0/TDO5

40

CM1

41

CM2/TDO6

42

CM3

43

VSEL

44

DV18

45

DVSS

46

DVDD

NC 47

NC

DVSS

NC

48

NC

U1

1

E

MCKO

24

SMSEMI

23

DITHER

22

ODIF0/TDO2

21

ODIF1/TDO1

20

CSN/SMUTE

19

SCL/CCLK/SD

18

SDA/CDTI/SLOW

17

CDTO

16

PSN

15

PDN

14

I2C

13

CN2

48pin_2

R136 51

MCKO

24

R137 0

SMSEMI

23

R138 0

DITHER

22

R139 51

ODIF0/TDO2

21

R140 51

ODIF1/TDO1

20

R141 51

CSN/SMUTE

19

R142 51

SCL/CCLK/SD

18

R143 51

SDA/CDTI/SLOW

17

R144 51

CDTO

16

R145 0

PSN

15

R146 51

PDN

C108 open

R147 0

I2C

DVSS

14

13

D

MCKO

TP123

SMSEMI

TP122

DITHER

TP121

ODIF0/TDO2

TP120

ODIF1/TDO1

TP119

CSN/SMUTE

TP118

SCL/CCLK/SD

TP117

SDA/CDTI/SLOW

TP116

CDTO

C

TP115

PSN

TP114

PDN1

Cap Dip open + 1pin Socket (PDN Cap)

B

TP113

I2C

TP112

R124

51

R125

51

R126

51

R127

51

R128

51

R129

51

R130

0

R131

0

R132

0

R133

0

R134

0

R135

0

A

CN1

48pin_1

- 38-

3 5 4 2 1

E

D

C

PORT1

RX-OPT

VCC

3

GND

OUT

2

1

5

1

L200 47uH

C200

0.1u

+

2

C201

10u

DVSS

2

3

4

5

J200

RX-COAX

1

C211 0.1u

R207

75

R200

51

D33V

TP200

RX-OPT

4

JP200

OPT

COAX

RXDATA-SEL

DVSS

D33V

H

L

SW200

Res 47kohm Chip

R202 - R206

DVSS

OCKS0-R

OCKS1-R

1

IPS0/RX4

2

NC

3

DIF0/RX5

4

TEST2

5

DIF1/RX6

6

VSS1

7

DIF2/RX7

8

IPS1/IIC

9

P/SN

10

XTL0

11

XTL1

12

VIN/GP0

DVSS

B

C205

0.1u

C206

10u

D33V

DVSS

A

5 4

- 39-

3

3 1 2

D33V

U2

E

C202

C203

R201

C204

0.47u

10u

0.1u

10k

C207

0.1u

C208

10u

INT0

36

OCKS0/CSN/CAD0

35

OCKS1/CCLK/SCL

34

CM1/CDTI/SDA

33

CM0/CDTO/CAD1

32

PDN

31

XTI

30

XTO

29

DAUX

28

MCKO2

27

BICK

26

SDTO

25

DVSS

DVSS

X200

C209

24.576MHz

C210

BICK-4118A-R

SDTO-4118A-R

5p

5p

INT0-R

OCKS0-R

OCKS1-R

D33V

PDN2-R

X200 Frequency Check -> 24.576MHz

+ 1pin Socket (AK4118 Xtal)

DVSS

BICK-4118A-R

SDTO-4118A-R

D

C

LRCK-4118A-R

MCLK-4118A-R

LRCK-4118A-R

MCLK-4118A-R

B

2 1

A

5 4

DVSS

D

C

R301 - R305

H

L

Res 47kohm Chip

DVSS

SW300

D33V

OCKS0-T

OCKS1-T

B

A

PORT2

TX-OPT

IN

VCC

3

2

GND

1

TP300

TX-OPT

C300

0.1u

DVSS

DVSS

2

3

4

5

J300

TX-COAX

1

T300

DA-02F

DVSS

D33V

C310

0.1u

R306

240

R307

150

DVSS

5

D33V

DVSS

JP300

OPT

COAX

TXDATA-SEL

4

C304

0.1u

C305

10u

1

IPS0/RX4

2

NC

3

DIF0/RX5

4

TEST2

5

DIF1/RX6

6

VSS1

7

DIF2/RX7

8

IPS1/IIC

9

P/SN

10

XTL0

11

XTL1

12

VIN/GP0

- 40-

3

3

U3

C301

C302

R300

C303

0.47u

10u

0.1u

10k

2

D33V

1

C306

0.1u

C307

10u

D

INT0

36

OCKS0/CSN/CAD0

35

OCKS1/CCLK/SCL

34

CM1/CDTI/SDA

33

CM0/CDTO/CAD1

32

PDN

31

XTI

30

XTO

29

DAUX

28

MCKO2

27

BICK

26

SDTO

25

INT0-T

OCKS0-T

OCKS1-T

D33V

DVSS

PDN2-T

C308 5p

X300

24.576MHz

C309 5p

DAUX-4118A-T

DVSS

X300 Frequency Check -> 24.576MHz

+ 1pin Socket (AK4118 Xtal)

DAUX-4118A-T

BICK-4118A-T

BICK-4118A-T

C

LRCK-4118A-T

MCLK-4118A-T

LRCK-4118A-T

MCLK-4118A-T

B

2 1

A

D

C

B

A

DVSS

5

BICK-4118A-R

PORT400

SDTI

ILRCK

IBICK

IMCLK

RX-PORT

PORT400-SDTI

PORT400-ILRCK

PORT400-IBICK

PORT400-IMCLK

LRCK-4118A-R

SDTO-4118A-R

4

PORT400-IBICK

DIR

PORT400

GND

JP400

BICK-R-SEL

DVSS

BICK-R-THR

BICK-R-INV

THR

JP401

TP400

BICK-R

BICK-R0

INV

BICK-R-PHASE

TP401

LRCK-R

LRCK-R0

PORT400-ILRCK

DIR

PORT400

GND

JP402

LRCK-R-SEL

DVSS

TP402

SDTI-R0

ISDTI-R100

PORT400-SDTI

DIR

PORT400

GND

JP403

SDTI-R-SEL

DVSS

PORT404

DSDIL

DSDIR

IDCLK

DSDIL-R0

DSDIR-R0

IDCLK-R0

DSDI-PORT

DSDIL-R0

DSDIR-R0

IDCLK-R0

DVSS

2

3

4

5

J400

EXT-R

1

R400

51

JP405

EXT-R

MCLK-4118A-R

DVSS

PORT400-IMCLK

PORT400

EXT

GND

DIR

JP404

MCLK-R-SEL

DVSS

JP407

TDMI-EXT

PORT400-SDTI

PORT401-SDTO

PORT400

EXT

GND

PORT401

JP406

TDMI-EXT-SEL

TP403

MCLK-R

MCLK-R0

TP404

TDMI-EXT0

TDMI-EXT0

3

PORT402

PCMI-PORT

BICK-4118A-T

IBICK-R0

ILRCK-R0

SDTI-R0

DVSS

PORT401

SDTO

OLRCK

OBICK

OMCLK

TX-PORT

PORT401-SDTO

PORT401-OLRCK

PORT401-OBICK

PORT401-OMCLK

LRCK-4118A-T

2

3

4

5

DVSS

J401

EXT-T

1

R401

51

JP413

EXT-T

DAUX-4118A-T

MCLK-4118A-T

2 1

PORT401-OBICK

DIT

PORT401

GND

JP408

BICK-T-SEL

DVSS

BICK-T-THR

BICK-T-INV

THR

JP409

TP405

BICK-T

OBICK-T0

INV

BICK-T-PHASE

TP406

LRCK-T

OLRCK-T0

PORT401-OLRCK

DIT

PORT401

GND

JP410

LRCK-T-SEL

DVSS

TP407

SDTO-T0

SDTO-T0

PORT401-SDTO

DIT

PORT401

GND

JP411

SDTO-T-SEL

DVSS

PORT405

DSDOL

DSDOR

ODCLK

DSDOL-T0

DSDOR-T0

ODCLK-T0

DSDO-PORT

DVSS

PORT401-OMCLK

PORT401

EXT

GND

DIT

JP412

MCLK-T-SEL

TP408

MCLK-T

MCLK-T0

ODCLK-T0

DSDOR-T0

DSDOL-T0

1-PCM

2-DSD

3-PCM

4-DSD

5-PCM

6-DSD

PORT403

PCM/DSD-SEL

OBICK-T1

ODCLK-T1

OLRCLK-T1

DSDOR-T1

SDTO-T1

DSDOL-T1

D33V

D400

HSU119

R402

10k

L

SW400

PDN1

H

C400

0.1u

BICK-R-INV

BICK-R-THR

U401

1

2

3

4

5

6

7

1A

1Y

2A

2Y

3A

3Y

GND

VCC

6A

6Y

5A

5Y

4A

4Y

14

13

12

11

10

9

8

74HC14

BICK-T-THR

BICK-T-INV

R405 1k

R406 1k

2

LE401

2

LE400

INT0-T

1

INT0-T

INT0-R

1

INT0-R

D33V

C403

0.1u

D33V

L

SW401

PDN2-R

D401

HSU119

R403

10k

H

C401

0.1u

U402

1

2

3

4

5

6

7

1A

1Y

2A

2Y

3A

3Y

GND

VCC

6A

6Y

5A

5Y

4A

4Y

74HC14

14

13

12

11

10

9

8

R407 0

R408 0

D33V

C404

0.1u

DVSS

D33V

DVSS

D403

HSU119

R409

10k

L

SW403

SMUTE1

H

C405

0.1u

U403

1

2

3

4

5

6

7

1A

1Y

2A

2Y

3A

3Y

GND

VCC

6A

6Y

5A

5Y

4A

4Y

14

13

12

11

10

9

8

74HC14

R413 0

R412 0

R411 0

R410 0

DVSS

PDN10

D33V

C406

0.1u

D33V

L

SW402

PDN2-T

DVSS

D402

HSU119

R404

10k

H

C402

0.1u

PDN2-R

PDN2-T

5

DVSS

4

DVSS

SMUTE10

- 41-

DVSS

3 2 1

D

C

B

A

5 4 3 2 1

D

C

SDTI-R0

ILRCK-R0

IBICK-R0

TDMI-EXT0

MCLK-R0

MCLK-T0

PDN10

SMUTE10

R500

R501

R502

R503

R504

R505

R506

R507

51

51

51

51

R534 0

R535 0

R536 0

R537 0

DVSS

51

51

R538 0

R539 0

R540 0

R541 0

R542 0

R543 0

DVSS

51

51

R544 0

R545 0

R546 0

R547 0

R548 0

R549 0

DVSS

DVSS

DVSS

DVSS

1

19

4

5

6

7

2

3

8

9

D33V -> DVDD

U500

18

A1 Y1

17

A2 Y2

16

A3 Y3

15

A4 Y4

14

A5 Y5

13

A6 Y6

12

A7 Y7

11

A8 Y8

G1

G2

74VCX541

R508

R509

R510

R511

DVDD

0

0

0

0

SDTI

ILRCK

IBICK

TDMI-EXT0

C500

0.1u

U500 (Buffer)

10pin=DVSS

20pin=DVDD

DVSS for U500 74VCX541

1

19

5

6

7

8

9

2

3

4

D33V -> DVDD

U501

18

A1 Y1

17

A2 Y2

16

A3 Y3

15

A4 Y4

14

A5 Y5

13

A6 Y6

12

A7 Y7

11

A8 Y8

G1

G2

74VCX541

R512

R513

DVDD

0

0

MCLK-R

MCLK-T

C501

0.1u

U507 (Buffer)

10pin=DVSS

20pin=DVDD

DVSS for U507 74VCX541

1

19

4

5

6

7

2

3

8

9

D33V -> DVDD

U502

18

A1 Y1

17

A2 Y2

16

A3 Y3

15

A4 Y4

14

A5 Y5

13

A6 Y6

12

A7 Y7

11

A8 Y8

G1

G2

74VCX541

R514

R515

DVDD

0

0

PDN1

SMUTE1

C502

0.1u

U506 (Buffer)

10pin=DVSS

20pin=DVDD

DVSS for U506 74VCX541

B

A

DSDIL-R0

DSDIR-R0

IDCLK-R0

DSDOL-T1

DSDOR-T1

ODCLK-T1

R516

R517

R518

R519

R520

R521

SDTO-T2

DSDOL-T2

PCM

DSD

SDTO/DSDOL

JP500 PCM/DSD-SEL1

OBICK-T2

ODCLK-T2

PCM

DSD

OBICK/ODCLK

JP501 PCM/DSD-SEL2

51

51

51

51

51

51

DSDOL-T2

DSDOR-T2

ODCLK-T2

OLRCLK-T2

DSDOR-T2

PCM

DSD

OLRCLK/DSDOR

JP502 PCM/DSD-SEL3

DSDIL/DEM0

DSDIR/DEM1

IDCLK

SDTO-T1

D33V

C504

0.1u

R522 51

14

13

12

11

18

17

16

15

DVSS for U503 74VCX541

U503 (Buffer)

10pin=DVSS

20pin=D33V

DVDD -> D33V

U503

2

Y1 A1

3

Y2 A2

4

Y3 A3

5

Y4 A4

6

Y5 A5

7

Y6 A6

8

Y7 A7

9

Y8 A8

G1

G2

1

19

74VCX541

R555 0

R556 0

R557 0

R558 0

R559 0

R560 0

R561 0

DVSS

R523

DVSS

0

SDTO-T2

OBICK-T1

OLRCLK-T1

R524

R525

CM31

CM21

CM01

D33V

C507

0.1u

R528

R529

R530

51

51

51

18

17

16

15

14

13

12

11

DVSS for U503 74VCX541

U503 (Buffer)

10pin=DVSS

20pin=D33V

DVDD -> D33V

U506

2

Y1 A1

3

Y2 A2

4

Y3 A3

5

Y4 A4

6

Y5 A5

7

Y6 A6

8

Y7 A7

9

Y8 A8

G1

G2

1

19

74VCX541

R574 0

R575 0

R576 0

R577 0

R578 0

DVSS

R531

R532

R533

DVSS

0

0

0

51

51

CM3

CM20

CM00

R562 0

R563 0

R564 0

R565 0

R566 0

R567 0

DVSS

18

17

16

15

14

13

12

11

5

6

7

8

9

2

3

4

1

19

U502 (Buffer)

10pin=DVSS

20pin=D33V

D33V -> DVDD

U504

18

A1 Y1

17

A2 Y2

16

A3 Y3

15

A4 Y4

14

A5 Y5

13

A6 Y6

12

A7

A8

Y7

Y8

11

G1

G2

U501 (Buffer)

10pin=DVSS

74VCX541

DVDD -> D33V

U505

20pin=DVDD

2

Y1 A1

3

Y2 A2

4

Y3 A3

5

Y4

Y5

Y6

Y7

Y8

A4

A5

A6

A7

A8

G1

G2

6

7

8

9

1

19

R568 0

R569 0

R570 0

R571 0

R572 0

R573 0

74VCX541

R526

R527

DVDD

D33V

C506

0.1u

0

0

C505

0.1u

DVSS

OBICK-T2

OLRCLK-T2 for U501 74VCX541

DVSS

DVSS for U502 74VCX541

CM31

CM01

R579 0

R580 0

R581 0

DVSS

D33V

C508

0.1u

9

11

13

1

3

5

U507

1A

2A

3A

4A

5A

6A

1Y

2Y

3Y

4Y

5Y

6Y

74VCX14

U505 (INV)

7pin=DVSS

14pin=D33V

2

4

6

8

10

12

DVSS for U505 74VCX14

CM21

R582 0

R583 0

D33V

DVSS

C509

0.1u

5

9

10

1

2

4

12

13

U508

1A

1B

2A

2B

3A

3B

4A

4B

1Y

2Y

3Y

4Y

74VCX00

U504 (NAND)

7pin=DVSS

14pin=D33V

3

6

8

11

DVSS for U504 74VCX00

- 42-

3 5 4 2 1

D

C

B

A

D

C

B

A

5 4 3 2

DEM0

DEM0 DSDIL/DEM0-0

JP600 DEM0

R600 0

DEM1

DEM1 DSDIR/DEM1-0

JP601 DEM1

MCLK-R

MCLK-T

MCLK-R

MCLK-T

TDMI-EXT0

TDMI-EXT0

R661

R662

2

3

4

5

J600

EXT-MCKO

1

R665

51

JP628

MCKO-EXT

CAD0

IDIF0

CAD1

IDIF1

CAD0

IDIF0

CAD1

IDIF1

JP605

TDO0

IDIF2

TDO0

IDIF2

R605

DVSS

JP606

SRCE-N

SRCE-N0

DVSS

CAD0

CAD0/IDIF0-0

IDIF0

JP602

CAD0/IDFI0

CAD1

CAD1/IDIF1-0

IDIF1

JP603

CAD1/IDFI1

51

IDIF2

IDIF2/TDO0-0

TDO0

JP604

IDIF2/TDO0

TEST00

TEST00

TEST0

TEST0-0

VSS

JP607

TEST0

TEST10

DVSS

TEST10

TEST1

TEST1-0

VSS

JP608

TEST1

DVSS

DVSS

OPEN: XTI

JP609

OMCLK

TDMI

51

51

JP610

OMCLK-SEL

R663 51

XTI/OMCLK/TDMI-SEL

MCKO0

R601

R602

R603

R604

0

0

0

R606 51 SRCEN

R607

R608

R609

0

0

0

0

R664 51 MCKO

DVSS

H

L

DVDD

SW600

SW DIP-8

DVDD

SW601

SW DIP-8

DSDIL/DEM0

DSDIR/DEM1

CAD0/IDIF0

CAD1/IDIF1

IDIF2/TDO0

SRCEN

TEST0

TEST1

XTI/OMCLK/TDMI

MCKO

H

L

I2C

IDIF0

IDIF1

IDIF2

CAD0

CAD1

DEM0

DEM1

I2C

IDIF0

IDIF1

IDIF2

CAD0

CAD1

DEM0

DEM1

DITHER

ODIF0

ODIF1

SD

SLOW

PSN

TEST00

TEST10

DITHER

ODIF0

ODIF1

SD

SLOW

PSN

TEST00

TEST10

DVDD

SW602

SW DIP-8

SDA/CDTI

SLOW

SDA/CDTI

SLOW

SDA/CDTI

SDA/CDTI/SLOW-0

SLOW

JP611 SDA/CDTI/SLOW

SCL/CCLK

SD

SCL/CCLK

SD

SCL/CCLK

SCL/CCLK/SD-0

SD

JP612 SCL/CCLK/SD

CSN

SMUTE1

CSN

SMUTE1

CSN

CSN/SMUTE-0

SMUTE

JP613 CSN/SMUTE

JP615

TDO1

ODIF1

TDO1

ODIF1

R616 51

ODIF1

ODIF1/TDO1-0

TDO1

JP614

ODIF1/TDO1

DVSS

JP617

TDO2

ODIF0

TDO2

ODIF0

R618

DVSS

JP619

TDO3

TDM

R620 51

TDM

TDM/TDO3-0

TDO3

JP618

TDM/TDO3

DVSS

JP621

TDO4

OBIT00

R622 51

OBIT0

OBIT0/TDO4-0

TDO4

JP620

OBIT0/TDO4

DVSS

JP623

OBIT1EXT

OBIT10

OBIT1EXT

OBIT10

R624 51

OBIT1-HL

OBIT1-0

OBIT1-EXT

JP622

OBIT1

DVSS

JP625

TDO5

OBIT00

TDO4

CM00

TDO5

CM00

R626 51

CM0

CM0/TDO5-0

TDO5

JP624

CM0/TDO5

DVSS

JP627

TDO6

TDM

TDO3

CM20

TDO6

CM20

R628 51

CM0

CM2/TDO6-0

TDO6

JP626

CM2/TDO6

DVSS

51

ODIF0

ODIF0/TDO2-0

TDO2

JP616

ODIF0/TDO2

R612

R613

R614

R615

R617

R619

R621

R623

R625 0

R627

0

0

0

0

0

0

0

0

0

OBIT0

OBIT1

VSEL

CLKMODE

TDM

SMT0

SMT1

SMSEMI

OBIT00

OBIT10

VSEL

CLKMODE

TDM

SMT0

SMT1

SMSEMI

DVDD

SW603

SW DIP-8

CM00

CM1

CM20

CM3

CM00

CM1

CM20

CM3

SDA/CDTI/SLOW

SCL/CCLK/SD

CSN/SMUTE

ODIF1/TDO1

ODIF0/TDO2

TDM/TDO3

OBIT0/TDO4

OBIT1

CM0/TDO5

CM2/TDO6

5

DVSS DVSS

4

DVSS

- 43-

3

DVSS

2 1

1

D

C

B

A

5 4 3 2 1

R702

4.7k

D

C700

2.2u

A

DVSS

C701

1u/25V(A)

DVSS

C702

10u

C703

0.1u

DVSS

C704

10u

C705

0.1u

C SILK-SCREEN(JP700)

1:VDD

JP700

2:MCLR

1

2

3:PGD

4:PGC

3

4

5:GND

5

PIC

DVSS

TP71

RD1

TP73

RD3

TP75

RD5

TP77

RD7

TP70

RD0

TP72

RD2

TP74

RD4

TP76

RD6

B

U701

VUSB

D-

D+

GND

1

2

3

4

USB(B type)

DVSS

R700

R701

0

0

17

16

15

14

11

10

9

8

RB7/KBI3/PGD

RB6/KBI2/PGC

RB5/KBI1/PGM

RB4/AN11/KBI0/CSSPP

RB3/AN9/CPP2/VPO

RB2/AN8/INT2/VMO

RB1/AN10/INT1/SCK/SCL

RB0/AN12/INT0/FLT0/SDI/SDA

MCLR_N/Vpp/RE3

18

USB-RST

C706

0.1u

NC/ICCK/ICPGC

NC/ICDT/ICPGD

NC/ICRST_N/ICVpp

NC/ICPORTS

12

13

33

34

38

39

40

41

2

3

4

5

RD0/SPP0

RD1/SPP1

RD2/SPP2

RD3/SPP3

RD4/SPP4

RD5/SPP5/P1B

RD6/SPP6/P1C

RD7/SPP7/P1D

PIC18F4550

TQFP 44-PIN

U700

OSC1/CLKI

OSC2/CLKO/RA6

RE0/AN5/CK1SPP

RE1/AN6/CK2SPP

RE2/AN7/OESPP

VUSB

32

35

36

42

43

44

1

RC0/T1OSO/T13CKI

RC1/T1OSI/CCP2/UOE_N

RC2/CCP1/P1A

RC4/D-/VM

RC5/D+/VP

RC6/TX/CK

RC7/RX/DT/SDO

RA0/AN0

RA1/AN1

RA2/AN2/Vref-/CVref

RA3/AN3/Vref+

RA4/T0CKI/C1OUT/RCV

RA5/AN4/SS_N/HLVDIN/C2OUT

30

31

XTI

XTO

25

26

27

37

19

20

21

22

23

24

C709

0.47u

R704

R705

R706

R707

R703

100k

C707

22p

X2

20MHz

22p

C708

51

51

51

51

DVSS

CSN-PIC

SCL/CCLK-PIC

SDA/CDTI-PIC

CDTO-PIC

PIC18F4550

USB

PORT701

JUMPER_4x3

USB

USB

USB

CTRL-SEL

10pin

10pin

CSN

SCL/CCLK

10pin

SDA/CDTI

10pin

CDTO

10

8

6

4

2

PORT700

9

7

5

3

1

CSN

CCLK/SCL

CDTI/SDA

CDTO

DVSS

10pin-CTRL

CSN-10PIN

SCL/CCLK-10PIN

SDA/CDTI-10PIN

CDTO-10PIN

- 44-

3 5 4

D

R714

100k

C710 0.1u

PCA9306DP1 U702

8

EN GND

VREF1

1

2

C711

0.1u

7

VREF2

R712

470

R713

470

SCL/CCLK

6

SCL2

SDA/CDTI 5

SDA2

SCL1

3

SDA1

4

DVSS

SCL/CCLK

SDA/CDTI

DVDD

R715 R716

10k 10k

SCL/CCLK

SDA/CDTI

C

R719

100k

R717

470

R718

470

CSN

CDTO

C712 0.1u

PCA9306DP1 U703

8

EN

7

VREF2

GND

VREF1

1

2

C713

0.1u

DVSS

6

SCL2 SCL1

3 CSN

5

SDA2 SDA1

4 CDTO

DVDD

R720 R721

10k 10k

CSN

CDTO

B

2 1

A

B

A

D

5

J804

DVSS

DVSS

C800

47u

+

DVSS

J800

+5V

C

4 3 2

C801

47u

+

C802

0.1u

DVSS DVSS

+5V-->+3.3V

T1 LT1963AEST-3.3

1

IN OUT

3

DVSS

C803

0.1u

DVSS DVSS

+

C804

47u

C806

47u

+

C807

0.1u

DVSS

DVSS

+5V-->+1.8V

T2 LT1963AEST-1.8

1

IN OUT

3

DVSS

C808

0.1u

DVSS DVSS

+

C809

47u

3.3V

JP801

DVDD-VSEL

1.8V

J801

DVDD

C805

+

47u

DVSS

J802

DV18

C810

+

47u

DVSS

REG

JP800

DVDD-SEL

R800

JACK

0

TP800

DVDD

DVDD

REG

JP802

DV18-SEL

R801

JACK

0

TP801

DV18

DV18

C811

47u

+

C812

0.1u

DVSS DVSS

+5V-->+3.3V

T3 LT1963AEST-3.3

1

IN OUT

3

DVSS

C813

0.1u

DVSS DVSS

+

C814

47u

J803

D3.3V

C815

+

47u

DVSS

REG

JP803

D33V-SEL

R802

D3.3V

0

TP802

D33V

D33V

- 45-

3 4 2 1

1

D

C

B

A

5

- 46-

- 47-

- 48-

- 49-

- 50-

- 51-

- 52-

- 53-

- 54-

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Key Features

  • 8k~768kHz asynchronous sample rate conversion
  • Jitter-free audio transmission and playback
  • High-resolution audio format support
  • Optical and serial digital audio interfaces
  • Comprehensive register control for customization
  • Ideal for professional audio, mastering, and home theater systems
  • Compact size and low power consumption

Related manuals

Frequently Answers and Questions

What types of digital audio interfaces does the AK4137EQ support?
The AK4137EQ supports both optical and serial digital audio interfaces.
Can the AK4137EQ handle high-resolution audio formats?
Yes, the AK4137EQ supports high-resolution audio formats.
Is the AK4137EQ suitable for professional audio applications?
Yes, the AK4137EQ is ideal for professional audio applications such as recording, mastering, and playback.
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