Renesas Synergy DK-S7G2 User Manual
Renesas Synergy DK-S7G2 is a development kit that provides a comprehensive platform for evaluating and developing embedded applications based on the Renesas Synergy Platform. The kit includes a powerful S7G2 microcontroller, an integrated debugger, and a variety of connectivity options, making it ideal for a wide range of applications, including industrial automation, home appliances, and automotive systems.
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Development Kit S7G2 (DK-S7G2)
User’s Manual
Renesas Synergy™ Platform
Synergy Tools & Kits
Kits: DK-S7G2 v4.1
All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics
Corp. without notice. Please review the latest information published by Renesas Electronics Corp. through various means, including the Renesas Electronics Corp. website (http://www.renesas.com). www.renesas.com
Rev.1.00 Apr 2019
Notice
1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation or any other use of the circuits, software, and information in the design of your product or system. Renesas Electronics disclaims any and all liability for any losses and damages incurred by you or third parties arising from the use of these circuits, software, or information.
2. Renesas Electronics hereby expressly disclaims any warranties against and liability for infringement or any other claims involving patents, copyrights, or other intellectual property rights of third parties, by or arising from the use of Renesas Electronics products or technical information described in this document, including but not limited to, the product data, drawings, charts, programs, algorithms, and application examples.
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Renesas Electronics disclaims any and all liability for any malfunctions, failure or accident arising out of the use of Renesas Electronics products outside of such specified ranges.
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(Note1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its directly or indirectly controlled subsidiaries.
(Note2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
(Rev.4.0-1 November 2017)
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© 2019 Renesas Electronics Corporation. All rights reserved.
Renesas Synergy™ Development Kit (DK-S7G2) Disclaimer
By using this DK-S7G2, the user accepts the following terms, which are in addition to, and control in the event of disagreement, with Renesas’ General
Terms and Conditions available at https://www.renesas.com/en-us/legal/disclaimer.html.
The DK-S7G2 is not guaranteed to be error free, and the entire risk as to the results and performance of the DK-S7G2 is assumed by the User. The DK-
S7G2 is provided by Renesas on an “as is” basis without warranty of any kind whether express or implied, including but not limited to the implied warranties of satisfactory quality, fitness for a particular purpose, title, and non-infringement of intellectual property rights with regard to the DK-S7G2. Renesas expressly disclaims all such warranties.
Renesas does not consider the DK-S7G2 a finished product and therefore the DK-S7G2 may not yet comply with some requirements applicable to finished products, including, but not limited to recycling (WEEE), CE, UL, restricted substances (ROHS), FCC, FEE, and electromagnetic compatibility regulations.
Renesas or its affiliates shall in no event be liable for any loss of profit, loss of data, loss of contract, loss of business, damage to reputation or goodwill, any economic loss, any reprogramming or recall costs (whether the foregoing losses are direct or indirect) nor shall Renesas or its affiliates be liable for any other direct or indirect special, incidental or consequential damages arising out of or in relation to the use of this DK-S7G2, even if Renesas or its affiliates have been advised of the possibility of such damages.
Renesas has used reasonable care in preparing the information included in this document, but Renesas does not warrant that such information is error free nor does Renesas guarantee an exact match for every application or parameter to part numbers designated by other vendors listed herein. The information provided in this document is intended solely to enable the use of Renesas products. No express or implied license to any intellectual property right is granted by this document or in connection with the sale of Renesas products. Renesas reserves the right to make changes to specifications and product descriptions at any time without notice. Renesas assumes no liability for any damages incurred by you resulting from errors in or omissions from the information included herein. Renesas cannot verify, and assumes no liability for, the accuracy of information available on another company’s website.
Precautions
This Renesas Synergy™ Development Kit is only intended for use in a laboratory environment under ambient temperature and humidity conditions. A safe separation distance should be used between this and any sensitive equipment. Its use outside the laboratory, classroom, study area, or similar such area invalidates conformity with the protection requirements of the Electromagnetic Compatibility Directive and could lead to prosecution.
The product generates, uses, and can radiate radio frequency energy and may cause harmful interference to radio communications. There is no guarantee that interference will not occur in a particular installation. If this equipment causes harmful interference to radio or television reception, which can be determined by turning the equipment off or on, you are encouraged to try to correct the interference by one or more of the following measures:
• Ensure attached cables do not lie across the equipment.
• Reorient the receiving antenna.
• Increase the distance between the equipment and the receiver.
• Connect the equipment into an outlet on a circuit different from that which the receiver is connected.
• Power down the equipment when not in use.
• Consult the dealer or an experienced radio/TV technician for help.
Note: It is recommended that wherever possible shielded interface cables are used.
The product is potentially susceptible to certain EMC phenomena. To mitigate against them it is recommended that the following measures be undertaken:
• The user is advised that mobile phones should not be used within 10 m of the product when in use.
• The user is advised to take ESD precautions when handling the equipment.
The Renesas Synergy™ Development Kit does not represent an ideal reference design for an end product and does not fulfill the regulatory standards for an end product.
User’s Manual
Renesas Synergy™ Platform
Development Kit S7G2 (DK-S7G2) v4.1
Contents
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
1. Overview
The Development Kit S7G2 (DK-S7G2) provides easy-to-access interfaces to the peripherals of the S7G2 microcontroller for application development. The kit includes breakout pin headers for direct access to the
S7G2 microcontroller I/O pins. DIP configuration switches allow easy transition between different board configurations and ensure that the signal lines are always properly connected.
•
Renesas Synergy™ S7G2 Microcontroller Group
R7FS7G27H2A01CBD
224-pin Ball Grid Array package
240 MHz Arm ® Cortex ® M4 core with FPU
640 KB on-chip SRAM
4 MB on-chip code flash memory
64 KB on-chip data flash memory
•
Connectivity
One HS Host USB and one FS Device USB connector for the Main MCU
SEGGER J-Link ® On-board (OB) interface for debugging and programming of the S7G2 MCU. A 20pin JTAG/SWD interface is also provided for connecting optional external debuggers and programmers.
Four PMOD connectors, allowing use of appropriate PMOD compliant peripheral plug-in modules for rapid prototyping
Pin headers for access to power and signals for the Main MCU
Terminal block connector for access to RS233/485 and CAN interfaces
3.5 mm analog audio output jack
Right-angle socket for connecting an optional external LCD display
•
Multiple clock sources
Main MCU oscillator crystals, providing precision 24.000 MHz and 32,768 Hz reference clocks
Additional low-precision clocks are available internal to the Main MCU
•
MCU reset push button switch
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
•
Operating voltage
External 5 V input through a 5 mm barrel jack connector supplies the on-board power regulator to power the Development Kit logic and interfaces.
Button cell battery holder for on-board battery backup
Current sense resistors and power measurement test points for precision current consumption measurement.
•
A green LED indicating availability of regulated power
•
Two green and two red User LEDs, controlled by the Main MCU firmware
•
Three User push-button switches and a User Potentiometer, all of which are monitored by the Main MCU firmware
•
MCU boot configuration jumper
•
256 Mb SDRAM
•
256 Mb QSPI Serial Flash
•
4-GB e.MMC
•
SD Card socket
•
On-board 4.3” 480x272 RGB Graphic TFT LCD module with Resistive Touch overlay
•
Parallel Data Capture (PDC) Camera Module
•
Configuration DIP switches with LED indicators for each functional block
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Figure 1. DK-S7G2 Top Side
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
Figure 2. DK-S7G2 Bottom Side
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
2. Kit Contents
The following components are included in the Development Kit S7G2 (DK-S7G2):
•
1x DK-S7G2 board
•
Detachable CMOS VGA camera module
•
1x USB Type-A to Micro-B cable
•
1x Ethernet patch cable
•
UART and CAN adapter block
•
Multi-region 5 V power supply
3. Getting Started with Embedded Application Development on DK-S7G2
To develop and execute embedded applications on the DK-S7G2 using the Synergy Platform, Synergy
Software Package and development tools are required to be installed on your computer.
Step 1: Create My Renesas Account (if you do not have one already)
You need a My Renesas account to download software, development tools, and application projects. Log in to or Sign up for a My Renesas account at www.update.renesas.com/SSO/login.
Step 2: Download and Install Synergy Software Package and Development Tools
The Synergy Software Package, J-Link USB drivers, and one of the two supported tool chains are bundled and available as single downloadable file as follows:
A. IAR Platform Installer installs Synergy Software Package and IAR Embedded Workbench ® for
Renesas Synergy™ IDE with IAR complier and J-Link USB drivers.
Download from www.renesas.com/synergy/ewsynergy .
B. e 2 studio Platform Installer installs Synergy Software Package and e 2 studio for Synergy IDE with
IAR complier and J-Link USB drivers.
Download from www.renesas.com/synergy/e2studio .
Note: The DK-S7G2 uses J-Link ® On-board (OB) debug interface. While J-Link drivers are necessary to establish debug connection between the host PC and the DK-S7G2, they are not required to run the
Out-of-Box (OoB) Demonstration Application that the DK-S7G2 comes pre-programmed with. Refer to the DK-S7G2 Quick Start Guide for more details.
Step 3: Explore Existing Application Projects for the DK-S7G2
Renesas provides several application projects to demonstrate different capabilities of the S7G2 MCU Group.
These application projects can also serve as a good starting point for you to develop your custom applications. Application projects available for the DK-S7G2 are listed at www.renesas.com/synergy/dk-s7g2 .
Notes: 1. Every application project includes the project files, an application note, and instructions to import the application project.
2. On downloading the application project from the website to your computer, the application projects have to be built using one of the two supported tool chains before they can be downloaded on to the DK-S7G2 board.
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
4. DK-S7G2 Hardware Details
4.1 Jumpers and DIP Switch Settings
4.1.1 Default Board Configuration
Settings. The following table describes the default settings for each jumper on the DK-S7G2.
Table 1. Default Jumper Settings
Location Circuit Group Default
Open/Closed
J2
J3
Power
Power
Jumper on pins 1-2
Open
J4
J9
J11
J15
Power
Audio
User
USB
Open
All open
Jumper on pins 1-2
Jumper on pins 1-2 and on pins 3-4
Jumper on pins 1-2 J20
J22
J26
J25
J27
PMOD
PMOD
PMOD
PMOD
LCD
Jumper on pins 1-2
Jumper on pins 1-2
Jumper on pins 1-2
Jumper on pins 1-2 and on pins 3-4
J31
J35
Configuration
Kit Data
Jumpers on pins 1-2, pins 3-4, pins 5-6, and pins 7-8
Not Populated
Function
MCU VBAT source
MCU main 3.3 V current measurement
MCU analog 3.3 V current measurement
Connects audio amplifier to MCU
Connects user potentiometer to MCU
Connects USBH_OC (P707) and USBH_VBUSEN
(PB00) to USB power regulator
Configures PMOD A for 3.3 V operation
Configures PMOD B for 3.3 V operation
Configures PMOD C for 3.3 V operation
Configures PMOD D for 3.3 V operation
Connects LCD I2C to system I2C
Connects configuration I/O expander I2C to system
I2C and connects pullup resistors to the system I2C signals.
For factory use only
The following table describes the default settings for each DIP switch on the DK-S7G2.
Note: An ON setting means that the switch is closed, and an OFF setting means that the switch is open.
Table 2. Default Jumper Settings
S7-4
S8-1
S8-2
S8-3
S8-4
S9-1
S9-2
S9-3
S9-4
Location
S5-1
S5-2
S5-3
S5-4
S6-1
S6-2
Circuit Group
RS Config
RS Config
RS Config
RS Config
Default
Open/Closed
ON
OFF
OFF
OFF
Peripheral Config OFF
Peripheral Config OFF
S6-3
S6-4
S7-1
S7-2
S7-3
Peripheral Config
Peripheral Config
OFF
OFF
Peripheral Config OFF
Peripheral Config ON
Peripheral Config OFF
Peripheral Config
Peripheral Config
Peripheral Config
OFF
Peripheral Config OFF
Peripheral Config OFF
Peripheral Config OFF
Peripheral Config ON
OFF
OFF
Peripheral Config OFF
Peripheral Config OFF
Function
Sets the transceiver to RS-232 mode
Sets the RS Slew Rate (N/A for RS-232 mode)
Sets the RS SPB (N/A for RS-232 mode)
Enables the RX output
Sets Boot mode (MD) to normal boot
Disables Ethernet 0
Disables Ethernet 1
Disables the e.MMC
Disables PMOD A
Enables the JTAG interface
Disables the Serial Port (RS232/485) interface
Disables the CAN interface
Disables PMOD B
Disables the Camera Module
Disables the SD Card
Enables the on-board LCD
Disables the QSPI Flash
Disables the SDRAM
Disables the User Pushbuttons
Disables the External LCD interface
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Renesas Synergy™ Platform
5. Hardware Layout
5.1 System Block Diagram
Development Kit S7G2 (DK-S7G2) v4.1
Power Jack
USB
Device
USB Host
Ethernet x 2
J-Link OB +
Debug +
ETM 20 Pin
Voltage/
Current
Probes
Coin Cell
Battery
Camera
Module
Header
Audio Jack
On-board and
External
LCD
User-Buttons and
User
Potentiometer
VCC
Power
Measurement
Jumper
USB FS USB HS ETHERC
Debug
Interface
SPI/
UART/
I2C
VBAT
PDC
Interface
Renesas Synergy
TM
S7G2 MCU
Development Kit
Analog
Audio
Amplifier
Graphics
LCD
Analog/
IRQ/
IO
Reset
Switch
GPIO
Kit Data
EEPROM
I2C
Serial I/O
QSPI
SDRAM
SDIO
Digital Bus
Switches
PMOD x 4
RS232/
422/485
and CAN
128 Mb
QSPI Flash
256 Mb
SDRAM
SD Card
Socket e.MMC
User
Programmable
LEDs
Status Power
Figure 3. DK-S7G2 Block Diagram
Feature Select
DIP Switches
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.2 Power Requirements
DK-S7G2 is designed for +5 V operation. A 5 V, 2.5 A wall-mounted power supply provides power through a barrel jack connector (J1) on DK-S7G2. The input power jack J1 supplies the main 5 V power to the system.
This input supplies power to a +3.3 V regulator (U2), which supplies power to most of the digital devices on the board. DK-S7G2 cannot be powered using any of the USB connectors on the board.
5.2.1 Power-up Behavior
When powered, the green LED in the POWER section (LED1) lights up. See the DK-S7G2 Quick Start Guide
(QSG) for details on the default power-on behavior of the DK-S7G2.
Figure 4. Input Power section
5.2.2 Battery Supply Configuration
An external battery may be installed in the CR1220 coin cell battery holder. This battery is connected only to
VBAT on the S7G2 MCU and is used for backup power. The VBAT voltage powers the Realtime Clock
(RTC) power domain of the S7G2 microcontroller, and keeps this domain powered even when the main power is removed.
J2 configures the source for VBAT. Place a jumper on pins 1-2 to connect the battery to VBAT. Place a jumper on pins 2-3 to connect the main +3.3 V power to VBAT.
Figure 5. Battery Holder
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.2.3 Measuring Current Consumption
DK-S7G2 provides precision 50 m
Ω
resistors (Bourns, part number CRM0805-FW-R050ELF) for current measurement of the main 3.3 V MCU power, and the 3.3 V analog MCU power. Measure the voltage drop across these resistors and use Ohm’s Law to calculate the current. For convenience, J3 is provided to measure the main 3.3 V MCU power, and J4 is provided to measure the 3.3 V analog MCU power. See
Figure 4 for the location of J3 and J4.
Figure 6. MCU Current Measurement Circuit
5.3 Main Components
•
Main MCU
Renesas Synergy™ S7G2 MCU device, part number R7FS7G27C3A01CFB#AA0 (U1)
•
Main MCU
•
J-Link MCU
Renesas Synergy™ S124 MCU device, part number R7FS124773A01CFM#AA0 (U42)
•
J-Link MCU
•
USB Connectors
FCI, part number 10118192-0001LF (J13, J34)
•
Micro USB 2.0 Female connector
•
Primary communication with Main MCU and J-Link MCU
FCI, part number 87583-3010RPALF (J15)
•
USB Type-A Female connector for Host USB
•
Ethernet
Abracon, part number ARJC02-111009D (J16, J17)
•
Ethernet 10/100 Base-TX RJ45 connector with integrated magnetics
Microchip/Micrel, part number KSZ8091RNBIA (U23, U27)
•
Ethernet 10/100 Base-TX PHY controller
•
RS232/485 and CAN
Amphenol FCI, part number 20020110-C081A01LF (J18)
•
3.5 mm pitch terminal block for RS232/485 and CAN signals
Renesas Intersil, part number ISL41387IRZ (U29)
•
RS232/485 transceiver
Infineon, part number IFX1050GVIO (U31)
•
CAN transceiver, 1M Baud
•
Push-Buttons
C&K, part number KSC222J LFS (S1, S2, S3, S4)
•
Momentary push-button switch
•
Used for system reset and user-defined functions
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
•
DC-DC Buck-Boost Switching Regulator
Renesas Intersil, part number ISL91107IINZ (U2)
•
Generates system 3.3 V from main 5 V input
•
LDO Regulator
Texas Instruments, part number TLV70033DSE (U4)
•
Low-dropout linear regulator
•
Generates analog 3.3 V from main 5 V input
•
PMOD Connectors
Sullins, part number PPPC062LJBN-RC (J19, J21, J23, J24)
•
12-pin right angle connector for PMOD
•
Pin Headers
Amphenol ICC / FCI, part number 57202-G52-25LF (J4, J6, J7, J8)
•
50 position pin header, 2 mm pitch
•
Provides signal breakout and access for Main MCU signals
•
LCD
LXD, part number M1790C (LCD1)
•
480 x 272 RGB Graphic TFT LCD with Resistive Touch
FCI, part number 62684-401100ALF (J28)
•
40 position FPC connector
Semtech, part number SX8676IWLTRT (U36)
•
Touchscreen controller for Resistive Touch
•
SDRAM
Micron, part number MT48LC16M16A2B4-7E IT:G (U8)
•
256 Mb 16M x 16, 3.3 V
•
e.MMC
Micron, part number MTFC4GACAJCN-4M IT (U16)
•
4 GB, 3.3 V
•
QSPI Flash
Macronix, part number MX25L12835FM2I-10G (U15)
•
256 Mb QSPI serial flash
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4 Connectivity and Settings
5.4.1 Device USB
The DEVICE USB Micro-B connection jack (J13) connects the Main MCU to an external USB Host, FS capable, allowing communications for testing and use of the Main MCU firmware. Power for the DK-S7G2 cannot be received from this connector. The DEVICE USB interface can detect the presence of power from the USB Host PC. USB Host power received at the DEVICE USB interface is not connected to the DK-S7G2
5 V power bus.
Table 3. Device USB Connector (J13)
2
3
4
5
USB Device Connector
Pin
1
Description
+5VDC, connected to a sense voltage 2/3 divider to allow
Main MCU sensing of Host presence
Data-
Data+
USB ID, jack internal switch, cable inserted
Ground
DK-S7G2
Signal/Bus
+5VUSB
P407/USB_VBUS = 2/3(5VUSB)
USB_DM
USB_DP
N.C.
GND
Figure 7. USB Connectors
5.4.2 Host USB
The Host USB Type-A connection jack (J14) connects the Main MCU to external USB devices, HS capable, allowing communications for testing and use of the Main MCU firmware. The USB Host connection includes a TBS2501 USB Power Switch (U22) to provide regulated 5 V USB power to connected devices. The Power
Switch provides a nominal 500 mA, and maximum of 720 mA to connected USB devices.
The USB Power Switch is controlled by the S7G2 MCU using P707 (USBHS Overcurrent) and PB00
(USBHS VBUS Enable). To use these ports for other DK-S7G2 functions, these signals may be disconnected from the USB Power Switch by removing the jumpers from J15.
Table 4. Device USB Connector (J14)
USB Device Connector
Pin
1
2
3
4
Description
+5VDC
Data-
Data+
Ground
DK-S7G2
Signal/Bus
+5VUSB Host Power, from U22
USBHS_DM
USBHS_DP
GND
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.3 Debug USB
The J-Link OB USB Micro-B connection jack (J34) connects the S124 J-Link MCU to an external USB Host,
FS capable, allowing re-programming and debugging of the Main MCU firmware. Power for the DK-S7G2 can NOT be received from this connector.
Figure 8. S124 J-Link OB and JTAG
The J-Link OB interface is multiplexed with the JTAG interface and can collectively be referred to as the
Programming Interface.
Table 5. Debug USB Connector (J34)
Debug USB Connector
Pin Description
1
2
+5VDC
Data-
3
4
DK-S7G2
Signal/Bus
+5V_JUSB
U2 USB_DM (U2-18)
Data+ U2 USB_DP (U2-19)
USB ID, jack internal switch, cable inserted N.C.
5 Ground GND
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.4 JTAG/SWD/TRACE
A 20-pin Cortex ®
Debug Connector is provided at J33. See Figure 8.
A digital bus switch (U41) is provided to isolate the JTAG signals from the rest of the system. To enable the
JTAG header (J33), set DIP Switch S7-2 to ON. When the JTAG interface is enabled, LED13 is illuminated.
Table 6. JTAG/SWD/TRACE Connector (J33)
2
3
4
5
JTAG Connector DK-S7G2
Pin JTAG Pin Name SWD Pin Name ETM Pin Name Signal/Bus
1 VTref VTref VTref +3V3
TMS
GND
TCK
GND
SWDIO
GND
SWCLK
GND
N/A
GND
N/A
GND
P108/SWDIO (U1-51)
GND
P300/SWCLK (U1-50)
GND
6
7
8
9
TDO
Key
TDI
GNDDetect
10 nSRST
11 N/A
12 N/A
13 N/A
SWO
Key
NC/EXTb
GNDDetect nSRST
N/A
N/A
N/A
N/A
Key
N/A
GNDDetect nSRST
N/A
TCLK
N/A
P109 (U1-52)
N.C.
P110 (U1-53)
N.C. (short E31 to connect to GND)
RESET# (U1-38)
N.C.
PA12
N.C.
14 N/A
15 N/A
16 N/A
17 N/A
18 N/A
19 N/A
20 N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
TDATA0
GND
TDATA1
GND
TDATA2
GND
TDATA3
PA13
GND
PA14
GND
PA15
GND
P813
The Cortex ® Debug Connector is fully described in the Arm ® CoreSight ™ Architecture Specification.
5.4.5 LEDs
There are 21 LEDs provided on the DK-S7G2. In addition, each Ethernet connector has built-in link status and link speed LEDs.
The behavior of the LEDs on the DK-S7G2 is described in the following table.
Table 7. DK-S7G2 LED Functions
Designator Color Function
LED1 Green Main Power Indicator
LED2
LED3
LED4
LED5
Green
Red
User LED
User LED
Green User LED
Red User LED
LED6
LED7
LED8
LED9
LED10
LED11
LED12
LED13
LED14
Green
Green
Red
Green
Green
Green
Green
Green
LCD Enabled
External LCD Enabled
J-Link connect status
Camera Module Enabled e.MMC Enabled
Ethernet 0 Enabled
Ethernet 1 Enabled
JTAG Enabled
MCU Control Port MCU Pin
N/A
P807
P808
P809
P810
N/A
N/A
S124 P103
N/A
N/A
N/A
N/A
N/A
Green User Buttons and LEDs Enabled N/A
N/A
U1-P12
U1-K7
U1-K8
U1-P3
N/A
N/A
S124 pin 45
N/A
N/A
N/A
N/A
N/A
N/A
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Renesas Synergy™ Platform
LED15
LED16
LED17
LED18
LED19
LED20
LED21
Green PMOD A Enabled
Green PMOD B Enabled
Green QSPI Enabled
Green CAN Enabled
Green RS-232/485 Enabled
Green SD Card Enabled
Green SDRAM Enabled
Development Kit S7G2 (DK-S7G2) v4.1
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Figure 9. Reset Switch, User Switches, and User LEDs
5.4.6 Switches
Four miniature, momentary, mechanical push-button type SMT switches are mounted on DK-S7G2.
Pressing the Reset switch (S1) generates a reset signal to restart the Main MCU.
Table 8. DK-S7G2 Switches
Designator Function
S1 MCU Reset Switch
MCU Control Port
RESET#
S2 User Switch P006 (AN102)
S3
S4
User Switch
User Switch
P010 (AN103)
P011 (AN104)
MCU Pin
U1-F8
U1-P10
U1-M10
U1-N10
A digital bus switch (U6) is provided to isolate the User Switch signals from the rest of the system. To enable the User Switches, set DIP Switch S9-3 to ON. When the User Switches are enabled, LED14 is illuminated.
5.4.7 PMOD A
A 12-pin PMOD Type-2A connector is provided at PMOD A. The Main MCU acts as the SPI master, and the connected module acts as an SPI slave device. This interface may additionally be re-configured in firmware as several other PMOD types.
This PMOD interface may supply either 5 V or 3.3 V to the PMOD device. This can be selected by placing a jumper on the appropriate pins of J20. For 3.3 V operation, place a jumper on pins 1-2, or place a jumper on pins 2-3 for 5 V operation.
A digital bus switch (U32) is provided to isolate the PMOD A signals from the rest of the system. To enable
PMOD A, set DIP Switch S7-1 to ON. When the PMOD A is enabled, LED15 is illuminated.
Table 9. PMOD A Connector (J19)
3
4
5
PMOD A Connector
Pin Description
1
2
SS/CTS_RTS
MOSI/TXD
MISO/RXD
SCK
GND
DK-S7G2
Signal/Bus
PB02, U1-J11
PB04, U1-H10
PB05, U1-J12
PB03, U1-K12
GND
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Page 14 of 65
6
7
8
9
10
11
12
Renesas Synergy™ Platform
VCC
INT (slave to master)
Select using J20
P004 (IRQ9), U1-M11
RESET (master to slave) P911, U1-A7
Not Specified (GPIO)
Not Specified (GPIO)
GND
VCC
P912, U1-B7
P913, U1-H8
GND
Select using J20
Development Kit S7G2 (DK-S7G2) v4.1
Figure 10. PMOD A
5.4.8 PMOD B
A 12-pin PMOD Type-2A connector is provided at PMOD B. The Main MCU acts as the SPI master, and the connected module acts as an SPI slave device. This interface may additionally be re-configured in firmware as several other PMOD types.
This PMOD interface may supply either 5 V or 3.3 V to the PMOD device. This can be selected by placing a jumper on the appropriate pins of J22. For 3.3 V operation, place a jumper on pins 1-2, or place a jumper on pins 2-3 for 5 V operation.
A digital bus switch (U33) is provided to isolate the PMOD B signals from the rest of the system. To enable
PMOD B, set DIP switch S8-1 to ON. When the PMOD B is enabled, LED16 is illuminated.
Table 10: PMOD B Connector (J21)
7
8
9
10
11
12
3
4
5
6
PMOD B Connector
Pin Description
1
2
SS/CTS_RTS
MOSI/TXD
MISO/RXD
SCK
GND
VCC
INT (slave to master)
RESET (master to slave)
Not Specified (GPIO)
Not Specified (GPIO)
GND
VCC
DK-S7G2
Signal/Bus
P507, U1-N6
P509, U1-P6
P510, U1-N7
P508, U1-M7
GND
Select using J22
P005 (IRQ10), U1-R11
PA05, U1-J3
PA06, U1-J2
PA07, U1-J1
GND
Select using J22
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
Figure 11. PMOD B
5.4.9 PMOD C
A 12-pin PMOD Type-2A connector is provided at PMOD C. The Main MCU acts as the SPI master, and the connected module acts as an SPI slave device. This interface may additionally be re-configured in firmware as several other PMOD types.
This PMOD interface may supply either 5 V or 3.3 V to the PMOD device. This can be selected by placing a jumper on the appropriate pins of J26. For 3.3 V operation, place a jumper on pins 1-2, or place a jumper on pins 2-3 for 5 V operation.
The ports used for PMOD C are also used for the SDRAM interface. A set of digital bus switches is provided to isolate the SDRAM signals from the rest of the system. To enable PMOD C, the SDRAM must be disabled. To disable the SDRAM, and enable other functions including PMOD C, set DIP switch S9-2 to
OFF.
Table 11. PMOD C Connector (J24)
7
8
9
10
11
12
3
4
5
6
PMOD C Connector
Pin Description
1
2
SS/CTS_RTS
MOSI/TXD
MISO/RXD
SCK
GND
VCC
INT (slave to master)
DK-S7G2
Signal/Bus
P103, U1-N2
P101, U1-P1
P100, U1-R1
P102, U1-N1
GND
Select using J26
RESET (master to slave) P600, U1-L3
Not Specified (GPIO)
Not Specified (GPIO)
GND
VCC
P008 (IRQ12), U1-N11
P601, U1-L2
P602, U1-L1
GND
Select using J26
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Figure 12. PMOD C
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.10 PMOD D
A 12-pin PMOD Type-2A connector is provided at PMOD D. The Main MCU acts as the SPI master, and the connected module acts as an SPI slave device. This interface may additionally be re-configured in firmware as several other PMOD types.
This PMOD interface may supply either 5 V or 3.3 V to the PMOD device. This can be selected by placing a jumper on the appropriate pins of J25. For 3.3 V operation, place a jumper on pins 1-2, or place a jumper on pins 2-3 for 5 V operation.
The ports used for PMOD D are also used for the SDRAM interface. A set of digital bus switches is provided to isolate the SDRAM signals from the rest of the system. To enable PMOD D, the SDRAM must be disabled. To disable the SDRAM, and enable other functions including PMOD D, set DIP switch S9-2 to
OFF.
Table 12. PMOD D Connector (J23)
8
9
10
11
12
4
5
6
7
PMOD D Connector
Pin Description
1
2
3
SS/CTS_RTS
MOSI/TXD
MISO/RXD
SCK
GND
VCC
INT (slave to master)
DK-S7G2
Signal/Bus
P307, U1-D6
P305, U1-D4
P304, U1-C4
P306, U1-D5
GND
Select using J25
P009 (IRQ13), U1-R10
RESET (master to slave) P603, U1-K3
Not Specified (GPIO)
Not Specified (GPIO)
GND
VCC
P604, U1-K2
P605, U1-K1
GND
Select using J25
Figure 13. PMOD D
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.11 Ethernet 0
The Ethernet 0 interface uses an RMII Ethernet Physical Layer Transceiver (PHY) (U23), connected to an
RJ45 standard Ethernet connector (J16) with integrated magnetics and status indicators. The Ethernet clock is sourced from a precision 25 MHz clock crystal connected directly to the Ethernet PHY.
A digital bus switch (U25) is provided to isolate the Ethernet 0 signals from the rest of the system. To enable
Ethernet 0, set DIP switch S6-2 to ON. When Ethernet 0 is enabled, LED11 is illuminated.
Table 13. Ethernet 0 Port Assignments
Ethernet 0 Signal
Description
IRQ
RESET#
MDC
MDIO
CRS_DV
TXD_EN
TXD0
TXD1
RXD1
RXD0
RX_ER
REF50CK
DK-S7G2 Port
P015
P903
P401
P402
P408
P415
P413
P414
P410
P411
P409
P412
Table 14. Ethernet 0 Components
Component
Ethernet PHY
RJ-45 Connector
Manufacturer
Microchip
Abracon
25 MHz Oscillator TXC
Manufacturer Part Number
KSZ8091RBN
ARJC02-111009D
8Y-25.000MEEQ-T
Figure 14. Ethernet Connectors
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.12 Ethernet 1
The Ethernet 1 interface uses an RMII Ethernet Physical Layer Transceiver (PHY) (U27), connected to an
RJ45 standard Ethernet connector (J17) with integrated magnetics and status indicators. The Ethernet clock is sourced from a precision 25 MHz clock crystal connected directly to the Ethernet PHY.
A digital bus switch (U28) is provided to isolate the Ethernet 1 signals from the rest of the system. To enable
Ethernet 1, set DIP switch S6-3 to ON. When Ethernet 1 is enabled, LED12 is illuminated.
Table 15. Ethernet 1 Port Assignments
Ethernet 1 Signal
Description
IRQ
RESET#
MDC
MDIO
CRS_DV
TXD_EN
TXD0
TXD1
RXD1
RXD0
RX_ER
REF50CK
DK-S7G2 Port
P002
P706
P403
P404
P705
P405
P700
P406
P703
P702
P704
P701
Table 16. Ethernet 1 Components
Component
Ethernet PHY
Manufacturer
Microchip
RJ-45 Connector Abracon
25 MHz Oscillator TXC
Manufacturer Part Number
KSZ8091RBN
ARJC02-111009D
8Y-25.000MEEQ-T
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.13 RS232/485 Transceiver
DK-S7G2 includes an Intersil ISL41387 dual-protocol RS-232/485 Transceiver (U29) with loop-back mode and shutdown functions. The shutdown mode disables the receive and transmit outputs of the transceiver, disables the charge pump in RS-232 mode, and places the transceiver in lowcurrent (35 μA) mode.
In RS-232 mode, the on-board charge pump generates RS-232 compliant +/- 5 V Tx output levels. The transceiver supports Rx input levels of +/- 25 V and Tx output levels of +/- 12 V with data rates of up to
650 kbps.
In RS-485 mode, the charge pump is disabled to save power and minimize noise. The RS-485 receiver supports full fail-safe operation that keeps the Rx output in a high state if the inputs are opened or shorted together. The RS-485 transmitter supports three data rates: up to 20 Mbps, 460 kbps, and 115 kbps. Data rates of 460 kbps and 115 kbps in RS-485 mode are slew-rate limited for problem-free communication.
The transceiver can be configured for either RS-232 or RS-485, and for various data rates using DIP switches 1 through 3 on S5, as shown in the following table.
DIP switch S5-4 (HALF) can be used to disable the receiver output and set up the UART in half-duplex mode by controlling the direction through a GPIO pin.
A digital bus switch (U30) is provided to isolate the RS232/485 signals from the rest of the system. To enable the RS232/485 interface, set DIP switch S7-3 to ON. When RS232/485 interface is enabled, LED19 is illuminated.
Table 17. RS232/485 Configuration using DIP Switch S5
Switch 1 (232) Switch 2 (SLEW) Switch 3 (SPB) Data rate Mode
OFF ON ON 115 kbps 485
OFF
OFF
ON
ON
OFF
X
OFF
X
X
460 kbps
20 Mbps
460 kbps
485
485
232
Table 18. RS232/485 Port Assignments
RS232/485 Signal Description DK-S7G2 Port
RX P708
DEN P914
TX
ON
P709
P915
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Figure 15. RS232/485 and CAN Interfaces
Page 20 of 65
Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.14 CAN Transceiver
The Infineon IFX1050GVIO CAN Transceiver (U31) supports transmission rates from 1 kbaud to 1 Mbaud.
An On Semiconductor NUP2105 Bus Protector protects the CAN transceiver.
The CAN transceiver is connected to CAN channel 0 on the S7G2 microcontroller and to connector J18 .
A digital bus switch (U30) is provided to isolate the CAN signals from the rest of the system. To enable the
CAN interface, set DIP switch S7-4 to ON. When the CAN interface is enabled, LED18 is illuminated.
Table 19. CAN Port Assignments
CAN Signal Description DK-S7G2 Port
TX P811
RX P812
5.4.15 QSPI Flash
Included on DK-S7G2 is a Macronix 128 Mb serial flash QSPI memory (MX25L12835FM). The QSPI serial flash device (U15) connects to the QSPI peripheral on the S7G2 MCU and defaults to standard SPI mode initially. The flash memory is enabled for XIP (Execute-in-place) mode directly after power-on.
A digital bus switch (U14) is provided to isolate the QSPI signals from the rest of the system. To enable the
QSPI Flash, set DIP switch S9-1 to ON. When the QSPI Flash is enabled, LED17 is illuminated.
Table 20. QSPI Flash Port Assignments
QSPI Signal Description DK-S7G2 Port
QSPI CS# P501
QSPI CLK
QSPI DQ0
QSPI DQ1
QSPI DQ2
QSPI DQ3
P500
P502
P503
P504
P505
Figure 16. Main MCU, SDRAM, QSPI Flash, and Breakout Pin Headers
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.16 SDRAM
Included on DK-S7G2 is a Micron 256 Mb automotive grade SDR SDRAM (U8) in a 4M x 16 x 4 bank configuration (MT48LC16M16A2).
Because the S7G2 MCU ports are highly multiplexed, some of the ports used for SDRAM signals are also used for PMOD C and PMOD D signals. A set of digital bus switches is provided to isolate the SDRAM signals from the rest of the system. To enable the SDRAM, set DIP switch S9-2 to ON. This is done to preserve SDRAM signal integrity. When the SDRAM is enabled, LED21 is illuminated. When the SDRAM is enabled, PMOD C, PMOD D, and the breakout pin headers are not available for the ports used by the
SDRAM. To use PMOD C, PMOD D, or access the ports used by the SDRAM at the breakout pin headers, the SDRAM must be disabled.
Table 21. SDRAM Port Assignments
A2
A1
A0
UDQM
LDQM
CLK
CKE
RAS#
CAS#
WE#
CS#
A10
A9
A8
A7
A6
A5
A4
A3
DQ3
DQ2
DQ1
DQ0
A12
BA1
BA0
A11
SDRAM Device
Signal Description
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
P302
P301
P111
P112
P113
P114
P115
P608
P310
P309
P308
P307
P306
P305
P304
P303
P601
P602
P609
P311
P312
P610
P611
P107
P106
P105
P104
P103
P102
P101
P100
P801
P800
P603
P604
P605
P614
P613
P612
DK-S7G2 SDRAM
Signal Description
SDRAM DQ15
SDRAM DQ14
SDRAM DQ13
SDRAM DQ12
SDRAM DQ11
SDRAM DQ10
SDRAM DQ9
SDRAM DQ8
SDRAM DQ7
SDRAM DQ6
SDRAM DQ5
SDRAM DQ4
SDRAM DQ3
SDRAM DQ2
SDRAM DQ1
SDRAM DQ0
SDRAM A15
SDRAM A14
SDRAM A13
SDRAM A12
SDRAM A11
SDRAM A10
SDRAM A9
SDRAM A8
SDRAM A7
SDRAM A6
SDRAM A5
SDRAM A4
SDRAM A3
SDRAM A2
SDRAM A1
SDRAM DQM1
SDRAM DQM0
SDRAM SDCLK
SDRAM CKE
SDRAM RAS#
SDRAM CAS#
SDRAM WE#
SDRAM SDCS#
DK-S7G2 Port
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Page 22 of 65
Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.17 SD Card Socket
Included on DK-S7G2 is an SD/MMC card socket (J12) with a four-bit data bus, plus card detect and write protect functions. The SD card socket is connected to channel 0 of the SD/MMC controller on the S7G2
MCU.
A digital bus switch (U19) is provided to isolate the SD card signals from the rest of the system. To enable the SD card socket, set DIP switch S8-3 to ON. When SD Card socket is enabled, LED20 is illuminated.
The SD Card socket conflicts with the e.MMC. To use the SD card, disable the e.MMC by setting S6-4 to
OFF.
Table 22. SD Card Port Assignments
SD Card Signal Description DK-S7G2 Port
CMD P412
CLK P413
CD
WP
D0
D1
D2
D3
P903
P414
P411
P410
P206
P205
Figure 17. SD Card Socket
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.18 e.MMC
Included on DK-S7G2 is a Micron 4 GB e.MMC memory device with an eight-bit data bus
(MTFC4GACAJCN-4M IT). The e.MMC memory is connected to channel 0 of the SD/MMC controller on the
S7G2 MCU.
Digital bus switches (U17 and U18) are provided to isolate the SD card signals from the rest of the system.
To enable the SD card socket, set DIP switch S6-4 to ON. When the e.MMC is enabled, LED10 is illuminated.
Since this is an embedded device, the CD and WP signals are not used by the e.MMC. When the e.MMC is enabled, these two signals are pulled high so the S7G2 MCU SD/MMC peripheral functions correctly.
The e.MMC conflicts with the SD Card socket. To use the e.MMC, disable the SD Card Socket by setting
S8-3 to OFF.
Table 23 e.MMC Port Assignments
DK-S7G2 Port
D3
D4
D5
D6
D7 e.MMC Signal
Description
CMD
CLK
CD
WP
D0
D1
D2
P412
P413
P903
P414
P411
P410
P206
P205
P204
P203
P202
P313
Figure 18. e.MMC
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Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.19 Camera Interface
The DK-S7G2 Camera Module includes an Omnivision OV7670 image sensor with adjustable lens. The image sensor combines a VGA camera with an image processor and can be controlled through an I 2 C bus interface connected to the Serial Communications Interface (SCI) peripheral on the S7G2 microcontroller.
The 8-bit data bus supports data formats YUV/YCbCr 4:2:2, RGB565/555, GRB 4:2:2, or Raw RGB Data.
The sensor has an image array operating at up to 30 frames per second in VGA. Image quality, image format, and output data transfer are user programmable. The sensor supports image processing such as exposure control, gamma correction, and adjustment of white balance, color saturation, and hue.
The Camera Module can be installed on J30 of the DK-S7G2.
Digital bus switches (U38 and U39) are provided to isolate the Camera signals from the rest of the system.
To enable the Camera Module interface, set DIP switch S8-2 to ON. When the Camera Module interface is enabled, LED9 is illuminated.
The camera module conflicts with Ethernet 1. Ethernet 1 must be disabled for the Camera interface to function correctly. To disable Ethernet 1, set DIP switch S6-3 to OFF.
Table 24. Camera Interface Port Assignments
Camera Interface
Signal Description
+3.3 V
GND
I2C SCL
I2C SDA
VSYNC
HSYNC
PIXCLK
PCKO
PXD7
PXD6
PXD5
PXD4
PXD3
PXD2
PXD1
PXD0
RESET#
PWDN#
J30 Pin Number DK-S7G2 Port
13
14
15
16
9
10
11
12
17
18
5
6
7
8
1
2
3
4
P403
P404
P405
P406
P700
P701
P702
P703
PB06
PB07
N/A
N/A
PA03
PA02
P512
P704
P705
P511
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Figure 19. Camera Module
Page 25 of 65
Renesas Synergy™ Platform Development Kit S7G2 (DK-S7G2) v4.1
5.4.20 Audio Jack
DK-S7G2 contains an On Semiconductor 135 mW stereo headphone power amplifier (NCP2809BDMR2G).
The output signals are generated by the Digital-to-Analog peripheral signals DA0 and DA1 on the S7G2 microcontroller.
The audio interface also uses P902 as a GPIO signal that drives the shutdown signal on the amplifier. Port
P015 (DA1) is shared with Ethernet 0. Ethernet 0 must be enabled to use Audio Jack. To enable Ethernet 0, set DIP switch S6-2 to ON.
Note: Ethernet 0 and Audio Jack cannot be used at the same time.
To isolate Audio Jack and prevent interference with Ethernet 0, remove the jumpers from J9. Silkscreen next to J9 shows the related jumper positions for each signal in the audio interface.
Table 25. Audio Jack Port Assignments
Audio Jack Signal
Description
Amp SHDN#
OUT-Left
OUT-Right
DK-S7G2 Port Jumper J9 Connections
P902
P014 (DA0)
P015 (DA1)
Pins 1-2
Pins 5-6
Pins 3-4
Figure 20. Audio Jack
5.4.21 LCD
DK-S7G2 includes an LXD M7190C 4.3” TFT RGB 480x272 LCD panel with Resistive Touch screen. The
LCD interface supports a 16-bit LCD data bus and includes a resistive touch controller and LED backlight driver.
The resistive touch interface uses a Semtech SX8676IWLTRT touch controller, driven by the MCU I 2 C bus.
The resistive touch controller may be isolated from the system I 2 C signals by removing the jumpers from header J27.
The LED backlight controller is an On Semiconductor CAT4237TD LED driver.
Some LCD modules produce excessive Electromagnetic Interference (EMI), which can cause undesirable performance. To compensate for this potential EMI radiation, DK-S7G2 provides footprints for optional Pi filters on each of the LCD data and control lines. By default, these Pi filters are not installed, but zero-ohm bridge resistors are installed. DK-S7G2 is designed to use Murata NFL21SP506X1C3D filters components, in a 4-pin 0805 surface mount package. Be sure to remove the respective bridge resistor when installing a Pi filter for the desired signal.
A digital bus switch (U34) is provided to isolate the LCD signals from the rest of the system. To enable the on-board LCD, set DIP switch S8-4 to ON. When the on-board LCD is enabled, LED6 is illuminated.
Table 26. LCD Control Signal Port Assignments
LCD Control Signal Description DK-S7G2 Port
LCD SCL (I2C) PA03
LCD SDA (I2C) PA02
TOUCH RESET#
TOUCH IRQ
LCD Backlight Enable
P711
P001
P712
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Table 27. LCD Port Assignments
LCD Signal
Description
DATA10
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA2
DATA3
DATA4
DATA0
DATA1
DATA2
DATA3
DATA4
GND
LEDK
LEDA
GND
+3.3 V
DATA13
DATA14
DATA15
DATA11
DATA12
DATA13
DATA14
DATA15
DATA9
CLK
ON
HSYNC
VSYNC
DE
N.C.
34
35
GND 36
TOUCH XR 37
30
31
32
33
TOUCH YB 38
TOUCH XL 39
TOUCH YT 40
26
27
28
29
22
23
24
25
18
19
20
21
14
15
16
17
10
11
12
13
6
7
8
9
2
3
4
5
LCD ZIF
Connector
(J28) Pin
1
CLK
DISP
HS
VS
DEN
N.C.
GND
XR
YB
XL
YT
B1
B2
B3
B4
B5
B6
B7
GND
G1
G2
G3
G4
G5
G6
G7
B0
R1
R2
R3
R4
R5
R6
R7
G0
LCD ZIF
Connector
Pin Name
LEDK
LEDA
GND
VCC
R0
DK-S7G2
Port
P606
P607
P804
P803
P802
P606
P607
-
P615
PA00
PA01
PA10
PA09
PA08
P615
P802
-
-
-
-
P907
P908
P901
P905
P906
P907
P908
P901
PA08
-
-
-
P900
P710
P314
P313
-
-
P315
-
Development Kit S7G2 (DK-S7G2) v4.1
Pi Filter Bridge
Resistor
R49
R51
R43
R45
R47
R49
R51
-
R41
R46
R48
R50
R36
R38
R41
R47
-
-
-
-
R40
R42
R44
R35
R37
R40
R42
R44
R38
-
-
-
R52
R53
R54
R55
-
-
R57
-
FL16
FL18
FL10
FL12
FL14
FL16
FL18
-
FL8
FL13
FL15
FL17
FL4
FL6
FL8
FL14
-
-
-
-
FL7
FL9
FL11
FL3
FL5
FL7
FL9
FL11
FL6
-
-
-
FL19
FL20
FL21
FL22
-
-
FL23
-
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Figure 21. On-board LCD Module
5.4.22 External LCD Connector
In addition to the on-board LCD, DK-S7G2 provides an expansion connector for the use of an external LCD module. The External LCD interface supports a 16-bit LCD data bus, control signals, and I 2 C bus to interface with a touch controller. The external LCD interface uses the same MCU ports for the LCD data bus as the on-board LCD.
A digital bus switch (U37) is provided to isolate the LCD signals from the rest of the system. To enable the external LCD, set DIP switch S9-4 to ON. When the external LCD is enabled, LED7 is illuminated.
The connector interface includes an LCD_PRESENT signal (J29 pin 2), which has a weak pull-down on DK-
S7G2. The LCD_PRESENT signal is connected to the Board Configuration I2C Bus Expander (U40) and indicates to the MCU that an external LCD is installed. This signal should be pulled high (+3.3 V) by the external LCD module.
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Figure 22. External LCD Connector
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Table 28. External LCD Connector Port Assignments
LCD Signal
Description
+3.3V
LCD Present
+3.3V
GND
GND
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
GND
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
TOUCH RESET#
NC
GND
DE
HSYNC
VSYNC
GND
CLK
GND
+5V
+5V
+5V
ON
I2C SDA
I2C SCL
IRQ
Backlight Enable
LCD RESET#
34
35
36
37
30
31
32
33
38
39
40
26
27
28
29
22
23
24
25
18
19
20
21
14
15
16
17
10
11
12
13
6
7
8
9
2
3
4
5
External LCD
Connector (J29) Pin
1
DK-S7G2 Port
-
-
P901
P711
P315
P314
P313
-
PA10
PA09
PA08
P615
P905
P906
P907
P908
-
-
-
-
-
P804
P803
P802
P606
P607
PA00
-
PA01
-
-
P900
-
-
P710
PA02
PA03
P001
P712
P713
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5.4.23 User Potentiometer
DK-S7G2 includes a 10 k
Ω
single-turn potentiometer (R16) connected to the Analog-to-Digital Converter
(ADC) peripheral on the S7G2 MCU. This device is connected to P000 using the AN000 function assignment.
To isolate the User Potentiometer from P000, remove the jumper from J11.
Figure 23. User Potentiometer
5.4.24 Kit Data Serial EEPROM
DK-S7G2 includes a 64 Kb I 2 C serial EEPROM (U43), which stores basic information about the DK-S7G2.
This device is programmed at the factory and is write protected. This device may be accessed either through the MCU or through the breakout pin headers to retrieve the basic kit information. The 7-bit I 2 C address is
0x50 for this device.
Figure 24. Kit Data Serial EEPROM
5.5 Breakout Pin Headers
The DK-S7G2 pin headers, J5, J6, J7 and J8, provide access to all Main MCU interface signals, and to
connected to that pin.
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5.6 Configuration
5.6.1 Function select DIP switches
Most pins of the Synergy S7G2 microcontroller support multiple functions and can therefore be connected to more than one device or connector on the DK-S7G2 board. To make it easy and safe to connect important functions, especially those with wide data bus connections, the DK-S7G2 provides banks of DIP switches
S6, S7, S8, and S9.
Each DIP switch controls a high-speed buffer which, when the switch is in the ON position, connects the signal lines between the microcontroller and the on-board device or connector. When the switch is in the
OFF position, the microcontroller pins are isolated from the respective connector or device and can be used for another board function.
When the DIP switches are in the OFF position, software can dynamically enable the respective peripherals at system initialization through an I/O expander. The I/O expander is controlled through software through an
I 2 C port connected to the SCI channel 7 on the S7G2 microcontroller and performs the following functions:
•
Sense the position of the DIP switch.
•
Generate the enable signal for the buffer.
•
Control an LED.
Through the I/O expander’s I 2 C port, software can read the position of the DIP switch and, if the DIP switch is open, enable the buffers to connect the device to the microcontroller pins.
The selection DIP switches enable peripheral functions as shown in the following table.
Table 29. Selection DIP Switch Functions
Location
S6-1
S6-2
S6-3
S6-4
S7-1
S7-2
S7-3
S7-4
Default Setting
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
Function
Boot Mode (MD) Select
Ethernet 0 Enable
Ethernet 1 Enable e.MMC Enable
PMOD A Enable
JTAG Enable
Serial Port (RS232/485) Enable
CAN Enable
Notes
OFF = Normal Boot mode
ON = Serial Boot mode
S8-1
S8-2
S8-3
S8-4
OFF
OFF
OFF
ON
PMOD B Enable
Camera Module Enable
SD Card Enable
On-board LCD Enable
S9-1
S9-2
S9-3
S9-4
OFF
OFF
OFF
OFF
QSPI Flash Enable
SDRAM Enable
User Push-buttons Enable
External LCD Enable
Figure 25. Function Select DIP Switches S6 and S8
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Figure 26. Function Select DIP Switches S7 and S9
Figure 27. Function Selection
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5.6.2 Ethernet 0 Multiplexing
Ethernet 0 is multiplexed with Audio Jack, SD Card, e.MMC, and Breakout Pin Headers.
To enable Ethernet 0, set S6-2 to ON. The selection DIP switches for the SD Card and e.MMC do not matter when Ethernet 0 is enabled. With Ethernet 0 enabled, the other multiplexed functions are not available.
To disable Ethernet 0 and enable the other multiplexed functions, set S6-2 to OFF. To enable the SD Card, set S8-3 to ON. To enable the e.MMC, set S6-4 to ON. With Ethernet 0 disabled, Audio Jack is automatically enabled, and the multiplexed ports are available at the Breakout Pin Headers.
Note: SD Card and e.MMC use the same MCU ports. SD Card and e.MMC cannot be used at the same time.
Figure 28. Ethernet 0 Multiplexing
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5.6.3 Ethernet 1 Multiplexing
Ethernet 1 is multiplexed with the Camera Module and some ports on the Breakout Pin Headers.
To enable Ethernet 1, set S6-3 to ON and S8-2 to OFF. This also enables the multiplexed ports that are routed to the Breakout Pin Headers.
To enable the Camera Module, Ethernet 1 must be enabled. Set S6-3 to ON and S8-2 to ON. To avoid signal conflicts, do not use Ethernet 1 and the Camera Module at the same time.
Figure 29. Ethernet 1 Multiplexing
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5.6.4 LCD Multiplexing
Ports used for the on-board LCD are shared with the external LCD, and some LCD ports are multiplexed with the e.MMC. These shared and multiplexed signals are always available at the Breakout Pin Headers.
To enable the on-board LCD, set S8-4 to ON, S9-4 to OFF, and S6-4 to OFF.
To enable the external LCD, set S8-4 to OFF, S9-4 to ON, and S6-4 to OFF.
To enable the e.MMC, set S8-4 to OFF, S9-4 to OFF, and S6-4 to ON.
Figure 30. LCD Multiplexing
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5.6.5 SDRAM Multiplexing
Ports used for the SDRAM are multiplexed with PMOD C, PMOD D, and some ports on the Breakout Pin
Headers.
To enable the SDRAM and disable the other multiplexed functions, set S9-2 to ON.
To enable PMOD C, PMOD D, and the multiplexed ports on the Breakout Pin Headers, first disable the
SDRAM. To disable the SDRAM, set S9-2 to OFF. PMOD C, PMOD D, and the multiplexed ports on the
Breakout Pin Headers will be available.
Figure 31. SDRAM Multiplexing
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6. Electrical Schematics
Development Kit S7G2 (DK-S7G2) v4.1
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7. Mechanical Drawing
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8. Certifications
FCC Compliance
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1)
This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Japanese VCCI Normative Annex 1 and Normative Annex 1-1, Class B ITE
This is a Class B product based on the standard of the VCCI Council. If this is used near a radio or television receiver in a domestic environment, it may cause radio interference. Install and use the equipment according to the instruction manual.
China SJ/T 113642014, 10 year environmental protection use period.
Chinese National Standard 13438, C6357 compliance, Class B limits
Australia/New Zealand AS/NZS CISPR 32:2015, Class B
EU RoHS
EU EMI/EMC compliance
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Website and Support
Visit the following vanity URLs to learn about key elements of the Synergy Platform, download components and related documentation, and get support.
Synergy Software
Synergy Software Package
Software add-ons
Software glossary
Development tools
Synergy Hardware
Microcontrollers
MCU glossary
Parametric search
Kits
Synergy Solutions Gallery
Partner projects
Application projects
Self-service support resources:
Documentation
Knowledgebase
Forums
Training
Videos
Chat and web ticket www.renesas.com/synergy/software www.renesas.com/synergy/ssp www.renesas.com/synergy/addons www.renesas.com/synergy/softwareglossary www.renesas.com/synergy/tools www.renesas.com/synergy/hardware www.renesas.com/synergy/mcus www.renesas.com/synergy/mcuglossary www.renesas.com/synergy/parametric www.renesas.com/synergy/kits www.renesas.com/synergy/solutionsgallery www.renesas.com/synergy/partnerprojects www.renesas.com/synergy/applicationprojects www.renesas.com/synergy/docs www.renesas.com/synergy/knowledgebase www.renesas.com/synergy/forum www.renesas.com/synergy/training www.renesas.com/synergy/videos www.renesas.com/synergy/resourcelibrary
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Revision History
Rev.
1.00
Date
Apr.15.19
Development Kit S7G2 (DK-S7G2) v4.1
Description
Page Summary
- First release document
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Development Kit S7G2 (DK-S7G2) User’s Manual
Publication Date: Apr.15.19
Published by: Renesas Electronics Corporation
Renesas Synergy™ Platform
Development Kit S7G2 (DK-S7G2)
R12UM0035EU0100

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Key features
- S7G2 microcontroller with high performance and low power consumption
- Integrated debugger for easy debugging and programming
- Variety of connectivity options, including USB, Ethernet, and CAN
- On-board sensors and actuators for rapid prototyping
- Support for Renesas Synergy Software Package (SSP), which provides a comprehensive set of software components and tools