Index DW9937S Service Manual

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SERVICE MANUAL

D

W9937S

Ver 0.0

INDEX

PREFACE

FEATURES ........................................................................................................................

FRONT PANEL&REAR PANEL ........................................................................................................................ 2

REMOTE CONTROL ................................................................................................................. 3

BLOCK DIAGRAM

BLOCK DIAGRAM .............................................................................................................

EXPLODED VIEW

EXPLODED VIEW ...................................................................................................................... 5

PARTS SPECIFICATIONS

SST39VF16 0 ............................................................................................................................... 6

M13S128168A ............................................................................................................................

TSB41AB1 ..................................................................................................................................

TVP5146 ...................................................................................................................... 9

CS4360 ........................................................................................................................................ 13

74HC/HCT14 ............................................................................................................................. 17

74ALVT16373

MM1313 ............................................................................................................................................ 19-30

MAX4051 .......................................................................................................................................... 31-50

FSDM07652RB

TUNER .............................................................................................................. 73

SCHEMA TIC DIAGRAM&PCB SILKSCREEN

MAIN BOARD SCHEMATIC AND PCB LAYOUT ............................................................................

74-84

AV BOARD SCHEMATIC

KEY BOARD SCHEMATIC

..................................................................................................... 85-95

.......................................................................................................

POWER BOARD SCHEMATIC ........................................................................................... 97

VCR MODLE .................................................................................................

........................

98-100

PARTSLIST

MAIN BOARD ..............................................................................................................................

101-102

MAIN PANEL BOARDKEY

POWER BOARD

AV BOARD

......................................................................................................................

..............................................................................................................

....................................................................................................................................

103-104

105-107

108-110

BLOCK DIAGRAM

EXPLODED VIEW

16 Megabit Multi-Purpose Flash

SST39VF160Q / SST39VF160

Advance Information

UNCTIONAL

LOCK

IAGRAM

X-Decoder

A19 - A0

Address Buffer & Latches

CE#

OE#

WE#

Control Logic

16,777,216 bit

EEPROM

Cell Array

Y-Decoder

I/O Buffers and Data Latches

DQ15 - DQ0 VDDQ

329 ILL B1.2

A18

A17

A19

WE#

A15

A14

A13

A12

A11

A10

Standard Pinout

Top View

Die Up

SST39VF160Q

A16

VDDQ

VSS

DQ15

DQ7

DQ14

DQ6

DQ13

DQ5

DQ12

DQ4

VDD

DQ11

DQ3

DQ10

DQ2

DQ9

DQ1

DQ8

DQ0

OE#

VSS

CE#

329 ILL F01.2

IGURE

1: P

SSIGNMENTS FOR

48-

PIN

TSOP P

ACKAGES

A18

A17

A15

A14

A13

A12

A11

A10

A19

WE#

1 2 3 4 5 6

A A3 A7 NC

B A4 A17 NC

WE# A9

NC A8

C A2 A6 A18 NC

D A1 A5 NC A19

A13

A12

A10 A14

A11 A15

E A0 DQ0 DQ2 DQ5 DQ7 A16

F CE# DQ8 DQ10 DQ12 DQ14 VDDQ

G OE# DQ9 DQ11 VDD DQ13 DQ15

H VSS DQ1 DQ3 DQ4 DQ6 VSS

SST39VF160Q 329 ILL F02.4

IGURE

2: P

SSIGNMENTS FOR

48-

PIN

TFBGA

Standard Pinout

Top View

Die Up

SST39VF160

1 2 3 4 5 6

A A3 A7 NC WE# A9

B A4 A17 NC NC A8

C A2 A6

D A1 A5

A18 NC

NC A19

A13

A12

A10 A14

A11 A15

E A0 DQ0 DQ2 DQ5 DQ7 A16

F CE# DQ8 DQ10 DQ12 DQ14 NC

G OE# DQ9 DQ11 VDD DQ13 DQ15

H VSS DQ1 DQ3 DQ4 DQ6 VSS

SST39VF160 329 ILL F02a.0

329 ILL F01a.0

A16

VSS

DQ15

DQ7

DQ14

DQ6

DQ13

DQ5

DQ12

DQ4

VDD

DQ11

DQ3

DQ10

DQ2

DQ9

DQ1

DQ8

DQ0

OE#

VSS

CE#

ESMT

M13S128168A

;( 2

45-45 2

66 PIN TSOP(II)

(400mil x 875mil)

(0.65 mm PIN PITCH)

Elite Semiconductor Memory Technology Inc. Publication Date : Nov. 2002

Revision : 0.2

SLLS423D – JUNE 2000 – REVISED SEPTEMBER 2002

description (continued)

required for normal network operation regardless of the state of the PHY-LLC interface. When the interface is in the reset or disabled state and LPS is again observed active, the PHY initializes the interface and returns it to normal operation.

When the PHY-LLC interface is in the low-power disabled state, the TSB41AB1 automatically enters a low-power mode if the port is inactive (disconnected, disabled, or suspended). In this low-power mode, the

TSB41AB1 disables its internal clock generators and also disables various voltage and current reference circuits depending on the state of the port (some reference circuitry must remain active in order to detect new cable connections, disconnections, or incoming TPBIAS, for example). The lowest power consumption (the ultralow-power sleep mode) is attained when the port is either disconnected, or disabled with the port interrupt enable bit cleared. The TSB41AB1 exits the low-power mode when the LPS input is asserted high or when a port event occurs which requires that the TSB41AB1 become active in order to respond to the event or to notify the LLC of the event (for example, incoming bias is detected on a suspended port, a disconnection is detected on a suspended port, a new connection is detected on a nondisabled port, etc.). The SYSCLK output becomes active (and the PHY-LLC interface is initialized and becomes operative) within 7.3 ms after LPS is asserted high when the TSB41AB1 is in the low-power mode.

The PHY uses the C/LKON terminal to notify the LLC to power up and become active. When activated, the

C/LKON signal is a square wave of approximately 163-ns period. The PHY activates the C/LKON output when the LLC is inactive and a wake-up event occurs. The LLC is considered inactive when either the LPS input is inactive, as described above, or the LCtrl bit is cleared to 0. A wake-up event occurs when a link-on PHY packet addressed to this node is received, or when a PHY interrupt occurs. The PHY deasserts the C/LKON output when the LLC becomes active (both LPS active and the LCtrl bit set to 1). The PHY also deasserts the C/LKON output when a bus reset occurs unless a PHY interrupt condition exists which would otherwise cause C/LKON to be active.

PHP package terminal diagram

PHP PACKAGE

(TOP VIEW)

SYSCLK

CTL0

CTL1

48 47 46 45 44 43 42 41 40 39 38 37

TSB41AB1

13 14 15 16 17 18 19 20 21 22 23 24

AGND

TPBIAS

TPA+

TPA–

TPB+

TPB–

AGND

POST OFFICE BOX 655303

•

DALLAS, TEXAS 75265

TVP5146

1.5 Functional Block Diagram

CVBS/

Pb/B/C

VI_1_A

VI_1_B

VI_1_C

CVBS/

Y/G

VI_2_A

VI_2_B

VI_2_C

CVBS/

Pr/R/C

VI_3_A

VI_3_B

VI_3_C

CVBS/Y VI_4_A

Copy

Protection

Detector

Analog Front End

ADC1

ADC2

ADC3

CVBS/Y

Composite and S-Video Processor

Y/C

Separation

5-line

Adaptive

Comb

Luma

Processing

Chroma

Processing

YCbCr

Output

Formatter

Y/G

Pb/B

Pr/R

Component

Processor

Gain/Offset

Color

Space

Conversion

YCbCr

ADC4

CVBS/Y/G

VBI

Data

Slicer

Y[9:0]

C[9:0]

FSS

GPIO

Sampling

Clock

Timing Processor with Sync Detector

Host

Interface

Figure 1–1. Functional Block Diagram

IS24C08-2, IS24C08-3

1–4

TVP5146

1.6 Terminal Assignments

PFP PACKAGE

(TOP VIEW)

VI_1_B

VI_1_C

CH1_A33GND

CH1_A33VDD

CH2_A33VDD

CH2_A33GND

VI_2_A

VI_2_B

VI_2_C

CH2_A18GND

CH2_A18VDD

A18VDD_REF

A18GND_REF

CH3_A18VDD

CH3_A18GND

VI_3_A

VI_3_B

VI_3_C

CH3_A33GND

CH3_A33VDD

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

19 42

21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

IOGND

IOVDD

Y_5

Y_6

Y_7

Y_8

Y_9

DGND

DVDD

C_6/GPIO/RED

C_7/GPIO/GREEN

C_8/GPIO/BLUE

C_9/GPIO/FSO

DGND

DVDD

Y_0

Y_1

Y_2

Y_3

Y_4

Figure 1–2. Terminal Assignments Diagram

1–5

TVP5146

1.7 Terminal Functions

Table 1–1. Terminal Functions

TERMINAL

NAME NUMBER

Analog Video

VI_1_A

VI_1_B

VI_1_C

VI_2_A

VI_2_B

VI_2_C

VI_3_A

VI_3_B

VI_3_C

VI_4_A

Clock Signals

DATACLK

I/O

XTAL1 74

VI_1_x: Analog video input for CVBS/Pb/B/C

VI_2_x: Analog video input for CVBS/Y/G

VI_3_x: Analog video input for CVBS/Pr/R/C

VI_4_A: Analog video input for CVBS/Y

DESCRIPTION

Up to 10 composite, 4 S-video, and 2 composite or 3 component video inputs (or a combination thereof) can be supported.

The inputs must be ac-coupled. The recommended coupling capacitor is 0.1 µ F.

The possible input configurations are listed in the input select register at I2C subaddress 00h (see

Section 2.11.1).

O Line-locked data output clock.

External clock reference input. It may be connected to an external oscillator with a 1.8-V compatible clock signal or a 14.31818-MHz crystal oscillator.

O External clock reference output. Not connected if XTAL1 is driven by an external single-ended oscillator.

XTAL2

Digital Video

C[9:0]/

GPIO[9:0]

57, 58,

59, 60,

63, 64,

65, 66,

69, 70

D_BLUE

D_GREEN

D_RED

FSO

Y[9:0]

43, 44,

45, 46,

47, 50,

51, 52,

53, 54

Miscellaneous Signals

Digital video output of CbCr, C[9] is MSB and C[0] is LSB. Unused outputs can be left unconnected. Also, these terminals can be programmable general-purpose I/O.

For the 8-bit mode, the two LSBs are ignored.

Digital BLUE input from overlay device

Digital GREEN input from overlay device

Digital RED input from overlay device

Fast-switch overlay between digital RGB and any video

Digital video output of Y/YCbCr, Y[9] is MSB and Y[0] is LSB.

For the 8-bit mode, the two LSBs are ignored. Unused outputs can be left unconnected.

FSS/GPIO

GLCO/I2CA

INTREQ

PWDN

RESETB

I/O

Fast-switch (blanking) input. Switching signal between the synchronous component video (YPbPr/RGB) and the composite video input.

Programmable general-purpose I/O

Genlock control output (GLCO). Two Genlock data formats are available: TI format and real time control

(RTC) format.

During reset, this terminal is an input used to program the I2C address LSB.

O Interrupt request

Power down input:

1 = Power down

0 = Normal mode

Reset input, active low

1–6

Table 1–1. Terminal Functions (Continued)

TERMINAL

NAME

Host Interface

NUMBER

SCL

SDA

Power Supplies

AGND

A18GND_REF

A18VDD_REF

CH1_A18GND

CH2_A18GND

CH3_A18GND

CH4_A18GND

CH1_A18VDD

CH2_A18VDD

CH3_A18VDD

CH4_A18VDD

CH1_A33GND

CH2_A33GND

CH3_A33GND

CH4_A33GND

CH1_A33VDD

CH2_A33VDD

CH3_A33VDD

CH4_A33VDD

DGND

27, 32, 42,

56, 68

DVDD

IOGND

IOVDD

PLL_A18GND

PLL_A18VDD

Sync Signals

31, 41, 55,

39, 49, 62

38, 48, 61

HS/CS/GPIO 72

I/O

I I2C clock input

I/O I2C data bus

Analog ground. Connect to analog ground.

Analog 1.8-V return

Analog power for reference 1.8 V

Analog 1.8-V return

Analog power. Connect to 1.8 V.

Analog 3.3-V return

Analog power. Connect to 3.3 V.

Digital return

Digital power. Connect to 1.8 V.

Digital power return

DESCRIPTION

Digital power. Connect to 3.3 V or less for reduced noise.

Analog power return

Analog power. Connect to 1.8 V.

VS/VBLK/GPIO

FID/GPIO

AVID/GPIO

I/O

Horizontal sync output or digital composite sync output

Programmable general-purpose I/O

Vertical sync output (for modes with dedicated VSYNC) or VBLK output

Programmable general-purpose I/O

Odd/even field indicator output. This terminal needs a pulldown resistor.

Programmable general-purpose I/O

Active video indicator output

Programmable general-purpose I/O

TVP5146

1–7

IS24C08-2, IS24C08-3

Philips Semiconductors

Hex inverting Schmitt trigger

PIN DESCRIPTION

PIN NO.

1, 3, 5, 9, 11, 13

2, 4, 6, 8, 10, 12

SYMBOL

1A to 6A

1Y to 6Y

GND

NAME AND FUNCTION data inputs data outputs ground (0 V) positive supply voltage

Product specification

74HC/HCT14

Fig.1 Pin configuration.

Fig.4 Functional diagram.

Fig.2 Logic symbol.

Fig.5

Logic diagram

(one Schmitt trigger).

Fig.3 IEC logic symbol.

FUNCTION TABLE

INPUT nA

OUTPUT

Notes

1. H = HIGH voltage level

L = LOW voltage level nY

APPLICATIONS

•

Wave and pulse shapers

•

Astable multivibrators

•

Monostable multivibrators

Philips Semiconductors

2.5V/3.3V 16-bit transparent D-type latch (3-State)

Product specification

74ALVT16373

LOGIC SYMBOL

47 46 44 43 41 40 38 37

1D0 1D1 1D2 1D3

1LE

1D4 1D5 1D6 1D7

1OE

1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7

2 3 5 6 8 9 11 12

36 35 33 32 30 29 27 26

2D0 2D21 2D2 2D3

2LE

2D4 2D5 2D6 2D7

2OE

2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7

13 14 16 17 19 20 22 23

SA00044

PIN DESCRIPTION

PIN NUMBER

47, 46, 44, 43, 41, 40, 38, 37,

36, 35, 33, 32, 30, 29, 27, 26

2, 3, 5, 6, 8, 9, 11, 12, 13,

14, 16, 17, 19, 20, 22, 23

SYMBOL

1D0 – 1D7

2D0 – 2D7

1Q0 – 1Q7

2Q0 – 2Q7

1, 24

48, 25

4, 10, 15, 21, 28, 34, 39, 45

7, 18, 31, 42

1OE, 2OE

1LE, 2LE

GND

FUNCTION

Data inputs

Data outputs

Output enable inputs

(active-Low)

Enable inputs

(active-High)

Ground (0V)

Positive supply voltage

LOGIC SYMBOL (IEEE/IEC)

1OE

1LE

2OE

2LE

2D2

2D3

2D4

2D5

2D6

2D7

2D8

1D1

1D2

1D3

1D4

1D5

1D6

1D7

1D8

2D1

1EN

2EN

∇

PIN CONFIGURATION

1OE

1Q0

1Q1

GND

1Q2

1Q3

1Q4

1Q5

GND

1Q6

1Q7 12

2Q0

2Q1

GND

2Q2

2Q3

V CC

2Q4

2Q5 20

GND 21

22 2Q6

2Q7 23

2OE 24

1D4

1D5

GND

1D6

1D7

2D0

2D1

GND

1LE

1D0

1D1

GND

1D2

1D3

2D2

2D3

V CC

2D4

2D5

GND

2D6

2D7

2LE

SA00043

2Q2

2Q3

2Q4

2Q5

2Q6

2Q7

2Q8

1Q1

1Q2

1Q3

1Q4

1Q5

1Q6

1Q7

1Q8

2Q1

SW00010

I 2 C BUS Control 5-Input 2-Output AV Switch MM1313 MITSUMI

I

C BUS Control 5-Input 2-Output AV Switch

Monolithic IC MM1313

Outline

This IC is a 5-input 2-output AV switch with I 2 C control, developed for use in televisions. Two outputs enable it to support two screens or "picture-in-picture".

Features

1. Serial control by I 2 C bus.

2. 5-inputs, 2-outputs.

3. Video and audio system switches can be controlled independently.

4. 6dB amplifier built in to video system.

5. Built-in Y/C MIX circuit.

6. Slave address can be changed : 90H or 92H.

7. Audio muting possible by external pin.

8. Maintains high impedance even when I 2 C BUS line (SDA, SCL) power supply is off.

9. Built-in 3 value discrimination function.

10.On-chip power ON reset function.

11.Two types of audio input impedance : 60k

Ω and 30k

Ω

MM1313AD : 60k

Ω

MM1313BD : 30k

Ω

12.Supports 2-screen or P-IN-P TV.

Package

SDIP-42A (MM1313AD, MM1313BD)

Applications

1. Televisions

2. Other video equipment

MITSUMI

Equivalent Block Diagram

I 2 C BUS Control 5-Input 2-Output AV Switch MM1313

MITSUMI I 2 C BUS Control 5-Input 2-Output AV Switch MM1313

Pin Function

Pin No.

Name

41 MTV-V

1 V1-V

7 V2-V

13 V3-V

27 STV-V

3 V1-Y

9 V2-Y

31 Y

5 V1-C

11 V2-C

29 C

Internal equivalent circuit diagram Pin No.

Name

33 L

OUT

22 L

OUT

32 R

OUT

24 R

OUT

36 BIAS

Internal equivalent circuit diagram

19 SCL

MTV-L

V1-L

V2-L

V3-L

STV-L

MTV-R

V1-R

V2-R

V3-R

STV-R

OUT

20 SDA

OUT

ADR

Mute

MITSUMI I 2 C BUS Control 5-Input 2-Output AV Switch MM1313

Absolute Maximum Ratings

(Ta=25 °C )

Item

Storage temperature

Operating temperature

Power supply voltage

Allowable power dissipation

Symbol

STG

OPR

Ratings

-40~+125

-20~+75

850

Units

° C

V mW

Electrical Characteristics

(Ta=25°C, V

=9V)

Item Symbol

Operating power supply voltage V

Current consumption I

OUT

1 output

Voltage gain

Frequency characteristics

Measure Conditions (unless otherwise indicated, ment pin Measurement Circuit Figure 1)

Min. Typ. Max. Units

38 V

=9V, no signal, no load

8 9

10 V

52 mA

Differential gain

Differential phase

Input dynamic range

TP1

Sine wave 1.0V

P-P

, 100kHz 5.5

6.0

6.5

Sine wave 1.0V

P-P

, 10MHz/100kHz -1.0

0 1.0

Vn-V : Staircase 1V

P-P

APL=10~90%

0 3 % Vn-Y : Staircase (luminance signal) 1V

P-P

-3

Vn-C : Chroma signal 0.3V

P-P

APL=10~90%

Vn-V : Staircase 1V

P-P

TP1

APL=10~90%

Vn-Y : Staircase (luminance signal) 1V

P-P

-3

Vn-C : Chroma signal 0.3V

P-P

APL=10~90%

Sine wave 100kHz

SG1~3 Maximum input for total higher 1.6

1.9

harmonic distortion factor < 1.0%

3 deg

P-P

OUT

2 output

Voltage gain

Frequency characteristics

Differential gain

Differential phase

Input dynamic range

TP6

Sine wave 1.0V

P-P

, 100kHz

Sine wave 1.0V

P-P

10MHz/100kHz

Vn-V : Staircase 1V

P-P

5.5

-1.0

APL=10~90%

Vn-Y : Staircase (luminance signal) 1V

P-P

-3

Vn-C : Chroma signal 0.3V

P-P

APL=10~90%

6.0

6.5

1.0

3 dB dB

TP6

Vn-V : Staircase 1V

P-P

APL=10~90%

Vn-Y : Staircase (luminance signal) 1V

P-P

-3

Vn-C : Chroma signal 0.3V

P-P

APL=10~90%

Sine wave 100kHz

SG1~3 Maximum input for total higher 1.6

1.9

harmonic distortion factor < 1.0%

3 deg

P-P

OUT

1 output

Voltage gain

Frequency characteristics

Differential gain

Differential phase

TP2

Vn-Y : Sine wave 1.0V

P-P

, 100kHz

1 : Sine wave 2.0V

P-P

, 100kHz

Vn-Y : Sine wave 1.0V

P-P

10MHz/100kHz

1 : Staircase 2.0V

P-P

10MHz/100kHz

Vn-Y : Staircase 1V

P-P

APL=10~90%

1: Staircase 2V

P-P

APL=10~90%

Vn-Y : Staircase 1V

P-P

APL=10~90%

1 : Staircase 2V

P-P

APL=10~90%

5.5

-0.5

-1.0

-3

6.0

6.5

0.5

1.0

3 dB dB

% deg

MITSUMI I 2 C BUS Control 5-Input 2-Output AV Switch MM1313

Item

Input dynamic range

Output impedance

OUT

1 output

Voltage gain

Frequency characteristics

Differential gain

Differential phase

Input dynamic range

Symbol

OYC

Measure Conditions (unless otherwise indicated, ment pin Measurement Circuit Figure 1)

Vn-Y : Sine wave 100kHz

SG2 Maximum input for total higher harmonic distortion factor < 1.0%

Min. Typ. Max. Units

1.6

1.9

P-P

SG4

1 : Sine wave 100kHz

Maximum input for total higher 3.2

3.8

harmonic distortion factor < 1.0%

Ω

TP3

SG3

SG5

Vn-C : Sine wave 1.0V

P-P

, 100kHz 5.5

6.0

6.5

1 : Sine wave 2.0V

P-P

, 100kHz -0.5

0 0.5

Vn-C : Sine wave 1.0V

P-P

10MHz/100kHz

-1.0

0 1.0

1 : Sine wave 2.0V

P-P

10MHz/100kHz

1 : Staircase 2V

P-P

APL=10~90%

-1.0

-3

1.0

1 : Staircase 2V

P-P

APL=10~90%

-3 0

Vn-C : Sine wave 100kHz

Maximum input for total higher 2.75

3.25

harmonic distortion factor < 1.0%

1: Sine wave 100kHz

Maximum input for total higher 5.5

6.5

harmonic distortion factor < 1.0%

Vn-C, C

1 10 15

20 dB dB

% deg

V k

P-P

Ω

Input impedance

Output impedance

OUT

1 output

Voltage gain

Frequency characteristics F

Total higher harmonic distortion THD

Input dynamic range D

TP4

SG6

Output offset voltage V

OFFL

Input impedance

Output impedance

OUT

2 output

Voltage gain G

Frequency characteristics F

Total higher harmonic distortion THD

Input dynamic range

TP7

SG6

22 b7=0, Sine wave 2.5V

P-P

, 1kHz -6.5

-6.0

-5.5

b7=1, Sine wave 2.5V

P-P

, 1kHz -0.5

0.0

0.5

Sine wave 2.5V

P-P

, 1MHz/1kHz -3.0

Sine wave 2.5V

P-P

, 1kHz

0.03

1.0

0.1

dB dB

Sine wave 1kHz

Maximum input for total higher 2.6

2.8

harmonic distortion factor < 0.5%

OUT

1 pin DC difference during

SW switching

42 60

120

±15

Vrms mV k

Ω

Sine wave 2.5V

P-P

, 1kHz -0.5

0.0

0.5

Sine wave 2.5V

P-P

, 1MHz/1kHz -3.0

0 1.0

Sine wave 2.5V

P-P

, 1kHz

Sine wave 1kHz

0.03

0.1

Vrms Maximum input for total higher 2.6

2.8

harmonic distortion factor < 0.5%

OUT

2 pin DC difference during

SW switching

0 ±15 mV

120

Ω

Output offset voltage V

OFFL

Output impedance

OUT

1 output

Voltage gain

Frequency characteristics F

Total higher harmonic distortion THD

Input dynamic range D

Output offset voltage

Input impedance

Output impedance

OFFR

TP5

SG7

32 b7=0, Sine wave 2.5V

P-P

, 1kHz -6.5

-6.0

-5.5

b7=1, Sine wave 2.5V

P-P

, 1kHz -0.5

0.0

0.5

Sine wave 2.5V

P-P

, 1MHz/1kHz -3.0

Sine wave 2.5V

P-P

, 1kHz

Sine wave 1kHz

Maximum input for total higher 2.6

2.8

harmonic distortion factor < 0.5%

OUT

1 pin DC difference during

SW switching

0.03

120

1.0

0.1

±15

78 dB dB

Vrms mV k

Ω

MITSUMI I 2 C BUS Control 5-Input 2-Output AV Switch MM1313

Item

OUT

2 output

Voltage gain G

Frequency characteristics F

Total higher harmonic distortion THD

Input dynamic range D

Output offset voltage

Output impedance

Crosswalk

OUT

Video I/O Pin Voltage

Input pin voltage

OFFR

VIP

VOP

Output pin voltage

SOP

Audio I/O Pin Voltage

Input pin voltage

Output pin voltage

AIP

AOP

Logic section (Refer to figure below)

Input voltage L V

Input voltage H V

Low level output voltage (SDA) V

High level input current I

Low level input current I

Clock frequency f

SCL

Data transmission waiting time t

BUF

SCL start hold time t

HD;STA

SCL low level hold time t

LOW

SCL high level hold time t

HIGH

SCL start set-up time t

SU;STA

SDA data hold time t

HD;DAT

SDA data set-up time t

SD;DAT

SCL rise time t

SCL fall time t

SCL stop set-up time t

SU;STO

TP8

SG7

TP1

TP2

TP3

TP6

TP4

TP5

TP7

TP8

Sine wave 2.5V

P-P

, 1kHz -0.5

0.0

0.5

Sine wave 2.5V

P-P

, 1MHz/1kHz -3.0

0 1.0

Sine wave 2.5V

P-P

, 1kHz

Sine wave 1kHz

0.03

0.1

Vrms Maximum input for total higher 2.6

2.8

harmonic distortion factor < 0.5%

OUT

2 pin DC difference during switching

0 ±15 mV

120

Ω

Measurement Circuit Figure 2 for SG1 input : 4.43MHz, 1V for SG2 input : 4.43MHz, 0.5V

P-P

Measurement Circuit Figure 2

1kHz, 2.5V

P-P

-60 -53 dB

-90 -80 dB

No signal, no load

OUT

1 pin, V

1 pin, C

OUT

2 pin

No signal, no load

1 pin

No signal, no load

I 2 C logic low level discrimination value

I 2 Clogic high level discrimination value

SDA for 3mA inflow when SDA, SCL=4.5V impressed when SDA, SCL=0.4V impressed

4.6

4.9

5.2

4.1

4.4

4.7

3.3

3.6

3.9

4.7

4.0

4.7

4.0

4.7

200

250

4.0

4.3

4.6

3.9

4.2

4.5

0.0

3.0

0.0

-10

4.0

1.5

5.0

0.4

+10 µA

100 kHz

µS

µS nS

1000 nS

300 nS

µS

µS nS

I 2 C BUS BUS Control Signal

SDA

SCL t

BUF t

R t

P S t HD:STA t

LOW t

HD:DAT t

HIGH t

SU:DAT t

SU:STA Sr

24 t

SU:STD P

MITSUMI

Measurement Circuit

Measurement Circuit 1

I 2 C BUS Control 5-Input 2-Output AV Switch MM1313

MITSUMI I 2 C BUS Control 5-Input 2-Output AV Switch MM1313

Measurement Circuit 2 (Crosstalk measurement)

MITSUMI

I 2 C BUS

I 2 C BUS Control 5-Input 2-Output AV Switch MM1313

SDA

SCL

1 2 3 4 5 6 7 8 A 1 2 3 8 A P

S:Start Condition

P:Stop Condition

A:Acknowledge

The I 2 C BUS is a BUS system developed by Philips for internal use in equipment. Data transmission is carried out by the two SDA and SCL lines, in byte units, with the MSB first from start condition.

[Control Register]

The control register contains data sent from the master in order to determine the status of each switch.

Slave address R/W

1 0 0 1 0 0 0/1 0

Control register 1 b7 b6 b5 b4 b3 b2 b1 b0

Control register 2 b7 b6 b5 b4 b3 b2 b1 b0

A P

Address byte Control data

The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 0 when using as a control register.

The MM1313 slave address can be selected as 90H/92H depending on the status of the ADR pin. When ADR pin is low it is 90H.

The relationship between the control register bits and switch control is as shown below.

b7 b6

Audio S/Comp

Gain Select b5 b4

Video-Select b3 b2 b1

Audio-Select b0

The control register bits are reset to 0 when power is applied.

MM1313 control is carried out by the 3-byte structure of the 1 address byte and 2 control data bytes. The first byte in the control data is control data for output 1, and the remaining 1 byte is control data for output 2.

All of the remaining data (fourth byte and after) are ignored.

Refer to the separate tables for details on switch control.

MITSUMI I 2 C BUS Control 5-Input 2-Output AV Switch MM1313

[Status Register]

The status register contains data for sending device status to the master.

1 0

Slave address

0 1 0

R/W

0 0/1 1

Status register b7 b6 b5 b4 b3 b2 b1 b0

NA P

Address byte Status data

The MM1313 slave address can be selected as 91H/93H depending on the status of the ADR pin. When the

ADR pin is low it is 91H. However, the confirmation response after completion of the status register should be non-acknowledge.

The status register output data as shown below.

P-ON

RESET b6 b5

S1 b4

S1 b3

S2 b2

OPEN SEL OPEN SEL b1 b0

P-ON RESET : Returns 1 for power on reset. However once data read begins, 0 is returned next.

S1/S2 OPEN : Returns 0 when the S1/S2 pin is not open, and returns 1 when the S1/S2 pin is open

S1/S2 SEL : Returns 0 when the S1/S2 pin is not grounded, and returns 1 when the S1/S2 pin is grounded.

S1/S2 OPEN, SEL have 3-value discrimination, and the combinations are as shown below.

S1/S2 pin DC voltage

0.8V or less

1.3V or more, 3.5V or less

4.5V or more

S1/S2 OPEN

S1/S2 SEL

[Power On Reset]

Power on reset is built in to reset each control register to 0 when power is turned on.

Power on reset threshold has hysteresis as shown in the figure below. The IC power on reset status can be discriminated by reading the status register P-ON RESET.

Reset released

Reset status

Undefined

0.6V

4.3V

5.4V

MITSUMI I 2 C BUS Control 5-Input 2-Output AV Switch MM1313

Switch Control Table

1. Video Output 1

0 b6 b5 b4 b3

0 0 0 0

0 1

OUT

Mute

MTV-V

V1-V

V2-V

V3-V

STV-V

Mute

MTV-V

V1-Y+C

V2-Y+C

V3-V

STV-V

Mute

3. Audio Output 1

Mute pin

1.5V or less

(OPEN)

3.0V or more

1 b2 b1 b0

0 0 0

5. Audio Output 2

Mute pin

1.5V or less

(OPEN)

3.0V or more

1 b2 b1 b0

0 0 0

OUT

Mute

MTV-L

V1-L

V2-L

V3-L

STV-L

Mute

OUT

Mute

MTV-L

V1-L

V2-L

V3-L

STV-L

Mute

V1-Y

V2-Y

Mute

OUT

Mute

OUT

Mute

MTV-R

V1-R

V2-R

V3-R

STV-R

Mute

OUT

Mute

MTV-R

V1-R

V2-R

V3-R

STV-R

Mute

V1-C

V2-C

Mute

OUT

Mute

2. Video Output 2

0 b6 b5 b4 b3

0 0 0 0

0 1

4. Audio Output 1 Gain

Switching

Output gain

-6dB output

0dB output

OUT

Mute

MTV-V

V1-V

V2-V

V3-V

STV-V

Mute

MTV-V

V1-Y+C

V2-Y+C

V3-V

STV-V

Mute

MITSUMI

Application Circuit

I 2 C BUS Control 5-Input 2-Output AV Switch MM1313

Notes

1. V

OUT is set at 4.4V and C

IN at 4.9V

Please note that capacitance polarity may vary depending on comb filter bias.

2. Each audio output can be muted by making pin 19 high. Mute is off when it is open or low.

19-0463; Rev 0; 1/96

Low-Voltage, CMOS Analog

Multiplexers/Switches

_______________General Description

The MAX4051/MAX4052/MAX4053 and MAX4051A/

MAX4052A/MAX4053A are low-voltage, CMOS analog

ICs configured as an 8-channel multiplexer (MAX4051/A), two 4-channel multiplexers (MAX4052/A), and three single-pole/double-throw (SPDT) switches (MAX4053/A).

The A-suffix parts are fully characterized for on-resistance match, on-resistance flatness, and low leakage.

These CMOS devices can operate continuously with dual power supplies ranging from ±2.7V to ±8V or a single supply between +2.7V and +16V. Each switch can handle rail-to-rail analog signals. The off leakage current is only 0.1nA at +25°C or 5nA at +85°C

(MAX4051A/MAX4052A/4053A).

All digital inputs have 0.8V to 2.4V logic thresholds, ensuring TTL/CMOS-logic compatibility when using

±5V or a single +5V supply.

________________________Applications

Battery-Operated Equipment

Audio and Video Signal Routing

Low-Voltage Data-Acquisition Systems

Communications Circuits

____________________________Features

♦ Pin Compatible with Industry-Standard

74HC4051/74HC4052/74HC4053

♦ Guaranteed On-Resistance:

100

Ω with ±5V Supplies

♦ Guaranteed Match Between Channels:

Ω

(MAX4051A–MAX4053A)

Ω

(MAX4051–MAX4053)

♦ Guaranteed Low Off Leakage Currents:

0.1nA at +25°C (MAX4051A–MAX4053A)

1nA at +25°C (MAX4051–MAX4053)

♦ Guaranteed Low On Leakage Currents:

0.1nA at +25°C (MAX4051A–MAX4053A)

1nA at +25°C (MAX4051–MAX4053)

♦ Single-Supply Operation from +2.0V to +16V

Dual-Supply Operation from ±2.7V to ±8V

♦ TTL/CMOS-Logic Compatible

♦ Low Distortion: < 0.04% (600

Ω

)

♦ Low Crosstalk: < -90dB (50

Ω

)

♦ High Off Isolation: < -90dB (50

Ω

)

______________Ordering Information

PART

MAX4051A CPE

MAX4051ACSE

MAX4051ACEE

TEMP. RANGE

0°C to +70°C

PIN-PACKAGE

16 Plastic DIP

16 Narrow SO

16 QSOP

Ordering Information continued at end of data sheet.

___________________________________Pin Configurations/Functional Diagrams

TOP VIEW

MAX4051

NO1 1

NO3 2

COM 3

NO7 4

NO5 5

INH 6

GND 8

LOGIC

DIP/SO/QSOP

16 V+

15 NO2

14 NO4

13 NO0

12 NO6

11 ADDC

10 ADDB

9 ADDA

MAX4052

NO0B 1

NO1B 2

COMB 3

NO3B 4

NO2B 5

INH 6

GND 8

LOGIC

DIP/SO/QSOP

16 V+

15 NO1A

14 NO2A

13 COMA

12 NO0A

11 NO3A

10 ADDB

9 ADDA

NOB 1

NCB 2

NOA 3

COMA 4

NCA 5

INH 6

GND 8

MAX4053

DIP/SO/QSOP

16 V+

15 COMB

14 COMC

13 NOC

12 NCC

11 ADDC

10 ADDB

9 ADDA

Low-Voltage, CMOS Analog

Multiplexers/Switches

ABSOLUTE MAXIMUM RATINGS

Voltages Referenced to GND

V+ ........................................................................-0.3V to +17V

V-..........................................................................+0.3V to -17V

V+ to V- ................................................................-0.3V to +17V

Voltage into Any Terminal (Note 1) ..........(V- - 2V) to (V+ + 2V) or 30mA (whichever occurs first)

Continuous Current into Any Terminal..............................±30mA

Peak Current, NO or COM

(pulsed at 1ms, 10% duty cycle) .................................±100mA

Continuous Power Dissipation (T

= +70°C)

Plastic DIP (derate 10.53mW/°C above +70°C) ............842mW

Narrow SO (derate 8.70mW/°C above +70°C)..............696mW

QSOP (derate 8.00mW/°C above +70°C) .....................640mW

CERDIP (derate 10.00mW/°C above +70°C) ................800mW

Operating Temperature Ranges

MAX405_C_ E/MAX405_AC_E .............................0°C to +70°C

MAX405_E_ E/MAX405_AE_E...........................-40°C to +85°C

MAX405_MJE/MAX405_AMJE ........................-55°C to +125°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10sec) .............................+300°C

Note 1: Signals on any terminal exceeding V+ or V- are clamped by internal diodes. Limit forward-diode current to maximum current rating.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS—Dual Supplies

(V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, T

= T

MIN to T

MAX

, unless otherwise noted. Typical values are at T

= +25°C.)

SYMBOL CONDITIONS

MIN TYP

(Note 2)

MAX

PARAMETER

ANALOG SWITCH

Analog Signal Range

COM–NO On-Resistance

COM

, V

COM–NO On-Resistance

Match Between Channels

(Note 3)

COM–NO On-Resistance

Flatness (Note 4)

NO Off Leakage Current

(Note 5)

∆

FLAT(ON)

NO(OFF)

V+ = 5V, V- = -5V, I

COM

= ±3V

V+ = 5V, V- = -5V,

= 1mA,

COM

= ±3V

= 1mA,

MAX4051A,

MAX4052A,

MAX4053A

= +25°C

C, E, M

MAX4051,

MAX4052,

MAX4053

C, E, M

= +25°C

C, E, M

= +25°C

C, E, M

V+ = 5V, V- = -5V,

= 1mA,

COM

= -3V, 0V, 3V

V+ = 5.5V, V- = -5.5V,

= 4.5V,

COM

= -4.5V

V+ = 5.5V, V- = -5.5V,

= -4.5V,

COM

= 4.5V

V-

MAX4051A,

MAX4052A,

MAX4053A

= +25°C

C, E, M

MAX4051,

MAX4052,

MAX4053

MAX4051A,

MAX4052A,

MAX4053A

= +25°C

C, E

-1

-10

-100

0.002

= +25°C -0.1

0.002

C, E

-5

-100

100

0.1

100

V+

100

125

UNITS

Ω

Ω nA

Low-Voltage, CMOS Analog

Multiplexers/Switches

ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)

(V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, T

= T

MIN to T

MAX

, unless otherwise noted. Typical values are at T

= +25°C.)

PARAMETER

COM Off Leakage

Current (Note 5)

COM On Leakage

Current (Note 5)

SYMBOL

COM(OFF)

COM(ON)

V+ = 5.5V, V- = -5.5V,

= 4.5V,

COM

= -4.5V

V+ = 5.5V, V- = -5.5V,

= -4.5V,

COM

= 4.5V

= V

CONDITIONS

V+ = 5.5V, V- = -5.5V,

= ±4.5V

MAX4051A

MAX4051

MAX4052A,

MAX4053A

MAX4052,

MAX4053

MAX4051A

MAX4051

MAX4052A,

MAX4053A

MAX4052,

MAX4053

MAX4051A

MAX4051

MAX4052A,

MAX4053A

MAX4052,

MAX4053

MIN TYP

(Note 2)

MAX

= +25°C -0.1

0.002

C, E

= +25°C

C, E

-5

-100

-1

-10

0.002

= +25°C

C, E

= +25°C

-100

-0.1

0.002

-2.5

-100

-1 0.002

C, E

-5

-50

= +25°C -0.1

0.002

C, E

-5

-100

= +25°C

C, E

-1

-10

0.002

-100

= +25°C -0.1

0.002

C, E -2.5

= +25°C

C, E

-50

-1

-5

-50

0.002

= +25°C -0.1

0.002

C, E -5

= +25°C

C, E

-100

-1

-10

-100

0.002

= +25°C -0.1

0.002

C, E -2.5

= +25°C

C, E

-50

-1

-5

-50

0.002

0.1

100

0.1

2.5

100

0.1

2.5

100

0.1

100

0.1

100

0.1

2.5

UNITS nA nA

Low-Voltage, CMOS Analog

Multiplexers/Switches

ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)

(V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, T

= T

MIN to T

MAX

, unless otherwise noted. Typical values are at T

= +25°C.)

PARAMETER SYMBOL CONDITIONS

MIN TYP

(Note 2)

MAX

UNITS

DIGITAL I/O

ADD, INH Input Logic

Threshold High

ADD, INH Input Logic

Threshold Low

C, E, M

2.4

0.8

ADD, INH Input Current

Logic High or Low

, I

SWITCH DYNAMIC CHARACTERISTICS

ADD

, V

INH

= V+, 0V C, E, M -1 0.03

1 µA

Turn-On Time (Note 6)

Turn-Off Time (Note 6)

Transition Time

Break-Before-Make Delay

Charge Injection (Note 6) t t t t

OFF

TRANS

OPEN

Figure 3

Figure 2

Figure 4

= 1nF, R

Figure 5

= 0

Ω

, V

= 0V,

= +25°C

C, E, M

= +25°C

C, E, M

= +25°C

175

225

150

200

250

10 ns ns ns ns pC

NO Off Capacitance

COM Off Capacitance

Switch On Capacitance

Off Isolation

NO(OFF)

COM(OFF)

(ON)

ISO

= GND, f = 1MHz, Figure 7

COM

= GND, f = 1MHz, Figure 7

COM

= V

Figure 7

= GND, f = 1MHz,

= 15pF, R

= 50

Ω

, f = 100kHz,

= 1V

RMS

, Figure 6

= 15pF, R

= 50

Ω

, f = 100kHz,

= 1V

RMS

, Figure 6

= +25°C

<-90 pF pF pF dB

Channel-to-Channel

Crosstalk

POWER SUPPLY

Power-Supply Range

= +25°C <-90 dB

V+ Supply Current

V- Supply Current

V+, V-

I+

I-

INH = ADD = 0V or V+

C, E, M

= +25°C

±2.7

-1

C, E, M

= +25°C -1

C, E, M -10

0.1

±8

Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.

Note 3:

∆

= R

ON(MAX)

- R

ON(MIN)

Note 4: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges; i.e., V

= 3V to 0V and 0V to -3V.

Note 5: Leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at

= +25°C.

Note 6: Guaranteed by design, not production tested.

µA

Low-Voltage, CMOS Analog

Multiplexers/Switches

ELECTRICAL CHARACTERISTICS—Single +5V Supply

(V+ = +4.5V to +5.5V, V- = 0V, T

= T

MIN to T

MAX

, unless otherwise noted. Typical values are at T

= +25°C.)

CONDITIONS

MIN TYP

(Note 2)

MAX

PARAMETER

ANALOG SWITCH

Analog Signal Range

COM–NO On-Resistance

SYMBOL

COM

, V

NO Off Leakage Current

(Note 5)

COM Off Leakage

Current (Note 5)

COM On Leakage

Current (Note 5)

NO(OFF)

COM(OFF)

COM(ON)

V+ = 5V, I

COM

= 3.5V

= 1mA,

V+ = 5.5V, V

COM

= 0V

= 4.5V,

V+ = 5.5V, V

= 4.5V

V+ = 5.5V, V

= 4.5V,

COM

= 0V

V+ = 5.5V, V

= 4.5V or 0V

V+ = 5.5V,

COM

= V

= 0V,

= 4.5V

MAX4051/A

MAX4052/A,

MAX4053/A

MAX4051/A

MAX4052/A,

MAX4053/A

MAX4051/A

MAX4052/A,

MAX4053/A

C, E, M

= +25°C

C, E, M

V-

= +25°C -1

C, E -10

= +25°C

C, E

-100

-1

-10

-100

= +25°C -1

C, E -10

= +25°C

C, E

-100

-1

-5

M -50

= +25°C -1

C, E

= +25°C

C, E

-10

-100

-1

= +25°C

-5

-50

-1

C, E

-10

-100

= +25°C -1

C, E -10

M -100

125

0.002

V+

225

280

100

DIGITAL I/O

ADD, INH Input Logic

Threshold High

ADD, INH Input Logic

Threshold Low

ADD, INH Input Current

Logic High or Low

POWER SUPPLY

V+ Supply Current

IH,

I+

ADD,

INH

= V+, 0V

INH = ADD = 0V or V+

C, E, M

2.4

-1

= +25°C -1

C, E, M

0.03

0.8

UNITS

Ω nA nA nA

µA

Low-Voltage, CMOS Analog

Multiplexers/Switches

ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)

(V+ = +4.5V to +5.5V, V- = 0V, T

= T

MIN to T

MAX

, unless otherwise noted. Typical values are at T

= +25°C.)

PARAMETER SYMBOL CONDITIONS

MIN TYP

(Note 2)

MAX

UNITS

Turn-On Time (Note 6)

Turn-Off Time (Note 6) t t

OFF

Figure 3

= +25°C

C, E, M

= +25°C

C, E, M

= +25°C

200

275

125

175 ns ns

Break-Before-Make Delay

Charge Injection (Note 6)

Off Isolation t

OPEN

ISO

Figure 4

= 1nF, R

Figure 5

= 0

Ω

, V

= 0V,

= 15pF, R

= 50

Ω

, f = 100kHz,

= 1V

RMS

, Figure 6

= 15pF, R

= 50

Ω

, f = 100kHz,

= 1V

RMS

, Figure 6

= +25°C

<-90

10 ns pC dB

Channel-to-Channel

Crosstalk

= +25°C <-90

Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.

Note 3:

∆

= R

ON(MAX)

- R

ON(MIN)

Note 4: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges; i.e., V

= 3V to 0V and 0V to -3V.

Note 5: Leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at

= +25°C.

Note 6: Guaranteed by design, not production tested.

Low-Voltage, CMOS Analog

Multiplexers/Switches

ELECTRICAL CHARACTERISTICS—Single +3V Supply

(V+ = +3.0V to +3.6V, V- = 0V, T

= T

MIN to T

MAX

, unless otherwise noted. Typical values are at T

= +25°C.)

PARAMETER

ANALOG SWITCH

Analog Signal Range

COM–NO On-Resistance

SYMBOL

COM

, V

CONDITIONS

= 1mA, V+ = 3V,

COM

= 1.5V

NO Off Leakage Current

(Note 5)

COM Off Leakage

Current (Note 5)

COM On Leakage

Current (Note 5)

NO(OFF)

COM(OFF)

COM(ON)

V+ = 3.6V, V

COM

= 3V

V+ = 3.6V, V

COM

= 0V

= 3V

V+ = 3.6V,

= V

= 3V,

= 0V,

= 3V,

= 0V,

= 3V

MAX4051/A

MAX4052/A,

MAX4053/A

MAX4051/A

MAX4052/A,

MAX4053/A

MAX4051/A

MAX4052/A,

MAX4053/A

MIN

C, E, M V-

= +25°C

C, E, M

= +25°C

C, E

-1

-10

-100

= +25°C

C, E

-1

-10

-100

= +25°C -1

C, E -10

= +25°C

C, E

-100

-1

-5

-50

= +25°C -1

C, E -10

= +25°C

C, E

-100

-1

-5

-50

= +25°C

C, E

= +25°C

C, E

-1

-10

-100

-1

-10

-100

TYP

(Note 2)

250

0.002

MAX

100

V+

525

700

100

DIGITAL I/O

ADD, INH Input Logic

Threshold High

ADD, INH Input Logic

Threshold Low

ADD, INH Input Current

Logic High or Low

POWER SUPPLY

V+ Supply Current

IH,

I+

ADD,

INH

= V+, 0V

INH = ADD = 0V or V+

C, E, M

= +25°C

C, E, M

2.4

-1

0.03

0.8

UNITS

Ω nA nA nA nA

µA nA

µA

Low-Voltage, CMOS Analog

Multiplexers/Switches

ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)

(V+ = +3.0V to +3.6V, V- = 0V, T

= T

MIN to T

MAX

, unless otherwise noted. Typical values are at T

= +25°C.)

PARAMETER SYMBOL CONDITIONS

MIN TYP

(Note 2)

MAX

UNITS

Turn-On Time (Note 6)

Turn-Off Time (Note 6) t t

OFF

Figure 3

= +25°C

C, E, M

= +25°C

C, E, M

= +25°C

180

100

600

700

300

400 ns ns

Break-Before-Make Delay

Charge Injection (Note 6)

Off Isolation t

OPEN

ISO

Figure 4

= 1nF, R

Figure 5

= 0

Ω

, V

= 0V,

= 15pF, R

= 50

Ω

, f = 100kHz,

= 1V

RMS

, Figure 6

= 15pF, R

= 50

Ω

, f = 100kHz,

= 1V

RMS

, Figure 6

= +25°C

<-90

10 ns pC dB

Channel-to-Channel

Crosstalk

= +25°C <-90

Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.

Note 3:

∆

= R

ON(MAX)

- R

ON(MIN)

Note 4: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges; i.e., V

= 3V to 0V and 0V to -3V.

Note 5: Leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at

= +25°C.

Note 6: Guaranteed by design, not production tested.

Low-Voltage, CMOS Analog

Multiplexers/Switches

__________________________________________Typical Operating Characteristics

(V+ = +5V, V- = -5V, GND = 0V, T

= +25°C, unless otherwise noted.)

110

100

ON-RESISTANCE vs. V

COM

(DUAL SUPPLIES)

V± = ±3V

V± = ±5V

-5 -4 -3 -2 -1 0 1

COM

(V)

2 3

ON-RESISTANCE vs. V

COM

AND TEMPERATURE

(SINGLE SUPPLY)

180

160

V+ = 5V

V- = 0V

= +125°C

140

= +85°C

120

100

= +25°C

110

100

1000

100

ON-RESISTANCE vs. V

COM

AND TEMPERATURE

(DUAL SUPPLIES)

V+ = 5V

V- = -5V

V+ = 5.5V

V- = -5.5V

= +125°C

= +85°C

= +25°C

= -55°C

-5 -4 -3 -2 -1 0

COM

(V)

1 2 3 4 5

OFF-LEAKAGE vs.

TEMPERATURE

300

275

150

125

100

250

225

200

175

V- = 0V

ON-RESISTANCE vs. V

COM

(SINGLE SUPPLY)

V+ = 3V

COM

(V)

V+ = 5V

10,000

1000

100

V+ = 5.5V

V- = -5.5V

ON-LEAKAGE vs.

TEMPERATURE

= -55°C

0 1

COM

(V)

3 4 5

CHARGE INJECTION vs. V

0.1

-50 -25

COM

0 25 50 75

TEMPERATURE (

100 125

0.1

-50 -25

SUPPLY CURRENT vs.

TEMPERATURE

V+ = 5V

V- = -5V

= V

= 0V, 5V

0 25 50 75

TEMPERATURE (

100 125

V+ = 5V

V- = 0V

I+

0 1

I-

V+ = 5V

V- = -5V

-5

-5 -4 -3 -2 -1 0 1

COM

(V)

2 3 4 5

0.1

-50 -25 0 25 50 75

TEMPERATURE (

100 125

Low-Voltage, CMOS Analog

Multiplexers/Switches

____________________________Typical Operating Characteristics (continued)

(V+ = +5V, V- = -5V, GND = 0V, T

= +25°C, unless otherwise noted.)

-10

-20

FREQUENCY RESPONSE

INSERTION LOSS

-5

-10

TOTAL HARMONIC DISTORTION vs. FREQUENCY

100

V± = ±5V

600

Ω

IN AND OUT

-30

-40

-50

OFF ISOLATION

-15

-20

-60 -25

0.1

-70 -30

ON PHASE

-80 -35

Ω

IN/OUT

-90

0.01

0.1

1 10 100 300

-40 0.01

10 100 1k 10k

FREQUENCY (MHz) FREQUENCY (Hz)

_____________________________________________________________Pin Descriptions

MAX4051/

MAX4051A

13, 1, 15, 2,

14, 5, 12, 4

—

PIN

MAX4052/

MAX4052A

—

1, 2, 5, 4

—

12, 15, 14, 11

—

MAX4053/

MAX4053A

—

NAME

NO0–NO7

COM

NO0B–NO3B

COMB

NOB

NCB

NOA

NCA

INH

V-

GND

ADDA

ADDB

ADDC

NO0A–NO3A

COMA

NCC

NOC

COMC

V+

Analog Switch Inputs 0–7

FUNCTION

Analog Switch Common

Analog Switch “B” Inputs 0–3

Analog Switch “B” Common

Analog Switch “B” Normally Open Input

Analog Switch “B” Normally Closed Input

Analog Switch “A” Normally Open Input

Analog Switch “A” Normally Closed Input

Digital Inhibit Input. Normally connect to GND. Can be driven to logic high to set all switches off.

Negative Analog Supply Voltage Input. Connect to GND for single-supply operation.

Ground. Connect to digital ground. (Analog signals have no ground reference; they are limited to V+ and V-.)

Digital Address “A” Input

Digital Address “B” Input

Digital Address “C” Input

Analog Switch “A” Inputs 0–3

Analog Switch “A” Common

Analog Switch “C” Normally Closed Input

Analog Switch “C” Normally Open Input

Analog Switch “C” Common

Positive Analog and Digital Supply Voltage Input

Note: NO, NC, and COM pins are identical and interchangeable. Any may be considered an input or output; signals pass equally well in both directions.

Low-Voltage, CMOS Analog

Multiplexers/Switches

Table 1. Truth Table/Switch Programming

INH

ADDC*

ADDRESS BITS

ADDB

ADDA

MAX4051/

MAX4051A

All switches open

COM–NO0

COM–NO1

COM–NO2

COM–NO3

COM–NO4

COM–NO5

COM–NO6

COM–NO7

ON SWITCHES

MAX4052/

MAX4052A

All switches open

COMB–NO0B,

COMC–NO0C

COMB–NO1B,

COMC–NO1C

COMB–NO2B,

COMC–NO2C

COMB–NO3B,

COMC–NO3C

COMB–NO0B,

COMC–NO0C

COMB–NO1B,

COMC–NO1C

COMB–NO2B,

COMC–NO2C

COMB–NO3B,

COMC–NO3C

MAX4053/

MAX4053A

All switches open

COMA–NCA,

COMB–NCB,

COMC–NCC

COMA–NOA,

COMB–NCB,

COMC–NCC

COMA–NCA,

COMB–NOB,

COMC–NCC

COMA–NOA,

COMB–NOB,

COMC–NCC

COMA–NCA,

COMB–NCB,

COMC–NOC

COMA–NOA,

COMB–NCB,

COMC–NOC

COMA–NCA,

COMB–NOB,

COMC–NOC

COMA–NOA,

COMB–NOB,

COMC–NOC

X = Don’t care * ADDC not present on MAX4052.

Note: NO and COM pins are identical and interchangeable. Either may be considered an input or output; signals pass equally well in either direction.

__________Applications Information

Power-Supply Considerations

Overview

The MAX4051/MAX4052/MAX4053 and MAX4051A/

MAX4052A/MAX4053A construction is typical of most

CMOS analog switches. They have three supply pins:

V+, V-, and GND. V+ and V- are used to drive the internal CMOS switches and set the limits of the analog voltage on any switch. Reverse ESD-protection diodes are internally connected between each analog signal pin and both V+ and V-. If any analog signal exceeds V+ or

V-, one of these diodes will conduct. During normal operation, these (and other) reverse-biased ESD diodes leak, forming the only current drawn from V+ or V-.

Virtually all the analog leakage current comes from the

ESD diodes. Although the ESD diodes on a given signal pin are identical, and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog signal path leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of either the same or opposite polarity.

There is no connection between the analog signal paths and GND.

Low-Voltage, CMOS Analog

Multiplexers/Switches

V+ and GND power the internal logic and logic-level translators, and set both the input and output logic limits. The logic-level translators convert the logic levels into switched V+ and V- signals to drive the gates of the analog signals. This drive signal is the only connection between the logic supplies (and signals) and the analog supplies. V+ and V- have ESD-protection diodes to GND.

The logic-level thresholds are TTL/CMOS compatible when V+ is +5V. As V+ rises, the threshold increases slightly, so when V+ reaches +12V, the threshold is about 3.1V; above the TTL-guaranteed high-level minimum of 2.8V, but still compatible with CMOS outputs.

Bipolar Supplies

These devices operate with bipolar supplies between

±3.0V and ±8V. The V+ and V- supplies need not be symmetrical, but their sum cannot exceed the absolute maximum rating of +17V.

Single Supply

These devices operate from a single supply between

+3V and +16V when V- is connected to GND. All of the bipolar precautions must be observed. At room temperature, they actually “work” with a single supply at near or below +1.7V, although as supply voltage decreases, switch on-resistance and switching times become very high.

Overvoltage Protection

Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum ratings, because stresses beyond the listed ratings can cause permanent damage to the devices.

Always sequence V+ on first, then V-, followed by the logic inputs (NO) and by COM. If power-supply sequencing is not possible, add two small signal diodes

(D1, D2) in series with the supply pins for overvoltage protection (Figure 1).

Adding diodes reduces the analog signal range to one diode drop below V+ and one diode drop above V-, but does not affect the devices’ low switch resistance and low leakage characteristics. Device operation is unchanged, and the difference between V+ and Vshould not exceed 17V. These protection diodes are not recommended when using a single supply if signal levels must extend to ground.

EXTERNAL BLOCKING DIODE

V+

COM

EXTERNAL BLOCKING DIODE

V+

V-

MAX4051/A

MAX4052/A

MAX4053/A

* INTERNAL PROTECTION DIODES

Figure 1. Overvoltage Protection Using External Blocking

Diodes

High-Frequency Performance

In 50

Ω systems, signal response is reasonably flat up to 50MHz (see Typical Operating Characteristics).

Above 20MHz, the on response has several minor peaks which are highly layout dependent. The problem is not turning the switch on, but turning it off. The offstate switch acts like a capacitor, and passes higher frequencies with less attenuation. At 10MHz, off isolation is about -45dB in 50

Ω systems, becoming worse

(approximately 20dB per decade) as frequency increases. Higher circuit impedances also make off isolation worse. Adjacent channel attenuation is about 3dB above that of a bare IC socket, and is entirely due to capacitive coupling.

Low-Voltage, CMOS Analog

Multiplexers/Switches

______________________________________________Test Circuits/Timing Diagrams

ADD

Ω

V+

ADDC

ADDB

ADDA

V+

NO0

NO1–NO6

INH

MAX4051/A

GND

NO7

V-

COM

300

Ω

V-

V+

V-

ADD

Ω

ADDC

ADDB

V+

NO0

NO1–NO2

V+

INH

MAX4052/A

GND

NO3

V-

COM

300 Ω

V-

ADD

V+

V-

35pF

OUT

35pF

OUT

ADD

V+

NO0

OUT

NO7 t

TRANS

ADD

V+

NO0

OUT

NO3 t

TRANS

Ω

INH

MAX4053/A

GND

V-

COM

300 Ω

V-

V+

35pF

OUT

ADD

V+

OUT

NO t

TRANS

50%

90%

90% t

TRANS t

TRANS

V- = 0V FOR SINGLE-SUPPLY OPERATION.

REPEAT TEST FOR EACH SECTION.

Figure 2. Address Transition Time

Low-Voltage, CMOS Analog

Multiplexers/Switches

V+

INH

50 Ω

V+

ADDC

ADDB

ADDA

NO0

NO1–NO7

INH

MAX4051/A

GND V-

COM

300 Ω

V-

V+

ADDC

ADDB

V+

NO0

NO1–NO3

INH

50 Ω

INH

MAX4052/A

GND V-

COM

300

Ω

V-

V+

35pF

OUT

35pF

OUT

ADD

V+

NO V+

INH

Ω

INH

MAX4053/A

GND

V-

COM

300

Ω

V-

35pF

OUT

INH

V+

NO0

OUT

0V t

50%

90%

INH

V+

NO0

50%

OUT

0V t

INH

V+

NO_

50%

90%

OUT

0V t

90%

90% t

OFF t

OFF

V- = 0V FOR SINGLE-SUPPLY OPERATION.

REPEAT TEST FOR EACH SECTION.

Figure 3. Enable Switching Time

VADD

Ω

VADD

V+

ADDC

ADDB

ADDA

V+

NO0–N07

INH

MAX4051/A

GND V-

COM

300 Ω

V-

V+

ADD

V+

NO, NC

V+

35pF

VOUT

50 Ω

INH

MAX4053/A

GND V-

COM

300 Ω

V-

V- = 0V FOR SINGLE-SUPPLY OPERATION.

REPEAT TEST FOR EACH SECTION.

Figure 4. Break-Before-Make Interval

35pF

VOUT

Low-Voltage, CMOS Analog

Multiplexers/Switches

ADD

V+

NO_

VADD

ADDC

ADDB

50 Ω

V+

NO0–NO3

INH

MAX4052/A

GND V-

COM

300

Ω

V-

V+

50% t

< 20ns t

< 20ns

35pF

VOUT

80%

OUT

0V t

OPEN

CHANNEL

SELECT

VINH

V+

ADDC

ADDB

ADDA

INH

MAX4051/A

MAX4052/A

MAX4053/A

COM

GND V-

Ω

V-

V- = 0V FOR SINGLE-SUPPLY OPERATION.

REPEAT TEST FOR EACH SECTION.

VNO = 0V

VOUT

CL = 1000pF

Figure 5. Charge Injection

INH

V+

VOUT

∆ VOUT

∆

VOUT IS THE MEASURED VOLTAGE DUE TO CHARGE

TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF.

Q = ∆ VOUT X CL

Low-Voltage, CMOS Analog

Multiplexers/Switches

CHANNEL

SELECT

ADDC

V+

ADDB

ADDA

MAX4051/A

MAX4052/A

MAX4053/A

INH

V+

GND

10nF

V-

COM

VIN

VOUT

50 Ω

MEAS.

NETWORK

ANALYZER

50 Ω

REF.

OFF ISOLATION = 20log

VOUT

VIN

ON LOSS = 20log

VOUT

VIN

CROSSTALK = 20log

VOUT

VIN

Ω

10nF

V-

MEASUREMENTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS.

OFF ISOLATION IS MEASURED BETWEEN COM AND "OFF" NO TERMINAL ON EACH SWITCH.

ON LOSS IS MEASURED BETWEEN COM AND "ON" NO TERMINAL ON EACH SWITCH.

CROSSTALK (MAX4052 AND MAX4053) IS MEASURED FROM ONE CHANNEL (A, B, C) TO ALL OTHER CHANNELS.

SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.

Figure 6. Off Isolation, On Loss, and Crosstalk

CHANNEL

SELECT

V+

ADDC

ADDB

ADDA

INH

MAX4051/A

MAX4052/A

MAX4053/A

COM

GND V-

V-

Figure 7. NO/COM Capacitance

1MHz

CAPACITANCE

ANALYZER

Low-Voltage, CMOS Analog

Multiplexers/Switches

___________________________________________Ordering Information (continued)

PART

MAX4051AEPE

MAX4051AESE

MAX4051AEEE

MAX4051AMJE

MAX4051 CPE

MAX4051CSE

MAX4051CEE

MAX4051C/D

MAX4051EPE

MAX4051ESE

MAX4051EEE

MAX4051MJE

MAX4052A CPE

MAX4052ACSE

MAX4052ACEE

MAX4052AEPE

MAX4052AESE

MAX4052AEEE

MAX4052AMJE

MAX4052 CPE

MAX4052CSE

MAX4052CEE

MAX4052C/D

MAX4052EPE

MAX4052ESE

MAX4052EEE

MAX4052MJE

TEMP. RANGE

-40°C to +85°C

-55°C to +125°C

0°C to +70°C

-40°C to +85°C

-55°C to +125°C

0°C to +70°C

-40°C to +85°C

-55°C to +125°C

0°C to +70°C

-40°C to +85°C

-55°C to +125°C

PIN-PACKAGE

16 Plastic DIP

16 Narrow SO

16 QSOP

16 CERDIP**

16 Plastic DIP

16 Narrow SO

16 QSOP

Dice*

16 Plastic DIP

16 Narrow SO

16 QSOP

16 CERDIP**

16 Plastic DIP

16 Narrow SO

16 QSOP

16 Plastic DIP

16 Narrow SO

16 QSOP

16 CERDIP**

16 Plastic DIP

16 Narrow SO

16 QSOP

Dice*

16 Plastic DIP

16 Narrow SO

16 QSOP

16 CERDIP**

PART

MAX4053A CPE

MAX4053ACSE

MAX4053ACEE

MAX4053AEPE

MAX4053AESE

MAX4053AEEE

MAX4053AMJE

MAX4053 CPE

MAX4053CSE

MAX4053CEE

MAX4053C/D

TEMP. RANGE

0°C to +70°C

-40°C to +85°C

-55°C to +125°C

0°C to +70°C

MAX4053EPE

MAX4053ESE

-40°C to +85°C

MAX4053EEE

MAX4053MJE

-40°C to +85°C

-55°C to +125°C

* Contact factory for dice specifications.

** Contact factory for availability.

PIN-PACKAGE

16 Plastic DIP

16 Narrow SO

16 QSOP

16 Plastic DIP

16 Narrow SO

16 QSOP

16 CERDIP**

16 Plastic DIP

16 Narrow SO

16 QSOP

Dice*

16 Plastic DIP

16 Narrow SO

16 QSOP

16 CERDIP**

___________________Chip Topography

COM

NO7

NO6

MAX4051/A

NO4 V+

NO2

NO1

N.C.

NO5

INH

NO0

0.108"

(2.74mm)

NO3

ADDA

VADDC

GND ADDB

0.080"

(2.03mm)

N.C. = NO CONNECT

TRANSISTOR COUNT: 161

SUBSTRATE CONNECTED TO V+.

Low-Voltage, CMOS Analog

Multiplexers/Switches

_____________________________________________Chip Topographies (continued)

MAX4052/A MAX4053/A

NO2C NO0C V+ NCB NOB V+

NO2B COMB

COMC

NO3C

N.C.

NO1C

INH

NO1B

COMB

NO0B

0.108"

(2.74mm)

NO3B

ADDB

N.C.

NOC

COMC

NCC

INH

N.C.

COMA

NOA

0.108"

(2.74mm)

NCA

ADDA

V-

GND

N.C.

ADDC

0.080"

(2.03mm)

N.C. = NO CONNECT

TRANSISTOR COUNT: 161

SUBSTRATE CONNECTED TO V+.

VADDC

GND

0.080"

ADDB

(2.03mm)

N.C. = NO CONNECT

TRANSISTOR COUNT: 161

SUBSTRATE CONNECTED TO V+.

Low-Voltage, CMOS Analog

Multiplexers/Switches

________________________________________________________Package Information

A1 e

0.101mm

0.004in.

0° - 15° eA eB

Plastic DIP

PLASTIC

DUAL-IN-LINE

PACKAGE

(0.300 in.)

E1 e

C eA eB

DIM

–

INCHES

MIN

–

0.015

0.125

0.055

0.016

0.045

0.008

0.005

0.300

0.240

0.100

0.300

0.115

MAX

0.200

–

0.175

0.080

0.022

0.065

0.012

0.080

0.325

0.310

–

0.400

0.150

PKG.

DIM

PINS

INCHES

MIN

0.348

MAX

0.390

0.735

0.745

0.885

1.015

0.765

0.915

1.045

1.14

1.265

MILLIMETERS

MIN

–

0.38

MAX

5.08

–

3.18

1.40

0.41

1.14

0.20

0.13

7.62

6.10

2.54

7.62

–

2.92

3.81

4.45

2.03

0.56

1.65

0.30

2.03

8.26

7.87

–

10.16

MILLIMETERS

MIN

8.84

MAX

9.91

18.67

18.92

22.48

25.78

19.43

23.24

26.54

28.96

32.13

21-0043A

0°-8°

DIM

E e

INCHES

MIN

0.053

MAX

0.069

0.004

0.014

0.007

0.150

0.050

0.010

0.019

0.010

0.157

0.228

0.016

0.244

0.050

MILLIMETERS

MIN

1.35

MAX

1.75

0.10

0.35

0.19

3.80

0.25

0.49

0.25

4.00

1.27

5.80

0.40

6.20

1.27

E H

Narrow SO

SMALL-OUTLINE

PACKAGE

(0.150 in.)

DIM

PINS

INCHES

MIN

0.189

0.337

0.386

MAX

0.197

0.344

0.394

MILLIMETERS

MIN

4.80

8.55

9.80

MAX

5.00

8.75

10.00

21-0041A

Low-Voltage, CMOS Analog

Multiplexers/Switches

_________________________________________Packaging Information (continued)

E H

E e

H h

DIM

INCHES

MIN

0.061

MAX

0.068

0.004

0.055

0.008

0.0075

0.0098

0.061

0.012

0.0098

MILLIMETERS

MIN

1.55

0.127

1.40

0.20

0.19

MAX

1.73

0.25

1.55

0.31

0.25

0.150

SEE VARIATIONS

0.157

0.25 BSC

3.81

3.99

0.635 BSC

0.230

0.010

0.016

0°

0.244

0.016

0.035

5.84

0.25

0.41

SEE VARIATIONS

8° 0°

6.20

0.41

0.89

8°

DIM

PINS

INCHES

MIN

0.189

MAX

0.196

0.0020

0.337

0.0500

0.337

0.0070

0.344

0.0550

0.344

0.0250

0.0300

0.386

0.0250

0.393

0.0300

MILLIMETERS

MIN

4.80

MAX

4.98

0.05

8.56

1.27

8.56

0.64

0.18

8.74

1.40

8.74

0.76

9.80

0.64

9.98

0.76

21-0055A h x 45°

QSOP

QUARTER

SMALL-OUTLINE

PACKAGE

www.fairchildsemi.com

FSDM07652RB

Green Mode Fairchild Power Switch (FPS

)

Features

• Internal Avalanche Rugged Sense FET

• Advanced Burst-Mode operation consumes under 1 W at

240VAC & 0.5W load

• Precision Fixed Operating Frequency (66kHz)

• Internal Start-up Circuit

• Improved Pulse by Pulse Current Limiting

• Over Voltage Protection (OVP)

• Over Load Protection (OLP)

• Internal Thermal Shutdown Function (TSD)

• Auto-Restart Mode

• Under Voltage Lock Out (UVLO) with hysteresis

• Low Operating Current (2.5mA)

• Built-in Soft Start

Application

• SMPS for LCD monitor and STB

• Adaptor

Description

The FSDM07652RB is an integrated Pulse Width Modulator

(PWM) and Sense FET specifically designed for high performance offline Switch Mode Power Supplies (SMPS) with minimal external components. This device is an integrated high voltage power switching regulator which combine an avalanche rugged Sense FET with a current mode PWM control block. The PWM controller includes integrated fixed frequency oscillator, under voltage lockout, leading edge blanking

(LEB), optimized gate driver, internal soft start, temperature compensated precise current sources for a loop compensation and self protection circuitry. Compared with discrete MOS-

FET and PWM controller solution, it can reduce total cost, component count, size and weight simultaneously increasing efficiency, productivity, and system reliability. This device is a basic platform well suited for cost effective designs of flyback converters.

PRODUCT

OUTPUT POWER TABLE

230VAC

15%

(3)

85-265VAC

Adapter

(1)

Open

Frame

(2)

Adapter

(1)

Open

Frame

(2)

FSDM0565RB

FSDM07652RB

60W

70W

80W

50W

60W

70W

Table 1. Maximum Output Power

Notes:

1. Typical continuous power in a non-ventilated enclosed adapter measured at 50

C ambient.

2. Maximum practical continuous power in an open frame design at 50

C ambient.

3. 230 VAC or 100/115 VAC with doubler.

Typical Circuit

Vstr

PWM

Drain

Vfb Vcc Source

Figure 1. Typical Flyback Application

OUT

FSDM07652RB

Internal Block Diagram

N.C

FB 4

0.5/0.7V

Vcc Vref

I delay

Soft start

8V/12V

2.5R

Vcc

PWM

Vcc good

Vstr

I start

Vref

OSC

S Q

R Q

Vcc

Vovp

TSD

Vcc good

S Q

R Q

Internal

Bias

LEB

Gate driver

Drain

2 GND

Figure 2. Functional Block Diagram of FSDM07652RB

FSDM07652RB

Pin Definitions

Pin Number

Pin Name

Drain

GND

Vcc

Vfb

N.C

Vstr

Pin Function Description

This pin is the high voltage power Sense FET drain. It is designed to drive the transformer directly.

This pin is the control ground and the Sense FET source.

This pin is the positive supply voltage input. During start up, the power is supplied by an internal high voltage current source that is connected to the Vstr pin.

When Vcc reaches 12V, the internal high voltage current source is disabled and the power is supplied from the auxiliary transformer winding.

This pin is internally connected to the inverting input of the PWM comparator.

The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 6.0V, the over load protection is activated resulting in shutdown of the

FPS

This pin is connected directly to the high voltage DC link. At startup, the internal high voltage current source supplies internal bias and charges the external capacitor that is connected to the Vcc pin. Once Vcc reaches 12V, the internal current source is disabled.

Pin Configuration

TO-220F-6L

6.Vstr

5.N.C.

4.Vfb

3.Vcc

2.GND

1.Drain

Figure 3. Pin Configuration (Top View)

FSDM07652RB

Absolute Maximum Ratings

(Ta=25

C, unless otherwise specified)

Parameter

Vstr Max Voltage

Pulsed Drain current (Tc=25

(1)

Continuous Drain Current(Tc=25

Continuous Drain Current(Tc=100

Single pulsed avalanche energy

(2)

Single pulsed avalanche current

(3)

Supply voltage

Input voltage range

Total power dissipation(Tc=25

Operating junction temperature

Operating ambient temperature

Storage temperature range

Symbol

STR

I DM

I D

E AS

V CC

P D (Watt H/S)

T j

T A

T STG

Notes:

1. Repetitive rating: Pulse width limited by maximum junction temperature

2. L=14mH, starting Tj=25

3. L=13uH, starting Tj=25

Thermal Impedance

Parameter

Junction-to-Ambient Thermal

Junction-to-Case Thermal

Symbol

θ

(1)

(2)

Notes:

1. Free standing with no heat-sink under natural convection.

2. Infinite cooling condition - Refer to the SEMI G30-88.

Value

650

4.5

370

-0.3 to V

+150

-25 to +85

-55 to +150

Value

46.40

2.49

Unit

C/W

Unit

A DC

A mJ

FSDM07652RB

Electrical Characteristics

(Ta = 25

C unless otherwise specified)

Sense FET SECTION

Drain source breakdown voltage

Zero gate voltage drain current

Static drain source on resistance

(1)

Output capacitance

Turn on delay time

Rise time

Turn off delay time

Fall time

CONTROL SECTION

Initial frequency

Voltage stability

Temperature stability

(2)

Maximum duty cycle

Minimum duty cycle

Start threshold voltage

Stop threshold voltage

Feedback source current

Soft-start time

Leading Edge Blanking time

BURST MODE SECTION

Burst Mode Voltages

(2)

PROTECTION SECTION

Peak current limit

(4)

Over voltage protection

Thermal shutdown temperature

(2)

Shutdown feedback voltage

Shutdown delay current

Condition Max.

Unit

BV DSS V GS = 0V, I D = 250

V DS = 650V, V GS = 0V

DSS

V DS = 520V

V GS = 0V, T C = 125

R DS(ON) V GS = 10V, I D = 2.5A

C OSS

V GS = 0V, V DS = 25V, f = 1MHz

T D(ON)

D(OFF)

T F

V DD = 325V, I D = 5A

(MOSFET switching time is essentially independent of operating temperature)

650

100

115

1.4

200

1.6

Ω pF ns

F OSC V FB = 3V

STABLE

13V

≤

Vcc

≤

18V

∆

F OSC -25

≤

D MAX -

D MIN

V START

STOP

T S

T LEB

V FB =GND

=GND

Vfb=3

BURH

BURL

Vcc=14V

I OVER

V OVP

I DELAY

V FB =5V, V CC =14V

≥

5.5V

V FB =5V

0.7

0.9

250 kHz

V mA ms ns

±10

1.1

2.2

18 19

130 145

5.5

2.8

0.7

0.5

2.5

6.0

3.5

2.8

160

6.5

4.2

FSDM07652RB

TOTAL DEVICE SECTION

Operating supply current

(5)

I OP V FB =GND, V CC =14V

I OP(MIN) V FB =GND, V CC =10V

OP(MAX)

=GND, V

=18V

Notes:

1. Pulse test : Pulse width

≤

300

S, duty

≤

2. These parameters, although guaranteed at the design, are not tested in mass production.

3. These parameters, although guaranteed, are tested only in EDS(wafer test) process.

4. These parameters indicate the inductor current.

5. This parameter is the current flowing into the control IC.

2.5

5 mA

FSDM07652RB

Comparison Between FS6M07652RTC and FSDM07652RB

Function

Soft-Start

Burst Mode Operation

FS6M07652RTC

Adjustable soft-start time using an external capacitor

• Built into controller

• Output voltage drops to around half

FSDM07652RB FSDM07652RB Advantages

Internal soft-start with typically 10ms (fixed)

• Gradually increasing current limit during soft-start further reduces peak current and voltage component stresses

• Eliminates external components used for soft-start in most applications

• Reduces or eliminates output overshoot

• Built into controller

• Output voltage fixed

• Improve light load efficiency

• Reduces no-load consumption

FSDM07652RB

Typical Performance Characteristics

(These Characteristic Graphs are Normalized at Ta= 25

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

Operating Current vs. Temp

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

Stop Threshold Voltage vs. Temp

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

Maximum Duty vs. Temp

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

Start Threshold Voltage vs. Temp

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

Operating Freqency vs. Temp

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

Feedback Source Current vs. Temp

FSDM07652RB

Typical Performance Characteristics

(Continued)

(These Characteristic Graphs are Normalized at Ta= 25

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

ShutDown Feedback Voltage vs. Temp

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

Over Voltage Protection vs. Temp

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

Burst Mode Disable Voltage vs. Temp

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

ShutDown Delay Current vs. Temp

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

Burst Mode Enable Voltage vs. Temp

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75

Junction Temperature( ℃ )

100 125

Current Limit vs. Temp

FSDM07652RB

Typical Performance Characteristics

(Continued)

(These Characteristic Graphs are Normalized at Ta= 25

1.2

1.0

0.8

0.6

0.4

0.2

0.0

-50 -25 0 25 50 75 100 125

Junction Temperature( ℃ )

Soft Start Time vs. Temp

FSDM07652RB

Functional Description

1. Startup : In previous generations of Fairchild Power

Switches (FPS

) the Vcc pin had an external start-up resistor to the DC input voltage line. In this generation the startup resistor is replaced by an internal high voltage current source. At startup, an internal high voltage current source supplies the internal bias and charges the external capacitor

(C vcc ) that is connected to the Vcc pin as illustrated in

Figure 4. When Vcc reaches 12V, the FSDM07652RB begins switching and the internal high voltage current source is disabled. Then, the FSDM07652RB continues its normal switching operation and the power is supplied from the auxiliary transformer winding unless Vcc goes below the stop voltage of 8V.

Vcc

2.1 Pulse-by-pulse current limit : Because current mode control is employed, the peak current through the Sense FET is limited by the inverting input of PWM comparator (Vfb*) as shown in Figure 5. Assuming that the 0.9mA current source flows only through the internal resistor (2.5R +R= 2.8

Ω

), the cathode voltage of diode D2 is about 2.5V. Since D1 is blocked when the feedback voltage (Vfb) exceeds 2.5V, the maximum voltage of the cathode of D2 is clamped at this voltage, thus clamping Vfb*. Therefore, the peak value of the current through the Sense FET is limited.

2.2 Leading edge blanking (LEB) : At the instant the internal Sense FET is turned on, there usually exists a high current spike through the Sense FET, caused by primary-side capacitance and secondary-side rectifier reverse recovery.

Excessive voltage across the Rsense resistor would lead to incorrect feedback operation in the current mode PWM control. To counter this effect, the FSDM07652RB employs a leading edge blanking (LEB) circuit. This circuit inhibits the PWM comparator for a short time (T

LEB

) after the Sense

FET is turned on.

Vcc

8V/12V Vcc good

Vstr

I start

Vref

Internal

Bias

Figure 4. Internal startup circuit

H11A817A

Vfb

Vcc

I delay

Vref

KA431

2.5R

OSC

V fb

Gate driver

SenseFET

OLP R sense

Figure 5. Pulse width modulation (PWM) circuit

2. Feedback Control : FSDM07652RB employs current mode control, as shown in Figure 5. An opto-coupler (such as the H11A817A) and shunt regulator (such as the KA431) are typically used to implement the feedback network.

Comparing the feedback voltage with the voltage across the

Rsense resistor plus an offset voltage makes it possible to control the switching duty cycle. When the reference pin voltage of the KA431 exceeds the internal reference voltage of 2.5V, the H11A817A LED current increases, thus pulling down the feedback voltage and reducing the duty cycle. This event typically happens when the input voltage is increased or the output load is decreased.

3. Protection Circuit : The FSDM07652RB has several self protective functions such as over load protection (OLP), over voltage protection (OVP) and thermal shutdown (TSD).

Because these protection circuits are fully integrated into the

IC without external components, the reliability can be improved without increasing cost. Once the fault condition occurs, switching is terminated and the Sense FET remains off. This causes Vcc to fall. When Vcc reaches the UVLO stop voltage, 8V, the protection is reset and the internal high voltage current source charges the Vcc capacitor via the Vstr pin. When Vcc reaches the UVLO start voltage,12V, the

FSDM07652RB resumes its normal operation. In this manner, the auto-restart can alternately enable and disable the switching of the power Sense FET until the fault condition is eliminated (see Figure 6).

FSDM07652RB

Vds

Power on

Fault occurs

Fault removed

Vcc

1 2

= Cfb * (6.0-2.5) / I

12V

Figure 7. Over load protection tttt t

Normal operation

Fault situation

Figure 6. Auto restart operation

Normal operation

3.1 Over Load Protection (OLP) : Overload is defined as the load current exceeding a pre-set level due to an unexpected event. In this situation, the protection circuit should be activated in order to protect the SMPS. However, even when the SMPS is in the normal operation, the over load protection circuit can be activated during the load transition. In order to avoid this undesired operation, the over load protection circuit is designed to be activated after a specified time to determine whether it is a transient situation or an overload situation. Because of the pulse-by-pulse current limit capability, the maximum peak current through the Sense FET is limited, and therefore the maximum input power is restricted with a given input voltage. If the output consumes beyond this maximum power, the output voltage

(Vo) decreases below the set voltage. This reduces the current through the opto-coupler LED, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (Vfb). If Vfb exceeds 2.5V, D1 is blocked and the 3.5uA current source starts to charge C B slowly up to

Vcc. In this condition, Vfb continues increasing until it reaches 6V, when the switching operation is terminated as shown in Figure 7. The delay time for shutdown is the time required to charge C B from 2.5V to 6.0V with 3.5uA. In general, a 10 ~ 50 ms delay time is typical for most applications.

3.2 Over voltage Protection (OVP) : If the secondary side feedback circuit were to malfunction or a solder defect caused an open in the feedback path, the current through the opto-coupler transistor becomes almost zero. Then, Vfb climbs up in a similar manner to the over load situation, forcing the preset maximum current to be supplied to the

SMPS until the over load protection is activated. Because more energy than required is provided to the output, the output voltage may exceed the rated voltage before the over load protection is activated, resulting in the breakdown of the devices in the secondary side. In order to prevent this situation, an over voltage protection (OVP) circuit is employed. In general, Vcc is proportional to the output voltage and the FSDM07652RB uses Vcc instead of directly monitoring the output voltage. If V CC exceeds 19V, an OVP circuit is activated resulting in the termination of the switching operation. In order to avoid undesired activation of

OVP during normal operation, Vcc should be designed to be below 19V.

3.3 Thermal Shutdown (TSD) : the thermal shutdown is activated.

The Sense FET and the control IC are built in one package. This makes it easy for the control IC to detect the heat generation from the Sense

FET. When the temperature exceeds approximately 150

4. Soft Start : The FSDM07652RB has an internal soft start circuit that increases PWM comparator inverting input voltage together with the Sense FET current slowly after it starts up. The typical soft start time is 10msec, The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased with the intention of smoothly establishing the required output voltage. It also helps to prevent transformer saturation and reduce the stress on the secondary diode during startup.

Vo set

0.7V

0.5V

Ids

5. Burst operation : In order to minimize power dissipation in standby mode, the FSDM07652RB enters burst mode operation. As the load decreases, the feedback voltage decreases. As shown in Figure 8, the device automatically enters burst mode when the feedback voltage drops below

V BURL (500mV). At this point switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes V BURH (700mV) switching resumes. The feedback voltage then falls and the process repeats. Burst mode operation alternately enables and disables switching of the power Sense FET thereby reducing switching loss in

Standby mode.

Vds

Switching disabled

T1 T2 T3 T4

Figure 8. Waveforms of burst operation time

FSDM07652RB

Typical application circuit

Application

LCD Monitor

Output power

40W

Input voltage

Universal input

(85-265Vac)

Output voltage (Max current)

5V (2.0A)

12V (2.5A)

Features

• High efficiency (>81% at 85Vac input)

• Low zero load power consumption (<300mW at 240Vac input)

• Low standby mode power consumption (<800mW at 240Vac input and 0.3W load)

• Low component count

• Enhanced system reliability through various protection functions

• Internal soft-start (10ms)

Key Design Notes

• Resistors R102 and R105 are employed to prevent start-up at low input voltage

• The delay time for over load protection is designed to be about 50ms with C106 of 47nF. If a faster triggering of OLP is required, C106 can be reduced to 10nF.

1. Schematic

BD101

2KBP06M3N257

C102

220nF

275VAC

LF101

23mH

C103

100uF

400V

R102

30k Ω

R105

40k Ω

C106

47nF

50V

R103

56k Ω

C104

10nF

1kV

D101

UF 4007

FSDM07652RB

Vstr

Drain

Vfb

GND

Vcc

ZD101

22V

C105

22uF

50V

D102

TVR10G

R104

5 Ω

EER3016

D202

MBRF10100

C201

1000uF

25V

D201

MBRF1045

C203

1000uF

10V

C301

4.7nF

RT1

5D-9

R101

560k

Ω

C101

220nF

275VAC

FUSE

250V

L201

L202

C202

1000uF

25V

C204

1000uF

10V

IC301

H11A817A

R201

1k Ω

R202

1.2k

Ω

R203

1.2k

Ω

C205

47nF

R204

5.6k

Ω

IC201

KA431

R205

5.6k

Ω

12V, 2.5A

5V, 2A

FSDM07652RB

2. Transformer Schematic Diagram

EER3016

N p

12V

N a

3.Winding Specification

Pin (s

→

5 f) Wire

0.2

φ ×

Insulation: Polyester Tape t = 0.050mm, 2Layers

Np/2 2

→

1 0.4

φ ×

Insulation: Polyester Tape t = 0.050mm, 2Layers

N 12V 10

→

8 0.3

φ ×

Insulation: Polyester Tape t = 0.050mm, 2Layers

N5V 7

→

6 0.3

φ ×

Insulation: Polyester Tape t = 0.050mm, 2Layers

Np/2 3

→

2 0.4

φ ×

Outer Insulation: Polyester Tape t = 0.050mm, 2Layers

Turns

4.Electrical Characteristics

Pin

1 - 3

Specification

520uH ± 10%

10uH Max

Inductance

Leakage Inductance

5. Core & Bobbin

Core : EER 3016

Bobbin : EER3016

Ae(mm2) : 96

Winding Method

Center Winding

Solenoid Winding

Center Winding

Solenoid Winding

Remarks

100kHz, 1V

2 nd

all short

FSDM07652RB

6.Demo Circuit Part List

Part

F101

RT101

R101

R102

R103

R104

R105

R201

R202

R203

R204

R205

Value

Fuse

2A/250V

NTC

5D-9

560K

30K

56K

40K

1.2K

5.6K

Resistor

Note

1/4W

Part

C301

L201

L202

D101

D102

D201

D202

ZD101

Value

4.7nF

5uH

UF4007

TVR10G

Inductor

MBRF1045

MBRF10100

Zener Diode

Diode

Note

Polyester Film Cap.

Wire 1.2mm

22V

Bridge Diode

BD101 2KBP06M 3N257 Bridge Diode

C103

C104

Capacitor

C101 220nF/275VAC

C102 220nF/275VAC

100uF/400V

Box Capacitor

Electrolytic Capacitor

C105

C106

C201

C202

C203

C204

C205

22uF/50V

47nF/50V

1000uF/25V

1000uF/10V

47nF/50V

Electrolytic Capacitor

Ceramic Capacitor

Electrolytic Capacitor

Ceramic Capacitor

Line Filter

LF101 23mH

IC101 FSDM07652RB

IC201

IC301

KA431(TL431)

H11A817A

Wire 0.4mm

FPS

(5A,650V)

Voltage reference

Opto-coupler

7. Layout

Figure 9. Layout Considerations for FSDM07652RB

Figure 10. Layout Considerations for FSDM07652RB

FSDM07652RB

Package Dimensions

TO-220F-6L(Forming)

Ordering Information

Product Number Package

FSDM07652RBWDTU TO-220F-6L(Forming)

WDTU : Forming Type

Marking Code

DM07652R

BVdss

650V

FSDM07652RB

Rds(on)Max.

1.6

Ω

FSDM07652RB

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER

DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES

OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR

CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.

2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

LP2995

DDR Termination Regulator

General Description

The LP2995 linear regulator is designed to meet the JEDEC

SSTL-2 and SSTL-3 specifications for termination of DDR-

SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A

continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The

LP2995 also incorporates a V

SENSE load regulation and a V

REF pin to provide superior output as a reference for the chipset and DDR DIMMS.

Patents Pending

Features

Low output voltage offset n

Works with +5v, +3.3v and 2.5v rails n

Source and sink current n

Low external component count n

No external resistors required n

Linear topology n

Available in SO-8, PSOP-8 or LLP-16 packages n

Low cost and easy to use

Applications

DDR Termination Voltage n

SSTL-2 n

SSTL-3

Typical Application Circuit

July 2003

20039302

11.Terminal for External Connection & Outline Drawing

TMS

TDI

TDO

TCK

TRST_L

R11 10K

V33

R1 R2 R3 R4

10K 10K 10K 10K

GND

VO_GND

3 E5_SDRAM_A0

E5_SDRAM_A1

E5_SDRAM_A2

E5_SDRAM_A3

E5_SDRAM_A4

E5_SDRAM_A5

E5_SDRAM_A6

E5_SDRAM_A7

E5_SDRAM_A8

E5_SDRAM_A9

E5_SDRAM_A10

E5_SDRAM_A11

E5_SDRAM_A12

E5_SDRAM_A14

E5_SDRAM_A15

E5_SDRAM_CS0

E5_SDRAM_CAS#

E5_SDRAM_RAS#

E5_SDRAM_CLKE

E5_SDRAM_WE#

E5_SDRAM_CLK0

E5_SDRAM_CLK#0

3 E5_SDRAM_CLK1

E5_SDRAM_CLK#1

3,4 VREF

GND

C14

102

SSTL2_VDD

C15

102

C16

102

GND

C51

103

C17

104

C52

104

E5_GPIOx2

E5_GPIOx1

R36

R37

E5_GPIOx3

E5_GPIOx4

R38

R39

E5_GPIOx5

E5_GPIOx6

R40

R41

E5_GPIOx7 R42

AO_D1

AO_D2

11 AO_D3

AO_SCLK

AO_FSYNC

10K

AO_D0

R19

R21

R23

R24

R26

AO_1

AO_2

AO_3

AOSCLK

AOFSYNC

A17

B15

B16

B17

B14

A14

AO_D0

AO_D1

AO_D2

AO_D3

AO_SCLK

AO_FSYNC

27P

GND

13.5MHZ

27P

GND

5 AO_IEC958

11 AO_MCLKO

11 AI_D0

RDS_DATA

1 TP1

R29

E5_GPIOx33

R30

(Input Only)

AOIEC

AOMCLKO

B13

A13

A15

11 AI_SCLK

AI_FSYNC

1 TP2

11 AI_MCLKO

5,9 E5_GPIOx35

R33

R34

E5_GPIOx32

R35

CLKI

CLKX

(Reset_Audio) E5_GPIOx35

E5_GPIO6

AISCLK

AIFSYNC

AIMCLKO

C14

D14

A12

D13

C13

A16

GPIOx[31]

GPIOx[34]

AO_IEC958

AO_MCLKI

AO_MCLKO

AI_D0

AI_D1

GPIOx[33]

GPIO[6]

GPIO[7]

AI_SCLK

AI_FSYNC

AI_MCLKI

AI_MCLKO

GPIOx[32]

CLKI

CLKX

CLKO

BYPASS_PLL

GPIOx[35]

VI_D[9..0]

GND

TCK

TDI

TDO

TMS

TRST_L

VI_D0

VI_D1

VI_D2

VI_D3

VI_D4

VI_D5

VI_D6

VI_D7

VI_D8

VI_D9

B10

C10

B11

C11

D11

D10

B12

C12

D12

A11

TCK

TDI

TDO

TMS

TRST_L

VI_D0

VI_D1

VI_D2

VI_D3

VI_D4

VI_D5

VI_D6

VI_D7

VI_D8

VI_D9

CS[9]-

CS[8]-

DACO

JTAG

CONTROL

9 VI_VSYNC

9 VI_CLK0

VI_VSYNC

VI_CLK0

V33

(SCART_GPIO)

A10

VI_VSYNC0

VI_CLK0

PEC

2nd vin

VI_D0

VI_D1

VI_D2

VI_D3

VI_D4

VI_D5

VI_D6

VI_D7

VI_D8

VI_D9

GPIOx[45]

GPIOx[29]

24-bit vout

VO_D16

VO_D17

VO_D18

VO_D19

VO_D20

VO_D21

VO_D22

VO_D23

20-bit vin

VI_D10

VI_D11

VI_D12

VI_D13

VI_D14

VI_D15

VI_D16

VI_D17

VI_D18

VI_D19

2nd vout

VO_D0

VO_D1

VO_D2

VO_D3

VO_D4

VO_D5

VO_D6

VO_D7

(BIO_PHY_PD)

(VI_AVID)

(MIC_DET)

(MUTE)

(INT_VI)

(/RST_VI)

E5_GPIOx0

E5_GPIOx1

E5_GPIOx2

E5_GPIOx3

E5_GPIOx4

E5_GPIOx5

E5_GPIOx6

E5_GPIOx7

E5_GPIOx0

E5_GPIOx1

E5_GPIOx2

E5_GPIOx3

E5_GPIOx4

E5_GPIOx5

E5_GPIOx6

E5_GPIOx7

VO_D0

VO_D1

VO_D2

VO_D3

VO_D4

VO_D5

VO_D6

VO_D7

GPIOx[0]

GPIOx[1]

GPIOx[2]

GPIOx[3]

GPIOx[4]

GPIOx[5]

GPIOx[6]

GPIOx[7]

GPIOx[8]

GPIOx[9]

GPIOx[10]

GPIOx[11]

GPIOx[12]

GPIOx[13]

GPIOx[14]

GPIOx[15]

GPIOx[30]

10 CVBS

10 Y/G

10 Pb/B

10 Pr/R

V18_E5_DAC_DVDD

GND

CA2

T47u/16

104

V33_E5_DAC_AVDD

104

103

104

VO_CLK

VDENC

SEL 0 1 2

DAC2

Y CPST -

DAC3

C CPST -

Y -

DAC_Dvdd (1.8v)

DAC_Vdd0(3.3v)

DAC_Vdd1(3.3v)

DAC_Dvss

DAC1bar

DAC0bar

POWER

3.3V

GND

USB

G3 G4 H2 H3

C10

103

IN4148

V33_E5_USB

IN4148

VO_GND

GND

C11

10UF/1206

C12

104

1394

ADDR

N1 M1 J4 L1

E5_VDDREF

SDRAM I/F

C18

104

C53

103

E5_SDRAM_DQ[31..0] 3

C19

104

C20

104

C21

104

E5_AVDD E5_VDDX

DATA

C22

104

C23

T47u/16

C24

10UF/1206

SPI

E5.1-BGA-308-A

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

TOP VIEW

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

PADS

3.3V

POWER

CORE

1.8V

J5 K5 E11 E12

E5_VPAD

C54

103

L5 M5 T9 E9 E10 D1

E5_VCORE

C55

104

C56

102

SDRAM

SDR 3.3V

DDR 2.5V

PLL PLL

3.3V

K16 L16 M1

SSTL2_VDD E5_V5BIAS

104

C13

GND

E5_AVDD

E5_VDDX

C4 E4 D3 D2 E2 C3 D4 E3 D1

GND

H9 H1

C33

102

C46

102

GND

DIGITAL

J8 J9 J1

C34

102

C47

102

K8 K9 K10 K11 K12 K13 L8 L9 L10 L11 L12 L13 M8 M9

C35

102

C48

102

C36

103

C49

103

GND

C37

103

C50

104

N9 N1

VREF

R43

E5_VDDREF

VCC

OPEN FOR DW9916

UART1

E5_GPIOx25 12

E5_GPIOx24 12

E5_GPIOx41 12

E5_GPIOx42 12

(RDY_FM)

(ATN_FM)

(FP SCLK)

(FP D_FM)

UART2 IDC

SIO

IRTX1

SPI_MOSI

SPI_MISO

SPI_SCK

SPI_CS2

E5_UART2_TX 5

E5_UART2_RX 5

SDA

SCL

E5_VDDX

6,7,9,11,12

R233

10K

R234

10K

R235

10K

R236

10K

R237

R238

R239

R240

*10K

*1N6263

R10 *0

IR_FMUTE 11,12

D28

D27

D26

D25

D24

D23

D22

D21

D20

WAIT-

DTACK-

D31

D30

D29

D19

D18

D17

D16

D15

D14

D13

D12

D11

D10

SLAVE

RST-

MCONFIG

CS-

RD-

DMAREQ

HINT-

MA[21]

MA[20]

MA[19]

MA[18]

MA[17]

MA[16]

MA[15]

MA[14]

MA[13]

MA[12]

MA[11]

MA[10]

MA[9]

MA[8]

MA[7]

MA[6]

LDS-

UDS-

MASTER

ALE

RST-

MCONFIG

CS0_8BIT

W15

Y11

PCMCIA_IOW-

PCMCIA_IOR-

WR-

U10

V14

V12

OE-

UWE-

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

LWE-

WAIT-

DTACK-

CS5-

CS4-

CS3-

CS2-

CS1-

CS0-

MA[26]

MS[25]

MA[24]

MA[23]

MA[22]

MA[5]

MA[4]

MA[3]

MA[2]

MA[1]

V10

W11

Y10

V11

Y12

W10

W12

Y13

U11

V13

W13

Y14

U12

U13

W14

D15

D14

D13

D12

D11

D10

R20

MCONFIG

/DTACK

R27

R28

E5_GPIO0

E5_GPIO1

E5_GPIO2

E5_GPIO3

E5_GPIO4

E5_GPIO5

R31

R32

/WAIT

/E5_CS2

GPIOx[23]

GPIOx[22]

GPIOx[21]

GPIOx[20]

GPIOx[19]

GPIOx[18]

GPIOx[17]

GPIOx[16]

CD_C2PO

CD_BCK

CD_LRCK

CD_DATA

SBP_FRAME

SBP_ACK

SBP_RD

SBP_REQ

SBP_CLK

SBP_D[7]

SBP_D[6]

SBP_D[5]

SBP_D[4]

SBP_D[3]

SBP_D[2]

SBP_D[1]

SBP_D[0]

AtapiAddr0

AtapiAddr1

AtapiAddr2

AtapiAddr3

AtapiAddr4

ATAPI_DATA15

ATAPI_DATA14

ATAPI_DATA13

ATAPI_DATA12

ATAPI_DATA11

ATAPI_DATA10

ATAPI_DATA9

ATAPI_DATA8

SD_D[7]

SD_D[6]

SD_D[5]

SD_D[4]

SD_D[3]

SD_D[2]

SD_D[1]

SD_D[0]

SD_SECSTART

SD_ERROR

SD_CLK

SD_ACK

SD_RDREQ

SD_WRREQ

ATAPI_DATA7

ATAPI_DATA6

ATAPI_DATA5

ATAPI_DATA4

ATAPI_DATA3

ATAPI_DATA2

ATAPI_DATA1

ATAPI_DATA0

ATAPI_RESET_L

ATAPI_DMAACK_L

ATAPI_DMARQ

ATAPI_IORDY

ATAPI_INTRQ

ATAPI_DIOR_L

ATAPI_DIOW_L

GND

General decoupling cap placement:

Caps with smaller capacitance values to be closer to respective power pins compared to those of larger values. All should be as close as possible.

C25

10UF/1206

C26 C27

10UF/1206

104

C28

104

C29

104

C30

104

C31

104

C32

E5_VPAD

104

GND

C38

10UF/1206

C39 C40

10UF/1206

104

C41

104

C42

104

C43

104

C44

104

C45

E5_VCORE

104

GND

GND GND

C D

CN8

5P1.0

GND

E5_ALE 5,6

/SYS_RST 5,6

GND

/E5_OE 5,6

/E5_UDS 5

E5_GPIO0 12

E5_GPIO1 7

E5_GPIO2 5

E5_GPIO3 11

E5_GPIO4 12

E5_GPIO5 12

/E5_WEL 5,6

/WAIT 5

E5_/DTACK 5

(FP D_HOST)

(/RST_PHY)

(/ETHER_IRQ)

(RST_CS4360)

(AUDIO_SEL0)

(AUDIO_SEL1)

/E5_CS1 5

/E5_CS0 6

HD7

HD6

HD5

HD4

HD3

HD2

HD1

HD0

HD15

HD14

HD13

HD12

HD11

HD10

HD9

HD8

E5_MA22 6

E5_MA5 5,6

E5_MA4 5,6

E5_MA3 5,6

E5_MA2 5,6

E5_MA1 5,6

5,6 HD[15..0]

AtapiAddr0 6

AtapiAddr1 6

AtapiAddr2 6

AtapiAddr3 6

AtapiAddr4 6

ATAPI_DATA15 6

ATAPI_DATA14 6

ATAPI_DATA13 6

ATAPI_DATA12 6

ATAPI_DATA11 6

ATAPI_DATA10 6

ATAPI_DATA9 6

ATAPI_DATA8 6

ATAPI_DATA7 6

ATAPI_DATA6 6

ATAPI_DATA5 6

ATAPI_DATA4 6

ATAPI_DATA3 6

ATAPI_DATA2 6

ATAPI_DATA1 6

ATAPI_DATA0 6

ATAPI_RESET 6

ATAPI_DMAACK_L 6

ATAPI_DMARQ 6

ATAPI_IORDY 6

ATAPI_DIOW_L 6

V33

104

T47u/16

GND

/DTACK

MCONFIG

/E5_CS0

/E5_CS1

/E5_CS2

E5_GPIO0

E5_GPIO1

E5_GPIO2

E5_GPIO3

E5_GPIO4

E5_GPIO5

/WAIT

10K

R12

10K

R13

R14

10K

R15

R16

R18

10K

*10K

10K

R22

R25

10K

V33

E5_UART2_TX

E5_UART2_RX

1 TX1

RX1

3.3V

VCC

601

Title

LSI Logic Corp

E5.1

Size Document Number

Date: Monday, June 07, 2004

HDW-10-310000-1

Sheet 2

V33_E5_USB

E5_VDDX

E5_AVDD

E5_VDDREF

V33_E5_DAC_AVDD

E5_VPAD 2

E5_V5BIAS of 12

Rev

1.8V

V18

E5_VCORE

CA1

T47u/16

104

FB1

601

V18_E5_DAC_DVDD

GND

2.5V

V25

SSTL2_VDD

A B C D

TERMINATION

AT E5.1

E5_SDRAM_DQ[31..0] 2

E5_SDRAM_DQ0

E5_SDRAM_DQ1

E5_SDRAM_DQ2

E5_SDRAM_DQ3

E5_SDRAM_DQ4

E5_SDRAM_DQ5

E5_SDRAM_DQ6

E5_SDRAM_DQ7

E5_SDRAM_DQ8

E5_SDRAM_DQ9

E5_SDRAM_DQ10

E5_SDRAM_DQ11

E5_SDRAM_DQ12

E5_SDRAM_DQ13

E5_SDRAM_DQ14

E5_SDRAM_DQ15

E5_SDRAM_DQ16

E5_SDRAM_DQ17

E5_SDRAM_DQ18

E5_SDRAM_DQ19

E5_SDRAM_DQ20

E5_SDRAM_DQ21

E5_SDRAM_DQ22

E5_SDRAM_DQ23

E5_SDRAM_DQ24

E5_SDRAM_DQ25

E5_SDRAM_DQ26

E5_SDRAM_DQ27

E5_SDRAM_DQ31

E5_SDRAM_DQ28

E5_SDRAM_DQ30

E5_SDRAM_DQ29

RP1

RP3

RP5

RP7

RP9

RP11 51/RP

RP12 51/RP

RP14 51/RP

51/RP

E5_SDRAM_DQM0 2

E5_SDRAM_DQM1 2

E5_SDRAM_DQM2 2

E5_SDRAM_DQM3 2

RP16 22/RP

E5_SDRAM_A1 2

E5_SDRAM_A6 2

E5_SDRAM_A3 2

E5_SDRAM_A15 2

E5_SDRAM_A8 2

E5_SDRAM_A0 2

E5_SDRAM_A4 2

E5_SDRAM_A2 2

E5_SDRAM_A7 2

E5_SDRAM_A14 2

E5_SDRAM_A9 2

E5_SDRAM_A12 2

E5_SDRAM_A11 2

E5_SDRAM_A10 2

E5_SDRAM_A5 2

RP18 22/RP

RP20 22/RP

RP22 22/RP

RP24 22/RP

SDRAM_A1

SDRAM_A6

SDRAM_A3

SDRAM_A15

SDRAM_A8

SDRAM_A0

SDRAM_A4

SDRAM_A2

SDRAM_A7

SDRAM_A14

SDRAM_A9

SDRAM_A12

SDRAM_A11

SDRAM_A10

SDRAM_A5

E5_SDRAM_DQS0 2

E5_SDRAM_DQS1 2

E5_SDRAM_DQS2 2

E5_SDRAM_DQS3 2

R44

R45

R47

R49

E5_SDRAM_CLK0 2

E5_SDRAM_CLK1 2

E5_SDRAM_CLK#0 2

E5_SDRAM_CLK#1 2

R52

R53

R55

R57

E5_SDRAM_RAS# 2

E5_SDRAM_CLKE 2

E5_SDRAM_CAS# 2

E5_SDRAM_WE# 2

RP26

22/RP

E5_SDRAM_CS0 2 R65 22

SDRAM_DQS0

SDRAM_DQS1

SDRAM_DQS2

SDRAM_DQS3

SDRAM_CLK0

SDRAM_CLK1

SDRAM_CLK#0

SDRAM_CLK#1

SDRAM_RAS#

SDRAM_CLKE

SDRAM_CAS#

SDRAM_WE#

SDRAM_CS0

SDRAM_DQ0

SDRAM_DQ1

SDRAM_DQ2

SDRAM_DQ3

SDRAM_DQ4

SDRAM_DQ5

SDRAM_DQ6

SDRAM_DQ7

SDRAM_DQ8

SDRAM_DQ9

SDRAM_DQ10

SDRAM_DQ11

SDRAM_DQ12

SDRAM_DQ13

SDRAM_DQ14

SDRAM_DQ15

SDRAM_DQ16

SDRAM_DQ17

SDRAM_DQ18

SDRAM_DQ19

SDRAM_DQ20

SDRAM_DQ21

SDRAM_DQ22

SDRAM_DQ23

SDRAM_DQ24

SDRAM_DQ25

SDRAM_DQ26

SDRAM_DQ27

SDRAM_DQ31

SDRAM_DQ28

SDRAM_DQ30

SDRAM_DQ29

SDRAM_DQM0

SDRAM_DQM1

SDRAM_DQM2

SDRAM_DQM3

4 SDRAM_DQ[31..0]

SSTL2_VDD

The VTT side of the terminaton resistors should be placed on a wide VTT island on the surface layer. The island is located at each end of the bus, so it does not interfere with the signal routing.

C57

104

C58

104

C59

103

C60

103

C61

104

C62

104

C63

103

SSTL2_VDD

C64

104

C65

104

C66

103

C67

103

C68

104

C69

104

C70

104

C71

104

C72

103

C73

103

C74

104

C75

104

SSTL2_VDD

VREF

VREF 2,4

GND_SSTL2

VTT

GND_SSTL2

C76

104

C77

104

C78

103

C79

103

C89

104

C90

104

C91

103

C92

103

C80

104

C93

104

C81

104

C82

102

C83

102

C94

104

C95

102

C96

102

C84

102

C85

104

VTT

C97

102

C98

104

GND_SSTL2

TERMINATION

AT DDR

SSTL2_VDD

C86

104

C87

102

4 SDRAM_DQ[31..0]

C88

102

C99

104

GND_SSTL2

C100

102

C101

102

VREF

VREF 2,4

DDR TERMINATION VOLTAGE REGULATOR

VREF needs to be decoupled to both SSTL2_VDD and SSTL2_GND with balanced decoupling capacitors.

VREF should be routed over a reference plane and isolated, and possibly shielded with both SSTL2_VDD and SSTL2_GND

VTT

CA3

220u/16

+ C102

10u/16

2,4 VREF

VREF

GND

VSENSE

VREF

LP2995

VTT

PVIN

AVIN

VDDQ

SSTL2_VDD

CA4

220u/16

C106

104 C107

104

GND_SSTL2

C104

104

+ C103

T47u/16

C105

104

A B C

VTT

SDRAM_DQ0

SDRAM_DQ1

SDRAM_DQ2

SDRAM_DQ3

SDRAM_DQ4

SDRAM_DQ5

SDRAM_DQ6

SDRAM_DQ7

SDRAM_DQ8

SDRAM_DQ9

SDRAM_DQ10

SDRAM_DQ11

SDRAM_DQ12

SDRAM_DQ13

SDRAM_DQ14

SDRAM_DQ15

SDRAM_DQ16

SDRAM_DQ17

SDRAM_DQ18

SDRAM_DQ19

SDRAM_DQ20

SDRAM_DQ21

SDRAM_DQ22

SDRAM_DQ23

SDRAM_DQ24

SDRAM_DQ25

SDRAM_DQ26

SDRAM_DQ27

SDRAM_DQ28

SDRAM_DQ29

SDRAM_DQ30

SDRAM_DQ31

SDRAM_A0 4

SDRAM_A1 4

SDRAM_A2 4

SDRAM_A3 4

SDRAM_A7 4

SDRAM_A6 4

SDRAM_A5 4

SDRAM_A4 4

SDRAM_A12 4

SDRAM_A11 4

SDRAM_A9 4

SDRAM_A8 4

RP23

51/RP

SDRAM_RAS# 4

SDRAM_A14 4

SDRAM_A15 4

SDRAM_A10 4

SDRAM_DQS0 4

SDRAM_DQS1 4

SDRAM_DQS2 4

SDRAM_DQS3 4

R46

R48

R50

R51

RP25 51/RP

SDRAM_DQM0 4

SDRAM_DQM1 4

SDRAM_DQM2 4

SDRAM_DQM3 4

R54

R56

R58

R59

SDRAM_CLK#0 4

SDRAM_CLK#1 4

SDRAM_CLK0 4

SDRAM_CLK1 4

R60

R61

R62

R63

SDRAM_CLKE 4

SDRAM_WE# 4

R64

R66

SDRAM_CAS# 4

SDRAM_CS0 4

R67

R68

RP2 51/RP

RP4 51/RP

RP15

RP17

RP6 51/RP

RP8 51/RP

RP10 51/RP

RP13 51/RP

51/RP

RP19 51/RP

RP21 51/RP

LSI LOGIC

560 COTTONWOOD DR.

MILPITAS, CA 95035

U. S. A.

Title

TERM AT E5

Document Number Size

Date: Monday, June 07, 2004

Sheet 3 of 12

Rev

SDRAM_A0

SDRAM_A1

SDRAM_A2

SDRAM_A3

SDRAM_A4

SDRAM_A5

SDRAM_A6

SDRAM_A7

SDRAM_A8

SDRAM_A9

SDRAM_A10

SDRAM_A11

SDRAM_A12

SDRAM_A14

SDRAM_A15

3 SDRAM_CS0

SDRAM_CLKE

SDRAM_RAS#

SDRAM_CAS#

SDRAM_WE#

SDRAM_DQM0

SDRAM_DQM1

SDRAM_DQS0

SDRAM_DQS1

3 SDRAM_CLK0

SDRAM_CLK#0

2,3 VREF

SDRAM_A0

SDRAM_A1

SDRAM_A2

SDRAM_A3

SDRAM_A4

SDRAM_A5

SDRAM_A6

SDRAM_A7

SDRAM_A8

SDRAM_A9

SDRAM_A10

SDRAM_A11

SDRAM_A12

SDRAM_A14

SDRAM_A15

DDR_VDD

SDRAM_A0

SDRAM_A1

SDRAM_A2

SDRAM_A3

SDRAM_A4

SDRAM_A5

SDRAM_A6

3 SDRAM_A7

SDRAM_A8

SDRAM_A9

SDRAM_A10

SDRAM_A11

SDRAM_A12

SDRAM_A14

SDRAM_A15

3 SDRAM_CS0

SDRAM_A0

SDRAM_A1

SDRAM_A2

SDRAM_A3

SDRAM_A4

SDRAM_A5

SDRAM_A6

SDRAM_A7

SDRAM_A8

SDRAM_A9

SDRAM_A10

SDRAM_A11

SDRAM_A12

SDRAM_A14

SDRAM_A15

SDRAM_DQM2

SDRAM_DQM3

SDRAM_DQS2

SDRAM_DQS3

3 SDRAM_CLK1

SDRAM_CLK#1

DDR_VDD

SSTL2_VDD

B C D

CS#

CKE

RAS#

CAS#

WE#

LDM

UDM

LDQS

UDQS

CLK

CLK#

VREF

VCC

VCCQ

8MX16 DDR

A10/AP

A11

A12

BA0

BA1

GND

GNDQ

D10

D11

D12

D13

D14

D15

C124 10UF/1206

GND

SDRAM_DQ0

SDRAM_DQ1

SDRAM_DQ2

SDRAM_DQ3

SDRAM_DQ4

SDRAM_DQ5

SDRAM_DQ6

SDRAM_DQ7

SDRAM_DQ8

SDRAM_DQ9

SDRAM_DQ10

SDRAM_DQ11

SDRAM_DQ12

SDRAM_DQ13

SDRAM_DQ14

SDRAM_DQ15

3 SDRAM_DQ[31..0]

SSTL2_VDD

FB2

B601

DDR_VDD

V33

Option for DDR with 3.3V VDD

FB3

*B601

+ CA5

T47u/16

C108

104

GND

SSTL2_VDD

C109

104

C110

104

LAYOUT

NOTE:

PLACEMENT

SDRAM_CS0

U25

E5 SDRAM_CLK1

U22

SDRAM_CLK0

C111

102

C112

102

C113

102

C115

104

GND

DDR_VDD

C116

104

C117

104

C118

104

C119

104

C120

102

C121

102

C122

102

C123

102

CS#

CKE

RAS#

CAS#

WE#

LDM

UDM

LDQS

UDQS

CLK

CLK#

VREF

VCC

VCCQ

8MX16 DDR

A10/AP

A11

A12

BA0

BA1

GND

GNDQ

D10

D11

D12

D13

D14

D15

C141 10UF/1206

GND

SDRAM_DQ16

SDRAM_DQ17

SDRAM_DQ18

SDRAM_DQ19

SDRAM_DQ20

SDRAM_DQ21

SDRAM_DQ22

SDRAM_DQ23

SDRAM_DQ24

SDRAM_DQ25

SDRAM_DQ26

SDRAM_DQ27

SDRAM_DQ28

SDRAM_DQ29

SDRAM_DQ30

SDRAM_DQ31

GND

C125

104

C126

104

C127

104

SSTL2_VDD

C128

102

C129

102

C130

102

+ C131

T47u/16

C132

104

C133

104

C134

104

C135

104

C136

104

C137

102

C138

102

C139

102

C140

102

+ C114

10UF/1206

GND

LSI LOGIC

560 COTTONWOOD DR.

MILPITAS, CA 95035

U. S. A.

Title

2 (8M x 16) DDR SDRAM

Document Number Size

Custom

Date: Monday, June 07, 2004

B C

GND_SSTL2

Sheet 4 of 12

Rev

A B C D E

E-Link III

Connector

V33

GND

/ETHER_IRQ

/E5_CS1 2

E5_ALE 2,6

E5_MA2 2,6

HD15 2,6

HD13 2,6

HD11 2,6

HD9

HD8

2,6

HD6

HD4

HD2

2,6

HD0 2,6

E5_GPIO2 2

/E5_OE 2,6

/E5_WEL 2,6

E5_MA5 2,6

E5_MA4 2,6

E5_UART2_TX 2

GND

*HEADER 20X2

FB4

2,6 /SYS_RST

2,6

E5_MA3

E5_MA1

2,6

HD14

HD12

HD10

*601

2,6

HD7

HD5

HD3

2,6

HD1

E5_/DTACK

2 /E5_UDS

/RST_SW

/WAIT

2 E5_UART2_RX

GND

C142

*47u/16

GND

C143

*104

RESET CIRCUITRY

12 /RST_HOST

/RST_HOST

/RST_SW

*IN4148

VCC

C146

104

IN4148

R69

10K 2

V33

3906

VCC

C144

10u/16

IN4148

R71

10K

U5A

74AHCT14

2 3

U5B

74AHCT14

R70

2,9 E5_GPIOx35

R73

10K

V33

U5C

74AHCT14

6 9

U5D

74AHCT14

R74

R72

/RST_AUDIO

/RST_AUDIO 11,12

2,6 /SYS_RST

C145

102

E5_UART2_TX

E5_UART2_RX

UART

R75

GND

DNS CON5X2

GND

V33

R77

*10K

2 AO_IEC958

U5E

74AHCT14

10 13

U5F

74AHCT14

R76

C147 R78

104 330

R79

120

GND

OPTICAL 12

SPDIF_OUT 12

A B C

LSI LOGIC

560 COTTONWOOD DR.

MILPITAS, CA 95035

U. S. A.

Title

Size

Date:

FP, RST, IR, AV IO/ELink-3 CON, UART

Document Number

Monday, June 07, 2004 Sheet

5 of 12

Rev

VCC

SCL

GND SDA

*AT24C16

V33

C154

104

V33

C158

*104

R88

2.2K

VCC

R89

2.2K

SCL

SDA

SCL

SDA

2,7,9,11,12

C155

102

C152

10u/16

2,5 HD[15..0]

FLASH MEMORY(2 or 4 or 8 Mb)

C153

104

C157

104

HD0

HD1

HD2

HD3

HD4

HD5

HD6

HD7

HD8

HD9

HD10

HD11

HD12

HD13

HD14

HD15

E5_ALE 2,5

V33

2A5

2A6

2A7

2A8

2OE

2LE

1A8

1OE

1LE

2A1

2A2

2A3

2A4

1A1

1A2

1A3

1A4

1A5

1A6

1A7

VCC

GND

74LVC16373

2B1

2B2

2B3

2B4

2B5

2B6

2B7

2B8

1B1

1B2

1B3

1B4

1B5

1B6

1B7

1B8

E5_MA1 2,5

E5_MA2 2,5

E5_MA3 2,5

E5_MA4 2,5

E5_MA5 2,5

E5_MA22 2

BA[22..1]

BA6

BA7

BA8

BA9

BA10

BA11

BA12

BA13

BA14

BA15

BA16

BA17

BA18

BA19

BA20

BA21

2,5

/E5_WEL

/SYS_RST

R80

*4.7k

BA1

BA2

BA3

BA4

BA5

BA22

V33

R83

R82

10K

/SYS_RST

BA22

BA21

BA20

BA16

BA15

BA14

BA13

BA12

BA11

BA10

BA9

A19/A19/A21

NC/A20/A20

ACC

WP#/ACC

RY/BY/A19

BA19

BA18

BA8

BA7

BA6

BA5

BA4

BA3

BA2

BA1

BA17

SKT-U2

SKT-TSOP48

A15

A14

A13

A12

A11

A10

A19/A19/A21

NC/A20/A20

RST

ACC

WP/ACC

RY/BY/A19

A18

A17

A16

BYTE/VIO

VSS

D15

D14

D13

D12

VCC

D11

D10

VSS

MX29LV160

V33

BA17

HD15

HD7

HD14

HD6

HD13

HD5

HD12

HD4

HD11

HD3

HD10

HD2

HD9

HD1

HD8

HD0

BA1

C156

104

V33

R81

R84

R85

R86

R87

R90

*4.7k

DNS-0

WP#/ACC

A19/A19/A21

NC/A20/A20

RY/BY/A19

Size

1MB

2MB(Default)

4MB

8MB

Stuff

R90

R86,R90

R85,R86,R87

Not Stuff

R85,R86,R87,R90

R85,R86,R87

R85,R87

R90

HD[15..0] 2,5

/E5_OE 2,5

/E5_CS0 2

2 ATAPI_RESET

VCC

R91

4.7K

INT_ATA

IORDY

DMARQ

R105

680

C159

22PF

R106

4.7K

R101

R102

R103

R104

DEDICATED ATAPI INTERFACE

VCC

R92

ATAPI_DATA8 2

ATAPI_DATA7 2

ATAPI_DATA9 2

ATAPI_DATA6 2

RP27 33/RP

RSTATA

ATAPI_INTRQ

ATAPI_IORDY

ATAPI_DMARQ

10K

ATAPI_DATA10 2

ATAPI_DATA5 2

ATAPI_DATA11 2

ATAPI_DATA4 2

RP28 33/RP

ATAPI_DATA12 2

ATAPI_DATA3 2

ATAPI_DATA13 2

ATAPI_DATA2 2

RP29 33/RP

RP30 33/RP

ATAPI_DATA14 2

ATAPI_DATA1 2

ATAPI_DATA15 2

ATAPI_DATA0 2

ATAPI_DIOW_L 2

ATAPI_DIOR_L 2

ATAPI_DMAACK_L 2

AtapiAddr1 2

RP31 33/RP

AtapiAddr0 2

AtapiAddr2 2

AtapiAddr3 2

AtapiAddr4 2

RP32 33/RP

HD_AT8

HD_AT7

HD_AT9

HD_AT6

HD_AT10

HD_AT5

HD_AT11

HD_AT4

HD_AT12

HD_AT3

HD_AT13

HD_AT2

HD_AT14

HD_AT1

HD_AT15

HD_AT0

DIOW

DIOR

DMACK

ATA_A1

ATA_A0

ATA_A2

CS1FX

CS3FX

A B C

RSTATA

HD_AT7

HD_AT6

HD_AT5

HD_AT4

HD_AT3

HD_AT2

HD_AT1

HD_AT0

DMARQ

DIOW

DIOR

IORDY

DMACK

INT_ATA

ATA_A1

ATA_A0

CS1FX

FB22

FB23

FB24

FB25

FB26

FB27

FB28

FB29

FB31

FB5

FB6

FB8

FB10

FB12

FB14

FB16

FB18

FB20

B601

HEADER 20X2

FB7

FB9

FB11

FB13

FB15

FB17

FB19

FB21

B601

FB30

FB32

B601

HOST Read

V33 2

2,5 HD[15..0]

HD_AT8

HD_AT9

HD_AT10

HD_AT11

HD_AT12

HD_AT13

HD_AT14

HD_AT15

KEYWAY (NO PIN)

CAB_SEL

ATA_A2

CS3FX

R115

HD0

HD1

HD2

HD3

HD4

HD5

HD6

HD7

JP1

DNS HEADER 3X1

HD[1:0]

HD[3:2]

HD[7]

Samsung - K4H281638D-TCB3

Micron - MT46V8M16-55

ESMT - M13S128168A-6T

Nanya

64Mb DDR SDRAM

128Mb DDR SDRAM

256Mb DDR SDRAM

Reserve

Normal Mode (Jumper 1-2)

Debuge Mode (Jumper 2-3)

LSI LOGIC

560 COTTONWOOD DR.

MILPITAS, CA 95035

U. S. A.

Title

FLASH, ATA, EEPROM

Document Number Size

Date: Monday, June 07, 2004 Sheet 6 of 12

Rev

A B C D E

1394

GND_PHY_D

FIREWIRE PHY

C160

27PF

C161

27PF

BIO_LREQ

PHY_XI

24.576MHz

PHY_XO

C162 104

2 BIO_LREQ

GND_PHY_D

C163 R117 51

56PF

2 E5_GPIO1

V33_PHY_D

V33_PHY_A

R116 6.34K/1%

2 RDS_DATA

2,6,9,11,12 SDA

2,6,9,11,12 SCL

RDS /RBDS PRE-PROCESSOR

RR1

10K

VCC

CR1

82PF

RR4

YR1

4.332MHz

RR3

470K

CR3

104

RR2

CR2

47PF

R118 1M/1%

UR1

SAA6588

MRO

MPTH

TCON

OSCO

OSCI

VSSD

VDDD

DAVN

SDA

SCL

LVIN

CIN

SCOUT

VREF

MPXIN

VSSA

VDDA

AFIN

MAD

PSWN

VCC

CR4

104

CR6

151

CR5

104

CR8

47u/16

CR7

331

RDS_MPX 9

+ CR9

2.2u/50

2 BIO_LINK_ON

R119 22

2 BIO_PHY_CLK

BIO_PHY_CTL0

BIO_PHY_CTL1

BIO_PHY_DATA0

BIO_PHY_DATA1

BIO_PHY_DATA2

BIO_PHY_DATA3

BIO_PHY_DATA4

BIO_PHY_DATA5

BIO_PHY_DATA6

BIO_PHY_DATA7

2 E5_GPIOx0

V33_PHY_D

R129

DNS-10K

2 BIO_LPS

R131

GND_PHY_D

10K

R128

2.2K

GND_PHY_D

R135

R138

R141

680

GND_PHY_D

U10

SYSCLK

CTL0

CTL1

43 42

XO XI

TSB41AB1

S-PQFP-48-TI

PC0 PC1 PC2

16 17 18

SE SM

23 24

AGND

AVDD

AGND

TPBIAS

TPA+

TPA-

TPB+

TPB-

AGND

AVDD

PHY_R1

PHY_R0

TPBIAS

PA+

PA-

PB+

PB-

R120

56.2/1%

R126

56.2/1%

R132

R133

GND_PHY_A

C166

221

R130

5.11K/1%

GND_PHY_D

GND_PHY_A GND_PHY_A

TPBIAS

R121

56.2/1%

C165

224

GND_PHY_A

+ C164

1u/50

GND_PHY_A

R122

R123

R124

R125

R127

56.2/1%

PHY_PC0

PHY_PC1

PHY_PC2 PHY_ISO

R136

R142

10K

V33_PHY_D

2 USB_D0-

2 USB_D0+

TPA+

TPA-

TPB+

TPB-

TPB+

TPA-

TPA+

GND_PHY_A

C167

104

VCC

USB

R143

15K

R144

15K

R134

R139

22 USB_BDM0

22 USB_BDP0

R137

R140

FB34

FB35

FB33

B601

CN1

6P2.0

GND_PHY_D GND_PHY_A

V33 V33_PHY_D V33

2 USB_OC0

2 USB_PO0

C168

10u/16

C171

103

C172

103

C173

103

C174

104

C175

104

V33_PHY_A

C169

47u/16

B601

C170

T47u/16

C176

104

C177

104

GND_PHY_D GND_PHY_A

LSI LOGIC

560 COTTONWOOD DR.

MILPITAS, CA 95035

U. S. A.

Title

1394 PHY &USB

Document Number Size

Date: Monday, June 07, 2004

A B C D

*7P2.0

Sheet

7 of 12

Rev

MAIN POWER REG

B C D

2_5V V18

U11

PQ018EZ02/PQ070XZ02

VIN VOUT

+ C184

220u/16

C185

104

R145

*1K

C182

330u/16

R146

*2.2K

C183

104

VCC

C189

104

U12

LT1117-3.3

VIN VOUT

R147

*1K

DV33

R148

*FB V33

C190

104

C188

47u/16

C191

103

C192

104

V33

U13

PQ025EZ01

VIN VOUT

V25

+ C196

220u/16

C197

104

R149

*1K

C194

330u/16

R150

*1K

C195

104

VCC

C180

104

C178

100u/16

DV33

L7 B601

L8 B601

VCC_VOUT_A

C179

100u/16

C181

104

GND_VOUT

VCC_AOUT_A

C186

220u/16

C187

104

GND_AOUT

V33_AIN_A

L10 B601

C193

10u/16

GND_AIN

A B C

LSI LOGIC

560 COTTONWOOD DR.

MILPITAS, CA 95035

U. S. A.

Title

POWER CONN

Document Number Size

Date:

Monday, June 07, 2004

Sheet 8

E of 12

Rev

A B C D E

F_CVBS_IN

Y/G_IN

R_Y_IN

TV_CVBS_IN

Pb/B_IN

F_C_IN

F_Y_IN

Pr/R_IN

R_C_IN

R_SC2_SC1_CVBS_IN

R151 18

R153 56

R154

R156

R158

R155 56

R157 56

R159 56

R160

R164

R161 56

R165 56

R166

R168

R167 56

R169 56

R170

R172

R171 56

R173 10K

C199

C201

C202

C203

C204

C205

C206

C207

C208

C209

104

V33_VIA V18_VIA

C198

33PF

14.31818MHz

C200

33PF

VI_1_B

VI_1_C

CH1_A33GND

CH1_A33VDD

CH2_A33VDD

CH2_A33GND

VI_2_A

VI_2_B

VI_2_C

CH2_A18GND

CH2_A18VDD

A18VDD_REF

A18GND_REF

CH3_A18VDD

CH3_A18GND

VI_3_A

VI_3_B

VI_3_C

CH3_A33GND

CH3_A33VDD

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

GND_VIN

DV33

L11 B601

V33_VID

C210

10u/16

C211

104

C212

104

C213

104

C214

104

V33_VIA

L13 B601

+ C223

100u/16

C224

104

C225

104

C226

104

C227

104

GND_VIN

V18

L12 B601

V18_VID

C215

10u/16

C216

104

C217

104

C218

104

C219

104

C220

104

R229 *2.2K

L14 B601

V18_VIA

+ C222

100u/16 C228

104

C229

104

C230

104

C231

104

C232

104

C233

104

GND_VIN

R226

100K

R231

R232

2.2K

XTAL2 XTAL1

U14

TVP5146

DGND DVDD

VI_4_A C NSUB TM SCL SDA INTREQ DVDD DGND PWDN RESETB FSS/GPIO AVID/GPIO GL IOGND DATACL

21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

IOGND IO

C_6/GPIO/RED

C_7/GPIO/GREEN

C_8/GPIO/BLUE

C_9/GPIO/FSO

DGND

DVDD

Y_0

Y_1

Y_2

Y_3

Y_4

IOGND

IOVDD

Y_5

Y_6

Y_7

Y_8

Y_9

DGND

DVDD

C221

104

R152

R176

*33

V33_VID

VI_VSYNC 2

V18_VID

GPO1

GPO2

VI_0

VI_1

VI_2

VI_3

VI_4

VI_5

VI_6

VI_7

VI_8

VI_9

IDC Slave Addr:

0xB8/B9

GND_VIN

R162

R163

RP33 33/RP

RP34 33/RP

VI_D0

VI_D1

R228 2.2K

100

R177

10K

R174

R175

33 (VI_AVID)

VI_FSS

(/RST_VI)

(INT_VI)

R178

10K

V33_VID

GND_VIN

VI_CLK0 2

E5_GPIOx3 2

(Fast switch input source between RGB and CVBS/YC)

E5_GPIOx7 2

E5_GPIOx6 2

SDA

SCL

2,6,7,11,12

2,5 E5_GPIOx35

RDS_MPX

VI_FSS

Pb/B_IN

Y/G_IN

Pr/R_IN

CN2

12P1.0

7P1.0 for

DW9916,

12P1.0 for rw+amplifier and VCR

VI_D2

VI_D3

VI_D4

VI_D5

VI_D6

VI_D7

VI_D8

VI_D9

GND_VIN

LSI LOGIC

560 COTTONWOOD DR.

MILPITAS, CA 95035

U. S. A.

Title

VIDEO IN

Document Number Size

Date: Monday, June 07, 2004

A B C

VI_D[9..0] 2

Sheet

9 of 12

Rev

2 Y

2 Y/G

2 Pb/B

R179

*220

C236

*331

C234

*22PF

L15

1.8uH

C237

101

Y_O 12

R182

*220

C244

*331

C241

*22PF

L18

1.8uH

C245

101

Y/G_O 12

R183

*220

C247

*331

C246

*22PF

L19

1.8uH

C248

101

Pb/B_O 12

2 C

2 Pr/R

VCC_VOUT_A

R180

*220

C238

*331

C235

*22PF

L16

1.8uH

C239

101

C_O 12

R181

*220

C242

*331

C240

*22PF

L17

1.8uH

C243

101

Pr/R_O 12

2 CVBS

R188

180

C251

*331

C249

*22PF

L20

1.8uH

C252

101

C250

220u/10

R185

6.8K

3904

R189

6.8K

R184

470

CVBS_O 12

A B C

Title

Size

Date:

<Title>

Document Number

<Doc>

Monday, June 07, 2004

Sheet 10

E of 12

Rev

A_L_IN 12

A_R_IN 12

A B C

Audio Out (2 & 6 ch)

AO_MCLKO 2

AO_SCLK 2

AO_FSYNC 2

AO_D3 2

AO_D2 2

AO_D1 2

SCL

SDA

2,6,7,9,12

E5_GPIO3 2

VCC_AOUT_A

R230

2.2K

DV33 IDC Slave Addr: 0x22/23

U15

MCLK

BCLK

LRCK

SDATA1

SDATA2

SDATA3

AD0/CS

SCL

SDA

RST

VLS

VLC

AOUTL1

AOUTR1

MUTEC1

AOUTL2

AOUTR2

MUTEC2

AOUTL3

AOUTR3

MUTEC3

FILT+

GND1

GND2

CS4360

C271

104

C270

1u/50

GND_AOUT

C272

104

C273

104

C269

103 GND_AOUT

MUTECS

MUTELRS

MUTELR

C265

3.3u/16

C267

104

GND_AIN

C266

3.3u/16

GND_AOUT

C268

104

C253

C254

C255

C256

C257

C258

10u/16

2,12 IR_FMUTE

IR_FMUTE

2 E5_GPIOx5

MUTECS

9 C2

R190

R191

R192

R193

R194

R195

5.6K

GND_AOUT

D8 IN4148

D9 *IN4148

3 D10 *MMBD4148CC

MUTE 12

C259

122

C260

122

C261

122

C262

122

C263

122

C264

122

MUTELR

MUTELRS

MUTEC

MUTES

CENTER 12

SUBWOOFER 12

REAR_L 12

REAR_R 12

A_L_OUT 12

A_R_OUT 12

CN7

*6P2.0

R212

150

R213

150

Audio In

C281

102

GND_AIN

R210

R211

10K

ADC_DIF

ADC_DIV

DV33

C282

102

V33_AIN_A

/RST_AUDIO 5,12

C287

10u/16

R216

R217

DNS-10K

C288

104

C289

104

U17

AINL

AINR

RST

DIF

DIV

MCLK

SCLK

LRCK

SDATA

FILT+

REF_GND

TST

GND

CS5333

AIN_D

R214

R215

C285

104

C283

1u/50

10K

3 D7 *MMBD4148CC

AI_MCLKO 2

AI_SCLK 2

AI_FSYNC 2

AI_D0 2

GND_AIN

C286

104

C284

1u/50

GND_AIN GND_AIN

A B C

Title

Size

Date:

<Title>

Document Number

<Doc>

Monday, June 07, 2004

Sheet

11 of 12

Rev

2 E5_GPIOx42

2,11

E5_GPIOx41

E5_GPIOx25

IR_FMUTE

5 /RST_HOST

2 E5_GPIO0

E5_GPIOx24

CN6

10P2.5

P_CTL

5VSTB

+3.3V

VCC

GND

+2.5V

L21

D_FM

FP_SCLK

RDY_FM

/FP_RST

D_HOST

ATN_FM

FRONT PANEL INTERFACE

L22

5V_STB

C290 C291 C292 C293 C294

47PF 47PF 47PF 47PF 47PF

2_5V

C300

104

+ C296

330u/16

V33

C297

104

+ C298

330u/16

5V_STB

R218

R219

R220

2.2K

GND

VFD_DIO

VFD_CLK

VFD_STB

IR_FMUTE

5V_STB

/RST_HOST

P_CTL

CN4

10P2.0

CN3

24P1.0

SCART1

SCART2

OPTICAL 5

SPDIF_OUT 5

SUBWOOFER 11

MUTE 11

CENTER 11

/RST_AUDIO 5,11

REAR_R 11

REAR_L 11

A_R_OUT 11

A_L_OUT 11

GPO1 9

GPO2 9

E5_GPIOx2 2

E5_GPIOx4 2

E5_GPIO4 2

E5_GPIO5 2

SDA

SCL

2,6,7,9,11

AUDIO_SEL0

AUDIO_SEL1

5V_STB

R221

R222

C295

10u/16

2.2K

VCC

C301

104 C299

330u/16

R223

A/V I/O Connector

CN5

26P1.0

GND_AOUT

S_Y_OUT

S_C_OUT

V_OUT

R_V_OUT

G_Y_OUT

B_U_OUT

R_C_IN

R_Y_IN

V3_IN

V4_IN

V1_IN

A_L_IN

A_R_IN

E5_GPIOx1 2

Y_O 10

C_O 10

CVBS_O 10

Pr/R_O 10

Y/G_O 10

Pb/B_O 10

R_C_IN 9

R_Y_IN 9

F_Y_IN 9

F_CVBS_IN 9

R_SC2_SC1_CVBS_IN 9

F_C_IN 9

TV_CVBS_IN 9

A_L_IN 11

A_R_IN 11

GND_AIN

A B C

Title

Date:

<Title>

Size Document Number

Custom <Doc>

Monday, June 07, 2004 Sheet

12 of 12

Rev

0.0

A B C D

Modify Notes:

2005.01.08

P1 U1 Supply voltage from +6.2V to +5V

P8 Del Net E5_C

P8 Add C166,C167,C168 when in mtk scart and out scart(rgb) ,exist interference.

P7. add gcode ic

P9. add r210,r211,r213,r214 amend the sound distortion when playing vcd,stero out,connect KONGJA tv

P8 add c169,c176 amend log picture distortion

2005.01.12

P8 add Q39,Q40,r218,r219,r220 etc. switch RGB/CVBS select votage level,when SCART in

2005.01.28

change c136,c145 to 220u

A B C

Title

Size

Date:

<Title>

Document Number

<Doc>

Friday, January 28, 2005

Sheet 1

E of 10

Rev

A B C D E

AUDIO IN

AV2-8.4-6G

CS-09

CVBS/S_VIDEO IN

VCR_F_L_IN

VCR_F_R_IN

CN3

7P2.0

VCR_R_L_IN 9

+5V +6.2V

+12V

R17

15K

R20

15K

B221

R10

B221

R13

B221

R19

10K

R21

10K

R24

B221

R27

B221

VCR_R_R_IN

R30

R32

*15K

5V_STB

SC2_L_IN 7,8

BTSC_AINL

VCR_R_OUT 9

R29

15K

104

C20

4.7u/50

IN_R

+ C1

47u/16

220

6.2V 1/2W

10K

MMBD4148SE SOT-23

10K

MMBD4148SE SOT-23

C13

4.7u/50

C14

4.7u/50

MMBD4148SE SOT-23

SC2_R_IN 7,8

MMBD4148SE SOT-23

4.7u/50

BTSC_AINR 7

4.7u/50

5V_STB

EXT_AUDIO_IN_L

EXT_AUDIO_IN_R

R_CVBS_IN

R_Y_IN

R_C_IN

R_CVBS_IN

F_AUDIO_IN_R

F_AUDIO_IN_L

V4_IN

R_Y_IN

R_C_IN

V3_IN

F_C_IN

F_CVBS_IN

BTSC_AINL

IN_L

BTSC_AINR

IN_R

VCC1

VCC2

SCL

SDA

AFC

AGC

2nd SIF

Video Out

VCC3

TUN1

JS-6B2F/L121-D5

Audio Out

C10

103

IIC_SCL

IIC_SDA

R16

R18

4.7u/50

A_L_IN

A_R_IN CN1

24P1.0

INH

47u/16

*1K

C12

103

CD4052 DIP

-6.2V

+5V

V1_IN

R22

C11

104

100u/16

R23

10K

+5V

47u/16

4.7V 1/2W

R14

10K

5.1k

+6.2V

R11

10K

3904 R12

3.3K

-12V

ADC_SEL1

+ Q2

3904 R15

3.3K

ADC_SEL0

ADC_SEL1

C18

102

TV_IF

ADC_SEL0

TV_CVBS_IN

C15

4.7u/50

8,9

BBK

SOURCE

R_AUDIO

TUNER&SCART

F_AUDIO

FM OR LOOP

TV_MONO

+ C16

220u/16

LSI

N/A

R_AUDIO

F_AUDIO

TUNER

+5V

TV_MONO

C17

103

7,8

CN2

26P1.0

9 VCR_L_OUT 9

C19

4.7u/50

IN_L

R28

15K

R31

B221

MMBD4148SE SOT-23 F_Y_IN

F_Y_IN 9

R33

10K

R34

10K

5V_STB

B C D

SCART1

SCART2

ADC_SEL0

ADC_SEL1

Title

Size

Date:

AV BOARD

Document Number

7DW9917-0

Friday, January 28, 2005

OPTICAL

SPDIF_OUT

SUBWOOFER 5

MUTE 3

CENTER 5

/RST_BTSC

REAR_R

REAR_L

A_R_OUT

E5_GPIO1(for DMN8600)

E5_GPIOx1_RTC_INT 2,8

S_Y_OUT 2

S_C_OUT

V_OUT

R_V_OUT

G_Y_OUT

B_U_OUT

R_C_IN

B_U_OUT

R_Y_IN

F_Y_IN

V3_IN

V4_IN

V1_IN

A_L_IN

A_R_IN

R_SC2_SC1_CVBS_IN 8,9

Sheet

A_L_OUT

TVP5146_C7

TVP5146_C8

E5_GPIOx2

SAA7115Pin35

SAA7115Pin34

CPUMUTE(for DMN8600)

E5_GPIOx4

E5_GPIO4

8 E5_GPIO3(for DMN8600)

SAA7115Pin49

E5_GPIO5 SAA7115Pin48

IIC_SDA

IIC_SCL

2,7,9

2 of 10

Rev

1.0

MIX_CVBS_OUT 9

S_C_OUT 1

S_Y_OUT 1

B C D E

R39

180

C22

220u/16

+5V

R36

6.8K

R38

6.8K

3904

R40

470

C21

104

+5V

R47

180

C23

220u/16

R44

6.8K

R46

6.8K

3904

R48

470

R35

B221

R37

B221

CVBS 8

CVBS/S-VIDEO

CS-09

R42

B221

5V_STB

1N4148

D10

1N6263

BT1

1,8 E5_GPIOx1_RTC_INT

32.768KHZ/20PF

C26

DNS20PF

C27

*20PF

R45

R43

M41T80/*PCF8563

INT

GND

VCC

SQW

SCL

SDA

IIC_SDA

IIC_SCL

1,7,9

5V_STB

R41

4.7K

C24

104 + C25

10u/16

Title

Size

Date:

<Title>

Document Number

<Doc>

Friday, January 28, 2005 Sheet 3

E of 10

Rev

1.0

A B C D E

A_R_OUT

A_L_OUT

R50

4.7K

R59

4.7K

C30

102

C35

102

CN4

5P2.5

-12V

AGND

+12V

GND

+5V

-12V +5V +12V

R66

C38

47u/16

R51

4.7K

R60

4.7K

R63

33K

R54

33K

C28

151

R49

20K

A-12V

4558

U3A

A+12V

R55

20K

R_OUT

C29

10u/16

R52

330

6,8,9 MIX_R_OUT

R53

47K C31

102

C33

151

A-12V

4558

U3B

A+12V

C34

10u/16

L_OUT

R61

330

6,8,9 MIX_L_OUT

R64

47K C36

102

A+12V

C39

104

C40

104

C41

104

C42

104

C43

47u/16

A-12V

C44

104

C45

104

C46

104

C47

104

R67

-12V

MUTE

R68

3904

A-12V

R57

R58

C32

103

R56

100K

3906 Q6

5V_STB

3904

5V_STB

R69

30K

3904

R118

10k

22K R62

3906 Q7

R65

220

C37

100u/16

AMUTE

R119

100

Q28

3906

4,5

A B

Title

Size

Date:

<Title>

Document Number

<Doc>

Friday, January 28, 2005 Sheet 4

E of 10

Rev

1.0

REAR_R 1

R71

4.7K

C50

102

R72

4.7K

REAR_L 1

R78

4.7K

C54

102

R79

4.7K

B C D

R70

20K

C48

151

A-12V

4558

U4A

A+12V

R75

20K

C49

10u/16

R74

47K

R73

330

C51

102

Q10

3904

REAR_R_OUT

REAR_R_OUT 6

C52

151

A-12V

4558

U4B

A+12V

AMUTE 3,5

C53

10u/16 R80 330

R81

47K

C55

102

R76

R77

LT_OUT

Q11

3904

REAR_L_OUT

REAR_L_OUT 6

A B C

Title

Size

Date:

<Title>

Document Number

<Doc>

Friday, January 28, 2005 Sheet 5

E of 10

Rev

1.0

CENTER 1

R83

4.7K

C58

102

R84

4.7K

SUBWOOFER 1

R90

4.7K

C62

102

R91

4.7K

B C D

R82

20K

C56

151

A-12V

4558

U5A

A+12V

R87

20K

C57

10u/16

R86

47K

R85

330

C59

102

Q12

3904

CENTER_OUT

CENTER_OUT 6

C60

151

A-12V

4558

U5B

A+12V

AMUTE 3,4

C61

10u/16 R92 330

R93

47K

C63

102

R88

R89

SUBWOOFER_OUT

SUBWOOFER_OUT 6

Q13

3904

A B C

Title

Size

Date:

<Title>

Document Number

<Doc>

Friday, January 28, 2005 Sheet 6

E of 10

Rev

1.0

1 R_V_OUT

+5V

+ C64

10u/16 C65

104

R98

180

C66

220u/16

R94

12K

R97

6.8K

Q14

3904

R99

470

R_Cr

B_Cb

G_Y

R96 B221

C D

5 CENTER_OUT

4 REAR_L_OUT

3,8,9 MIX_L_OUT

1 SPDIF_OUT

3,8,9 MIX_R_OUT

3,8,9 MIX_L_OUT

5 SUBWOOFER_OUT

4 REAR_R_OUT

3,8,9 MIX_R_OUT

FRONT_L_OUT

R95

FRONT_R_OUT

B221

R100

R101

B221

1 B_U_OUT

+5V

R104

180

C67

220u/16

R102

12K

Q15

3904

R103

6.8K

R105

470

+5V

1 G_Y_OUT

R108

180

C69

220u/16

R106

12K

Q16

3904

R107

6.8K

R109

470

1 OPTICAL

+5V

C68

104

OP1

GP1F32T

2 13 14

TOP VIEW

19 20

A B

AV12-8.4-2G-2

Title

Size

Date:

<Title>

Document Number

Friday, January 28, 2005 Sheet

7 of 10

Rev

1.0

BTSC

IDC Slave Addr: 0x80/81

TV_IF

+5V

R214

SC1_L_IN

SC1_R_IN

1,8 SC2_L_IN

1,8 SC2_R_IN

FB1

B601

FB2

B601

C79

1,8 TV_MONO

101

VCC_AIN

+ C90

10u/16

*47 1/10W

G+3.3V

R112

R216

*150 1/10W

B C D E

C70 474

C71 474

C72 474

C74 474

C73

3.3u/50

C75 104

R111 220

+12V

C76

10u/16

C77

104

C81

104

C82

47u/16

D11

8.2V 1/2W

VCC_AIN

R110

TV_MONO

C80

56PF

BDCOMP

C83

56PF

C78

10u/16

C91

152

C85

18.432MHz

C89

10PF

C92

471

R115

75K

AHVSUP

CLK_MSP_XIN

CLK_MSP_XOUT

9 V_G_CON

Control video gain of dvd to vcr.General

this pin is high,but when recording dvd to vcr it is low.

AVSUP

ANA_IN1+

ANA_IN-

TESTEN

XTAL_IN

XTAL_OUT

D_CTR_I/O_1

D_CTR_I/O_0

ADR_SEL

STANDBYQ

I2C_SCL I2C_SDA I2 DVSUP DVSS I2S_DA_I

12 13 14 15 16 17 18 19 20 21 22

AHVSUP

SC1_OUT_L

SC1_OUT_R

VREF1

DACM_L

DACM_R

VREF2

MSP34X5G-PMQFP44

+5V

DVSUP

G+3.3V

+ C94

103

AVSUP

C93

10u/16

C171 IIC_SCL

IIC_SDA

*104

1,2,9 IIC_SCL

1,2,9

IIC_SDA

/RST_BTSC

IIC_SCL

IIC_SDA

G+3.3V

R215 *10K

C174

*224

Q38

*3904

D33

*1N4148

R123 *220k

R217

220k

B C

C87

102

NC8

NC9

NC10

NC11

/SCK

VDD1

SD/TXD

SI/RXD

SCL

SDA

GND2

C175

*224

R113

12k

C88

102

R114

12K

R116

10K

NC17 GN /RESET X2 X1 VSS0 VDD0 NC15 NC16 /I2

23 24 25 26 27 28 29 30 31 32 33

Title

Date:

<Title>

Size Document Number

Custom <Doc>

Friday, January 28, 2005

C84 474

R117

10K

C86

474

G+3.3V

Sheet

VCR_TV_R

VCR_TV_L

BTSC_AINL 1

BTSC_AINR 1

U13 TQFP-44-GCODE GSV01

IIC Address:30H

G+3.3V

GND1

VDD

NC22

NC21

NC20

NC19

NC18

VSS1

C170

*104

C172 *22PF

*5MHz

C173

*22PF of 10

Rev

A B C D E

+5V R218 1.8K

5V_STB

VI_FSS

R222

Q40

3904

R221

47K

R219 47K

Q39

3906

R220

3.3K

SC2_TO_DVD_B

SC2_TO_DVD_G

SC2_TO_DVD_R

E5_GPIOx35

CN6

7P1.0

6 R_Cr

6 G_Y

5V_STB

LOOP_C

SC2_R

SC1_R

SC2_G

SC1_G

FSAV330

1B1

1B2

2B1

2B2

GND

VCC

4B1

4B2

3B1

3B2

SC1_CVBS_SEL

C98

104

SC2_B

SC1_B

B_Cb 6

SC2

SCART IN

R120

R121

SC2_R_IN

SC2_R_OUT

SC2_L_OUT

SC2_R_IN

SC2_L_IN

FB4

B221

FB5 B221

FB6

B221

1,7

FB7

B221

D17

MMBD4148SE SOT-23

SC2_B

AV_CONTROL

SC2_G

SC2_R

VI_FSS

SC2_CVBS_IN

5V_STB

D13

MMBD4148SE SOT-23

C100 R125

104 4.7K

D14

MMBD4148SE SOT-23

R124 22 Q35 3906

5V_STB R200

4.7K

R201 100K

R202

D24 1N4148

E5_GPIOx2

D15

MMBD4148SE SOT-23

5V_STB

D12

1N4148

R128

1N4148

E5_GPIOx35

D22

D23

1N4148

4.7K

R126

Q17

Q19

3904

D16

*1N4148

3906

R131

4.7K

+6.2V

+12V

R127 4.7K

R129

Q20

3904

D25

1N4148

Q36

3904

C164

220u/16

5V_STB

Q18

3906

R130

4.7K

+6.2V

VI_FSS

SC2_R

SC2_G

R26

FSAV330

1B1

1B2

2B1

2B2

GND

VCC

4B1

4B2

3B1

3B2

C167

SC2_TO_DVD_G

*220u/16

C168 *220u/16

SC2_TO_DVD_R

R122 0 R132

SC2_B

C166

C165

104

LOOP_C

SC2_CVBS_O

C153

SC2_TO_DVD_B

*220u/16

R25 0

SC1_CVBS_O

*220u/16

C154 *220u/16

5V_STB

C176

*101

R164

12K

R165

6.8K

5V_STB

R167

12K

C157

104

Q26

3904

SC2_CVBS_OUT

R166

4.7K

C158

104

Q27

3904

SC1_CVBS_OUT 5V_STB

SC2_CVBS_OUT

R134

*B221

C105

104

C106

104

1 R_CVBS_IN

3,6,9 MIX_L_OUT

MIX_L_OUT U10

HC4053

Function select(AV CONTROL) Pin8

High(9.5-12V)

Mid(5-8V)

Low(0-2V)

AV mode

Wide-screen

TV mode

Control by remoter DVDR/TV

E5_GPIOx1

SC1_CVBS_OUT

DECODER

DVD RW

SC2_L_IN

SC1

TO TV

FB9

SC1_R_IN

SC1_L_IN

SC1_R_OUT

SC1_L_OUT

FB10

221

FB11

221

FB12

221

B221

SC1_B

SC1_G

SC1_R

SC1_CVBS_OUT

FB8

B221

SC1_CVBS_RGB_SEL

D19

MMBD4148SE SOT-23

Fast Blanking Pin16

High(1-3V) RGB

Low(0-0.4V) Composite

1,2 E5_GPIOx1_RTC_INT

3,6,9

2 CVBS

SC2_CVBS_IN

MIX_R_OUT

SC2_R_IN

D31

1N4148

E5_GPIO1(for DMN8600)

+5V

R138

3.3K

SC1_CVBS_IN

5V_STB

R141

3.3K

5V_STB

R137

LOOP_C

Q21

3904

5V_STB

R148

Q23

3904

D18

1N4148

D20

1N4148

+5V

D32

1N4148

VEE

-6.2V

LOOP_DECODER_C

R140

47K

VI_FSS

R150

R151

3.3K

R146

5V_STB

7.5K

SCART LOOP AND DECODER Function

STATE LOOP DECODER OFF_C

STANDBY/DECODER OFF

POWER ON/DECODER ON

POWER ON/DECODER OFF

R182

Q25

3904

Q24

3904

C109

10u/16

C111

10u/16

C119

104

D28

1N4148

SC1_AUDIO_OUT

SC2_AUDIO_IN

RW_AUDIO_OUT

SC2_AUDIO_IN

SC1_L_OUT

SC1_CVBS_O

1,7

SC1_R_OUT

SC1_L_IN

7 SC1_R_IN

C120

104

Q22

3904

R183

3.3K

SC2_AUDIO_OUT

SC1_AUDIO_IN

TV_MONO

D27

1N4148

Q37

3906

D26

1N4148

1,9

R142

10K

R144

SC1_CVBS_OUT

SC2_CVBS_IN

RW_CVBS_OUT

SC2_CVBS_IN

TV_CVBS_IN

SC1_CVBS_IN

R143

SC1_IN_EN

LOOP_DECODER_C

D30 *1N4148

E5_GPIO3(FOR DMN8600)

R145

2.2K

SC1_CVBS_RGB_SEL

L(0--0.4V) H(1--3V)

R180

SC1_RGB

SC2_RGB

RW_RGB_OUT

U11

HC4053

2.2K

D29

VEE

1N4148

E5_GPIOx4

5V_STB

Q32

3904

SC2_CVBS_OUT

SC1_CVBS_IN

9 VCR_CVBS_OUT

R179

7.5K

SC1_CVBS_SEL

TUNER_CVBS_IN

C110 SC2_L_OUT

10u/16

SC2_CVBS_O

C114

10u/16

SC2_R_OUT

R136

R139

SC1_CVBS_IN

R178

4.7k

R135

R149

REAR/SC2/SC1/VCR_CVBS_SEL HC4052 Pin10,Pin9

Pin10(TVP5146_C7)

SC2_CVBS_IN

Q33

3904

Title

Size

Date:

+5V

Pin9(TVP5146_C8)

R147

4.7K

C103

104

INH

R170

4.7K

Pin13(OUT)

R_CVBS_IN

SC2_CVBS_IN

SC1_CVBS_IN

VCR_CVBS_IN

<Title>

Document Number

<Doc>

Friday, January 28, 2005

+5V

A B C D

C169

101

C163

104

SC1_IN_EN

74HC4052 SOP

-6.2V

Sheet

R168

6.8K

R169

4.7K

R_SC2_SC1_CVBS_IN 1,9

7115/34(5146/C8)

TVP5146_C8

TVP5146_C7

7115/35(5146/C7)

Rev

A B C D E

1 VCR_R_L_IN

C124 474

1 VCR_R_R_IN

C126 474

1,8 R_SC2_SC1_CVBS_IN

R_Y_IN

R_C_IN

F_CVBS_IN

F_Y_IN

F_C_IN

C127

C130

C132

C133

C135

C137

104

1 V_OUT

V_OUT

VCR_F_L_IN

R204

R208

C141

L_OUT

C144

VCR_F_R_IN

C146

3 R_OUT

C148

1,2,7

IIC_SDA

IIC_SCL

IIC_SDA

2.2K

*2.2K

C138

104

474

2.2u/16

474

2.2u/16

R162

R163

100

+9V

VCR_TV_R

VCR_TV_L

R154

R157

C123

C125

474

10K

MM1313AD

MTV-L

MTV-V

MTV-R

Cout1

Vcc

Yout1

BIAS

Vout1

Lout1

Rout1

Yin1

GND

Cin1

Mute

STV-V

STV-R

STV-L

Rout2

Vout2

Lout2

V2-Y

V2-R

V2-C

V3-V

V3-L

V1-V

V1-L

V1-Y

V1-R

V1-C

V2-V

V2-L

V3-R

SCL

SDA

ADR

U12

VCR_L_IN

VCR_R_IN

C149

C150

474

8 VCR_CVBS_OUT

VCR_L_OUT

VCR_R_OUT

VCR_CVBS_IN

VCR_CVBS_OUT

VCR_L_OUT

VCR_R_OUT

C128

104

TV_CVBS_IN 1,8

+9V

C131

223

C129

100u/16

+5V

R152

R153

D21

9.1V 1W

100 1/4W

+12V

C134 2.2u/16

C136

VCR_L_IN

VCR_R_IN

C139 *104

R203

*2.2K

R205

*2.2K

C140 474

220u/16

VCR_CVBS_OUT

VCR_R_OUT

Q34

*3906

R155

470

R206 *3.9K

R207

*47K

C142 474 VCR_L_OUT

C143

22u/16

R210 1K

MIX_R_OUT

R156

R171

V_G_CON

3,6,8

R211

*47k +5V

When recording DVD to VCR,put down this pin to increase the video signal.

Controled by pin 15 of MSP3415.

C155

104

Q29

3904

VCR_CVBS_IN

R172

470

C145

C147

*220u/16

R212

CN5

10P1.25

22u/16

Title

<Title>

R213

*47k

Size

Date:

MIX_L_OUT

3,6,8

Document Number

<Doc>

Friday, January 28, 2005

R161

*6.8K

R173

*6.8K

C156

104

Q30

*3904

R174

*470

MIX_CVBS_OUT 2

R209

0 V_OUT

Sheet 10 of

Rev

CN3

2P2.0

CN4

4P2.0

STB_LED

R11

9015

VDD

R21

4.7K

3 1

9014

CN1

5P2.0

K13

K12

K14 SW

K10 SW

VDD

R2 1K

VCC

2.2 1/4W F+

F-

-24V

22u/50

104

9015

R15

4.7K

K15

K11

1N4148

10K

CN5

4P2.0

K16 SW

LD1

STBY

VCC

9DW9919-1

1N4148

VDD

C11

4.7u/16

R16

10K

R20

4.7K

LD3

VTR

LD2

DVDR

R14

10K

8050C

10K

C15

102

220

10K

HS0038B3V

OUT

VCC

GND

STB_LED

P_CTL_PSW

103

P16 P15

G[1:6]

5MHZ/20pF

30PF

KEYC

KEYB

KEYA

VDD

FIP24

P00

P01

P02

P03

P04

P05

P06

P07

VSS0

UPD16316

VDD0 XT1 XT2 RESET P10 P11 P12 SCK SO SI INTP0 INTP1 TI

1 2 3 4 5 6 7 8 9 10 11 12 13

FIP12

FIP11

FIP10

FIP9

FIP8

FIP7

FIP6

FIP5

FIP4

FIP3

FIP2

FIP1

FIP0

P13

P12

P11

P10

VDD

R10

470

C14

10u/16

C13

103

32.768KHZ/20pF

R12

100

R13

20PF

C10

20PF

1N4148

5V_STB

VDD

R17

2.7K

R18

2.7K

R19

2.7K

103

C12

47u/16

P[1:16]

270K

-24V

*103

103

K1 CH+

K2 CH-

K3 EJECT

K4 DVD

K5 SOURCE

K6 FWD

5V_STB

VDD

F+

F-

P10

P11

P12

P13

P14

P15

P16

VFD1

20-0607F(1200229)

P16

P15

P14

P13

P12

P11

P10

K7 VCR

K8 OPEN/CLOSE

K9 PLAY

K10 STOP

K11 PAUSE

K12 REC

K13 REV

K14 PREV

K15 NEXT

D_FM

FP_SCLK

RDY_FM

/FP_RST

D_HOST

ATN_FM

GND

VFD_DIO

VFD_CLK

VFD_STB

MUTE

5V_STB

/RST_HOST_LED

P_CTL_PSW

D_HOST

ATN_FM

CN2

10P2.0

更改

设计

数量更改单号

审核

签名

标准化

日期

批准

DW9919 panel sch

VFD

4DW9919-2

第 1 张共 1 张

版次 1.0

221 AC400V

C13

104/~275

RV1

LF1

40mHX2

680K/1/2W

250V/T2AL

BCN1

2P7.92

1 2

RT1

10/4A(104MS) t

C14

221 AC400V

D17

22V 1/2W

D10

1N4007

D12

1N4007

CE11

47u/50

D11

1N4007

CE5

100uF/400V

*221 AC400V

IC1

FSDM0565R

Vstr

Drain

N.C

GND

Vfb

Vcc

36K 1/2W

75 1/4W

36K 1/2W

C24

101/500V

HER105

473

222 AC400V

102/1KV

39K 2W

FR207

BCK-28-0605

IC2

PC817

R15 470

C D E

HER105

101

D16

HER105

C19

101/500V

C18

C17

101/500V

CE13

47u/50

HER105

R14

1.2K

IC3

104

HER303

CE18

220U/63V

R21

3.3K

CE21

10u/50 +

101/500V

TL431

R10

SR10100

CE6

GZ2200u/10

CE12

R13

SR10100

100u/25

C10

102

C15

104

C12

104

R17

4.7K

F-

F+

L1 FB

CE1

100u/25

30uH

R16

12K 1%

R11

8.2K 1%

9014

CE3

D18

27V 1W

10uH

1000u/25

10uH

GZ1000u/10

10uH

CE9

GZ2200u/10

D13

CE2

100u/25

2SD669A

CE4

CE8

470u/25

CE10

B-25V

5.1V 1/2W

-25V

-12V

104

CE19

100u/50

GZ1000u/10

C20

104

C22

104

R12

20uH

CE23 +

100u/25

*150 1/4W

+6V

1PP15N03L

R19

10K 1/4W

IC4

PQ12RD21

Vin

1PP15N03L

CE17

220u/16

C11

104

C23

104

+26V

GND

+15V

+6V

GND

CN6

6P2.0

6 for +6V for +15V for +26V

+12V

CN1

2P2.5

CE16

100u/25

R4 1K

104

+3.3V

D14

1N5401

D15

1N5401

-12V

GND

+12V

GND

+5V

P_CTL

J13

5VSTB

+3.3V

+5V

GND

+2.5V/5

+2.5V/G

5MM

*7.5MM

CN2

5P2.5

CN3

10P2.5

GND

+12V

+ CE15

220u/16

+5V

C16

104

R23

TO fan 4

47K

IC5

TL431

R20

10K 1/4W

CE22

10u/25 IC6

TL431

R22

1.8K 1/4W

R24

5.1K 1/4W

10K 1/4W

CE7

10u/25

CN4

4P3.96

*C25

104

+12V

R3 10K

+5V

+15V

9.1K 1/6W

CE14

47u/16

8050

D19

5.6V 1/2W

+ CE20

100u/16

B-25V

5VSTB

C21

104

Q6 9015

-25V

F+

F-

-25V

GND

+5V

CN5

5P2.0

R25

1.2K

D20

25V 1/2W

A B

更改

设计

数量

更改单号

审核

签名

标准化

日期

批准

开关电源原理图

SWITCH POWER SUPPLY

板号 5DW9919-1

BBK

第 1 张共 1 张版次 1.0

广东步步高电子工业有限公司

E C

100

PARTS LIST MAIN BOARD

ITEM

0090001 CHIP RESISTOR

0090296 CHIP RESISTOR

0090004 CHIP RESISTOR

0090005 CHIP RESISTOR

0090220 CHIP RESISTOR

0090291 CHIP RESISTOR

DESCRIPTION

0090273 CHIP RESISTOR

0090181 CHIP RESISTOR

0090221 CHIP RESISTOR

0090232 CHIP RESISTOR

0090007 CHIP RESISTOR

0090009 CHIP RESISTOR

0090011 CHIP RESISTOR

0090013 CHIP RESISTOR

0090014 CHIP RESISTOR

0090175

EXACTITUDE CHIP

RESISTOR

1/16W 0 Ω ±5% 0603

1/16W 18 Ω ±5% 0603

1/16W 22 Ω ±5% 0603

1/16W 33 Ω ±5% 0603

1/16W 51 Ω ±5% 0603

1/16W 56 Ω ±5% 0603

1/16W82 Ω ±5% 0603

1/16W 100 Ω ±5% 0603

1/16W 120 Ω ±5% 0603

1/16W 150 Ω ±5% 0603

1/16W 180 Ω ±5% 0603

1/16W 330 Ω ±5% 0603

1/16W 470 Ω ±5% 0603

1/16W 680 Ω ±5% 0603

1/16W 1K ±5% 0603

1/10W 1.18K ±1% 0805

QTY LOCATION

L5,R70,R72,R83,R84,R90,R101,R115,R137,R140,R

148

R151,R154,R156,R158,R160,R164,R166,R168,R170,

R172

R19,R20,R21,R23,R24,R26,R27,R28,R29,R30,R31,

R32,R33,R34,R35,R52,R53,R55,R57,R65,R119,R12

2,R123,R124,R125,R134,R139,R214

8 R76,R162,R163,R174,R175,R219,R220,R221

R44,R45,R46,R47,R48,R49,R50,R51,R54,R56,R58,

R59,R60,R61,R62,R63,R64,R66,R67,R68,R117

R120,R121,R126,R127,R153,R155,R157,R159,R161,

R165,R167,R169,R171

3 R102,R103,R104

1 R176

1 R79

2 R212,R213

1 R188

1 R78

1 R184

4 R105,R135,R138,R141

3 R132,R133,R223

1 R43

0090017 CHIP RESISTOR

0090019 CHIP RESISTOR

0090020 CHIP RESISTOR

0090225 CHIP RESISTOR

0090185 CHIP RESISTOR

0090021 CHIP RESISTOR

0090023 CHIP RESISTOR

0090024 CHIP RESISTOR

0090034 CHIP RESISTOR

0090109 CHIP RESISTOR

0100028 CHIP RESISTOR

0100019 CHIP RESISTOR

0100030 CHIP RESISTOR

0260190 ELEC.CAP

0260033 ELEC.CAP

0260019 ELEC.CAP

0260025 ELEC.CAP

0260570 ELEC.CAP

0260027 ELEC.CAP

0260028 ELEC.CAP

0260214 ELEC.CAP

0310043 CHIP CAP

0310190 CHIP CAP

0310044 CHIP CAP

0310045 CHIP CAP

0310192 CHIP CAP

0310047 CHIP CAP

0310049 CHIP CAP

0310066 CHIP CAP

0310231 CHIP CAP

1/16W 2.2K ±5% 0603

1/16W 4.7K ±5% 0603

1/16W 5.1K ±5% 0603

1/16W 5.6K ±5% 0603

1/16W 6.2K ±5% 0603

1/16W 6.8K ±5% 0603

1/16W 10K ±5% 0603

1/16W 15K ±5% 0603

1/16W 100K ±5% 0603

1/16W 1M Ω ±5% 0603

1/16W22 Ω ±5% 8P

1/16W33 Ω ±5% 8P

1/16W51 Ω ±5% 8P

CD110 50V1U±20%5×11 2

CD11 25V3.3U±20%5×11 2

CD11 16V10U±20%5×11 2

CD11 16V47U±20%5×11 2

CD11T 16V47U±20%5×11 2

CD11 16V100U±20%6×12 2.5

CD11 16V220U±20%6×12 2.5

CD11 16V330U±20%8×12 3.5

50V 22P ±5% NPO 0603

50V 27P ±5% NPO 0603

50V 33P ±5% NPO 0603

50V 47P ±5% NPO 0603

50V 56P ±5% NPO 0603

50V 101 ±5% NPO 0603

50V 221 ±5% NPO 0603

50V 102 ±10% 0603

50V 122 ±10% 0603

R88,R89,R128,R218,R222,R228,R230,R231,R232,C

221

2 R91,R106

1 R130

6 R190,R191,R192,R193,R194,R195

1 R116

2 R185,R189

R1,R2,R3,R4,R5,R7,R8,R9,R11,R12,R13,R14,R15,R

18,R22,R25,R36,R37,R38,R39,R40,R41,R69,R71,R7

3,R82,R92,R131,R136,R142,R173,R177,R210,R211,

R215

2 R143,R144

1 R226

1 R118

6 RP16,RP18,RP20,RP22,RP24,RP26

8 RP27,RP28,RP29,RP30,RP31,RP32,RP33, RP34

RP1,RP2,RP3,RP4,RP5,RP6,RP7,RP8,RP9,RP10,R

P11,RP12,RP13,RP14,RP15,RP17,RP19,RP21,RP23

,RP25

1 C164

2 C265,C266

C102,C144,C168,C193,C210,C215,C253,C254,C255,

C256,C257,C258,C287,C295,C270

2 C169,C188

8 C4,C23,CA5,C103,C131,C170,CA1,CA2

4 C178,C179,C222,C223

6 CA3,CA4,C184,C186,C196,C250

5 C182,C194,C296,C298,C299

1 C159

4 C1,C2,C160,C161

2 C198,C200

5 C290,C291,C292,C293, C294

1 C163

6 C237,C239,C243,C245,C248,C252

1 C166

C14,C15,C16,C33,C34,C35,C46,C47,C48,C56,C82,

C83,C84,C87,C88,C95,C96,C97,C100,C101,C111,C

112,C113,C120,C121,C122,C123,C128,C129,C130,C

137,C138,C139,C140,C145,C155,C281,C282

6 C259,C260,C261,C262,C263,C264

101

PARTS LIST MAIN BOARD

ITEM

0310072 CHIP CAP

0310207 CHIP CAP

DESCRIPTION

49 0310505 CHIP CAP

49.1

0310112 CHIP CAP

0310216 CHIP CAP

0310219 CHIP CAP

0390052 FERRITE BEAD

0390096 CHIP INDUCTOR

0390142 CHIP BEAD

0700007 CHIP DIODE

0780041 CHIP TRANSISTOR

0780040 CHIP TRANSISTOR

0881935 IC

0881814 IC

0881815 IC

0881816 IC

0881818 IC

0881819 IC

0881820 IC

0881127 IC

0881821 IC

0881936 IC

0881057 IC

0881059 IC

0960171 CRYSTAL

0960169 CRYSTAL

0960229 CRYSTAL

1631645 PCB

1940005 SOCKET

1940046 SOCKET

1940030 SOCKET

1940224 SOCKET

1940161 SOCKET

1940120 SOCKET

1940062 SOCKET

3580117 RADIATOR

50V 103 ±10% 0603

50V104 ±20% 0603

25V 224 +80%-20% 0603

16V 224 ±10% 0603

10V 105 +80%-20% 0603

16V 106 +80%-20% 1206

1.8UH ±10% 1608

FCM1608-601T02

1N4148

3906

3904

DMN-8602 BGA

LP2995 SOP

M13S128168A-6T TSOP

SN74HCT14PWR TSSOP

SN74ALVCH16373 TSSOP

TSB41AB1PHP QFP

PQ018EZ02ZP

RT9164-33CG SOT-223

PQ025EZ01ZP

TVP5146 PQFP

CS4360 SSOP

CS5333 SSOP

13.50MHZ 49-S

24.576MHz 49-S

14.31818MHZ 49-S

2DW9916-3

6P 2.0mm

10P 2.0mm

4/3P1.0mm

12/12P1.0mm

13/13P1.0mm

20/20P 2.5mm

28×28×12 BBK9906(HK)

QTY

LOCATION

C7,C10,C36,C37,C49,C51,C53,C54,C59,C60,C63,C

66,C67,C72,C73,C78,C79,C91,C92,C171,C172,C173

,C191,C269

135

C3,C5,C6,C8,C9,C12,C13,C17~C22,C27~C32,C40~

C45,C50,C52,C55,C57,C58,C61,C62,C64,C65,C68~

C71,C74~C77,C80,C81,C85,C86,C89,C90,C93,C94,

C98,C99,C104~C110,C115~C119,C125,C126,C127,

C132~C136,C146,C147,C153,C154,C156,C157,C162

,C167,C174~C177,C180,C181,C183,C185,C187,C18

9,C190,C192,C195,C197,C199,C201~C209,C211~C2

14,C216~C220,C224~C233,C267,C268,C271,C272,C

273,C285,C286,C288,C289,C297,C300,C301

1 U11

1 U12

1 U13

1 U14

1 U15

1 U17

1 Y1

1 Y2

1 Y3

1 CN1

1 CN4

1 CN6

1 CN2

1 CN3

1 CN5

1 J3

1 FOR U1

1 C165

2 C283,C284

10 C11,C24,C25,C26,C38,C39,C114,C124,C141,C152

2 L21,L22

6 L15,L16,L17,L18,L19,L20

FB1,FB2,FB5,FB6,FB7,FB8,FB9,FB10,FB11,FB12,

FB13,FB14,FB15,FB16,FB17,FB18,FB19,FB20,FB2

1,FB22,FB23,FB24,FB25,FB26,FB27,FB28,FB29,F

B30,FB31,FB32,FB33,FB34,FB35,L6,L7,L8,L10,

L11,L12,L13,L14,L1,L2,L3,L4

5 D2,D3,D5,D6,D8

1 Q1

1 Q2

1 U1

1 U2

2 U3,U4

1 U5

1 U7

1 U10

102

MAIN PANEL BOARD

No.

12.1

23.1

27.1

DESCRIPTION

0000268 Carbon Resistor

0000118 Carbon Resistor

0000122 Carbon Resistor

0000133 Carbon Resistor

0000129 Carbon Resistor

0000137 Carbon Resistor

0000488 Carbon Resistor

0000475 Carbon Resistor

0000667 Carbon Resistor

0200124 CER.CAP

0200131 CER.CAP

0200132 CER.CAP

0200138 CER.CAP

0200167 CER.CAP

0200212 CER.CAP

0260209 CD

0260241 CD

0260196 CD

0260200 CD

0570006 Diode

1/4W2.2 ±5%

1/6W10 ±5%

1/6W100 ±5%

1/6W4.7K±5%

1/6W1K±5%

1/6W10K±5%

1/6W220 ±5%

1/6W2.7K±5%

1/6W270K±5%

50V 102 ±20% 5mm

50V 103 ±10% 5mm

50V 103 ±20% 5mm

50V 104 ±20% 5mm

50V 20P ±10% NPO 2.5mm

50V 30P ±5% NPO 2.5mm

CD11 50V22U±20%5×11 2

CD11C 16V4.7U±20%4×7 1.5

CD11C 16V10U±20%4×7 1.5

CD11C 16V47U±20%5×7 2

1N4148

0620151 led 2B 53SD blue 2×5×7

0780033 Diode

0780032 Diode

0780050 Transistor

0881013 IC

0960017 Crystal

0960114 Crystal

1200639 VFD

1200633 VFD

1340003 Switch

1563255 PCB

2100003 Line

9015C

9014C

S8050D

D16316 QFP

32.768KHz 3×9

5.00MHZ 49-S

HNV-06SC29 blue

GTD-637B

6×6×1

4DW9919-2

0.6 7.5mm

QUALITY

J9~J17

LOCATION

R13

R12

R20,R15,R21

R2,R11,R9

R4,R5,R6,R14,R16

R7,R8

R17,R18,R19

C15

C3,C5,C8,C13

C9,C10

C6,C7

C11

C14

C12

D1~D8

LD2,LD3

Q2,Q3

Q4,Q1

VFD1

K1~K15

103

No.

MAIN PANEL BOARD

DESCRIPTION

2100010 Line

2100004 Line

2121546 Line

2121626 Line

2121548 Line

2121545 Line

2110336 Line

0.6 5mm

0.6 10mm

10P150 2.0

5P450 2.0

2P100 2.0

4P140 2.0

20# 150mm

2110429 Line 20# 90mm

2360016 Remote Receiving HS0038B3V

QUALITY

LOCATION

J4,J5,J6,J7,J8

J1,J2,J3

CN2 ( connect to main board CN4)

CN1 (connect to power boardCN5)

CN3 (connect to VCR PCB)

CN4

GND

GND1

104

POWER BOARD

No.

DESCRIPTION QUALITY

0000368 Carbon Resistor

0000163 Carbon Resistor

0000208 Carbon Resistor

0000209 Carbon Resistor

0000215 Carbon Resistor

0000172 Carbon Resistor

0000279 Carbon Resistor

0000283 Carbon Resistor

0000213 Carbon Resistor

0000294 Carbon Resistor

0000301 Carbon Resistor

0000361 Carbon Resistor

0010101 Metal Film Resistor

1/4W1.8K±5%

1/4W10 ±5%

1/4W4.7K±5%

1/4W5.1K±5%

1/4W9.1K±5%

1/4W75 ±5%

1/4W470 ±5% shape10

1/4W1K±5%shape10

1/4W7.5K±5%

1/4W10K±5%shape10

1/4W47K±5%shape10

1/4W1.2K±5%

1/4W12K±1% 1

0010103 Metal Film Resistor 1/4W8.2K±1% 1

0010132 Metal Oxide Resistor 2W39K±5% 1

0010235 Metal Oxide Resistor 1/2W36K±5% 2

LOCATION

R22

R7,R10,R13

R17

R24

R15

R21

R3,R23,R19,R20

R14,R25

R16

R11

R1,R6

0070001 High Voltage Resistor 1/2W680K±5%

0200100 CER.CAP

0200123 CER.CAP

0200139 CER.CAP

50V 473 ±20% 2.5mm

50V 102 ±10% 5mm

50V 104 +80%-20% 5mm

0200143 瓷片电容

0200225 CAP

0200232 CER.CAP

0200268 CAP

0210066 CAP

25.1

0210070 CAP

0260581 CD

0260564 CD

0260622 CD

0260558 CD

0260582 CD

1000V 102 ±10% 7.5mm

400VAC 222 ±20% 10mm

500V 101 ±10% 5mm

CT81 400V221±10% 10mm

275V 104 ±20% 15mm

275V 104 ±10% 15mm

CD11T 25V100U±20%6×12 2.5

CD11T 50V10U±20%5×11 2

CD11T 50V100U±20%8×12 3.5

CD11T 25V470u±20%10×16 5

CD11T 25V10U±10%5×11 2

RV1

C10

C2,C7,C8,C11,C12,C15,C16,C20,

C21, C22 ,C23,C25

C17,C18,C19,C24

C3,C14

C13

CE1,CE2,CE12,CE16,CE20,CE23

CE21

CE19

CE4

CE7,CE22

105

POWER BOARD

No.

0260559 CD

0260400 CD

0260583 CD

0260442 CD

0260443 CD

0260621 CD

0260584 CD

0390052 Ferrite bead

0410077 Inductor

0410171 Inductor

0410065 Inductor

0570005 Diode

0570007 Diode

0570013 Diode

0570018 Diode

0570053 Diode

0580006 Zener

0580033 Zener

0580048 Zener

0580025 Zener

0680047 Diode

51.1

0680056 Diode

0580014 Zener

0780138 Diode

0780286 Diode

0780033 Diode

0780032 Diode

56.1

0780023 Diode

0790024 Mosfet

57.1

0790025 Mosfet

57.2

0790028 Mosfet

0880553 IC

58.1

0880581 IC

DESCRIPTION

CD11T 50V47u±20%6×12 2.5

GZ 25V1000U±20%10×25 5

CD11T 16V220U±20%6×12 2.5

GZ 10V2200U±20%10×24 5

GZ 10V1000U±20%8×16 3.5

CD11T 63V220U±20 10×20 5

LT 400V100U±20%22×30 10

10UH 3A 5mm

30uH 3A 5mm

20UH 3A 5mm

1N4007

1N5401

HER105

HER303

FR207 DO-15

5.1V 1/2W

5.6V 1/2W

22V 1/2W

27V 1W

PBYR10100 TO-220

SR10A0 TO-220

25V 1/2W

8050D

2SD669A TO-92

9015C

9014C

2N3904

1PP14N03L TO-220

AP40N03P TO-220

1PP15N03L TO-220

LM431ACZ TO-92

TL431C TO-226AA(LP)

QUALITY

LOCATION

CE11,CE13,CE14

CE3

CE15,CE17

CE6,CE9

CE8,CE10

CE18

CE5

L1,L4

L2,L3,L5

D9,D10,D11,D12

D14,D15

D3,D5

D20

Q1,Q2

D1,D6,D7,D8,D16

D13

D19

D17

D18

D3,D5

Q1,Q2

IC3,IC5,IC6

106

POWER BOARD

No.

DESCRIPTION

58.2

0880800 IC

0881326 IC

0881934 IC

1000004 Power Net Filter

1050002 Therm Resistor

1080005 Opto Coupling

63.1

1080006 Opto Coupling

63.2

1080007 Opto Coupling

63.3

1080011 Opto Coupling

63.4

1080016 Opto Coupling

1940001 Socket

1940004 Socket

1940005 Socket

431L TO-92

PQ12RD21 TO-220

FSDM0565R TO-220F-6L

UT-20 40mH ±20% 10×13

NTC SCK-104MS±20%

NEC2561

PC817

NEC2501

HS817

K1010 C

2pin 2.5mm

5pin 2.5mm

6pin 2.0mm

1940024 Socket

1940030 Socket

5pin 2.0mm

10pin 2.5mm

1940037 Socket

1940045 Socket

4pin 3.96mm

2 芯 8.0mm 2#

0460427 Power Switch transformeBCK-28-0534

1563252 PCB 5DW9919-1

QUALITY

LOCATION

IC2

CN1

CN2

CN6

IC3,IC5,IC6

IC4

IC1

LF1

RT1

IC2

CN5

CN3

CN4

BCN1

107

No.

PART

0000276 Carbon Resistor

0090001 Chip Resistor

0090003 Chip Resistor

0090004 Chip Resistor

0090006 Chip Resistor

0090007 Chip Resistor

0090008 Chip Resistor

0090009 Chip Resistor

0090011 Chip Resistor

0090014 Chip Resistor

0090223 Chip Resistor

0090017 Chip Resistor

0090018 Chip Resistor

0090019 Chip Resistor

0090020 Chip Resistor

0090021 Chip Resistor

0090186 Chip Resistor

0090023 Chip Resistor

0090187 Chip Resistor

0090024 Chip Resistor

0090025 Chip Resistor

0090026 Chip Resistor

0090028 Chip Resistor

0090029 Chip Resistor

0090034 Chip Resistor

0090181 Chip Resistor

0090189 Chip Resistor

0090242 Chip Resistor

0260019 CD

0260025 CD

AV BOARD

DESCRIPTION LOCATION

1/4W100 ±5% Shape10 2 R153,R152

1/16W 0 ±5% 5 R16,R22,R209, R120,R121

1/16W 10 ±5%

1/16W 22 ±5%

1/16W 75 ±5% 0603

1/16W 180 ±5%

1/16W 220 ±5%

1/16W 330 ±5%

1/16W 470 ±5%

1/16W 1K ±5%

1/16W 2K ±5% 0603

3 R66,R67,R144

1 R124

5 R136,R139,R149,R150, R135

5 R39,R47,R98,R104,R108

3 R1,R65,R111

6 R52,R61,R73,R80,R85,R92

6 R40,R48,R99,R105,R109,R172

10 R57,R58,R76,R77,R88,R89,R112,R155,R202,

2 R156,R171

R148

1/16W 2.2K ±5%

1/16W 3.3K ±5%

1/16W 4.7K ±5%

4 R68,R145,R180,R204,

5 R12,R15,R138,R151,R183

R141

R50,R51,R59,R60,R71,R72,R78,R79,R83,R84,R90,R91,R125

,R147,R170,R200,R169, R166,R178

1/16W 5.1K ±5%

1/16W 6.8K ±5%

1/16W 7.5K ±5% 0603

1/16W 10K ±5%

1/16W 12K ±5% 0603

3 R7,R146,R143

9 R36,R38,R44,R46,R97,R103,R107,R168, R165

2 R182,R179

10 R11,R14,R23,R116,R117,R118,R137,R142,R154,R157

R94,R102,R106,R113,R114, R164 ,R167,R4,R5,R19,R21,R33,

R34

6 R2,R3,R17,R20,R28,R29 1/16W 15K ±5%

1/16W 20K ±5%

1/16W 22K ±5%

1/16W 33K ±5%

1/16W 47K ±5%

1/16W 100K ±5%

1/16W 100 ±5%

1/16W 30K ±5%

1/16W 75K ±5%

6 R49,R55,R70,R75,R82,R87

1 R62

2 R54,R63

7 R53,R64,R74,R81,R86,R93,R140

2 R56,R201

3 R119,R162,R163

1 R69

1 R115

CD11 16V10U±20%5×11 16

C29,C34,C49,C53,C57,C61,C64,C76,C78,C90,C93,C109,

C110,C111,C114,C25

CD11 16V47U±20%5×11 10 C1,C7,C9,C38,C43,C82,C99,C102,C104,C118

108

AV BOARD

No.

PART

0260027 CD

0260028 CD

0260067 CD

0260127 CD

0260001 CD

0260211 CD

0310047 Chip Capasitor

0310048 Chip Capacitor

0310066 Chip Capasitor

0310067 Chip Capacitor

0310072 Chip Capasitor

0310188 Chip Capacitor

0310192 Chip Capasitor

0310196 Chip Capacitor

0310202 Chip Capacitor

0310207 Chip Capasitor

48 0310379 Chip Capacitor

48.1

0310542 Chip Capacitor

0390095 Chip Bead

0390142 Chip Bead

0580007 Zener

0580008 Zener

0680057 ChipSchottky

0580054 Zener

0700007 Chip Diode

0700056 Chip Double Diode

0780040 Chip Transistor

DESCRIPTION LOCATION

CD11 16V100U±20%6×12 3 C11,C37,C129

CD11 16V220U±20%6×12 10 C16,C22,C23,C66,C67,C69,C136,C153,C154,C164

CD11 50V2.2U±20%5×11 13

C123,C124,C125,C126,C134,C140,C141,C142,C144,C146,C1

48,C149,C150

CD11 16V4.7U±20%5×11 9 C3,C4,C5,C6,C13,C14,C15,C19,C20

CD11 16V22U±20%5×11 2 C143,C147

CD11 50V3.3U±20%5×11 1 C73

50V 101 ±5% NPO 0603 1 C79

50V 151 ±5% NPO 0603 6 C28,C33,C48,C52,C56,C60

50V 102 ±10% 0603 15

C18,C30,C31,C35,C36,C50,C51,C54,C55,C58,C59,C62,C63,

C87,C88

50V 152 ±10% 0603

50V 103 ±10% 0603

1 C91

5 C10,C12,C17,C32,C94

50V 10P ±5% NPO 0603 2 C85,C89

50V 56P ±5% NPO 0603 2 C80,C83

50V 471 ±10% 0603

50V 223 ±10% 0603

50V104 ±20% 0603

1 C92

1 C131

C2,C8,C21,C39,C40,C41,C42,C44,C45,C46,C47,C65,C68,C7

5,C77,C81,C98,C100,C103,C105,C106,C119,C120,C127,C12

8,C130,C132,C133,C135,C137,C138,C139,C155,C157,C158,

C163,C165,C24

25V 474 +80%-20% 0603 6 C70,C71,C72,C74,C84,C86

16V 474±10% 0603

FCM1608K-221T05

FCM1608-601T02

6 C70,C71,C72,C74,C84,C86

FB3~FB12,R6,R10,R13,R24,R27,R31,R35,R37,R42,R95,R96,

R100,R101,

2 FB1,FB2

R134

6.2V 1/2W

8.2V 1/2W

LL60P MINI-MELF

9.1V 1W

1N4148

MMBD4148SE SOT-23

3904

2 D1,D2

1 D11

1 D24

1 D21

10 D16,D18,D20,D25~D28,D30,D31,D32

5 D13,D14,D15,D17,D19

25 Q1~Q5,Q8~Q16,Q21~Q27,Q29,Q32, Q33 ,Q36

109

No.

PART

57.1

0780062 Chip Transistor

58 0780041 Chip Transistor

58.1

0780063 Chip Transistor

59 0880443 IC

59.1

0881429 IC

0881226 IC

0881693 IC

0881992 IC

0882267 IC

0882304 IC

0960238 Crystal

1020023 Tuner

70 1090009 Optical Output

70.1

1090024 Optical Output

1631956 PCB

1860051 SCART Socket

1910059 Socket

1910062 Socket

1910063 Socket

1940004 Socket

1940057 Socket

1940023 Socket

1940120 Socket

1940161 Socket

1940224 Socket

AV BOARD

DESCRIPTION

9014C

3906

9015C

CD4052BCN DIP

CD4052BE DIP

RC4558D SOP

TL 74HC4052D SOP

74HC4053D SOP

FSAV330 TSSOP

MM1313AD SDIP

2 U10,U11

2 U7,U8

1 U12

18.432MHz ±10PPM 49-S 1 X2

JS-6B2F/L121-D5 1 TUN1

GP1F32T

TX179AT

1 OP1

7DW9919-3

CS-09

AV2-8.4--6G

AV12-8.4--2G-2

5pin 2.5mm

5pin 1.25mm

7pin 2.0mm

13pin 1.0mm

12pin 1.0mm

4/3pin 1.0mm

1 SC1

2 S2,S3

1 S1

1 S4

1 CN4

1 CN5

1 CN3

1 CN2

1 CN1

1 CN6

LOCATION

25 Q1~Q5,Q8~Q16,Q21~Q27,Q29,Q32, Q33 ,Q36

5 Q6,Q7,Q28,Q35,Q37

1 U1

3 U3,U4,U5

1 U9

110

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