System for controlling an array of point-of

System for controlling an array of point-of
USOO7836322B2
(12) United States Patent
(10) Patent N0.:
Chapuis et a].
(54)
(45) Date of Patent:
Nov. 16, 2010
SYSTEM FOR CONTROLLING AN ARRAY OF
4,204,249 A
5/1980 Dye et a1.
POINT-OF-LOAD REGULATORS AND
AUXILIARY DEVICES
4,328,429 A
4,335,445 A
4,350,943 A
5/1982 Kublick et a1.
6/1982 Nercessian
9/1982 Pritchard
(75) Inventors: Alain Chapuis, Riedikon (CH); Mikhail
Guz, San Mateo, CA (US)
(73) Assignee: Power-One, Inc., Camarillo, CA (US)
( * ) Notice:
(Continued)
FOREIGN PATENT DOCUMENTS
CN
2521825
Subject to any disclaimer, the term of this
patent is extended or adjusted under 35
Oct. 30, 2007
(65)
(
)
Primary ExamineriThuan N Du
(74) Attorney, Agent, or Firm4O’Melveny & Myers LLP
Prior Publication Data
US 2008/0052551 A1
OTHER PUBLICATIONS
I2C-Bus Speci?cation, The Version 2.1, Jan. 1, 2000; Document
Order No. 9398 393 40011, pp. 1-46.
Continued
APPI NO; 11/930,049
(22) Filed:
11/2002
(continued)
U.S.C. 154(b) by 601 days.
(21)
US 7,836,322 B2
Feb. 28, 2008
(57)
ABSTRACT
Related U-s- Application Data
A power control system comprises at least one programmable
(63) Continuation_in_pan of application NO 11/760,660,
voltage regulator, at least one non-programmable auxiliary
?led on Jun 8 2007 which is a continuation of appli_
cation NO_ 1 1 6 54 5 5’0 ?led on Feb 14 2006 HOW Pat
voltage regulator, and a system controller operatively con
nected to the at least one programmable voltage regulator and
NO_ 7 266 709_
to said at least one auxiliary voltage regulator via a common
3
s
s
s
s
3
serial data bus. The at least one programmable voltage regu
(51) Int CL
G06F 1/26
lator is adapted to provide a corresponding output voltage
having characteristics de?ned by received programming data
(200601)
(52)
us. Cl. ...................... .. 713/340- 713/320- 323/282
and to PrOVide monitoring data re?ecting Operational Status of
(58)
Field of Classi?cation Search
the at least one programmable voltage regulator. The at least
3
3713620
323/282’
one non-programmable auxiliary voltage regulator is adapted
See application ?le for complete search hist’ory~
to provide a corresponding output voltage in response to an
enable signal. The system controller is adapted to send the
References Cited
P ro gramming data and receive the monitorinS data via the
US. PATENT DOCUMENTS
serial data bus. A data monitoring circuit is operatively
coupled to the at least one auxiliary voltage regulator to
56
3,660,672 A
4,021,729 A
5/1972 Berger et 31,
5/ 1977 Hudson
4,147,171 A
4/1979 Greene et a1.
4,194,147 A
3/1980 Payne et a1.
receive analog measurements therefrom and communicate
corresponding monitoring data to the system controller.
18 Claims, 7 Drawing Sheets
100~\
. n 111:“
53‘ 399 ‘T—T—“Q
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End ADDRED POLO ADDRE> POL1 ADDRq) POLZ ADDRQ pom ADDRED POLn
\104
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112
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Intermediate Bus
V01
V02
V03
US 7,836,322 B2
Page 2
US. PATENT DOCUMENTS
4,451,773
4,538,073
4,538,101
4,607,330
A
A
A
A
5/1984
8/1985
8/1985
8/1986
Papathomas et a1.
Freige etalShimpo etal
McMurrayet a1.
6,157,093
6,157,182
6,160,697
6,163,143
6,163,178
6,170,062
A
A
A
A
A
B1
12/2000
12/2000
12/2000
12/2000
12/2000
1/2001
Giannopoulos et a1.
Tanakaet a1.
Edel
Shimamori
Starket a1.
Henrie
4,616,142 A
10/1986 Upadhyay 9t 91-
6,177,783 B1*
1/2001
Donohue .................. .. 323/272
4,622,627
4,630,187
4654769
4677566
4,761,725
4,940,930
4988942
5,004,972
5,053,920
5,073,848
5,079,498
5,117,430
5,168,208
5,229,699
5,270,904
11/1986
12/1986
3/1987
6/1987
8/1988
7/1990
1/1991
4/1991
10/1991
12/1991
1/1992
5/1992
12/1992
7/1993
12/1993
6,177,787
6,181,029
6,191,566
6,194,856
6,194,883
6,198,261
6,199,130
6,208,127
6,211,579
6,246,219
6,249,111
6,262,900
6,288,595
6,291,975
6,294,954
1/2001
1/2001
2/2001
2/2001
2/2001
3/2001
3/2001
3/2001
4/2001
6/2001
6/2001
7/2001
9/2001
9/2001
9/2001
Hobrecht
Berglundet a1.
Petricek etal.
Kobayashietal.
Shimamori
Schultz et a1.
Berglundet a1.
Doluca
Blair
Lynch et al‘
Nguyen
Suntio
Hirakataetal.
Snodgrass
Melanson
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
Rodriguez et a1.
HenZe
Middlebrook
Whittaker 9t 91HenZe
DetWeiler
Ekstrand
Roth
Staf?ere etal.
Steigerwald et al.
Cleasbyet a1.
Berglund
Schultz etalChu etal~
GulCZynski
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
5,272,614 A
12/1993 Brunk er 91-
6,298,449 B1*
10/2001
Carter ...................... .. 713/340
5287055
5,325,062
5349523
5377090
5398029
5426425
5,440,520
5,481,140
5,489,904
5508606
2/1994
6/1994
9/1994
12/1994
3/1995
6/1995
8/1995
1/1996
2/1996
4/1996
6,304,066
6,304,823
6,320,768
6,351,108
6,355,990
6,366,069
6,370,047
6,373,334
6,385,024
6,392,577
10/2001
10/2001
11/2001
2/2002
3/2002
4/2002
4/2002
4/2002
5/2002
5/2002
Wilcox et a1.
Smit et a1.
Pham et a1.
Burnstein et a1.
Mitchell
Nguyen et a1.
Mallory
Melanson
Olson
Swanson et a1.
A
A
A
A
A
A
A
A
A
A
5,532,577 A
5,610,826 A
5,627,460
5,631,550
5,646,509
5,675,480
5,684,686
5,727,208
5,752,047
A
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5,774,733 A *
5,815,018
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5,870,296
5,872,984
5,874,912
5,883,797
5,889,392
5,892,933
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5,917,719
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A
A
A
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A
A
A
A
A
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CinietaL
B119th 81 91Inou etal
Steigerwald
Toyama 9t 91Conrad etal
SchutZ et a1.
Maruyama 9t 91Hadidi
Ryczek
7/1996 Doluca
3/1997 Whetsel
5/1997 Bazinet et a1.
5/1997
7/1997
10/1997
11/1997
3/1998
5/1998
Castro etalBerglund et a1.
Stanford
Reddy
Brown
Barty etal~
6/1998 Nolan et a1. .............. .. 713/300
9/1998
12/1998
2/1999
2/1999
2/1999
3/1999
3/1999
4/1999
5/1999
6/1999
7/1999
7/1999
Soborski
Bhagwat
Schaffer
Berglund et a1.
Hasegawn
Ammo 9t 91Moore etal~
VoltZ
Bryson
Hoffman etal~
Boylan etal
Dobkin et 31.
B1
B1
B1
B1
B1
B1
B1
B1
B1
B1
6,396,169 B1
6,396,250 B1
6,400,127 B1
5/2002 Voeglietal.
5/2002 Bridge
6/2002 Giannopoulos
6,411,071
6,411,072
6,414,864
6,421,259
6,429,630
6,448,745
6/2002
6/2002
7/2002
7/2002
8/2002
9/2002
B1
B1
B1
B1
B2
B1
6,448,746 B1
6,456,044
6,465,909
6,465,993
6,469,478
6,469,484
6,476,589
6,556,158
6,559,684
6,563,294
6,583,608
6,590,369
6,608,402
B1
B1
B1
B1
B2
B2
B2
B2
B2
B2
B2
B2
5935252 A
8/1999 Berglund etal~
6,614,612 B1
5,940,785 A *
8/1999 Georgiou et a1. .......... .. 702/132
6,621,259 B2
5943227
5,946,495
5,990,669
5,994,885
6,005,377
6,021,059
6,055,163
6057607
6,079,026
6,100,676
6111396
6,115,441
6,121,760
6,136,143
6,137,280
6,150,803
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
8/1999
8/1999
11/1999
11/1999
12/1999
2/2000
4/2000
5/2000
6/2000
8/2000
8/2000
9/2000
9/2000
10/2000
10/2000
11/2000
Bryson er 91Scholhameret 31.
Brown
Wilcox et a1.
Chen etal~
Kennedy
WagneretaL
RaderllletalBerglund et a1.
Burstein et a1.
Line etal
Douglass etal
Marshall et :11.
Winter et :11.
Ackermann
Varga
6,651,178
6,665,525
6,683,494
6,686,831
6,693,811
6,717,389
6,731,023
6,744,243
6,771,052
6,778,414
6,788,033
6,788,035
6,791,298
6,791,302
6,791,368
6,795,009
B1
B2
B2
B2
B1
B1
B2
B2
B2
B2
B2
B2
B2
B2
B2
B2
Schultz et a1.
Feldman
Hoshi
Brooks etal.
Pohlman et a1.
Killat
9/2002 Carlson
9/2002
10/2002
10/2002
10/2002
10/2002
11/2002
4/2003
5/2003
5/2003
6/2003
7/2003
8/2003
Darmawaskita
Soo et a1.
Clarkin et a1.
Cumin
L’Hermite et a1.
Ummingeretal.
Steensgaard-Madsen
Goodfellow
Duffy et a1.
Zafarana et a1.
Burstein et a1.
500 et al‘
9/2003 Menegolietal.
9/2003 Jones et al,
11/2003
12/2003
1/2004
2/2004
2/2004
4/2004
5/2004
6/2004
8/2004
8/2004
9/2004
9/2004
9/2004
9/2004
9/2004
9/2004
Voegeli et a1.
Dent etal‘
Stanley
Cook
Bowman et a1.
Johnson
Rothleitner et al.
Daniels et a1.
Ostojic
Chang et al‘
Vinciarelli
Bassettetal.
Shenai et :11.
Tang et a1.
Tzeng etal.
Duffy et a1.
US 7,836,322 B2
Page 3
6,801,027
6,807,070
6,816,758
6,819,537
6,825,644
6,828,765
6,829,547
6,833,691
6,850,046
6,850,049
6,850,426
6,853,169
6,853,174
6,888,339
6,903,949
6,911,808
6,915,440
6,917,186
6,928,560
6,933,709
6,933,711
6,936,999
6,947,273
6,949,916
6,963,190
6,965,220
6,965,502
6,975,494
6,975,785
6,977,492
7,000,125
7,000,315
7,002,265
7,007,176
7,023,192
7,023,672
7,047,110
7,049,798
7,068,021
7,080,265
7,141,956
7,190,754
7,266,709
7,301,313
7,315,157
7,315,160
7,359,643
7,394,445
7,584,371
2001/0052862
2002/0070718
2002/0073347
2002/0075710
2002/0104031
2002/0105227
2002/0144163
2003/0006650
2003/0067404
2003/0122429
2003/0137912
2003/0142513
2003/0201761
2004/ 0080044
2004/0093533
2004/0123164
2004/0123167
2004/0174147
2004/0178780
2004/0189271
2004/0201279
2004/0225811
2004/ 0246754 A1
2005/0093594 A1
10/2004
10/2004
11/2004
11/2004
11/2004
12/2004
12/2004
12/2004
2/2005
2/2005
2/2005
2/2005
2/2005
5/2005
6/2005
6/2005
7/2005
7/2005
8/2005
8/2005
8/2005
8/2005
9/2005
9/2005
11/2005
11/2005
11/2005
12/2005
12/2005
12/2005
2/2006
2/2006
2/2006
2/2006
4/2006
4/2006
5/2006
5/2006
6/2006
7/2006
11/2006
3/2007
9/2007
11/2007
1/2008
1/2008
4/2008
7/2008
9/2009
12/2001
6/2002
6/2002
6/2002
8/2002
8/2002
10/2002
1/2003
4/2003
7/2003
7/2003
7/2003
10/2003
4/2004
5/2004
6/2004
6/2004
9/2004
9/2004
9/2004
10/2004
11/2004
12/2004
5/2005
Hann et al.
Ribarich
Maxwell, Jr. et al.
Pohlman et al.
Kernahan et al.
Schultz et al.
2005/0117376 A1
2005/0146312 A1
2005/0200344
2005/0289373
2006/0022656
2006/0085656
A1
A1
A1
A1
Law et al.
2006/0132108 A1*
Chapuis
Chapuis
Kojori et al.
2006/ 0149396
2006/0174145
2006/0244570
2006/0250120
Burstein et al.
Inn
2007/0114985 A1
2008/0074373 A1
Travaglini et al.
2008/0238208 A1
Kono
Ribarich
Shimamori
Berglund et al.
Klippel et al.
Fell, III et al.
Chapuis
Sutardja et al.
Chapuis
Bassett et al.
Chapuis
Asanuma et al.
Kernahan et al.
Duffy et al.
Tang et al.
Ghandi
Sutardja et al.
Chapuis et al.
Chua et al.
Potega
Goodfellow et al.
Sutardja et al.
Goodfellow et al.
LenZ et al.
Chapuis et al.
A1
A1
A1
A1
6/2005 Wilson
7/2005 Kenny et al.
9/2005
12/2005
2/2006
4/2006
6/2006
Chapuis
Chapuis et al.
Leung et al.
Betts-LaCroiX
TeggatZ et al. ............ .. 323/282
7/2006
8/2006
11/2006
11/2006
Templeton
Chapuis et al.
Leung et al.
King
5/2007 Latham et al.
3/2008 Chapuis et al.
10/2008 Potter et al.
FOREIGN PATENT DOCUMENTS
EP
EP
EP
EP
EP
EP
EP
GB
JP
JP
JP
KR
RU
RU
WO
WO
WO
WO
WO
WO
W0
0255258
0315366
0401562
0660487
0875994
0877468
0997825
2377094
60-244111
1185329
11-289754
200284495
SU1359874
SU1814177
WO93/19415
W001/22585
W002/31943
W002/31951
WOO2/50690
W002/063688
W0 03/030369
2/1988
5/1989
12/1990
6/1995
11/1998
11/1998
5/2000
12/2002
12/1985
3/1999
10/1999
8/2002
12/1985
5/1993
9/1993
3/2001
4/2002
4/2002
6/2002
8/2002
4/2003
Chapuis
OTHER PUBLICATIONS
Thaker et al.
Chapuis
Chang et al.
Chapuis et al.
Hart et al.
Chapuis
Fosler
Aronson et al.
Chapuis et al.
Zhang
Roelofs
Rose
Zafarana et al.
Lin
Tomlinson et al.
Nerone et al.
Goodfellow et al.
25 Watt DC-DC Converters, Melcher The Power Partners and Power
One Group of Companies, Industrial Environment, Apr. 4, 1999,
DC-DC Converters <40 Watt, G Series, 16 Pages.
-48V Programmable Hot Swap Sequencing Power Controller, Sum
mit Microelectronics, Inc., Oct. 30, 2002, SMH4804, 41 Pages.
33702 Microprocessor Power Supply (3.0A), Analog Products
MC33702 Fact Sheet; Motorola/Digital dna/Power Management
Switchings; Jan. 1, 2003, pp. 1-4.
Accelerator-Control-System Interface for Intelligent Power Sup
plies, S. Cohen, Los Alamos National Laboratory, Jan. 1, 1992, pp.
183-186.
Advanced Con?guration and Power Inerface Speci?cation, Intel Cor
poration, Microsoft Corporation, Toshiba Corp, Feb. 2, 1999, Revi
sion 1.0b, 387 Pages.
Advantages of Microcontrollers in DC-DC Converters, Galaxy
Tang et al.
Power, Jan. 1, 2003 IBM Symposium, Real Solutions for Distributed
Ruha et al.
Power, 8 Pages.
Agilent E364XA Single Output DC Power Supplies, User’s Guide;
Agilent Technologies, Part No. E3640-90001, Jan. 1, 2000, 207
Zhang
Jeon
Vinciarelli
Harris
Moriyama et al.
Chapuis et al.
Chapuis et al.
Chapuis
pages.
Agilent E3640A-E3649A Programmable dc Power Supplies, Data
Sheet; Agilent Technologies, Jan. 1, 2000, 4 pages.
Architecture and IC implementation of a digital VRM controller,
Jinwen, Xiao et al, 32nd Annual IEEE Power Electronics Specialists
Conference. PESC 2001. Conference Proceedings. Vancouver,
Templeton
Canada, Jun. 17-21, 2001, Annual Power Electronics Specialists
Conference, NewYork, NY: IEEE, US, vol. vol. 1 of4. Conf. 32, Jun.
17, 2001, pp. 38-47, XP010559121 ISBN: 0-7803-7067-8, ?gure 7.
Automating the Design of a Generic Modular Power System for the
Fosler
Global Market, Pedersen, George, Briggs, Steve; Massey, Paul,
Vinciarelli
Chapuis
Hanson et al.
Chapuis
Kim et al.
Advance Power Raynham Road, Bishops Stortford, Herts.; Jan. 1,
1999, CM23 5PF UK.
US 7,836,322 B2
Page 4
High Ef?ciency, 2-Phase Synchronous Step-Down Switching Regu
Auto Sequence Programming Examples for GPIB-M, Xantrex Tech
nology, Inc., Nov. 27, 2002, 1.0a, 4 pages.
lators, Linear Technology, Jan. 1, 1998, LTC1628/LTC1628-PG, 32
BE510/BE510S ModulesiBipolar DC Source from 100mV to 20V
and from 100nA to 4A, Innovative Test Systems; BE510 Version II,
Pages.
High Ef?ciency Synchronous Step-Down Switching Regulator Lin
Issue 9, Nov. 12, 2000, 3 Pages.
BE52x ModulesiMulti-range bipolar DC sources from 30V to
ear Technology, Jan. 1, 1998, LTC1735, 33 Pages.
High-frequency digital controller IC for DC/ DC converters, Patella B
500V, 90W, Innovative Test Systems; BE52x Version A, Issue 9, Aug.
J et al; APEC 2002. 17th. Annual IEEE Applied Power Electronics
3,2001, 3 pages.
Conference and Exposition. Dallas, TX, Mar. 10-14, 2002, Annual
Applied Power Electronics Conference, New York, NY: IEEE, US,
vol, vol. 2 of2. Conf. 17, Mar. 10, 2002, pp. 374-380, XP010582947,
ISBN: 0-7803-7404-5, p. 375, right-th column; ?gure 3.
Characteristics of Automated Power System Monitoring & Manage
ment Platforms, Hawkins, John M.; Telepower Australia Pty Ltd, Jan.
1, 2000, [email protected],IEEE, Intelec, 5 Pages.
Chemistry-Independent Battery Chargers, Maxim Integrated Prod
Highly Programmable Voltage Supply Controller and Supervisory
ucts, Dec. 1, 2002, 19-1158, Rev 1, MAX1647/MAX1648, 25 Pages.
Continuing Evolution of Intelligence for Telecommunications Power
Circuit, Summit Microelectronics, Inc., Jun. 7, 2001, SMS44, Pre
Plants, The Godby, Jimmy, Apr. 1, 1996, IEEE, 0-7803-3507-4/96,
IEEE Stande Codes, Formats, Protocols, and Common Commands
for User with IEEE Std 488.1-1987, IEEE Stande Digital Interface
for Programmable Instrumentation, IEEE Std 488.2-1992; IEEE,
Jun. 18, 1992, ISBN 1-55937-238-9, 254 pages.
IMPI Intelligent Platform Management Bus Communications Proto
pp. 70-75.
Controlling and Alarming DC Power Plants via the Internet,
Cosentino, Anthony P.; Sullivan, Michael C.; Baxter, Richard V. Jr.;
Loeck, JonPower Conversion Products, LLC and Pensar Corpora
tion, Jan. 1, 1998, 6 pages.
Current-Fed Multiple-Output Power Conversion, Seamus
O’Driscoll; John G. Hayes and Michael G. Egan; Artesyn Technolo
gies; Dept. of Electrical Engineering, University College Cork, Ire
land, Dec. 3, 2003, 7 pages.
Dali Manual, Dali AG, Digital Addressable Lighting Interface Activ
ity Group, ZVEI-Division Luminaires, Jan. 1, 2001, pp. 1-62.
Defendant’s Artesyn Technologies, Inc.’s Preliminary Invalidity
Contentions4(Power-One, Inc. vs. Artesyn Technologies, Inc. et a1 .),
Civil Action No. 2-05-CV-463 (LED), United States District Court
for the Eastern District of Texas; Apr. 26, 2006.
DHP Series DC Power Supplies, IEEE 488.2/RS-232 Options Pro
gramming Manual; Sorensen, Division of Elgar Electronics Corpo
ration, Document No. M550005-01 Rev B, Jul. 29, 2002, 32 pages.
Digital Addressable Lighting Interface (DALI): An Emerging
Energy-Conserving Lighting Solution, The Ronat, Odile; Interna
tional Recti?er, Apr. 9, 2002, TP, pp. 1-6.
Digital Multiphase Power from Primarion and Intersil Changing the
Landscape of Processor Power, Primarion, Inc. , White Paper, Sep. 12,
2002, 6 pages.
Digitally Controlled Power Systems: How Much Intelligence is
Needed and Where it Should be Lock, Tom; RELTEC Corporation,
Jan. 1, 1998, IEEE, 4 pages.
Digitally-Controlled SMPS Extends Power System Capabilities
Vinsant, Ron; DiFiore, John; Clarke, Richard, PCIM, Jun. 1, 1994,
pp. 30-37.
Digitally Controlled Zero -Voltage-Switched Fullbridge Converter, A
Rinne, Karl-Heinz; Theml, Klaus; Duigan, Joseph; McCarthy,
Oliver, Power Conversion, Jun. 1, 1994 Proceedings, pp. 317-324.
Distributed Intelligence and Modular Architecture for Next Genera
tion DC Power System, Duguay, Louis; Got, Pierre, Astec Advanced
Power Systems, Quebec, Canada; Jan. 1, 2000, 6 pgs.
Distributed Power Hot Swap Controller, Summit Microelectronics,
Inc., Mar. 19, 2001, SMH4804; 2050 2.3, 32 pages.
liminary, 19 Pages.
col Speci?cation v1.0, Intel, Hewlett-Packard, NEC, Dell, Document
Revision 1.0, Nov. 15, 1999, 39 pages.
Implementing a Nationwide Energy Management System, Sj oberg,
Stig; Hedberg, Tommy; Selberg, Lars; Wikstrom, Rober, Jan. 1,
2000.
In?nite Impulse Response, Wikipedia, http://en.wikipedia.org/wiki/
IIR, May 2, 2006, pp. 1-4.
In-Situ Transfer Function Analysis, 2006 Digital Power Forum
Presentaiton; Mark Hagen, Texas Instruments Digital Power Group,
Jul. 1, 2006.
Installation Guide MPS Mainframe Model 66000A, Agilent Tech
nologies, Agilent Part No. 66000-90001, 1991-Apr. 2000, 26 pages.
In-System Network Analyzer, 2006 Digital Power Forum
Prensentaiton, Silicon Laboratories, Jul. 7, 2006.
Integrate Internet Solutions Into Your Energy Management Network,
Sarkinen, Johan; Lundin, Ola; Jun. 1, 1998, 7 pages.
Integrity-One: Installation, Operation and Maintenance Manual,
Power-One, Inc., 1999-2003 Version 1.2 (P025374-P025559).
Integrity-One Power SystemiRack System, Data Sheet, Power
One, Inc., Nov. 1, 2002, (P025580-P025583).
Intelligent, Fault Tolerant, High Power, Distributed Power System for
Massively Parallel Processing Computers, An Burns, J .; Riel, J .;
DiBene, T., IEEE, May 1, 1994, 0-7803-1456-5/94, pp. 795-798.
Intelligent Platform Management Interface Speci?cation v1.5 Intel,
Hewlett-Packard, NEC, Dell, Document Revision 1.1, Feb. 20, 2002,
459 pages.
Intelligent Power Supply Controller Rumrill, R.S.; Reinagel, D.J.;
IEEE, Aug. 1, 1991, 0-7803-0135-8/91, PAC 1991, pp. 1537-1539.
KEKB Power Supply Interface Controller Module, Akiyama,
Nakamura, Yoshida, Kubo, Yamamoto, Katoh; High Energy Accel
erator Research Organization, 1-1 Ohio, Tsukuba 305, Japan; Inter
national Conference on Accelerator and Large Experimental Physics
and Control Systems, Jan. 1, 1997, Beijing, China 4 pgs.
Loonltage Study Workshop Report, Charles E. Mullett; Lou Pechi;
Dual 550kHz Synchronous 2-Phase Switching Regulator Controller,
Linear Technology, Jan. 1, 1998, LTC1702, 36 Pages.
PSMA, Power Sources Manufacturers Association, The Multina
tional Power Electronics Association, Jan. 1, 2001, 150 Pages.
Magnet Power Supply Control System in KEKB Accelerators,
Dual Smart Card Interface TDA8020HL, Philips Semiconductors,
Integrated Circuits, Data Sheet, Feb. 24, 2001, 12C
Akiyama, Katoh, Kubo, Yamamoto, Yoshida; KEK, Tsukuba, Japan;
Bus,TDA8020HL, Objective Speci?cation v4.2 Supersedes data of
Jan. 2001 File under Integrated Circuits, ICXX, 22 Pages.
Dual Smart Card Interface TDA8020HL/C2, Christophe Chausset,
Physics and Control Systems, Jan. 1, 1999, Triest, Italy pp. 406-408.
Magnet Power Supply as a Network Object, Cohen, S.; Stuewe, R.;
IEEE, Aug. 1, 1991, 0-7803-0135-8/91, PAC 1991, pp. 929-931.
International Conference on Accelerator and Large Experimental
Philips Semiconductors, May 20, 2003, Application Note,
Market Trends Toward Enhanced Control of Electronic Power Sys
TDA8020HL/C2, AN10232, 28 Pages.
Electronic Products Power Supply Special: Programmable Supplies
Use Switch-Mode Topologies, Birman, Paul; Nercessian, Sarkis;
Kepco, Inc. Flushing NY; vol. 37, No. 10, Electronic Products, Mar.
1, 1995; The Engineer’s Magazine of Product Technology; Power
Supply Special; DSO Samples Single Shots at 10 Gsamples/ s Speech
tems, Miles, F.M.; Danak, R.K.; Wilson, T.G.; Suranyi, G.G.; IEEE,
Recognition on a Single Chip LCD Has Flat-Panel Bene?ts At CRT
Cost Product Update: High-Performance OP AMPS; A Hearst Busi
ness Publication; pp. 1, 5, 33-34.
Jan. 1, 1993, 0-7803-0982-0/93, pp. 92-98.
Memorandum Opinion and Order, Power One v Artesyn Technolo
gies, Inc.; Civil Action 2:05cv463, Mar. 22, 2007.
Microchip AN811, The RS-232/DALI Bridge Interface, Microchip
Technology Inc., Jan. 1,2002, DS00811A, pp. 1-8.
Microchip AN809, Digitally Addressable DALI Dimming Ballast,
Microchip Technology Inc., Jan. 1, 2002, DS00809B, pp. 1-18.
Microchip AN703, Using the MCP320X 12-Bit Serial N D Converter
Fieldbus System Engineering Guidelines, Fieldbus Foundation,
with Microchip PICmicro® Devices, Microchip Technology Inc.,
2003-2004, pp. 1-94.
Jan. 1, 2002, DS00703A, pp. 1-25.
US 7,836,322 B2
Page 5
Microchip PIC16C781/782 Data Sheet, 8-bit CMOS Microcontrol
lers with ND, D/A, OPAMP, Comparators and PSMC, Microchip
Technology Inc., Jan. 1, 2001, pp. 1- 184.
Microprocessor Core Supply Voltage Set by 1 2 C Bus Without VID
LinesiDesign
Note
279,
Mark
Gurries;
Linear
Technologijesign Notes, Jan. 7, 2002, 2 Pages.
Motorola Switch Mode Power Supply with Multiple Linear Regula
tors and High Speed CAN Transceiver, Motorola, Inc. 2002; digital
dna; Analog Marketing; Rev. 2.5, Nov. 1, 2002; 33394; Multi-Output
Power Supply Semiconductor Technical Data.
NEBS Compliant Board Level Power System, Thomas J. DeLurio,
Mikhail Guz and John Ng; Summit Microelectronics, Power One,
Oct. 20, 2002, 7 Pages.
New Applications Demand Programmable Power Supplies/ Sources,
O’Shea, Paul; http://www.evaluationengineering.com/archive/ar
ticles/0997powr.htm, Nelson Publishing, Inc., Jan. 1, 1997, 8 pages.
New Digital Power Delivery Architecture, Bob Carroll, Primarion,
Sep. 1, 2004, 5 Pages.
Non-Impact Printer Power and Motor Control System on a Chip,
Masson, James; Barrow, Steven; IEEE,Apr. 1, 1995, IEEE Catalogue
No. 95TH8025, 0-7803-2423-4/95, pp. 98-103.
Operating and Service Manual MQ Series DC Power Supplies,
Magna-Power Electronics, Inc., Dec. 19, 2002, 48 pages.
Operating and Service Manual SBC488A, Magna-Power Electron
ics, Inc., Dec. 19,2002, 58 pgs.
Operating and Service Manual SQ Series, DC Power Supplies,
Magna-Power Electronics, Inc., Dec. 16, 2002, 48 pgs.
Operating Manual for Internal RS-232 Interface for XT 60 Watt and
HPD 300 Watt Series Programmable DC Power Supplies, Xantrex
Technology, Inc., Jun. 1, 2002, 59 pages.
Operation and Maintenance Process Model for Energy Management,
An Lundin, Ola; Ericsson Components AB, Energy Systems Divi
sion, Jan. 1, 1999, S-164 81 KISTAiStockholm, Sweden; 7 pages.
Optimizing Power Product Usage to Speed Design Validation Test
ing, Application Note 1434; Agilent Technologies, Nov. 22, 2002, 16
pages.
PCS Controller, Data Sheet, Power-One, Inc. Nov. 1, 2002 (P025584
P025585).
PCX-150A 150 Amp Pulsed Current Source Operation Manual, Ver
sion 3.0, Directed Energy, Inc., Jan. 1, 2001, Document No. 9100
0212 R4, 31 pages.
PMP 25 Recti?er Module, Data Sheet, Power-One, Inc., Undated,
(P025602-P025603).
Power Distribution Systems for Future Homes, Lee, Po-Wa; Lee,
Yim-Shu; Lin, Bo-Tao; IEEE, Aug. 1, 1999, 0-7803-5769-88/99, pp.
1 140-1 146.
Power LAN for Telecommunication Power Supply Equipment, A
Vun C.H., Nicholas; GT, Lau; B.S., Lee; IEEE TENCON ’93
Beijing, Jan. 1, 1993, pp. 24-27.
Power Management Solutions for Networking Applications,
Darmon, Luc; Smart Networks Developer Forum 2003, Jun. 4-6,
2003, Euro-Disney Paris, France, Motorola digital dna; pp. 1-26;
www.motorola.com/sndf.
Power System Controller in an Intelligent Telecom Recti?er Plant
Roth, Ueli; IEEE, Aug. 1, 1992, 0-7803-0779-8/92, pp. 476-483.
Power Semiconductors and Power SuppliesiThe Building Blocks
of the Digital Power Revolution, Todd Cooper and Holman Harvey;
Stephens, Inc. Investment Bankers, Sep. 1, 2000, 132 Pages.
Quad Tracking Power Supply Manager, Summit Microelectronics,
Inc., Mar. 4, 2002, SMT4004, 35 Pages.
Quantization Resolution and Limit Cycling in Digitally Controlled
PWM Converters, Peterchev, Angel V.; Sanders, A.V.; Electrical
Engineering and Computer Science; UC Berkley; Power Electronics
Specialists Conference, 2001.PESC, vol. 2, Jun. 17-21, 2001; pp.
465-471; XP002274573.
R Option, S Option DC Power Supplies, IEEE 488.2/RS-232 Pro
gramming Manual; Power Ten, Document No. M550013-01 Rev C,
Jun. 25, 2002, 56 pages.
SCPI Programming Examples for GPIB-M, Xantrex Technology,
Inc., Nov. 26,2002, 1.0, 3 pages.
Service Guide for Agilent 6610xA Power Modules, Agilent Tech
nologies, Agilent Part No. 5959-3364, Dec. 1, 2002, 101 pages.
Silicon Labs Preliminary Invalidity Contentions, Civil Action No.
2-05-CV-463 (LED)iMay 26, 2006 (US. District Court Eastern
District of Texas).
Simple digital hardware to control a PFC converter, A Zumel P. et al;
IECON’01. Proceedings of the 27th. Annual Conference of the IEEE
Industrial Electronics Society. Denver, CO, Nov. 29-Dec. 2, 2001,
Annual Conference of the IEEE Industrial Electronics Society, New
York, NY : IEEE, US, v01. vol. 1 of3. Conf. 27, Nov. 29, 2001, pp.
943-948, XP010572905 ISBN: 0-7803-7108-9, paragraph [IIIC].
Single-Inductor Multiple-Output Switching Converters, Wing-Hung
Ki and Dongsheng Ma; Integrated Power Electronics Laboratory,
Department of Electrical and Electronic Engineering, The Hong
Kong University of Science and Technology, Clear Water Bay, Hong
Kong SAR, China, Jan. 1, 2001, 6 Pages.
Six-Channel Power Supply Supervisor and Cacsade Sequence Con
troller, Summit Microelectronics, Inc., Jul. 16, 2003, SMS66, Pre
liminary Information, 26 Pages.
SMBus Controls CPU Voltage Regulators without VID Pins, Mark
Gurries, Design Ideas, Linear Technology Magazine, Sep. 1, 2001, 2
Pages.
SMBus VID Voltage Programmers, Linear Technology, Jan. 1, 2001,
LTC1699 Series, 20 Pages.
SMH4804, SMP9210 and SMT4004 Telecom Reference Design,
Summit Microelectronics, Inc., Sep. 5, 2002, Application Note 25, 17
Pages.
Synchronization of Multiple Voltage Regulator Outputs, Mueller,
M.W.; et al., IBM Technical Disclosure Bulletin, Jun. 1, 1999; 2
pages.
System Management Bus (SMBus) Speci?cation Version 2.,
Duracell, Inc., Energizer Power Systems, Inc., Fujitsu, Ltd., Intel
Corporation, Linear Technology, Inc., Maxim Integrated Products,
Mitsubishi Electric Semiconductor Company, PowerSmart, Inc.,
Toshiba Battery Co. Ltd., Unitrode Corporation, USAR Systems,
Inc., Aug. 3, 2000, pp. 1-59.
System Management Bus Speci?cation, Revision 1.1, Smart Battery
System Speci?cations, Revision 1.1, Dec. 11, 1998; Copyright 1996,
1997, 1998, Benchmarq Microelectronics Inc., Duracell Inc., Ener
gizer Power Systems, Intel Corporation, Linear Technology Corpo
ration, Maxim Integrated Products, Mitsubishi Electric Corporation,
National Semiconductor Corporation, Toshiba Battery Co., Varta
Preliminary Information 1.5A Switch-Mode Power Supply with Lin
ear Regulator, 33701; Power Supply Integrated Circuit; Motorola
Seminconductor Technical Data; Analog Marketing MC33701/D
Rev. 1.0, May 1, 2003; Motorola digial dna; pp. 1-24.
Presenting DALI, AG DALI, Jul. 1, 2003, pp. 1-17.
Programmable Four-Channel Step-Down DC/DC Converter, Texas
Instruments, Oct. 1, 2001, TPS54900, 16 Pages.
Programming Guide Series 661xxA MPS Power Modules, Agilent
Technologies, Agilent Part No. 5959-3362, 1991-2000, 114 pages.
Programmer Manual, PS2520G & PS2521G Programmable Power
Supplies, Tektronix, 070-9197-00, Jan. 1, 1995, 70 pages.
Power Management for Communications: Product Information,
Summit Microelectronics, Inc., Jan. 23, 2001, 168 Pages, http://
Laboratory Accelerator Complex, Sturrock, J .C. ; Cohen, S.;
Weintraub, B.L.; Hayden, D.J.; Archuletta, S.F. ; Los Alamos
National Laboratory, Jan. 1, 1992, pp. 217-219.
Uniform Language for Accessing Power Plantstuman-Machine
Language, ANSI T1.317-1993; American National Standards Insti
tute, Dec. 14, 1993, 55 pages.
www. summitmicro .com.
User’s Guide Series 661xxA MPS Power Modules & Model 66001A
Power Management for Communications: Corporate Overview,
Summit Microelectronics Inc., Oct. 1, 2002, 213 Pages.
MPS Keyboard, Agilent Technologies, Agilent Part No. 5959-3386,
Batterie AG. 39 pgs.
Technical Overview, FoundationTM ?eldbus, Freedom to Choose.
Power to Integrate, Fieldbus Foundation, Jan. 1, 2003, FD-043 Rev
3.0, pp. 1-37.
Testing Intelligent Power Supplies for the Los Alamos National
1992-Apr. 2000, 53 pages.
US 7,836,322 B2
Page 6
Instruments (SCPI) Consortium, May 1, 1997, Version 1997.0, 68
Wide Operating Range, No Sense Step-Down Controller, Linear
Technology, Jan. 1, 2001, LTC1778/LTC1778-1, 24 Pages.
Wide Operating Range, No Sense Step-Down DC-DC Controller
with SMBus Programming, Linear Technology, Jan. 1, 2001,
LTC1909-8, 34 Pages
Microturbine Power Conversion Technology Review, Staunton et al.;
Oak Ridge National Laboratory Technical Report; Apr. 8, 2003; 40
pages.
pages.
User Manual, PS2520, PS2520G, PS2521 & PS2521G Program
mable Power Supplies, Tektronix, 070-9196-00, Jan. 1, 1995, 56
pages.
Volume 1: Syntax and Style, SCPI Consortium, May 1, 1999, Version
1999.0, 67 pages.
Volume 1 : Syntax and Style, Standard Commands for Programmable
Volume 2: Command Reference, SCPI Consortium, May 1, 1999,
Microcomputer Control of DC/DC Converters for Photovoltaic
Version 1999.0, 565 pages.
Applications, Peracaula et al.; Dept. of Electronics Engineering,
Industrial Electronics GroupiTechnical University of Catalonia,
Spain; 1991; 4 pgs.
Volume 2: Command Reference, SCPI Consortium, May 1, 1997,
Version 1997.0, 506 pages.
Volume 3: Data Interchange Format, SCPI Consortium, May 1, 1999,
Version 1999.0, 72 pages.
Volume 3: Data Interchange Format, SCPI Consortium, May 1, 1997,
Version 1997.0, 73 pages.
Volume 4: Instrument Classes, SCPI Consortium, May 1, 1999, Ver
sion 1999.0, 115 pages.
Volume 4: Instrument Classes, SCPI Consortium, May 1, 1997, Ver
sion 1997.0, 58 pages.
VXI Bus Programmable DC Power Supplies, Advanced Power
Designs, Inc., Irvine, CA; Jan. 1, 1993, 5 pages.
Why have Monitoring?, Shawyer, P.; Hobbs. P.; McLeod, A.; Jan. 1,
2001, 8 Pages.
“Automated Power Distribution System Hardware” Anderson et al.;
Aug. 6, 1989; pp. 579-584.
“MicroSCADA Technology Rev. 8.4.2 Documentation CD: Appli
cation Objects, Chapter 5. Data Objects” CD-ROM; Sep. 18, 1998,
ABB, XP002481365; 11 Pages.
“Modern User Interface Revolutionizes Supervisory Systems”
D’Armour et al.; IEEE Computer Applications in Power; vol. 7, No.
1; Jan. 1, 1994; pp. 34-39.
“Open Architecture Distributed ProcessingiThe Modern Design for
Electric Power Network Automation” Hissey et al.; IEEE Region 9
Colloquium; Sep. 1990; pp. 150-161; XP010038436.
* cited by examiner
US. Patent
Nov. 16, 2010
Sheet 1 017
US 7,836,322 B2
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US 7,836,322 B2
1
2
SYSTEM FOR CONTROLLING AN ARRAY OF
POINT-OF-LOAD REGULATORS AND
AUXILIARY DEVICES
the POL regulators. A drawback with such a control system is
that it adds complexity and size to the overall electronic
RELATED APPLICATION DATA
in an electronic system for system supporting functions (also
referred to as auxiliary devices). These devices may provide
This application claims priority as a continuation-in-part
pursuant to 35 U.S.C. §120 to patent application Ser. No.
11/760,660 ?led Jun. 8, 2007, which is a continuation of
low power regulation, such as a linear regulator, low-drop out
system.
It is also known in the art to include various other devices
(LDO) linear regulator or other power supplies; device
switching, such as machine-operated switches, magnetically
operated control switches, thermal and magnetic relays, time
patent application Ser. No. 11/354,550 ?led Feb. 14, 2006,
delay relays, and actuators; motor control; temperature con
trol, such as blowers and fans; visual indicator devices, such
now issued as US. Pat. No. 7,266,709 on Sep. 4, 2007.
as lights, light emitting diodes (LEDs), video display moni
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to power control systems, or
more particularly, to a system to control, program and moni
tor an array of point-of-load regulators and other auxiliary
devices.
2. Description of Related Art
With the increasing complexity of electronic systems, it is
common for an electronic system to require power provided
at several different discrete voltage and current levels. For
example, electronic systems may include discrete circuits that
require voltages such as 3v, 5v, 9v, etc. Further, many of these
20
method for controlling and monitoring POL regulators and
other auxiliary devices within a distributed power system.
25
SUMMARY OF THE INVENTION
The present invention provides a system and method for
circuits require a relatively low voltage (e.g., 1v), but with
relatively high current (e.g., 100 A). It is undesirable to
deliver relatively high current at low voltages over a relatively
long distance through an electronic device for a number of
tors, gauges; peripheral devices; and the like. In some cases,
it is desirable to coordinate the control over these auxiliary
devices in concert with the POL regulators of the power
system, such as to control the operation of a fan in synchro
nism with activation of a POL regulator; however, conven
tional distributed power system do not provide ?exibility to
control other auxiliary devices in addition to POL regulators.
Thus, it would be advantageous to have a system and
controlling, programming and monitoring POL regulators
30
and auxiliary devices within a distributed power system.
In an embodiment of the invention, a power control system
comprises at least one programmable voltage regulator, at
reasons. First, the relatively long physical run of low voltage,
high current lines consumes signi?cant circuit board area and
least one non-programmable auxiliary voltage regulator, and
congests the routing of signal lines on the circuit board.
a system controller operatively connected to the at least one
programmable voltage regulator and to said at least one aux
Second, the impedance of the lines carrying the high current
tends to dissipate a lot of power and complicate load regula
tion. Third, it is di?icult to tailor the voltage/ current charac
teristics to accommodate changes in load requirements.
In order to satisfy these power requirements, it is known to
distribute an intermediate bus voltage throughout the elec
tronic system, and include an individual point-of-load
35
least one programmable voltage regulator is adapted to pro
vide a corresponding output voltage having characteristics
de?ned by received programming data and to provide moni
40
power consumption within the electronic system. Particu
larly, a POL regulator would be included with each respective
45
the level required by the electronic circuit. An electronic
system may include multiple POL regulators to convert the
intermediate bus voltage into each of the multiple voltage
levels. Ideally, the POL regulator would be physically located
adjacent to the corresponding electronic circuit so as to mini
50
mize the length of the low voltage, high current lines through
the electronic system. The intermediate bus voltage can be
55
with a power supply controller that activates, programs, and
monitors the individual POL regulators. It is known in the art
BRIEF DESCRIPTION OF THE DRAWINGS
60
FIG. 1 depicts a prior art distributed power delivery sys
tem;
activate and program each POL regulator. For example, the
parallel bus may communicate an enable/ disable bit for tum
FIG. 2 depicts a prior art POL control system using a
ing each POL regulator on and off, and voltage identi?cation
parallel control bus;
(VID) code bits for programming the output voltage set-point
of the POL regulators. The controller may further use addi
tional connections to monitor the voltage/current that is deliv
ered by each POL regulator so as to detect fault conditions of
objects thereof, by a consideration of the following detailed
description of the preferred embodiment. Reference will be
made to the appended sheets of drawings, which will ?rst be
described brie?y.
system. The POL regulators generally operate in conjunction
for the controller to use a multi-connection parallel bus to
corresponding output voltage in response to an enable signal.
The system controller is adapted to send the programming
data and receive the monitoring data via the serial data bus. A
data monitoring circuit is operatively coupled to the at least
one auxiliary voltage regulator to receive analog measure
ments therefrom and communicate corresponding monitor
ing data to the system controller.
A more complete understanding of the method and system
for controlling and monitoring a plurality of POL regulators
and auxiliary devices will be afforded to those skilled in the
art, as well as a realization of additional advantages and
delivered to the multiple POL regulators using low current
lines that minimize loss.
With this distributed approach, there is a need to coordinate
the control and monitoring of the POL regulators of the power
toring data re?ecting operational status of the at least one
programmable voltage regulator. The at least one non-pro
grammable auxiliary voltage regulator is adapted to provide a
(“POL”) regulator, i.e., DC/DC converter, at the point of
electronic circuit to convert the intermediate bus voltage to
iliary voltage regulator via a common serial data bus. The at
65
FIG. 3 depicts an exemplary POL control system con
structed in accordance with an embodiment of the present
invention;
US 7,836,322 B2
4
3
FIG.
control
FIG.
control
provide a low voltage, high current output that passes through
4 depicts an exemplary POL regulator of the POL
system;
5 depicts an exemplary system controller of the POL
system;
respective sensing resistors 46, 52, 56, and 62 and respective
switches 48, 54, 58, and 64. The controller 32 provides con
trol signals to the DC/DC converters 34, 36, 38, and 42 via a
plurality of six-bit parallel buses that each carry an enable/
disable bit and ?ve VID code bits. The VID code bits program
the DC/DC converters for a desired output voltage/current
level. The controller 32 also monitors the performance of the
FIG. 6 depicts an alternative embodiment of a POL control
system that provides control over auxiliary devices;
FIG. 7 depicts an exemplary graphical user interface (GUI)
for controlling operation of auxiliary devices in accordance
DC/DC converters 34, 36, 38, and 42 using the sensing resis
tors 46, 52, 56, and 62. Particularly, the controller 32 monitors
the output voltage of each DC/ DC converter by detecting the
voltage at the output side of the sensing resistor, and monitors
with the embodiment of FIG. 6;
FIG. 8 depicts another alternative embodiment of a POL
control system that provides monitoring and control over
auxiliary devices; and
FIG. 9 depicts yet another alternative embodiment of a
the output current through the sensing resistor by detecting
POL control system that provides monitoring and control
the voltage across the sensing resistor. The voltage and cur
rent sensing for each DC/ DC converter requires two separate
lines, so eight separate lines are needed to sense the voltage
and current condition of the exemplary four-converter sys
over auxiliary devices.
DETAILED DESCRIPTION OF THE PREFERRED
EMBODIMENT
tem. Moreover, the controller 32 has a switch enable line
connected to the gate terminals of switches 48, 54, 58, and 64,
The present invention provides a system and method for
20
controlling and monitoring POL regulators and auxiliary
devices within a distributed power system. In the detailed
description that follows, like element numerals are used to
describe like elements illustrated in one or more ?gures.
Referring ?rst to FIG. 1, a prior art distributed power deliv
ery system is shown. The prior art distributed power deliver
by which the controller 32 can shut off the output from any of
the DC/DC controllers 34, 36, 38, and 42 or control the
turn-on/ off slew rate.
In an exemplary operation, the controller 32 provides con
trol parameters (e. g., output voltage set-point) to the DC/DC
25
converter 34 via the VID code portion of the six-bit parallel
bus. The controller 32 then activates the DC/ DC converter 34
system includes an AC/DC converter 12 that converts the
available AC power into a primary DC power source, e. g., 48
volts. The primary DC power source is connected to a primary
via the enable/ disable portion of the six-bit parallel bus. Once
activated, the DC/DC converter 34 converts the power bus
voltage (e.g., 48 volts) into a selected output voltage. The
power bus that distributes DC power to plural electronic sys
tems, such as printed circuit board 14. The bus may be further
coupled to a battery 18 providing a back-up power source for
the electronic systems connected to the primary power bus.
When the AC/DC converter 12 is delivering DC power into
30
the primary power bus, the battery 18 is maintained in a fully
35
controller 32 then veri?es that the output voltage is the
desired voltage by measuring the voltage via the voltage
monitoring line. If the output voltage is within an acceptable
range, it is provided to the load (not shown) by activating the
switch 48 via the switch enable line. The controller 32 can
charged state. In the event of loss ofAC power or fault with the
AC/DC converter 12, the battery 18 will continue to deliver
DC power to the primary power bus for a limited period of
time de?ned by the capacity of the battery 18.
then continuously monitor the output voltage and the output
current produced by the DC/DC converter 34 by measuring
the output voltage via the voltage monitoring line and mea
suring the voltage drop across the sensing resistor (i.e., the
voltage differential between the current monitoring line and
the voltage monitoring line). If the controller 32 detects a fault
condition of the DC/DC converter 34 (e.g., output voltage
The printed circuit board 14 may further include a DC/DC
converter that reduces the primary bus voltage to an interme
diate voltage level, such as 5 or 12 volts. The intermediate
voltage is then distributed over an intermediate power bus
provided to plural circuits on the printed circuit board 14.
40
Each circuit has an associated point-of-load (“POL”) regula
tor located closely thereby, such as POLs 22, 24, and 26. Each
POL regulator converts the intermediate bus voltage to a low
45 the same manner.
drops below a speci?c threshold), the controller 32 can dis
able and reset the DC/ DC converter. The controller 32 com
municates with the other DC/DC converters 36, 38, and 42 in
A disadvantage with the control system of FIG. 2 is that it
adds complexity and size to the overall electronic system by
voltage, high current level demanded by the electronic circuit,
such as 1.8 volts, 2.5 volts, and 3 .3 volts provided by POLs 22,
24, and 26, respectively. It should be appreciated that the
voltage levels described herein are entirely exemplary, and
that other voltage levels could be selected to suit the particular
needs of electronic circuits on the printed circuit board 14. By
locating the POLs 22, 24, 26 close to their corresponding
electronic circuits, the length of the low voltage, high current
50
using a six-bit parallel bus to control each DC/ DC converter
and a separate three-line output connection to monitor the
performance of each DC/DC converter. In other words, the
controller 32 utilizes thirty-six separate connections in order
to communicate with four DC/ DC converters 34, 36, 38, and
42. As the complexity and power requirements of electronic
systems increase, the number of connections to the controller
55
lines on the printed circuit board 14 are minimized. Moreover,
the intermediate power bus can be adapted to carry relatively
will also increase in a linear manner.
Referring now to FIG. 3, a POL control system 100 is
shown in accordance with an embodiment of the present
low current, thereby minimizing power loss due to the line
invention. Speci?cally, the POL control system 100 includes
impedance. But, this distributed power delivery system does
a system controller 102, a front-end regulator 104, and a
not provide a way to monitor and control the performance of
60
the POLs 22, 24, 26.
arranged in an array. The POL regulators depicted herein
include, but are not limited to, point-of-load regulators,
FIG. 2 illustrates a prior art DC/ DC converter control sys
tem having a power supply controller 32 and a plurality of
DC/DC converters 34, 36, 38, and 42. The DC/DC converters
34, 36, 38, and 42 are each connected to a power bus (as
described above with respect to FIG. 1), which provides an
input voltage. The DC/ DC converters 34, 36, 38, and 42 each
plurality of POL regulators 106, 108, 110, 112, and 114
power-on-load regulators, DC/DC converters, voltage regu
65
lators, and all other programmable voltage or current regulat
ing devices generally known to those skilled in the art. An
intra-device interface is provided between individual ones of
the POL regulators to control speci?c interactions, such as
US 7,836,322 B2
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6
current share or paralleling, e.g., current share interface
con?guration is selected such that the POL regulator 106 will
operate in a “safe” condition in the absence of programming
(CSl) provided between POL0 106 and POL1 108, and CS2
providedbetween POL4 112 and POLn 114. In the exemplary
con?guration shown in FIG. 3, POL0 106 and POL1 108
signals.
operate in parallel mode to produce output voltage V0l with
The hardwired settings interface 150 communicates with
external connections to program the POL regulator without
increased current capability, POL2 110 produces output volt
age Voz, and POL4 112 and POLn 114 operate in parallel
using the serial interface 144. The hardwired settings inter
face 150 may include as inputs the address setting (Addr) of
mode to produce output voltage V03, though it should be
the POL to alter or set some of the settings as a function of the
address (i.e., the identi?er of the POL), e.g., phase displace
appreciated that other combinations and other numbers of
ment, enable/disable bit (En), trim, and VID code bits. Fur
ther, the address identi?es the POL regulator during commu
nication operations through the serial interface 144. The trim
POL regulators could be advantageously utilized.
The front-end regulator 104 provides an intermediate volt
age to the plurality of POL regulators over an intermediate
input allows the connection of one or more external resistors
voltage bus, and may simply comprise another POL regulator.
to de?ne an output voltage level for the POL regulator. Simi
larly, the VID code bits can be used to program the POL
regulator for a desired output voltage/current level. The
enable/disable bit allows the POL regulator to be turned
The system controller 102 and front-end regulator 1 04 may be
integrated together in a single unit, or may be provided as
separate devices. Alternatively, the front-end regulator 104
may provide a plurality of intermediate voltages to the POL
regulators over a plurality of intermediate voltage buses. The
system controller 102 may draw its power from the interme
on/ off by toggling a digital high/low signal.
20
received via either the hardwired settings interface 150 or the
serial interface 144, the POL controller 146 accesses the
diate voltage bus.
The system controller 1 02 communicates with the plurality
parameters stored in the default con?guration memory 148.
Alternatively, if settings information is received via the hard
wired settings interface 150, then the POL controller 146 will
of POL regulators by writing and/ or reading digital data (ei
ther synchronously or asynchronous) via a uni-directional or
bidirectional serial bus, illustrated in FIG. 3 as the synch/data
bus. The synch/data bus may comprise a two-wire serial bus
apply those parameters. Thus, the default settings apply to all
of the parameters that cannot be or are not set through hard
(e. g., 12C) that allows data to be transmitted asynchronously
wiring. The settings received by the hardwired settings inter
or a single-wire serial bus that allows data to be transmitted
synchronously (i.e., synchronized to a clock signal). In order
The POL controller 146 receives and prioritizes the set
tings of the POL regulator. If no settings information is
30
to address any speci?c POL in the array, each POL is identi
face 150 can be overwritten by information received via the
serial interface 144. The POL regulator can therefore operate
in a stand-alone mode, a fully programmable mode, or a
?ed with a unique address, which may be hardwired into the
combination thereof. This programming ?exibility enables a
POL or set by other methods. The system controller 102 also
plurality of different power applications to be satis?ed with a
communicates with the plurality of POL regulators for fault
single generic POL regulator, thereby reducing the cost and
simplifying the manufacture of POL regulators.
management over a second unidirectional or bidirectional 35
serial bus, illustrated in FIG. 3 as the OK/fault bus. By group
An exemplary system controller 102 of the POL control
system 100 is illustrated in FIG. 5. The system controller 102
ing plural POL regulators together by connecting them to a
common OK/fault bus allows the POL regulators have the
same behavior in the case of a fault condition. Also, the
system controller 102 communicates with a user system via a
40
user interface bus for programming, setting, and monitoring
of the POL control system 10. Lastly, the system controller
serial or parallel bidirectional interface using standard inter
face protocols, e.g., an 12C interface. User information such
102 communicates with the front-end regulator 104 over a
separate line to disable operation of the front-end regulator.
An exemplary POL regulator 106 of the POL control sys
45
tem 10 is illustrated in greater detail in FIG. 4. The other POL
as monitoring values or new system settings would be trans
mitted through the user interface 122. The communication
with the user (or host) may be direct or via a local area
network (LAN) or wide area network (WAN). A user may
regulators of FIG. 3 have substantially identical con?gura
access the POL control systems for purposes of monitoring,
tion. The POL regulator 106 includes a power conversion
circuit 142, a serial interface 144, a POL controller 146,
default con?guration memory 148, and hardwired settings
includes a user interface 122, a POL interface 124, a control
ler 126, and a memory 128. The user interface 122 sends and
receives messages to/ from the user (or host) via the user
interface bus. The user interface bus may be provided by a
controlling and/ or programming the POL control systems by
50
coupling directly to the user interface bus. The user system
interface 150. The power conversion circuit 142 transforms
would likely include a user interface, such as a graphical user
an input voltage (Vi) to the desired output voltage (V0)
according to settings received through the serial interface
interface (GUI), that enables the display of status information
regarding the POL control systems.
144, the hardwired settings 150 or default settings. The power
conversion circuit 142 may also include monitoring sensors
The POL interface 124 transforms data to/from the POL
55
regulators via the synch/data and OK/fault serial buses. The
for output voltage, current, temperature and other parameters
POL interface 124 communicates over the synch/data serial
that are used for local control and also communicated back to
bus to transmit setting data and receive monitoring data, and
the system controller through the serial interface 144. The
communicates over the OK/fault serial bus to receive inter
rupt signals indicating a fault condition in at least one of the
connected POL regulators. The memory 128 comprises a
non-volatile memory storage device used to store the system
power conversion circuit 142 may also generate a Power
Good (PG) output signal for stand-alone applications in order
60
to provide a simpli?ed monitoring function. The serial inter
set-up parameters (e. g., output voltage, current limitation
set-point, timing data, etc.) for the POL regulators connected
face 144 receives and sends commands and messages to the
system controller 102 via the synch/data and OK/fault serial
buses. The default con?guration memory 148 stores the
default con?guration for the POL regulator 106 in cases
where no programming signals are received through the serial
interface 144 or hardwired settings interface 150. The default
to the system controller 102. Optionally, a secondary, external
65
memory 132 may also be connected to the user interface 122
to provide increased memory capacity for monitoring data or
setting data.
US 7,836,322 B2
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8
The controller 126 is operably connected to the user inter
face 122, the POL interface 124, and the memory 128. The
controller 126 has an external port for communication a dis
age data (i.e., the measured output voltage) or voltage-com
parison data (e.g., whether the measured output voltage is
above or below the highest desired output voltage, whether
able signal (FE DIS) to the front-end regulator 104. At start
the measured output voltage is above or below the lowest
up of the POL control system 100, the controller 126 reads
from the internal memory 128 (and/or the external memory
desired output voltage, etc.); output-current data, which may
include actual-output-current data (i.e., the measured output
132) the system settings and programs the POL regulators
current) or current-comparison data (e.g., whether the mea
sured output current is above or below the highest desired
accordingly via the POL interface 124. Each of the POL
regulators is then set up and started in a prescribed manner
output current); temperature-status data, which may include
based on the system pro gramming. During normal operation,
actual-temperature data (i.e., the measured temperature of a
the controller 126 decodes and executes any command or
POL regulator, or more particularly its heat generating com
message coming from the user or the POL regulators. The
ponents) or temperature-comparison data (e.g., whether the
temperature of the POL regulator (or its components) is above
controller 126 monitors the performance of the POL regula
tors and reports this information back to the user through the
user interface 122. The POL regulators may also be pro
grammed by the user through the controller 126 to execute
or below a known value, etc.), and/ or all other types of POL
speci?c, autonomous reactions to faults, such as over current
or over voltage conditions. Alternatively, the POL regulators
may be programmed to only report fault conditions to the
system controller 102, which will then determine the appro
priate corrective action in accordance with prede?ned set
tings, e. g., shut down the front-end regulator via the FE DIS
control line.
A monitoring block 130 may optionally be provided to
20
fault monitoring data generally known to those skilled in the
art. It should also be appreciated that fault-monitoring data is
not limited to data representing the existence of a faulty
condition. For example, fault-monitoring data that indicates
that the POL regulator is operating within acceptable param
eters (e.g., within an acceptable temperature range) is con
sidered to be within the spirit and scope of the present inven
tion.
The fault-monitoring data can be used by either the system
controller 102 or the POL controller 146 to monitor and/or
monitor the state of one or more voltage or current levels of 25 control the POL regulator. In other words, the POL controller
other power systems not operably connected to the controller
102 via the synch/data or OK/fault buses. The monitoring
block 130 may provide this information to the controller 126
for reporting to the user through the user interface in the same
manner as other information concerning the POL control
system 100. This way, the POL control system 100 can pro
146 can use the fault-monitoring data to either provide POL
status information (i.e., data corresponding to a particular
POL regulator or its output) to the system controller 102 or
disable the POL regulator if a particular condition is met (e. g.,
30
vide some backward compatibility with power systems that
are already present in an electronic system.
information to an administrator, disable a particular POL
regulator, or store the fault-monitoring data for future use. For
Returning to FIG. 3, the system controller 102 is adapted to
provide initial-con?guration data to each POL regulator (i.e.,
106, 108, 110, 112, 114). It should be appreciated that the
35
initial-con?guration data may include, but is not limited to,
pro gramming data generally known to those skilled in the art.
Once the initial-con?guration data is received, the POL con
troller 146 (see FIG. 4) is adapted to store at least a portion of
the initial-con?guration data in memory. At least a portion of
the stored initial-con?guration data is then used to produce a
desired output. For example, an output may be produced to
include a particular voltage level, a particular slew rate, etc.,
depending on the type of initial-con?guration data received/
stored.
After the output has been produced, the POL controller 146
is adapted to receive fault-monitoring data (e.g., from an
external device, a sense circuit, etc.). The fault-monitoring
data, which contains information on the POL regulator or its
output, is then stored in the memory. The POL controller 146,
in response to a condition (e.g., receiving a request, exceeding
a known parameter, having a register’s contents change, etc.),
is then adapted to provide at least a portion of the fault
monitoring data to the system controller 102. It should be
appreciated that the fault-monitoring data may include, but is
example, in one embodiment of the present invention, each
POL regulator includes unique ID data (e.g., serial number,
one or more of the following types of data: output-voltage
set-point-data (i.e., a desired output voltage); output-current
set-point data (i.e., the highest desired output current); low
voltage-limit data (i.e., the lowest desired output voltage);
high-voltage-limit data (i.e., the highest desired output volt
age); output-voltage-slew-rate data (i.e., the desired output
slew rate); enable/disable data (i.e., tuming on/off the POL
regulator output); timing data (e.g., turn-on delay, tum-off
delay, fault recovery time, etc.) and/or all other types of POL
the status register changes, the temperature limit has been
exceeded, etc.). Alternatively, the system controller 102 can
use the fault-monitoring data to either provide POL status
40
date of manufacture, etc.) stored in an ID register. This
enables the system controller 102 to provide POL status infor
mation and unique ID data to an administrator.
In another embodiment of the present invention, each POL
regulator further includes at least one sensor circuit. The
sensor circuit is used to produce either the fault-monitoring
data, or data that can be used (e.g., together with information
stored in the memory) to produce the fault-monitoring data. It
45
should be appreciated that the sensor circuit, as described
herein, will vary (e.g., as to circuitry, location, inputs, etc.)
depending upon the type of information that is being detected.
For example, a sensor circuit that detects current may include
different circuitry, have different inputs, and be placed in a
50
different location than a sensor circuit that detects tempera
ture.
The POL control system 10 enables four different modes of
operation. In the ?rst operational mode, the POL regulators
55
function independently in the absence of a system controller
and without interaction with other POL regulators. The POL
regulators each include local feedback and control systems to
regulate their own performance as well as control interfaces
to enable local programming. The POL regulators further
60
include default settings in which they can revert to in the
absence of local programming or data from the system con
troller. In other words, each of the POL regulators can operate
as a standalone device without the need for a system control
ler or interactions with another POL regulator.
In the second operational mode, the POL regulators inter
not limited to, one or more of the following types of data:
operate for the purpose of current sharing or interleaving in
the absence of a system controller. The POL regulators com
output-voltage data, which may include actual-output-volt
municate with each other over the current share interface. The
65
US 7,836,322 B2
9
10
synch/data line may be used to communicate synchronization
may be a single wire or two-wire communication bus (e.g.,
information to permit phase interleaving of the POL regula
tors, in which the phase is programmed locally by entering an
devices.
I2C) suitable to send and receive information between plural
The set-up registers 23219 de?ne the operating parameters
of the auxiliary devices. These registers 232b comprise a
memory used to store the system set-up parameters (e. g.,
address through hardwired connections. In either the ?rst or
second modes of operation, there would generally be infor
mation communicated between the POL regulators except for
turn-on delay, tum-off delay, polarity of input/ output signals
synchronization; there would be no need to communicate
(i.e., active low or high con?guration), fault con?guration,
group membership, etc.) for the auxiliary devices. The data
values loaded into the set-up registers 2321) may be provided
by the system controller through the synch/data bus.
The on-off and monitoring logic 2320 provides a direct
interface with the auxiliary devices. In particular, the logic
2320 provides enable and disable commands to the auxiliary
programming information.
In the third operational mode, the POL regulators operate
as an array in which the behavior of each POL regulator and
the array as a whole are coordinated by a system controller.
The system controller programs the operation of each of the
POL regulators over the synch/data serial bus, and thereby
overrides the predetermined settings of the POL regulators.
device in response to the values of the set-up registers 23219 as
well as commands received via the synch/data bus. For
example, the on-off logic 2320 will provide an enable com
The synch/data serial bus is further used to communicate
synchronization information to permit synchronization and
interleaving of the POL regulators. This operational mode
mand to the auxiliary device in accordance with timing data
(e.g., turn-on delay) de?ned in the set-up registers 23219. The
would not include interdevice communications over the cur
rent share interface.
20
the auxiliary device. The monitoring logic 2320 will then
control using the system controller and local control over
certain functionality. This way, the POL regulators operate as
an array coordinated by a system controller and also interop
erate with each other to perform functions such as current
communicate this status information back to the system con
25
sharing.
exemplary LDOs 240, 250. The auxiliary devices would typi
cally have less network capability and/ or intelligence than the
Thus, the system controller 226 can control and monitor
30
The auxiliary device controller 232 may be identi?ed with
a unique address. The address may be hardwired into the
auxiliary device controller or set by other methods. The sys
basic level (e.g., enable/disable) commands. The alternative
POL control system includes a system controller 202, and a
would be generally similar in construction to the system
controller 102 discussed above with respect to FIG. 3. It
should be appreciated that FIG. 6 illustrates differences from
the embodiment of FIG. 3, while omitting other details for the
35
addressed directly by the system controller 226 to alter or set
some of the settings as a function of the address (i.e., the
40
identi?er of the auxiliary device). The auxiliary device con
troller 232 may also be addressed directly by a user or host, or
hardwired, without having to go through the system control
45
auxiliary device control system 230, which further includes
plural auxiliary device controllers 232, 234. It should be
appreciated that a separate auxiliary device controller may be
ler 226.
FIG. 7 illustrates a screen shot of an exemplary graphical
user interface (GUI) used to program the operation of auxil
iary devices in accordance with the embodiment of FIG. 6. As
discussed above, a user may access the POL control systems
for purposes of monitoring, controlling and/ or programming
the POL control systems by coupling directly to the user
associated with each individual auxiliary device under con
trol. The auxiliary device control system 230 may be part of
the system controller 202 (e.g., integrated into the same cir
tem controller 202 may use the address within data messages
communicated to the auxiliary devices via the synch/data bus.
Alternatively, the auxiliary device controller 232 may be
sake of simplicity.
The alternative POL control system further includes an
non-POL devices in the same manner in which it controls and
monitor POL devices.
POL regulators, and may in some cases only be responsive to
plurality of POL regulators 106, 108. The system controller
202 would monitor and control operation of the auxiliary
devices in conjunction with the POL regulators to thereby
provide a systems-level solution. The system controller 202
troller 226, such as via the synch/data bus. It should be appre
ciated that other types of commands to the auxiliary device
and other types of status monitoring information from the
auxiliary device could be utilized, depending upon the par
ticular system needs and application for the auxiliary devices.
An alternative embodiment of the invention is illustrated in
FIG. 6. In this embodiment, the POL control system may
additionally include a plurality of auxiliary devices, such as
auxiliary devices will provide a responsive monitoring signal,
such as a power good signal, re?ecting the operating status of
Lastly, the fourth operational mode includes both central
communicate with the other elements of the POL control
interface bus via the system controller 226. The user system
would likely include a GUI that enables the display of status
information regarding the POL control systems. The GUI of
FIG. 7 displays graphically the tum-on/off delay for the aux
iliary devices as well as the POL regulators.
In particular, a timeline graph is included that shows an
amount of time in milliseconds following a turn-on/ off time
(i.e., time 0). At the top of the graph, an on/off line shows a
system via the synch/data bus. The system controller 202
positive step function occurring at time 0 (i.e., tum-on time),
50
cuitry or semiconductor devices), or may be provided as a
separate physical component of the POL control system.
The auxiliary device controllers 232, 234 further include a
respective interface 232a, set-up registers 232b, and on-off
55
and monitoring logic 2320. The interface 23211 is adapted to
includes an interface 224 that transforms data to/from the
POL regulators via the synch/data and OK/fault serial buses.
60
and the time line resetting to time 0 with a negative step
function (i.e., turn-off time). Activation waveforms for two
The interface 224 communicates over the synch/data serial
exemplary auxiliary devices (i.e., Aux 1, Aux 2) show similar
bus to transmit setting data and receive monitoring data, and
step functions that are offset from each time 0, re?ecting a
turn-on delay and a tum-off delay. Aux 1 shows a turn-on
communicates over the OK/fault serial bus to receive inter
rupt signals indicating a fault condition in at least one of the
connected POL regulators. The interface 23211 is coupled to
the synch/data bus to exchange the same types of data with the
auxiliary devices. As discussed above, the synch/data bus
delay of approximately 25 milliseconds, and a turn-off delay
65
of approximately 10 milliseconds. Similarly, Aux 2 shows a
turn-on delay of approximately 100 milliseconds, and a turn
off delay of approximately 10 milliseconds. The graph also
US 7,836,322 B2
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shows turn-on and tum-off delays for POL regulators. A
What is claimed is:
slidable tool bar at the bottom left enables a user to adjust the
1. A power control system comprising:
at least one programmable voltage regulator adapted to
magnitude of the tum-on and turn-off delays using a suitable
pointing device. Buttons along the right side of the GUI
enable the user to apply the programmed turn-on and tum-off
delays to an individual auxiliary device, or to all auxiliary
provide a corresponding output voltage having charac
teristics de?ned by received programming data and to
provide monitoring data re?ecting operational status of
the at least one programmable voltage regulator;
at least one non-programmable auxiliary voltage regulator
adapted to provide a corresponding output voltage in
devices of a designated group, or to all auxiliary devices of the
entire board. It should be appreciated that the GUI of FIG. 7
could be adapted to program otherparameters of the auxiliary
devices. Once the user has completed the programming,
appropriate data values are loaded into the appropriate set-up
registers within the corresponding auxiliary device control
response to an enable signal;
a system controller operatively connected to the at least one
ler, as discussed above.
It should be appreciated that a similar GUI may also be
used to monitor performance of the auxiliary devices. A user
may access the GUI via the user interface to the system
controller, and view a graphic showing the operational status
of the auxiliary devices as well as the POL regulators. In the
event of a fault condition, for example, the user may be able
to use the GUI to alter the operation of the POL control
20
programmable voltage regulator and to said at least one
auxiliary voltage regulator via a common serial data bus
and adapted to send the programming data and receive
the monitoring data via the serial data bus; and
a data monitoring circuit operatively coupled to the at least
one auxiliary voltage regulator to receive analog mea
surements therefrom and communicate corresponding
monitoring data to the system controller.
2. The power control system of claim 1, wherein the data
monitoring circuit further comprises an analog-to-digital
system by selectively turning off auxiliary devices and/or
converter (ADC) circuit adapted to convert the analog mea
POL regulators, changing their sequencing or grouping, and
surements to digital signals.
taking other corrective measures.
A drawback with the embodiment of FIG. 6 is that the
status information available from the auxiliary devices is
25
troller via the common serial bus.
necessarily limited. In the exemplary embodiment of FIG. 6,
the auxiliary devices provide only a Power Good status sig
4. The power control system of claim 1, wherein the data
monitoring circuit communicates the corresponding monitor
ing data to the system controller through a communication
nal. This Power Good status signal is “binary” in that it can
re?ect only two states: acceptable power state and unaccept
able power state. It would be advantageous for certain appli
cations if the system controller could receive more detailed
channel separate from the common serial bus.
5. The power control system of claim 1, further comprising
monitoring information from the auxiliary device controller
232, similar to that received from the POL regulators 106, 108
(e.g., output voltage, output current, temperature, etc.)
35
7. The power control system of claim 6, wherein said
front-end regulator is combined with said system controller in
receive various analog signal outputs from the plurality of
auxiliary devices, such as output voltage (V01), output current
(I01), and temperature (T1). The ADC 232d would convert
a single device.
8. The power control system of claim 6, wherein said at
45
auxiliary device controllers 232, 234, a separate monitoring
circuit 260 may be included in the system controller 202 as
50
least one pro grammable voltage regulator further comprises a
power conversion circuit adapted to transform said interme
diate voltage to a desired output voltage.
9. The power control system of claim 1, wherein said
system controller further comprises a user interface adapted
to communicate said programming data from a user to the at
least one programmable voltage regulator.
10. The power control system of claim 9, further compris
ing a graphical user interface operatively coupled to the user
interface, the graphical user interface adapted to enable user
the analog signals from the auxiliary device(s), e.g., output
voltage, output current, temperature, etc. Notably, the moni
toring circuit 260 may not be operatively connected to the
iary voltage regulator.
mediate voltage bus.
iliary device controllers 232, 234. The ADC 232d would
shown in FIG. 9. The monitoring circuit 260 would operate
similar to the monitoring block 130 discussed above with
respect to FIG. 5. The monitoring circuit 260 would receive
a second serial data bus carrying fault management informa
tion between said system controller and said at least one
programmable voltage regulator and said at least one auxil
6. The power control system of claim 5, further comprising
a front-end regulator providing an intermediate voltage to
said at least one programmable voltage regulator on an inter
An alternative embodiment of the invention is illustrated in
FIG. 8. In this embodiment, the POL control system is sub
stantially the same as in FIG. 6, with the addition of an
analog-to-digital conversion circuit (ADC) 232d to the aux
these analog outputs to a digital representation that is com
municated the system controller logic 226 via interface 224.
In the alternative, instead of adding the ADC 232d to the
3. The power control system of claim 2, wherein the ADC
circuit communicates the digital signals to the system con
55
generation of said programming data.
synch/data bus, and may communicate those monitoring data
signals in analog or digital form directly to the controller logic
11. The power control system of claim 1, wherein said at
least one auxiliary voltage regulator each further comprises a
226.
Having thus described a preferred embodiment of a
method and system to control and monitor an array of DC/DC
unique address.
60
power converters and auxiliary devices, it should be apparent
to those skilled in the art that certain advantages of the system
have been achieved. It should also be appreciated that various
modi?cations, adaptations, and alternative embodiments
thereof may be made within the scope and spirit of the present
invention. The invention is further de?ned by the following
claims.
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12. The power control system of claim 11, wherein the
system controller includes the unique address with the pro
gramming data sent via the serial data bus.
13. The power control system of claim 1, wherein said at
least one auxiliary voltage regulator further comprises a lin
ear regulator.
14. The power control system of claim 1, wherein said at
least one auxiliary voltage regulator further comprises a low
drop-out (LDO) linear regulator.
US 7,836,322 B2
13
14
15. The power control system of claim 1, wherein the
programming data includes at least one of turn-on delay,
17. The power control system of claim 1, wherein the serial
data bus further comprises a two-wire bus.
turn-off delay, polarity of input/ output signals, fault con?guration, and group membership.
18. The power control system of claim 1, wherein the serial
data bus further comprises a single wire bus.
16. The power control system of claim 1, wherein the serial 5
data bus further comprises an 12C bus.
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