Assembly Language Manual

Assembly Language Manual

ASSEMBLY LANGUAGE MANUAL

Specifications Subject to Change.

Convergent Technologies, Convergent, CTOS, CT-BUS, IWS,

EWS, and MWS are trademarks of Convergent Technologies.

Copyright © 1980 by Convergent Technologies

CONTENTS

Guide to Technical Documentation ............................. vii

1 Introduction ............................................... 1

Choice Among Convergent Languages ........................ 1

Features of the Assembly Language ........................ 2

Design of the Instruction Set ............................ 2

Arrays ................................................... 3

Object Modules and Linking ............................... 3

Segments and Memory References ........................... 4

Registers ................................................ 5

Addressing ............................................... 5

Procedures ............................................... 7

Macros ................................................... 8

Example .................................................. 8

Invoking the Assembler from the Executive ................ 8

Field Descriptions .................................... 10

2 Programs and Segments ..................................... 13

Segments ................................................ 13

SEGMENT/ENDS Directives ............................... 13

Segment Nesting ....................................... 14

ASSUME Directive ........................................ 16

Loading Segment Registers ............................... 17

Segment Override Prefix ................................. 18

Anonymous References .................................... 19

Memory Reference in String Instructions ................. 20

GROUP Directive ......................................... 21

Procedures .............................................. 22

PROC/ENDP Directives .................................. 22

Calling a Procedure ................................... 23

Recursive Procedures and Procedure Nesting on

the Stack ............................................. 23

Returning from a Procedure ............................ 25

Location Counter ($) and ORG Directive .................. 25

EVEN Directive .......................................... 26

Program Linkage (NAME/END, PUBLIC and EXTRN ............. 26

END Directive ......................................... 27

3 Data Definition........................................... 29

Introduction ............................................ 29

Constants ............................................... 29

Attributes of Data Items ................................ 31

SEGMENT ............................................... 31

OFFSET ................................................ 31

TYPE .................................................. 31

DISTANCE .............................................. 31

Variable Definition (DB, DW, DD Directives .............. 32

Constant Initialization ............................... 32

Indeterminate Initialization .......................... 33

Address Initialization (DW and DD Only ................ 33

String Initialization ................................. 33

Contents iii

Enumerated Initialization ............................. 34

DUP Initialization .................................... 34

Labels and the LABEL Directive .......................... 34

LABEL Directive ....................................... 35

LABEL with Variables .................................. 35

LABEL with Code ....................................... 36

Label Addressability .................................. 36

Records ................................................. 37

Initializing Records .................................. 38

Structures .............................................. 39

Default Structure Fields .............................. 41

Overridable Structure Fields .......................... 41

Initializing Structures ............................... 42

4 Operands and Expressions.................................. 43

Operands ................................................ 43

Immediate Operands ...................................... 43

Register Operands ....................................... 44

Explicit Register Operands ............................ 44

Implicit Register Operands ............................ 45

Segment Registers ..................................... 46

General Registers ..................................... 46

Flags ................................................. 46

Memory Operands ......................................... 46

Memory Operands to JMP and CALL ....................... 46

Variables ............................................. 48

Simple Variables .................................... 48

Indexed Variables ................................... 48

Double-Indexed Variables ............................ 48

Attribute Operators ..................................... 49

PTR, the Type Overriding Operator ..................... 49

Segment Override ...................................... 50

SHORT ................................................. 50

THIS .................................................. 51

Value-Returning Operators ............................... 51

Record Operators ........................................ 53

Operator Precedence in Expressions ...................... 53

EQU Directive ........................................... 54

PURGE Directive ......................................... 54

5 Forward References........................................ 55

6 Instruction Format........................................ 57

7 Flags ..................................................... 59

Flag Registers .......................................... 59

Flag Usage .............................................. 60

Auxiliary Carry Flag (AF) ............................. 60

Carry Flag (CF) ....................................... 60

Overflow Flag (OF) .................................... 60

Parity Flag (PF) ...................................... 60

Sign Flag (SF) ........................................ 61

Zero Flag ............................................. 61 iv Assembly Language Manual

8 Macro Assembler........................................... 63

Introduction ............................................ 63

LOCAL Declaration ....................................... 63

Conditional Assembly .................................... 64

Repetitive Assembly ..................................... 66

Interactive Assembly (IN and OUT) ....................... 68

Comments ................................................ 68

Match Operation ......................................... 69

Advanced Features ....................................... 69

Bracket and Escape .................................... 71

MATCH Calling Patterns ................................ 72

Processing Macro Invocations .......................... 72

Expanded and Unexpanded Modes ......................... 73

Nested Macro Expansion ................................ 73

9 Accessing Standard Services from Assembly Code ............ 75

Calling Conventions ..................................... 75

Register Usage Conventions .............................. 77

Segment and Group Conventions ........................... 78

Main Program .......................................... 78

SS and DS When Calling Object Module Procedures ....... 78

Interrupts and the Stack ................................ 79

Use of Macros ........................................... 79

Virtual Code Segment Management and Assembly Code ....... 81

System Programming Notes ................................ 83

10 Assembly Control Directives ............................... 85

EJECT ................................................... 85

GEN ..................................................... 85

NOGEN ................................................... 85

GENONLY ................................................. 85

INCLUDE ................................................. 85

LIST .................................................... 85

NOLIST .................................................. 85

PAGELENGTH .............................................. 85

PAGEWIDTH ............................................... 86

PAGING .................................................. 86

NOPAGING ................................................ 86

SAVE .................................................... 86

RESTORE ................................................. 86

TITLE ................................................... 86

Using a Printer with Assembly Listings .................. 86

11 Sample Assembler Modules.................................. 87

Appendix A: Instruction Set................................. A-1

Leg end ................................................ A-1

Alternate Mnemonics .................................... A-4

Appendix B: Reserved Words .................................. B-1

Contents v

LIST OF FIGURES

Figure 1-1. Analysis of Sample Instruction ................... 6

Figure 1-2. Example of Complete Assembly Program ............. 9

Figure 2-1. CALL/RET Control Flow ........................... 24

Figure 11-1. Error Message Module Program .................... 88

Figure 11-2. Standalone Main Program ......................... 91

Figure 11-3. Convergent-Compatible Main Program .............. 92

LIST OF TABLES

Table 2-1. String Instruction Mnemonics ...................... 20

Table 3-1. Constants ......................................... 29

Table 3-2. Target Label Addressability ....................... 36

Table A-1. Effective Address Calculation Time ............... A-3

Table A-2. Alternate Mnemonics .............................. A-4

Table A-3. Instruction Set in Numeric Order of

Instruction Code ................................. A-5

Table A-4. Instruction set in Alphabetic Order of

Instruction Mnemonic ............................ A-12 vi Assembly Language Manual

GUIDE TO TECHNICAL DOCUMENTATION

This Manual is one of a series that documents the Convergent™

Family of Information Processing Systems. The series includes: o Technical Summary o Workstation Hardware Manual o Peripherals Hardware Manual o Central Processing Unit o CTOS™ Operating System Manual o Executive Manual o Editor Manual o BASIC Manual o FORTRAN Manual o COBOL Manual o Pascal Manual o Assembly Language Manual o Debugger Manual o Utilities Manual o Data Base Management System Manual o 3270 Emulator Manual o System Programmer's Guide o Operator's Guide

This section outlines the contents of these manuals.

The Technical Summary briefly describes the hardware and software of the Convergent Family of Information Processing Systems. It summarizes the other manuals in one volume. It can be helpful to read this overview before reading the other manuals.

The Workstation Hardware Manual describes the mainframe, keyboard, and video display. It specifies system architecture, printed circuit boards (motherboard, processor, I/O-memory, video

Documentation Guide vii

control, ROM expansion, and RAM expansion), keyboard, video monitor, Multibus interface, communications interfaces, power supply, and environmental characteristics of the workstation.

The Peripherals Hardware Manual describes the disk subsystems.

It specifies the disk controller motherboard, controller boards for the floppy disk and the Winchester disks, power supplies, disk drives, and environmental characteristics.

The Central Processing Unit describes the main processor, the

8086. It specifies the machine architecture, instruction set and programming at the symbolic instruction level.

The CTOS™ Operating System Manual describes the operating system. It specifies services for managing processes, messages, memory, exchanges, tasks, video, disk, keyboard, printer, timer, communications, and files. In particular, it specifies the standard file access methods.

The Executive Manual describes the command interpreter, the program that first interacts with the user when the system is turned on. It specifies commands for managing files and invoking other programs such as the Editor and the programming languages.

The Editor Manual describes the text editor.

The BASIC, FORTRAN, COBOL, Pascal, and Assembly Language Manuals describe the system's programming languages. Each manual specifies both the language itself and also operating instructions for that language. For Pascal, the manual is supplemented by a popular text, Pascal User Manual and Report.

The Debugger Manual describes the Debugger, which is designed for use at the symbolic instruction level. Together with appropriate interlistings, it can be used for debugging FORTRAN, Pascal, and assembly language programs. (BASIC and COBOL, in contrast, are more conveniently debugged using special facilities described in their respective manuals.)

The Utilities Manual describes miscellaneous programs such as the

Linker, which links together separately compiled object files, and the Asynchronous Terminal Emulator.

The Data Base Management System Manual describes the data base management system. It specifies (1) the data definition language, which defines the logical structure of data bases and separately defines their physical organization, (2) the host language interfaces for accessing data bases from each of the system's programming languages, and (3) the utilities for creating, loading, unloading, and reorganizing data bases.

The 3270 Emulator Manual describes the 3270 emulator package.

viii Assembly Language Manual

The System Programmer's Guide addresses the needs of the system programmer or system manager for detailed information on operating system structure and system operation. It describes

(1) diagnostics, (2) procedures for customizing the operating system, and (3) system utilities normally used only by a system programmer or manager, for example, Initialize Volume, Backup, and Restore.

The Operator's Guide addresses the needs of the average user for operating instructions. It describes the workstation switches and controls, keyboard function, and floppy disk handling.

Documentation Guide ix

1 INTRODUCTION

This Manual describes the Convergent assembler and assembly language. The Manual is directed towards readers who understand some assembly language reasonably well

To understand an assembler, it is usually helpful to first understand the machine architecture of the target CPU. If you are not already familiar with the machine-level architecture of the

Convergent Information Processing System, you can find it useful to read the Central Processing Unit. That document also contains a brief discussion of assembly language programming at an elementary level, and it describes the instruction set in detail. So, if this Manual is too difficult, try reading the Central

Processing Unit.

Since this Manual is primarily a reference work, we do not expect you to read it straight through. But if you are not entirely conversant with Convergent assembly language, you should initially read the first four sections.

Choice Among Convergent Languages

A programmer working with a Convergent Information Processing

System has many different languages to choose among. The choice among languages involves several considerations.

o Does the program require the unique business features of

COBOL or the scientific features of FORTRAN?

o Is an interpreted language (such as BASIC) suitable?

o Will the system programming and data structuring facilities of Convergent Pascal be particularly valuable in the program to be written?

o Should the program be divided into parts to be written in different languages and combined by the Linker?

If the program (or program part) requires direct access to processor registers and flags, then assembly language is the best choice. To the extent that memory utilization and object code efficiency are more important than development speed and program- mer productivity, assembly language is a better tool than Pascal or FORTRAN.

It is rarely the case that an entire application system ought to be written in assembly language. The programmer should determine those parts in which direct access to machine features, efficiency, and memory utilization are overriding concerns, and implement those parts in assembly language, while writing the remainder of the application in an appropriate high-level language.

Introduction 1

Features of the Assembly Language

The Convergent assembly language features a powerful instruction set, sophisticated code and data structuring mechanisms, strong typing (the ability to check that the use of data is consistent with its declaration), a conditional assembly facility, and a macro language with extensive string manipulation capabilities.

Design of the Instruction Set

A complete description of the instruction set is given in Appen- dix A and in the Central Processing Unit.

This assembly language differs from most other assembly lan- guages, which usually have one instruction mnemonic for each operation code (opcode). In this assembly language, a particular instruction mnemonic can be assembled into any of several opcodes; the type of opcode depends on the type of operand.

This assembly language is a "strongly typed" language because mixed operand types are not permitted in the same operation (as, for example, moving a declared byte to a word register). You cannot inadvertently move a word to a byte destination, thereby overwriting an adjacent byte, nor can you move a byte to a word destination, thereby leaving meaningless data in an adjacent byte. However, if you need to override the typing mechanism, there is a special operation, called PTR, which allows you to do this. See Section 4.

The assembly language makes it possible to convey much information in a single, easy-to-code instruction. Consider this instruction:

SUB [BP][SI].field4, CH

The contents of the 8-bit register CH are subtracted from a memory operand; registers BP and SI are used to calculate the address of the memory operand; and the identifier field4 and the dot operator (.) are used to designate symbolically an offset within the structure pointed to by BP and SI.

The register BP points within the run-time stack and is used, as is the case in this example, when the operand is on the stack.

(The segment register for the stack segment is SS, so the 16-bit contents of SS are automatically used together with BP in addressing the memory operand.)

The 16-bit contents of register SI are the offset of the data from the top of the stack. That is, the contents of BP and SI are added in the effective address calculation.

In this context, the dot operator (.) refers to a structure.

(See Section 3 for a description of structure definitions.) The

2 Assembly Language Manual

identifier that follows, field4, identifies a structure field.

Its value gives the relative distance, in bytes, from the begin- ning of the structure to field4. (Offset values for each field of the structure relative to the beginning of the structure are generated by the assembler. In this way the structure can be used as a pattern of relative offset values, a "storage template.")

This instruction combines the contents of the stack segment register SS, the end of stack register BP, the index register SI, and the offset of field4, to form an absolute machine address.

The contents of the 8-bit register CH are subtracted from the byte thus addressed. This instruction includes opcode, base register, index register, structure displacement and relative offset, type information, direction (register to memory), and source register. The instruction assembles into only three bytes.

Arrays

Arrays of bytes, words, doublewords, structures, and records

(defined below) can be defined and initialized with, respec- tively, the DB, DW, DD, structure-name, and record-name directives, as shown here: rgb DB 50 DUP(66) rgw DW 100 DUP(0)

;Allocate 50 bytes, named rgb,

;initialize each to 66.

;Allocate 100 words, named rgw,

;initialize each to 0.

rgdd DD 20 DUP(?) ;Allocate 20 doublewords, named

;rgdd, don't initialize them.

When you refer to array elements, be aware that the origin of an array is 0. This means that the first byte of the array rgb is rgb[0], not rgb[1]. Its nth byte is rgb[n-1]. Also, be aware that indexes are the number of bytes from the start of the array, regardless of whether the array elements are bytes, words, or doublewords.

Object Modules and Linking

An object module can contain any (or all) of the following: code, constants, variable data. The Linker (see the Utilities Manual) arranges the contents of a set of object modules into a memory image, typically with all code together, all constants together, and all variable data together. (This arrangement makes optimal use of the addressing structures of the 8086.) Although the

Linker produces such arrangements automatically, the programmer will occasionally want to exercise explicit control. The con- cepts and facilities used to arrange memory are explained in

Section 2.

Introduction 3

Segments and Memory References

At assembly-time, you can define as many segments as you wish, as long as each assembly module has least one segment. (You can omit segment definition statements, in which case the default segment is assigned the name ??SEG by the assembler.) Each inst- ruction of the program and each item of data must lie within a segment. Code and data may be mixed in the same segment, but this is generally not done because such a segment cannot be link- ed with object segments produced by Pascal or FORTRAN.

Here are examples of segments: o global data segment, o local data segment, o stack segment, and o main program segment (code).

A hardware segment in memory contains up to 64K bytes. It starts at an address divisible by 16, called a paragraph boundary. A paragraph number that is used to address the beginning of a hardware segment is a segment base address.

A segment defined by the programmer is a logical segment. It does not necessarily start at a paragraph boundary, so logical segments need not correspond to hardware segments.

The paragraph numbers at which segments begin are contained, at run-time, within the four 16-bit segment registers (CS, DS, ES, and SS). At any time, there are four "current" segments. CS always defines the current code segment. DS usually defines the current data segment. SS always defines the current stack segment. ES can define an auxiliary data segment.

The memory address calculations done by the processor have two components: a segment base address and an offset. The segment base address must be in one of the four segment registers (CS,

DS ES, or SS).

When a program gets a data item from memory, the hardware com- bines the 16-bit offset and the 16-bit segment base address as follows:

20-bit physical address = 16*(segment base address) + offset

For example, if a program is assembled at offset 2400h within the data segment, and if segment register DS is loaded with the value

3E00h, then the physical address of the data is:

16*3E00h + 2400h = 40400h

4 Assembly Language Manual

The programmer is generally not concerned with this physical address.

Registers

The registers are: o 16-bit segment (CS, DS, SS, ES), o 16-bit general (AX, BX, CX, DX, SP, BP, SI, DI), o 8-bit general (AH, AL, BH, BL, CH, CL, DH, DL), o Base and index 16-bit (BX, BP, SI, DI), and o 1-bit flag (AF, CF, DF, IF, OF, PF, SF, TF, ZF).

Segment registers contain segment base addresses and must be appropriately initialized at run-time. (If assembly language is used only to implement subroutines for a main program written in a high-level language, this initialization is automatic.)

Each of the 16-bit general, 8-bit general, and base and index registers can be used in arithmetic and logical operations. We frequently call AX "the accumulator," but the processor actually has eight 16-bit accumulators (AX, BX, CX, DX, SP, BP, SI, DI) and eight 8-bit accumulators (AH, AL, BH, BL, CH, CL, DH, DL).

Each 8-bit accumulator is the high-order or low-order byte of AX,

BX, CX, or DX

Addressing

Operands can be addressed in several different ways with various combinations of base registers (BX and BP), index registers (SI and DI), displacement (adding an 8- or 16-bit value to a base or index register or to both), and direct offset (16-bit addresses used without the base or index register).

A two-operand instruction has a source operand, and a destination operand, as in:

MOV destination, source

The source operand can be an immediate value (a constant that is part of the instruction itself, such as the "7" in MOV CX, 7), a register, or a memory reference. If the source is an immediate value, then the destination operand can be either a register or a memory reference.

Introduction 5

6 Assembly Language Manual

Source and destination operands cannot both be memory references.

A memory reference is direct when a data item is addressed with- out the use of a register, as in:

MUL prod, DX ;prod is addressed toy 16-bit direct

;offset.

MOV CL, jones.bar ;Offset of jones plus bar is 16-bit direct

;offset.

A reference is indirect when a register is specified, as in:

MUL prod[BX], DX ;Destination address is base register plus

;16-bit displacement.

MOV CX, [BP][SI] ;Source address is sum of base register

;and index register.

See Figure 1-1 for an analysis of a sample instruction.

Procedures

The Convergent assembly language formalizes the concept of a callable procedure by providing explicit directives to identify the beginning and end of a procedure. Whereas other assembly languages start a procedure with a label and end it with a return instruction, the Convergent assembly language defines a procedure as a block of code and data delimited by PROC and ENDP state- ments. Thus the extent of a procedure is apparent. Here is an example:

WriteFile PROC

.

.

.

RET

.

.

.

RET

WriteFile ENDP

Procedures can be nested but must not overlap:

Introduction 7

WriteFile PROC

.

.

.

RET

WriteLine PROC

.

.

.

RET

.

.

.

WriteLine ENDP

.

.

.

RET

WriteFile ENDP

Macros

The macro capability of the assembler is used to define abbreviations for arbitrary text strings, including constants, expressions, operands, directives, sequences of instructions, comments, etc. These abbreviations can take parameters: they are string functions that are evaluated during assembly.

Fields of instruction can be parameters of macros. Macro calls can be nested. Macro definitions can be saved in a file. By including such a "macro library," the programmer can customize the assembler to include frequently used expressions, instruction sequences, and data definitions. The macro facility also provides interactive assembly by means of a macro-time console

I/O facility.

Example

See Figure 1-2 for an example of a complete assembly program.

Invoking the Assembler from the Executive

Invoke the assembler with the Executive's assemble command. The following form appears:

Assemble

Source files

[Errors only?]

[GenOnly, NoGen, or Gen]

[Object file]

[List file]

[Error file]

[List on pass 1?]

8 Assembly Language Manual

Introduction 9

You need to know how to fill in a form. This is described in

"Filling in a Form" in the Executive Manual.

Field Descriptions

Source files. Fill in the "Source files" field with a list of the names of the source files to be assembled. It is the only required field. If several files are specified, the result is logically like assembling the single file that is the concat- enation of all the source files. (In a list of names of source files, separate each name by a space. Do not use commas.)

As an example, suppose the program is contained in Main.Asm and depends on a set of assembly-time parameters. You might maintain two source fragments to define the parameters, one for debugging, and one for production. Then "Source files" would be either:

ParamsDegbugging.Asm Main.Asm

or:

ParamsProduction.Asm Main.Asm

[Errors only?]. Fill in the "[Errors only?] field with "Yes" if you want a listing only of lines with errors. The listing normally contains source and object code for all source lines.

Assembly produces an object file and a list file. The names of the object and list files are specified as described below. The default for "[Errors only?]" is "No", that is, a full listing.

[GenOnly, NoGen, or Gen]. Fill in the "[GenOnly, NoGen, or Gen]" field to specify how the results of macro expansion are listed.

This setting can also be made in the source with the assembly control directives $GENONLY, $NOGEN, and $GEN. In GenOnly mode the results of macro expansion are listed. In NoGen mode, the listing contains the unexpanded macro invocations. In Gen mode, the listing contains invocations and full expansions, as well as intermediate stages of expansion. This last mode is most useful in debugging complex macros. Note that these controls affect only the content of the listing: the result of full expansions is always assembled to produce the object code. The default for

"[GenOnly, NoGen, or Gen]" is GenOnly.

[Object file]. Fill in the "[Object file]" field to specify to which object file to write the object code that results from the assembly. The default is the last source file. That is, if you do not specify an object, a default object file is chosen as follows: treating the last source name as a character string, strip off any final suffix beginning with the character period

(.), and add the characters ".Obj". The result is the name of the file. For example, if the last source file is:

10 Assembly Language Manual

[Dev]<Jones>Main then the default object file is:

[Dev]<Jones>Main.Obj

If the last source file is:

Prog.Asm then the default object file is:

Prog.Obj

[List File]. A listing of the assembly is written to the specified list file. The default is the last source file. That is, if no explicit listing file is specified, a file name is derived from the last source file. With the examples given above, the list files would be named, respectively:

[Dev]<Jones>Main.lst

and:

Prog.lst

[Error file]. Fill in the "[Error file]" field with the name of the file to receive the "errors only" listing if you wish to create both a full listing and a listing of just the errors. The default is to create no such listing.

[List on pass 1?]. Fill in the "[List on pass 1?]" field with

"Yes" to diagnose certain errors in macros. Listings are normally generated only during the second assembly pass.

However, some programming errors involving macros prevent the assembly process from ever reaching its second pass. To diagnose such errors, specify "[List on pass 1?]" as "Yes". Listings are then generated during both assembly passes. The default is "No".

Introduction 11

2 PROGRAMS AND SEGMENTS

Segments

SEGMENT/ENDS Directives

Each of the instructions and variables of a program is within some segment. Segments can be named explicitly using the SEGMENT directive, but if no name is specified for a segment, the assembler assigns the name ??SEG. The SEGMENT directive also controls the alignment, combination, and contiguity of seg- ments. Its format is:

[segname] SEGMENT [align-type] [combine-type] ['classname']

.

.

.

[segname] ENDS

The optional fields must be in the order given. The segment is located on a memory boundary specified by [align-type], as follows:

1. PARA (the default)--the segment begins on a paragraph boundary, an address with the least significant hexadecimal digit of 0.

2. BYTE--the segment can begin anywhere.

3. WORD--the segment begins on a word boundary, i.e., an even address.

4. PAGE--the segment begins on an address divisible by 256.

Segments can be combined with other segments by the Linker as specified by [combine-type] . Segment combination permits segment elements from different assemblies to be overlaid or concatenated by the Linker. Such segment elements must have the same segname, classname, and an appropriate combine-type, as follows:

1. Not combinable (the default).

2. PUBLIC--when linked, this segment is concatenated (made adjacent) to others of the same name. The Linker controls the order of concatenation during linkage, according to your specifications.

3. AT expression--the segment is located at the 16-bit segment base address evaluated from the given expression. The expression argument is interpreted as a paragraph number.

For example, if you wish the segment to begin at paragraph

3223 (absolute memory address 32230h), specify AT 3223h. You can use any valid expression that evaluates to a constant and

Programs and Segments 13

has no forward references. An absolute segment is permitted to establish a template for memory to be accessed at run- time; no assembly-time data or code is automatically loaded into an absolute segment.

4. STACK--the elements are overlaid such that the final bytes of each element are juxtaposed to yield a combined segment whose length is the sum of the lengths of the elements. Stack segments with the name STACK are a special case. When stack segments are combined, they are overlaid but their lengths are added together. When the Linker has combined all stack segments, it forces the total length of the aggregate stack segment to a multiple of 16 bytes. Compilers construct stack segments automatically. However, if your entire program is written in assembly language, you have to define an explicit stack segment. There are special rules regarding the use of the stack that must be observed for calls to standard object module procedures. See Section 9, "Accessing Standard

Services from Assembly Code" below.

5. COMMON--the elements are overlaid such that the initial bytes of each element are juxtaposed to yield a combined segment whose length is the largest of the lengths of the elements.

The optional classname can be used to affect the ordering of segments in the memory image constructed by the Linker. See the

Utilities Manual for details.

Segment Nesting

You can code a portion of one segment, start and end another, and then continue with the coding of the first. However, there is only lexical, not physical nesting, since the combination rules given above are always followed.

Lexically nested segments must end with an ENDS directive before the enclosing SEGMENT directive is closed with its ENDS directive.

The fundamental units of relocation and linkage are segment elements, linker segments, class names, and groups.

An object module is a sequence of segment elements. Each segment element has a segment name. An object module might consist of segment elements whose names are B, C, and D.

The Linker combines all segment elements with the same segment name from all object modules into a single entity called a linker segment. A linker segment forms a contiguous block of memory in the Fun-time memory image of the task. For example, you might use the Linker to link these two object modules:

14 Assembly Language Manual

Object Module 1

containing segment elements B, C, D

Object Module 2

containing segment elements C, D, E

Linkage produces these four linker segments:

Linker Segment B consisting of element B1

Linker Segment C consisting of elements C1, C2

Linker Segment D consisting of elements D1, D2

Linker Segment E consisting of element E2

(In each of these cases, xi denotes the segment element x in module i. )

The ordering of the various linker segments is determined by class names. (A class name is an arbitrary symbol used to desi- gnate a class.) All the linker segments with a common class name and segment name go together in memory. For example, if B1, D1, and E2 have class names Red, while C1 has class name Blue, then the ordering of linker segments in memory is:

B, D, E, C

If you look inside the linker segments, you see that the segment elements are arranged in this order:

B1, D1, D2, E2, C1, C2

(If two segment elements have different class names, then they are considered unrelated for purposes of these algorithms, even though they have the same segment name.)

As you see from this, segment names and class names together determine the ordering of segment elements in the final memory image.

The next step for the Linker is to establish how hardware segment registers address these segment elements at run-time.

A group is a named collection of linker segments that is addres- sed at run-time with a common hardware segment register. To make the addressing work, all the bytes within a group must be within

64K of each other.

Several linker segments can be combined into a group. For example, if B and C were combined into a group, then a single hardware segment register could be used to address segment elements B1, C1, and C2.

Segment, class, and group names can be assigned explicitly in assembler modules using appropriate assembler directives. Most

Programs and Segments 15

compiled languages assign these names automatically. (See the individual language manuals for details.)

ASSUME Directive

The ASSUME directive declares how the instructions and data spec- ified during assembly are to be addressed from the segment base registers during execution. The programmer must explicitly control the values in segment registers at run-time. Use of the

ASSUME directive permits the assembler to verify that data and instructions will be addressable at run-time.

The ASSUME directive can be written either as:

ASSUME seg-reg:seg-name [, ...] or:

ASSUME NOTHING

Here seg-reg is one of the segment registers.

Seg-name is one of these:

1. A segment name, as:

ASSUME CS:codeSeg, DS:dataSeg

2. A GROUP name that has been defined earlier, as:

ASSUME DS:DGroup, CS:CGroup

3. The expression SEG variable-name or SEG label-name, as:

ASSUME CS:SEG Main, DS:SEG Table

4. The keyword NOTHING, as:

ASSUME ES:NOTHING

A particular seg-reg:seg-name pair remains in force until another

ASSUME assigns a different segment (or NOTHING) to the given segreg. To ASSUME NOTHING means to cancel any ASSUME in effect for the indicated registers. A reference to a variable whose segment is ASSUMEd automatically generates the proper object instruction; a reference to a variable whose segment is not ASSUMEd must have an explicit segment specification. (See the "Segment Override Prefix" below.)

Here is an example:

16 Assembly Language Manual

Tables SEGMENT

xTab DW 100 DUP(10)

yTab DW 500 DUP(20)

Tables ENDS

ZSeg SEGMENT

zTab DW 800 DUP(30)

ZSeg ENDS

Sum SEGMENT

;100-word array,

;initially 10’s.

;500-word array

;initially 20's.

;800-word array,

;initially 30’s.

ADD BX, yTab

MOV AX, SEG zTab

MOV ES, AX

MOV ES:zTab, 35

ASSUME CS:Sum,DS:Tables,ES:NOTHING ;Sum addressable through

Start: MOV BX, xTab

;CS and Tables through

;DS. No assumption

;about ES.

;xTab addressable by DS:

;defined in Tables.

;yTab addressable by DS:

;defined in Tables.

;Now AX is the proper

;segment base address to

;address references to

;zTab.

;ES now holds the

;segment base address

;for ZSeg.

;zTab must be addressed

;with explicit segment

;override--the

;assembler doesn’t know

;what segment register

;to use automatically.

Sum ENDS

In this example, the ASSUME directive:

1. Tells the assembler to use CS to address the instructions in the segment Sum. (This fragment of program does not load

CS. CS must previously have been set to point to the segment

Sum. For example, CS is often initialized by a long jump or long call.)

2. Tells the assembler to look at DS for the symbolic references to xTab and yTab.

Loading Segment Registers

The CS register is loaded by a long jump (JMP), a long call

(CALL), an interrupt (INT n or external interrupt), or by a hardware RESET.

Programs and Segments 17

The instruction INT n loads the instruction pointer (IP) with the

16-bit value stored at location 4*n of physical memory, and loads

CS with the 16-bit value stored at physical memory address 4*n+2.

A hardware RESET loads CS with 0FFFFh and IP with 0.

Here is an example of defining the stack and loading the stack segment register, SS:

Stack SEGMENT STACK

DW 1000 DUP(0)

StackStart LABEL WORD

Stack ENDS

;1000-words of

;stack.

;Stack expands

;toward low memory.

StackSetup SEGMENT

ASSUME CS:StackSetup

MOV BX, Stack

MOV SS, BX

MOV SP, OFFSET StackStart ;start = end

;initially

StackSetup ENDS

This example illustrates an important point: each of the two register pairs SS/SP and CS/IP must be loaded together. The hardware has special provision to assist in this: loading a segment register by a POP or MOV instruction causes execution of the very next instruction to be protected against all inter- rupts. That is why the very next instruction, after the load of the stack base register, SS, must load the stack offset register,

SP.

CS and its associated offset IP are loaded only by special instructions and never by normal data transfers. SS and its associated offset SP are loaded by normal data transfers but must be loaded in two successive instructions.

Segment Override Prefix

If there is no ASSUME directive for a reference to a named variable, then the appropriate segment reference can be inserted explicitly as a segment override prefix coding. This is the format: seg-reg:

Here seg-reg is CS, DS, ES, or SS, as in:

DS:xyz

This construct does not require an ASSUME directive for the variable reference, but its scope is limited to the instruction in which it occurs.

18 Assembly Language Manual

Thus, the following two program fragments are correct and equivalent:

Hohum SEGMENT

ASSUME CS:Hohum, DS:Pond

MOV AX, Frog

ADD AL, Toad

MOV Cicada, AX Hohum ENDS

Hohum SEGMENT

ASSUME CS:Hohum

MOV AX, DS:Frog

ADD AL, DS:Toad

MOV DS:Cicada, AX

Hohum ENDS where Pond would be defined by:

Pond SEGMENT

Frog DW 100 DUP (0)

Toad DB 500 DUP (0)

Cicada DW 800 DUP (0)

Pond ENDS

Anonymous References

;100 words 0’s

;500 bytes 0's

;800 words 0's

Memory references that do not include a variable name are called anonymous references. These are examples:

[BX]

[BP]

Hardware defaults determine the segment registers for these anonymous references, unless there is an explicit segment prefix operator. These are the hardware defaults:

Addressing

[BX]

[BX][DI]

[BX][SI]

[BP]

[BP][DI]

[BP][SI]

[DI]

[SI]

Default

SS

SS

DS

DS

DS

DS

DS

SS

The exceptions to these defaults are:

1. PUSH, POP, CALL, RET, INT, and IRET always use SS and this default cannot be overridden.

Programs and Segments 19

2. String instructions on operands pointed to by DI always use

ES and this default cannot be overridden.

Be particularly careful that an anonymous reference is to the correct segment: unless there is a segment prefix override, the hardware default is applied- For example;

ADD BX, [BP+5] is the same as ADD AX, SS:[BP+5]

MOV [BX+4], CX is the same as MOV DS:[BX+4], CX

SUB [BX+SI], CX is the same as SUB DS: [BX+SI], CX

AND [BP+DI], DX is the same as AND SS:[BP+DI], DX

MOV BX, [SI].one is the same as MOV BX, DS:[SI].one

AND [DI], CX is the same as AND DS:[DI], CX

The following examples require explicit overrides since they differ from the default usage:

MOV CS:[BX+2], AX

XOR SS:[BX+SI], CX

AND DS:[BP+DI], CX

MOV BX, CS:[DI].one

AND ES:[SI+4], DX

Memory Reference in String Instructions

The mnemonics of the string instructions are shown in Table 2-1.

These include those that can be coded with operands (MOVS, etc.) and those that can be coded without operands (MOVSB, MOVSW, etc.).

Each string instruction has type-specific forms (e.g., LODSB,

LODSW) and a generic form (e.g., LODS). The assembled machine instruction is always type-specific. If you code the generic form, you must provide arguments that serve only to declare the type and addressability of the arguments.

Table 2-1. String Instruction Mnemonics.

Mnemonic

For Byte

Operands

Move

Compare

Load AL/AX

Store from AL/AX

Compare to AL/AX

Mnemonic

For Word

Operands

MOVSB

CMPSB

LODSB

STOSB

SCASB

Mnemonic

For Symbolic

Operands

MOVSW

CMPSW

LODSW

STOSW

SCASW

Operands*

MOVS

CMPS

LODS

STOS

SCAS

*The assembler checks the addressability of symbolic operands.

The opcode generated is determined by the type (BYTE or WORD) of the operands.

20 Assembly Language Manual

A string instruction must be preceded by a load of the offset of the source string into SI, and a load of the offset of the destination string into DI.

The string operation mnemonic may be preceded by a "repeat prefix" (REP, REPZ, REPE, REPNE, or REPNZ), as in REPZ SCASB.

This specifies that the string operation is to be repeated the number of times contained in CX.

String operations without operands (MOVSB, MOVSW, etc.) use the hardware defaults, which are SI offset from DS, and DI offset from ES. Thus:

MOVSB is equivalent to:

MOVS ES:BYTE PTR[DI],[SI]

If the hardware defaults are not used, both segment and type overriding are required for anonymous references, as:

MOVS ES:BYTE PTR[DI], SS:[SI]

See Section 4 below for a discussion of PTR.

String instructions can not use [BX] or [BP] addressing.

For details of string instructions and their use with a repeat prefix, see the Central Processing Unit, page 65. In particular, note that repeat and segment override should not be used together if interrupts are enabled.

GROUP Directive

The GROUP directive specifies that certain segments lie within the same 64K bytes of memory. Here is the format: name GROUP segname [, ...]

Here name is a unique identifier used in referring to the group. segname can be the name field of a SEGMENT directive, an expression of the form SEG variable-name, or an expression of the form SEG label-name. (See "Value-Returning Operators" in Section

4 for a definition of the SEG operator.) [, ...] is an optional list of segnames. Each segname in the list is preceded by a comma.

This directive defines a group consisting of the specified segments. The group-name can be used much like a segname, except that a group-name must not appear in another GROUP statement as a segname.)

Here are three important uses of the GROUP directive:

Programs and Segments 21

1. Use it as an immediate value, loaded first into a general register, and then into a segment register, as in:

MOV CX,DGroup

MOV ES,CX

The Linker computes the base value as the lowest segment in the group.

2. Use it an ASSUME statement, to indicate that the segment register addresses all segments of the group, as in:

ASSUME CS:CGroup

3. Use it as an operand prefix, to specify the use of the group base value or offset (instead of the default segment base value or offset), as in

MOV CX,OFFSET DGroup:xTab

(See "Value-Returning Operators" in Section 4 for additional information about OFFSET.)

It is not known during assembly whether all segments named in a

GROUP directive will fit into 64K; the Linker checks and issues a message if they do not fit. Note that the GROUP directive is declarative only, not imperative: it asserts that segments fit in

64K, but does not alter segment ordering to make this happen. An example is:

DGroup GROUP dSeg, sSeg

An associated ASSUME directive that might be used with this group is:

ASSUME CS:code1, DS:DGroup, SS:DGroup

You can not use forward references to GROUPS.

A single segment register can be used to address all the segments in a group. This should be done carefully, however, because offsets in instructions and data are relative to the base of the group and not a particular segment.

Procedures

PROC/ENDP Directives

Procedures can be implemented using the PROC and ENDP directives. Although procedures can be executed by in-line "fall- through" of control, or jumped to, the standard and most useful method of invocation is the CALL.

Here is the format of the PROC/ENDP directives:

22 Assembly Language Manual

name PROC [NEAR | FAR]

.

.

.

RET

.

.

. name ENDP name is specified as type NEAR or FAR, and defaults to NEAR.

If the procedure is to be called by instructions assembled under the same ASSUME CS value, then the procedure should be NEAR. A

RET (return) instruction in a NEAR procedure pops a single word of offset from the stack, returning to a location in the same segment.

If the procedure is to be called by instructions assembled under another ASSUME CS value, then the procedure should be FAR. A RET in a FAR procedure pops two words, new segment base as well as offset, and thus can return to a different segment.

Calling a Procedure

The CALL instruction assembles into one of two forms, depending on whether the destination procedure is NEAR or FAR.

When a NEAR procedure is called, the instruction pointer (IP, the address of the next sequential instruction) is pushed onto the stack, and control transfers to the first instruction in the procedure.

When a FAR procedure is called, first the content of the CS reg- ister is pushed onto the stack, then the IP is pushed onto the stack, and control transfers to the first instruction of the procedure.

Multiple entry points to a procedure are permitted. All entry points to a procedure should be declared as NEAR or FAR, depen- ding on whether the procedure is NEAR or FAR.

All returns from a procedure are assembled according to the procedure type (NEAR or FAR).

See Figure 2-1 for the procedure CALL/RET control flow.

Recursive Procedures and Procedure Nesting on the Stack

When procedures call other procedures, the rules are the same for declaration, calling, and returning.

Programs and Segments 23

24 Assembly Language Manual

A recursive procedure is one which calls itself, or one which calls another procedure which then calls the first and so forth. Here are two points to note about recursive procedures.

1. A recursive procedure must be reentrant. This means that it must put local variables on the stack and refer to them with

[BP] addressing modes

2. A recursive procedure must remove local variables from the stack before returning, by appropriate manipulation of SP.

The number of calls that can be nested (the "nesting limit") is delimited by the size of the stack segment. Two words on the stack are taken up by FAR calls, and one word by NEAR calls. Of course, parameters passed on the stack and any local variables stored on the stack take additional space.

Returning from a Procedure

The RET instruction returns from a procedure. It reloads IP from the stack if the procedure is NEAR; it reloads both IP and SP from the stack if the procedure is FAR. IRET is used to return from an interrupt handler and to restore flags.

A procedure can contain more than one RET or IRET instruction, and the instruction does not necessarily come last in the procedure.

Location Counter ($) and ORG Directive

The assembly-time counterpart of the instruction pointer is the location counter. The value contained in the location counter is symbolically represented by the dollar sign ($). The value is the offset from the current segment at which the next instruction or data item will be assembled. This value is initialized to 0 for each segment. If a segment is ended by an ENDS directive, and then reopened by a SEGMENT directive, then the location coun- ter resumes the value it had at the ENDS.

The ORG directive is used to set the location counter to a nonnegative number. Here is the format:

ORG expression

The expression is evaluated modulo 65536 and must not contain any forward references. The expression can contain $ (the current value of the location counter), as in:

ORG OFFSET $+1000 which moves the location counter forward 1000 bytes.

An ORG directive may not have a label.

Programs and Segments 25

The use of the location counter and ORG are related to the use of the THIS directive, which is discussed in "Attribute Operators" in Section 4.

EVEN Directive

It is sometimes necessary to ensure that an item of code or data is aligned on a word boundary. For example, a disk sector buffer for use by the Operating System must be word aligned. The assembler implements the EVEN directive by inserting before the code or data, where necessary, a 1-byte NOP (no operation) instruction (90h). Here is an example:

EVEN

Buffer DW 256 DUP(0)

The EVEN directive can be used only in a segment whose alignment type, as specified in the SEGMENT directive, is WORD, PARA, or

PAGE. It cannot be used in a segment whose alignment type is

BYTE.

Program Linkage (NAME/END, PUBLIC, and EXTRN)

The Linker combines several different assembly modules into a single load module for execution. For more about the Linker, see the Utilities Manual.

Three program linkage directives can be used by the assembly module to identify symbolic references between modules. None of these three linkage directives can be labeled. They are: o NAME, which assigns a name to the object module generated by the assembly. For example:

NAME SortRoutines

If there is no explicit NAME directive, the module name is derived from the source file name. For example, the source file [Volname]<Dirname>Sort.Asm has the default module name

Sort.

o PUBLIC, which specifies those symbols defined within the assembly module whose attributes are made available to other modules at linkage. For example:

PUBLIC SortExtended, Merge

If a symbol is declared PUBLIC in a module, the module must contain a definition of the symbol.

o EXTRN, which specifies symbols that are defined as PUBLIC in other modules and referred to in the current module. Here is the format of the EXTRN directive:

26 Assembly Language Manual

EXTRN name.type [, ...]

In this format, name is the symbol defined PUBLIC elsewhere and type must be consistent with the declaration of name in its defining module. type is one of: o BYTE, WORD, DWORD, structure name, or record name (for variables), o NEAR or FAR (for labels or procedures), or o ABS (for pure numbers; the implicit SIZE is WORD).

If you know the name of the segment in which an external symbol is declared as PUBLIC, place the corresponding EXTRN directive inside a set of SEGMENT/ENDS directives that use this segment name. You may then access the external symbol in the same way as if the uses were in the same module as the definition.

If you do not know the name of the segment in which an external symbol is declared as PUBLIC, place the corresponding EXTRN directive at the top of the module outside all SEGMENT/ENDS pairs. To address an external symbol declared in this way, you must do two things:

1. Use the SEG operator to load the 16-bit segment part into a segment register. (See "Value-Returning Operators" in

Section 4 for a description of the SEG operator.) Here is an example:

MOV AX, SEG Var ;Load segment base

MOV ES, AX ;value into AX, and thence to ES.

2. Refer to the variable under control of a corresponding ASSUME

(such as ASSUME ES:SEG var) or using a segment override prefix.

END Directive

The end of the source program is identified by the END direc- tive. This terminates assembly and has the format:

END [expression]

The expression should be included only in your main program and must be NEAR or FAR and specifies the starting execution address of the program. Here is an example:

END Initialize

Programs and Segments 27

3 DATA DEFINITION

Introduction

The names of data items, segments, procedures, and so on, are called identifiers. An identifier is a combination of letters, digits, and the special characters question mark (?), at sign

(@), and underscore (_). An identifier may not begin with a digit.

Three basic kinds of data items are accepted by the assembler.

1. Constants are names associated with pure numbers--values with no attributes. Here is an example

Seven EQU 7 ;Seven represents the constant 7.

While a value is defined for Seven, no location or intended use is indicated. This constant can be assembled as a byte

(eight bits), a word (two bytes), or a doubleword (four bytes).

2. Variables are identifiers for data items, forming the operands of MOV, ADD, AND, MUL, and so on. Variables are defined as residing at a certain OFFSET within a specific

SEGMENT. They are declared to reserve a fixed memory-cell

TYPE, which is a byte, a word, a doubleword, or the number of bytes specified in a structure definition. Here is an example:

Prune DW 8 ;Declare Prune a WORD of initial value 0008H.

3. Labels are identifiers for executable code, forming the operands of CALL, JMP, and the conditional jumps. They are defined as residing at a certain OFFSET within a specific

SEGMENT. The label can be declared to have a DISTANCE attribute of NEAR if it is referred to only from within the segment in which it is defined. A label is usually intro- duced by writing:

label:instruction which yields a NEAR label. See also PROC (under "Procedures" in Section 2) and LABEL under "Labels and the LABEL

Directive" below, which can introduce NEAR or FAR labels.

Constants

There are five types of constants: binary, octal, decimal, hexadecimal, and string. Table 3-1 specifies their syntax.

Data Definition 29

Constant Type

Binary

(Base 2)

Octal

(Base 8)

Decima1

(Base 10)

Hexadecimal

(Base 16)

STRING

Table 3-1. Constants.

Rules For Formation

Sequence of 0's and

1’s plus letter B.

Sequence of digits

0 through 7 plus either letter 0 or letter Q.

Sequence of digits

0 through 9, plus optional letter D.

Examples

10B

11001011B

76540

7777Q

77777Q

9903

9903D

Sequence of digits

0 through 9 and/or letters A through

F plus letter h.

(If the first digit is a letter, it must be preceded by 0.)

77h

1Fh

0CEACh

0DFh

Any character string within single quotes.

(More than two characters only with DB.)

'A', 'B'

'ABC

'Rowrff'

'UP.URZ'

An instruction can contain 8- or 16-bit immediate values. Here is an example:

MOV CH, 53H ;Byte immediate value

MOV CX, 3257H ;Word immediate value

Constants can be values assigned to symbols with the EQU directive. These are examples:

Seven EQU 7 ;7 used wherever Seven referenced

MOV AH, Seven ;Same as MOV AH,7.

See Section 4 for the complete definition of EQU. The format is: symbol EQU expression

Here, expression can be any assembly language item or expres- sion. An example is: xyz EQU [BP+7]

30 Assembly Language Manual

Attributes of Data Items

The distinguishing characteristics of variables and labels are called attributes. These attributes influence the particular machine instructions generated by the assembler.

Attributes tell where the variable or label is defined. Because of the nature of the processor, it is necessary to know both in which SEGMENT a variable or label is defined, and the OFFSET within that segment of the variable or label.

Attributes also specify how the variable or label is used. The

TYPE attribute declares the size, in bytes, of a variable. The

DISTANCE attribute declares whether a label can be referred to under a different ASSUMEd CS than that of the definition.

Here is a summary of the attributes of data items.

O SEGMENT

SEGMENT is the segment base address defining the variable or label. To ensure that variable and labels are addressable at run-time, the assembler correlates ASSUME CS, DS, ES, and SS

(and segment prefix) information with variable and label references. The SEG operator (see "Value-Returning Operators" in Section 4) can be applied to a data item to compute the corresponding segment base address.

o OFFSET

OFFSET is the 16-bit byte displacement of a variable or labels from the number of bytes from the base of the contain- ing segment. Depending on the alignment and combine-type of the segment (see Section 2, on the SEGMENT directive), the run-time value here can be different from the assembly-time value. The OFFSET operator (see "Value-Returning Operators" in Section 4) can be used to compute this value.

o TYPE (for Data)

BYTE

WORD

1 byte

2 bytes

DWORD 4 bytes

RECORD 1 or 2 bytes (according to record definition)

STRUC n bytes (according to structure definition) o DISTANCE (for Code)

NEAR Reference only in same segment as definition; definition with LABEL, PROC, or id:.

FAR Reference in segment rather than definition; definition with LABEL or PROC.

Data Definition 31

Variable Definition (DB, DW, DD Directives)

To define variables and initialize memory or both, use the DB,

DW, and DD directives. Memory is allocated and initialized by

DD, DW, and DD in units of BYTES (8 bits), WORDS (2 bytes), and

DWORDS (doublewords, 4 bytes), respectively. The attributes of the variable defined by DB, DW, or DD are as follows: o The SEGMENT attribute is the segment containing the definition.

o The OFFSET attribute is the current offset within that segment.

o The TYPE is BYTE (1) for DB, WORD (2) for DW, and DWORD (4) for

DD.

The general form for DB, DW and DD is either:

[variable-name] (DB | DW | DD) exp [ , . . . ] or:

[variable-name] (DB | DW | DD) dup-count PUP (init [, ...])) where variable-name is an identifier and either DB, DW, or DD must be chosen.

The DB, DW, and DD directives can be used in many ways. The possibilities are:

1 constant initialization,

2. indeterminate initialization (the reserved symbol "?"),

3. address initialization (DW and DD only),

4. string initialization,

5. enumerated initialization, and

6. DUP initialization.

Constant Initialization

One, two or four bytes are allocated. The expression is evalu- ated to a 17-bit constant using twos complement arithmetic. For bytes, the least significant byte of the result is used. For words, the two least significant bytes are used with the least significant byte the lower-addressed byte, and the most significant byte the higher-addressed byte. (As an example, 0AAFFh is stored with the 0FFh byte first and the 0AAh byte second. For double words, the same two bytes are used as for words, and they are followed by an additional two bytes of zeros. Here are some examples:

32 Assembly Language Manual

number DW 1F3Eh

DB 100 inches_per_yard DW 3*12

Indeterminate Initialization

;3Eh at number, 1Fh at

;number + 1

;Unnamed byte

;Assembler performs arithmetic

To leave initialization of memory unspecified, use the reserved symbol "?".

Here are some examples: x DW ? ;Define and allocate a word,

;contents indeterminate buffer DB 1000 DUP(?) ;1000 bytes.

(The DUP clause is explained in "Dup Initialization" below.)

Address Initialization (DW and DD Only)

[variable-name] (DW | DD) init-addr

An address expression is computed with four bytes of precision-- two bytes of segment base and two bytes of offset. All four bytes are used with DD (with the offset at the lower addresses), but only the offset is used with DW. Address expressions can be combined to form more complex expressions as follows: o A relocatable expression plus or minus an absolute expression is a relocatable expression with the same segment attribute.

o A relocatable expression minus a relocatable expression is an absolute expression, but it is permitted only if both compo- nents have the same segment attribute.

o Absolute expressions can be combined freely with each other.

o All other combinations are forbidden.

Here are some examples of initializing using address expressions: pRequest DD Request pErc DD Request+5 oRequest DW Request

String Initialization

;32-bit offset and segment

;of Request

;Offset of sixth byte in

;Request

;16-bit offset of Request

Variables can be initialized with constant strings as well as with constant numeric expressions. With DD and DW, strings of one or two characters are permitted. The arrangement in memory is tailored to the 8086 architecture this way: DW 'XY' allocates two bytes of memory containing, in ascending addresses, 'Y',

Data Definition 33

'X'. DD 'XY' allocates four bytes of memory containing in ascending addresses, 'Y', 'X', 0, 0.

With DB, strings of up to 255 characters are permitted.

Characters, from left to right, are stored in ascending memory locations. For example, 'ABC' is stored as 41h, 42h, 43h.

Strings must be enclosed in single quotes ('). A single quote is included in a string as two consecutive single quotes. Here are some examples:

Single Quote DB

Date DB

Quote DB

Jabberwocky DB

Run Header DW

Enumerated Initialization

'I''m so happy!'

'08/08/80'

'"'

'''TWAS BRILLIG AND THE

SLITHY TOVES...'

'GW'

[variable-name] (DB | DW | DD) init [, ...]

Bytes, words, or doublewords are initialized in consecutive memory locations by this directive. An unlimited number of items can be specified. Here are some examples:

Squares DW 0,1,4,9,16,25,36

Digit_Codes DB 30h,316, 32h,33h,34h,35h ,36h,37h,38h,39h

Message DB 'HELLO, FRIEND.',0Ah

;14-byte text plus new line code

DUP Initialization

To repeat init (or list of init) a specified number of times, use the DUP operator, in this format: dup-count DUP (init)

The duplication count is expressed by dup-count (which must be a positive number). init can be a numeric expression, an address

(if used with DW or DD), a question mark, a list of items, or a nested DUP expression.

Note that in the DB, DW, and DD directives, the name of the vari- able being defined is not followed by a colon. (This differs from many other assembly languages.) For example:

Name DW 100 ;okay

Name: DW 100 ;WRONG

Labels and the LABEL Directive

Labels identify locations within executable code to be used as operands of jump and call instructions. A NEAR label is declared by any of the following:

34 Assembly Language Manual

Start LABEL

Start LABEL NEAR

Start:

Start EQU $

Start EQU THIS NEAR

Start PROC

Start PROC NEAR

;NEAR is the default

;NEAR can be explicit

;Followed by code

;NEAR is the default

;NEAR can be explicit

A FAR label is declared by any of the following:

Start2 EQU THIS FAR

Start2 LABEL FAR

Start PROC FAR

LABEL Directive

To create a name for data or instructions, use the LABEL directive, in the format: name LABEL type name is given segment, offset, and type attributes. The label is given a segment attribute specifying the current segment, an offset attribute specifying the offset within this segment, and a type as explicitly coded (NEAR, FAR, BYTE, WORD, DWORD, structure-name or record-name).

When the LABEL directive is followed by executable code, type is usually NEAR or FAR. The label is used for jumps or calls, but not MOVs or other instructions that manipulate data. NEAR and

FAR labels cannot be indexed.

When the LABEL directive is followed by data, type is one of the other five classifications. An identifier declared using the

LABEL directive can be indexed if assigned a data type, such as,

BYTE, WORD, etc. The name is then valid in MOVs, ADDs, and so on, but not in direct jumps or calls. (See Section 4 for indi- rect jumps or calls.)

A LABEL directive using structure-name or record-name names data and is assigned a type attribute according to the record or structure definition.

The main uses of the LABEL directive, illustrated below, are: accessing variables by an "alternate type," defining FAR labels, and accessing code by an "alternate distance" (for example, defining a FAR label with the same segment and offset values as an existing NEAR label).

LABEL with Variables

The assembler uses the type of a variable in determining the instruction assembled for manipulating it. You can cause an instruction normally generated for a different type to be assem-

Data Definition 35

bled by using LABEL to associate an alternative name and type with a location. For example, the same area of memory can be treated sometimes as a byte array and sometimes as a word array with the definitions: rgw LABEL WORD rgb DB 200 DUP(0)

The data for this array can be referred to in two ways:

ADD AL, rgb[50]

ADD AX, rgw[38]

;Add fiftieth byte to AL

;Add twentieth word to AX

LABEL with Code

A label definition can be used to define a name of type NEAR and

FAR. This is only permitted when a CS assumption is in effect; the CS assumption (not the segment being assembled) is used to determine the SEG and OFFSET for the defined name.

For example,

Place LABEL FAR

SamePlace MUL CX,[BP] introduces Place as a FAR label otherwise equivalent to the NEAR label SamePlace.

Label Addressability

The addressability of a label is determined by:

1. its declaration as NEAR or FAR, and

2. its use under the same or different ASSUME:CS directive as its declaration.

The four possibilities of code for each are shown in Table 3-2.

Table 3-2. Target Label Addressability.

Near Label Far Label

NEAR Jump/Call Same

ASSUME CS:

Different

ASSUME CS: Not allowed

NEAR Jump

FAR Call

FAR Jump

FAR Call

A NEAR jump or call is assembled with a 1- or 2-byte displacement using modulo 64K arithmetic. 64K bytes of the current segment can be addressed as NEAR.

36 Assembly Language Manual

A FAR jump or call is assembled with a 4-byte address. The address consists of a 16-bit offset and 16-bit segment base address. An entire megabyte of memory can be addressed as FAR.

(The semantics of PROC/ENDP directives are discussed in Section

2.)

Records

A record is a format used to define bit-aligned subfields of bytes and words. The two steps in using records are:

1. define and name a record format, and

2. invoke the record name as an operator, thereby allocating and initializing memory.

Define a record by writing: record-name RECORD field-name:width [=default][, ....]

Neither record-name nor any of the field names can conflict with existing names. The sum of the widths of the fields can not exceed 16 bits. Each width can be an expression, but must not make forward references.

The assembler divides records into two classes, those with a total width of up to 8 bits, and those with a total width of up to 16 bits. A byte is allocated for each instance of a record of the first class, and a word for each instance of a record of the second class. The data of each record instance is right-justi- fied within the allocated memory.

The definition of a record can include a specification of how instances are to be initialized. This specification is given with the optional [=default] clause. For example, this definition:

HashEntry RECORD state:2=3, sKey:4, rbKey:9 might be used in setting up a hash table. Each entry has a 2-bit state field, a 4-bit "size of key" sKey, and a 9-bit "relative byte of key in page" rbKey. The state field, being two bits wide, can hold four values. The state field is explicitly speci- fied to default to 3. The other fields are assigned the implicit default value 0, since no explicit default is specified. A field eight bits wide can have a single character as its default value, as in bData:8='a'.

When a record is declared, the assembler associates with its field names these special values: o the width of the field,

Data Definition 37

o the bit position of the right end of the field, and o a mask constant for extracting the field from an instance of the record.

The width is computed with the WIDTH operator, the mask with the

MASK operator, and the bit position with the field name itself.

Thus, with HashEntry as above, the following holds.

state = 0Dh sKey = 9h rbKey = 0h

MASK state = E00h MASK sKey = 1E00h MASK rbKey = 1FFh

WIDTh state = 3h WIDTh skey = 4h WIDTh rbKey = 9h

As another example, let us define the format for the first two bytes of an instruction.

Inst2b RECORD Opcode 6, D:1, W:1, Mod:2, Reg : 3, Rm:3

The definition might be used in this way:

Inst_Table Inst2b 100 DUP(<,,,,,>) ;Code to initialize

;Inst_Table

MOV AX, Inst_Table[BX] ;Load the entry at

AND AX, MASK Mod

MOV CL, Mod

SHR AX, CL

;offset BX

;Mask off all but Mod

;Now AX contains Mod

This example also shows how, for each record field, the bit position and MASK operator can be used to extract the field from a record.

The assembler right-justifies a record's user-defined fields when those fields do not occupy an entire word or byte. The fields are moved to the least-significant bit-positions of the byte or word defined by the record. For example, the definition:

Ascii_Twice RECORD C1:7,C2:7 would result in the format:

15 14 13 7 6 0

| (undefined) | (C1) | (C2) |

2 bits 7 bits 7 bits

Initializing Records

After records have been declared, the record name and operator can be used for allocation and initialization. There are two formats:

Format 1:

[name] record-name <[init][, ...]>

38 Assembly Language Manual

Format 2:

[name] record-name dup-count DUP (<[init] [, ...]>)

In both formats, the first byte or word (depending on the RECORD definition) of the allocated memory is optionally named. The record definition to be used is specified by record-name.

Finally, the operand is a possibly empty list of initial field values. For example;

<> Use field default values from the record definition.

<8,,10> Set initial values of the first and third fields to 8 and 10, respectively, but use the default from the definition for the middle field.

The initial field values can be constants, constant expressions, or the indeterminate initialization "?". If the expression evaluates to a number not expressible in binary within the width of the corresponding record field, then the number is truncated on the left. For example, 11001 binary, in a 2-bit field, is trun- cated to 01.

With Format 2, multiple instances of the record can be allocated at once. The number of copies of the record to be allocated is given by dup-count. Note that in this format, the angle-brackets must be enclosed within parentheses as shown.

You can use a record as part or all of an expression, as in:

MOV AX, Inst2B<OP,D,W,MOD,REG,RM>

Structures

Just as records are used to format bit-aligned data at the byte or word level, structures are used to define byte-aligned fields within multibyte data structures.

Structures can be used to group together logically related data items.

For example, suppose you give the name Car to a structure. You use this structure to define individual fields of size (in bytes)

1, 2, 2, and 4 symbolically. The assembler generates the rela- tive offsets:

Car STRUC

Year DB 0

Model DW 0

Color DW 0

License DB 'XXXX'

Car ENDS

;No memory reserved--use this

;as template for Ford below

;Reference to .Year generates

;relative offset of 0

;Reference to .Model generates

;relative offset of 1

;Reference to .Color generates

;relative offset of 3

;Reference to .License generates

;relative offset of 5

Data Definition 39

The body of the structure definition is delimited by the STRUC and ENDS directives. The spacing of offsets within the structure is determined by the enclosed DB, DW, and DD directives.

You now allocate real memory and initialize using Car as an operator.

Ford Car<63,'FL','GR','FOXY'> ;allocate and initialize

Note that the programmer-assigned name Car is used here as an operator, and that the initialization of the structure is done with both integer data (63) and character data ('FL').

This use of Car as an operator is the assembly-time analog of this run-time initialization:

FORD DB 8 DUP(?)

MOV Ford.Year,63

MOV Ford.Model,'FL'

MOV Ford.Color,'GR'

MOV Ford.License,'FOXY'

;allocate 8 bytes

;(uninitialized)

;initialize Year field

;initialize Model field

;initialize Color field

;initialize License field

It is also possible, as described below, to specify default values during the definition of the structure, and to selectively override these defaults during memory allocation. All this can take place during assembly.

As another example, here is a structure that implements the request block for the Close File operator used with the CTOS

Operating System:

RqCloseFile STRUC

sCntInfo DW 2

nReqPbCb DB 0

nRespPbCb DB 0

userNum DW ?

exchResp DW ?

ercRet DW ?

rqCode DW 10

fh DW ?

RqCloseFile ENDS rqCloseFile1 RqCloseFile<,,,1,3,,,>

MOV AX, fhNew

MOV rqCloseFile1.fh

CMP rqCloseFile1.ercRet, ercOk

;Nondefault values

;are userNum 1,

;exchResp 3

;Fill in the fh

;field if an rq

;Is the error return

;equal to the value

;ercOK?

40 Assembly Language Manual

Structures are not restricted to use with statically allocated data. For example

CMP [BP+rbRqCloseFile].rqCode,10 ;Examine rqCode in an

;anonymous instance of

;RqCloseFile that's on the

;stack

Here is the general format of the STRUC/ENDS statement-pair, together with the enclosed DB, DW, and DD directives: structure-name STRUC

.

.

.

[field-name] (DB | DW | DD) ( default [, ...]

.

.

.

structure-name ENDS

In this case, DB, DW, and DD are used just as defined earlier, with the exception that there cannot be any forward references.

Matching STRUC/ENDS pairs must have the matching structure- names. Field-names are optional: if used, they must be unique identifiers.

Default Structure Fields

Default values for structure fields are as specified in the DB,

DW, or DD directives. Because the STRUC/ENDS pair does not allo- cate memory, these default initializations have no immediate effect. The defaults are used to initialize memory later when the structure-name is used as a memory allocation operator as in the allocation of rqCloseFile1, above.

Overridable Structure Fields

When memory is allocated certain structure-field default values can be overridden by initial values specified in the allocation expression; these are called simple fields. Other field values that include a list or a DUP clause cannot be overridden. A DB character string is considered simple. Here are some examples of what can and cannot be overridden:

Super STRUC

DW ? ;Simple field: override okay

DB 'Message' ;Simple character string field: override

;okay

DD 5 DUP(?) ;Multiple field: no override

DB ?,2,3

Super ENDS

;Multiple field: no override

Data Definition 41

Initializing Structures

After structures have been declared, they can be allocated and initialized with the structure-name as operator. The general format is similar to that for record initialization. (There are two formats.)

Format 1:

[name] structure-name <[init][, ...]>

Format 2 (with duplication):

[name] structure-name dup-count PUP (<[init] [, ...]>)

In both formats, the first byte or word (depending on the structure definition) of the allocated memory is optionally named. The structure definition to be used is specified by structure-name.

Finally, the operand is a possibly empty list of initial field values. For example:

<> Use field default values from the structure definition.

<8,,10> Set initial values of the first and third fields to 8 and 10, respectively, but use the default from the definition for the middle field.

The initial field values can be constants, constant expressions, or the indeterminate initialization "?".

One-byte strings can override any field. Two-byte strings can override any DW or DD field. Multibyte strings can override a DB field, but only if the overriding string is no longer than the overridden string.

The number of copies of the structure to be allocated is dup-count; it must evaluate to a positive integer.

42 Assembly Language Manual

4 OPERANDS AND EXPRESSIONS

Operands

The instruction set of the 8086 makes it possible to refer to operands in a variety of ways. (The instruction set is described in the Central Processing Unit.) Either memory or a register can serve as the first operand (destination) in most two-operand instructions, while the second operand (source) can be memory a register, or a constant within the instruction. There are no memory-to-memory operations.

A 16-bit offset address can be used to directly address operands in memory. Base registers (BX or BP) or index registers (SI or DI) or both, plus an optional 8- or 16-bit displacement constant, can be used to indirectly address operands in memory.

Either memory or a register can receive the result of a two-operand operation. Any register or memory operand (but not a constant operand) can be used in single-operand operations. Either 8- or

16-bit operands can be specified for almost all operations.

Immediate Operands

An immediate value expression can be the source operand of twooperand instructions, except, for multiply, divide, and the string operations. Here are the formats:

[label:] mnemonic memory-reference, expression and

[label:] mnemonic register expression

Here [label] is an optional identifier. mnemonic is any two- operand mnemonic (for example, MOV, ADD, and XOR). See "Memory

Operands" below for the definition of memory-reference. In summary, it has a direct 16-bit offset address, and is indirect through BX or BP, SI or DI, or through BX or BP plus SI or DI, all with an optional 8- or 16-bit displacement. In the second format, register is any general-purpose (not segment) register.

For a definition of expression, see the rest of this section.

See Table 3-1 (Section 3) for rules on formation of constants.

The steps that the assembler follows in processing an instruction containing an immediate operand are; o Determine if the destination is of type BYTE or WORD.

o Evaluate the expression with 17-bit arithmetic.

o If the destination operand can accommodate the result, encode the value of the expression, using twos complement arithmetic, as an 8- or 16-bit field (depending on the type, BYTE

Operands and Expressions 43

or WORD, of the destination operand) in the instruction being assembled.

In 8086 instruction formats, as in data words, the least signifi- cant byte of a word is at the lower memory address.

MOV CH, 5

ADD DX.3000H

AND Table[BX], 0FF00h

;8-bit immediate value to register

;16-bit immediate value to register

;16-bit immediate value (where

;Table is a WORD) through BX,

;16-bit displacement

XOR Table[BX+DI+100], 7 ;16-bit immediate through

;BX+DI+(Table+100)

Register Operands

The 16-bit segment registers are CS, DS, SS, and ES. The 16-bit general registers are AX, BX, CX, DX, SP, BP, SI, and DI. The 8- bit general registers are AH, AL, BH, BL, CH, CL, DH, and DL.

The 16-bit pointer and index registers are BX, BP, SI, and DI.

The 1-bit flag registers are AF, CF, DF, IF, OF, PF, SF, TF, and

ZF.

Segment base addresses are contained in segment registers and must be initialized by the programmer.

Arithmetic and logical operations can be performed using each of the general 8-bit, general 16-bit, and pointer and index 16-bit registers. So, even though AX is often called "the accumulator," there are actually eight separate 16-bit accumulators and eight

8-bit accumulators as listed above. Each of the 8-bit accumulators is either the high-order (H) or the low-order (L) byte of

AX, BX, CX, or DX.

After each instruction, the flags are updated to reflect conditions detected in the processor or any accumulator. See Appendix A and the Central Processing Unit for the flags affected for each instruction.

These are the flag-register mnemonics:

AF: Auxiliary Carry

CF: Carry

DF: Direction

IF: Interrupt-enable

OF: Overflow

PF: Parity

SF: Sign

TF: Trap

ZF: Zero

Explicit Register Operands

These are two-operand instructions that explicitly specify registers:

44 Assembly Language Manual

o Register to register

[label:] mnemonic reg, reg

Example.

ADD BX, DI ;BX=BX+DI o Immediate to register

[label:] mnemonic reg imm

Example:

ADD BX, 30H ;BX=BX+30H o Memory to register

[label:] mnemonic reg mem

Example:

ADD BX, Table[DI] ;BX=BX+DI'th entry in Table o Register to memory

[label:] mnemonic mem, reg

Example:

ADD Table[D1], BX ;Increment DI'th entry in Table by BX

(Note that "i'th entry" means "entry at i'th byte.")

Implicit Register Operands

These instructions use registers implicitly:

Instruction

AAA, AAD, AAM, AAS

CBW, CWD

DAA, DAS

IN, OUT

MUL, IMUL, DIV, IDIV

LAHF, SAHF

LES

LDS

Shifts, Rotates

String

XLAT

Implicit Uses

AL, AH

AL, AX or AX:DX

AL

AL or AX

AL, AX or AX:DX

AH

ES

DS

CL

CX, SI, DI

AL, BX

Operands and Expressions 45

The instructions with a single register operand have the form:

[label:] mnemonic reg

Example:

INC DI ;DI=DI+1

Segment Registers

Segment registers are discussed in Section 2.

General Registers

When a 16-bit general register or pointer/index register is one of the operands of a two-operand instruction, the other operand must be immediate, a WORD reference to memory, or a WORD register.

When an 8-bit general register (AH, AL, BH, BL, CH, CL, DH, DL) is one of the operands of a two-operand instruction, the other operand must be an 8-bit immediate quantity, a BYTE reference to memory, or a BYTE register.

Flags

Instructions never specify the 1-bit flags as operands; flag instructions (as STC, CLC, CMC) manipulate all flags at once, and other instructions affect one or more flags implicitly (as INC,

DEC, ADD, MUL, and DIV).

See Section 7 for flag operation and Appendix A for how each instruction affects the flags.

Memory Operands

Memory Operands to JMP and CALL

The JMP and CALL instructions take a simple operand. There are a number of different cases, determined by the operand. The control transfer can be' direct (with the operand specifying the target address) or indirect (with the operand specifying a word or doubleword containing the target address) . The transfer can be NEAR (in which case only IP changes) or PAR (both IP and CS change). Here are examples to illustrate the cases:

46 Assembly Language Manual

Operand to JMP/CALL Direct/Indirect NEAR/FAR Target

NextIteration

FltMul

DX

LabelsNear[DI]

LabelsFar[DI]

DWORD PTR [BX]

WORD PTR [BX]

Direct

Direct

Indirect

Indirect

Indirect

Indirect

Indirect

NEAR

1

FAR

2

NEAR

NEAR

3

FAR

FAR

FAR

4

NEAR

NextIteration

FltMul

CS:DX

Contained in word at

LabelsNear[DI]

Contained in dword at

LabelsFar[DI]

Contained in dword at [BX]

Contained in word at [BX]

1

Assuming NextIteration is a NEAR label in the same segment or group as the jump or call.

2

Assuming FltMul is a FAR label--a label to which control can be transferred from outside the segment containing the label.

3

Assuming LabelsNear is an array of words.

4

Assuming LabelsFar is an array of dwords .

CALL differs from JMP only in that a return address is pushed onto the stack. The return address is a word for a near call and a dword for a far call.

If the assembler determines that the target of a JMP or CALL is addressable by a 1-byte displacement from the instruction, it uses a special short jump or call instruction. Here are some examples:

Again: DEC BX

JNZ Again

JMP Last

Last: ...

;Short jump will be used.

;Not short because Last is a forward

;reference.

JMP $+17 ;Short jump since displacement is in the

;range -128 to 127. BEWARE: Variable

;length instructions make it easy to get

;this wrong; it’s safer to use a label.

JMP SHORT Last ;Forces assembly of a short transfer; it

;will yield an error if the target is

;not addressable with a 1-byte

;displacement.

Operands and Expressions 47

(NOTE: Do not confuse the concepts of PUBLIC and EXTRN with NEAR and FAR. PUBLICS and EXTRNs are used at assembly- and link-time only and are not run-time concepts. NEAR and FAR, in contrast, control the instructions to be executed at run-time. It is entirely possible for an EXTRN to be NEAR.)

Variables

This section covers the use of simple, indexed, and structured variables as operands. If you are unfamiliar with how to define and initialize variables, review Section 3.

Simple Variables. An unmodified identifier used the same way it is declared is a simple variable. Here is an example: wData DW 'AB'

.

.

.

MOV BX, wData

Indexed Variables. A simple variable followed by a square- bracketed expression is an indexed variable. The expression in square brackets is a constant or constant expression, a base register (as BX or BP) or an index register (as SI or DI), a base or index register plus or minus a constant expression (in any order), or a base register plus an index register plus or minus a constant or constant expression (in any order) .

When you use indexed variables, be aware that the indexing is 0- origin (that is, the first byte is numbered 0), the index is always a number of bytes, and the type is the type of the simple variable to which the index is applied. For example, if the table Primes is defined by:

Primes DW 250 DUP(?) and register BX contains the value 12, then the instruction.

MOV Primes[BX], 17 sets the twelfth and thirteenth bytes of Primes (which are the bytes of the seventh word in Primes) to 17.

Double-Indexed Variables. Double-indexed variables use a sum of two displacements to address memory. Here is an example:

Primes[BX][SI+5]

Most forms of double indexing can be written with a more complex single index expression. For example, these two forms are completely equivalent:

Var[Disp1][Disp2]

and

48 Assembly Language Manual

Var[Disp1+Disp2]

The displacements can be constants or expressions that evaluate to constants, base or index registers (BX, BP, SI or DI) or base or index registers plus or minus a constant offset. The only restriction is that BX and BP can not both appear, and SI and DI cannot both appear in the same double-indexed variable.

These three expressions are all invalid.

Primes[BX+BP]

Primes[SI][2*BX]

Primes[BX][BP]

Indexing can be used in combination with structures. Recall the example given earlier

RqCloseFile STRUC

sCntInfo DW 2

nReqPbCb DB 0

nRespPbCb DB 0

userNum DW ?

exchResp DW ?

ercRet DW ?

rqCode DW 10

fh DW 7

RqCloseFile ENDS

All of the following are valid:

MOV RqCloseFile.sCntInfo, AX

MOV [BX].userNum, AX

MOV [BP][SI-4].fh

Attribute Operators

In addition to indexing, structure, arithmetic, and logical operators, operands can contain a class of operators called attribute operators. Attribute operators are used to override an operand's attributes, to compute the values of operand attributes, and to extract record fields.

PTR, the Type Overriding Operator

PTR is an infix operator. That is, it has two operands, and is written between them in this format: type PTR addr-expr type is BYTE, WORD, DWORD, NEAR, FAR, or structure-name. addr-expr is a variable, label, or number.

PTR sets or overrides the type of its operand without affecting the other attributes of the operand, such as SEGMENT and

Operands and Expressions 49

OFFSET. Here are some examples of its use with data. Suppose rgb and rgw are declared by: rgb DB 100 DUP(?) rgw DW 100 DUP(?)

Then:

INC rgb[SI]

INC rgw[SI] generate, respectively, byte-increment and word-increment instructions. Types can be overridden with:

INC WORD PTR rgb[SI] ;word increment

INC BYTE PTR rgw[SI] ;byte increment

Sometimes no variable is named in an instruction: the instruction uses an "anonymous" variable. In such cases the PTR operator must always be used. Thus:

INC WORD PTR [BX] ;word increment

INC BYTE PTR [BX] ;byte increment

INC [BX] ;INVALID because the operand [BX] is

;"anonymous."

Segment Override

The segment override operator is discussed in Section 2. It is denoted by the colon, ":", and takes these three forms: o seg-reg:addr-expr o segment-name addr-expr o group-name:addr-expr

The SEGMENT attribute of a label, variable, or address-expression is overridden by the segment override operator. The other attributes are unaffected. The first two forms do a direct override; the third recalculates the offset from the GROUP base.

SHORT

The single argument of the SHORT operator is an offset that can be addressed through the CS segment register. When the target code is within a 1-byte signed (twos complement) self-relative displacement, SHORT can be used in conditional jumps, jumps, and calls. This means that the target must lie within a range no more than 128 behind the beginning of the jump or call instruc- tion, and no more than 127 bytes in front of it. (See "Memory

Operands to JMP and CALL Operands" in this Section for more on

SHORT.)

50 Assembly Language Manual

THIS

The single argument of the THIS operator is a type (BYTE, WORD,

DWORD) or distance (NEAR, FAR) attribute. A data item with the specified type or attribute is defined at the current assembly location. Here are the formats:

THIS type

THIS distance

The segment and offset attributes of the defined data item are, respectively, the current segment and the current offset. The type or distance attributes are as specified. Thus the two statements: byteA LABEL BYTE byteA EQU THIS BYTE have the same effect. Similarly, $ is equivalent to:

THIS NEAR

In the example:

E1 EQU THIS FAR

E2: REPNZ SCASW the two addresses, E1 and E2, differ exactly in that E1 is FAR whereas E2 is NEAR.

Value-Returning Operators

Here are the value-returning operators: o TYPE. It accepts one argument, either a variable or a label. TYPE returns, for variables, 1 for type BYTE, 2 for type WORD, 4 for type DWORD, and the number of bytes for a variable declared with a structure type. TYPE returns, for labels, either -1 or -2 (representing, respectively, NEAR or

FAR) .

o LENGTH. It accepts one argument, a variable. It returns the number of units allocated for that variable. (The number returned is not necessarily bytes.) Here are examples:

One DB 250(?) ;LENGTH One=250

Two DW 350(?) ;LENGTH Two=350 o SIZE. It returns the total number of bytes allocated for a variable. SIZE is the product of LENGTH and TYPE.

o SEG. It computes the segment value of a variable or a label. Use it in ASSUME directives or to initialize segment registers, as described in Section 2.

Operands and Expressions 51

o OFFSET. It returns the offset of a variable or label. At time of linking, when the final alignment of the segment is frozen the value is resolved. If a segment is combined with pieces of the same segment defined in other assembly modules, or is not aligned on a paragraph boundary, the assembly-time offsets shown in the assembly listing can not be valid at run-time The offsets are properly calculated by the Linker if you use the OFFSET operator.

The only attribute of a variable in many assembly languages is its offset. A reference to the variable's name is a reference also to its offset. Three attributes are defined by this assembly language for a variable, so to isolate the offset value, the OFFSET operator is needed. In a DW direc- tive, however, the OFFSET operator is implicit.

The variables in address expressions that appear in DW and DD directives have an implicit OFFSET.

When used with the GROUP directive, the OFFSET operator does not yield the offset of a variable within the group. It returns rather the offset of the variable within its segment. Use the GROUP override operator to get the offset of the variable within the group. Here is an example:

DGroup GROUP Data,??SEG data SEGMENT

.

.

.

xyz DB 0

.

.

.

DW xyz

DW DGroup:xyz data ENDS

;Offset within segment

;Offset within group

ASSUME CS:??SEG,DS:DGroup

MOV CX,OFFSET xyz ;Loads seg offset of xyz

MOV CX,OFFSET Dgroup:xyz ;Loads group offset of

LEA CX, xyz

.

.

.

;xyz

;Also loads group offset

;of xyz

You may not use forward references to group-names.

52 Assembly Language Manual

Record Operators

The use of operators with records is illustrated in Section 3.

The definitions are repeated here for completeness. Associated with each field of a record are the following: o Shift-count. This is the field-name of the record.

o MASK operator. This operator has one argument, which is a field-name. It returns a bit-mask that consists of 1's in the bit positions included by the field and 0's elsewhere.

o WIDTH operator. This operator returns the number of bits in a record or field.

If the definition of a record formats 8 bits, the record is of type BYTE, and if it formats 16 bits, of type WORD.

Operator Precedence in Expressions

The assembler evaluates expressions from left to right. It evaluates operators with higher precedence before other operators that come directly before or after. To override the normal order of precedence, use parentheses.

In order of decreasing precedence, here are the classes of operators:

1. Expressions within parentheses, expressions within angle brackets (records), expressions within square brackets, the structure "dot" operator, ".", and the LENGTH, SIZE, WIDTH, and MASK operators.

2. PTR, OFFSET, SEG, TYPE, THIS, and "name:" (segment override).

3. Multiplication and division: *, /, MOD, SHL, SHR.

4. Addition and subtraction: +, -.

5. Relational operators: EQ, NE, LT, LE, GT, GE.

6. Logical NOT.

7. Logical AND.

8. Logical OR and XOR.

9. SHORT.

Operands and Expressions 53

EQU Directive

Use EQU to assign an assembly-time value to a symbol. This is the format: name EQU expression

Here are examples to illustrate the cases: y EQU z xx EQU [BX+DI-3]

;y is made a synonym for z.

;xx is a synonym for an indexed reference

;--note that the right side is evaluated

;at use, not at definition.

x EQU EX:Bar[BP+2] ;Segment overrides are also allowed.

xy EQU (TYPE y)*5 ;Random expressions are allowed.

RAX EQU AX ;Synonyms for registers are allowed.

PURGE Directive

Use the PURGE directive to delete the definition of a specified symbol. After a PURGE, the symbol can be redefined. The symbol's new definition is used by all occurrences of the symbol after the redefinition. You cannot purge register names, reserved words, or a symbol appearing in a PUBLIC directive.

54 Assembly Language Manual

5 FORWARD REFERENCES

The instruction set of the 8086 often provides several ways of achieving the same end. For example, if a jump is within 128 bytes of its target, the control transfer can be a SHORT jump

(two bytes), a NEAR jump (three bytes), or a FAR jump (four bytes). If the assembler "knows" which case applies, it generates the optimal object code.

However, for the convenience of the programmer, the assembly language allows, in many cases, the use of a variable or label prior to its definition. When the assembler encounters such a forward reference, it must reserve space for the reference, although it does not yet know whether the label (for example) will turn out to be SHORT, NEAR, or FAR. The assembler makes a

"guess," if it must, about the memory required, and proceeds on the basis of that guess.

The assembler makes two successive passes over the source program, and can always tell during the second pass whether a guess made during the first pass was correct. If a guess is too generous, the assembler can repair matters during the second pass by, for example, inserting an extra no-op instruction after an offending jump, and still produce valid output. If a guess is too conservative, however, no such remedy is available, and the assembler flags the forward reference as an error during the second pass.

The programmer can generally repair this kind of error by a small change to the source text and a reassembly. For example, the insertion of an attribute coercion such as "BYTE PTR" or "FAR

PTR" is often a sufficient correction. However, the safest course is to follow programming practices that make it unnecessary for the assembler to guess. This can be done as follows: o Put EQU directives early in programs.

o Put EXTRN directives early in programs.

o Within a multisegment source file, try to position the data segments (and hence the variable definitions) before the code segments.

Forward References 55

6 INSTRUCTION FORMAT

The instruction format of the 8086 uses up to three fields to specify the location of an operand in a register or in memory.

The assembler sets all three fields automatically when it generates code. These fields, when used, make up the second byte of an instruction, which is called the "MOD --- R/M" byte.

The two most significant bits of the "MOD --- R/M" byte are the

MOD field, which specifies how to interpret the R/M field.

The next three bits are occupied by the REG field, which specifies an 8- or 16-bit register as an operand. Instead of specifying a register, the REG field can, in some instructions, refine the instruction code given in the first byte of an instruction.

The next three bits are occupied by the R/M field, which can specify either a particular register operand or the addressing

MODe to select a memory operand. This occurs in combination with the MOD field.

The MOD and R/M fields determine the effective address (EA) of the memory operand and the interpretation of successive bytes of the instruction, as follows:

MOD Interpretation

00

01

DISP = 0

(disp-low and disp-high are absent)

DISP = disp-low sign-extended to 16 bits (disp-high is absent)

10

11

DISP = disp-high, disp-low

There is no DISP (disp-low and disp-high are both absent) and R/M is interpreted as a register.

If MOD ≠ 11, then R/M is interpreted as follows:

R/M

000

001

010

011

100

101

110

111 interpretation

[BX]+[SI]+DISP

[BX]+[DI]+DISP

[BP]+[SI]+DISP

[BP]+[DI]+DISP

[SI]+DISP

[DI]+DISP

[BP]+DISP if MOD ≠ 0

DISP if MOD = 0

[BX]+DISP

Instruction Format 57

If MOD = 11, then the effective address is a register designated by R/M. In word instructions, the interpretation is:

R/M Register

000

001

010

01l

100

101

110

111

SP

BP

SI

DI

AX

CX

DX

BX

In byte instructions (W = 0), the interpretation is:

R/M Register

000

001

010

011

100

101

110

111

AH

CH

DH

BH

AL

CL

DL

BL

58 Assembly Language Manual

7 FLAGS

Flag Registers

Certain results of data manipulations are distinguished or denoted by flags. The flags that are affected by data manipulations are AF, CF, OF, PF, SF, and ZF.

The four basic mathematical operations (addition, subtraction, multiplication and division) are provided by the processor. 8- and 16-bit operations are available, as are signed and unsigned arithmetic. The representation of signed values is by standard twos complement arithmetic. The addition and subtraction operations serve as both signed and unsigned operations; the two possibilities are distinguished by the flag settings.

Arithmetic may be performed directly on unpacked decimal digits or on packed decimal representations.

Some operations indicate these results only by setting flags.

For example, the processor implements "compare" as a special subtract which does not change either operand but does set flags to indicate a zero, positive, or negative result.

By using one of the conditional jump instructions, a program can test the setting of five of the flags (carry, sign, zero, overflow, and parity) . The flow of program execution can be altered based on the outcome of a previous operation. One more flag, the auxiliary carry flag, is used by the ASCII and decimaladjust instructions.

It is important to understand which instructions set which flags. Suppose you wish to load a value into AX, and then test whether the value is 0. The MOV instruction does not set ZF, so the following does not work:

MOV AX, wData

JZ Zero

Instead, since ADD does set ZF, the following does work:

MOV AX, wData

ADD AX, 0

JZ Zero

A flag can be set, but not tested, over the duration of several instructions. In such cases, the intervening instructions must be carefully checked to ascertain that they do not affect the flag in question. This is generally a dangerous programming practice.

(See Appendix A for the flags set by each instruction.)

Flags 59

Flag Usage

Most arithmetic operations set or clear six flag registers.

"Set" means set to 1, and "clear" means clear to 0.

Auxiliary Carry Flag (AF)

If an operation results in a carry out of or a borrow into the low-order four bits of the result, AF is set; otherwise it is cleared. A program cannot test this flag directly: it is used solely by the decimal adjust instructions.

Carry Flag (CF)

If an operation results in a carry out of (from addition) or a borrow into (from subtraction), the high-order bit of the result,

CF is set; otherwise it is cleared.

This flag usually indicates whether an addition causes a "carry" into the next higher order digit or a subtraction causes a

"borrow." CF is not, however, affected by increment (INC) and decrement (DEC) instructions. CF is set by an addition that causes a carry out of the high-order bit of the destination, and cleared by an addition that does not cause a carry. CF is also affected by the logical AND, OR, and XOR instructions.

The contents of an operand are moved one or more positions to the left or right by the rotate and shift instructions. The carry flag is treated as if it were an extra bit of the operand. Only

RCL and RCR preserve the original value in CF. The value does not, in these cases, remain in CF. The value is replaced with the next bit rotated out of the source. If an RCL is used, the value in CF is replaced by the high-order bit and goes into the low-order bit. If an RCR is used, the value in CF is replaced by the low-order bit and goes into the high-order bit. (This is useful in multiple-word arithmetic operations.) In other rotates and shifts, the value in CF is lost.

Overflow Flag (OF)

If a signed operation results in an overflow, OF is set; otherwise it is cleared. (That is, an operation results in a carry into the high-order bit of the result but not a carry out of the high-order bit, or vice versa.)

Parity Flag (PF)

If the modulo 2 sum of the low-order eight bits of an operation is 0 (even parity), PF is set; otherwise it is cleared (odd parity).

60 Assembly Language Manual

Following certain instructions, the number of one bits in the destination is counted and the parity flag set if the number is even and cleared if the number is odd.

Sign Flag (SF)

If the high-order bit of the result is set, SF is set; otherwise it is cleared.

Following an operation, the high-order bit of its target can be interpreted as a sign. The SF flag is set equal to this high- order bit by instructions that affect SF. Bit 7 is the high- order bit of a byte and bit 15 is the high-order bit of a word.

Zero Flag (ZF)

If the result of an operation is 0, ZF is set; otherwise it is cleared.

Following certain operations, if the destination is zero, the zero flag is set, and if the destination is not zero, the zero flag is cleared. Both ZF and CF are set by a result that has a carry and a zero. Here is an example:

00110101

+11001011

00000000 Carry Flag = 1

Zero Flag = 1

Flags 61

8 MACRO ASSEMBLER

Introduction

The assembler supports the definition and invocation of macros: expressions, possibly taking parameters, that are evaluated during assembly to produce text. The text that results is then processed by the assembler as source code, just as if it had been literally present in the input to the assembler. For example, consider the program fragment;

%*DEFINE (Call2(subr,arg1,arg2))(

PUSH %arg1

PUSH %arg2

CALL %subr

)

%Call2 (Input,p1,p2)

This fragment defines a macro, Call2, of three arguments, and then invokes it. The invocation is to the expanded form:

PUSH p1

PUSH p2

CALL Input

The character "%" is called the metacharacter and is used to activate all macro processing facilities: macro invocations are preceded by "%" and macro definitions by "%*". (The metacharacter can be changed; how to do this is described later in this Section.)

The simplest kind of macro definition takes the form:

%*DEFINE (MacroName ParameterList) (Body) where MacroName is an identifier, ParameterList is a list of parameter names enclosed in parentheses, and Body is the text of the macro.

When parameter names appear in the Body, they are preceded by the

"%" character. A simple macro invocation takes the form:

%MacroName (ArgList)

This expands to the corresponding macro Body with parameter names of the macro definition replaced by arguments from the macro invocation.

LOCAL Declaration

The purpose of macros is to permit the definition of a pattern-- the body of the macro--that is to be recreated at each invocation

Macro Assembler 63

of the macro. Thus two invocations of a macro normally expand to source text differing only insofar as the parameters of invocation differ. Consider however the definition:

%*DEFINE (CallNTimes(n,subr))(

MOV AX,%n

Again: DEC AX

JZ Done

PUSH AX

CALL %subr

POP AX

JMP Again

Done:)

An invocation such as %CallNTimes(5,FlashScreen) expands to;

MOV AX,5

Again: DEC AX

JZ Done

PUSH AX

CALL FlashScreen

POP AX

JMP Again

Done:

A second invocation of this macro produces an error because it doubly defines the labels Again and Done. The problem is that in this case we want a new, unique pair of labels created for each invocation. This can be done in a macro definition using the

LOCAL declaration. The proper form is illustrated by:

%*DEFINE(CallNTimes(n,subr)) LOCAL Again Done (

MOV AX,%n

%Again: DEC AX

JZ %Done

PUSH AX

CALL %subr

POP AX

JMP %Again

%Done:)

Conditional Assembly

In a manner carefully integrated with macro processing, the assembler also supports assembly-time expression evaluation and string manipulation facilities. These include the functions

EVAL, LEN, EQS, GTS, LTS, NEX, GES, LES, and SUBSTR. Here are examples to illustrate the possibilities:

64 Assembly Language Manual

Function

EVAL

LEN

EQS

GTS

LTS

NES

GES

LES

SUBSTR

Example

%EVAL(3*(8/5))

%LEN(First)

%EQS(AA,AA)

%GTS(y,x)

%LTS(y,x)

%NES(AA,AB)

%GES(y,y)

%LES(z,y)

%SUBSTR(abcde,2,3)

Evaluation of Example

3h

5h

0FFFFh

0FFFFh

0h

0FFFFh

0FFFFh

0h bcd

Description

Evaluate expression

Length of string

String equality

String greater

String less

String not equal

String greater or equal

String less or equal

Substring

Note that these functions evaluate to hexadecimal numbers, and that the relational functions (EQS, etc.) evaluate to 0FFFFh if the relation holds and Oh if it does not. The parameter to EVAL must evaluate to a number.

The result of a numeric computation done during macro processing can be given a symbolic name with the SET function, which is invoked in the form:

%SET (name, value)

For example:

%SET (xyz, 7+5) sets the macro variable xyz to value 0Ch. Subsequent to the use of SET, %xyz is equivalent to 0Ch. Similarly, the invocation:

%SET (xyz, %xyz-1) decrements the value of the macro variable xyz.

The macro facility also supports conditional and repetitive assembly with the control functions IF, REPEAT, and WHILE.

IF has two versions

%IF (param1) THEN (param2) ELSE (param3) FI and

%IF (param1) THEN (param2) FI

The first parameter is treated as a truth value--odd numbers are true and even numbers false. If the first parameter is true, the

IF expression is equivalent to the value of its second parameter; if the first parameter is false, the IF expression is equivalent to the value of its third parameter (or to the null string if the third parameter is omitted). For example:

Macro Assembler 65

%IF (1) THEN (aa) ELSE (bb) FI is equivalent to aa, and:

%IF (2) THEN (aa) FI is equivalent to the null string.

The IF function can be used in conjunction with macro variables to provide conditional assembly. Suppose a program contains a table that is to be searched for a value at run-time. If the table is small, a simple linear search is best; if the table is large, a binary search is preferable. Then you could code:

%IF (%sTable GT 10)

THEN(

;binary search version here

)else(

;linear search here

)

The macro variable %sTable would have to be defined with some numeric value; otherwise the expansion of the IF would yield an error.

Sometimes it is convenient to control a conditional assembly by whether or not a symbol has been defined: in the usual case, the symbol is not defined and one alternative is selected, but if a definition for the symbol is found, a different alternative is selected. The macro processor supports this capability with the

ISDEF function. ISDEF may use two forms: one tests whether a run-time symbol (for example, a label) has been defined, and the other tests whether a macro-time symbol has been defined. In both cases, the result is -1 if the symbol is defined, and 0 if the symbol is not defined. The two forms are, % ISDEF (symbol) to check a run-time symbol, and, %*ISDEF (%symbol), to check a macro-time symbol

Repetitive Assembly

REPEAT is used to assemble one of its parameters a specified number of times. The form is:

%REPEAT (param1) (param2)

For example:

%REPEAT (4)

( DW 0

) is equivalent to:

66 Assembly Language Manual

DW 0

DW 0

DW 0

DW 0

(Note that in this, and in most examples involving the macro facility, the parentheses are the delimiters of textual parameters, so their placement is critical.)

WHILE is used to assemble one of its parameters a variable number of times, depending on the result of an assembly-time computation to be performed before each repetition. The form is:

%WHILE (param1) (param2)

For example, suppose %nWords has the value 3h. Then the result of:

%WHILE (%nWords GT 0) (%REPEAT (%nWords)

( DW %nWords

) %SET (nWords, %nWords-1)) is:

DW 3h

DW 3h

DW 3h

DW 2h

DW 2h

DW 1h

When using the control functions REPEAT and WHILE it is sometimes desirable to explicitly terminate expansion. This can be done with EXIT, whose invocation stops the expansion of the enclosing REPEAT, WHILE, or macro. For example, if %n is initially 5, then the expression.

%WHILE(%n GT 0)

(%REPEAT (%n) (%IF (%n) THEN (%EXIT) FI DW %n

)%SET (n, %n-1) expands to:

DW 4

DW 4

DW 4

DW 4

DW 2

DW 2

Macro Assembler 67

Interactive Assembly (IN and OUT)

The macro capability supports interactive assembly, based on the two functions IN and OUT, which are used, respectively, to read input from the keyboard during assembly and to display information on the video display during assembly. When using IN and OUT, it is important to understand the two-pass nature of the assembler.

Since the assembler makes two passes over the text, it expands all macros and macro-time functions twice. This works, but the programmer must take care:

1. that expressions involving macro-time variables generate the same code or data in both passes, and

2. that IN and OUT are not expanded twice.

The programmer may control these effects using the specially defined macro variables PASS1 and PASS2, whose values are:

During First Pass During Second Pass

PASS1 | -1 | 0 |

PASS2 | 0 | -1 |

Here is an example to illustrate these facilities. Suppose you want to prompt the user for a number at the beginning of an assembly, then use this (input) string later. Do this by inserting, near the beginning of the source, this code:

%IF (%PASS1 EQ -1)

THEN (%OUT (Enter table size in bytes)

%SET (sTable, %IN)) FI

The OUT and IN execute during the first pass only, and the user's input becomes the value of the macro variable sTable; this can later be referred to by %sTable.

Comments

You can write macro-time comments. The format is either: or

%'text-not-containing-RETURN-or-apostrophe'

%'text-not-containing-RETURN-or-apostrophe RETURN

(Here RETURN designates the character generated by the Convergent

RETURN key, code 0Ah.) Since the characters of the embedded text of a comment are consumed without any effect, comments may be used to insert extra returns for readability in macro definitions.

68 Assembly Language Manual

Match Operation

The special macro function MATCH is particularly useful for parsing strings during macro processing. It permits its parameters to be divided into two parts: a head and a tail. A simple form is:

%MATCH (var1, var2) (text)

For example, following the expansion of:

%MATCH (var1, var2) (a, b, c, d)

The macro variable var1 has the value "a" and var2 the value "b, c, d". This facility might be used together with LEN and

WHILE. Consider the expression:

%WHILE (%LEN(%arg) GT 0)(%MATCH (head, arg)(%arg)

DW %head

))

If %arg is initially the text 10, 20, 30, 40, then the expansion is:

DW 10

DW 20

DW 30

DW 40

Advanced Features

The form of MATCH just described, as well as the form of macro definition and call described above, are actually only special cases. In fact the separator between the parameters of MATCH or of a macro can be a user-specified separator other than comma.

The remainder of this Section explains this and a number of related advanced features of the macro facility. Most programmers find the macro facilities described above quite sufficient for their needs; what follows can be deferred to a second reading.

The entities manipulated during macro processing are macro identifiers, macro delimiters, and macro parameters.

A macro identifier is any string of alphanumeric characters and underscores that begins with an alphabetic character.

A macro delimiter is a text string used as punctuation between macro parameters. There are three kinds of macro delimiters:

1. An identifier delimiter is the character "@" followed by an identifier.

Macro Assembler 69

2. An implicit blank delimiter is any text string made up of the

"white space" characters space, RETURN, or TAB.

3. A literal delimiter is any other delimiter. Thus, all the preceding examples have used the comma as a literal delimiter.

A macro parameter is any text string in which parentheses are balanced. The following are valid parameters: xyz

(xyz)

((xyz)()(())) whereas the following are not:

(

(() xy)(

That is, parentheses are considered balanced if the number of left and right parentheses is the same and, moreover, in reading from left to right there is no intermediate point at which more right than left parentheses have been encountered.

The most general form of macro definition is:

%*DEFINE (ident pattern) <locals> (body) where:

1. the "*" is optional (see below for details),

2. ident is a macro identifier as defined above,

3. pattern and body are any balanced strings, and

4. <locals> is optional and, if present, consists of the reserved word LOCAL and a list of macro identifiers separated by spaces.

In all macro definitions illustrated above, the pattern has the form:

(id1, id2, ..., idn) and all invocations are of the form:

%ident (param1, param2 ..., paramn)

Here are examples to illustrate other cases. The definition:

70 Assembly Language Manual

%*DEFINE (DWDW A @AND B)(DW %A

DW %B) requires an invocation such as;

%DWDW 1 AND 2 which expands to:

DW 1

DW 2

Here the delimiter preceding the formal parameter A and following the formal parameter B is an implicit space. The delimiter between the A and the B is the identifier delimiter @AND.

Bracket and Escape

The macro processor has two special functions, "bracket" and

"escape," which are useful in defining invocation patterns and parameters. The bracket function has the form:

%(text) where text is balanced. The text within the brackets is treated literally. Thus, given the definition:

%*DEFINE (F(A))(%(%F(2))) the invocation:

%F(1) expands to:

%F(2) since the %F(2) is embedded within a bracket function and hence not treated as another macro call. Similarly, the definition:

%*DEFINE (DWDW A AND B)(DW %A

DW %B) declares three formal parameters A, AND, and B (with implicit blank delimiters), whereas the definition:

%*DEFINE (DWDW A %(AND) B)(DW %A

DW %B) treats the AND as a literal delimiter, so that the invocation:

%DWDW 1AND2 yields the expanded form:

Macro Assembler 71

DW 1

DW 2

The escape function is useful to bypass requirements for balanced text or to use special characters like "%" or "*" as regular characters.

The form is:

%ntext where n is a digit, 0 to 9, and text is a string exactly n characters long. For example, you might define:

%*DEFINE (Concat(A,B))(%A%B) and invoke this macro by:

%Concat (DW ,%1(3+,4%1)) yielding the expansion:

DW (3+4)

MATCH Calling Patterns

Generalized calling patterns are applicable to MATCH just as they are to macro definition and invocation. The general form is:

%MATCH(ident1 macrodelimiter ident2)(balancedtext)

For example, if "arg" is initially:

10 xyz 20 xyz 30 then:

%WHILE (%LEN(%arg) GT 0)(%MATCH(head @xyz arg)(%arg)

DW %head

) expands to:

DW 10

DW 20

DW 30

Processing Macro Invocations

In processing macro invocations, the assembler expands inner invocations as they are encountered. Thus, in the invocation:

%F(%G(1))

72 Assembly Language Manual

the argument to be passed to F is the result of expanding

%G(1). The expansion of inner invocations can be suppressed using the bracket and escape functions. Thus, with both of the invocations:

%F(%(%G(1)))

%F(%5%G(1)) it is the literal text %G(1), not the expansion of that text, that is the actual parameter of F.

Expanded and Unexpanded Modes

All macro processor functions can be evaluated in either of two modes, expanded and unexpanded. When the function, invocation, or definition is preceded by "%", the mode used is expanded; when preceded by "%*", the mode used is unexpanded. In either case, actual parameters are expanded and substituted for formal parameters within the body of invoked macros. In unexpanded mode, there is no further expansion. In expanded mode, macro processing specified in the body of a macro is also performed.

For example, let the macros F and G be defined by:

%*DEFINE(F(X))(%G(%X))

%*DEFINE(G(Y))(%Y+%Y)

Then the invocation:

%*F(1) expands to:

%G(1) whereas the invocation:

%F(1) expands to:

1+1

Nested Macro Expansion

When macro expansion is nested inner expansions are according to the mode they specify; on completion of inner expansions, processing continues in the mode of the outer expansion. An alternate way of saying this is that the parameters of user- defined macros are always processed in expanded mode. The bodies are processed in expanded mode when a "%" invocation is used, and in unexpanded mode when a "%*" invocation is used. It is also possible to invoke built-in functions in either expanded or unexpanded mode. For each built-in function, some arguments are

Macro Assembler 73

classified as parameter-like and therefore processed in expanded mode, whereas others are classified as body-like and therefore processed in expanded mode only if the invocation is with "%".

The complete table follows:

DEFINE (p-arg) (b-arg)

EQS (p-arg)

EVAL (p-arg)

GES (p-arg)

GTS (p-arg)

IF (p-arg) THEN (b-arg) ELSE (b-arg)

ISDEF (b-arg)

LEN (b-arg)

LES (p-arg)

LTS (p-arg)

MATCH (p-arg) (b-arg)

METACHAR (p-arg)

NES (p-arg)

OUT (b-arg)

REPEAT (p-arg) (b-arg)

SUBSTR (b-arg, p-arg, p-arg)

WHILE (p-arg)(b-arg) where p-arg denotes parameter-like arguments and b-arg denotes body-like arguments.

Assembly control directives, explained in section 10, begin with a "$" after a RETURN. If a control is encountered in expanded mode, it is obeyed; otherwise the control is simply treated as text.

A different character can be substituted for the built-in metacharacter "%" by calling the function METACHAR, in the form:

%METACHAR (newmetacharacter)

The metacharacter should not be a left or right parenthesis an asterisk, an alphanumeric character, or a "white space" character.

74 Assembly Language Manual

9 ACCESSING STANDARD SERVICES FROM ASSEMBLY CODE

You can access all system services from modules written in assembly language. To do so, you must follow certain standard calling conventions, register conventions, and segment/group conventions. If, in addition, you wish to use the system's virtual code management services, you must follow additional virtual code conventions.

Calling Conventions

Here we explain how CTOS™ Operating System services and standard object module procedures are invoked from programs written in assembly language. The following example of a call to the standard object module procedure ReadBsRecord is helpful in understanding this subject. The calling pattern of this procedure, described in detail in the CTOS™ Operating System

Manual, is

ReadBsRecord (pBSWA, pBufferRet, sBufferMax

psDataRet): ErcType

The Operating System and the standard object modules deal with quantities of many different sizes, ranging from single-byte quantities, such as Boolean flags, to multibyte quantities, such as request blocks and Byte Stream Working Areas. Three of these sizes are special: one byte, two bytes, and four bytes. Only quantities of these sizes are passed as parameters on the stack or returned as results in the registers. When it is necessary to pass a larger quantity as a parameter or to return a larger quantity as a result, a pointer to the larger quantity is used in place of the quantity itself. A pointer is always a 4-byte logical memory address consisting of an offset and segment base address.

For example, ReadBsRecord takes as parameters a pointer to a Byte

Stream Work Area (pBSWA), a pointer to a buffer (pBufferRet), a maximum buffer size (sBufferMax), and a pointer to a word containing the size of some data (psDataRet). ReadBsRecord returns an error status of type ErcType. The pointers are all 4- byte quantities, the size is a 2-byte quantity, and the error status is a 2-byte quantity. Suppose that data is allocated by the declarations: sBSWA EQU 130 sBuffer EQU 80 bswa DB sBSWA DUP(?) buffer DB sBuffer DUP(?) sData DW ?

Accessing Standard Services 75

Then to call ReadBsRecord, it is necessary first to push onto the stack, in order, a pointer to bswa, a pointer to buffer, the size of buffer (the constant sBuffer), and a pointer to sData.

If DS contains the segment base address for the segment containing bswa buffer and sData, then this may be done by the code:

PUSH DS

MOV AX, OFFSET

PUSH AX

PUSH DS

MOV AX, sBuffer

PUSH AX

PUSH DS

MOV AX, OFFSET sData

PUSH AX

CALL ReadBsRecord

;Push the segment base address for bswa

;Set BX to the offset of bswa

;Push the offset of bswa

;Ditto for the buffer

;Get the buffer size into a register

;Push this word onto the stack

;Push the segment base address

;and then the offset of sData

;Do the call

Note that pointers are arranged in memory with the low-order part, the offset, at the lower memory address, and the high-order part, the segment base, at the higher memory address. However, the processor architecture of the Convergent Information

Processing System is such that stacks expand from high memory addresses toward low memory addresses; hence the high-order part of a pointer is pushed before the low-order part. Note also that the processor has no instruction that pushes an immediate constant: that is why the constant sBuffer must first be loaded into a register and that register pushed onto the stack.

Finally, note that this sample code actually computes the various pointers at run-time. It would also be possible to have the pointers precomputed by adding to the program the declaration: pBSWA DD bswa pBuffer DD buffer psData DD sData

If this were done, then the appropriate calling sequence would be:

LES BX, pBSWA

PUSH ES

PUSH BX

LES BX, pBuffer

PUSH ES

PUSH BX

MOV AX, sBuffer

PUSH AX

LES BX, psData

PUSH ES

PUSH BX

CALL ReadBxRecord

76 Assembly Language Manual

Note that the LES instruction loads the offset part of the pointer into BX and the segment part into ES in a single instruction.

Object module and system common procedures as well as procedural references to system services must be declared EXTRN and FAR.

These declarations may not be embedded in a SEGMENT/ENDS declaration. See line 6 of Figure 11-3.

The result returned by ReadBsRecord is a 2-byte quantity and according to the Convergent calling conventions, is returned in

AX. If the result were a 4-byte quantity, the high-order part would be returned in ES and the low-order part in BX.

All of the 4-byte quantities dealt with in this example are pointers. There are many cases in which the Operating System and standard object module procedures deal with 4-byte quantities other than pointers, such as logical file addresses (lfa). It is important to understand that, as far as regards calling and register conventions and stack formats, such 4-byte quantities are dealt with exactly as 4-byte pointers, when they are parameters, the high-order part is pushed first and the low-order part second; when they are results, the high-order part is returned in ES and the low-order part is returned in BX.

There is one additional case, not illustrated by the example of

ReadBsRecord. When a parameter is a single byte, such as a boolean flag, two bytes on the stack are actually required, although the high-order byte of these two bytes is not used.

Thus the instruction:

PUSH BYTE PTR[BX] adds two bytes to the stack. One of these bytes is specified by the operand of the PUSH instruction; the other is not set and no reference should be made to it. Similarly, when the result of a function is a single byte, that byte is returned in AL and no reference should be made to the contents of AH.

Register Usage Conventions

When writing in assembly language a call to a standard object module procedure or to the Operating System, be aware of the

Convergent standard register conventions. The contents of CS,

DS, SS, SP, and BP are preserved across calls: they are the same on the return as they were just prior to the pushing of the first argument. It is assumed that SS and SP point, respectively, to the base of the stack and the top of the stack, and this stack will, in general, be used by the called service. (Do not put temporary variables in the stack area below SS.SP; see

"Interrupts and the Stack" below for details.) These conventions place no particular requirement on the contents of BP unless virtual code segment management services are being used. (See

Accessing Standard Services 77

"Virtual Code Segment Management and Assembly Code" below for details of BP usage with virtual code.) The other registers and the flags are not automatically preserved across calls to the

Operating System or the standard object module procedures. Any other registers which must be saved in a particular application must be saved explicitly by the caller. Although there is not an absolute requirement that these register usage conventions be followed in parts of an application that do not call standard

Convergent services, failing to follow them is not recommended in the Convergent programming environment.

Segment and Group Conventions

Main Program

A main program module written in assembly language must declare its stack segment and starting address in a special way. This is illustrated in the sample module of Figure 11-2. In particular: o The stack segment must have the combine type Stack. (See line 22.) o The starting address must be specified in the END statement. (See line 27.)

When the program is run, the Operating System performs the following steps: o It loads the program.

o It initializes SS to the segment base address of the program's stack.

o It initializes SP to the top of the stack.

o It transfers control to the starting address with interrupts enabled.

SS and DS When Calling Object Module Procedures

If the program calls Convergent object module procedures, there are additional requirements. The program format used in Figure

11-2 does not suffice. A correct program is given Figure 11-3, illustrating the following points: o The stack segment must have segment name Stack, combine type

Stack, and classname 'Stack'. See line 44.

o Although not required, it is standard practice that user code be contiguous in memory with Convergent code and that code be at the front of the memory image. This is achieved if all

78 Assembly Language Manual

code segments have classname 'Code' and this class is mentioned before any other in the module. See lines 11-12.

o It is desirable to avoid forward references to constants. It is also standard, though not required, to make user constants contiguous with Convergent constants in the memory image and to locate constants directly after code. You can achieve both goals by giving all constant segments the classname

'Const' and by mentioning this classname before any other save 'Code'. See lines 17-22 o It is desirable to avoid forward references to data. It is also standard, though not required, to make user data contiguous with Convergent data in the memory image, and to locate data directly after constants. You can achieve both goals by giving all data segments the classname 'Data' and by mentioning this classname before any others save 'Code' and

'Const'. See lines 27-36. Note that EXTRN declarations for data declared in object module procedures must be embedded in the data SEGMENT/ENDS declarations.

o At any time that a call is made to an object module procedure, DS and SS must contain the segment base address of a special group named DGroup. This group contains the Data

Const, and Stack segments, and is declared as illustrated in line 53. In addition, at the time of a call to an object module procedure, SP must address the top of a stack area to be used by the called procedure. A correct initialization of

SS, SP and DS is illustrated in lines 62-68. These values need not be maintained constantly, but, if they are changed, they should be restored (using the appropriate top of stack value in SP if it has changed) for any call to an object module procedure. Note that the Operating System's interrupt handlers save the user registers by pushing them onto the stack defined by SS:SP. Therefore, some valid stack must be defined at all times that interrupts are enabled.

Interrupts and the Stack

If interrupts are enabled, interrupt routines use the stack as defined by SS and SP. Therefore you should never, even temporarily, put data in the stack segment at a memory address less than SS:SP.

Use of Macros

The instructions to set up parameters on the stack before a call and to examine the result on return have a number of cases, as discussed above. The instructions that must be executed differ slightly according to whether a parameter is in a register, a static variable, an immediate constant, a word, or a doubleword. If you are programming a particular assembly module in which not all of this variability occurs, it may be simplest

Accessing Standard Services 79

to program the required calling sequences just once, to include them in your program as macro definitions, and to invoke them using the assembler's macro expansion capability.

For example, the procedural interface to the Write operation is given in the CTOS™ Operating System Manual as;

Write (fh, pBuffer, sBuffer, lfa, psDataRet): ErcType where fh and sBuffer are 2-byte quantities and pBuffer, lfa, and psDataRet are 4-byte quantities. The corresponding external declaration and macro definition would be;

EXTRN Write: FAR

%*DEFINE(Write(fh pBuffer sBuffer lfa psDataRet))

(PUSH %fh

PUSH WORD PTR %pBuffer[2]

PUSH WORD PTR %pBuffer[0]

PUSH %sBuffer

PUSH WORD PTR %lfa[2]

PUSH WORD PTR %lfa[0]

PUSH WORD PTR %psDataRet[2]

PUSH WORD PTR %psDataRet[0]

CALL Write

)

Note that the 4-byte quantities are treated slightly differently from the 2-byte quantities, requiring first a PUSH of the highorder word, then a PUSH of the low-order word.

Here is an example of the use of this macro with "static" actual parameters: fh1 DW ?

EVEN buffer DB 512 DUP(?) sBuf DW SIZE buffer pBuf DD buffer lfa1 DD ?

sDataRet DW ?

psDataRet DD sDataRet

.

.

.

;code to initialize fh1, buffer, and lfa1

.

.

.

%Write(fh pBuffer sBuffer lfa psDataRet)

You might, instead, want to invoke this macro with actual parameters on the stack. Suppose that the quantities rbfh1, rbsBuf, rbpBuf, rblfa1, and rbpsData are on the stack and that

80 Assembly Language Manual

the top of stack pointer is in register BX. Here is a sample invocation: rbfh1 EQU -6 rbsBuf EQU -8 rbpBuf EQU -10 rblfa1 EQU -14 rbpsDat EQU -18

%Write([BP+rbfh1] [BP+rbpBuf]

[BP+rbsBuf] [BP+rblfa1]

[BP+rbpsData]

Virtual Code Segment Management and Assembly Code

The virtual code segment management services of the Convergent

Information Processing System permit the programmer to configure a program (written in any of the Convergent compiled languages, in assembly language, or in a mixture of these) into overlays.

Although data cannot be overlaid with these services, code can be overlaid. Moreover, the run-time operations whereby code overlays are read into memory and discarded from memory are entirely automatic. The programmer need only specify, when linking the program, which modules are to be overlaid, and need make no change to the program apart from inserting at its start a single procedure call to initialize virtual code segment management services. (See the CTOS™ Operating System Manual for details.)

The correct automatic operation of the virtual code facility requires certain assumptions about stack formats and register usage in the run-time environment to be satisfied. These assumptions are automatically satisfied by the compiled languages of the Convergent System; however, the assembly language programmer must follow some simple rules if virtual code segment management is to be used. If a program contains no calls to overlaid modules from assembly language code or from procedures called from assembly language code, then the presence of assembly language code in the program has no affect on the operation of virtual code segment management services. In this case, there are no additional rules that the assembly language programmer must follow.

An overlay fault is defined as a call to or return to an overlaid module that is not in memory. An overlay fault automatically invokes virtual code segment management services to read the required overlay into memory and possibly to discard one or more other overlays from memory. The virtual code segment management services do this, in part, by examining the run-time stack.

Therefore, if there are control paths in a program such that the stack may contain entries created by assembly language code when an overlay fault occurs, the assembly language programmer is subject to additional rules. These are the rules:

Accessing Standard Services 81

1. The register usage conventions discussed earlier must be followed. The intervention of virtual code segment management services preserves the registers SS, SP, DS, and

BP, and, if an overlay fault occurs during the return from a function, preserves registers AX, BX, and ES where results may be returned. Other registers are not, in general, preserved, and therefore cannot be used to contain parameters or return results.

2. The stack segment must be named STACK and must be part of

DGroup. (If a program is a mixture of assembly language code and compiled code, and all code shares the same stack, this happens automatically; if a main program is written in assembly language, it must be done explicitly. See the example of an assembly language main program for details.)

3. All procedures must be declared using the PROC and ENDP directives. Procedure bodies may not overlap. That is, the pattern:

Outer PROC FAR

;Code of Outer

Inner PROC FAR

;Code of Inner

Inner ENDP

;More code of Outer

Outer ENDP is not permitted and must be replaced by the pattern

Outer PROC FAR

;Code of Outer

;More code of Outer

Outer ENDP

Inner PROC FAR

;Code of Inner

Inner ENDP

Note that this is only a restriction on syntactic nesting; there is no restriction on nested calls, and Outer can, in any case, contain calls to Inner.

4. If all of these conventions are followed, then when control enters an assembly language procedure, the most recent entry on the stack is the return address. In addition to preserving the value of BP, as discussed above, the procedure must push this value of BP onto the stack before it makes any nested call. No values may be pushed onto the stack between the return address and the pushed BP. This convention enables the virtual code segment management services to scan the stack during an overlay fault; its violation is not detected as an error but causes the overlaid program to fail

82 Assembly Language Manual

in unpredictable ways. Naturally, the pushed BP must be popped during the procedure's exit sequence.

5. All code must be in a class named CODE.

6. The SEG operator may not be used on an operand in class CODE nor in any segment that is part of an overlay. In particular, an instruction such as:

MOV AX, SEG Procedure is not permitted.

7. If a procedural value (that is, a value that points to a procedure) is to be constructed, this must be done in a class other than CODE by either:

pProc DD Procedure or:

pProc DW Procedure

DW SEG Procedure

Such procedural values do not point directly at the procedure

(since the procedure may be in an overlay), but at a special resident transfer vector created by the Linker. Such a procedural value may be invoked by the code:

CALL DWORD PTR pProc

8. If a procedure is known to be resident, and it is desired to address, not its entry in the resident transfer vector, but the procedure code directly, this may be done using, in place of SEG and OFFSET, the operators RSEG and ROFFSET. If RSEG or ROFFSET is applied to a value in an overlay, an error is detected during linking.

System Programming Notes

The rest of this Section describes some of the algorithms and data structures that make up the virtual code segment management facility. An understanding of these details is not needed by the user of the virtual code segment management facility--they are included for the information of the system programmer desiring a model of the internal workings of the virtual code segment management facility.

When you invoke the Linker, if you specify the use of overlays, then the Linker creates in the run file a special segment in the resident part of the program called the statics segment. This segment contains a transfer vector (an array of 5-byte entries called stubs with one stub for each public procedure in the

Accessing Standard Services 83

program). A stub consists of one byte containing an operation code, either JUMP or CALL, and four bytes containing a long address. The Linker notes each call to a public procedure in an overlaid program and transforms it to an intersegment indirect call through the address part of the corresponding stub.

The contents of the address part of a stub for a procedure which is in memory (i.e., either resident or overlaid but currently swapped in) is the actual starting address of the procedure; thus the call of such a procedure is slower than it would be in a nonoverlaid program by only one memory reference.

The contents of the address part of a stub for a procedure not in memory is the address of a procedure in the virtual code segment management facility. Thus a call of such a procedure actually transfers to the virtual code segment management facility. Such a call of the virtual code segment management facility is a "call fault." When a call fault occurs, the virtual code segment management facility reads the needed overlay into the swap buffer. Before control is transferred to the called procedure, two other steps are taken.

1. The address in all stubs for procedures in the overlay is changed to the swapped-in address of the procedure.

2. If some overlays had to be deleted from the swap buffer to make room for the new overlay, the stubs for their procedures reset to the address of the procedure in the virtual code segment management facility that deals with call faults. (It is possible for an overlay to be deleted from memory even though control is nested within it--i.e., even though a return into it is pushed onto the stack. This situation is handled properly: all such stacked return addresses are modified to be the address of a procedure in the virtual code segment management facility that subsequently swaps the overlay back into memory when a "return fault" occurs.)

The user will observe that, in the preceding discussion, no use is made of the first byte of a stub the operation code. This byte is, in fact, only used for calls of procedural values. The virtual code segment management facility arranges that the operation code is a jump instruction for an overlay in memory; thus an invocation of a procedural argument for such a procedure results in a call to a jump instruction which then transfers control to the procedure. The virtual code segment management facility arranges that the operation code for an overlay not in memory is a call; since the address part of such a stub is the address of the virtual code segment management facility, the invocation of such a procedure results instead in the activation of the virtual code segment management facility.

84 Assembly Language Manual

10 ASSEMBLY CONTROL DIRECTIVES

The Convergent assembly language contains facilities to control the format of the assembly listing and to sequence the reading of

"included" source files. These facilities are invoked by assembly control directives. Assembly control directives must occur on one or more separate lines within the source (i.e., not intermixed on the same line as other source code) . An assembly control line must begin with the character "$". Such a line may contain one or more controls, separated by spaces. Here is an example:

$TITLE(Parse Table Generator) PAGEWIDTH(132) EJECT

The meanings of the individual controls are described below.

EJECT

The control line containing EJECT begins a new page.

GEN

All macro calls and macro expansions, including intermediate levels of expansion, appear in the listing.

NOGEN

Only macro calls, not expansions, are listed. However, if an expansion contains an error, it is listed.

GENONLY

Only the final results of macro expansion, and not intermediate expansions or calls, are listed. This is the default mode.

INCLUDE (file)

Subsequent source lines are read from the specified file until the end of the file is reached. At the end of the included file, source input resumes in the original file just after the INCLUDE control line.

LIST

Subsequent source lines appear in the listing.

NOLIST

Subsequent source lines do not appear in the listing.

PAGELENGTH (n)

Pages of the listing are formatted n lines long.

Assembly Control Directives 85

PAGEWIDTH (n)

Lines of the listing are formatted a maximum of n characters wide.

PAGING

The listing is separated into numbered pages. This is the default.

NOPAGING

The listing is continuous, with no page breaks inserted.

SAVE

The setting of the LIST/NOLIST flag and the GEN/NOGEN/GENONLY flag is stacked, up to a maximum nesting of 8.

RESTORE

The last SAVEd flags are restored.

TITLE (text)

The text is printed as a heading on subsequent listing pages.

The default title is the null string. The text must have balanced parentheses. (See Section 8 for details.)

Using a Printer with Assembly Listings

The listing produced by the assembler is paginated with titles and page numbers. Since the entire page image is formatted in such a listing, it should be printed by APPENDing or COPYing to

[Lpt] rather than with the Executive's PRINT command. (The PRINT command can be used to print such a listing, but only by overriding many of its default values; these values were chosen to make the printing of text files created with the Editor most convenient.)

86 Assembly Language Manual

11 SAMPLE ASSEMBLER MODULES

This section contains three complete sample assembler modules.

The first, Figure 11-1, is a source module of the assembler itself. It is the module that translates the assembler's internal error numbers into textual error messages.

The second module Figure 11-2, is a skeleton of a "standalone" assembler main program, and illustrates how the run-time stack is allocated in an assembler module. This example follows a bare minimum of the standard system conventions and does not link properly to standard object module procedures.

The third module, Figure 11-3, is an assembler main program compatible with Convergent conventions and linkable with standard object module procedures, as described above in Section 9,

"Accessing Standard Services from Assembly Code."

Sample Assembler Modules 87

88 Assembly Language Manual

Sample Assembler Modules 89

Figure 11-1. Error Message Module Program. (Page 3 of 3.)

90 Assembly Language Manual

Sample Assembler Modules 91

92 Assembly Language Manual

Sample Assembler Modules 93

94 Assembly Language Manual

Appendix A: INSTRUCTION SET

Table A-3 lists the instruction set in numeric order of instruction code. Table A-4 lists the instruction set in alphabetical order of instruction mnemonic. This instruction set is described in detail in the Central Processing Unit.

Legend

Each table contains seven columns.

The column labeled "Op Cd" is the operand code. "Memory

Organization" is explained in Section 6. The "Instruction" column is the instruction mnemonic. The "Operand," if there is one, is the operand acted upon by the instruction.

The "Summary" column contains a brief summary of each instruction. Parentheses surrounding an item means "the contents of." For example, "(EA)" means "the contents of memory location

EA," and "(SS)" means "the contents of register SS." The infix operators (+, -, OR, XOR, etc.) denote the standard arithmetic or logical operation. CMP denotes a subtraction wherein the result is discarded and only the values of the flags are changed.

"TEST" denotes a logical "AND" wherein the result is discarded and only the values of the flags are changed.

The "clocks" column is the clock time for each instruction. (See

Table A-1 below.) Where two clock times are given in the conditional instructions, the first is the time if the jump (or loop) is performed, and the second if it is not. In all instructions with memory (EA) as one of the operands, a second clock time is given in parentheses. This is because in all these instructions memory may be replaced by a register. In such cases, the faster clock time applies. Where repetitions are possible, a second clock time is also given in parentheses, in the form "x+y/rep", where "x" is the base clock time, "y" is the clock time to be added for each repetition, and "rep" is the number of repetitions.

The "flags" column enumerates the flag conditions, according to this code:

S = set (to 1)

C = cleared (to 0)

X = altered to reflect operation result

U = undefined (code should not rely on these values)

R = replaced from memory (e.g., POPF)

blank = unaffected

Instruction Set A-1

These are the flags:

0 = Overflow flag

D = Direction flag

1 = Interrupt-enable flag

T = Trap flag

S = Sign flag

Z = Zero flag

A = Auxiliary Carry flag

P = Parity flag

C = Carry flag

These symbols are used in the tables:

Symbol bAddr

Interpretation

16-bit offset within a segment of a word (addressed without use of base or indexing) byte immediate constant bData bEA bREG

CF

Ext(b)

FLAGS off effective address of a byte

8-bit register (AH, AL, BH, CH, CL, DH, or DL) value (0 or 1) of the carry flag word obtained by sign extending byte b values of the various flags

16-bit offset within a segment

Sign(w) word of all 0's if w is positive, all 1's if w is negative sba

SR wAddr segment base address segment register (CS, DS, ES, or SS)

16-bit offset within a segment of a word (addressed without use of base or indexing) wData wEA wREG word immediate constant effective address of a word

16-bit register (AX, BX, CX, DX, SP, BP, SI, or DI)

A-2 Assembly Language Manual

Effective Address (EA) calculation time is according to Table A-1 below:

Table A-1. Effective Address Calculation Time.

EA Components Clocks*

Displacement only

Base or Index only (BX, BP, SI, DI)

6

5

Displacement

+

Base or Index

Base

+

Index

Displacement

+

Base

+

Index

(BX, BP, SI, DI)

[BP+DI],[BX+SI]

[BP+SI],[BX+DI]

[BP+DI]+DISP

[BX+SI]+DISP

[BP+SI]+DISP

[BX+DI]+DISP

9

7

8

11

12

*Add two clocks for segment override. Add four clocks for each 16-bit word transfer with an odd address.

Instruction Set A-3

Instruction

JA

JAE

JAE

JB

JB

JBE

JG

JGE

JL

JLE

JNZ

JPE

JPO

JZ

LOOPNZ

LOOPZ

REPZ

REPZ

REPNZ

SHL

Alternate Mnemonics

These instructions have synonymous alternate mnemonics:

Table A-2. Alternate Mnemonics.

Synonym Description

JNBE

JNB

JNC

JNAE

JC

JNA

JNLE

JNL

JNGE

JNG

JNE

JP

JNP

JE

LOOPNE

LOOPE

REP

REPE

REPNE

SAL

Jump if not below or equal

Jump if not below

Jump if not carry

Jump if not above or equal

Jump if carry

Jump if not above

Jump if not less or equal

Jump if not less

Jump if not greater or equal

Jump if not greater

Jump if not equal

Jump if parity

Jump if no parity

Jump if equal

Loop (CX) times while not equal

Loop (CX) times while equal

Repeat string operation

Repeat string operation while equal

Repeat while (CX) ≠ 0 and (ZF) = 1

Byte shift EA left 1 bit

A-4 Assembly Language Manual

Table A-3. Instruction Set in Numeric Order of Instruction Code. (Page 1 of 7.)

Op

Cd

Memory

Organization

Instruction

Operand Summary Clocks Flags

ODITSZAPC

01 MOD REGR/M ADD

02 MOD REGR/M ADD

03 MOD REGR/M ADD

04

06

07

ADD

ADD

PUSH

POP

08 MOD REGR/M OR

09 MOD REGR/M OR

REG,bEA

REG,wEA

AX,wData (AX)=(AX)+wData

ES

(bREG)=(bREG)+(bEA)

(wREG)=(wREG)+(wEA)

AL,bData (AL)=(AL)+bData bEA,REG wEA,REG

Push (ES) onto stack

Pop stack to ES

(bEA)=(bEA) OR (bREG)

(wEA)=(wEA) OR (wREG)

0C

0D

0F (not used)

10 MOD REGR/M ADC

11 MOD REGR/M ADC

12 MOD REGR/M ADC

14

15

16

17

OR

OR

ADC

PUSH

18 MOD REGR/M SBB

19 MOD REGR/M SBB

1A MOD REGR/M SBB

1B MOD REGR/M SBB

AL,bData (AL)=(AL) OR bData

AX,wData (AX)=(AX) OR wData

CS Push (CS) onto stack

EA,REG

EA,REG

REG,EA

REG,EA

(bEA)=(bEA)+(bREG)+CF

(wEA)=(wEA)+(wREG)+CF

(bREG)=(bREG)+(bEA)+CF

AX,wData (AX)=(AX)+wData+CF

SS

SS bEA,REG wEA,REG

REG,bEA

REG,wEA

(wREG)=(wREG)+(wEA)+CF

Push (SS) onto stack

Pop stack to SS

(wEA)=(wEA)-(wREG)-CF

(bREG)=(bREG)-(bEA)-CF

(wREG)=(wREG)-(wEA)-CF

1D

1E

1F

PUSH

POP

20 MOD REGR/M AND

22 MOD REGR/M AND

23 MOD REGR/M AND

24

26

27

AND

AND

ES:

DAA

28 MOD REGR/M SUB

29 MOD REGR/M SUB

2B MOD REGR/M SUB

2C

2D

2E

30 MOD REGR/M XOR

31 MOD REGR/M XOR

32 MOD REGR/M XOR

33 MOD REGR/M XOR

35

36

37

SUB

SUB

CS:

DAS

XOR

XOR

SS:

AAA

39 MOD REGR/M CMP

3A MOD REGR/M CMP

DS

DS bEA,REG wEA,REG bEA,REG wEA,REG

REG,bEA

REG,wEA

Push (DS) onto stack

Pop stack to DS

(bEA)=(bEA) AND (bREG)

(wEA)=(wEA) AND (wREG)

REG,bEA

REG,wEA

(bREG)=(bREG) AND (bEA)

(wREG)=(wREG) AND (wEA)

AL,bData (AL)=(AL) AND bData

AX,wData (AX)=(AX) AND wData bEA,REG wEA,REG

ES segment override

Decimal adjust for ADD

(bEA)=(bEA)-(bREG)

(wEA)=(wEA)-(wREG)

AL,bData (AL)=(AL)-bData

AX,wData (AX)=(AX)-wData

CS segment override

(bEA)=(bEA) XOR (bREG)

(wEA)=(wEA) XOR (wREG)

(bREG)=(bREG) XOR (bEA)

AL,bData (AL)=(AL) XOR bData

AX,wData (AX)=(AX) XOR wData

SS segment override

ASCII adjust for add bREG,bEA FLAGS=(bREG) CMP (bEA)

16+EA(3) X XXXXX

16+EA(3) X XXXXX

9+EA(3)

9+EA(3)

4

2

4

4

11

8

4

4

9+EA(3) X XXXXX

9+EA(3) X XXXXX

X XXXXX

X XXXXX

10

8

16+EA(3) C XXUXC

16+EA(3) C XXUXC

9+EA(3) C XXUXC

4

4

11

C XXUXC

C XXUXC

X XXXXX

X XXXXX

X XXXXX

X XXXXX

16+EA(3) X XXXXX

16+EA(3) X XXXXX

9+EA(3) X XXXXX

9+EA(3) X XXXXX

10

8

16+EA(3) C XXUXC

16+EA(3) C XXUXC

4

4

9+EA(3) C XXUXC

9+EA(3) C XXUXC

C XXUXC

C XXUXC

2

4 X XXXXX

16+EA(3) X XXXXX

16+EA(3) X XXXXX

9+EA(3)

4

X XXXXX

X XXXXX

X XXXXX

16+EA(3) C XXUXC

9+EA(3) C XXUXC

9+EA(3) C XXUXC

4

2

4

9+EA

9+EA

9+EA

C XXUXC

C XXUXC

U UUXUX

X XXXXX

X XXXXX

Instruction Set A-5

Table A-3. Instruction Set in Numeric Order of Instruction Code. (Page 2 of 7.)

Op

Cd

Memory

Organization

Instruction

Operand Summary Clocks Flags

ODITSZAPC

6F

70

71

72

6B

6C

6D

6E

74

75

61

62

63

64

5D

5E

5F

60

66

67

68

69

53

54

55

56

4F

50

51

52

58

59

5A

5B

4A

4B

4C

4D

46

47

48

49

41

42

43

44

3C

3D

3E

3F

CMP

DS:

AAS

INC

INC

INC

INC

INC

INC

DEC

DEC

DEC

DEC

DEC

DEC

PUSH

PUSH

PUSH

PUSH

PUSH

PUSH

PUSH

AX

CX

POP

POP

POP

POP

POP

POP

POP

(not used)

SI

DI

(not used)

(not used)

(not used)

(not used)

AX

CX

DX

BX

SP

BP

SI

DI

(not used)

(not used)

(not used)

(not used)

(not used)

(not used)

(not used)

(not used)

SI

DI

AX

CX

DX

BX

SP

BP

DX

BX

SP

BP

AX,wData FLAGS=(AX) CMP (wData)

DS segment override

ASCII adjust for subtract

(AX)=(AX)+1

(CX)=(CX)+1

(DX)=(DX)+1

(BX)=(BX)+1

(SP)=(SP)+1

(DI)=(DI)+1

(AX)=(AX)-1

(BX)=(BX)-1

(SP)=(SP)-1

(BP)=(BP)-1

(SI)=(SI)-1

(DI)=(DI)-1

Push (AX) onto stack

Push (CX) onto stack

Push (DX) onto stack

Push (BX) onto stack

Push (SP) onto stack

Push (BP) onto stack

Push (SI) onto stack

(not used)

JO

JNO

JB

JNZ bDISP bDISP bDISP bDISP bDISP

Pop stack to CX

Pop stack to DX

Pop stack to BX

Pop stack to SP

Pop stack to SI

Pop stack to DI

Jump if overflow

Jump if no overflow

Jump if below

Jump if above or equal

Jump if not zero

16 or 4

16 or 4

16 or 4

16 or 4

16 or 4

2

11

11

11

2

2

2

2

11

11

11

11

8

8

8

8

8

8

8

2

2

2

2

4

2

4

2

2

2

X XXXXX

U UUXUX

X XXXX

X XXXX

X XXXX

X XXXX

X XXXX

X XXXX

X XXXX

X XXXX

X XXXX

X XXXX

X XXXX

A-6 Assembly Language Manual

Table A-3. Instruction Set in Numeric Order of Instruction Code. (Page 3 of 7.)

Op

Cd

Memory

Organization

Instruction

Operand Summary Clocks Flags

ODITSZAPC

77

78

79

7A

7C

7D

7E

7F

JS

JNS

JPE

JPO

JL

JGE

JLE

JG

80 MOD 000 R/M ADD bDISP bDISP bDISP bDISP bDISP bDISP bDISP

Jump if sign

Jump if no sign

Jump if parity even

Jump if parity odd

Jump if greater or equal

Jump if less or equal

Jump if greater

16 or 4

16 or 4

16 or 4

16 or 4

16 or 4

16 or 4

16 or 4

80 MOD 010 R/M

80 MOD 011 R/M

80 MOD 100 R/M

ADC

SBB

AND

80 MOD 110 R/M XOR

80 MOD 111 R/M CMP

81 MOD 000 R/M ADD

81 MOD 001 R/M OR

81 MOD 010 R/M ADC

81 MOD 011 R/M SBB

81 MOD 100 R/M AND

81 MOD 101 R/M SUB

81 MOD 110 R/M XOR

81 MOD 111 R/M CMP

82 MOD 000 R/M ADD

82 MOD 001 R/M

82 MOD 010 R/M ADC bEA,bData (bEA)=(bEA) OR bData bEA,bData (bEA)=(bEA)+bData+CF bEA,bData (bEA)=(bEA)-bData-CF bEA,bData (bEA)=(bEA)-bData bEA,bData (bEA)=(bEA) XOR bData bEA,bData FLAGS=(bEA) CMP bData wEA,wData (WEA)=(wEA)+wData wEA,wData (wEA)=(wEA)-wData-CF wEA,wData (wEA)=(wEA) AND wData

17+EA

17+EA

17+EA

10+EA

17+EA

17+EA

17+EA

17+EA

17+EA

17+EA

17+EA

10+EA

17+EA

X XXXXX

X XXXXX

C XXUXC

X XXXXX

X XXXXX

C XXUXC

X XXXXX

X XXXXX

C XXUXC

X XXXXX

C XXUXC

X XXXXX

X XXXXX

82 MOD 100 R/M

82 MOD 101 R/M SUB

82 MOD 110 R/M

82 MOD 111 R/M CMP

83 MOD 000 R/M ADD

83 MOD 001 R/M

83 MOD 010 R/M ADC

83 MOD 011 R/M SBB

83 MOD 100 R/M

83 MOD 101 R/M SUB

83 MOD 110 R/M

33 MOD 111 R/M CMP wEA,wData FLAGS=(wEA) XOR wData bEA,bData (bEA)=(bEA)+bData

(not used) bEA,bData (bEA)=(bEA)-bData-CF

(not used) bEA,bData (bEA)=(bEA)-bData

(not used)

(not used) wEA,bData (wEA)=(wEA)+Ext(bData)+CF

17+EA

17+EA

17+EA

X XXXXX

X XXXXX

X XXXXX

85 MOD REGR/M

86 MOD REGR/M

87 MOD REGR/M

88 MOD REGR/M

8A MOD REGR/M

8B MOD REGR/M

XCHG

XCHG

MOV

MOV

MOV

MOV

8C MOD 0SR R/M MOV

8C MOD 1-- R/M (not used) wEA,bData (wEA)=(wEA)-Ext(bData)

(not used) wEA,bData FLAGS=(wEA) CMP Ext(bData) 10+EA wEA,wREG bREG,bEA wREG,wEA bEA,bREG wREG,wEA wEA,SR

8D MOD REGR/M LEA

8E MOD 0SR R/M MOV

8E MOD -- R/M (not used)

8F MOD 000 R/M POP

REG, EA

SR,wEA

8F MOD 001 R/M (not used)

EA

8F MOD 010 R/M (not used)

8F MOD 011 R/M (not used)

Exchange bREG, bEA

Exchange wREG, wEA

(bEA)=(bREG)

(bREG)=(bEA)

(wREG)=(wEA)

(wEA)=(SR)

(REG)=effective address

(SR)=(wEA)

Pop stack to EA

17+EA

9+EA(3)

8+EA(2)

9+EA(2)

2+EA(2)

8+EA(2)

17+EA

X XXXXX

X XXXXX

9+EA(3) C XXUXC

17+EA(4)

17+EA(4)

9+EA(2)

C XXUXC

Instruction Set A-7

Table A-3. Instruction Set in Numeric Order of Instruction Code. (Page 4 of 7.)

Op

Cd

Memory

Organization

Instruction

Operand Summary Clocks Flags

ODITSZAPC

AE

AF

B4

B5

B6

B7

B0

B1

B2

B3

B8

B9

BB

BC

AB

AC

AD

A5

A6

A7

A8

AA

A0

A1

A2

A4

9B

9C

9D

9E

97

98

99

9A

8F MOD 100 R/M (not used)

92

93

94

95

8F MOD 110 R/M (not used)

8F MOD 111 R/M (not used)

90

91

XCHG

XCHG

XCHG

XCHG

XCHG

XCHG

AX,AX

AX,CX

AX,DX

AX,BX

AX,SP

AX,BP

CBW

CWD

PUSHF

POPF

SAHF

MOV

MOV

MOV

MOVSB

NOP

Exchange (AX), (CX)

Exchange (AX), (BX)

Exchange (AX), (SP)

Exchange (AX), (BP)

(AX)=Ext(AL)

(DX)=Sign(AX) off:sba

Push FLAGS onto stack

Pop stack to FLAGS

(FLAGS)=(AH)

(AH)=(FLAGS)

AL,bAddr (AL)=(bAddr)

AX,wAddr (AX)=(wAddr) bAddr,AL (bAddr)=(AL)

Move byte string

MOVSW

CMPSB

CMPSW

TEST

STOSB

Move word string

Compare byte string

Compare word string

AL,bData FLAGS=(AL) TEST (bData)

Store byte string

STOSW

LODSB

LODSW

SCASB

SCASW

MOV

MOV

MOV

MOV

MOV

MOV

MOV

MOV

MOV

MOV

Store word string

Load byte string

Load word string

Scan byte string

Scan word string

AL,bData (AL)=bData

CL,bData (CL)=bData

DL,bData (DL)=bData

BL,bData (BL)=bData

AH,bData (AH)=bData

CH,bData (CH)=-bData

DH,bData (DH)=bData

BH,bData (BH)=bData

AX,wData (AX)=wData

CX,wData (CX)=wData

MOV SP,wData (SP)=wData

3

3

3

3

3

2

5

4

10

10

10

10

4

4

10

8 RRRRRRRRR

RRRRRRRRR

18

(9+17/rep)

18

(9+17/rep)

X XXXXX

(9+22/rep)

22 X XXXXX

(9+22/rep)

4

4

4

4

4

4

4

4

4

4

4

4

11

(9+10/rep)

X XXUXC

X XXUXC

11

(9+10/rep)

12

(9+13/rep)

12

(9+13/rep)

X XXXXX

(9+15/rep)

15 X XXXXX

(9+15/rep)

A-8 Assembly Language Manual

Table A-3. Instruction Set in Numeric Order of Instruction Code. (Page 5 of 7.)

Op

Cd

Memory

Organization

Instruction

Operand Summary Clocks Flags

ODITSZAPC

BE

BF

C0

C1

C2

C3

C5 MOD REGR/M

C6 MOD 000 R/M

MOV

(not used)

DI,wData

(not used)

RET

RET

LDS

MOV

C6 MOD 001 R/M (not used)

C6 MOD 010 R/M (not used)

C6 MOD 011 R/M (not used) wData

(DI)=wData

NEAR return; (SP)=(SP)+

wData

NEAR return

ES:REG=(wEA+2):(wEA)

DS:REG=(wEA+2):(wEA) bEA,bData (bEA)=(bData)

C6 MOD 101 R/M (not used)

C6 MOD 110 R/M (not used)

C6 MOD 111 R/M

C7 MOD 000 R/M

(not used)

MOV

C7 MOD 010 R/M (not used)

C7 MOD 011 R/M (not used)

C7 MOD 100 R/M (not used)

EA,wData (wEA)=wData

4

12

8

10+EA

10+EA

C7 MOD 110 R/M (not used)

C7 MOD 111 R/M (not used)

C8

CA

(not used)

RET wData

CC

CD

CE

D0 MOD 011 R/M

INT

INTO

RCR

3 bData bEA,1

FAR return, ADD

data to REG SP

Typed interrupt

Interrupt if overflow

17

52

51

CC

CC

53 or 4 CC

(Simple execution of the instruction takes 4 clocks, and actual interrupt, 53.)

CF

ROL

D0 MOD 001 R/M ROR

D0 MOD 010 R/M RCL bEA,1 bEA,1 bEA,1

Rotate bEA right 1 bit

Rotate bEA left through

carry 1 bit

Rotate bEA right through

15+EA

15+EA

X X

X X

D0 MOD 100 R/M SHL

D0 MOD 101 R/M SHR

D0 MOD 110 R/M (not used)

D0 MOD 111 R/M SAR bEA,1 bEA,1 bEA,1

D1 MOD 000 R/M ROL

D1 MOD 001 R/M ROR

D1 MOD 010 R/M RCL

D1 MOD 011 R/M RCR wEA,1 wEA,1 wEA,1 wEA,1

D1 MOD 100 R/M SHL

D1 MOD 101 R/M SHR

D1 MOD 110 R/M (not used)

D1 MOD 111 R/M SAR wEA,1 wEA,1 wEA,1

Shift bEA right 1 bit

Shift signed bEA

right 1 bit

Rotate wEA left 1 bit

Rotate wEA right 1 bit

Rotate wEA left through

carry 1 bit

Rotate wEA right through

carry 1 bit

Shift wEA left 1 bit

Shift wEA right 1 bit

Shift signed wEA

right 1 bit

15+EA

15+EA

15+EA

15+EA

15+EA

15+EA

15+EA

15+EA

15+EA

X X

X XXUXX

X X

X X

X X

X X

X X

X X

X XXUXX

Instruction Set A-9

E5

E6

E7

E8

E1

E2

E3

E4

E9

EA

Table A-3. Instruction Set in Numeric Order of Instruction Code. (Page 6 of 7.)

Op

Cd

Memory

Organization

Instruction

Operand Summary Clocks Flags

ODITSZAPC

D2 MOD 000 R/M ROL

D2 MOD 001 R/M

D2 MOD 010 R/M

D2 MOD 011 R/M

D2 MOD 100 R/M

D2 MOD 101 R/M

ROR

RCL

RCR

SHL

SHR bEA,CL bEA,CL bEA,CL bEA,CL bEA,CL bEA,CL

Rotate bEA left

(CL) bits

Rotate bEA right

(CL) bits

Rotate bEA left through

carry (CL) bits

Rotate bEA right through

carry (CL) bits

Shift bEA left

(CL) bits

Shift bEA right

(CL) bits

D2 MOD 110 R/M (not used)

D2 MOD 111 R/M SAR bEA,CL

D3 MOD 000 R/M ROL wEA,CL

D3 MOD 001 R/M

D3 MOD 010 R/M

D3 MOD 011 R/M

D3 MOD 100 R/M

ROR

RCL

RCR

SHL wEA,CL wEA,CL wEA,CL wEA,CL

Shift signed bEA

right (CL) bits

Rotate wEA left

(CL) bits

Rotate wEA right

(CL) bits

Rotate wEA left through

carry (CL) bits

Rotate wEA right through

Shift wEA left

(CL) bits

Shift wEA right

(CL) bits

20+EA

+4/bit X X

20+EA

+4/bit X X

20+EA

+4/bit X X

20+EA

+4/bit X X

20+EA

+4/bit X X

20+EA

+4/bit X X

20+EA

+4/bit X XXUXX

20+EA

+4/bit

X X

20+EA

+4/bit X X

20+EA

+4/bit X X

20+EA

+4/bit X X

20+EA

+4/bit X X

20+EA

+4/bit X X

D3 MOD 101 R/M SHR

D4 00001010

D5 00001010

D8 MOD -- R/M

E0 wEA,CL

D3 MOD 110 R/M (not used)

D3 MOD 111 R/M SAR wEA,CL

AAM

AAD

(not used)

TABLE

ESC

LOOPNZ

EA bDISP

LOOPZ

LOOP

JCXZ

IN

OUT

OUT

CALL

JMP

JMP bDISP bDISP bDISP

AL,bPort bPort,AL wPort,AX wDISP wDISP,

wSEG

AL,DX

Shift signed wEA

right (CL) bits

ASCII adjust for multiply

ASCII adjust for divide

Translate using (BX)

Escape to external device

Loop (CX) times while

not zero

20+EA

+4/bit X XXUXX

83

60

11

8+EA

19 or 5

Loop (CX) times while zero 18 or 6

Loop (CX) times

Jump if (CX)=0

Output (AL) to bPort

Output (AX) to wPort

17 or 5

18 or 6

10

10

7

8

U XXUXU

U XXUXU

ED

EE

EF

F0

F1

IN

OUT

OUT

LOCK

(not used)

AX,DX

DX,AL

DX,AX

Direct far jump

Direct near jump

Byte input from port (DX) to REG AL

Word input from port (DX) to REG AX

Byte output (AL) to port

(DX)

Word output (AX) to port

Bus lock prefix

8

8

8

2

A-10 Assembly Language Manual

Table A-3. Instruction Set in Numeric Order of Instruction Code. (Page 7 of 7.)

Op

Cd

Memory

Organization

Instruction

Operand Summary Clocks Flags

ODITSZAPC

F2

F3

REPNZ

REPZ

Repeat while (CX)≠0

AND (ZF)=0

Repeat while (CX)≠0

AND (ZF)=1

F4

F5

HLT

CMC

Halt

Complement carry flag

F6 MOD 000 R/M TEST

F6 MOD 001 R/M (not used) bEA,bData FLAGS=(bEA) TEST bData

2

2

2

2

10+EA

F6 MOD 010 R/M NOT

F6 MOD 011 R/M NEG

F7 MOD 100 R/M MUL bEA bEA

Byte invert bEA

Byte negate bEA

(Note: Carry Flag is C if destination is 0.)

F6 MOD 100 R/M MUL

F6 MOD 110 R/M DIV

F6 MOD 111 R/M IDIV bEA bEA bEA bEA

Unsigned multiply by (bEA) 71

Signed multiply by (bEA)

Unsigned divide by (bEA)

Signed divide by (bEA)

F7 MOD 000 R/M TEST

F7 MOD 001 R/M (not used) wEA,wData FLAGS=(wEA) TEST wData

F7 MOD 010 R/M NOT

F7 MOD 011 R/M NEG

(Note: Carry Flag is C if destination is 0.)

F7 MOD 101 R/M IMUL

F7 MOD 111 R/M IDIV

F8 CLC

STC

FA

FB

FC

FD

CLI

STI

CLD

STD

FE MOD 000 R/M INC

FE MOD 010 R/M (not used) bEA

FE MOD 011 R/M (not used)

FE MOD 100 R/M (not used)

FE MOD 101 R/M (not used) wEA wEA wEA wEA wEA

Invert wEA

Negate wEA

16+EA

16+EA

112

10+EA

16+EA

16+EA

Unsigned multiply by (wEA) 124

Signed multiply by (wEA)

Unsigned divide by (wEA)

Signed divide by (wEA)

Clear carry flag

Set carry flag

Clear interrupt flag

Set interrupt flag

Clear direction flag

Set direction flag

177

2

2

2

2

15+EA

FE MOD 111 R/M (not used)

FF MOD 000 R/M INC

FF MOD 001 R/M DEC wEA wEA

FF MOD 011 R/M CALL

FF MOD 100 R/M JMP

FF MOD 101 R/M

FF MOD 111 R/M

JMP

(not used)

(wEA)=(wEA)+1

(wEA)=(wEA)-1

Indirect FAR call

Indirect NEAR jump

Indirect FAR jump

Push (EA) onto stack

15+EA

15+EA

29+EA

7+EA

16+EA

16+EA

X

C XXUXC

X XXXXS

X UUUUX

X UUUUX

U UUUUU

U UUUUU

C XXUXC

X XXXXS

X UUUUX

X UUUUX

U UUUUU

U UUUUU

C

S

C

S

C

C

X XXXX

X XXXX

Instruction Set A-11

CALL

CBW

CLD

CLI

CMC

CMP

CMP

CMP

CMP

CMP

CMP

CMP

CMP

CMPSB

CMPSW

CS:

DAA

Table A-3. Instruction Set in Alphabetic Order of Instruction Mnemonic. (1 of 6.)

Instruction

Operand Summary Op

Cd

Memory

Organization

Clocks Flags

ODITSZAPC

ADC

ADC

ADD

ADD

ADD

ADD

AAM

AAS

ADC

ADC

ADC

ADC

ADC

ADC

ADD

ADD

AND

AND

AND

AND

AND

AND

CALL.

bEA,REG wEA,REG off:sba wDISP

EA

ASCII adjust for multiply

ASCII adjust for subtract

AL,bData (AL)=(AL)+bData+CF bEA,bData (bEA)=(bEA)+bData+CF wEA,wData (wEA)=(wEA)+wData+CF bEA,bData (bEA)=(bEA)+bData+CF wEA,bData (wEA)=(wEA)+Ext(bData)+CF

REG,bEA

REG,wEA bEA,REG wEA,REG

REG,bEA

REG,wEA

(bEA)=(bEA)+(bREG)+CF

(bREG)=(bREG)+(bEA)+CF

(wREG)=(wREG)+(wEA)+CF

(bEA)=(bEA)+(bREG)

(wEA)=(wEA)+(wREG)

(bREG)=(bREG)+(bEA)

(wREG)=(wREG)+(wEA) bEA,bData (bEA)=(bEA)+bData wEA,wData (wEA)=(wEA)+wData bEA,bData (bEA)=(bEA)+bData

AL,bData (AL)=(AL) AND bData

AX,wData (AX)=(AX) AND wData

(bEA)=(bEA) AND (bREG)

(wEA)=(wEA) AND (wREG) bEA,bData (bEA)=(bEA) AND bData wEA,wData (wEA)=(wEA) AND wData

Direct FAR call

Direct NEAR call

Indirect NEAR call

Indirect FAR call

(AX)=Ext(AL)

Clear carry flag

Clear direction flag

Clear interrupt flag

Complement carry flag

AL,bData FLAGS=(AL) CMP (bData) wEA,wREG FLAGS=(wEA) CMP (wREG) bREG,bEA FLAGS=(bREG) CMP (bEA) wREG,wEA FLAGS=(wREG) CMP (wEA) bEA,bData FLAGS=(bEA) CMP bData bEA,bData FLAGS=(bEA) CMP bData wEA,wData FLAGS=(wEA) CMP wData wEA,bData FLAGS=(wEA) CMP Ext(bData)

Compare byte string

Compare word string

CS segment override

Decimal adjust for ADD

37

00001010

D4 00001010

3F

14

15

MOD 010 R/M

4

4

4

60

83

81 MOD 010 R/M 17+EA

82 MOD 010 R/M 17+EA

83

10

MOD 010 R/M

MOD REGR/M

12 MOD REGR/M

13 MOD REGR/M

04

17+EA

16+EA(3

05

00 MOD REGR/M

01 MOD REGR/M

02 MOD REGR/M

03 MOD REGR/M

16+EA(3 X XXXXX

16+EA(3) X XXXXX

9+EA(3)

9+EA(3)

81 MOD 000 R/M 17+EA

82 MOD 000 R/M 17+EA

X XXXXX

X XXXXX

83

25

20

21

22

FA

F5

3C

38

39

3A

3B

80

81

MOD REGR/M

9+EA(3)

9+EA(3)

2

2

2

2

U XXUXU

U UUXUX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

16+EA(3 C XXUXC

16+EA(3 C XXUXC

10+EA

83 MOD 111 R/M 10+EA

A6

A7

2E

27

MOD 000 R/M

MOD REGR/M

MOD REGR/M

MOD REGR/M

MOD REGR/M

MOD REGR/M

MOD 111 R/M

MOD 111 R/M

17+EA

4

C XXUXC

C XXUXC

23 MOD REGR/M

9+EA(3)

80 MOD 100 R/M 17+EA

81 MOD 100 R/M 17+EA

9A

E8

MOD 010 R/M

28

11

FF MOD 011 R/M 29+EA

98

C XXUXC

C XXUXC

C XXUXC

2

4

2

4

9+EA

9+EA

9+EA

10+EA

C

X

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

X XXXXX

(9+22/rep)

22 X XXXXX

(9+22/rep)

X XXXXX

A-12 Assembly Language Manual

Table A-3. Instruction Set in Alphabetic Order of Instruction Mnemonic. (2 of 6.)

Instruction

Operand Summary Op

Cd

Memory

Organization

Clocks Flags

ODITSZAPC

DAS

DEC

DEC

JMP

JMP

AX

BP bDISP wDISP wDISP,

wSEG

EA

EA

Decimal adjust for

subtract

(AX)=(AX)-1

(BP)=(BP)-1

Direct NEAR jump

Direct NEAR jump

EA

Direct FAR jump

Indirect FAR jump

Indirect NEAR jump

2F

48

4D

EB

E9

4

2

2

7

7

7

FF MOD 101 R/M 16+EA

FF MOD 100 R/M 7+EA

U XXXXX

X XXXX

X XXXX

DEC

DEC

DEC

DEC

DEC

DEC

DEC

DIV

DS:

ES:

ESC

HLT

IDIV

IMUL

IMULT

IN

IN

IN

IN

INC

INC

INC

INC

INC

INC

INC

INC

INC

DI

DX

SP

SI bEA wEA

EA

(DI)=(DI)-1

(DX)=(DX)-1

(SP)=(SP)-1

(SI)=(SI)-1

Unsigned divide by (bEA)

Unsigned divide by (wEA)

ES segment override

Escape to external device

Halt bEA

WEA

AL,DX

Signed multiply by (bEA)

Signed multiply by (wEA)

Byte input from port

(DX) to REG AL

AL,bPort Input from bPort to AL

AX,DX Word input from port

(DX) to REG AX

AX,wPort Input from wPort to AX

AX (AX)=(AX)+1

(BP)=(BP)+1

CX

DI

(BX)=(BX)+1

(CX)=(CX)+1

(DI)=(DI)+1

(DX)=(DX)+1 wEA

SP

SI

3

(bEA)=(bEA)+1

(wEA)=(wEA)+1

(SP)=(SP)+1

(SI)=(SI)+1

4F

4A

FE

ED

E5

40

45

MOD 001 R/M

2

2

15+EA

4C

4E

2

2

F6 MOD 110 R/M 90

F7 MOD 110 R/M 155

3E

26

2

2

D8 MOD --- R/M 8+EA

F4 2

F6 MOD 111 R/M 112

F7 MOD 111 R/M 177

F6 MOD 101 R/M 30

F7 MOD 101 R/M 144

EC

E4

43

41

47

FE MOD 000 R/M

8

10

2

2

2

2

8

10

2

15+EA

FF MOD 000 R/M 15+EA

44

46

2

2

X XXXX

X XXXX

X XXXX

X XXXX

U UUUUU

U UUUUU

X UUUUX

X UUUUX

X XXXX

X XXXX

X XXXX

X XXXX

X XXXX

X XXXX

X XXXX

X XXXX

INT

INTO CE

Simple execution of the instruction takes 4 clocks and actual interrupt, 53.)

IRET

JA

JAE

JB

JBE

JC

JCXZ

JE

JG

JGE bDISP bDISP

Interrupt if overflow

Return from interrupt

Jump if above or equal

Jump if below

Jump if below or equal bDISP Jump if (CX)=0

(Same as JZ.) bDISP bDISP

Jump if greater

Jump if greater or equal

CF

77

72

76

E3

7F

7D

53 or 4 CC

24

16 or 4

16 or 4

16 or 4

18 or 6

16 or 4

16 or 4

RRRRRRRRR

JLE

JMP

JMP

JMP

Instruction Set A-13

Table A-3. Instruction Set in Alphabetic Order of Instruction Mnemonic. (3 of 6.)

Instruction

Operand Summary Op

Cd

Memory

Organization

Clocks Flags

ODITSZAPC

MOV

MOV

MOV

MOV

MOV

MOV

MOV

LODSW

LOCK

LOOP

LOOPE

LOOPNE

LOOPNZ

MOV

MOV

MOV

MOV

MOV

MOV

MOV

MOV

LOOPZ

MOV

MOV

MOV

MOV

MOV

MOV

MOV

MOV

MOV

JNB

JNBE

JNG

JNGE

JNLE

JNO

JNP

JNS

JO

JPE

JPO

JS

JZ

LAHF

LDS

LEA

(Same as JA.)

(Same as JLE.)

(Same as JL.)

(Same as JGE.)

(Same as JG.) bDISP Jump if no overflow

(Same as JPO.) bDISP bDISP bDISP bDISP bDISP bDISP

REG,EA

REG,EA

REG,EA

Jump if no sign

Jump if not zero

Jump if parity even

Jump if parity odd

Jump if sign

(AH)=(FLAGS)

DS:REG=(wEA+2):(wEA)

(REG)=effective address

Load word string bDISP

Bus lock prefix

Loop (CX) times

(Same as LOOPZ.)

(Same as LOOPNZ.) bDISP Loop (CX) times while

not zero bDISP Loop (CX) times while zero bAddr,AL (bAddr)=(AL) wAddr,AX (wAddr) = (AX)

AH,bData (AH)=bData

AL,bAddr (AL)=(bAddr)

AL,bData (AL)=bData

BH,bData (BH)=bData

BL,bData (BL)=bData

BP,wData (BP)=wData

BX,wData (BX)=wData

CH,bData (CH)=bData

CL,bData (CL)=bData

CX,wData (CX)=wData

DH,bData (DH)=bData

DI,wData (DI)=wData

DL,bData (DL)=bData

DX,wData (DX)=wData bEA,bData (bEA)=(bData) wEA,wREG (wEA)=(wREG) wEA,SR (wEA)=(SR) bREG,bEA (bREG)=(bEA)

SP,wData (SP)=wData

SR,wEA (SR)=(wEA)

71

7B

78

74

9F

79

75

70

7A

C5 MOD REGR/M

8D MOD REGR/M

C4 MOD REGR/M

AD

F0

E2

E0

E1

A2

A3

B4

A0

B0

16 or 4

16 or 4

16 or 4

16 or 4

16 or 4

16 or 4

16 or 4

16 or 4

4

16+EA

2+EA(2)

12

(9+13/rep)

12

(9+13/rep)

2

17 or 5

19 or 5

18 or 6

4

4

4

4

4

10

4

10

B5

B1

B9

B6

B7

B3

BD

BB

4

4

BF

B2

BA

4

4

C6 MOD 000 R/M 10+EA

C7 MOD 000 R/M 10+EA

9+EA(2) 89 MOD REGR/M

8C MOD 0SR R/M 9+EA(2)

8A MOD REGR/M

8B MOD REGR/M

BE

BC

8+EA(2)

8+EA(2)

4

8E MOD 0SR R/M 8+EA(2)

A-14 Assembly Language Manual

Table A-3. Instruction Set in Alphabetic Order of Instruction Mnemonic. (4 of 6.)

Instruction

Operand Summary Op

Cd

Memory

Organization

Clocks Flags

ODITSZAPC

MOVSW

OUT

OUT

POP

POP

POP

POP

POP

POP

POP

POP

POP

POP

POPF

PUSH

PUSH

PUSH

PUSH

PUSH

PUSH

PUSH

Move word string

OR

OR

OR

OR

NOP

NOT

NOT

OR

NEG bEA Byte negate bEA

(Note: Carry Flag is C if destination is 0.)

NEG wEA Negate wEA

(Note: Carry Flag is C if destination is 0.)

(Same as XCHG AX,AX) bEA Byte invert bEA

Invert wEA

OR

OR

OUT

OUT wEA

AL,bData (AL)=(AL) OR bData

AX,wData (AX)=(AX) OR wData bEA,bData (bEA)=(bEA) OR bData wEA,wData (wEA)=(wEA) OR wData bEA,REG (bEA)=(bEA) OR (bREG)

(wEA)=(wEA) OR (wREG)

REG,wEA

DX, AL

(bREG)=(bREG) OR (bEA)

(wREG)=(wREG) OR (wEA)

Byte output (AL) to

port (DX)

PUSH

PUSH

PUSH

PUSH

PUSHF

RCL

RCL

DX, AX Word output (AX) to

port (DX) bPort,AL Output (AL) to bPort wPort,AX Output (AX) to wPort

AX

BX

Pop stack to AX

Pop stack to BX

DI

DS

DX

ES

SI

SP

SS

AX

BP

BX

CS

DI

DS

DX

SI

SP

SS bEA,1 wEA,1

Pop stack to DI

Pop stack to DS

Pop stack to DX

Pop stack to EA

Pop stack to SI

Pop stack to SP

Pop stack to SS

Push (AX) onto stack

Push (BP) onto stack

Push (BX) onto stack

Push (DI) onto stack

Push (DS) onto stack

Push (DX) onto stack

Push (EA) onto stack

Push (SI) onto stack

Push (SP) onto stack

Push (SS) onto stack

Rotate bEA left thru

carry 1 bit

Rotate wEA left thru

carry 1 bit

A4

A5

18

(9+17/rep)

18

(9+17/rep)

F6 MOD 100 R/M 71

F6 MOD 011 R/M 16+EA

X UUUUX

X XXXXS

F7 MOD 011 R/M 16+EA X XXXXS

F6 MOD 010 R/M 16+EA

F7 MOD 010 R/M 16+EA

80 MOD 001 R/M 17+EA

81 MOD 001 R/M 17+EA

08

0A

0B

EE

MOD REGR/M

MOD REGR/M

MOD REGR/M

9+EA(3)

C XXUXC

C XXUXC

16+EA(3) C XXUXC

16+EA(3) C XXUXC

9+EA(3) C XXUXC

8

EF

E6

E7

58

5B

5F

1F

5A

8F MOD 000 R/M 17+EA

9D

50

55

53

07

5E

5C

17

8

8

8

8

8

8

10

8

8

8

8

8

11

11

11

RRRRRRRRR

57

1E

11

10

52 11

FF MOD 110 R/M 16+EA

06

56

54

9C

D0 MOD 010 R/M

10

11

11

10

15+EA

DI MOD 010 R/M

15+EA

X XXXXX

X X

X X

Instruction Set A-15

SBB

SBB

SBB

SBB

SBB

SBB

SBB

SBB

SBB

SBB

SCASB

SCASW

SHL

MOVSB

MOVSW

RCR

RCR

REPZ

RET

RET

RET

RET

ROL

RCR

RCR

REP

REPE

REPNE

REPNZ

ROL

ROL

ROR

ROR

ROR

ROR

SAHF

SAL

SAR

SAR

Table A-3. Instruction Set in Alphabetic Order of Instruction Mnemonic. (5 of 6.)

Instruction

Operand Summary Op

Cd

Memory

Organization

Clocks Flags

ODITSZAPC bEA,CL wEA,CL bEA,1

Move byte string

Move word string

Rotate bEA right thru carry

(CL) bits

Rotate wEA right thru carry

(CL) bits

Rotate bEA right thru carry

1 bit wEA,1 Rotate wEA right thru carry

1 bit

(Same as REPZ.)

(Same as REPZ.)

(Same as REPNZ.)

Repeat while (CX)≠0

AND (ZF)=0

Repeat while (CX)≠0 wData

AND (ZF)=1

FAR return, ADD

A4

A5

D2 MOD 011 R/M 20+EA

+4/bit

D3 MOD 011 R/M 20+EA

+4/bit

D0 MOD 011 R/M 15+EA

D1

F2

F3

CA

MOD 011 R/M

18

18

15+EA

2

2

X X

X X

X X

X X wData bEA,CL wEA,CL

NEAR return

NEAR return; (SP)=(SP)+

(wData)

Rotate bEA left

(CL) bits

Rotate wEA left

(CL) bits

Rotate bEA left 1 bit bEA,1 bEA,CL wEA,CL

Rotate bEA right

(CL) bits

Rotate wEA right

(CL) bits bEA,1 wEA,1

(FLAGS)=(AH)

(Same as SHL.) bEA,CL

Rotate bEA right 1 bit

Rotate wEA right 1 bit

CB

C3

C2

8

12

D2 MOD 000 R/M 20+EA

+4/bit

D3 MOD 000 R/M 20+EA

+4/bit

D0 MOD 000 R/M 15+EA

D1 MOD 000 R/M 15+EA

D3 MOD 001 R/M 20+EA

D0 MOD 001 R/M 15+EA

D1 MOD 001 R/M

+4/bit

+4/bit

4

X X

X X

X X

X X

X X

X X

RRRRRRRRR wEA,CL

AL,bData (AL)=(AL)-bData-CF

AL,wData (AX)=(AX)-wData-CF bEA,bData (bEA)=(bEA)-bData-CF wEA,wData (wEA)=(wEA)-wData-CF wEA,bData (wEA)=(wEA)-Ext(bData)-CF bEA,REG wEA,REG

REG,bEA

REG,wEA

Shift signed bEA right

(CL) bits

Shift signed wEA right

(CL) bits

D2

D3

MOD 111 R/M

MOD 111 R/M

20+EA

+4/bit

+4/bit

Shift signed bEA right 1 bit D0 MOD 111 R/M 15+EA

(bEA)=(bEA)-(bREG)-CF

(wEA)=(wEA)-(wREG)-CF

(wREG)=(wREG)-(wEA)-CF

Scan byte string

Scan word string

1C

1D

4

4

80 MOD 011 R/M 17+EA

82 MOD 011 R/M 17+EA

X XXUXX

X XXXXX

X XXXXX

X XXXXX

81

83

MOD 011 R/M

MOD 011 R/M

17+EA

17+EA X XXXXX

18 MOD REG R/M 16+EA(3) X XXXXX

19 MOD REG R/M 16+EA(3) X XXXXX

1B

AE

AF

MOD REG R/M 9+EA(3)

X XXUXX

X XXUXX

X XXXXX

15 X XXXXX

(9+15/rep)

X XXXXX bEA,CL Shift bEA left

(CL) bits

D2 MOD 100 R/M 20+EA

+4/bit X X

A-16 Assembly Language Manual

SHL

SHL

SHL

SHR

SHR

SHR

SHR

STC

STD

STI

STOSB

STOSW

SUB

SUB

Table A-3. Instruction Set in Alphabetic Order of Instruction Mnemonic. (6 of 6.)

Instruction

Operand Summary Op

Cd

Memory

Organization

Clocks Flags

ODITSZAPC

SUB

SUB

SUB

SUB

TEST

TEST

TEST

TEST

TEST

TEST

WAITX

XCHG

XCHG

XCHG

XCHG

XCHG

XCHG

XCHG

XLAT

XOR

XOR

XOR

XOR

XOR wEA,CL bEA,1 wEA,1 bEA,CL wEA,CL bEA,1 wEA,1

Shift wEA left

(CL) bits

Shift bEA left 1 bit

Shift wEA left 1 bit

Shift bEA right

(CL) bits

Shift wEA right

(CL) bits

Shift bEA right 1 bit

Shift wEA right 1 bit

Set direction flag

Set interrupt flag

Store byte string

Store word string

AL,bData (AL)=(AL)-bData

AX,wData (AX)=(AX)-wData wEA,wData (wEA)=(wEA)-wData wEA,bData (wEA)=(wEA)-Ext(bData)

REG,bEA (bREG)=(bREG)-(bEA)

REG,wEA (wREG)=(wREG)-(wEA)

AL,bData FLAGS=(AL) TEST (bData)

AX,bData FLAGS=(AX) TEST (wData) bEA,bData FLAGS=(bEA) TEST bData wEA,wData FLAGS=(wEA) TEST wData bEA,bREG FLAGS=(bEA) TEST (bREG) wEA,wREG FLAGS=(wEA) TEST (wREG)

AX,AX

AX,BP

AX,BX

AX,DI

AX,DX

AX,SI

AX,SP

Wait for TEST signal

NOP

Exchange (AX), (BP)

Exchange (AX), ( BX)

Exchange (AX), (DX)

Exchange (AX), (SI)

Exchange (AX), (SP) wREG,wEA Exchange wREG, wEA

TABLE Translate using (BX)

AL,bData (AL)=(AL) XOR bData wEA,wData (wEA)=(wEA) XOR, wData bEA,REG (bEA)=(bEA) XOR (bREG) wEA,REG (wEA)=(wEA) XOR (wREG)

REG,wEA (wREG)=(wREG) XOR (wEA)

D3

D0

D1

MOD 100 R/M 20+EA

+4/bit X X

MOD 100 R/M 15+EA

MOD 100 R/M 15+EA

D0 MOD 101 R/M 15+EA

D1 MOD 101 R/M 15+EA

X X

X X

D2 MOD 101 R/M 20+EA

+4/bit X X

D3 MOD 101 R/M 20+EA

+4/bit X X

X X

X X

FD

FB

AA

2

2

11

(9+10/rep)

S

C

S

AB

2C

2D

4

4

11

(9+10/rep)

X XXXXX

X XXXXX

80 MOD 101 R/M 17+EA

81 MOD 101 R/M 17+EA

83 MOD 101 R/M 17+EA

28 MOD REGR/M

X XXXXX

X XXXXX

X XXXXX

16+EA(3) X XXXXX

16+EA(3) X XXXXX

9+EA(3) X XXXXX

9+EA(3) X XXXXX

4 X XXUXC

X XXUXC

C XXUXC

C XXUXC

90

95

93

91

2A MOD REGR/M

2B MOD REGR/M

A8

A9

MOD 000 R/M

F7 MOD 000 R/M 10+EA

84 MOD REGR/M

85 MOD REGR/M

4

3

3

9+EA(3) C XXUXC

9+EA(3) C XXUXC

3+WAITX

3

97

92

96

94

86 MOD REGR/M

17+EA(4)

11

4

4

3

3

3

17+EA(4)

D7

34

35

MOD 101 R/M 17+EA

81 MOD 101 R/M 17+EA

30 MOD REGR/M

31

33

MOD REGR/M

MOD REGR/M

C XXUXC

C XXUXC

C XXUXC

16+EA(3) C XXUXC

16+EA(3) C XXUXC

9+EA(3) C XXUXC

Instruction Set A-17

Appendix B: RESERVED WORDS

BP

BX

BYTE

CALL

CBW

CH

CL

CLC

CLD

CLI

CMC

CMP

CMPS

CMPSB

CMPSW

COMMON

A

AAA

AAD

AAM

AAS

ABS

ADC

ADD

AH

AL

AND

ASSUME

AT

AX

BH

BL

CS

CWD

CX

DAA

DAS

DB

DD

DEC

DH

DI

DIV

DL

DS

DUP

DW

DWORD

DX

EJECT

END

ENDP

HLT

IDIV

IMUL

IN

INC

INCLUDE

INT

INTO

IRET

JA

JAE

JB

JBCZ

JBE

JC

JE

ENDS

EQ

EQU

ES

ESC

EVEN

EXTRN

FAC

FALC

FAR

GE

GEN

GENONLY

GROUP

GT

HIGH

JGE

JL

JLE

JMP

JNA

JNAE

JNB

JNBE

JNC

JNE

JNG

JNGE

JNLE

JNO

JNP

JNS

JNZ

JO

JP

JPE

SAR

SAVE

SBB

SCAS

SCASB

SCASW

SEG

SEGMENT

SHL

SHORT

SHR

SI

SIZE

SP

SS

STACK

PTR

PUBLIC

PURGE

PUSH

PUSHF

RCL

RCR

RECORD

REPE

REPNE

REPNZ

REPZ

RESTORE

RET

ROR

SAL

STC

STD

STI

STOS

STOSB

STOSW

SUB

TEST

THIS

TITLE

TYPE

WAIT

WIDTH

WORD

XCHG

XLAT

XLATB

XOR

?

??SEG

LOOPE

LOOPNZ

LOOPZ

LOW

LT

MASK

MEMORY

MOD

MOV

MOVS

MOVSB

MOVSW

MUL

NAME

NE

NEAR

JPO

JS

JZ

LABEL

LAHF

LDS

LE

LEA

LENGTH

LES

LIST

LOCK

LODS

LODSB

LODSW

LOOP

NEG

NIL

NOGEN

NOLIST

NOPAGING

NOT

NOTHING

NOXREF

OFFSET

OR

ORG

OUT

PAGE

PAGELENGTH

PAGEWIDTH

PAGING

PARA

POP

POPF

PROC

Reserved Words B-1

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