User Guide - NXP Semiconductors
 TWR‐K53N512 Tower Module User's Manual Rev. 0 Freescale Semiconductor Inc. TWRK53N512UM Table of Contents 1 TWR­K53N512 and TWR­K53N512­KIT Overview ..................................................................... 4 1.1 Contents .................................................................................................................................................................................. 5 1.2 Features .................................................................................................................................................................................. 5 1.3 Getting Started ..................................................................................................................................................................... 6 1.4 Reference Documents ....................................................................................................................................................... 7 2 Hardware Description ........................................................................................................................... 7 2.1 K53N512 Microcontroller ............................................................................................................................................... 8 2.2 Clocking .................................................................................................................................................................................. 8 2.3 System Power ....................................................................................................................................................................... 9 2.3.1 RTC VBAT ........................................................................................................................................................................................... 10 2.3.2 Measuring Current in Low Power Modes ............................................................................................................................. 10 2.4 Debug Interface ................................................................................................................................................................ 10 2.4.1 OSJTAG ................................................................................................................................................................................................. 10 2.4.2 Cortex Debug+ETM Connector .................................................................................................................................................. 10 2.5 Infrared Port ...................................................................................................................................................................... 11 2.6 Accelerometer ................................................................................................................................................................... 12 2.7 Potentiometer, Pushbuttons, LEDs........................................................................................................................... 12 2.8 General Purpose Tower Plug‐in (TWRPI) Socket ............................................................................................... 12 2.9 Touch Interface ................................................................................................................................................................. 13 2.10 Segment LCD ................................................................................................................................................................... 14 2.11 Ethernet ............................................................................................................................................................................ 14 2.12 USB ...................................................................................................................................................................................... 14 2.13 Secure Digital Card Slot .............................................................................................................................................. 15 2.14 External Bus Interface – FlexBus ............................................................................................................................ 15 2.15 Medical Connector ........................................................................................................................................................ 15 3 Jumper Table .......................................................................................................................................... 16 4 Input/Output Connectors and Pin Usage Table ......................................................................... 18 5 Tower Elevator Connections ............................................................................................................ 20 TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 2 of 22 List of Figures Figure 1. Freescale Tower System Overview .............................................................................................. 4 Figure 2. Callouts on front side of the TWR‐K53N512 ................................................................................ 5 Figure 3. Front side of TWR‐K53N512 with TWRPI‐SLCD attached ............................................................ 6 Figure 4. Callouts on back side of the TWR‐K53N512 ................................................................................ 6 Figure 5. TWR‐K53N512 Block Diagram ...................................................................................................... 7 Figure 6. Infrared Port Implementation ................................................................................................... 11 List of Tables Table 1. Cortex Debug+ETM Connector Pinout ........................................................................................ 10 Table 2. General Purpose TWRPI socket pinout ....................................................................................... 12 Table 3. Touch TWRPI socket pinout ........................................................................................................ 13 Table 4. Ethernet operation jumper settings ........................................................................................... 14 Table 5. Medical Connector 2x10 Pin Header Connections ..................................................................... 16 Table 6. TWR‐K53N512 Jumper Table ...................................................................................................... 16 Table 7. I/O Connectors and Pin Usage Table ........................................................................................... 19 Table 8. TWR‐K53N512 Primary Connector Pinout .................................................................................. 20 Revision History Revision 1.0 TWRK53N512UM Date Aug 9, 2011 Changes Initial Release for SCH‐26994 REV C TWR‐K53N512 Tower Module User's Manual Page 3 of 22 1 TWR­K53N512 and TWR­K53N512­KIT Overview The TWR‐K53N512 is a Tower Controller Module compatible with the Freescale Tower System. It can function as a stand‐alone, low‐cost platform for the evaluation of the Kinetis K10, K20 and K53 family of microcontroller (MCU) devices. The TWR‐K53N512 features the Kinetis K53 low‐power microcontroller based on the ARM® Cortex™‐M4 architecture with USB 2.0 full‐speed OTG controller and 10/100 Mbps Ethernet MAC. The TWR‐K53N512 is available as a stand‐alone product or as a kit (TWR‐K53N512‐KIT) with the Tower Elevator Modules (TWR‐ELEV) and the Tower Serial Module (TWR‐SER). The TWR‐K53N512 can also be combined with other Freescale Tower peripheral modules to create development platforms for a wide variety of applications. 0 provides an overview of the Freescale Tower System. Secondary Elevator Controller Module • Additional and • Tower MCU Board secondary serial and expansion bus signals • Works stand‐alone or in Tower System • Standardized signal assignments • Features integrated debugging interface • Mounting holes and for easy programming expansion connectors and run‐control via for side‐mounting standard USB cable peripheral boards
Primary Elevator Peripheral Module • Common serial and expansion bus signals • Two 2x80 connectors on backside for easy signal access and side‐
mounting board(LCD module) • Power regulation circuitry • Standardized signal • Mounting holes • TWR‐SER board Board Connectors • Four card‐edge connectors Size • Tower is approx 3.5”H x 3.5” W x 3.5” D when fully assembled • Uses PCI express ®
connectors(x16, 90mm/3.5” long, 164 pins) Figure 1. Freescale Tower System Overview TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 4 of 22 1.1 Contents The TWR‐K53N512 contents include: • TWR‐K53N512 board assembly • 3ft USB cable • Interactive DVD with software installers and documentation • Quick Start Guide The TWR‐K53N512‐KIT contains: • TWR‐K53N512 MCU module • TWR‐ELEV – Primary and Secondary Elevator Modules • TWR‐SER – Serial module including USB host/device/OTG, Ethernet, CAN, RS232 and RS485 1.2 Features Figure 2 and Figure 4 show the TWR‐K53N512 with some of the key features called out. The following list summarizes the features of the TWR‐K53N512 Tower MCU Module: • PK53N512CMD100: K53N512 in a 144 MAPBGA with maximum 100MHz operation • Touch Tower Plug‐in Socket • Medical Connector for MCU OPAMP, TRIAMP, DAC, ADC signals • General purpose Tower Plug‐in (TWRPI) socket • On‐board JTAG debug circuit (OSJTAG) with virtual serial port • Three‐axis accelerometer (MMA7660) • Two (2) user‐controllable LEDs • Two (2) capacitive touch pads • Two (2) user pushbutton switches • Potentiometer • Battery Holder for 20mm lithium battery (e.g. 2032, 2025) SW1
• SD Card slot Primary Connector SW2
Infra‐red Touch TWRPI circuit Socket
General Purpose LED/Touch Buttons Tower Plug‐In E1‐E2
(TWRPI) Socket MCU analogue SW3(Reset) signals or medical module Power/OSJTAG connector
Mini‐B USB Connector PK53N512CMD100 Microcontroller
Secondary Connector MMA7660 Figure 2. Callouts on front side of the TWR‐K53N512 Accelerometer
TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 5 of 22 Figure 3. Front side of TWR‐K53N512 with TWRPI‐SLCD attached Potentiometer SD Card Socket
VBAT (RTC) Battery Holder
Figure 4. Callouts on back side of the TWR‐K53N512 1.3 Getting Started Follow the Quick Start Guide found printed in the TWR‐K53N512 box or the interactive DVD for the list of recommended steps for getting started. There are also lab walk‐through guides available on the tool support page for the TWR‐K53N512: http://www.freescale.com/TWR‐K53N512. TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 6 of 22 1.4 Reference Documents The documents listed below should be referenced for more information on the Kinetis family, Tower System, and MCU Modules. These can be found in the documentation and downloads section of freescale.com/TWR‐K53N512 or freescale.com/kinetis. • TWR‐K53N512‐QSG: Quick Start Guide • TWR‐K53N512‐SCH: Schematics • TWR‐K53N512‐PWA: Design Package • TWRPI‐SLCD‐SCH: Schematics • TWRPI‐SLCD‐PWA: Design Package • K53 Family Product Brief • K53 Family Reference Manual • Kinetis Quick Reference User Guide (QRUG) • Tower Configuration Tool 2 Hardware Description The TWR‐K53N512 is a Tower Controller Module featuring the PK53N512CMD100—an ARM Cortex‐M4 based microcontroller with segment LCD and USB 2.0 full‐speed OTG controllers in a 144 MAPBGA package with a maximum core operating frequency of 100MHz. It is intended for use in the Freescale Tower System but can operate stand‐alone. An on‐board debug circuit, OSJTAG, provides a JTAG debug interface and a power supply input through a single USB mini‐AB connector. Figure 5 shows a block diagram of the TWR‐K53N512. The following sections describe the hardware in more detail. Tower Elevator Expansion Connectors
SDHC, I 2S, SPI, I2C, ADC, USB, DAC, PWM, UARTs, Flexbus , Ethernet
5.0V
50 MHz OSC
32.768 KHz XTAL
IR Output
Comparator
5.0V
OSJTAG
JTAG, Power, SCI
Infrared Port
JTAG
SCI
K53N512
144 MAPBGA
Battery
VBAT (RTC)
Holder
2
OPAMP, TRIAMP, DAC, ADC, I C, FTM
GPIO / Interrupts
ADC
LED
Reset / Inputs
TSI, GPIO
Capacitive
Touch
Pads
2
I C
SPI, I2C, ADC, GPIO
LED
SDHC
USB
Mini-B
3.3V
General Purpose
Tower Plug -in
(TWRPI)
Medical
Connector
Freescale Device
External Connectors
MMA7660
Touch & Segment LCD
Tower Plug -in (TWRPI)
SD Card Slot
Interface Circuits
Power
Figure 5. TWR‐K53N512 Block Diagram TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 7 of 22 2.1 K53N512 Microcontroller The TWR‐K53N512 module features the PK53N512CMD100. The K53 microcontrollers are part of the K50 family from the Freescale’s Kinetis portfolio built around an ARM Cortex‐M4 core. Refer to the K50 Family Product Brief and the K53 Family Reference Manual for comprehensive information on the PK53N512CMD100 device. The key features are listed here: • 32‐bit ARM Cortex‐M4 core with DSP instructions • 100MHz maximum core operating frequency • 144 MAPBGA, 13mm x 13mm, 1.0mm pitch package • 1.71V – 3.6V operating voltage input range • 128 Kbytes of static RAM (SRAM) • 512 Kbytes of program only flash. • K50 family also has devices that contain both program flash and FlexNVM. FlexNVM is non‐
volatile flash memory that can be used as program flash, data flash, backup EEPROM of variable endurance and size). Devices that have FlexNVM also have 4 Kbytes of FlexRAM (RAM memory that can be used as traditional RAM, as high‐endurance EEPROM storage, or flash programming acceleration RAM) • External bus interface • Power management controller with 10 different power modes • Multi‐purpose clock generator with PLL and FLL operation modes • Two (2) 16‐bit SAR ADCs with extended internal and external input channels • Two (2) 12‐bit DACs. Each DAC has watermark interrupts and 16 word buffers. • Three(3) High‐speed analog comparator with 6‐bit DAC • Two (2) OPAMPs and two (2) TRIAMPs. Both OPAMP and TRIAMP can be used as general purpose operational amplifiers. OPAMP has extra features where it can be programmed as a buffer, inverting and non‐inverting amplifier with various gains without external circuit • Programmable voltage reference • USB full‐speed/low‐speed OTG/Host/Device controller with device charge detect • 10/100 Mbps Ethernet MAC • SPI, I2C (w/ SMBUS support), UART (w/ ISO7816 and IrDA), I2S • SD Host Controller (SDHC) • GPIO with pin interrupt support, DMA request capability, digital glitch filtering • Capacitive touch sensing inputs (TSI) • Debug interfaces: JTAG, cJTAG, SWD • Trace: TPIO, FPB, DWT, ITM, ETM, ETB 2.2 Clocking The Kinetis MCUs start up from an internal digitally controlled oscillator (DCO). Software can enable one or two external oscillators if desired. The external oscillator for the Multipurpose Clock Generator (MCG) module can range from 32.768 KHz up to a 32 MHz crystal or ceramic resonator. The external oscillator for the Real Time Clock (RTC) module accepts a 32.768 kHz crystal. The EXTAL pin of the main external oscillator can also be driven directly from an external clock source. The TWR‐K53N512 features a 50 MHz on‐board clock oscillator as seen in sheet 3 of the schematics. However, when the K53 Ethernet MAC is operating in RMII mode, synchronization of the MCU input clock and the 50 MHz RMII transfer clock is important. In this mode, the MCU input clock must be kept TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 8 of 22 in phase with the 50 MHz clock supplied to the external PHY. Therefore, the TWR‐K53N512 provides the option (see description for J11 in Table 6) to select the clock input to the MCU from 1) the on‐
board 50MHz source or 2) an external clock from the CLKIN0 pin on the Primary Connector. When the K53 is operating in Ethernet RMII mode, the Tower peripheral module implementing the RMII PHY device should drive a 50 MHz clock on the CLKIN0 signal that is kept in phase with the clock supplied to the RMII PHY. Refer to section 2.101 “Segment LCD The segment LCD signals on the K53 devices are multiplexed with many other interface signals including several TSI signals that are accessible on the Touch TWRPI socket. Therefore, the Touch TWRPI socket on the TWR‐K53N512 may also be used to evaluate the segment LCD controller of the K53 device. The TWRPI‐SLCD daughter card included with the TWR‐K53N512 plugs into the Touch TWRPI socket and provides a 28‐segment LCD that can be driven directly by the K53 MCU. Refer to Table 6 “I/O Connectors and Pin Usage Table” for the segment LCD signals connection details. Additionally, many more segment LCD signals are routed to the Secondary Connector on the TWR‐
K53N512 and can be accessed from another Tower module or on the expansion connectors of the Secondary Elevator. These connections are currently disconnected, if you choose to do so please solder the zero ohms resistors for the signals. Please refer to sheet 7 of schematics for detail. Ethernet” for more information. 2.3 System Power In stand‐alone operation, the main power source for the TWR‐K53N512 module is derived from the 5.0V input from either the USB mini‐B connector, J27, or the debug header, J23, when a shunt is placed on jumper J12. A low‐dropout regulator provides a 3.3V supply from the 5.0V input voltage. Refer to sheet 5 of the TWR‐K53N512 schematics for more details. When installed into a Tower System, the TWR‐K53N512 can be powered from either an on‐board source or from another source in the assembled Tower System. If both the on‐board and off‐board sources are available, the TWR‐K53N512 will default to the off‐board source. The 3.3V power supplied to the MCU is routed through a jumper, J15. The jumper shunt can be removed to allow for either 1) alternate MCU supply voltages to be injected or 2) the measurement of power consumed by the MCU. The board system power (SYS_PWR) can be supplied from either the on board 3.3V regulator or from an external source via header J22. Header J22 pin 2 is used to connect the external supply voltage and J22 pin 1 is used to connect to the ground of the external supply source. When J24 pin 1‐2 is shunt, board SYS_PWR is powered from on‐board 3.3V regulator When J24 pin 2‐3 is shunt, Board SYS_PWR is powered from off‐board supply from J22 pin 2. The schematic net name for the external power source is called P1V8. This doesn’t mean it will output fixed at 1.8V because the supplied voltage depends on the external source. This board is only tested with 3.3V. Care should be taken not to connect to a voltage that is out of the components specification. TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 9 of 22 2.3.1 RTC VBAT The Real Time Clock (RTC) module on the K53 has two modes of operation, system power‐up and system power‐down. During system power‐down, the RTC is powered from the backup power supply, VBAT. The TWR‐K53N512 provides a battery holder for a coin cell battery that can be used as the VBAT supply. The holder can accept common 20mm diameter 3V lithium coin cell batteries (e.g. 2032, 2025). Refer to the description J12 in Table 6 “TWR‐K53N512 Jumper Table” for more information. 2.3.2 Measuring Current in Low Power Modes When measuring MCU low power modes current, please select external clock source with J11 pin 2‐3 installed with Jumper. TWR‐K53N512 will need to be assembled as tower system. 2.4 Debug Interface There are two debug interface options provided: the on‐board OSJTAG circuit and an external Cortex Debug+ETM connector. 2.4.1 OSJTAG An on‐board MC9S08JM60 based Open Source JTAG (OSJTAG) circuit provides a JTAG debug interface to the K53N512. A standard USB A male to Mini‐B male cable (provided) can be used for debugging via the USB connector, J27. The OSJTAG interface also provides a USB to serial bridge. Drivers for the OSJTAG interface are provided in the P&E Micro Kinetis Tower Toolkit (available on the included DVD). Note: PTD7 connected to the OSJTAG USB‐to‐serial bridge is also connected to the infrared interface (IRDA). Refer to Table 7 “I/O Connectors and Pin Usage Table” and Table 6 “TWR‐K53N512 Jumper Table” for more information. 2.4.2 Cortex Debug+ETM Connector The Cortex Debug+ETM connector is a 20‐pin (0.05") connector providing access to the SWD, SWV, JTAG, cJTAG, EzPort and ETM trace (4‐bit) signals available on the K53 device. The pinout and K53 pin connections to the debug connector, J23, is shown in Table 1. Table 1. Cortex Debug+ETM Connector Pinout Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 Function VTref TMS / SWDIO GND TCK / SWCLK GND TDO / SWO Key TDI GNDDetect nRESET Target Power TRACECLK Target Power TWRK53N512UM TWR‐K53N512 Connection 3.3V MCU supply (P3V3_MCU) TSI0_CH4/PTA3/UART0_RTS/FTM0_CH0/JTAG_TMS/SWD_DIO GND TSI0_CH1/PTA0/UART0_CTS/FTM0_CH5/JTAG_TCLK/SWD_CLK/EZP_CLK GND TSI0_CH3/PTA2/UART0_TX/FTM0_CH7/JTAG_TDO/TRACE_SWO/EZP_DO ― TSI0_CH2/PTA1/UART0_RX/FTM0_CH6/JTAG_TDI/EZP_DI TSI0_CH5/PTA4/FTM0_CH1/NMI/EZP_CS RESET_b 5V supply (via J16) PTA6/FTM0_CH3/FB_CLKOUT/TRACE_CLKOUT 5V supply (via J16) TWR‐K53N512 Tower Module User's Manual Page 10 of 22 Pin 14 15 16 17 18 19 20 Function TRACEDATA[0] GND TRACEDATA[1] GND TRACEDATA[2] GND TRACEDATA[3] TWR‐K53N512 Connection PTA10/FTM2_CH0/MII0_RXD2/FB_AD15/FTM2_QD_PHA/TRACE_D0 GND PTA9/FTM1_CH1/MII0_RXD3/FB_AD16/FTM1_QD_PHB/TRACE_D1 GND ADC0_SE11/PTA8/FTM1_CH0/FB_AD17/FTM1_QD_PHA/TRACE_D2 GND ADC0_SE10/PTA7/FTM0_CH4/FB_AD18/TRACE_D3 Note: Many of the trace signals connected to the debug connector are also connected elsewhere on the TWR‐K53N512. Refer to Table 7 “I/O Connectors and Pin Usage Table” and Table 8 “TWR‐K53N512 Primary Connector Pinout” for more information. 2.5 Infrared Port An infrared transmit and receive interface is implemented as shown in Figure 6 below. The CMT_IRO pin directly drives an infrared diode. The receiver uses an infrared phototransistor connected to an on‐
chip analog comparator. Internal to the K53 device, the output of the analog comparator can be routed to a UART module for easier processing of the incoming data stream. Incoming signal can be filtered by a low‐pass filter (0.1uF) when a jumper is installed on J14. Make sure your transmission rate is not too fast otherwise signal may be filtered. If this is the case, just remove the jumper from J14. Figure 6. Infrared Port Implementation TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 11 of 22 2.6 Accelerometer An MMA7660 digital accelerometer is connected to the K53 MCU through an I2C interface and a GPIO/IRQ signal. Refer to Table 7 “I/O Connectors and Pin Usage Table” for connection details. 2.7 Potentiometer, Pushbuttons, LEDs The TWR‐K53N512 features two pushbutton switches connected to GPIO/interrupt signals, one pushbutton connected to the master reset signal, two capacitive touch pad electrodes, two user‐
controllable LEDs, and a potentiometer connected to an ADC input signal. Refer to Table 7 “I/O Connectors and Pin Usage Table” for information about which port pins are connected to these features. When Potentiometer is not monitored by MCU, J1 jumper can be removed to allow the MCU ADC1_DM1 pin for other signal reading. Note that ADC1_DM1 also reads MEDICAL CONNECTOR signal. So you must remove J1 jumper to avoid conflict when a module is connecte
d to the medical connector. Figure 7. Potentiometer 2.8 General Purpose Tower Plug­in (TWRPI) Socket The TWR‐K53N512 features a socket that can accept a variety of different Tower Plug‐in modules featuring sensors, RF transceivers, and more. The General Purpose TWRPI socket provides access to I2C, SPI, IRQs, GPIOs, timers, analog conversion signals, TWRPI ID signals, reset, and voltage supplies. The pinout for the TWRPI Socket is defined in Table 2. Refer to Table 7 “I/O Connectors and Pin Usage Table” for the specific K53 pin connections to the General Purpose TWRPI socket. Table 2. General Purpose TWRPI socket pinout Left‐side 2x10 Connector Pin Description 1 5V VCC 2 3.3 V VCC 3 GND TWRK53N512UM Right‐side 2x10 Connector Pin Description 1 GND 2 GND 3 I2C: SCL TWR‐K53N512 Tower Module User's Manual Page 12 of 22 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 3.3V VDDA VSS (Analog GND) VSS (Analog GND) VSS (Analog GND) ADC: Analog 0 ADC: Analog 1 VSS (Analog GND) VSS (Analog GND) ADC: Analog 2 VSS (Analog GND) VSS (Analog GND) GND GND ADC: TWRPI ID 0 ADC: TWRPI ID 1 GND Reset 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 I2C: SDA GND GND GND GND SPI: MISO SPI: MOSI SPI: SS SPI: CLK GND GND GPIO: GPIO0/IRQ GPIO: GPIO1/IRQ GPIO: GPIO2 GPIO: GPIO3 GPIO: GPIO4/Timer ‐ 2.9 Touch Interface The touch sensing input (TSI) module of the Kinetis MCUs provides capacitive touch sensing detection with high sensitivity and enhanced robustness. Each TSI pin implements the capacitive measurement of an electrode. The TWR‐K53N512 provides two methods for evaluating the TSI module. There are two individual electrodes on TWR‐K53N512 that simulate pushbuttons. Additionally, twelve TSI signals are connected to a Touch Tower Plug‐in (TWRPI) socket that can accept Touch TWRPI daughter cards that may feature keypads, rotary dials, sliders, etc. The pinout for the Touch TWRPI socket is defined in Table 3. Refer to Table 7 “I/O Connectors and Pin Usage Table” for the specific K53 pin connections to the Touch TWRPI socket. Table 3. Touch TWRPI socket pinout Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 TWRK53N512UM Description 5V VCC 3.3 V VCC Electrode 0 3.3V VDDA Electrode 1 VSS (Analog GND) Electrode 2 Electrode 3 Electrode 4 Electrode 5 Electrode 6 Electrode 7 Electrode 8 Electrode 9 Electrode 10 TWR‐K53N512 Tower Module User's Manual Page 13 of 22 Pin 16 17 18 19 20 Description Electrode 11 ADC: TWRPI ID 0 ADC: TWRPI ID 1 GND Reset 2.10 Segment LCD The segment LCD signals on the K53 devices are multiplexed with many other interface signals including several TSI signals that are accessible on the Touch TWRPI socket. Therefore, the Touch TWRPI socket on the TWR‐K53N512 may also be used to evaluate the segment LCD controller of the K53 device. The TWRPI‐SLCD daughter card included with the TWR‐K53N512 plugs into the Touch TWRPI socket and provides a 28‐segment LCD that can be driven directly by the K53 MCU. Refer to Table 6 “I/O Connectors and Pin Usage Table” for the segment LCD signals connection details. Additionally, many more segment LCD signals are routed to the Secondary Connector on the TWR‐
K53N512 and can be accessed from another Tower module or on the expansion connectors of the Secondary Elevator. These connections are currently disconnected, if you choose to do so please solder the zero ohms resistors for the signals. Please refer to sheet 7 of schematics for detail. 2.11 Ethernet The K53N512 features a 10/100 Mbps Ethernet MAC with MII and RMII interfaces. The TWR‐K53N512 routes the RMII interface signals from the K53 MCU to the Primary Connector, allowing the connection to an external Ethernet PHY device on a Tower peripheral module. When the K53 Ethernet MAC is operating in RMII mode, synchronization of the MCU clock and the 50 MHz RMII transfer clock is important. The MCU input clock must be kept in phase with the 50 MHz clock supplied to the external PHY. Therefore, the TWR‐K53N512 provides the option (see description for J11 in Table 6) to clock the MCU from an external clock from the CLKIN0 pin on the Primary Connector. The Tower peripheral module implementing the RMII PHY device should drive a 50 MHz clock on the CLKIN0 pin that is kept in phase with the clock supplied to the RMII PHY. The TWR‐SER module that comes as part of the TWR‐K53N512‐KIT provides a 10/100 Ethernet PHY that can operate in either MII or RMII mode. By default the PHY is boot strapped to operate in MII mode; therefore jumper configuration changes may be required. Table 4 shows the settings for proper interoperability between the Ethernet interface on the TWR‐SER and the TWR‐K53N512. Table 4. Ethernet operation jumper settings Tower Module TWR‐K53N512 TWR‐SER TWR‐SER TWR‐SER Jumper J11 J2 J3 J12 Setting 2‐3 3‐4 2‐3 9‐10 2.12 USB The K53N512 features a USB full‐speed/low‐speed OTG/Host/Device controller with built‐in transceiver. The TWR‐K53N512 routes the USB D+ and D‐ signals from the K53 MCU to the Primary TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 14 of 22 Connector, allowing the connection to external USB connectors or additional circuitry on a Tower peripheral module. The TWR‐SER module included as part of the TWR‐K53N512‐KIT provides a USB OTG/Host/Device interface with a mini‐AB USB connector. There are many configuration options that can be selected to evaluate different USB modes of operation. By default, the TWR‐SER is configured for USB Device operation. For more information on the configuration options, please refer to the User Manual for TWR‐SER included with the TWR‐SER kit or search for “User Manual for TWR‐SER” from www.freescale.com 2.13 Secure Digital Card Slot A Secure Digital (SD) card slot is available on the TWR‐K53N512 connected to the SD Host Controller (SDHC) signals of the K53 MCU. This slot will accept SD memory cards as well as Secure Digital Input Output (SDIO) cards. Refer to Table 7 “I/O Connectors and Pin Usage Table” or schematic for the SDHC signal connection details. 2.14 External Bus Interface – FlexBus The K53 device features a multi‐function external bus interface called the FlexBus interface controller capable of interfacing to slave‐only devices. The FlexBus interface is not used directly on the TWR‐
K53N512. Instead, a subset of the FlexBus is connected to the Primary Connector so that the external bus can access devices on Tower peripheral modules. The Primary Connector supports up to 20 address lines, 8 data lines, 2 chip‐selects, read/write, and output enable signals. The SDHC signals of the K53 are multiplexed over the upper FlexBus address signals (FB_AD[27:24]), so a multiplexed mode of operation is used on the TWR‐K53N512. An address latch is provided to de‐multiplex the address and data signals prior to connecting them to the Primary Connector. Refer to sheet 8 of the TWR‐K53N512 schematics for more details. Note: The K53 Flexbus implementation provides an option for byte lane alignment. On the TWR‐
K53N512, FB_AD[7:0] are used for the data byte. Therefore, for proper operation software must set the CSCRx[BLS] bit to shift the data bus to the right byte lane. Refer to the FlexBus chapter in the K53 Family Reference Manual for more information. 2.15 Medical Connector The TWR‐K53N512 features a 2x10 expansion connector J19 called the MEDICAL CONNECTOR in the schematic (also see Table 5 below). This connector bridges the K53 MCU analog signals to external Freescale tower medical modules such as MED‐EKG (Search MED‐EKG from Freescale.com for detail) The analog modules routed from K53N512 MCU to this connector are ADC0, ADC1 OPAMP0, OPAMP1, TRIAMP0, TRIAMP1, and DAC0. K53N512 MCU GPIO PTC14 is used to turn on or off the power supply to the medical connector module. J19 Pin 4 can be selected via J4 to use either I2C1_SCL signal or FTM2_CH1. FTM2_CH (Flex Timer) should be selected for the Pulse Oximeter module. See Table 8 “TWR‐K53N512 Primary Connector Pinout” for more information. When the DSC MC56F8006 from the MED‐EKG is enabled, K53N512 can choose to read the conditioned EKG results output from the DSC via I2C transmission (pin 3 and pin 4 via the medical connector). To enable TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 15 of 22 I2C communication, you must assemble the MEG‐EKG as a Tower System (not just with the TWR‐K53N512 stand alone). This is because the TWR‐SER has the pulled up resistors circuit required for I2C transmission. Table 5 highlights the functions that are used to implement the MED‐EKG demonstration. For detail about the MED‐EKG, please refer to the MED‐EKG user manual, MED‐EKG lab and schematic from Freescale.com/tower Table 5. Medical Connector 2x10 Pin Header Connections Tower Module Power (3.3V) (digitally turned ON/OFF by PTC14 GPIO) I2C1_SDA ADC0_DP0 ADC1_DP0 OP0_OUT OP0_DM0 OP0_DP0 TRI0_DP TRI0_DM TRI0_OUT Jumper Setting 1 2 Ground(GND) 3 5 7 9 11 13 15 17 19 4 I2C1_SCL/FTM2_CH1 6 ADC0_DM0 8 DAC0_OUT 10
OP1_OUT 12 OP1_DM0 14 OP1_DP0 16 TRI1_DP 18 TRI1_DM 20 TRI1_OUT 3 Jumper Table There are several jumpers on the TWR‐K53N512 that provide configuration selection and signal isolation. Refer to the following table for details. The default installed jumper settings are shown in bold with asterisks. Table 6. TWR‐K53N512 Jumper Table Jumper J1 J3 J4 J5 Option ADC1_DM1 Input Selection FlexBus Address Latch Selection Medical Connector J19 Pin4 Selection IR Transmitter Connection J6 FlexBus or SSIO Selection J7 Ethernet/TOUCH PAD TWRPI Selection J11 Clock Input Source Selection J12 SD Card/TOUCH PAD TWRPI Selection TWRK53N512UM Setting *ON* OFF *2‐3* 1‐2 *1‐2* 2‐3 Description ADC1_DM1 reads POTENTIOMETER ADC1_DM1 reads MEDICAL CONNECTOR Enable FlexBus address latch Disable FlexBus address latch Select I2C1_SCL connection to MEDICAL CONNECTOR Select FTM2_CH1 connection to MEDICAL CONNECTOR *OFF* Disconnect PTD7/CMT_IRO from IR transmitter circuit (IRDA) ON *ON* OFF ON OFF *1‐2* Connect PTD7/CMT_IRO to IR transmitter circuit (IRDA) Use PTE7 for Flex bus Use PTE7 for SSIO Use PTB0 for Ethernet Use PTB0 for TOUCH PAD TWRPI Connect main EXTAL to on‐board 50 MHz clock Connect EXTAL to the CLKIN0 signal on the elevator connector Use PTE2 for SD card reader (SD/MMC SKT) Use PTE2 for TOUCH PAD TWRPI 2‐3 *OFF* ON TWR‐K53N512 Tower Module User's Manual Page 16 of 22 J14 IR Transmitter Filter Selection J15 MCU Power Connection J16 VBAT Power Connection J17 On‐Board 50 MHz Power Connection *OFF* ON *ON* OFF *1‐2* J18 J20 2‐3 *ON* OFF *ON* VREGIN Power Connection OFF *OFF* SD Card/GENERAL PURPOSE TWRPI Selection ON TWRK53N512UM IR input to CMP0_IN0 is not low‐pass filtered by a 0.1 uF cap IR input to CMP0_IN0 is low‐pass filtered by a 0.1 uF cap Connect on‐board 3.3V supply to MCU Isolate MCU from power (connect an ammeter to measure current) Connect VBAT to on‐board 3.3V supply Connect VBAT to the higher voltage between on‐board 3.3V supply or coin‐cell supply Connect on‐board 3.3V supply to on‐board 50 MHz OSC Disconnect on‐board 3.3V supply to on‐board 50 MHz OSC Connect USB0_VBUS from Elevator to VREGIN Disconnect USB0_VBUS from Elevator to VREGIN Use PTE1 for SD card reader (SD/MMC SKT) Use PTE1 for GENERAL PURPOSE TWRPI TWR‐K53N512 Tower Module User's Manual Page 17 of 22 Jumper J21 Option Accelerometer Power Connection J22 Off‐Board Power input J24 Off or On Board Power Input Selection J25 JTAG Board Power Connection J26 SD Card/GENERAL PURPOSE TWRPI Selection J28 OSJTAG Bootloader Selection J29 Ethernet/TOUCH PAD TWRPI Selection J32 TOUCH PAD/SLCD TWRPI Selection J33 TOUCH PAD/SLCD TWRPI Selection J34 On‐Board 50 MHz Enable Source Setting Description *ON* Connect accelerometer to on‐board 3.3V supply OFF Disconnect accelerometer from on‐board 3.3V supply J22 pin 1 can be connected to an off‐board external power Always source. This board is only tested with 3.3V. Care should be OFF taken not to connect to a voltage that is out of the components specification Always J22 pin 2 can be connected to the ground of the off‐board OFF external power source *1‐2* Board SYS_PWR is powered from on‐board 3.3V regulator Board SYS_PWR is powered from off‐board supply from J22 2‐3 pin 2 *OFF* Disconnect on‐board 5V supply to JTAG port Connect on‐board 5V supply to JTAG port (supports ON powering board from JTAG pod supporting 5V supply output) *OFF* Use PTE0 for SD card reader (SD/MMC SKT) ON Use PTE0 for GENERAL PURPOSE TWRPI *OFF* Debugger mode OSJTAG bootloader mode (OSJTAG firmware ON reprogramming) *ON* Use PTB1 for Ethernet OFF Use PTB1 for TOUCH PAD TWRPI *1‐2* PTB10_LCD_P10 pin is connected to J8 pin 3 for SLCD TWRPI PTB0_TSI0_CH0 pin is connected to J8 pin 3 for TOUCH PAD 2‐3 TWRPI. Make sure J29 and J7 are off to avoid conflict with Ethernet *1‐2* PTB11_LCD_P11 pin is connected to J8 pin 5 for SLCD TWRPI PTB1_TSI0_CH6 pin is connected to J8 pin 5 for TOUCH PAD 2‐3 TWRPI. Make sure J29 and J7 are off to avoid conflict with Ethernet On‐board 50 MHz osc is enabled if J17 jumper is on. No need *OFF* to have any jumper on J34 1‐2 On‐board 50 MHz osc is enabled if J17 jumper is on On‐board 50 MHz osc enable by GPIO PTA19 allowing MCU 2‐3 to turn off clock for lower power consumption 4 Input/Output Connectors and Pin Usage Table The following table provides details on which K53N512 pins are using to communicate with the LEDs, switches, and other I/O interfaces onboard the TWR‐K53N512. Note: Some port pins are used in multiple interfaces on‐board and many are potentially connected to off‐board resources via the Primary and Secondary Connectors. Take care to avoid attempted simultaneous usage of mutually exclusive features. TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 18 of 22 Table 7. I/O Connectors and Pin Usage Table Feature Connection OSJTAG USB‐to‐serial OSJTAG Bridge RX Data Bridge OSJTAG Bridge TX Data SD Clock SD Command SD Data0 SD Data1 SD Card Slot SD Data2 SD Data3 SD Card Detect SD Write Protect IR Transmit Infrared Port (IRDA) IR Receive SW1 (IRQ0) Pushbuttons SW2 (IRQ1) SW3 (RESET) E1 / Touch Touch Pads E2 / Touch E1 / Orange LED LEDs E2 / Yellow LED Potentiometer Potentiometer (R71) I2C SDA Accelerometer I2C SCL IRQ TWRPI AN0 (J9 Pin 8) TWRPI AN1 (J9 Pin 9) TWRPI AN2 (J9 Pin 12) TWRPI ID0 (J9 Pin 17) TWRPI ID1 (J9 Pin 18) TWRPI I2C SCL (J10 Pin 3) TWRPI I2C SDA (J10 Pin 4) General Purpose TWRPI SPI MISO (J10 Pin 9) TWRPI Socket TWRPI SPI MOSI (J10 Pin 10) TWRPI SPI SS (J10 Pin 11) TWRPI SPI CLK (J10 Pin 12) TWRPI GPIO0 (J10 Pin 15) TWRPI GPIO1 (J10 Pin 16) TWRPI GPIO2 (J10 Pin 17) TWRPI GPIO3 (J10 Pin 18) TWRPI GPIO4 (J10 Pin 19) TWRK53N512UM Port Pin PTD6 PTD7 PTE2 PTE3 PTE1 PTE0 PTE5 PTE4 PTE28 PTC9 PTD7 PTC6 PTC5 PTC13 RESET_b PTB17 PTB18 PTC7 PTC8 ― PTC11 PTC10 PTC12 PTB6 PTB7 PTB5 PTE0 PTE1 PTC10 PTC11 PTB23 PTB22 PTB20 PTB21 PTC12 PTB9 PTB10 PTA19 PTC13 Pin Function UART0_RX UART0_TX SDHC0_DCLK SDHC0_CMD SDHC0_D0 SDHC0_D1 SDHC0_D2 SDHC0_D3 PTE28 PTC9 CMT_IRO CMP0_IN0 PTC5 PTC13 RESET_b TSI0_CH10 TSI0_CH11 PTC7 PTC8 ADC1_DM1 I2C1_SDA I2C1_SCL PTC12 PTB6 PTB7 PTB5 PTE0 PTE1 I2C0_SCL I2C0_SDA SPI2_SIN SPI2_SOUT SPI2_PCS0 SPI2_SCK PTC12 PTB9 PTB10 PTA19 PTC13 TWR‐K53N512 Tower Module User's Manual Page 19 of 22 Feature Connection Port Pin Pin Function TSI0_CH0/LCD_P10 (function selected by PTB0/PTB10 J32 jumper setting, see schematic) TSI0_CH6/LCD_P11(function selected by PTB1/PTB11 J33 jumper setting, see schematic) PTB2 TSI0_CH7 PTB3 TSI0_CH8 PTC0 TSI0_CH13 PTC1 TSI0_CH14 PTC2 TSI0_CH15 PTA4 TSI0_CH5 PTB16 TSI0_CH9 PTB17 TSI0_CH10 PTB18 TSI0_CH11 PTB19 TSI0_CH12 PTE2 PTE2 Electrode 0 (J8 Pin 3) Electrode 1 (J8 Pin 5) Electrode 2 (J8 Pin 7) Electrode 3 (J8 Pin 8) Electrode 4 (J8 Pin 9) Touch Pad / Segment Electrode 5 (J8 Pin 10) LCD TWRPI Socket Electrode 6 (J8 Pin 11) Electrode 7 (J8 Pin 12) Electrode 8 (J8 Pin 13) Electrode 9 (J8 Pin 14) Electrode 10 (J8 Pin 15) Electrode 11 (J8 Pin 16) TWRPI ID0 (J8 Pin 17) TWRPI ID1 (J8 Pin 18) ― ADC1_DM0 5 Tower Elevator Connections The TWR‐K53N512 features two expansion card‐edge connectors that interface to the Primary and Secondary Elevator boards in a Tower system. The Primary Connector (comprised of sides A and B) is utilized by the TWR‐K53N512 while the Secondary Connector (comprised of sides C and D) only makes connections to the GND pins. Table 8 provides the pinout for the Primary Connector. Table 8. TWR‐K53N512 Primary Connector Pinout Pin #
Side B
Name
Usage
Pin #
Side A
Name
Usage
B1
5V
5.0V Power
A1
5V
B2
GND
Ground
A2
GND
Ground
B3
3.3V
3.3V Power
A3
3.3V
3.3V Power
B4
ELE_PS_SENSE
Elevator Power Sense
A4
3.3V
3.3V Power
B5
GND
Ground
A5
GND
Ground
B6
Ground
PTE2
A6
B7
GND
SDHC_CLK / SPI1_CLK
GND
SCL0
Ground
PTC10/I2C1_SCL
B8
SDHC_D3 / SPI1_CS1_b
A8
SDA0
PTC11/I2C1_SDA
B9
SDHC_D3 / SPI1_CS0_b
PTE4
A9
GPIO9 / CTS1
PTC19
B10
SDHC_CMD / SPI1_MOSI
PTE1
A10
GPIO8 / SDHC_D2
PTE5
B11
SDHC_D0 / SPI1_MISO
PTE3
A11
GPIO7 / SD_WP_DET
PTC9
B12
ETH_COL
B13
ETH_RXER
B14
ETH_TXCLK
B15
ETH_TXEN
B16
B17
A7
5.0V Power
A12
ETH_CRS
A13
ETH_MDC
PTB1 connected via jumper J7
A14
ETH_MDIO
PTB0 connected via jumper J29
A15
ETH_RXCLK
ETH_TXER
A16
ETH_RXDV
ETH_TXD3
A17
ETH_RXD3
TWRK53N512UM PTA5
PTA15
TWR‐K53N512 Tower Module User's Manual PTA14
Page 20 of 22 Pin #
Side B
B18
Name
ETH_TXD2
B19
ETH_TXD1
B20
ETH_TXD0
B21
B22
B23
GPIO3
B24
CLKIN0
B25
CLKOUT1
B26
B27
GND
AN7
B28
Usage
Pin #
Side A
A18
Name
ETH_RXD2
Usage
PTA17
A19
ETH_RXD1
PTA12
PTA16
A20
ETH_RXD0
PTA13
GPIO1 / RTS1
PTC18
A21
SSI_MCLK
PTE6
GPIO2 / SDHC_D1
PTE0
A22
SSI_BCLK
PTE12
PTE28
EXTAL/PTA18
connected via jumper
J11
A23
SSI_FS
PTE11
SSI_RXD
A24
PTE7
A25
SSI_TXD
Ground
A26
A27
AN6
PTB10/ ACD0_SE14
PTB11/ ACD0_SE15
GND
AN3
A28
AN2
Ground
Solder connection for ADC0_DP0
Solder connection ADC0_DM0
B29
AN5
PTB2/ ACD0_SE12
A29
AN1
Solder connection ADC1_DP0
B30
AN4
PTB3/ ACD0_SE13
A30
AN0
Solder connection ADC1_DM0
B31
GND
DAC1
Ground
DAC1_OUT
A31
B32
A32
GND
DAC0
Ground
DAC0_OUT
B33
TMR3
A33
TMR1
PTA9
PTE10
B34
TMR2
PTC5
PTD6
A34
TMR0
PTA8
B35
GPIO4
PTB9
A35
GPIO6
PTB11
B36
3.3V
PWM7
3.3V Power
PTA2 needs soldering
A36
B37
A37
3.3V
PWM3
3.3V Power
PTC4
B38
PWM6
PTA1 needs soldering
A38
PWM2
PTC3
B39
PWM5
PTD5
A39
PWM1
PTC2
B40
PWM4
PTD4
A40
PWM0
PTC1
B41
CANRX0
A41
RXD0
PTC14
B42
CANTX0
A42
TXD0
PTC15
B43
1WIRE
A43
RXD1
PTC16
B44
SPI0_MISO
PTD3
A44
TXD1
PTC17
B45
SPI0_MOSI
PTD2
A45
VSS
VSSA
B46
SPI0_CS0_b
PTD0
A46
VDDA
VDDA
B47
SPI0_CS1_b
PTC3
A47
VREFA1
VREFH
B48
SPI0_CLK
PTD1
A48
VREFA2
VREFL
B49
GND
SCL1
Ground
PTB2/I2C0_SCL
A49
GND
Ground
B50
A50
GPIO14
B51
SDA1
PTB3/I2C0_SDA
A51
GPIO15
B52
GPIO5 / SD_CARD_DET
PTE28
A52
GPIO16
B53
USB0_DP_PDOWN
A53
B54
GPIO17
USB0_DM
USB0_DM
PTB5 A54
B55
USB0_DM_PDOWN
IRQ_H
USB0_DP
USB0_DP
B56
IRQ_G
PTB5 A55
B57
IRQ_F
PTB6 A56
USB0_ID
USB0_VBUS
IRQ_E
PTB6 A57
B58
TMR7
B59
IRQ_D
PTB7 A58
A59
TMR6
B60
IRQ_C
PTB7 TMR5
IRQ_B
PTB8 A60
B61
B62
IRQ_A
PTB8 B63
EBI_ALE / EBI_CS1_b
B64
EBI_CS0_b
B65
GND
TWRK53N512UM VREGIN via jumper J18
A61
TMR4
A62
RSTIN_b
PTE6
A63
RSTOUT_b
PTC15
PTE7
A64
CLKOUT0
PTA6
Ground
A65
GND
TWR‐K53N512 Tower Module User's Manual RESET_b
Ground
Page 21 of 22 Pin #
Side B
Name
Usage
Pin #
Side A
Name
Usage
B66
EBI_AD15
PTA10
A66
EBI_AD14
PTA24
B67
EBI_AD16
PTA9
A67
EBI_AD13
PTA25
B68
EBI_AD17
PTA8
A68
EBI_AD12
PTA26
A69
EBI_AD11
PTA27
B70
EBI_AD18
EBI_AD19
PTA7
PTA29
A70
EBI_AD10
PTA28
B71
EBI_R/W_b
PTD15
A71
EBI_AD9
PTD10
B72
EBI_OE_b
PTA11
A72
EBI_AD8
B73
EBI_D7
PTD12
A73
EBI_AD7
PTD11
LATCH_FB_A7
B74
EBI_D6
PTD13
A74
EBI_AD6
LATCH_FB_A6
B75
EBI_D5
PTD14
A75
EBI_AD5
LATCH_FB_A5
B76
EBI_D4
PTE8
A76
EBI_AD4
LATCH_FB_A4
B77
EBI_D3
PTE9
A77
EBI_AD3
LATCH_FB_A3
B78
EBI_D2
PTE10
A78
EBI_AD2
LATCH_FB_A2
B79
EBI_D1
PTE11
A79
EBI_AD1
LATCH_FB_A1
B80
EBI_D0
PTE12
A80
EBI_AD0
LATCH_FB_A0
B81
GND
Ground
A81
GND
Ground
B82
3.3V
3.3V Power
A82
3.3V
3.3V Power
B69
TWRK53N512UM TWR‐K53N512 Tower Module User's Manual Page 22 of 22 
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