Schneider Electric TSXP6720, Processor Quick Start Guide
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Telemecanique INFORMATION SHEET TSX P67 20 PROCESSOR 1.1 DESCRIPTION AND NEW FUNCTIONS Description The new TSX P67 20 processor is a standard size, high-integration processor for programmable controllers of the middle and top end of the TSX Series 7 range. The TSX 67 2000 configurations using this type of processor re- place the ISX 67 3000 configurations, since they are more compact and permit optimum use of the 24~bit and 32-bit I/0 modules. The memory structure is similar to that of the TSX 67-30 PC as presented in the TSX T607 Programming Terminal User's Manual - Book 1 - Section 5. The bit memory structure of the TSX P67 20 processor is given in bok the table below : BIT MEMORY STRUCTURE Max, N Capacity available on processor 4096 3) Type of System bits 64 | objects 1/0 bits 1024 Grafcet steps 512 macro-steps 64 19 — Internal bits up to the amount of memory available (1) 16 or 32 Kword user memory cartrídge (16 bits). The word memory structure of the TSX P67 20 processor is shown in (2) Programming port. the diagram below : (3) Connector for local or remote 1/0 extension racks. On-board RAM 24 k words DATA 24 kwords (see Note) Y A EXECUTABLE PROGRAM Y Memory cartridge 132kwords | }--—---------, non executable | À program Constants 6 k words max. Ÿ DP 168 words max. NOTES : The 24 Kwords of the on-board RAM are available only with a TSX T607 terminal, version V3. The use of a battery-backed RAM memory cartridge extends the data memory zone to 32 Kwords (24 Kwords on-board and 8 Kwords in the cartridge). The on-board RAM memory is backed-up by a nickel-cadmíum battery in the processor module, W9 1262 977 03.01.01 11-87 1 TSX P67 20 PROCESSOR DESCRIPTION AND NEW FUNCTIONS New Functions With the TSX P67 20 processor, the application program can be structured in a maximum of five tasks, as follows . A non-periodic Interrupt task (IT), . A periodic Fast task (FAST), . A periodic Master task (MAST), . Two periodic Auxiliary tasks (AUXO and AUX1). The new functions and enhancements incorporated in the TSX P67 20 include : . Optimized control of the 24-bit and 32-bit I/0 modules, . Real-time clock, . Processing of interrupts from couplers in local or remote extension racks, . Application operating modes : - State 1 of cold restart system bit SYO testable by program, - Initialization of task periods by setting SYO to 1 (by the terminal or the program), - New system of reservation of the Pe. Modification of the task periods by a TSX T607 V3 terminal ín the Connected mode, . Programming port : - Data link parameters configurable by program in ASCII, - Faster exchanges between the processor and the TSX T607 V3 terminal. Remarks: . The real-time clock is not backed up by a battery and must therefore be reset after a power break. . Due to the new system of reservation of the PC, a TSX T607 V3 term- inal is necessary to access a TSX P67 20 processor through a Telway network. . The TSX P67 20 processor cannot take user cartridges of 8 Kwords. . The TSX LES 20 local extension rackmaster module must have an "II" number (interchangability index) of 03 or higher to guarantee correct operation with the TSX P67 20 processor, Characteristics Configuration 32 bits 16 bits Max. number of discrete I/0 1024 768 Max. number of extension racks . TSX RCE 860/RCF 860 single rack, complete bus 2 2 . TSX RSE 840/RSF 840 single rack, simplified bus 2 2 . ISX RKE 8 direct extension rac 1 3 Max. number of couplers | . ISX RKN 82 basic configuration 5 5 . TSX RCE 860/RCF 860 single rack, complete bus 8 8 Max. number of Telway network modules 1 1 Max. user memory capacity 56 Kwords 56 Kwords . On-board RAM 24 Kwords 24 Kwords . User memory cartridge 32 Kwords 32 Kwords W9 1262 977 03.01.01 11-87 TSX P67 20 PROCESSOR COMPOSITION OF TSX 67-20 CONFIGURATIONS 1.2 COMPOSITION OF TSX 67-20 CONFIGURATIONS 32-Bit Configuration 16-Bit Configuration The TSX P67 20 processor can address a maxímum of 8 racks (0 to 7) and a maximum of 1024 I/O points (with 32-bit I/O modules). The use of 32-bit I/0 modules permits very compact configurations, since it offers the possibility of housing 1024 I/O points ín 4 single racks. ALEA AAA IES i + 7 a EA E AIS) SE Fey, Je pees rere EL ITE OX Га тк CE LO ES Бла + "a 1. + + pres Ï т. Pra rrr Couplers Uw ТН Remarks : TSX 67 2000 (basic configuration) (*) TSX RKE 8 (+) BUS Electrical Optical Simplified TSX RSE 840 TSX RSF 840 Complete TSX RCE 860 TSX RCF 860 (*) BUS Flectrical Optical Simplified TSX RSE 840 TSX RSF 840 Complete TSX RCE 860 TSX RCF 860 (+) TSX 67 2000 (basic configuration) (*) TSX RKE 8 (*) BUS Electrical Optical Simplified TSX RSE 840 TSX RSF 840 Complete TSX RCE 860 TSX RCF 860 BUS Electrical Optical Direct TSX RKE 8 TSX RKE 8 extension If 32-bit modules are used in racks 4 and 6, the corresponding slots in racks 5 and 7 cannot be used and must remain empty (a). (*) 1f 16-bit modules are used in racks 0/1, 2/3, 4/5 and 6/7, the addresses 1, 3, 5 and 7 cannot be used, The basic configuration rack can only be equipped with a limited number of couplers, depending on the total power consumption (5 couplers maximum). The extension racks with the complete bus can be entirely equipped with couplers, thus permitting the use of 21 couplers maximum. Wo 1262 977 03.01.01 11-87 ISX P67 20 PROCESSOR NEW SYSTEM BITS AND WORDS 1.3 NEW SYSTEM BITS AND WORDS Current Time and Date Bits SY49/50 Words SW50/57 Time, Date and Cause of Last Stop Bits SY49/50 Words SW50/57 Execution Time of Periodic Tasks Bit SY48 Words SW40/43 + The addressable data objects of the TSX 67-20 are the same as those of the TSX 67-30 and TSX 87-10/20. However, the new real-time clock function in the TSX 67-20 has necessitated the creation of new system bits (SY48 to SY50) and system words (SW40/43, SW50/57) whose operation is described below. The current time and date can be read or written (according to states of system bits SY49 and SY50) in the following system words : SW50: 100 ms (0 to 9) SW51: seconds (0 to 59) SW52: minutes (0 to 59) SW53: hours (0 to 23) SW54: days (1 to 7) SW55: months (1 to 12) SW56: years (0 to 9999) SW57: day of the week (1 to 7). - To read the time and date, read system words SW50 to SW57 with system bits SY49 and SY50 at state 0. - To set the time and date (necessary after a power break), write system words SW50 to SW57 with system bit SY49 at state O and system bit SY50 at state 1, The real-time clock can show the time, date and cause of the last stoppage of a TSX 67-20 application. This information can be read in system words SW50 to SW56 with system bit SY49 at 1 and system bit SY50 at 0. System word SW57 indicates the cause of the stoppage of the TSX 67-20 as follows : = SW57 = 1 : Set to STOP by the terminal, - SW57 = 2 : Stopped by a software fault (Task or Grafcet overrun), = SW57 = 4 : Stopped by a mains break or by opening a cartridge lock, - SW57 = 5 : Stopped by a hardware fault, The system words indicating the execution times of the periodic tasks can be accessed by setting system bit SY48 to 1 and reading the following system words, SW40: Fast task SW41: Master task 5W42: Auxiliary task 0 SW43: Auxiliary task 1 The value is shown in milliseconds and corresponds to the time elapsed between the start and end of the execution cycle of the task (from acquisition of the inputs to updating of the outputs). W9 1262 977 03.01.01 11-87 TSX P67 20 PROCESSOR COMPATIBILITY PROGRAMMING GUIDELINES 1.4 COMPATIBILITY The TSX P67 20 processor is compatible with the TSX T607 terminal version V3, that is to say one that is equipped with TSX TS6 333 software cartridges. All the functions of the processor and of the terminal version V3 are then avail- able (see the TSX T607 User's Manual Ref. TSX D43 607 - Operating Modes V3). - Creation of an application : The level of the application must be of version V3 , which must be specific- ally selected in the Configuration mode on the menu "O - APPLICATION" since, by default, the terminal proposes application level V2, - Upgrading a V2 application : The V2 application is transferred to the internal memory of the terminal. The upgrading from V2 to V3 must be requested on the Configuration mode menu "0 - APPLICATION" and becomes effective after reconfiguration. Do not forget to declare the P67 20 processor so as to take full advantage of its functions. - Access to a V3 application : When it is connected to the PC, the TSX T607 V3 terminal is automatically set to application level V3, The TSX T607 V2 terminal (equipped with TSX TS6 44 software cartridges) cannot read an application of level V3, 1.5 PROGRAMMING GUIDELINES During programming, the following precautions must be observed : System Bits SYO, SY1 The pover return bits SYO, SYl and the Grafcet bits SY21, SY22 and SY24 must not SY21, SY22 and SY24 be reset to 0 by the program or the terminal. Consequently, the following instructions must not be used on these bits : . The instructions -( )-, -(/)-, -(R)-, --> and RESET, . The instruction RESET in the Debug, Data and Adjust modes. In addition, the Grafcet bits SY21, SY22 and SY24 can be used with the in- structions -(S)- and SET only in the Pre-processing section. Function Blocks . The number of Timers and/or Monostables that are configured with the same time base must be limited to 120, and the number Timers and/or Monostables that are configured with a time base of 10 ms must be limited to 8. . The function block outputs (Ti,D Mi,R Ci,F etc.) must not be set or reset by the program or the terminal; these outputs can be read but not written. Double Length Word To store the result of an operation in a double length word (DWi), at least one Operations of the operands must be a double length word (DWi or CDWi). Example: W9 * DW78 --> DW15, W9 1262 977 03.01.01 11-87 5 TSX P&7 20 PROCESSOR PROGRAMMING GUIDELINES INSTRUCTIONS FOR USE Rising and Falling Edge Operations The logic of these operations is not valid unless the following conditions are observed : . Input bit : the rising or falling edge contact must be processed in the task to which the input module is assigned, . Output bit or internal bit : the rising or falling edge contact and its associated output (or equivalent in Literal language) must be processed in the same task. . In Ladder language, the output associated with the rising or falling edge of an object must be written only once. 1.6 INSTRUCTIONS FOR USE These instructions concern the handling of the user memory cartridges, - Identify each cartridge. When changing or installing user memory cartridges, use the label on the side of the cartridge to identify the name and version of the application. - Changing the cartridge. Depending on the context, the changing of a cartridge in a PC that is powered up causes a hot or cold restart. The procedure is as follows : With the PC running : . Open the cartridge lock, this stops the PC and the MEM light comes on, . Remove the cartridge, Install the new cartridge, . Close the cartridge lock, this causes : ~ A hot restart and sets the PC to RUN if the new cartridge contains exactly the same program as the old one, - A cold restart and sets the PC to RUN if the new cartridge contains a different program from the old one, With the PC stopped : . Open the cartridge lock, this confirms the stopping of the PC and the MEM light comes on, | . Remove the cartridge, . Install the new cartridge, . Close the cartridge lock, this causes : - A hot restart and sets the PC to STOP if the new cartridge contains exactly the same program as the old one, - A cold restart and sets the PC to RUN if the new cartridge contains a different program from the old one. >| W9 1262 977 03.01.01 11-87 MULTIFAINT - MONACO (458640) ">
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