User`s Manual

KIT-NB85E-TP
User's Manual
RealTimeEvaluator
KIT-NB85E-TP
User’s Manual
Software Version Up
* The latest RTE for Win32 (Rte4win32) can be down-loaded from following URL.
http://www.midas.co.jp/products/download/english/program/rte4win_32.htm
Notice
* The copyright associated with KIT-NB85E-TP (including software and documentation) are proprietary to
Midas Lab. Co., Ltd.
* This software and manual are protected under applicable copyright laws, and may not be copied,
redistributed or modified in whole or in part, in any way without explicit prior written permission from Midas
Lab. Co., Ltd.
* The right of use granted for the customer means the right to use the software only on one system per one
license. It is prohibited to use the one license of software on two or more systems at the same time.
* While this product was manufactured with all possible care, Midas Lab. Co. Ltd. and its distributor assume
no responsibility whatsoever for any result of using the product.
* The contents and specifications of this product and this document are subject to change without notice.
Trademarks
* MS-Windows, Windows, MS and MS-DOS are the trademarks of Microsoft Corporation, U.S.A. The
names of the programs, systems, CPUs, and other products that appear in this document are usually
trademarks of the manufacturer of the corresponding product.
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KIT-NB85E-TP
User’s Manual
Revision History
Rev.0.8
Jul. 24, 1999
Preliminary 1st edition
Rev.1.0
Sep. 24, 1999
Official 1st edition
The initial value of JTAG CLK changed
to 12.5 MHz
Rev.2.0
Mar.4, 2000
2nd edition
Revised for supporting RTE-1000-TP
Rev.2.2
May.20, 2000
revised edition
Deleted 1 sentence in Precautions
Rev.2.3
Dec. 6,2000
revised
ENV commands are corrected.
Rev.2.4
May.20.2001
modified
download site
related to functions
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KIT-NB85E-TP
User’s Manual
CONTENTS
1. OVERVIEW....................................................................................................................................... 4
2. HARDWARE SPECIFICATIONS ....................................................................................................... 5
Emulation........................................................................................................................................... 5
3. RTE FOR WIN32............................................................................................................................... 6
Invoking ChkRTE2.exe ....................................................................................................................... 6
4. INITIALIZATION COMMANDS.......................................................................................................... 8
To use Multi........................................................................................................................................ 8
To use PARTNER............................................................................................................................... 8
5. INTERFACE SPECIFICATIONS ........................................................................................................ 9
Pin arrangement table ........................................................................................................................ 9
Connectors......................................................................................................................................... 9
Wiring on Target System .................................................................................................................... 9
Layout of the connectors on the board .............................................................................................. 10
6. PRECAUTIONS .............................................................................................................................. 11
Precautions related to operation ....................................................................................................... 11
Precautions related to functions ........................................................................................................ 11
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KIT-NB85E-TP
User’s Manual
1. OVERVIEW
KIT-NB85E-TP is the software to debug the system that has NEC RISC micro processor NB85E
(ASIC-Core) by in-circuit emulation with RTE-100-TP or RTE-1000-TP.
This document describes how to use the KIT-NB85E-TP. Thus on using the product, please refer to the
documents for RTE-100-TP or RTE-1000-TP also, that is main part of whole debugging system.
This product comes with the following components. First check that none of the components are
missing.
• RTE for Win32 Setup Disk
• User's manual (This manual)
• License sheet
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User’s Manual
2. HARDWARE SPECIFICATIONS
Emulation
Target device
RTE-TP
Emulation functions
Operating frequency
Interface
*4
JTAG clk
Event function
Number of events
Setting of execution address
Setting of data access
Address specification
Data specification
Status specification
Number of sequential unit stages
Break functions
H/W break points
S/W break points
Breaks that can be set using events
Step breaks
Manual breaks
*4
Externall breaks
Trace functions
Trace data bus
Trace memory
Trace delay
*4
Trace clock
*4
Trace time tag
Trigger setting
Trigger that can be set using an execution
address
Trigger setting by event
Trigger setting by external input
Start/stop by execution address
Disassembled trace data display function
Complete trace mode specification function
ROM emulation functions
*4
Memory capacity
*4
Access time
*4
Operation voltage
*4
Electrical condition
Number of ROMs that can be emulated
DIP-32pin-ROM (8-bit ROM)
DIP-40/42pin-ROM (16-bit ROM)
*4
Extend STD-16BIT-ROM connector
Types of ROMs that can be emulated
DIP-32-ROM probe (8bits-bus)
DIP-40-ROM probe (16bits-bus)
DIP-42-ROM probe (16bits-bus)
*4
Extend STD-16BIT-ROM (16bits-bus)
Bus width specification (bits)
Pin mask functions
ASIC microcontroller using NB85E as core
RTE-1000-TP
66 MHz (max.)
JTAG/N-Wire
100 KHz - 25 MHz
12
6
Maskable
Maskable
Maskable
4
2
100
Supported
Supported
Supported
Supported
4 bits
4 bits x 128K words
0 - 1FFFFh
77 MHz (max.)
100 us - 30 h
Supported
Supported
Supported
Supported
Supported
Provided
Provided (no real time)
8 M - 32 M-Byte
40 ns (burst cycle:35sns)(*1)
1.8 - 5 V (*2)
LV-TTL (*3)
4 (max.)
2 (max.)
2 (max.)
1M, 2M, 4M, 8M (27C010/020/040/080)
1M, 2M, 4M (27C1024/2048/4096)
8M, 16M (27C8000/16000)
1M, 2M, 4M, 8M, 16M, 16M, 32M, 64M, 128M, 256M
8/16/32
RESET, STOP, NMIx, VAREQ, WAIT-, INTxx
*1,2,3: These specifications are on the case using expansion 16bit standard ROM cable (CBL-STD16-32M)
and DIP40/42 adapter.
*4: These specifications are on the case using RTE-1000-TP. For RTE-100-TP, please refer to the
document of RTE-100-TP, as the specifications might differ from above.
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3. RTE FOR WIN32
This chapter describes the setting of RTE for WIN32, with the focus on the aspects specific to KITNB85E-TP.
Invoking ChkRTE2.exe
After finishing to connect and apply the power supply for all equipments, invoke ChkRTE2.exe to setup
the configuration of "RTEforWIN32".
Please setup the "RTEforWIN32" configuration at least one time for newly installed hardware.
<Setup RTE-Products>
<Selecting RTE>
From Product List, select the NB85E-TP(yyyy,xxxx) located beneath the TP tree.
For yyyy, specify CPU operation mode, if and only if the evaluation system that has
special RAM facilities for internal ROM emulation is used. Otherwise specify the item
romless mode, regardlessly whether the CPU is implemented the mask ROM.
The xxxx stands for CPU address mode.
<Selecting I/F-1, I/F-2>
Select and specify the host interface that suitable for your system from pull-down
menu. (The display in example shows that RTE-PCAT is assigned to address 200h)
<License>
Click the button to setup license checking with the license setup sheet attached to the
KIT package. For detail, please refer to the document of "RTE for WIN32".
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<Function test>
If RTE-1000-TP is properly connected to the user system and capable of debugging, the following dialog
box appears upon the normal completion of the function test. In this state, control from the debugger is
possible.
If an error occurs during the test, the N-Wire cable is not properly connected. Check its connection.
Perform the ChkRTE2.exe function test after the RTE-100-TP or
RTE-1000-TP has been connected to the user system and the power
to all the devices has been turned on.
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4. INITIALIZATION COMMANDS
Before debugging can be started, system initialization is required.
The following commands are available for system initialization, be sure to setup correctly before
start to use the system.
To use Multi
Use following commands in Target window.
ENV command
* Setup port mask
* Specify JTAG clock
* Specify cache mode
* Specify CPU operation mode
* Others
ROM command
* Specify ROM emulation condition
NC/NCD command
* Specify data cache area for debugger software
NSPB/NSPBD command
* Specify forbid software break area
NROM/NROMD command
* Specify forced user area in rom emulation mapping area by ROM commad
To use PARTNER
Use following dialog.
Set CPU Environ dialog
* Setup port mask
* Specify JTAG clock
* Specify cache mode
* Specify CPU operation mode
* Others
Set Emulation ROM dialog
* Specify ROM emulation condition
NC/NCD command
* Specify data cache area for debugger software
NSPB/NSPBD command
* Specify forbid software break area
NROM/NROMD command
* Specify forced user area in rom emulation mapping area by ROM commad
Do not set cache operation mode to automatic (Auto), if the
evaluation system with NB85E-TEG chip is not used. That might
cause system malfunction for debugging capability.
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User’s Manual
5. INTERFACE SPECIFICATIONS
This chapter describes the specifications of the connectors used for control that are required for the user
system.
Pin arrangement table
Pin number
Signal name
Input/output (user side)
Treatment (user side)
A1
CLKOUT
Output
22 - 33 Ω series resistor (recommended)
A2
TRCDATA0
Output
22 - 33 Ω series resistor (recommended)
A3
TRCDATA1
Output
22 - 33 Ω series resistor (recommended)
A4
TRCDATA2
Output
22 - 33 Ω series resistor (recommended)
A5
TRCDATA3
Output
22 - 33 Ω series resistor (recommended)
A6
TRCEND
Output
22 - 33 Ω series resistor (recommended)
A7
DDI
Input
10 kΩ pullup
A8
DCK
Input
10 kΩ pullup
A9
DMS
Input
10 kΩ pullup
A10
DDO
Output
A11
DRST-
Input
10 kΩ pulldown
A12
DBINT
Output
10 kΩ pulldown
A13
NC.
------
Pin number
Signal name
Input/output (user side)
B1-B10
GND
------
Connection to the power GND
B11
NC.
------
Open
B12
NC.
------
Open
B13
+3.3V
------
Connection to the power
22 - 33 Ω series resistor (recommended)
Open
Treatment (user side)
A12:DBINT : This capability is available only for RTE-1000-TP.
It detects the edge of signal that input to 1pin of EXT connector on main chassis of
RTE-100-TP, then output break request to DBINT. The polarity of signal edge is
configurable.
Connectors
Manufacturer: KEL
Models:
8830E-026-170S (straight)
8830E-026-170L (right angle)
8831E-026-170L (right angle, fixing hardware attached)
Wiring on Target System
1.Keep the wire from the NB85E to the connector as short as possible.
>>100 mm or shorter is recommended.
2.Output signals from CPU are recommended to be connected to connectors, via high-speed CMOS
buffers of which power supply is the same one with CPU I/O buffers.
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KIT-NB85E-TP
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Layout of the connectors on the board
The figure below shows the physical layout of the connectors on the board.
B13 A13
B12 A12
Polarity indication
B2 A2
B1 A1
Board end
[Top View]
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KIT-NB85E-TP
User’s Manual
6. PRECAUTIONS
This chapter provides precautionary information on the use of KIT-NB85E-TP.
Precautions related to operation
1) Do not turn on the power to the user system while the power to KIT-NB85E-TP is off. Doing so can
cause a malfunction.
2) KIT-NB85E-TP externally controls the debugging control circuit built into the NB85E. Consequently,
KIT-NB85E-TP does not operate correctly unless the following conditions are satisfied:
* KIT-NB85E-TP is properly connected to the user system using the N-Wire cable.
* The power to the user system is on so that the NB85E can run correctly.
Precautions related to functions
1) The disassembly and display of real-time trace data is performed by reading the contents of memory
at the point the trace display command is issued, according to the branching information received
from the NB85E. Consequently, the disassembly and display of the program located in RAM of the
user system is not correct if changes (including erroneous writing due to a CPU hang up) are made
after program execution. Note that the following functional constraints must be observed.
2) If the trace information is limited by using the tron command, trace display may not be correctly
performed. Therefore, specify all ON (start) or all OFF (stop) under normal conditions.
3) A breakpoint in the ROM space is invalid if the breakpoint is set to the second instruction of an
instruction string that simultaneously execute two instructions.
4) For the CPU implemented on-chip cache, it is not possible to debug correctly during the cache is
LOCK. If the cache is LOCK, the capabilities such as break, step execution or memory modification
for corresponding memory region might malfunction.
5) For further information, be sure to refer to the Release Note of the KIT.
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