Errata to RX230 Group, RX231 Group User`s Manual: Hardware

Errata to RX230 Group, RX231 Group User`s Manual: Hardware
Date: Oct. 27,2015
RENESAS TECHNICAL UPDATE
TOYOSU FORESIA, 3-2-24, Toyosu, Koto-ku, Tokyo 135-0061, Japan
Renesas Electronics Corporation
Product
Category
Title
MPU/MCU
Document
No.
TN-RX*-A137A/E
Errata to RX230 Group, RX231 Group User’s
Manual: Hardware
Information
Category
Technical Notification
Reference
Document
RX230 Group, RX231 Group
User’s Manual: Hardware
Rev.1.00 (R01UH0496EJ0100)
Rev.
1.00
Lot No.
Applicable
RX230 Group , RX231 Group
Products
All
This document describes additions of electrical characteristics and corrections to the RX230 Group, RX231 Group User’s
Manual: Hardware Rev.1.00.
• Page 291 of 1968
Description for the VBTLVDLVL[1:0] bits in 12.2.1, VBATT Control Register (VBATTCR) is modified as follows:
[Before correction]
VBTLVDLVL[1:0] Bit (VBATT Pin Voltage Drop Detection Level Select)
These bits are used to select the detection voltage level (Vdetvbt) when the voltage drop detection function of the
VBATT pin is enabled.
[After correction]
VBTLVDLVL[1:0] (VBATT Pin Voltage Drop Detection Level Select)
These bits are used to select the detection voltage level (Vdetvbt) when the voltage drop detection function of the
VBATT pin is enabled.
VBTLVDLVL[1:0] bits are enabled when the VBATTCR.VBATTDIS bit is 0 (battery backup function enabled).
• Page 292 of 1968
Description for the VBTLVDMON flag in 12.2.2, VBATT Status Register (VBATTSR) is modified as follows:
[Before correction]
VBTLVDMON Flag (VBATT Pin Voltage Monitor Flag)
This flag indicates whether the VBATT pin voltage is below Vdetvbt.
This flag is enabled only when the battery backup function is enabled (the VBATTCR.VBATTDIS bit is 0).
[After correction]
VBTLVDMON Flag (VBATT Pin Voltage Monitor Flag)
This flag indicates whether the VBATT pin voltage is below Vdetvbt.
This flag is enabled when the VBATTCR.VBATTDIS bit is 0 (battery backup function enabled) and the
VBATTCR.VBTLVDEN bit is 1 (VBATT pin voltage drop detection enabled).
(c) 2015. Renesas Electronics Corporation. All rights reserved.
Page 1 of 11
RENESAS TECHNICAL UPDATE TN-RX*-A137A/E
Date: Oct. 27, 2015
• Page 544 of 1968
Table 21.6, Unused Pin Configuration is modified as follows:
[Before correction]
Pin Name
Ports 0 to 5
Ports A to E, H,
J
VREFH0
VREFL0
Description
omitted
• If the direction setting is for input (PORTn.PDR = 0), the corresponding pin is connected
to VCC (pulled up)
via a resistor or to VSS (pulled down) via a resistor.*1
• If the direction setting is for output (PORTn.PDR = 1), the pin is released.*1, *2
Connect this pin to AVCC0
Connect this pin to AVSS0
[After correction]
Pin Name
Ports 1 to 3, 5
Ports A to E, H,
J
Ports 0, 4
VREFH0
VREFL0
VREFH
VREFL
Description
omitted
• If the direction setting is for input (PORTn.PDR = 0), the corresponding pin is connected
to VCC (pulled up)
via a resistor or to VSS (pulled down) via a resistor.*1
• If the direction setting is for output (PORTn.PDR = 1), the pin is released.*1, *2
• If the direction setting is for input (PORTn.PDR = 0), the corresponding pin is connected
to AVCC0
(pulled up)
via a resistor or to AVSS0 (pulled down) via a resistor.*1
• If the direction setting is for output (PORTn.PDR = 1), the pin is released.*1, *2
Connect this pin to AVCC0
Connect this pin to AVSS0
Connect this pin to AVCC0
Connect this pin to AVSS0
• Page 1820 of 1968
Step 3 in Figure 49.13, Procedure to Issue the Program Command for the E2 DataFlash is modified as follows:
[Before correction]
[After correction]
Page 2 of 11
Date: Oct. 27, 2015
RENESAS TECHNICAL UPDATE TN-RX*-A137A/E
• Page 1873 of 1968
Input voltage row in Table 50.1, Absolute Maximum Ratings is modified as follows:
[Before correction]
Item
Input voltage
Symbol
omitted
Vin
Except for ports for 5
V tolerant*1
Ports for 5 V
tolerant*1
Value
Unit
-0.3 to VCC+0.3
V
-0.3 to +6.5
[After correction]
Item
Input voltage
Symbol
omitted
Vin
Ports for 5 V
tolerant*1
Ports 03, 05, 07
Ports 40 to 47
Ports other than
above
Value
Unit
-0.3 to +6.5
V
-0.3 to AVCC0+0.3
-0.3 to VCC+0.3
• Page 1875 of 1968
VT row in Table 50.3, DC Characteristics (1) is modified as follows:
[Before correction]
Item
Schmitt trigger
input voltage
Ports 03, 05, 07,
ports 40 to 47
RIIC input pin
(except for SMBus)
Other than RIIC
input pin
Symbol
VT
Min.
omitted
Typ.
Max.
Unit
AVCC0×0.1
—
—
V
VCC×0.05
—
—
VCC×0.1
—
—
Min.
omitted
AVCC0×0.1
Typ.
Max.
Unit
—
—
V
VCC×0.05
—
—
VCC×0.05
—
—
VCC×0.1
—
—
Test Conditions
[After correction]
Item
Schmitt trigger
input voltage
Ports 03, 05, 07,
ports 40 to 47
RIIC input pin
(except for SMBus)
Ports 12, 13, 16, 17
Ports B5
Other than RIIC
input pin
Symbol
VT
Test Conditions
• Page 1881 of 1968
Units “mA” and “MHz” and value “32” in Figure 50.3, Voltage Dependency in Low-Speed Operating Mode (Reference Data)
are corrected as follows:
[Before correction]
ICC(mA)
ICLK = 32MHz
[After correction]
ICC(µA)
Page 3 of 11
Date: Oct. 27, 2015
RENESAS TECHNICAL UPDATE TN-RX*-A137A/E
ICLK = 32.768kHz
• Page 1882 of 1968
“Increment for LPT operation” and “Increment for IWDT operation” are added to Table 50.8, DC Characteristics (6) as follows:
[Before change]
Item
Symbol
omitted
Typ. *3
Max
0.4
—
1.2
—
Typ. *3
Max
Unit
0.4
—
µA
0.4
0.4
—
—
1.2
—
Increment for RTC operation*4
Supply
Current *1
Unit
Test Condition
RCR3.RTCDV[2:0] set
low drive capacity
RCR3.RTCDV[2:0] set
normal drive capacity
to
to
[After change]
Item
Supply
Current *1
Symbol
omitted
ICC
Increment for LPT operation
Increment for IWDT operation
Increment for RTC operation*4
Test Condition
Use IWDT-Dedicated
On-Chip Oscillator for clock
source
RCR3.RTCDV[2:0] set
low drive capacity
RCR3.RTCDV[2:0] set
normal drive capacity
to
to
• Page 1885 of 1968
Operating current for LVD1, LVD2, and CTSU are added to Table 50.11, DC Characteristics (9) as follows:
[Before change]
Analog power
Supply
current
Temperature
sensor*6
Comparator
B
operating
current*6
Item
During A/D conversion (at high-speed
conversion)
omitted
ITEMP
—
Window mode
Comparator high-speed
channel)
Comparator low-speed
channel)
Symbol
IAVCC
ICMP
—
Typ. *7
0.7
Max
1.7
Unit
mA
—
75
—
µA
Min
mode
(per
—
—
12.5
3.2
28.6
16.2
µA
µA
mode
(per
—
1.7
4.4
µA
Test Condition
[After change]
Analog power
Supply
current
Item
During A/D conversion (at high-speed
conversion)
LVD1
and
LVD2
operating
current*6
Per channel
Temperature
sensor*6
Comparator B
operating
current*6
—
CTSU
operating
current*6
Window mode
Comparator
high-speed
channel)
Comparator
low-speed
channel)
When sleep mode
Base clock: 2 MHz
Pin capacitance: 50 pF
—
Typ. *7
0.7
Max
1.7
Unit
mA
omitted
ILVD
—
0.15
—
µA
ITEMP
—
75
—
µA
ICMP
Symbol
IAVCC
Min
mode
(per
—
—
12.5
3.2
28.6
16.2
µA
µA
mode
(per
—
1.7
4.4
µA
—
150
—
µA
ICTSU
Test Condition
Page 4 of 11
Date: Oct. 27, 2015
RENESAS TECHNICAL UPDATE TN-RX*-A137A/E
• Page 1887 of 1968
Values in Table 50.16, Permissible Output Currents (1) are corrected as follows:
[Before correction]
Item
Permissible output low current
Permissible output high current
Total of ports 40 to 47, ports 03, 05, 07
Total of ports 12 to 17, ports 20 to 27, ports 30 to
37, port PJ3
omitted
Total of ports 40 to 47, ports 03, 05, 07
Total of ports 12 to 17, ports 20 to 27, ports 30 to
37, port PJ3
Symbol
ΣIOL
Max.
25
40
Unit
mA
-25
-40
mA
Max.
40
40
Unit
mA
-40
-40
mA
Symbol
Max.
Unit
IOH
-0.1
-4.0
-8.0
Symbol
Max.
IOH
-4.0
-4.0
-8.0
ΣIOH
[After correction]
Item
Permissible output low current
Permissible output high current
Total of ports 40 to 47, ports 03, 05, 07
Total of ports 12 to 17, ports 20 to 27, ports 30 to
37, port PJ3
omitted
Total of ports 40 to 47, ports 03, 05, 07
Total of ports 12 to 17, ports 20 to 27, ports 30 to
37, port PJ3
Symbol
ΣIOL
ΣIOH
• Page 1888 of 1968
Value in Table 51.17, Output Permissible Currents (2) is corrected as follows:
[Before correction]
Item
Permissible output high current
(maximum value per pin)
omitted
Ports 40 to 47, ports 03, 05, 07, ports 36, 37
Ports other than Normal output mode
above
High-drive output mode
mA
[After correction]
Item
Permissible output high current
(maximum value per pin)
omitted
Ports 40 to 47, ports 03, 05, 07, ports 36, 37
Ports other than Normal output mode
above
High-drive output mode
Unit
mA
• Page 1889 of 1968
Normal output mode row in Table 50.18, Output Values of Voltage (1) is modified as follows:
[Before correction]
Item
Output
high
All
output
ports
Normal output mode
High-drive
output
mode
Symbol
Min.
omitted
VOH
VCC – 0.5
VCC – 0.5
Max.
Unit
—
—
V
Test Conditions
IOH = -0.5mA
IOH = -1.0mA
[After correction]
Page 5 of 11
Date: Oct. 27, 2015
RENESAS TECHNICAL UPDATE TN-RX*-A137A/E
Item
Output
high
All
output
ports
Normal
output
mode
Ports 03, 05,
07, ports 40
to 47
Ports other
than above
High-drive
output
mode
Symbol
Min.
omitted
VOH
AVCC0 – 0.5
Max.
Unit
—
V
VCC-0.5
—
VCC – 0.5
—
Test Conditions
IOH = -0.5mA
IOH = -1.0mA
• Page 1889 of 1968
Normal output mode row in Table 50.19, Output Values of Voltage (2) is modified as follows:
[Before correction]
Item
Output
low
RIIC pins
Output
high
All
output
ports
Standard mode
Fast mode
Normal output mode
High-drive output mode
Symbol
omitted
VOL
VOH
Min.
Max.
Unit
—
—
0.4
0.6
V
VCC – 0.8
VCC – 0.8
—
—
V
Min.
Max.
Unit
—
0.4
V
—
0.6
AVCC0 – 0.8
—
VCC-0.8
—
VCC – 0.8
—
Test Conditions
IOL = 3.0mA
IOL = 6.0mA
IOH = -1.0mA
IOH = -2.0mA
After correction]
Item
Output
low
Output
high
RIIC pins
All
output
ports
Standard mode (Normal
output mode)
Fast mode (High-drive
output mode)
Normal Ports 03, 05,
output
07, ports 40 to
mode
47
Ports
other
than above
High-drive output mode
Symbol
omitted
VOL
VOH
Test Conditions
IOL = 3.0mA
IOL = 6.0mA
V
IOH = -1.0mA
IOH = -2.0mA
• Page 1889 of 1968
Normal output mode row in Table 50.20, Output Values of Voltage (3) is modified as follows:
[Before correction]
Item
Output
high
All
output
ports
Normal output mode
High-drive
output
mode
Symbol
Min.
omitted
VOH
VCC – 0.8
VCC – 0.8
Max.
Unit
—
—
V
Max.
Unit
—
V
Test Conditions
IOH = -2.0mA
IOH = -4.0mA
[After correction]
Item
Output
high
All
output
ports
Normal
output
mode
Ports 03, 05,
07, ports 40
to 47
Ports other
than above
High-drive
output
mode
Symbol
Min.
omitted
VOH
AVCC0 – 0.8
VCC-0.8
—
VCC – 0.8
—
Test Conditions
IOH = -2.0mA
IOH = -4.0mA
Page 6 of 11
RENESAS TECHNICAL UPDATE TN-RX*-A137A/E
Date: Oct. 27, 2015
• Page 1893 of 1968
Figure 50.13 VOH/VOL and IOH/IOL Voltage Characteristics at Ta = 25°C When High-Drive Output is Selected (Reference
Data) is corrected as follows:
[Before correction]
[After correction]
Page 7 of 11
RENESAS TECHNICAL UPDATE TN-RX*-A137A/E
Date: Oct. 27, 2015
• Page 1896 of 1968
Figure 50.18 VOL and IOL Voltage Characteristics of RIIC Output Pin at Ta = 25°C (Reference Data) is corrected as follows:
[Before correction]
[After correction]
Page 8 of 11
Date: Oct. 27, 2015
RENESAS TECHNICAL UPDATE TN-RX*-A137A/E
• Page 1898 of 1968
Note 3 in Table 50.21, Operating Frequency Value (High-Speed Operating Mode) is corrected as follows:
[Before correction]
Note 3. The VCC_USB range is 3.0 to 3.6 V when the USB clock is in use.
[After correction]
Note 3. The VCC_USB range is 3.0 to 5.5 V when the USB clock is in use.
• Page 1898 of 1968
Note 3 in Table 50.22, Operating Frequency Value (Middle-Speed Operating Mode) is corrected as follows:
[Before correction]
Note 3. The VCC_USB range is 3.0 to 3.6 V when the USB clock is in use.
[After correction]
Note 3. The VCC_USB range is 3.0 to 5.5 V when the USB clock is in use.
• Page 1900 of 1968
Operating condition in Table 50.26, Clock Timing is corrected as follows:
[Before correction]
Item
Main clock oscillator
oscillation
frequency*2
Typ.
Max.
Unit
2.4VCC3.6
1.8VCC2.4
Symbol
Min.
omitted
fMAIN
1
1
—
—
20
8
MHz
Typ.
Max.
Unit
2.4VCC5.5
1.8VCC2.4
Symbol
Min.
omitted
fMAIN
1
1
—
—
20
8
MHz
Test Conditions
[After correction]
Item
Main clock oscillator
oscillation
frequency*2
Test Conditions
• Page 1941 of 1968
Value in Table 50.57, Characteristics of Power-On Reset Circuit and Voltage Detection Circuit (1) is corrected, Note 3 is
modified, and Note 4 is deleted as follows:
Page 9 of 11
Date: Oct. 27, 2015
RENESAS TECHNICAL UPDATE TN-RX*-A137A/E
[Before correction]
Item
Voltage detection
level
Voltage detection
circuit
(LVD0)*1
Voltage detection
circuit
(LVD1)*2
Voltage detection
circuit
(LVD2)*3
Symbol
Min.
Typ.
omitted
Vdet0_0
3.67
3.84
Vdet0_1
2.70
2.82
Vdet0_2
2.37
2.51
Vdet0_3
1.79
1.90
Vdet1_0
4.12
4.29
omitted
Vdet1_D
1.76
1.86
Vdet2_0
4.08
4.29
Vdet2_1
3.85
4.14
Vdet2_2
3.82
4.02
Vdet2_3
3.62
3.84
Max.
Unit
3.97
3.00
2.67
1.99
4.42
V
Figure 50.74
At falling edge VCC
V
Figure 50.75
At falling edge VCC
V
Figure 50.76
At falling edge VCC
1.96
4.48
4.35
4.22
4.02
Test Conditions
Note 3. n in the symbol Vdet2_n denotes the value of the LVDLVLR.LVD2LVL[3:0] bits.
Note 4. Vdet2_0 selection can be used only when the CMPA2 pin input voltage is selected, and cannot be used when the power supply
voltage (VCC) is selected.
[After correction]
Item
Voltage detection
level
Voltage detection
circuit
(LVD0)*1
Voltage detection
circuit
(LVD1)*2
Voltage detection
circuit
(LVD2)*3
Symbol
Min.
Typ.
omitted
Vdet0_0
3.67
3.84
Vdet0_1
2.70
2.82
Vdet0_2
2.37
2.51
Vdet0_3
1.80
1.90
Vdet1_0
4.12
4.29
omitted
Vdet1_D
1.80
1.86
Vdet2_0
4.08
4.29
Vdet2_1
3.95
4.14
Vdet2_2
3.82
4.02
Vdet2_3
3.62
3.84
Max.
Unit
3.97
3.00
2.67
1.99
4.42
V
Figure 50.74
At falling edge VCC
V
Figure 50.75
At falling edge VCC
V
Figure 50.76
At falling edge VCC
1.96
4.48
4.35
4.22
4.02
Test Conditions
Note 3. n in the symbol Vdet2_n denotes the value of the LVDLVLR.LVD2LVL[1:0] bits.
• Page 1959 of 1968
Dimensions in Figure B, 100-Pin LQFP (PLQP0100KB-B) are modified as follows:
[Before correction]
Reference
Symbol
D
Min
—
A
—
Dimension in Millimeters
Norm
14.0
Max
—
omitted
—
1.6
omitted
θ
0°
3.5°
7°
Reference
Symbol
D
Min
—
Dimension in Millimeters
Norm
14.0
Max
—
A
—
[After correction]
omitted
—
1.7
3.5°
8°
omitted
θ
0°
Page 10 of 11
Date: Oct. 27, 2015
RENESAS TECHNICAL UPDATE TN-RX*-A137A/E
• Page 1962 of 1968
Dimensions in Figure E, 64-pin LQFP (PLQP0064KB-C) are modified as follows:
[Before correction]
Reference
Symbol
D
Min
—
A
—
Dimension in Millimeters
Norm
10.0
Max
—
omitted
—
1.6
omitted
θ
0°
3.5°
7°
Reference
Symbol
D
Min
—
Dimension in Millimeters
Norm
10.0
Max
—
A
—
[After correction]
omitted
—
1.7
3.5°
8°
omitted
θ
0°
• Page 1964 of 1968
Dimensions in Figure G, 48-pin LQFP (PLQP0048KB-B) are modified as follows:
[Before correction]
Reference
Symbol
D
Min
—
A
—
Dimension in Millimeters
Norm
7.0
Max
—
omitted
—
1.6
omitted
θ
0°
3.5°
7°
Reference
Symbol
D
Min
—
Dimension in Millimeters
Norm
7.0
Max
—
A
—
[After correction]
omitted
—
1.7
3.5°
8°
omitted
θ
0°
Page 11 of 11
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