Developing Embedded Control System Platform using

Developing Embedded Control System Platform using
Developing Embedded Control System
Platform using Atmel AVR32 Processor
Using Rapid Prototyping with Matlab Real-Time Workshop
Øyvind Netland
Master of Science in Engineering Cybernetics
Submission date: June 2007
Supervisor:
Amund Skavhaug, ITK
Norwegian University of Science and Technology
Department of Engineering Cybernetics
Problem Description
The goal of this master thesis is to use the new AVR32 processor architecture together with a
developed I/O-card in a control system. The control system should be able use Matlab Real-Time
Workshop generated code for rapid prototyping.
The assignment consists of:
- Learn how the AVR32 architecture and the STK1000 card works.
- Install developing- and debugging tools for the AVR32 architecture on a Linux workstation.
- Make a basic Linux system for the STK1000 card.
- Implement timers for controlling the periodic Matlab execution, and test how accurate these are.
- Design and implement a I/O-card using an 8-bit AVR microcontroller.
- Design the interface between the I/O-card and AVR32, and implement a driver the AVR32 can use
to control the I/O-card.
- Find out how to compile and run Matlab Real-Time Workshop generated code under Linux on the
AVR32 architecture.
- Make Matlab Simulink blocks for the I/O-card.
- Make it easy to use Matlab Real-Time Workshop code on AVR32 for rapid prototyping.
- Test and identify the efficiency and limits of the system.
- Make a control system platform with AVR32, that users can build their control system on.
- Make a user manual for the platform that contain the information a user needs to use it, so it can
be used with minimal effort.
Assignment given: 08. January 2007
Supervisor: Amund Skavhaug, ITK
Preface
This thesis has been very interesting, and a worthy end of my time at NTNU. It has been a
privilege to work with a new processor architecture, and try to do something that nobody
as far as I know have tried before. I would like to thank Amund Skavhaug, my supervisor,
and Haavard Skinnemoen from Atmel Norway. Both of them have been helpful whenever
I have needed some guidance.
Abstract
AVR32 is a new processor architecture made by Atmel Norway, and in this thesis it has
been used to make a control system platform. The hardware used in this platform is the
STK1000, an AVR32 development board and an I/O-card. The I/O-card were developed
as a part of the thesis. Software for the platform consists of I/O-card firmware, Linux
device driver for the I/O-card and user mode drivers.
The platform supports usage of Matlab Real-Time Workshop as a rapid prototyping tool,
that generates code from graphical visualization of mathematical models. S-functions were
created so Matlab Real-Time Workshop can control the I/O-card.
The control system platform is documented in an user manual. This manual describes
how to install development tools for the platform on a Linux or Windows computer, and
how to use the it.
Contents
1 Introduction
1
2 Background
2.1 Embedded Control System . . . . . . . . . .
2.1.1 Real-time Constraints . . . . . . . .
2.1.2 Input/Output . . . . . . . . . . . . .
2.2 Atmel AVR32 Architecture . . . . . . . . .
2.2.1 STK1000 . . . . . . . . . . . . . . .
2.2.2 AT32AP7000 . . . . . . . . . . . . .
2.3 Linux . . . . . . . . . . . . . . . . . . . . .
2.3.1 Linux Control Systems . . . . . . . .
2.3.2 Kernel Mode and User Mode . . . .
2.3.3 Linux Device Driver . . . . . . . . .
2.3.4 AVR32 Linux . . . . . . . . . . . . .
2.3.5 AVR32 Linux development tools . .
2.4 Rapid Prototyping . . . . . . . . . . . . . .
2.4.1 Rapid Prototyping Control Systems
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3 AVR32 Linux on STK1000
3.1 Development Tools . . . . . . . . . . . . . . . . . .
3.1.1 Compiling Development Tools from Source
3.2 AVR32 Linux Kernel Versions . . . . . . . . . . . .
3.3 Configure booting over Network . . . . . . . . . . .
3.3.1 Workstation Configuration . . . . . . . . .
3.3.2 Configure U-Boot . . . . . . . . . . . . . . .
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4 Preliminary tests of AVR32
4.1 Floating-point and Fixed-point operation Test .
4.1.1 Code . . . . . . . . . . . . . . . . . . . .
4.1.2 Result . . . . . . . . . . . . . . . . . . .
4.2 Timer precision Test . . . . . . . . . . . . . . .
4.2.1 Code . . . . . . . . . . . . . . . . . . . .
4.2.2 Result . . . . . . . . . . . . . . . . . . .
4.3 Test of Matlab Real-Time Workshop Generated
4.4 Preliminary Test Conclusion . . . . . . . . . . .
5 Preliminary tests of I/O-card
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7 Design of I/O-card Software
7.1 Communication Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.1.1 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.1.2 Message Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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5.2
5.3
5.4
5.5
AVR Microcontroller . . . . . . . . . . . . . . . . . . . . . . .
5.1.1 ATmega128 . . . . . . . . . . . . . . . . . . . . . . . .
5.1.2 STK500/501 . . . . . . . . . . . . . . . . . . . . . . .
Analog input . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2.1 Test of ATmega128 ADC . . . . . . . . . . . . . . . .
Analog Output . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.1 Generating Analog Signal from PWM . . . . . . . . .
5.3.2 Quality of Analog Signal . . . . . . . . . . . . . . . . .
5.3.3 Time constant (RC) . . . . . . . . . . . . . . . . . . .
5.3.4 Frequency and Resolution . . . . . . . . . . . . . . . .
5.3.5 Order of low-pass Filter . . . . . . . . . . . . . . . . .
5.3.6 Test of ATmega128 PWM as DAC . . . . . . . . . . .
SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4.1 SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4.2 SPI transfer . . . . . . . . . . . . . . . . . . . . . . . .
Test of SPI communication between AVR32 and ATmega128
5.5.1 Hardware setup . . . . . . . . . . . . . . . . . . . . . .
5.5.2 AVR32 as SPI master . . . . . . . . . . . . . . . . . .
5.5.3 ATmega128 as SPI slave . . . . . . . . . . . . . . . . .
5.5.4 Result . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 Prototype I/O-card
6.1 PCB Software . . . . . . . . . . . . . . . . . . . . . . . . .
6.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.3 Components . . . . . . . . . . . . . . . . . . . . . . . . . .
6.4 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.4.1 Power Circuit . . . . . . . . . . . . . . . . . . . . .
6.4.2 Reset, Crystal and Analog Supply Circuit . . . . .
6.4.3 JTAG header and Analog Input Connectors . . . .
6.4.4 RS-232 circuit and Digital Output Connectors . .
6.4.5 STK1000 headers and Digital Input Connectors . .
6.4.6 Decoupling Capacitors and VCC/GND Connectors
6.4.7 Analog Output Circuit . . . . . . . . . . . . . . . .
6.5 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.6 Assembly and test . . . . . . . . . . . . . . . . . . . . . .
6.6.1 Power Regulator Circuit . . . . . . . . . . . . . . .
6.6.2 ATmega128 and JTAG Interface . . . . . . . . . .
6.6.3 Crystal Circuit . . . . . . . . . . . . . . . . . . . .
6.6.4 RS-232 and Reset Circuits . . . . . . . . . . . . . .
6.6.5 Headers for STK1000 and debugging . . . . . . . .
6.6.6 ADC Supply Filter . . . . . . . . . . . . . . . . . .
6.6.7 Analog Output Circuit . . . . . . . . . . . . . . . .
6.7 Errors in Schematic . . . . . . . . . . . . . . . . . . . . .
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7.2
7.3
7.4
7.5
7.1.3 Acknowledgments . . . .
7.1.4 SPI codes . . . . . . . . .
ATmega128 Firmware . . . . . .
7.2.1 SPI commands . . . . . .
7.2.2 Analog Input . . . . . . .
7.2.3 Timeout . . . . . . . . . .
Device Driver . . . . . . . . . . .
7.3.1 Device Nodes . . . . . . .
7.3.2 Master send Data . . . .
7.3.3 Request Data from Slave
User Mode Driver . . . . . . . . .
Threaded User Mode Driver . . .
7.5.1 Threaded Analog Input .
7.5.2 Threaded Analog Output
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8 Implementation of I/O-card Software
8.1 ATmega128 Firmware . . . . . . . . . . . . .
8.1.1 am128main . . . . . . . . . . . . . . .
8.1.2 am128io . . . . . . . . . . . . . . . . .
8.1.3 am128slaveSpi . . . . . . . . . . . . .
8.1.4 am128ADC . . . . . . . . . . . . . . .
8.1.5 am128pwm . . . . . . . . . . . . . . .
8.1.6 am128uart . . . . . . . . . . . . . . .
8.2 Device driver . . . . . . . . . . . . . . . . . .
8.2.1 Init and Exit Functions . . . . . . . .
8.2.2 Major and Minor Numbers . . . . . .
8.2.3 Char Device registration . . . . . . . .
8.2.4 SPI device and driver . . . . . . . . .
8.2.5 Changes in Linux Kernel Source Code
8.2.6 avr32io . . . . . . . . . . . . . . . . .
8.2.7 avr32io Cmd . . . . . . . . . . . . . .
8.2.8 avr32io SPI . . . . . . . . . . . . . . .
8.3 Linux Kernel Patch . . . . . . . . . . . . . . .
8.4 User Mode Driver . . . . . . . . . . . . . . . .
8.5 Threaded User Mode Driver . . . . . . . . . .
8.5.1 Threaded Analog Input . . . . . . . .
8.5.2 Threaded Analog Output . . . . . . .
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9 Testing with prototype card
9.1 Test of SPI communication . . . . . .
9.1.1 Frequency of SPI connection .
9.1.2 Time used on SPI transfers . .
9.1.3 Time used on Commands . . .
9.1.4 Reliability . . . . . . . . . . . .
9.1.5 Reliability when using Timeout
9.2 Test of Analog Output . . . . . . . . .
9.2.1 Simulation . . . . . . . . . . .
9.2.2 Testing Filters . . . . . . . . .
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11 Matlab Real-Time Workshop
11.1 Matlab Real-Time Workshop . . . . . . .
11.1.1 Target Language Compiler (TLC)
11.1.2 S-functions . . . . . . . . . . . . .
11.2 Making a AVR32 Real-Time Target . . .
11.2.1 avr32.tlc . . . . . . . . . . . . . . .
11.2.2 avr32.tmf . . . . . . . . . . . . . .
11.2.3 avr32main.c . . . . . . . . . . . . .
11.3 S-functions for I/O-card . . . . . . . . . .
11.3.1 Simulink S-function File . . . . . .
11.3.2 Target Block Files . . . . . . . . .
11.4 Results . . . . . . . . . . . . . . . . . . . .
11.4.1 Results of Analog Test . . . . . . .
11.4.2 Results of Digital Test . . . . . . .
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9.3
9.2.3 Operational Amplifiers . . . .
Test of Analog Input . . . . . . . . .
9.3.1 Precision of Analog Input . .
9.3.2 Buffering and Interrupt mode
10 Final version of I/O-card
10.1 Changes from Prototype . . . .
10.2 Schematic . . . . . . . . . . . .
10.3 Layout . . . . . . . . . . . . . .
10.4 Problems with Analog Output
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12 User manual for AVR32 I/O
12.1 Installing . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12.1.1 Install AVR32 tool-chain . . . . . . . . . . . . . . .
12.1.2 Compile Linux kernel with AVR32 I/O-card support
12.1.3 Install AVR32 support in Matlab . . . . . . . . . . .
12.2 AVR32 I/O-card . . . . . . . . . . . . . . . . . . . . . . . .
12.2.1 Hardware description . . . . . . . . . . . . . . . . .
12.2.2 Connecting I/O-card . . . . . . . . . . . . . . . . . .
12.2.3 Analog Input . . . . . . . . . . . . . . . . . . . . . .
12.2.4 Analog Output . . . . . . . . . . . . . . . . . . . . .
12.3 Rapid prototyping with Matlab Real-Time Workshop . . .
12.3.1 AVR32 System Target . . . . . . . . . . . . . . . . .
12.3.2 S-functions for I/O-card . . . . . . . . . . . . . . . .
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13 Discussion
13.1 AVR32 Linux . . . . . . . . .
13.2 I/O-card . . . . . . . . . . . .
13.3 I/O-card Communication and
13.4 Matlab Real-Time Workshop
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Drivers
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14 Conclusion
109
15 Further Work
111
iv
A Digital appendix
113
B Schematics
114
B.1 Schematic for protoype card . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
B.2 Schematic for final card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
C Code
C.1 ATmega128 . . . . . . . . .
C.1.1 Makefile . . . . . . .
C.1.2 am128main.c . . . .
C.1.3 am128io.c . . . . . .
C.1.4 am128spiSlave.c . .
C.1.5 am128adc.c . . . . .
C.1.6 am128pwm.c . . . .
C.1.7 am128uart.c . . . . .
C.2 Kernel module . . . . . . .
C.2.1 Makefile . . . . . . .
C.2.2 avr32ioc . . . . . . .
C.2.3 avr32io Cmd.c . . .
C.2.4 avr32io SPI.c . . . .
C.3 User Mode . . . . . . . . .
C.3.1 avr32io driver.c . . .
C.3.2 avr32io threads.c . .
C.3.3 periodictask.h . . . .
C.3.4 periodictask.c . . . .
C.3.5 stopwatch.h . . . . .
C.3.6 stopwatch.c . . . . .
C.4 Matlab S-functions . . . . .
C.4.1 Analog input TLC .
C.4.2 Analog output TLC
C.4.3 Digital input TLC .
C.4.4 Digital output TLC
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vi
Chapter 1
Introduction
Today, computer electronics are found almost everywhere. Many ordinary items contain
small embedded computers and new cars have computer controlled breaks, fuel injection
and stability control. A computer system that controls a physical system is called a control
system, and control systems are continuously getting more complex and smaller in physical
size.
In 2006, Atmel Norway released a new processor architecture called AVR32. This processor
architecture is designed for use in embedded systems, specially small system with low power
consumption. Small physical size and low power consumption are very important for many
control systems, specially if the system is battery powered.
The main goal of this thesis was to make use of this new architecture to make a platform
for control systems. This will use an AVR32 version of Linux as an operating system,
since Linux is an operating system that is free, open source and suited for embedded
development. Atmel Norway has ported the Linux kernel and many tools to the AVR32
architecture, so it’s a natural choice.
A control system has to be able to observe and control the environment. To give the
AVR32 this capability, an Input/Output-card has been developed. This card makes the
AVR32 able to send and receive analog voltage signal from sensors and actuators, and are
the AVR32s extension into the physical world.
To make development of control systems easier on the platform, Matlab Real-Time Workshop was adapted so it can be used as a rapid prototyping tool. This means that code
can be generated from Matlab Simulink models, and it runs on the control system. This
makes it easy to implement different control systems through the graphical interface of
Simulink. The I/O-card can be used in Real-Time Workshop by using the developed
Simulink S-function blocks.
To make it easier to use the control system platform, an user manual was written. This
contain information about how to install the needed tools and use the control system
platform from a Linux distribution or Windows. This is an important part of the thesis,
since one of the goals were to make an user-friendly product. The manual should give
enough information to use the control system platform. To develop the system further,
this report should be read.
2
CHAPTER 1. INTRODUCTION
The chapters in this report are as follows:
◦ Chapter 2 Background
This chapter describes some of the technologies and concepts behind the thesis.
◦ Chapter 3 AVR32 Linux on STK1000
This chapter Describes how to install and use AVR32 Linux on STK1000.
◦ Chapter 4 Preliminary tests of AVR32
This chapter performs tests to find out the capabilities of the STK1000 development
board and the AVR32 processor architecture.
◦ Chapter 5 Preliminary tests of I/O-card
This chapter performs tests to find out if correct solutions have been chosen for the
I/O-card.
◦ Chapter 6 Prototype I/O-card
This chapter describes the design and production of the prototype I/O-card.
◦ Chapter 7 Design of I/O-card software
This chapter describes the design of the I/O-card drivers and firmware.
◦ Chapter 8 Implementation of I/O-card software
This chapter describes the implementation of the I/O-card drivers and firmware.
◦ Chapter 9 Testing with prototype card
This chapter testing the prototype card with the I/O-card drivers and firmware.
◦ Chapter 10 Final version of I/O-card
This chapter describes the design and production of the final version of the I/O-card.
◦ Chapter 11 Matlab Real-Time Workshop
This chapter adapts Matlab Real-Time Workshop to be used as a rapid prototyping
tool for the control system platform.
◦ Chapter 12 User manual
This chapter describes how to install the necessary tools and use the control system
platform.
Chapter 2
Background
2.1
Embedded Control System
An embedded control system[14], or control system for short, is a computer system whose
main task is to control a physical device or a system. These can vary in sizes, from large
and complex systems like a ship or a factory, to smaller devices like a toy robot. A control
system will have a predefined task, that won’t change over time. This allows a control
system to be more specialized than a workstation computer.
2.1.1
Real-time Constraints
Control systems often have real-time[18] constraints, which means that an operation has
to be done both correctly and within a time limit. Hard real-time constraints means that
the system will fail with possible disastrous result if a time limit isn’t met. A soft real-time
constraint is less serious, and will only lower the quality of the result if failing to meet a
time limit.
2.1.2
Input/Output
A control system is useless unless it can measure and manipulate its environment, and
to do this the system needs to use sensors and actuators. These instruments may have
analog or digital interfaces. If they have analog interfaces, which is quite common, they
are controlled with analog input and output (I/O). If the instruments are digital, they
probably use a digital communication protocol, like RS-232 or USB.
To be able to use instruments with analog interfaces, a computer needs an I/O-card. These
cards have a number of analog I/O channels that can be used with instruments with an
analog interface. This normally implies that the card can measure the voltage of a signal
(analog input) or make a signal with a given voltage (analog output). I/O-cards often have
digital I/O as well, that can be used instead of analog I/O when only digital values (low
or high) are used. This is often used together with an analog value, one example is control
signals for electrical motor. An analog signal determine the speed or torque of the motor,
while a digital signal determines its direction.
4
CHAPTER 2. BACKGROUND
2.2
Atmel AVR32 Architecture
The new AVR32 microprocessor architecture from Atmel Norway claims to be an architecture for the 21st century[2]. Most other processors increase their throughput1 by increasing
the clock frequency. The AVR32 microprocessor aims to give high throughput with a slow
clock. Since power consumption is directly related to clock frequency, this means that it
can do the same work with less power. This will be an important characteristic in the
future, since we will use more and more gadgets that use battery as a power source, like
hand-held music- and video-players.
Low power consumption is also important for control systems. Many systems needs to
have low weight, low cost and a long battery time. Since batteries normally are heavy and
expensive, both weight and cost will decrease if the power consumption decrease.
2.2.1
STK1000
STK1000[8] is a development board for AVR32. STK1000 has some standard I/O connections, like Ethernet, RS-232, mouse and keyboard PS/2. It has an inboard LCD screen
and general extension headers where it is possible to connect add-on cards. The STK1000
card comes with a SD flash card with a fully functional Linux system. This is described
in more details in 2.3.4. Figure 2.1 on the facing page is an image of the STK1000 board.
2.2.2
AT32AP7000
The AT32AP7000 was the first microprocessor with the AVR32 architecture, and it’s also
mounted on the STK1002 daughter-board. that can be connected to the STK1000 board.
The features of this processor are listed below.
◦ 32 KB on-chip SRAM.
◦ 16 KB instruction and 16 KB data caches.
◦ MMU and DMA controller
◦ Peripherals like audio DAC, LCD controller, USB 2.0 and two Ethernet MACs.
◦ Serial interfaces like RS-232/USART, TWI (I2C), SPI PS/2.
2.3
Linux
The Linux kernel[15] is an open-source and free2 Unix-like operating system kernel. The
kernel is a single binary program that controls the hardware resources of the computer
and makes them available for other running programs. Most people think about Linux,
they think about a Linux distribution. However, a distribution is actually a collection of
1
Throughput is a measurement of how much work the processor is able to do.
”Free software is a matter of liberty, not price. To understand the concept, you should think of free
as in free speech, not as in free beer.” is a good explanations on free software given in The Free Software
Definition[23]
2
2.3. LINUX
5
Figure 2.1: STK1000 development board
programs, including the Linux kernel, that can easily be installed on a computer. They
may consist of thousands of programs, but it’s only the kernel that is called Linux.
2.3.1
Linux Control Systems
Linux based operating systems are used in many different systems, from servers and workstations to embedded systems like control systems. In recent years they have been used
more and more in embedded systems. This will most likely increase further in the future,
as indicated in the article in Datarespons’ magazine Interrupt[22]. Below is a list over
reasons to use Linux in a control system, some of these are also mentioned in the article.
◦ Linux and many of the programs running on Linux are free and open-source.
◦ A Linux system is configurable, scalable and able to run on many different hardware
platforms.
◦ Linux is a stable and well tested operating system kernel.
◦ Linux has many skilled users and developers who are often willing to help.
6
CHAPTER 2. BACKGROUND
2.3.2
Kernel Mode and User Mode
Most processor architectures has the ability to run code in different levels of privilege. The
x86 architecture has four, called ring 0 to ring 3. The AVR32 architecture[11] has two
normal modes, called Supervisor and Application (equivalent to ring 0 and ring 3). Other
modes are reserved for interrupts and exceptions.
As described on page 19 of Understanding Linux kernel [20], Linux systems uses two of
these levels, kernel mode and user mode. Kernel mode are often refereed to as ring 0 [19]
and is the highest privileged mode. A normal program executes in user mode but is able
to switch to kernel mode when requesting a service that the kernel provides. Kernel mode
is only used when necessary, and only when allowed by the kernel.
User mode programs can switch to kernel mode or communicate with the kernel through
different interfaces. A system call are functions running in kernel mode that can be called
from user mode, and they are described in chapter 10 of [20]. Signals are used to send
notifications between user mode programs, or between the kernel and user mode programs,
and are described in chapter 11 of [20]. The kernel works as a layer between hardware
devices and user mode programs, and this is usually done with Device Drivers. Which are
described in 2.3.3.
2.3.3
Linux Device Driver
A device driver is code that controls a device, normally this is some kind of hardware.
How device drivers works are described in Linux Device Driver [21] and in chapter 13 of
Understanding the Linux kernel [20]. A device driver has to be either a part of the kernel
or a kernel module that can be linked into a running kernel. Devices are identified in the
Linux kernel with a major and a minor number. These are numbers that the device driver
has allocated for the devices it controls.
Device drivers are often used to make it possible for user mode programs to use the devices
controlled by the driver. A user mode program access the driver through special files in
the file system, called device nodes. These are normally located in the /dev directory. A
user mode program can read, write or do other file operations on a node, just as if it was
a normal file. When accessing a node with the same major and minor number as a device,
the user-space program is actually accessing the driver of this device.
There are two types of device nodes, which corresponds to two different types of devices.
Character or char devices are devices that receive or send data serially, while block devices
receive or send big chunks of data at the time. Most devices except hard drives and RAM
are char devices.
2.3.4
AVR32 Linux
AVR32 Linux[3] is a porting3 of the Linux kernel done by Atmel Norway. This means
that it’s a version of the Linux kernel that are able to run on this processor architecture.
3
Porting software is to do modifications so the software can run on other processors or operating systems,
further description in [16].
2.4. RAPID PROTOTYPING
7
AVR32 support was included in the mainstream Linux kernel 2.6.19 release, but it doesn’t
contain all the drivers for AVR32 and STK1000 board. To get these, it’s necessary to use
the AVR32 Linux kernel patches from the AVR32 Linux web page (http://avr32linux.org).
Basic system utilities and development tools for the AVR32 architecture can also be found
on this web page.
The STK1000 board comes with a SD flash card with a runnable Linux system. This
system includes a patched 2.6.16 version of the Linux kernel and Busybox 4 . STK1000 uses
U-Boot 5 , which will boot from the SD card by default. By changing the boot arguments in
U-Boot, it is also possible to boot from network. The advantage of network booting is that
the kernel image, file system and programs that all have been developed on a workstation
can be used by AVR32 Linux through the network. This makes development much faster
since new files and programs don’t have to be transferred to a physical medium like a SD
card.
To communicate with the AVR32 Linux from a workstation, it’s possible to use both a
serial connection and telnet via Ethernet. Both of these solutions are available on the
preinstalled Linux system on the SD flash card. They both give a text-based terminal just
like a normal text-based Linux system would give. The AVR32 Linux system also has a
small web server, that in an embedded control system can be used to display a simple web
page with status information and measurement logging.
2.3.5
AVR32 Linux development tools
Atmel Norway has also ported development tools for use with the AVR32 Linux platform.
These tools are available precompiled for different Linux distributions and for Windows,
or they could be compiled from source. The development tools for AVR32 Linux includes
the tools below.
◦ Binutils - GNU Binary utilities for handling object code.
◦ GCC - GNU compiler.
◦ uClibc - A lightweight version of the standard C-library.
◦ u-boot - A boot loader for many different processor architectures.
◦ GDB - GNU debugger that together with a GDB-server on AVR32 can debug code
running on AVR32.
◦ GDB-server - A server version of GDB that can run on the AVR32.
2.4
Rapid Prototyping
In computer engineering, rapid prototyping is a development technique that rapidly make a
simplified version of a system. This prototype usually implements a part of the complete
4
Busybox is a lightweight program that includes the functionality of most small Linux applications that
an embedded system will need in a single binary file.
5
U-Boot (Universal bootloader) is a bootloader that can be used on many different platforms, among
them the AVR32.
8
CHAPTER 2. BACKGROUND
system, that are necessary to test thoroughly. These are often important parts of the
system, and the result of the tests can be used to avoid premature decisions. A typical
application is to design the user-interface with a rapid prototyping tool. This allows fast
and cheap development of a prototype that the users of the system can test and evaluate.
User evaluation can often give important information that is difficult to obtain by other
means.
2.4.1
Rapid Prototyping Control Systems
For control systems, rapid prototyping tools can be used to generate control algorithms
from graphical visualization of mathematical systems. It’s easier and faster to develop
a control system with a tool like this than to write code. It’s also easier to change and
search for errors. These generated algorithms can be tested both against simulated and
actual systems, which is useful during development. Parts of the algorithms can also be
used in the complete system.
Two well known tools for simulating and prototyping of control systems are Matlab and
Labview. Matlab was originally a program for matrix computation (the name stands for
MATrix LABoratory), but it has evolved into a large collection of mathematical software.
Simulink is one of the programs in this collection, and it’s a program for simulating
dynamical system represented by graphical block diagrams. Code can be generated from
these block diagrams, making it ideal for rapid prototyping.
Labview uses a data flow language that describes how data flows between different nodes
of a system, often a control system. This language is called G and are the basis of
Labview. The nodes are representations of physical or logical components and can be
placed and connected using a graphical interface. The G language is a parallel and platform
independent6 language and is well suited for prototyping.
6
Except some special functions
Chapter 3
AVR32 Linux on STK1000
This chapter describes how to install development tools for AVR32 Linux, and how to
configure it for development. Some of the problems encountered while working with this
version of Linux are described as well.
3.1
Development Tools
Installing the development tools are very easy when using the Ubuntu[10] Linux distribution that was used during this thesis. This distribution uses the Apt[17] (Advanced
Packaging Tool) package management tool, that can install software from servers defined
in the /etc/apt/sources.list file. To add the server containing the AVR32 development
tools, the following line should be added to this file.
deb h t t p : / /www. atmel . no / b e t a w a r e / a v r 3 2 / ubuntu / dapper b i n a r y /
To install the tools, execute the following commands, and answer yes to all questions.
sudo a p t i t u d e update
sudo a p t i t u d e i n s t a l l avr32−l i n u x −d e v e l
If this approach doesn’t work, or instructions for installing on other platforms, check the
AVR freaks wiki http://www.avrfreaks.net/wiki.
3.1.1
Compiling Development Tools from Source
It’s also possible to compile the development tools from source, and this was necessary
during the start of this thesis. Then, the precompiled tools had a few bugs. Compiling
the development tools from source is still the only option if special features is needed.
Instructions for doing this can be found at http://avr32linux.org/twiki/bin/view/
Main/GettingStarted.
9
10
CHAPTER 3. AVR32 LINUX ON STK1000
3.2
AVR32 Linux Kernel Versions
Some of the early AVR32 versions of the Linux kernel had some problems. Both the
2.6.16, 2.6.18 and 2.6.19 versions were tested. During these tests the following problems
was encountered.
◦ The 2.6.16 version had problems linking with the pthread library. The SPI driver
worked, but had problems with stability and returned wrong data.
◦ The SPI driver did not work in the 2.6.18 version.
◦ The 2.6.19 version also had problems linking with the pthread library.
It’s also possible that the problems with the pthread library were because of uClibc,
the library used by AVR32 Linux. After switching to the 2.6.20 kernel version and new
precompiled development tools, no kernel or library related problems were encountered.
3.3
Configure booting over Network
2.3.4 explains that the STK1000 can be configured to boot over network, and that this is
a suitable solution during development.
3.3.1
Workstation Configuration
To boot the STK1000 over network, it’s required that the workstation has two different
servers. A TFTP-server (Trivial File Transfer Protocol) are a simple protocol for transferring small files and are used by the boot loader on STK1000 to download the kernel image.
A NFS-server (Network File System) are a standard UNIX server for sharing files, and will
be used to share a root filesystem with the STK1000 board. For a Ubuntu workstation
these two servers are installed by using aptitude, and the following commands.
˜ $ sudo a p t i t u d e i n s t a l l t f t p d x i n e t d n f s −k e r n e l −s e r v e r portmap
The TFTP-server are configured by adding the following text into /etc/xinetd.conf.
service tftp
{
protocol
port
dgram
wait
user
server
server args
disable
}
=
=
=
=
=
=
=
=
udp
69
dgram
yes
nobody
/ usr / sbin / in . tftpd
/ tftpboot
no
The following commands are used to start the server. This is only necessary to do once,
afterwards the server starts by itself.
˜$
˜$
˜$
˜$
sudo
sudo
sudo
sudo
mkdir / t f t p b o o t
chmod −R 777 / t f t p b o o t
chown −R nobody / t f t p b o o t
/ e t c / i n i t . d/ x i n e t d s t a r t
3.3. CONFIGURE BOOTING OVER NETWORK
11
The TFTP-server are now started and shares the directory /tftpboot. If a kernel image
are copied to this directory, the STK1000 are able to download and boot this image.
The NFS-server are configured by sharing a directory with NFS. This are done in the
/etc/exportfs file, and below is an example of a line that will share a directory.
/home/ o y v i n d n e / master / f s 1 2 9 . 2 4 1 . 1 8 7 . 1 / 2 4 ( rw , n o r o o t s q u a s h , a s y n c )
To restart the NFS-server with new configuration, the following commands are used:
˜ $ sudo / e t c / i n i t . d/ portmap r e s t a r t
˜ $ sudo / e t c / i n i t . d/ n f s −k e r n e l −s e r v e r r e s t a r t
˜ $ sudo e x p o r t f s −a
3.3.2
Configure U-Boot
U-Boot (Universal Bootloader) are the boot loader used on STK1000. To configure it,
the STK1000 has to be connected to a workstation with a serial cable. The Workstation
should use a serial terminal program like minicom to connect to the STK1000. During
start up of the STK1000 board, the space bar should be pressed to enter the U-Boot
command line. Here, the bootargs variable has to be changed, and a tftpip variable has
to be created. The following commands modify these variables. If used on other systems,
the IP addresses to the host computer and the path to the NFS-server has to be changed.
setenv t f t p i p 129.241.187.212
s e t e n v b o o t a r g s c o n s o l e=ttyUS0 i p=dhcp r o o t =/dev / n f s n f s r o o t = 1 2 9 . 2 4 1 . 1 8 7 . 2 1 2 : / home/
o y v i n d n e / master / f s i n i t =/ s b i n / i n i t fbmem=900k
saveenv
12
CHAPTER 3. AVR32 LINUX ON STK1000
Chapter 4
Preliminary tests of AVR32
This chapter describes some preliminary tests performed on the STK1000 board before
continuing the work. It was important to reveal any weaknesses the AVR32 architecture
may have, so the control system platform can be designed to avoid them as much as
possible. It’s also important to test that planned solutions can be used on AVR32.
4.1
Floating-point and Fixed-point operation Test
The AVR32 architecture don’t have a hardware floating-point unit (FPU). This means
that floating-point operations have to be done with software emulation. Since Matlab
RTW generated code normally has many floating-point operations, it’s important to know
the processors ability to calculate these. The test referred to in this chapter was set up to
reveal this. A test for fixed-point calculations was performed as well, and the two results
were compared.
The tests consists of 100 million either floating-point or fixed-point multiplications. The
test program measures the time used by these operations, and calculate the number of
microseconds and clock cycles one operation takes (on average). To measure the time, the
stopwatch library was used. This library was developed during the thesis, to make time
measurements easier, and consists of stopwatch.h and stopwatch.c that can be found
in the appendix C.3.5 and C.3.6.
4.1.1
1
2
3
4
5
6
7
8
9
10
11
12
13
Code
#include <s t d i o . h>
#include ”s t o p w a t c h . h ”
#define COUNT 100000000
#define CPU CLOCK 140 // C l o ck f r e q u e n c y o f AVR32 on STK1000 .
i n t main ( )
{
long a ;
float b ;
long us ec , i ;
float usecPerCalc , t i c k s P e r C a l c ;
14
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
CHAPTER 4. PRELIMINARY TESTS OF AVR32
struct sStopWatch watch ;
StartStopWatch (&watch ) ;
f o r ( i =0; i <COUNT; i ++){
a = 6 4 3 4 3 ∗ 5 2 3 4 2 ; // Random i n t e g e r s .
}
u s e c = StopStopWatch(&watch ) ;
u s e c P e r C a l c = ( f l o a t ) ( u s e c ) / ( f l o a t )COUNT;
t i c k s P e r C a l c = u s e c P e r C a l c ∗ ( f l o a t )CPU CLOCK;
p r i n t f ( ” t o t a l time : %i \n ” , u s e c ) ;
p r i n t f ( ” m i c r o s e c o n d s p e r c a l c u l a t i o n : %f \n ” , u s e c P e r C a l c ) ;
p r i n t f ( ” c l o c k t i c k p e r c a l c u l a t i o n : %f \n ” , t i c k s P e r C a l c ) ;
StartStopWatch (&watch ) ;
f o r ( i =0; i <COUNT; i ++){
b = 2 3 4 0 9 2 0 9 8 4 3 7 4 9 8 . 2 4 9 8 7 2 3 9 8 4 7 2 3 9 8 ∗ 2 0 9 3 4 7 8 0 2 9 4 7 2 3 9 . 2 9 0 8 3 4 7 3 2 9 8 4 7 2 3 ; //
Random d o u b l e s .
}
u s e c = StopStopWatch(&watch ) ;
u s e c P e r C a l c = ( f l o a t ) ( u s e c ) / ( f l o a t )COUNT;
t i c k s P e r C a l c = u s e c P e r C a l c ∗ ( f l o a t )CPU CLOCK;
p r i n t f ( ” t o t a l time : %i \n ” , u s e c ) ;
p r i n t f ( ” m i c r o s e c o n d s p e r c a l c u l a t i o n : %f \n ” , u s e c P e r C a l c ) ;
p r i n t f ( ” c l o c k t i c k p e r c a l c u l a t i o n : %f \n ” , t i c k s P e r C a l c ) ;
}
4.1.2
Result
Table 4.1 shows how the STK1000 preformed on these tests compared to a Dell workstation
with a Pentium 4 CPU.
Table 4.1: Results of floating-point
Platform
CPU
µs/FP
Dell PC with Ubuntu 2.4GHz
0.00273
STK1000
140M Hz 0.492
(FP) and fixed-point tests
cycles/FP µs/fixed cycles/fixed
6.55
0.00269
6.47
68.8
0.123
17.2
The Pentium is considerable faster than the AVR32, as expected. It uses the same time for
both the floating-point and fixed-point operations. This is because it has a floating-point
unit. The AVR32 uses about 4 times longer time on a floating-point than on a fixedpoint which was regarded as a positive result. It was a bit concerning that the AVR32
uses about 3 times as many clock cycles per fixed-point operation than the Pentium 4,
specially since Atmel Norway promise more throughput with lower clock. This may be
due to the employed test program inability to compare one fast and one slow processor
with each other.
4.2
Timer precision Test
Most control systems have tasks that have to be carried out with regular intervals, every
millisecond or shorter. This can be implemented using timers. An easy solution was to use
the internal Linux timers, that has a maximum resolution of 1000Hz. setitimer() will
start a timer that sends a SIGALRM signal periodically. A signal() function can register
4.2. TIMER PRECISION TEST
15
this signal and select a function that runs each time the SIGALRM is received. This is all
done inside a user mode program.
The test consists of 10000 periods of 10ms each. The reason for not choosing 1ms which
is the lowest available timer, is that the standard Ubuntu kernel doesn’t have the highest
precision timer (This can be changed by recompiling the kernel, but the test is just as
good with 10ms). The periodic tasks was created using the periodicTask library, that
was developed to make it easy to make and start periodic tasks. This library consists of
periodicTask.h and periodicTask.c, that are in the appendix C.3.3 and C.3.4. The
stopwatch library mentioned in 4.1 was also used.
4.2.1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Code
#include <s t d i o . h>
#include <math . h>
#include ” p e r i o d i c t a s k . h ”
#include ”s t o p w a t c h . h ”
#define COUNT 10000
#define PERIODE 1
i n t main ( )
{
i n t i , u s e c [COUNT] , t o t U s e c ;
f l o a t totVar , avrUsec , avrVar , a v r S t d ;
struct s P e r i o d i c T a s k t a s k ;
struct sStopWatch watch ;
InitPeriodicTasks () ;
S t a r t P e r i o d i c T a s k (& t a s k , PERIODE) ;
StartStopWatch (&watch ) ;
f o r ( i =0; i <COUNT; i ++){
W a i t P e r i o d i c T a s k (& t a s k ) ;
u s e c [ i ] = StopStopWatch(&watch ) ;
i f ( i != COUNT − 1 ) StartStopWatch (&watch ) ;
}
totUsec = 0;
f o r ( i =5; i <COUNT−5; i ++){
totUsec = totUsec + usec [ i ] ;
t o t V a r = t o t V a r + pow ( ( ( f l o a t ) u s e c [ i ] − 10000∗PERIODE) , 2 ) ;
}
a vrUs ec = ( ( f l o a t ) ( t o t U s e c ) ) / (COUNT−10) ;
avrVar = t o t V a r / (COUNT−10) ;
a v r S t d = s q r t ( avrVar ) ;
p r i n t f ( ”Average p e r i o d e time : %f \n ” , a vr Use c ) ;
p r i n t f ( ” V a r i a n c e : %f \n ” , avrVar ) ;
p r i n t f ( ”Standard d e r i v a t e : %f \n ” , a v r S t d ) ;
}
4.2.2
Result
In table 4.2 on the next page the results of the test when performed on different platforms
are shown.
STK1000 has the best timer precision of the two machines. The average period is less than
the correct value, but the difference is not significant. The standard deviation describes
16
CHAPTER 4. PRELIMINARY TESTS OF AVR32
Table 4.2: Results of timer tests
Platform
CPU
Average
Dell Workstation running Ubuntu 7.04 2.4GHz
10013.09µs
STK1000 running avr32 Linux
150M Hz 9994.91µs
1
s
1
Sine Wave
Gain
Standard deviation
2057µs
7.25µs
Integrator
Scope
Figure 4.1: First order low-pass passive filter
how much the results differ from the expected value, and it considerable lower for the
STK1000. This is because the workstation computer has many programs running, and
these will disturb the timer.
4.3
Test of Matlab Real-Time Workshop Generated Code
One of the goals of this thesis was to configure Matlab RTW to be used as a rapid
prototyping tool for the control system. This made it important to check that it was
possible to run RTW code on AVR32. A simple test system was created, consisting of a
gain block and an integration block, and generated code from it. The GRT system target
was used when generating code, see 11.1.1. Figure 4.1 describes the simple test system.
To compile the code for AVR32, it was necessary to change the generated makefile. Adding
CC=avr32-linux-gcc to the Makefile (see 11.2.2 for the exact location) specifies that the
AVR32 compiler should be used. When running the Makefile with this addition, the
Makefile returned the following output.
avr32−l i n u x −g c c −c −O − f f l o a t −s t o r e −fPIC −m32
−DUSE RTMODEL −a n s i −p e d a n t i c −
DMODEL=t e s t −DRT −DNUMST=2 −DTID01EQ=1 −DNCSTATES=1 −DUNIX −DMT=0 −DHAVESTDIO
−I . −I . . −I / u s r / l o c a l / matlab / s i m u l i n k / i n c l u d e −I / u s r / l o c a l / matlab / e x t e r n /
i n c l u d e −I / u s r / l o c a l / matlab / rtw / c / s r c −I / u s r / l o c a l / matlab / rtw / c / s r c / ext mode /
common −I /home/ o y v i n d n e / diplom / matlab / s i m p l e T e s t / t e s t g r t r t w −I /home/ o y v i n d n e /
diplom / matlab / s i m p l e T e s t −I / u s r / l o c a l / matlab / rtw / c / l i b s r c
rt nonfinite . c
cc1 : e r r o r : i n v a l i d option ’32 ’
make : ∗∗∗ [ r t n o n f i n i t e . o ] E r r o r 1
The compilation ends with an error, since the AVR32 compiler doesn’t understand the
-m32 flag. When removing this from the Makefile, the compilation is successful, and the
compiled program runs on the STK1000 card with no problems. Notice that during the
first AVR32 compilation in a folder, many object files are compiled, since the default
ones from Matlab are all i386 specific. These files are only compiled once, so future
compilations will take much shorter time.
4.4
Preliminary Test Conclusion
After doing these tests it was concluded that the AVR32 processor can be used in a control
system, even if the floating-point performance wasn’t impressive. This weakness implies
4.4. PRELIMINARY TEST CONCLUSION
17
that use of floating-point has to be minimized whenever possible. In situations where it’s
impossible or hard to avoid using floating-point, it can be used, even if it means that the
effectiveness of the program is reduced.
The timer test gave a good result, and these timers will be used through the thesis. They
give good precision for timers down to 1ms. The AVR32 will probably be best suited
for control systems with higher periods than 1ms, because of the slow clock and poor
floating-point performance. The last test in this chapter confirmed that the AVR32 can
run code generated by Matlab RTW, after a few modifications.
18
CHAPTER 4. PRELIMINARY TESTS OF AVR32
Chapter 5
Preliminary tests of I/O-card
2.1.2 describes why control systems need I/O, specially analog I/O. Since the STK1000
don’t have any analog I/O, a I/O-card was developed. This chapther performs test to find
out if the chosen ATmega128 microcontroller is able to work as a controller for the I/Ocard, and if the SPI-bus is useable as communication between STK1000 and the I/O-card.
5.1
5.1.1
AVR Microcontroller
ATmega128
An ATmega128[1] microcontroller was used to control the I/O-card. This is a 8-bit microcontroller from the AVR family from Atmel Norway. ATmega128 is a 64-pin microcontroller with 128kB flash and 4096B SRAM, making it one of the AVRs with highest
specification. Some of the features of the ATmega128 are shown below.
◦ 8-channel 10-bit ADC (analog input).
◦ 2-channel 16-bit PWM (Pulse Width Modulator) timers with 3 subchannels each.
These can be used as analog output.
◦ 2 8-bit timers.
◦ 2 USARTs that can be converted RS-232.
◦ Several external interrupts.
◦ SPI (Serial Peripheral Interface).
◦ TWI (Two-Wire Interface).
◦ Several general digital I/O pins (digital I/O).
With these built-in features, there was no need for extra analog I/O components. This
microcontroller could do both the communication with the STK1000 board and the actual
I/O. This made the design of an I/O card easier.
20
CHAPTER 5. PRELIMINARY TESTS OF I/O-CARD
5.1.2
STK500/501
The STK500[9] is an AVR development board that is well suited for early stage development of AVR microcontrollers. To use this board with the ATmega128 model, it’s
necessary to use the expansion module STK501, which supports 64 pins surface mounted
AVRs. When using STK500/501 all the pins of the used AVR are available as headers,
and all the basic components that the AVR often uses like clock source and RS-232 circuit
are ready to use.
This development board was used to test how different features of ATmega128 could be
used before making a prototype I/O-card. These test helped minimizing the number of
design errors on the prototype.
5.2
Analog input
Analog input are used to measure the voltage of signals, and are done with ADCs (AnalogDigital Converter). These are important for a control system, to receive measurement data
from sensors. The I/O-card will use the ADC on the ATmega128. This is a 8-channel
10-bit ADC that can measure the voltage between two pins or between a pin and ground.
This ADC can convert voltages between GN D and AVCC (analog supply).
5.2.1
Test of ATmega128 ADC
The ADC of ATmega128 was tested by connecting different voltages from STK1000 (2.5V ,
3.3V and 5V ) to one of the analog in channels. The code below starts an ADC conversion
and shows the result (8 MSB) on the LEDs after it was completed. Table 5.1 on the next
page shows the results.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
// I n c l u d e s .
#include <a v r / i o . h>
// Macros f o r b i t o p e r a t i o n s .
#define s e t b i t ( reg , b i t ) ( r e g |= ( 1 << b i t ) )
#define c l e a r b i t ( reg , b i t ) ( r e g &= ˜ ( 1 << b i t ) )
#define t e s t b i t ( reg , b i t ) ( r e g & ( 1 << b i t ) )
i n t main ( )
{
// D i r e c t i o n o f p o r t s .
DDRC = 0 x f f ;
c l e a r b i t (DDRF, 0 ) ;
// I n i t i a l i z e ADC.
ADMUX = (1<<REFS0) | (1<<ADLAR) ;
ADCSRA = (1<<ADEN) | (1<<ADPS2) | (1<<ADPS1) ;
// S t a r t c o n v e r s i o n .
s e t b i t (ADCSRA, ADSC) ;
// Wait f o r c o n v e r s i o n .
while ( ! t e s t b i t (ADCSRA, ADIF) ) ;
// S e t r e s u l t as o u t p u t t o LEDs .
PORTC= ADCH;
}
5.3. ANALOG OUTPUT
Voltage
2.5V
3.3V
5V
21
Table 5.1: Results of ADC test
Multimeter voltage ADC result (8 bit) ADC result in voltage
2.50V
113
2.21V
3.27V
136
2.66V
5.00V
210
4.12V
As seen in table 5.1, the results from the ADC were not very accurate. All results were
80% − 90% of the correct value. It might be because of an error with the STK500/501
card or maybe the ATmega128.
5.3
Analog Output
Analog output is used to make an analog voltage. This is important for control system, so
they are able to control actuators. The I/O-card will use PWM (Pulse-Width Modulation)
of the ATmega128 to generate an analog signal. PWM is a digital signal with a constant
frequency and a controllable duty-cycle. The duty-cycle is a value that describes how
much of the period the digital signal is high. A 50% duty-cycle means that the signal is
high half of the periode, then low the rest of the periode, and will look like square-wawe
signal.
5.3.1
Generating Analog Signal from PWM
A low-pass filter is also called an “averaging” filter, and it will convert the PWM signal into
an analog voltage equal to the average voltage of the PWM-signal. This analog voltage can
be set by varying the duty-cycle of the PWM, making this a digital-to-analog conversion
(DAC). An example of a PWM-signal before and after a first-order low-pass filter are
shown in figure 5.1 on the next page. As all the figures describing PWM signals shows
what happens when a PWM duty-cycle increases from 0% to 50%, which is the same as
the DAC increases it’s value from 0V to 2.5V .
5.3.2
Quality of Analog Signal
The quality of an analog signal made with a PWM can be described with two values.
The ripple is how much the output varies, and the response-time is how fast the output
change when the duty-cycle change. The second-order filter in figure 5.2 on the following
page has ripple marked with green. The ripple are measures as the amplitude of the
signal between the green dotted lines, in the figure about 0.15V . The response time are
defined throughout this report as the time used to increase from 0V to 2V when the DAC
increases from 0V to 2.5V . This are marked with red in the figure and is about 300µs.
There are many factors that influence the ripple and response time of the DAC, and these
are explained below.
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CHAPTER 5. PRELIMINARY TESTS OF I/O-CARD
5.5
first−order filter
PWM
5
4.5
4
Volt
3.5
3
2.5
2
1.5
1
0.5
0
0
1
2
3
4
Time
5
−4
x 10
Figure 5.1: PWM signal and PWM signal with first-order low-pass filter.
5
4.5
4
3.5
Volt
3
2.5
2
1.5
1
0.5
0
0
0.2
0.4
0.6
Time
0.8
1
−3
x 10
Figure 5.2: PWM signal and PWM signal with first-order low-pass filter.
5.3. ANALOG OUTPUT
23
Figure 5.3: First order low-pass passive filter
5
RC = small
RC = large
4.5
4
3.5
Volt
3
2.5
2
1.5
1
0.5
0
0
0.2
0.4
0.6
Time
0.8
1
−3
x 10
Figure 5.4: PWM signal filtered with filters with different Time constants (RC)
5.3.3
Time constant (RC)
A simple passive1 low-pass filter consists of a resistor and capacitors as shown in figure 5.3.
The time constant (RC) of the filter is the product of the resistance and capacitance of
these two components, and it describes how the filter works.
When using a low-pass filter to convert a PWM-signal to an analog signal, the time
constant defines the response time of the DAC. A low time constant will give a “fast”
filter, while a high time constant will give a “slow” filter. A fast filter will increase the
ripple of the analog signal. Figure 5.4 shows how two second-order filters with different
time constants (RC) filters the same PWM-signal.
1
A filter is passive if it only consists of passive components like resistors, capacitors and inductors.
Passive filters can’t amplify signals, only filter out the unwanted frequencies.
24
CHAPTER 5. PRELIMINARY TESTS OF I/O-CARD
5
8−bit resolution
12−bit resolution
4.5
4
3.5
Volt
3
2.5
2
1.5
1
0.5
0
0
0.5
1
Time
1.5
2
−3
x 10
Figure 5.5: 8-bit and 12-bit DAC with equal filters.
5.3.4
Frequency and Resolution
The frequency of the PWM-signal depends on the clock frequency of the device (the microprocessor) that makes the PWM and the resolution of the DAC. Equation 5.1 describes
how the frequency of the PWM-signal can be calculated.
fP W M =
fclock
2bits
(5.1)
A high PWM frequency will give lower ripple than a low PWM frequency. This means
that increasing the resolution will increase the ripple. Figure 5.5 shows a 8-bit and a 12-bit
resolution DAC filtered with the same filter. It shows that the response time is about the
same for both, but the 12-bit resolution result has significant ripple.
5.3.5
Order of low-pass Filter
By adding several first-order filters after each other, a higher order filter is created. The
second filter will then filter the result of the first filter and so on. Figure 5.6 on the next
page shows a DAC with equal (same RC) filters of different orders, and it shows that each
filter reduces ripple but increases response time.
5.3.6
Test of ATmega128 PWM as DAC
5.3.1 explains how a PWM-signal can be used to make an analog voltage. This should be
possible to do with the ATmega128 since it has several timers that can be used as PWM.
Timer 1 and 3 was used for this, since these have changeable resolutions up to 16 bits.
5.3. ANALOG OUTPUT
25
5
third−order filter
second−order filter
first−order filter
4.5
4
3.5
Volt
3
2.5
2
1.5
1
0.5
0
0
1
2
3
Time
4
5
−4
x 10
Figure 5.6: DAC with equal (same RC) first, second and third-order filters.
The STK500/501 board was used to test the PWM. This was done by starting PWM on
the different outputs, while probing them with an oscilloscope.
The code below starts a 10-bit PWM-signal with 50% duty-cycle to the first output of
timer 1. This should give a square-signal with a frequency given by the equation 5.2 on
the following page.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
// I n c l u d e s .
#include <a v r / i o . h>
i n t main ( )
{
// S e t t h e t i m e r 1A as o u t p u t .
s e t b i t (DDRB, 5 ) ;
// S e t t h e c o n t r o l r e g i s t e r s f o r PWM t o f a s t PWM, w i t h no p r e s c a l e r and c l e a r
output
// on compare match ( non−i n v e r t i n g mode ) .
TCCR1A =(1<<COM1A1) | (1<<COM1B1) | (1<<COM1C1) | (1<<WGM11) ;
TCCR1B = (1<<WGM13) | (1<<WGM12) | (1<<CS10 ) ;
// S e t r e s o l u t i o n o f PWM t o 1 0 .
ICR1H = 0 x03 ;
ICR1L = 0xFF ;
// S e t 50% d u t y c y c l e .
OCR1AH = 0 x02 ;
OCR1AL = 0 x00 ;
}
With a 10-bit PWM-timer and a clock frequency of 8M Hz, the PWM-frequency are
calculated in equation 5.2 on the next page. When running this test, the period of the
PWM signal was measured to 130µs on an oscilloscope, that according to equation 5.3 on
the following page is almost the same as the theoretical value.
26
CHAPTER 5. PRELIMINARY TESTS OF I/O-CARD
5.4
fP W M =
8M Hz
= 7.81kHz
210
(5.2)
fP W M =
1
= 7.69kHz
130µs
(5.3)
SPI
To be able to use the I/O-card, the AVR32 needs a way to communicate with it. SPI is
a serial bus that’s often used for communication between different integrated circuits on
the same board. It’s an simple yet effective bus that is full duplex, meaning that data are
transferred in both directions at the same time. Both AVR32 Linux and the ATmega128
supports SPI, and this bus will be used for data transfer between the STK1000 board and
the I/O-card.
Another serial bus called I2C (Inter-Integrated Circuit) or TWI (Two-Wire Interface) was
also considered, and was also supported by AVR32 Linux and ATmega128. This bus does
about the same as SPI, but the differences described in 5.4.1 made the SPI a better choice.
5.4.1
SPI bus
A SPI bus consists of one master and one or more slaves. The master can communicate
with one slave at the time by using the slaves “chip-select” signal. This is different than I2C,
that uses addressing to decide which device that should receive the message. By using
“chip-select” signals the SPI doesn’t need to start each data package with an address,
meaning that a SPI package only contain data, while a I2C package contain an address
and data. This makes SPI more effective when only a few devices uses the bus.
When more devices uses the bus, SPI won’t be a good choice. This is because each device
needs its own “chip-select” signal, meaning a dedicated pin on the master for each of the
slaves. It’s also possible to use an additional component that decodes an address to several
slave select signals.
The SPI bus consists of four types of signals describes below. All the devices on the bus
also needs common ground.
◦ MOSI (Master Out Slave In) sends data from the master to the slave.
◦ MISO (Master In Slave Out) sends data from the slave to the master.
◦ SCK (Serial ClocK) is the common clock sent by the master. Since it’s a common
clock on the bus, the bus is synchronous.
◦ CS (Chip Select) or SS (Slave Select) is a signal that master send to start a transfer
with a slave.
5.5. TEST OF SPI COMMUNICATION BETWEEN AVR32 AND ATMEGA128
27
Figure 5.7: How data are transferred between SPI master and slave.
5.4.2
SPI transfer
When using SPI it’s important to know how the data is transferred. Each device on the
bus has a SPI data register, and during a transfer between two devices the content of their
SPI data registers is exchanged. This is described in figure 5.7. It means that before the
transfer both devices need to place what they want to send in their data register, and after
the transfer the data in the register is the received data. Since data is sent both ways at
the same time, SPI is full duplex.
If the master just wants to send data, not receive, the received data can be dropped. If
the master wants to receive data, a dummy byte2 has to be sent, since the slave can’t send
anything when the master doesn’t.
The slave can’t initialize a data transfer, and this may give some problems. Specially if the
slave has to complete something, and then report back to the master. This can be solved
by letting the master poll3 the slave until it is finished. This will slow down both the
master and slave. A more effective solution is to let the slave trigger an external interrupt
on the master when it’s finished.
5.5
Test of SPI communication between AVR32 and ATmega128
By connecting the STK1000 and STK500 boards, it was possible to test SPI communication between the two processors. It was important to find out if SPI would work before
designing the I/O-card.
2
A dummy byte is a byte that contain data of no value, and is just used to request data from the SPI
slave. The dummy byte can have any value, but should be chosen to a value that the slave won’t believe
is something else.
3
In this context, polling is to periodically ask if something is finished until the answer is yes. This is
not a very sophisticated method, but it’s usually the easiest to use.
28
CHAPTER 5. PRELIMINARY TESTS OF I/O-CARD
Figure 5.8: Image of STK500 and STK1000 with SPI connection
Figure 5.9: SPI wires between STK500 and STK1000.
5.5.1
Hardware setup
SPI signals are available on headers on both STK cards, and they were connected with
short cables, like on the figure 5.8. Figure 5.9 shows which pins on the header that are
used. The signals are connected as follows: MOSI, MISO and SCK should be connected
to the same signal, while the NPCS2 on STK1000 should be connected to the SS signal on
STK500. The two processors must also have common ground to communicate with SPI.
5.5.2
AVR32 as SPI master
As most hardware, the SPI driver can’t be accessed directly from user mode. To make
it possible, a device driver has to be made. 8.2 describes how the device driver for the
5.5. TEST OF SPI COMMUNICATION BETWEEN AVR32 AND ATMEGA128
29
I/O-card was implemented, and the device driver used for this test was similar. During the
test the device driver sends the value 222 to the SPI slave, and it prints out the returned
value.
5.5.3
ATmega128 as SPI slave
SPI with ATmega128 is used by reading and writing three SPI-specific registers. The
control register (SPCR), the status register (SPSR) and the data register (SPDR). How
these registers are used in slave mode is described below.
◦ SPCR
• Bit 0 (SPR0) and bit 1 (SPR1) aren’t used in slave mode
• Bit 2 (CPHA) and bit 3 (CPOL) defines the SPI-mode. The different SPImodes have different timing between the clock signal and the data signals. All
devices using the same SPI-bus need to use the same mode.
• Bit 4 (MSTR) selects slave mode when written to zero.
• Bit 5 (DORD) selects if the LSB or MSB should be sent first during transfer.
All devices using the same SPI-bus should use the same data order, or data
needs to be reversed in software.
• Bit 6 (SPE) turns on SPI for this device.
• Bit 7 (SPIE) turns on SPI-interrupts for this device.
◦ SPSR
• Bit 0 (SPI2X) isn’t used in slave mode
• Bit 1 to 5 are reserved bits.
• Bit 6 (WCOL) is set if the data register is written to during transfer.
• Bit 7 (SPIF) is set when a SPI-transfer is completed. Will trigger an interrupt
if bit 7 of SPCR is high.
◦ SPDR is used both to send and receive data. The data in the register before transfer
will be sent to the master, while the data in the register after transfer is the data
received from the master. Writing or reading to this register clears bit 7 of SPSR.
The simple program below was used, to test the SPI communication. It waits for a SPI
transfer initialized by a SPI master. The slave will send the value 111 to the master and
it will use the LEDs on the STK500 to display the received data. This confirms that the
SPI communication works both ways.
1
2
3
4
5
6
7
8
9
10
// I n c l u d e s .
#include <a v r / i o . h>
i n t main ( )
{
// I n i t i a l i z e SPI .
SPCR = (1<<SPE) ;
DDRB = (1<<3) ;
// I n i t i a l i z e LEDs .
30
11
12
13
14
15
16
17
18
19
20
21
22
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CHAPTER 5. PRELIMINARY TESTS OF I/O-CARD
DDRD = 0 x f f ;
PORTD = 0 ;
// S e t d a t a .
SPDR = 1 1 1 ;
// Wait f o r t r a n s f e r .
while ( ! ( SPSR & (1<<SPIF ) ) ) ;
// Send r e c e i v e d d a t a t o LEDs and l o o p f o r e v e r .
PORTD = SPDR;
while ( 1 ) ;
}
5.5.4
Result
The test of a simple SPI transfer between the two STK boards was successful. This means
that it will be possible to use SPI as communication between AVR32 and an I/O-card. The
highest SPI frequency that worked was measured to about 1.90M Hz with an oscilloscope.
According to the ATmega128 data sheet[1] both the low and high period of the SCK signal
has to be longer than 2 clock cycles. When the clock frequency is 8M Hz this means that
the highest theoretical frequency is 2M Hz, that are close to the measured value.
Chapter 6
Prototype I/O-card
This chapter desribes the design and production of the first of two I/O-card versions
produced during this thesis. The first card is called the prototype card, and was designed
to be ideal for testing and debugging.
6.1
PCB Software
A PCB (Printed-Circuit Board) is an epoxy bonded fiberglass sheet with copper layers that
can be etched or milled off and leave electrical circuits. Most electronics are implemented
on PCBs, and they may have different numbers of layers, and each layer can contain
circuits.
There are a number of different software solutions for designing PCBs. In this thesis the
freeware version of Eagle[4] was used. This program has a limitation on the size of the
finished card, and it can’t design cards with more than two layers. This wasn’t a problem,
since the maximum size (8x10cm) and two layers were enough for the purpose.
6.2
Features
This card was designed to have these features:
◦ ATmega128 with 16 MHz crystal as controller.
◦ JTAG-interface for ATmega128.
◦ Reset button for ATmega128.
◦ RS-232 connection for debugging to a serial port on a workstation.
◦ Header ready to connect to general expansion header on STK1000 with power-supply,
SPI and interrupt signals.
◦ Jumper for choosing between external power-supply and power-supply from STK1000.
◦ 2 AVR32 interrupts that can be triggered from ATmega128.
31
32
CHAPTER 6. PROTOTYPE I/O-CARD
◦ 2 AVR32 interrupts that can be triggered externally.
◦ 2 ATmega128 interrupts that can be triggered externally.
◦ 6 channel 8 to 12-bits analog output.
◦ 8 channel 10-bits analog input.
◦ Common ground for both STK1000 and STK500.
◦ 8 channel digital output.
◦ 8 channel digital input.
◦ SPI signals available on ”debug” header.
6.3
Components
The components used for this card:
◦ ATmega128 microcontroller ([1]).
◦ MAX233 UART to RS-232 IC ([5]).
◦ Two 100nF capacitors for decoupling ATmega128 and MAX233).
◦ Linear voltage regulator (7805) with capacitors ([7]).
◦ 100nF capacitor and 10µH inductor for LC filter on analog supply.
◦ 16M Hz crystal and two 18pF capacitors for crystal circuit for ATmega128.
◦ One button, 10kΩ resistor and 100nF capacitor for reset button for ATmega128.
◦ Six second-order RC-filter for filtering PWM signal to analog value. Two resistors
and two capacitors for each filter.
◦ 3 operational amplifiers (MC1458) ([6]).
◦ Screw clamps for connecting different signals.
◦ 2x5 male header for JTAG connection.
◦ 2x18 male header for STK1000 connection.
◦ 1x3 male header with jumper for power-supply selection.
◦ 1x8 header for debug signals.
6.4
Schematic
The schematic of a circuit is a logical representation of how the different parts connects
to each other. When designing a circuit, it’s normally best to start with this. The whole
schematic are in the appendix B.1. Different sections of the circuit are presented below.
Be aware that these are the orignal schematics of the prototype, and have errors described
in 6.7.
6.4. SCHEMATIC
33
Figure 6.1: Power circuit
Figure 6.2: Reset, crystal and analog reference circuits for ATmega128
6.4.1
Power Circuit
Figure 6.1 shows the Power circuit used for the I/O-card. To the left are the power jack
connector, for connecting a AC/DC adapter. In the bottom right corner, there is a linear
voltage regulator 7805[7] that gives out a stable 5V voltage source. This component needs
a capacitor on both input and output to work properly. On the top there is a 3-pin header.
A jumper is used to choose what kind of voltage source the rest of the card will use, either
the output from the voltage regulator or the 5V signal from the STK1000 card.
34
CHAPTER 6. PROTOTYPE I/O-CARD
Figure 6.3: JTAG header and analog input connectors
6.4.2
Reset, Crystal and Analog Supply Circuit
Figure 6.2 on the previous page shows the reset, crystal and analog reference circuits for
the ATmega128. The reset circuit provides a button that will “pull-down” the active-low
reset port of the microcontroller when pushed. This will reset the processor. This circuit
also has a “pull-up” resistor that makes sure the reset port is high when the button isn’t
pushed.
The crystal circuit was made to give the ATmega128 a stable and high frequency clock
source. The main reason for this is that a higher clock frequency will make the PWM
signal better suited as a base for making analog out signals.
The analog supply is necessary to make the ATmega128 able to read analog input signals.
The crystal and analog supply circuits are implemented after specification given in the
ATmega128 data sheet [1].
6.4.3
JTAG header and Analog Input Connectors
Figure 6.3 shows the JTAG header for the ATmega128 and screw clamps for the analog
input signals. The JTAG header was added to allow a AVR JTAG ICE (either original
or mk2) to connect, program and debug the ATmega128. The analog input screw clamps
was mounted at the side of the I/O card, and makes it easy to connect wires with analog
signals to the ADC of the ATmega128. Four of ATmega128s ports was used both by the
JTAG header as analog input. This shouldn’t be a problem as long as no analog signals
are connected to these ports when using the JTAG header.
6.4. SCHEMATIC
35
Figure 6.4: RS-232 circuit and digital output connectors
6.4.4
RS-232 circuit and Digital Output Connectors
Figure 6.4 shows a circuit for RS-232 interface for ATmega128 so it can connect to a serial
cable on a PC. The microcontroller has two UART signals, and one of these was converted
into a RS-232 signal with the MAX233 ([5]) from Maxim. This signal was made available
on a 9-dsub connector, that connects to a normal serial cable.
The figure also shows screw clamps for digital out signals of the I/O-card. Like the analog
in, these will be placed on the edge of the card.
6.4.5
STK1000 headers and Digital Input Connectors
Figure 6.5 on the following page shows the circuit for STK1000 headers and digital in
signals (same as for digital output). A 36 pin header are used to connect to one of the
expansion headers on the STK1000 board. This header includes signals for SPI, interrupts
and ground. The I/O-card can also draw power from the 5V source from STK1000. Two
of the interrupts are connected directly to the ATmega128, and two are available on screw
clamps.
To make debugging simpler, a header was placed on the card that had pins for the different
SPI signals. These pins makes it easy to probe these signals and look at them on an
oscilloscope.
6.4.6
Decoupling Capacitors and VCC/GND Connectors
Figure 6.6 on the next page shows a small but important part of the I/O-card. This is the
two capacitors that are used for decoupling the ATmega128 and MAX233. Decoupling is
important since it ensures that these ICs gets a stable power supply. The figure also shows
36
CHAPTER 6. PROTOTYPE I/O-CARD
Figure 6.5: STK1000 headers and digital input connectors
Figure 6.6: Decoupling capacitors and VCC/GND connectors
6.4. SCHEMATIC
37
Figure 6.7: Analog out circuit
two screw clamps that has VCC and GND signals. These signals are available for devices
connecting to the I/O card, and are necessary because all I/O signal needs a reference.
6.4.7
Analog Output Circuit
Figure 6.7 shows the filters and operational amplifiers (op-amp) that are used to convert the
PWM-signal into an analog voltage. Each of the 6 analog output subchannels has its own
second-order passive low-pass filter, that smooth the PWM signal to a constant analog
voltage between 0V and 5V . These filters consists of two resistors and two capacitors
each. The 6 subchannels can have different filters, and since this is a prototype card, it’s
imperative that several different filters are tested.
The reason for choosing a second-order filters are that it will give a good compromise
between ripple, response and physical size. A first-order filter would give too much ripple,
while a higher order filer would take too much physical space. Figure 6.8 on the next page
shows that by using different cut-off frequencies it’s possible to get similar behavior from
a second and a third order filter. This means that higher order filter not necessarily gives
a better result.
After each filter, an op-amp circuit is placed. These are voltage followers, which means that
their output voltage is the same as their input voltage. They are not used for amplifying
the voltage, but they are used to amplify the current, since an op-amp can supply a
lot more current than an ATmega128 can. The op-amps high input impedance, means
that the current flowing from the ATmega128, through the filter and to the op-amp are
minimal. This is important since the properties of passive filters depends on the current
flowing through. High current, will mean a high voltage loss in the resistors of the filter.
38
CHAPTER 6. PROTOTYPE I/O-CARD
5
third−order filter
second−order filter
4.5
4
3.5
Volt
3
2.5
2
1.5
1
0.5
0
0
1
2
3
Time
4
5
−4
x 10
Figure 6.8: Second-order and third order low-pass filters with equal ripple and response
time
6.5
Layout
The layout of a circuit is a representation of how the different parts are placed on a PCB,
and how the copper layers should be etched. To ensure that the parts are connected the
same way as in the schematics, Eagle uses the schematics as a template. When making
the layout, it’s important to make the connections between the different parts as straight
and short as possible. This will make assembly easier and it will minimize noise problems.
Figure 6.9 on the facing page shows the top side of the first prototype, and figure 6.10
on the next page shows the bottom side. Below are some important design choices are
commented.
◦ The ATmega128 was placed on the bottom layer. This was because it’s a surfacemounted device, and many of its pins were connected to parts that isn’t surface
mounted. By placing it on the bottom, the number of vias 1 was reduced, since most
signals started and ended up on the same layer.
◦ All the digital I/O, analog I/O and external interrupts was connected to screw
clamps, to give easy access to them and the ability to connect wires easily. This did
unfortunately take a lot of space on the card.
◦ Only the ATmega128 was a SMD. This was done to make it easier to debug and to
make small changes to the board. The final version of the card, should use more
SMD components, since it will allow a smaller layout.
1
Vias are small metal cylinders that can be placed inside a hole on the PCB. This allows electrical
connection between top and bottom layer. Vias should be avoided when possible, since they increase
assembly time and noise.
6.5. LAYOUT
39
Figure 6.9: Top layer of prototype card. (Not to scale)
Figure 6.10: Bottom layer of prototype card. (Not to scale)
40
CHAPTER 6. PROTOTYPE I/O-CARD
◦ The analog signals were kept as isolated as possible from the digital signals. This is
because fast changing digital signals can induce noise on analog signals. The analog
signals was also placed directly above or below a ground plane to protect them.
These ground planes only had a minimal connection to the rest of the ground plane.
6.6
Assembly and test
The layout from 6.5 was used to etch a PCB card. The rest of the card was assembled by
soldering the components on to the PCB. The assembly of the card should be done step
by step, and each step should be tested before moving to next step. By doing this, each
part of the circuit can be tested as isolated as possible. And it’s also possible to know,
to a certain degree, that the components that are assembled and tested are working as
planned.
6.6.1 to 6.6.6 describes the steps of he assembly, and the tests done after completing each
step. Before soldering anything to the card, the card should be disconnected from the
STK1000 card and from power supply. While soldering it’s easy to make short circuits,
which should be avoided.
6.6.1
Power Regulator Circuit
The power regulator circuit consists of a power jack, a voltage regulator, two capacitors
and a 3 pin header used for selecting power supply. It was tested by connecting a 9V
source to the power jack, and selecting external power supply. The output voltage was
measured to 5.0V , which means that the voltage regulator are working.
6.6.2
ATmega128 and JTAG Interface
After soldering the ATmega128, it’s important to check that there are no short circuits
between its pins. After checking this thoroughly, the JTAG header and decoupling capacitor was connected. The different functions of the ATmega128 will be tested when they
are needed. The first test was to connect to the ATmega128 through the JTAG-interface.
The avrdude command below connects to the ATmega128 and writes some info about
it. This command returned correct information about the ATmega128, which means that
basic operations of the ATmega128 works, and that the JTAG interface is able to program
it.
sudo avrdude −P usb −pm128 −c j t a g 2 −v
6.6.3
Crystal Circuit
The crystal circuit consists of a crystal (16MHz) and two capacitors. To use this circuit, the
fuse bits2 of the ATmega128 has to be changed. The avrdude command below does this.
2
Fuse bits are bits in AVR microcontrollers memory that defines clock source and other important
characterisitcs of the AVR. These can be written are read with a programming toll like the JTAG.
6.6. ASSEMBLY AND TEST
41
When starting up the ATmega128 with the crystal circuit and new fuse bits, the crystal
pins were probed with an oscilloscope. The result was a sinus signal with a frequency of
16M Hz, which means that the crystal circuit works.
sudo avrdude −P usb −pm128 −c j t a g 2 −U l f u s e : w: 0 xFE :m −U h f u s e : w: 0 x89 :m −U e f u s e : w: 0
xFF :m
6.6.4
RS-232 and Reset Circuits
These two elements were best to test together. The RS-232 circuit consists of the MAX233
IC and a 9 dsub connectors (connector used by serial port of a standard computer). The
reset circuit consists of a button, a resistor and a capacitor. The RS-232 circuit was tested
by sending a byte of data from the card, when it was connected to the workstation with a
serial-cable. The code below sends one byte with a baud rate of 19.2kbps. When running
this code, the workstation received the byte when using a program like minicom. The
reset circuit worked since the same byte was received by the workstation each time the
reset button was pressed.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
// I n c l u d e s .
#include <a v r / i o . h>
i n t main ( )
{
// S e t d i r e c t i o n r e g i s t e r s
s e t b i t (DDRD, 3 ) ;
c l e a r b i t (DDRD, 4 ) ;
// BAUD r a t e = 1 9 . 2 k
UBBR1H = 0 ;
UBBR1L = 5 1 ;
// Enable b o t h t r a n s m i t and r e c e i v e
UCSR1B = (1<<RXEN1) | (1<<TXEN1) ;
// Use 8 b i t data , no p a r i t y and 2 s t o p b i t s .
UCSR1C = (1<<UCSZ11 ) | (1<<UCSZ10 ) | (1<<USBS1 ) ;
// S t a r t s e n d i n g by w r i t i n g t o t h e send d a t a r e g i s t e r .
UDR1 = ’A ’ ;
6.6.5
Headers for STK1000 and debugging
These headers were tested by connecting the header to the general expansion header (J29)
on the STK1000 board, and try the same test as in 5.5. Since the SPI communication also
worked through the header, it meant that the header are connected properly. To check if
the STK1000 can be used as power supply for the I/O card, the jumper was from external
power supply to STK1000. This worked, which meant that the STK1000 can supply the
ATmega128 with power.
6.6.6
ADC Supply Filter
The filter for the ADC supply is a LC-filer, and it’s used to filter out digital noise, so
the analog reference is kept as stable as possible. This is to ensure that the analog in is
42
CHAPTER 6. PROTOTYPE I/O-CARD
as accurate as possible. On this prototype card, the inductor of the LC-filter was short
circuited, since no inductor of correct value was available. The inductor works as a short
circuit for DC current, but it stops AC current. So replacing the inductor with a short
circuit will just make the filter stop high frequency noise less effective.
6.6.7
Analog Output Circuit
The analog output circuit was assembled with different filters, that were used to find a
filter for the final I/O-card. 9.2.2 describes the different filters that were tested and the
results.
6.7
Errors in Schematic
During the assembly and test of the prototype, the following errors was found in the design.
◦ VCC of the JTAG-interface wasn’t connected to the VCC of the board.
◦ The operational amplifiers don’t work as they should, see 9.2.
◦ The 9-dsub connector for the RS-232 connection weren’t connected correctly. Pin
number 5 should be connected to ground, and the cable shield shouldn’t.
Chapter 7
Design of I/O-card Software
This chapter describes the design of the different parts of the system, and how these should
work togeter. The system consists of firmware running on the I/O-card, a device driver
running in kernel mode in AVR32 Linux and a user mode driver that makes user mode
programs able to use the I/O-card.
7.1
Communication Protocol
The communication between the AVR32 (master) and the ATmega128 (slave) uses SPI,
and it’s a very central part of the system. Before designing the software a protocol was
designed to define the rules of communication between the master and slave. Below are
some terms that are used in the description of the protocol.
◦ A “transfer” is a single exchange of data between the master and the slave.
◦ A “command” is a task the master wants the slave to do.
◦ A “message” is a set of transfers that makes sure that the slave receives a command,
and returns data if necessary.
◦ A “message structure” is the way the set of transfers are organized in a message.
The message structure also makes sure that an error in one of the transfers will be
detected.
7.1.1
Commands
The protocol has a number of defined commands. Some of them are data commands, that
are used by the master to either read an input or write to an output of the I/O-card.
Another type of commands are control command that change the internal settings of the
I/O-card.
One of the commands listed here are marked with “buffering only”, which means that it
will only be used in one of the two possible solutions defined in 7.2.2.
Data commands:
43
44
CHAPTER 7. DESIGN OF I/O-CARD SOFTWARE
◦ Get analog input is the command for reading an analog value.
◦ Set analog output is the command for writing an analog value.
◦ Get digital input is the command for reading all of the 8 digital input channels at
once.
◦ Set digital output is the command for writing one or more of the 8 digital output
channels.
Control commands:
◦ Set analog input enable is the command for enabling/disabling an analog input channel. (buffering only)
◦ Set analog output resolution is the command for changing the resolution of an analog
output channel.
7.1.2
Message Structure
The communication protocol also defines two message structures that a message containing
a command has to follow. There are two structures because commands that send data to
the slave (set digital output) will need a slightly different message structure than those
requesting data from the slave (get digital input). None of the commands are required to
both send and request data from the slave.
If either the master or the slave fail to send the bytes required during all the transfers of
a message, the part that detected the error will stop sending, and the other part will then
be aware the error. This ensures that both parts will know if something went wrong while
sending the message.
Figure 7.1 describes the message structure for commands where the master sends data.
The message structure is further described below.
◦ The synchronization phase has to make sure that both the master and slave are ready
for the command, and that they are synchronized. If not synchronized it’s possible
that the slave will interpret the data the master sends wrongly. To synchronize, the
master initially sends the command code from 7.1.4. If the slave returns a code that
confirms it’s ready for transfer, then the synchronization was successful. If it returns
something different, then the master has to keep sending the code until the slave
returns the ready code. In figure 7.1 this is represented by the first message, which
is unsuccessful, since the slave returns something unknown. The second transfer is
successful, since the slave returns the ready code.
◦ In the master data phase, the master sends data to the slave. Every time the
master sends a new byte to the slave, the slave will return an acknowledgment of
the previous byte sent by the master. How an acknowledgment works is explained
in 7.1.3. When the master sends the first data byte, then the slave will return an
acknowledgment of the code it received during the synchronization period. When
the master has sent all the data defined by the command, it sends a dummy byte to
retrieve acknowledgment of the last data byte. If any of the acknowledgments were
wrong, the master will abort the command.
7.1. COMMUNICATION PROTOCOL
45
Figure 7.1:
◦ If nothing goes wrong during the message, both master and slave will get to the
confirmation phase at the same time. Then the master will send an “master OK”
code, and the slave will return an “slave OK” code. After a successful exchange
of “OK” codes, both the master and the slave can be sure that the message was
successfully transferred. For commands where the master sends data, it’s especially
important that the slave get confirmation that the data it received was correct.
The interface for requesting data from the slave is similar to that just described. It is
described in figure 7.2, and has three phases that are described below:
◦ The synchronization phase is almost identical to that in the sending structure. The
difference is that after the master sends the code, it has to send a dummy byte to
retrieve the acknowledgment of the code.
◦ The slave data phase are similar to the master data phase in the sending structure.
But since the slave sends data, the master has to retrieve the first byte by sending a
dummy byte. Then it will send an acknowledgment for the first byte, and the slave
will return the second byte, and so on. When the master sends an acknowledgment
for the last byte, the slave will return a dummy byte, and the slave data phase is
ready.
◦ The confirmation phase is the same as for the sending interface.
Both of these structures will have the following advantages:
◦ All bytes sent by both master and slave are sent back as acknowledgments and
checked.
◦ Since the communication is full-duplex, the interfaces defined here won’t use more
than one or two SPI transfers than similar interfaces without acknowledgments would
use.
◦ Several of the bytes received both by the master and slave are known, and can
46
CHAPTER 7. DESIGN OF I/O-CARD SOFTWARE
Figure 7.2:
therefor be checked for errors.
7.1.3
Acknowledgments
When either the master or the slave receives data, they will return an acknowledgment
during the next transfer as explained in 7.1.2. This is to detect errors that either breaks
the synchronization between the master and the slave, or errors during transfer of data.
To be able to tell if the correct data was received, the acknowledgment returns the received
data back the the sender. The natural choice would be that the acknowledgment would
have the same value as the original data. This proved to be a bad idea, because of the way
SPI works. SPI uses one data register for both sending and receiving. If this register isn’t
deleted after a transfer, the previously received byte will be sent during the next transfer.
This means that an acknowledgment consisting of the original data would fail. Therefore
the acknowledgment is always the original byte increased by one. If the original byte had
the value 255, then the acknowledgment would be zero.
7.1.4
SPI codes
Each message begins with the master sending a code to the slave. This code tells the
slave what kind of command the message contain, and information about channel and
subchannel if needed. The code consists of 1 byte (8 bits), where the first 5 bits are
reserved for identifying the command, and the last three bits are for identifying channels
and subchannels. The header file spiByteCodes.h below has constants and macros for
7.1. COMMUNICATION PROTOCOL
47
easy usage of these codes. It also contains comments that explain what the different bits
in the code means.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
#i f n d e f SPI BYTES CODES
#define SPI BYTES CODES
/∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗
∗ The code b y t e s a r e g e n e r a t e d t h e f o l l o w i n g r u l e s .
∗
∗ − No code can have t h e v a l u e 0 , b e c a u s e t h a t s used as dummy b y t e .
∗ − B i t 7 (MSB) :
∗
− E q u a l s 0 f o r commands t h a t s e n d s or r e c e i v e s d a t a .
∗
− E q u a l s 1 f o r c o n t r o l commands .
∗ − Bit 6:
∗
− E q u a l s 0 f o r commands f o r d i g i t a l IO .
∗
− E q u a l s 1 f o r commands f o r a n a l o g IO .
∗ − Bit 5:
∗
− E q u a l s 0 f o r commands f o r o u t p u t .
∗
− E q u a l s 1 f o r commands f o r i n p u t .
∗ − B i t 4 and 3 :
∗
− Equals normally 11.
∗
− Can have o t h e r v a l u e s i f b y t e s 5−7 i s t h e same f o r m u l t i p l e commands .
∗ − B i t 2 t o 0 (LSB) :
∗
− For a n a l o g out , b i t 2 e q u a l s c h a n n e l and b i t 0−1 e q u a l s s u b c h a n n e l .
∗
− For a n a l o g in , b i t 0−2 e q u a l s c h a n n e l .
∗
− For d i g i t a l IO , b i t 0−2 e q u a l s 0 0 0 .
∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗/
// c o d e s
#define SLAVE READY
#define SLAVE OK
#define MASTER OK
#define DUMMY
0 xaa
0 x11
0 x22
0 x00
/∗
/∗
/∗
/∗
10101010
00010001
00100010
00000000
∗/
∗/
∗/
∗/
// Data
#define
#define
#define
#define
#define
#define
0 x78
0 x68
0 x70
0 x58
0 x38
0 x18
/∗
/∗
/∗
/∗
/∗
/∗
01111000
01101000
01110000
01011000
00111000
00011000
+ ch ∗/
+ ch ∗/
+ ch ∗/
+ ch<<2 + s c h ∗/
∗/
∗/
command c o d e s .
CODE AIN
CODE AIN REQ
CODE AIN RET
CODE AOUT
CODE DIN
CODE DOUT
// C o n t r o l command c o d e s .
#define CODE AIN EN
#define CODE AOUT RES
0 x f 8 /∗ 11111000 + ch ∗/
0 xd8 /∗ 11011000 + ch>>2 ∗/
// Macros f o r f i n d i n g c h a n n e l s from c o d e s .
#define CODE TO CH AIN( code )
( code & 0 x7 )
#define CODE TO CH AOUT( code )
( ( code & 0 x4 ) >> 2 )
#define CODE TO SCH AOUT( code )
( code & 0 x3 )
// Macros f o r f i n d i n g c o d e s from
#define CH TO CODE AIN( ch )
#define CH TO CODE AIN EN( ch )
#define CH TO CODE AIN REQ( ch )
#define CH TO CODE AIN RET( ch )
#define CH TO CODE AOUT( ch , s c h )
#define CH TO CODE AOUT RES( ch )
channels .
(CODE AIN + ch )
(CODE AIN EN + ch )
(CODE AIN REQ + ch )
(CODE AIN RET + ch )
(CODE AOUT + ( ch << 2 ) + s c h )
(CODE AOUT RES + ( ch << 2 ) )
#endif //SPI BYTES CODES
All the codes are unique, and they are also different from the other special bytes that
are used during SPI messages. This includes the SLAVE_READY, MASTER_OK, SLAVE_OK and
DUMMY. This means that the error-checking used in the message will be more effective, since
each code only has one meaning.
48
CHAPTER 7. DESIGN OF I/O-CARD SOFTWARE
Figure 7.3: Activity diagram for SPI on ATmega128
7.2
7.2.1
ATmega128 Firmware
SPI commands
The main task for the ATmega128 is to listen for commands from the AVR32, and do
what these commands tells it to do. 7.1.2 defines the message structure used by AVR32
to give commands. Figure 7.3 is an activity diagram that describe what the ATmega128
has to do when receiving a message. This activity diagram is divided in four phases, each
corresponds to one of the different phases of the structure.
◦ Synchronization phase
7.2. ATMEGA128 FIRMWARE
49
• Activity 1.1 sets the SPI data register (SPDR) to the “Slave ready” code. The
data in this register will be sends to the master during the next SPI transfer.
• Activity 1.2 waits until the next SPI transfer.
• Decision point 1A validates the received data, and check if it’s one of the codes
defined in 7.1.4. This code tells the slave what kind of command the message
contains. Depending on the type of message, the next activity will either be
1.3 (slave sends) or 2.1 (master sends).
• Activity 1.3 sets the SPI data register to an acknowledgment of the code.
• Activity 1.4 waits until the next SPI transfer.
• Decision point 1B checks if the received byte is a dummy byte. No dummy byte
means that the message failed.
◦ Master data phase
• Activity 2.1 sets the SPI data register to an acknowledgment of the code.
• Activity 2.2 waits until the next SPI transfer.
• Activity 2.3 saves the received data in the appropriate variable.
• Activity 2.4 sets the SPI data register to an acknowledgment of the received
data.
• Decision point 2A checks if the slave expects more data. The slave knows this,
because the number of data bytes are always the same for the same type of
command. Further, the type of command is known because of the code.
• Activity 2.5 waits until the next SPI transfer.
• Decision point 2B checks if the received data was a dummy byte. No dummy
byte means that receiving the message failed.
◦ Slave data phase
• Activity 3.1 sets the SPI data register to the first data the slave wants to send.
• Activity 3.2 waits until the next SPI transfer.
• Decision point 3A checks if the received data was a dummy byte. No dummy
byte means that receiving the message failed.
• Decision point 3C checks if there is more data that should be sent, as in the
master data phase, the number of bytes is defined by the type of command.
• Activity 3.3 sets the SPI data register to the next data the slave wants to send.
• Activity 3.4 waits until the next SPI transfer.
• Decision point 3B checks if the received data was an acknowledgment of the data
the slave sent during the transfer before the recent transfer. No acknowledgment
means that receiving the message failed.
• Activity 3.5 sets the SPI data register to be a dummy byte, since no data should
be sent from the slave during the next transfer.
50
CHAPTER 7. DESIGN OF I/O-CARD SOFTWARE
• Activity 3.6 waits until the next SPI transfer.
• Decision point 3D checks if the received data was an acknowledgment of the
last data the slave sent. No acknowledgment means that receiving the message
failed.
◦ Confirmation phase
• Activity 4.1 sets the SPI data register to the “Slave OK” code. This tells the
master that the slave didn’t discover any errors during the message.
• Activity 4.2 waits until the next SPI transfer.
• Decision point 4A checks if the received data is the “Master OK” code, which
will confirm that the message was sent without errors.
7.2.2
Analog Input
The analog to digital conversion inside the ATmega128 is an operation that takes 13
ADC clock cycles. The ADC clock has to be between 50kHz and 200kHz, to do a 10
bits conversion. By using a prescaler of 128 the ADC will get a frequency calculated
in equation 7.1. With this frequency an ADC conversion will take 104µs as shown in
equation 7.2 and 7.3. This means that the ADC conversion will take a considerable
amount of time, and the ATmega128 will not be able to do the conversion during a SPI
message if the AVR32 doesn’t wait for it.
fµC
= 125kHz
128
1
= 8µs
TADC =
fADC
= 13 ∗ TADC = 104µs
fADC =
Tconversion
(7.1)
(7.2)
(7.3)
To solve this problem, two solutions were developed. The first solution is to use interrupts.
This is normally the best way to solve problems when a processor has to wait while another
(often I/O) computer component completes its task. When the task is completed an
interrupt is sent to the processor, and the it can retrieve the result.
The second solution is to let the ATmega128 know which analog input channels that are
in use. It can then continuously convert the analog values of these channels into digital
values and store them in a buffer in memory. When the master wants to read an analog
input channel, the slave can just return the previously converted result. This solution is
possible to use, since the analog to digital conversion is a separate part of the ATmega128.
Meaning that the normal code will continue to run as usual during the analog conversion.
The only overhead is saving the results and start new conversions.
The two solutions, called interrupt mode and buffering mode, will both work, but have
some different advantages, shown below.
◦ Interrupt mode will always return a newly converted result, while buffering mode
may return an older result.
7.3. DEVICE DRIVER
51
Figure 7.4: Describing the different components
◦ Buffering mode will return a result immediately, while interrupt mode has to wait
for the new conversion.
◦ Interrupt mode will make the implementation of the AVR32 kernel module more
complex, since it will need to react to interrupts. Buffering mode won’t need this.
◦ Buffering mode will make the implementation of the ATmega128 more complex, since
it continuously has to start new analog to digital conversions and save the results.
This has to be implemented so it doesn’t affect the normal operation. Interrupt
mode won’t need this.
7.2.3
Timeout
7.2.1 describes one way the ATmega128 can manage SPI communication with the AVR32.
One problem with this solution is that an error can leave the slave waiting for an SPI
transfer that never shows up. This means that it’s impossible or hard to know in what
state the slave will end up if it was an error during the message. This wouldn’t break
future messages, since the master starts all messages by synchronizing with the slave. But
it’s generally a bad idea that the ATmega128 can end up in an unknown state.
The reason that the ATmega128 risks to end up in an unknown state are the “Wait for
SPI transfers” in figure 7.2.3. These could possible wait forever, which is the reason for
the problem. If all of these (except for activity 1.1) could have timeouts that would send
them back to activity 1.1, then the problem should be solved. The trick is to select a
correct time out period. It should probably be something like 2-3 times higher than the
normal pause between SPI transfers.
7.3
Device Driver
The purpose of the device driver is to act as a link between a user mode program and the
I/O-card. The user mode program access the device driver through a device node, and it
access the I/O-card through SPI communication. This is shown in figure 7.4.
The Linux kernel is a complicated piece of software. Hence, to make a module, make it
react to device nodes, use SPI configure interrupts is not a trivial task. How to program
52
CHAPTER 7. DESIGN OF I/O-CARD SOFTWARE
the device driver to carry out these tasks is described in 8.2.
7.3.1
Device Nodes
Device nodes are used by user mode programs to access the device through the device
driver. A simple device driver has often only one node associated with it. More complex
drivers may have several, where each node represents a specific function. Several nodes
was used for this driver, one for each of the analog channels, one for digital input and one
for digital output. Notice that analog output only has two nodes, so each node will control
three analog output subchannels.
The reason for this choice was to have one node for each of the smallest controllable
parts of the I/O-card. For example the two analog output channels can have different
resolutions, but all the subchannels of one channel has to have the same. Since the analog
input channels aren’t dependent on each other in the same way, they have one node each.
This will make it easier to control them individually. The I/O-card is a typical the char
device, since only small amounts of data are transferred serially with SPI.
7.3.2
Master send Data
The activity diagram in figure 7.5 on the facing page describes how the device driver sends
a message containing data to the slave. It does not describe how the type of command
are decided, or how to read and write user mode data. This are described in more detail
in 8.2.7
◦ Synchronization phase
• Activity 1.1 sends the appropriate code to the slave.
• Decision point 1A checks if the received data was a slave ready signal. If it
wasn’t the ready signal, the code has to be sent again.
◦ Master data phase
• Activity 2.1 sends the first data.
• Decision point 2A checks if the received data was an acknowledgment of the
code. No acknowledgment means that sending the message failed.
• Decision point 2C checks if there is more data to send.
• Activity 2.2 sends the next data.
• Decision point 2B checks if the received data was an acknowledgment of the
previously sent data. No acknowledgment means that sending the message
failed.
• Activity 2.3 sends a dummy byte to retrieve the acknowledgment of the last
data.
• Decision point 2D checks if the received data was an acknowledgment of the
last sent data. No acknowledgment means that sending the message failed.
7.3. DEVICE DRIVER
Figure 7.5: Activity diagram for device driver when master sends data
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Figure 7.6: Activity diagram for device driver when master requests data
◦ Confirmation phase
• Activity 4.1 sends the master OK signal.
• Decision point 4A checks if the received data was a slave OK signal. If it was
a slave OK signal, the message was sent successfully.
7.3.3
Request Data from Slave
The activity diagram in figure 7.6 describes how the device driver sends a message that
retrives data from the slave. The Synchronization and Confirmation phases are identical
as in 7.3.2.
◦ Slave data phase
• Activity 3.1 sends a dummy byte.
7.4. USER MODE DRIVER
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• Decision point 2A checks if the received data was an acknowledgment of the
code. No acknowledgment means that sending the message failed.
• Activity 3.2 sends a new dummy byte.
• Activity 3.3 saves the received data.
• Activity 3.4 sends an acknowledgment of the received data.
• Decision point 2B checks if more data is expected.
• Activity 3.6 sends an acknowledgment of the last received data.
• Decision point 2C checks if the received data was a dummy byte. No dummy
byte means that sending the message failed.
7.4
User Mode Driver
Each of the commands that can be given to the I/O-card have one or more functions
provided by the user mode driver. These functions makes it possible to give the I/O-cards
commands just with a single function call, and this function call should return the result
of the message. This will make it very easy to use the different features of the I/O-card.
The reason that some commands should have more than one function, is that they can be
used in different ways. The user mode driver should have the following functionality:
◦ Read from different analog in channels.
◦ Write values to different analog out channels.
◦ Read all digital in channels at once.
◦ Write to all or a chosen number of the digital out channels.
◦ Change different properties of the I/O card, like analog resolution or enable/disable
functionality.
7.5
Threaded User Mode Driver
Since communicating with I/O often includes waiting, commands are often executed in
threads. To make this possible, another layer of software was used on top of the user mode
driver. This layer uses threads to send and receive data from the I/O-card, making the
total system more effective. This has only been designed for analog I/O.
7.5.1
Threaded Analog Input
The analog input uses threads to sample the analog input values. Each channel has its
own periodic thread that gets an analog input value and store it in a buffer. When a user
mode application needs the value of an analog channel, it can quickly get the buffered
value.
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This solution works best when the I/O-card uses interrupt mode, since the value the thread
is putting into a buffer should be as new as possible. If using buffering mode, the data
will be buffered twice, and this should be avoided. The main disadvantage of interrupt
mode is that the command takes longer time, is less of a problem when it’s performed by
a thread. It will not slow down the rest of the program.
7.5.2
Threaded Analog Output
The analog output uses a worker thread. This thread waits until it receives an analog
output command from the main thread. Then it executes this command and waits for the
next. This means that the main thread gives a short command to the worker thread, and
then it can continue executing the rest of its code.
Chapter 8
Implementation of I/O-card
Software
This chapter describes how the design from chapter 7 was implemented in several files of
C-code. Only the header files are shown here. The code files can be found in the appendix.
All the functions definitions and variables are commented in the header files, which makes
it possible to know the purpose of the different functions by looking at the headers. Some
parts of the code files are shown here and used as examples.
8.1
ATmega128 Firmware
The code for ATmega128 are divided into several pairs of headers and code files. Each of
these pairs provides the code for controlling a part of the ATmega128.
8.1.1
am128main
This file contain the main function of the ATmega128, which is where the code execution
starts. This main function will initialize the I/O-card, with the help of the other code files
and then start the main program-loop. This loop will run as long as the ATmega128 has
power, and will listen for SPI messages from AVR32.
The code below is the header file am128main.h, and the code file am128main.c is in the
appendix C.1.2. The header file has some #define statements that enables or disables
different features in the code. These are used to change how the I/O-card works without
having to make changes in the rest of the code.
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// D e f i n e s t h e c l o c k f r e q u e n c y o f t h e d e v i c e . Needed f o r u t i l / d e l a y . h .
#define F CPU 16000000
// I n c l u d e s .
#include <a v r / i o . h>
#include < u t i l / d e l a y . h>
#include <a v r / i n t e r r u p t . h>
// Macros f o r b i t o p e r a t i o n s .
#define s e t b i t ( reg , b i t ) ( r e g |= ( 1 << b i t ) )
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#define
#define
#define
#define
c l e a r b i t ( reg , b i t ) ( r e g &= ˜ ( 1 << b i t ) )
t e s t b i t ( reg , b i t ) ( r e g & ( 1 << b i t ) )
l o o p b i t i s s e t ( reg , b i t ) while ( ! t e s t b i t ( reg , b i t ) )
l o o p b i t i s c l e a r ( reg , b i t ) while ( t e s t b i t ( reg , b i t ) )
// E n a b l e s d e b u g g i n g o v e r RS−232.
// This w i l l g i v e problems , s i n c e t h e d e b u g g i n g t a k e s a l o n g time .
// #d e f i n e RS232 DEBUG
// E n a b l e s t i m o u t o f SPI t r a n s f e r s .
// Timeout p e r i o d = TIMEOUT ∗ 20 m i c r o s e c o n d s .
//#d e f i n e TIMEOUT ENABLE
#define TIMEOUT 25
// D e f i n e s i f b u f f e r i n g mode or i n t e r r u p t mode w i l l be used f o r ADC.
#define BUFFERING MODE
//#d e f i n e INTERRUPT MODE
// Main f u n c t i o n t h a t i n i t i a l i z e t h e I /O−c a r d and t h e n s t a r t s t h e main program l o o p
, which c o n t i n u o u s l y c h e c k s f o r new messages from t h e AVR32 .
i n t main ( ) ;
#include ”am128uart . h ”
#include ”am128io . h ”
The code below is the main program loop, which will wait for new commands. On line
14 the SPI data register are set to the SLAVE_READY code. This makes sure that the next
byte the it sends to the master will be this code. Line 17 waits for a new SPI transfer,
and the code received in this SPI transfer is sent to the function at line 24. This function
will validate the code and continue the SPI command.
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// Main program l o o p .
while ( 1 ) {
// Prepare t o send r e a d y s i g n a l , and w a i t f o r code from master .
SPDR = SLAVE READY;
// Wait f o r SPI t r a n s f e r .
while ( ! t e s t b i t (SPSR , SPIF ) ) {
#i f d e f BUFFERING MODE
// Checks i f c o n v e r s i o n i s f i n i s h e d
ADC CheckBuffer ( ) ;
#endif
}
// S t a r t r e c e i v i n g new command .
IO NewCommand (SPDR) ;
}
i f u s i n g b u f e r i n g mode .
When in buffering mode, the ATmega128 checks for completed ADC conversions while
waiting for SPI messages. This is only checked inside this loop, because checking it during
a SPI message can disturb the synchronization between ATmega128 and AVR32. It would
be more logic to use interrupts when a ADC conversion was completed. However, when
doing this about 6% of the SPI messages returned errors. This was because these interrupts
happend in the middle of a SPI command, and it made the ATmega128 unable to return
the correct data at the correct time.
By polling the ADC whenever the ATmega128 waits for a new message (not new transfer)
the work of managing ADC will only be done when the ATmega128 normally would do
a busy wait for SPI. For this to work robustly, it’s important that all the other “wait for
SPI” functions in the program has timeouts as described in 7.2.3. This is because the
ATmega128 will be unable to check the ADC conversions if it doesn’t return to the the
loop described here.
8.1. ATMEGA128 FIRMWARE
8.1.2
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am128io
am128io.h and am128io.c contains functions that receive a code that the main function
has received from AVR32. These functions will receive the rest of the message. The code
below is the header file am128io.h, and the code file am128io.c is in the appendix C.1.3.
This header file is quite long, but it also defines how all of the different messages are
implemented.
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#i f n d e f AM128 IO
#define AM128 IO
// I n i t i a l i z e t h e d i f f e r e n t p a r t s o f t h e I /O−c a r d .
void I O I n i t ( ) ;
// Function t h a t c h e c k s i f an r e c e i v e d d a t a ( r x ) was a c o r r e c t ack o f t h e
transmitted data ( tx ) .
signed char IO TestAck ( unsigned char tx , unsigned char r x ) ;
// Checks t h e r e c e i v e d code and s t a r t s r e c e i v i n g a new command i f code i s v a l i d .
signed char IO NewCommand ( unsigned char code ) ;
/∗
Analog i n SPI message .
Number
R e c e i v e d from master
Returned t o master
1
DUMMY
code + 1
Wait f o r i n t e r r u p t i f i n i n t e r r u p t mode .
2
DUMMY
vauleH
3
valueH + 1
vauleL
4
valueL + 1
DUMMY
5
MASTER OK
SLAVE OK
∗/
signed char IO AnalogIn ( unsigned char code ) ;
/∗
Analog o u t SPI message .
Number
R e c e i v e d from master
Returned t o master
1
valueH
code + 1
2
valueL
vauleH + 1
3
DUMMY
vauleL + 1
4
MASTER OK
SLAVE OK
∗/
signed char IO AnalogOut ( unsigned char code ) ;
/∗
D i g i t a l i n SPI message .
Number
R e c e i v e d from master
Returned t o master
1
DUMMY
code + 1
2
DUMMY
value
3
value + 1
DUMMY
4
MASTER OK
SLAVE OK
∗/
signed char I O D i g i t a l I n ( unsigned char code ) ;
/∗
D i g i t a l o u t SPI message .
Number
R e c e i v e d from master
Returned t o master
1
mask
code + 1
2
value
mask + 1
3
DUMMY
vaule + 1
4
MASTER OK
SLAVE OK
∗/
signed char I O D i g i t a l O u t ( unsigned char code ) ;
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CHAPTER 8. IMPLEMENTATION OF I/O-CARD SOFTWARE
#i f d e f BUFFERING MODE
/∗
Analog i n e n a b l e SPI message . ( Only used i n b u f f e r i n g mode )
Number
R e c e i v e d from master
Returned t o master
1
enable
code + 1
2
DUMMY
enable + 1
3
MASTER OK
SLAVE OK
∗/
signed char IO AnalogInEnable ( unsigned char code ) ;
#endif
/∗
Analog o u t r e s o l u t i o n SPI message .
Number
R e c e i v e d from master
Returned t o master
1
resolution
code + 1
2
DUMMY
resolution + 1
4
MASTER OK
SLAVE OK
∗/
signed char IO AnalogOutRes ( unsigned char code ) ;
// I n c l u d e s .
#include ” . . / s p i B y t e C o d e s . h ”
#include ”a m 1 2 8 s p i S l a v e . h ”
#include ”am128pwm . h ”
#include ”am128adc . h ”
#include ”am128io . c ”
#endif //AM128 IO
Below is the function IO_AnalogOut() from am128io.c. This function is a good example
on how the functions in this file works. The other functions are all similar.
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signed char IO AnalogOut ( unsigned char code )
{
unsigned char valueH , valueL , r x ;
char r e t ;
// 1 s t b y t e : s t o r e r e c e i v e d valueH , r e t u r n code + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( code + 1 , &valueH , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
// 2nd b y t e : s t o r e r e c e i v e d valueL , r e t u r n valueH + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( valueH + 1 , &valueL , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
// 3 rd b y t e : c h e c k r e c e i v e d DUMMY, r e t u r n v a l u e L + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( v a l u e L + 1 , &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != DUMMY) return −1;
// 4 t h b y t e : c h e c k r e c e i v e d MASTER OK, r e t u r n SLAVE OK.
r e t = S P I S l a v e T r a n s f e r B y t e (SLAVE OK, &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != MASTER OK) return −1;
// When t h e message i s c o n f i r m e d t h e mask and d a t a a r e a p p l i e d t o d i g i t a l o u t .
PWM SetOutValue (CODE TO CH AOUT( code ) , CODE TO SCH AOUT( code ) , valueH , v a l u e L ) ;
// Debug p r i n t i n g , i f e n a b l e d .
UART Print ( ’ c ’ , code ) ;
UART Print ( ’ h ’ , valueH ) ;
UART Print ( ’ l ’ , v a l u e L ) ;
}
8.1. ATMEGA128 FIRMWARE
61
Each of the transfers is marked with a comment explaining what ATmega128 sends and
what it expects to receive. After each transfer the return value is checked. If this is
negative it means that the function timed out before a transfer was received. If the return
value is negative or the received data wasn’t the expected data, the function returns an
error.
After the 4th transfer is controlled, the received data is written to PWM. The channel
and subchannel of the PWM is defined by the code. Before the function returns, it also
prints some debugging information via UART, if this is enabled.
8.1.3
am128slaveSpi
am128slaveSpi.h and am128slaveSpi.c contain functions for using the ATmega128 as a
SPI slave device. During the development several different slave transfer functions were
used. The end result was just one function that sends and receive one byte and has timeout
if this is enabled.
The functions that receives the SPI messages does this one transfer at the time. As opposed
to the AVR32 SPI driver, the ATmega128 is able to handle each SPI transfer individually
without losing effectivity. This gives code that’s easier to read and understand.
The code below is the header file am128spiSlave.h, and the code file am128spiSlave.c
is in the appendix C.1.4.
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#i f n d e f AM128 SPI SLAVE
#define AM128 SPI SLAVE
// I n i t i a l i z e t h e ATmega128 as a SPI s l a v e . I f t i m e o u t a r e e n a b l e d , t h e n t h i s
function w i l l i n i t i a l i z e a timer a s w e l l .
void S P I S l a v e I n i t ( void ) ;
// Function f o r t r a n s f e r one b y t e o f d a t a . I t w i l l w a i t f o r an SPI t r a n s f e r from
t h e master . I f t i m e o u t s a r e e n a b l e d , t h e f u n c t i o n w i l l r e t u r n an e r r o r a f t e r
some time . S i n c e SPI i s f u l l y d u p l e x , t h i s f u n c t i o n w i l l b o t h send and r e c e i v e
data .
signed char S P I S l a v e T r a n s f e r B y t e ( unsigned char tx , unsigned char ∗ rx , unsigned
char u s e c ) ;
#include ”a m 1 2 8 s p i S l a v e . c ”
#endif //AM128 SPI SLAVE
Below is the while loop that is used to wait for a SPI transfer. To wait for something
to happen with a loop like this, is called a busy-wait, and normally it’s something that
should be avoided. This is because a busy-wait wastes many processor cycles that could
be used by other processes. For the ATmega128 this isn’t a problem since it can only have
one process. It would also be possible to use interrupts instead of busy-wait, but it would
make the code more complex and probably not more effective.
while ( ! ( SPSR & (1<<SPIF ) ) )
It’s also important to notice that the SPI data register (SPDR) should always be read
after a transfer (after the while loop is finished). The status bit for received SPI transfer
will only be cleared if the SPDR is either read or written to. Failing to clear the status
bit makes it impossible to know if a new transfer has been received or not.
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CHAPTER 8. IMPLEMENTATION OF I/O-CARD SOFTWARE
am128ADC
am128ADC.h and am128ADC.c contain functions for using the ADC (analog to digital converter). I had decided to test two different modes to use analog input, and both of them
are implemented in the same code file. This means that much of the code are inside #ifdef
statements so only the code for the selected mode will be compiled.
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#i f n d e f AM128 ADC
#define AM128 ADC
/∗
I n i t i a l i z e t h e ADC p a r t o f t h e ATmega128 .
∗/
void ADC Init ( ) ;
#i f d e f BUFFERING MODE
// Data s t r u c t u r e s and f u n c t i o n s f o r b u f f e r i n g mode .
// S t r u c t f o r making a c i r c u l a r a r r a y f o r s t o r i n g t h e c h a n n e l s t h a t a r e e n a b l e d .
struct c h a n L i s t {
struct c h a n L i s t ∗ n e x t ;
struct c h a n L i s t ∗ p r e v ;
char c h a n n e l ;
};
struct c h a n L i s t c h a n n e l t a b [ 8 ] ; // S t a t i c d e c l e r a t i o n o f l i s t e l e m e n t s .
struct c h a n L i s t ∗ c h a n n e l s ; // P o i n t e r t o a c t i v e e l e m e n t o f t h e c i r c u l a r
char chCount ; // Number o f e l e m e n t s i n t h e l i s t .
list .
// t a b l e s f o r s t o r i n g t h e l a t e s t v a l u e f o r each c h a n n e l .
unsigned char dataH [ 8 ] , dataL [ 8 ] ;
// Enable one a n a l o g chan n el , i f i t ’ s n o t a l r e a d y e n a b l e d . Enabled means t h a t t h e
ATmega128 w i l l c o n t i n u o u s l y c o n v e r t a n a l o g v a l u e s on t h i s c h a n n e l and s t o r e t h e
d i g i t a l values in a b u f f e r .
void ADC EnableChan ( char c h a n n e l ) ;
// D i s a b l e one a n a l o g chan n el , i f i t ’ s n o t a l r e a d y d i s a b l e d .
void ADC DisableChan ( char c h a n n e l ) ;
// Check i f t h e o n g o i n g c o n v e r s i o n i s f i n i s h e d , i f so s t o r e t h e d a t a and s t a r t a
new one .
void ADC CheckBuffer ( ) ;
// S t a r t s c o n v e r s i o n o f t h e n e x t c h a n n e l i n t h e a r r a y .
void ADC NewConversion ( ) ;
// S t o p s and o n g o i n g c o n v e r s i o n s .
void ADC StopConversion ( ) ;
#endif
#i f d e f INTERRUPT MODE
// I n t e r r u p t mode .
// S t a r t s a c o n v e r s i o n o f a g i v e n c h a n n e l .
void ADC StartConversion ( char c h a n n e l ) ;
// Checks i f a c o n v e r s i o n i s f i n i s h e d , i f so t h e r e s u l t a r e s t o r e d , and an
i n t e r r u p t i s s e n t t o t h e AVR32 .
signed char ADC CheckConversion ( unsigned char ∗ data ) ;
#endif
#include ”am128adc . c ”
#endif //AM128 ADC
8.1. ATMEGA128 FIRMWARE
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The code for interrupt mode is very simple, it consists of one function that starts conversion
on a channel, and one that checks if the ongoing conversion is completed. The last one
will also return the conversion result in an array.
The code for buffering mode is more complex. The idea is that the ATmega128 should
convert one analog input channel, save the result in a buffer, before starting to convert
the next channel. Since each conversion takes some time, it would be a good idea to
only convert the channels that are in use. A doubly-circularly-linked list1 was designed to
contain all the active channels. Since the list is circular, the program can always move to
the next channel in the list whenever a new conversion should be started.
8.1.5
am128pwm
am128pwm.h and am128pwm.c contain functions for using the PWM (Pulse-width modulation) timers as analog output signals. With these functions it’s possible to change the
output value of the subchannels and the resolution of the channels. All subchannels of the
same channel will always have the same resolution.
The code below is the header file am128pwm.h, and the code file am128pwm.c is in the
appendix C.1.6.
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#i f n d e f AM128 PWM
#define AM128 PWM
// I n i t i a l i z e 2 PWM c h a n n e l s w i t h 3 s u b c h a n n e l s each . By d e f a u l t
and has an o u t p u t v a l u e o f z e r o .
void PWM Init ( ) ;
a l l PWM a r e 8− b i t
// Changes t h e o u t p u t v a l u e o f one o f t h e s u b c h a n n e l . The new v a l u e a r e g i v e n w i t h
two 8 b i t v a l u e s .
void PWM SetOutValue ( char ch , char sch , char valueH , char v a l u e L ) ;
// Changes t h e r e s o l u t i o n o f one o f t h e c h a n n e l s ( a f f e c t i n g a l l s u b c h a n n e l ) . When
r e s o l u t i o n a r e changed , t h e o u t p u t v a l u e o f a l l s u b c h a n n e l s a f f e c t e d a r e s e t t o
zero .
void PWM SetResolution ( char ch , char r e s o l u t i o n ) ;
#include ”am128pwm . c ”
#endif //AM128 PWM
8.1.6
am128uart
am128uart.h and am128uart.c contain functions for using the UART. With the MAX233
IC on the I/O-card it’s possible to use to UART to communicate with a workstation
through a serial cable. This is very useful for debugging, since it’s possible to print small
messages to the screen of a computer.
The code below is the header file am128uart.h, and the code file am128uart.c is in the
appendix C.1.7.
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#i f n d e f AM128 UART
#define AM128 UART
1
A doubly-circularly-linked list is a list where each item points both to its next and previous item, and
the last item in the list points to the first.
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CHAPTER 8. IMPLEMENTATION OF I/O-CARD SOFTWARE
// I n i t i a l i z e t h e UART w i t h baud r a t e o f 1 9 . 2 k .
void UART Init ( ) ;
// Transmit one b y t e o f d a t a v i a UART.
void UART TxByte ( char data ) ;
// Send a b y t e c o n t a i n i n g a <space >.
void UART TxSpace ( ) ;
// Send two b y t e s t h a t t o g e t e r makes a new l i n e .
void UART TxNewLine ( ) ;
// Convert a d e c i m a l number t o a s t r i n g o f t h r e e c h a r a c t e r s and send them .
void UART TxDecimal ( unsigned char v a l u e ) ;
// Send a c h a r a c t e r and a v a l u e .
void UART Print ( char symbol , unsigned char v a l u e ) ;
#include ”am128uart . c ”
#endif //AM128 UART
8.2
Device driver
The device driver has to be coded in kernel mode, and during development it’s implemented
as a kernel module. Programming kernel modules are not the same as programming
normal C-programs, even if both use the C-programming language. To start with, the
kernel module doesn’t have a main() function, but does have different functions that runs
in different situations. Another difference is that functions defined by user mode libraries
like glibc aren’t available. Instead of a user mode library, it’s possible to include header
files from the kernel source to get more functionality. A third difference is that there are
no floating-point operations or data types in the kernel.
8.2.1
Init and Exit Functions
As mentioned, different functions in a kernel module runs in different situations. The two
most basic functions are the init and exit functions. These are functions that are run when
the module is loaded in and out of the kernel. The macros module_init and module_exit
are used to define which functions are the init and exit functions of the module.
8.2.2
Major and Minor Numbers
7.3.1 defined the device nodes that should be used in this system. All these will normally
have the same major number, but they should have different minor numbers. The kernel
module has to allocate the major and minor number it will use, which means that one
major number has to be allocated, and one minor number for each of the nodes. To
allocate major and minor numbers for a char device, the function alloc_chrdev_region
should be used. This allocated a unused major number and a chosen number of minor
numbers.
8.2. DEVICE DRIVER
65
The allocated minor numbers will be used to number the device nodes. The first eight
numbers (0-7) were given to the analog input channels, the next two (8-9) were given to
the two analog output channels and the two last were given to digital input and digital
output. A header file called minorNumbers.h was made, to make it easier to use these
minor numbers. This file is shown below.
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// D e f i n e s number o f a n a l o g c h a n n e l s .
#define COUNT AIN
8
#define COUNT AOUT
2
#define COUNT TOTAL
(COUNT AIN + COUNT AOUT +2)
// Minor numbers o f f i r s t c h a n n e l o f each t y p e .
#define MINOR AIN
0
#define MINOR AOUT
COUNT AIN
#define MINOR DIN
(MINOR AOUT + COUNT AOUT)
#define MINOR DOUT
(MINOR AOUT + COUNT AOUT + 1 )
// Macros f o r f i n d i n g minor number f o r a c h a n n e l .
#define CH TO MINOR AIN( ch )
(MINOR AIN + ch )
#define CH TO MINOR AOUT( ch )
(MINOR AOUT + ch )
// Macros f o r t e s t i n g i f a minor number i s a s p e s i f i c t y p e .
#define IS AIN ( minor )
( ( minor>=MINOR AIN) &(minor<MINOR AOUT) )
#define IS AOUT ( minor )
( ( minor>=MINOR AOUT) &(minor<MINOR DIN) )
#define IS DIN ( minor )
( minor==MINOR DIN)
#define IS DOUT( minor )
( minor==MINOR DOUT)
// F u n c t i o n s f o r c o n v e r t i n g minor numbers i n t o c h a n n e l s .
i n t MinorToChAin ( i n t minor )
{
i f ( IS AIN ( minor ) ) {
return minor − MINOR AIN ;
}
else {
return −1;
}
}
i n t MinorToChAout ( i n t minor )
{
i f ( IS AOUT ( minor ) ) {
return minor − MINOR AOUT;
}
else {
return −1;
}
}
8.2.3
Char Device registration
Before the char device driver can work, one or more char devices have to be registered
in the kernel. This is done by making a cdev structure and use a function to add it into
the kernel. The cdev structure contain a pointer to a file_operations structure. This
structure points to different functions for the different file operations that are associated
with the char device.
When an user mode program should communicate with device driver through a device
node, the module has to react to different operations done to the node. The file_operations
structure defines what functions are associated with the different file operations. Below is
a list of the file operations used in this module, and what they do.
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◦ Open
This file operation is performed each time an user mode program opens the device
node. This has to be done before any other operations can be done on the node.
◦ Release
It’s possible to open a file multiple times, without closing it. Each opening will
increment a timer, and each closing will decrement it. This file operation is performed
when the file is closed, and this counter equals zero. This means that the file is no
longer open, and used memory can be released, hence the name.
◦ Write
This file operation is performed when a user mode program tries to write to the
node. In this device driver this file operation will be used by user mode programs
to write values to outputs on the I/O-card.
◦ Read
This file operation is performed when a user mode program tries to read from the
node. In this device driver this file operation will be used by user mode programs
to read values from inputs on the I/O-card.
◦ Ioctl
Is a special file operation for device nodes. That’s used to give commands to the
node that aren’t normal data. In this device driver this file operation will be used
by user mode programs to change the properties of the I/O-card.
8.2.4
SPI device and driver
To use SPI, some data structures has to be defined. The SPI driver points to a probe
function for the device, that are used by the module to find out if it’s possible to use a SPI
device. In this function the SPI device is configured and properties like the SPI frequency
are set.
8.2.5
Changes in Linux Kernel Source Code
During development the device driver will be compiled as a module, but it still needs
some minor changes in the kernel to work. This is done by adding some lines to the
arch/avr32/boards/atstk1000/atstk1002.c file in the linux source. These lines should
be added to the spi_board_info structure, and the new code should look like below. The
new file is available on the CD-ROM.
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s t a t i c struct s p i b o a r d i n f o s p i 0 b o a r d i n f o [ ]
{
/∗ QVGA d i s p l a y ∗/
. modalias
= ”ltv350qv ” ,
. max speed hz
= 16000000 ,
. chip select
= 1,
},
{
. modalias
= ”avr32io ” ,
. max speed hz = 1 6 0 0 0 0 0 0 ,
. chip select = 2,
},
};
initdata = {
8.2. DEVICE DRIVER
8.2.6
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avr32io
avr32io.h and avr32io.h contain the structures and functions described earlier in this
chapter. These are all defined in the header file below. The code file are in the appendix
C.2.2.
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#i f n d e f
#define
KM AVR32 IO H
KM AVR32 IO H
// I n c l u d e s
#include <l i n u x / module . h>
#include <l i n u x / i n i t . h>
#include <l i n u x / e r r n o . h>
#include <l i n u x / f s . h>
#include <l i n u x / cdev . h>
#include <l i n u x / d e v i c e . h>
#include <l i n u x / s p i / s p i . h>
#include <l i n u x / i o c t l . h>
#include <l i n u x / d e l a y . h>
#include <asm/ u a c c e s s . h>
#include <asm−a v r 3 2 / i o . h>
#include <l i n u x / t y p e s . h>
#include <l i n u x / w a i t . h>
#include <l i n u x / i n t e r r u p t . h>
// D e f i n e s IOCTL numbers .
#define AVR32IO IOCTL MAGIC ’ k ’
#define AVR32IO IOCTL RES AOUT IOW(AVR32IO IOCTL MAGIC , 0 , i n t )
#define AVR32IO IOCTL EN AIN IOW(AVR32IO IOCTL MAGIC , 1 , i n t )
// D e f i n e s i f d r i v e r s h o u l d p r i n t o u t d e b u g g i n g i n f o r m a t i o n .
//#d e f i n e VERBOSE DEBUG
#i f d e f VERBOSE DEBUG
#d e f i n e DEBUG( fmt , a r g s . . . ) { i f ( p r i n t k r a t e l i m i t ( ) ) p r i n t k (KERN ALERT fmt ,
## a r g s ) ; }
#e l s e
#d e f i n e DEBUG( fmt , a r g s . . . )
#endif
// D e f i n e s i f b u f f e r i n g mode or i n t e r r u p t mode w i l l be used f o r ADC.
#define BUFFERING MODE
//#d e f i n e INTERRUPT MODE
// Runs when k e r n e l i s s t a r t e d / module i s i n s t a l l e d . I n i t i a l i z e t h e needed d a t a
structures .
static int
i n i t a v r 3 2 i o I n i t ( void ) ;
// Runs when module i s removed . Removes d a t a s t r u c t u r e s .
s t a t i c void
e x i t a v r 3 2 i o E x i t ( void ) ;
// Runs when s p i d r i v e r i s s t a r t e d . I n i t i a l i z e t h e SPI d r i v e r .
static int
d e v i n i t a v r 3 2 i o P r o b e ( struct s p i d e v i c e ∗ s p i ) ;
// Runs when an user −s p a c e program opens a d e v i c e node . T r i e s t o mark t h e SPI as
busy , e r r o r i f SPI a l r e a d y i s b u s y .
s t a t i c i n t a v r 3 2 i o O p e n ( struct i n o d e ∗ node , struct f i l e ∗ f i l p ) ;
// Runs when t h e l a s t user −s p a c e program c l o s e s a d e v i c e node . mark t h e SPI as n o t
busy .
s t a t i c i n t a v r 3 2 i o R e l e a s e ( struct i n o d e ∗ node , struct f i l e ∗ f i l p ) ;
// Runs when an user −s p a c e program t r i e s t o r e a d from a d e v i c e node . Send command
t o I /O−c a r d and r e t u r n t h e r e s u l t .
s t a t i c s s i z e t a v r 3 2 i o R e a d ( struct f i l e ∗ f i l p , char
u s e r ∗ userBuf , s i z e t len ,
l o f f t ∗ f pos ) ;
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// Runs when an user −s p a c e program t r i e s t o w r i t e t o a d e v i c e node . Send command t o
I /O−c a r d .
s t a t i c s s i z e t a v r 3 2 i o W r i t e ( struct f i l e ∗ f i l p , const char
u s e r ∗ userBuf , s i z e t
len , l o f f t ∗ f p o s ) ;
// Runs when an user −s p a c e program t r i e s t o send an IO c o n t r o l command . Send t h e
command t o I /O−c a r d .
s t a t i c i n t a v r 3 2 i o I o c t l ( struct i n o d e
∗ node , struct f i l e ∗ f i l p , unsigned i n t cmd ,
unsigned long a r g ) ;
// S t r u c t c o n t a i n i n g d a t a s t r u c t u r e s f o r t h e k e r n e l module .
struct a v r 3 2 i o d e v i c e {
d e v t number ; // Major and minor numbers .
struct cdev ∗ c h a r D e v i c e ; // Char d e v i c e .
struct s p i d e v i c e ∗ s p i ; // SPI d e v i c e .
i n t busy ; // D e v i c e b u s y .
#i f d e f INTERRUPT MODE
i n t i r q I D ; // I n t e r r u p t used f o r a n a l o g i n .
i n t i r q F l a g ; // F l a g when r e c e i v i n g i n t e r r u p t .
#endif
};
// P o i n t e r t o d e v i c e used i n d r i v e r .
s t a t i c struct a v r 3 2 i o d e v i c e ∗ d e v i c e ;
// S t r u c t t h a t d e f i n e s t h e f u n c t i o n s used f o r d i f f e r e n t
s t a t i c struct f i l e o p e r a t i o n s f o p s = {
. owner = THIS MODULE,
. read = avr32io Read ,
. write = avr32io Write ,
. open = avr32io Open ,
. release = avr32io Release ,
. ioctl = avr32io Ioctl ,
};
f i l e operations .
// S t r u c t t h a t d e f i n e s t h e SPI d r i v e r .
s t a t i c struct s p i d r i v e r a v r 3 2 i o d r i v e r = {
. probe = a v r 3 2 i o P r o b e ,
. driver = {
. name = ” a v r 3 2 i o ” ,
}
};
DECLARE MUTEX( spiMutex ) ;
// I n c l u d e s .
#include ” . . / minorNumbers . h ”
#include ” . . / s p i B y t e C o d e s . h ”
#include ” a v r 3 2 i o S P I . h ”
#include ”avr32io Cmd . h ”
// D e f i n e s i n i t and e x i t f u n c t i o n s .
module init ( avr32io Init ) ;
module exit ( avr32io Exit ) ;
MODULE LICENSE( ”GPL” ) ;
MODULE AUTHOR( ”Oyvind Netland , NTNU, Trondheim , Norway ” ) ;
MODULE DESCRIPTION( ”D e v i c e d r i v e r f o r AVR32 I /O−c a r d d e v e l o p e d by Oyvind Netland ,
d u r i n g a master t h e s i s on NTNU, Trondheim , Norway ” ) ;
#endif //
KM AVR32 IO H
8.2. DEVICE DRIVER
8.2.7
69
avr32io Cmd
avr32io_Cmd.h and avr32io_Cmd.h contain functions that sends messages containing the
commands that the user-space program has asked for. The header file is shown below, and
it includes descriptions of the structures of the different SPI messages.
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#i f n d e f
#define
KM AVR32IO CMD H
KM AVR32IO CMD H
/∗
Sends code u n t i l r e a d y code i s r e c e i v e d .
∗/
i n t Cmd WaitForAM128 ( u8 code ) ;
/∗
Sends SPI message f o r Analog i n
Number
1
2
Wait f o r
3
4
5
6
∗/
i n t Cmd
Send t o s l a v e
Returned by s l a v e
code
READY
DUMMY
code +1
i n t e r r u p t i n i n t e r r u p t mode .
DUMMY
vauleH
valueH + 1
vauleL
valueL + 1
DUMMY
MASTER OK
SLAVE OK
GetAIn ( u8 ∗ toUser , i n t ch ) ;
/∗
Sends SPI message f o r Analog o u t .
Number
1
2
3
4
5
∗/
i n t Cmd
R e c e i v e d from master
code
valueH
valueL
DUMMY
MASTER OK
Returned t o master
READY
code + 1
vauleH + 1
vauleL + 1
SLAVE OK
SetAOut ( u8 ∗ fromUser , i n t ch , i n t s c h ) ;
/∗
Sends SPI message f o r D i g i t a l i n
Number
1
2
3
4
5
∗/
i n t Cmd
Send t o s l a v e
code
DUMMY
DUMMY
value + 1
MASTER OK
Returned by s l a v e
READY
code +1
vaule
DUMMY
SLAVE OK
GetDIn ( u8 ∗ t o U s e r ) ;
/∗
Sends SPI message f o r D i g i t a l o u t .
Number
1
2
3
4
5
∗/
i n t Cmd
R e c e i v e d from master
code
mask
value
DUMMY
MASTER OK
Returned t o master
READY
code + 1
mask + 1
vaule + 1
SLAVE OK
SetDOut ( u8 ∗ fromUser ) ;
#i f d e f BUFFERING MODE
/∗
Sends SPI message f o r e n a b l e a n a l o g i n .
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Number
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2
3
5
∗/
i n t Cmd
#endif
R e c e i v e d from master
code
enable
DUMMY
MASTER OK
Returned t o master
READY
code + 1
enable + 1
SLAVE OK
EnableAIn ( u8 en , i n t ch ) ;
/∗
Sends SPI message f o r a n a l o g o u t r e s o l u t i o n .
Number
1
2
3
5
∗/
i n t Cmd
R e c e i v e d from master
code
resolution
DUMMY
MASTER OK
Returned t o master
READY
code + 1
resolution + 1
SLAVE OK
SetAOutResolution ( u8 r e s o l , i n t ch ) ;
#i f d e f INTERRUPT MODE
DECLARE WAIT QUEUE HEAD(wq) ; // Makes a w a i t queue .
// Function t h a t runs on i n t e r r u p t .
i r q r e t u r n t irqFunk ( i n t i r q , void ∗ d e v i d , struct p t r e g s ∗ r e g s ) ;
#endif
#include ”avr32io Cmd . c ”
#endif //
KM AVR32IO CMD H
When using interrupts for the analog input command, an interrupt function has to be
used. This functions runs when the kernel receives an interrupt, and it can wake up
a sleeping analog input command. These functions are all very similar, and below the
Cmd_SetAOut() function are showed as an example of the functions in the code file.
Line 72 of this function checks that the channel is a valid channel, since the function from
8.2.2 will return an negative channel number if a wrong minor number was used. The next
part uses a function that synchronizes with the ATmega128 by sending the code until the
ATmega128 returns the correct “ready” code.
After synchronizing, the function sends data to the ATmega128. This is done by the
function call on line 88. The arrays sent with this function contain the data that should
be sent, and the data it expects the ATmega128 will return. All three bytes are sent at
the same time, because it’s faster than to send them individually.
If the data transfer was successful, the function ends by sending a “master OK” code to
the slave. If it receives a “slave OK” signal, the function returns successfully.
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i n t Cmd SetAOut ( u8 ∗ fromUser , i n t ch , i n t s c h )
{
int r e t ;
unsigned char t x [ 3 ] , expectedRx [ 3 ] ;
// c h e c k f o r v a l i d c h a n n e l .
i f ( ch < 0 ) return −EIO ;
// S y n c h r o n i z e w i t h ATMega128
r e t = Cmd WaitForAM128 (CH TO CODE AOUT( ch , s c h ) ) ;
DEBUG( ”code : %i count : %i \n ” , CH TO CODE AOUT( ch , s c h ) , r e t ) ;
i f ( r e t < 0 ) return r e t ;
8.2. DEVICE DRIVER
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// Prepare t o send s e v e r a l b y t e s .
t x [ 0 ] = fromUser [ 0 ] ;
t x [ 1 ] = fromUser [ 1 ] ;
t x [ 2 ] = DUMMY;
expectedRx [ 0 ] = CH TO CODE AOUT( ch , s c h ) + 1 ;
expectedRx [ 1 ] = fromUser [ 0 ] + 1 ;
expectedRx [ 2 ] = fromUser [ 1 ] + 1 ;
// Send d a t a and c h e c k r e t u r n s .
r e t = SPI SendTableOfBytes ( tx , expectedRx , 3 ) ;
i f ( r e t < 0 ) return r e t ;
// Confirm command .
r e t = S P I M a s t e r T r a n s f e r B y t e (MASTER OK) ;
DEBUG( ”masterOK : %i slaveOK : %i \n ” , MASTER OK, r e t ) ;
i f ( r e t != SLAVE OK) return −EIO ;
return 0 ;
}
8.2.8
avr32io SPI
avr32io_SPI.h and avr32io_SPI.h contain functions for doing single or multiple SPI
transfers. These functions are used by avr32io_Cmd.c. The header file is shown below.
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#i f n d e f
#define
KM AVR32IO SPI H
KM AVR32IO SPI H
// Function t h a t t r a n s f e r a g i v e n number o f b y t e s o v e r SPI .
i n t S P I M a s t e r T r a n s f e r ( u8 ∗ rx , u8 ∗ tx , i n t l e n ) ;
// Function t h a t t r a n s f e r one b y t e o v e r SPI .
i n t S P I M a s t e r T r a n s f e r B y t e ( u8 t x ) ;
// Function t h a t s e n d s a t a b l e o f data , and c h e c k s t h e r e c e i v e d d a t a a g a i n s t
another t a b l e
i n t SPI SendTableOfBytes ( u8 ∗ tx , u8 ∗ expectedRx , i n t l e n ) ;
#include ” a v r 3 2 i o S P I . c ”
#endif //
KM AVR32IO SPI H
The function SPI_MasterTransfer() describes how the kernel module does a SPI transfer.
As seen below it used two data structures that contains the data and length of the transfer.
Since these two structures has to be defined and initialized, there are some overhead work
each time some data are transferred. This makes it, as mentioned in 8.2.7, faster to send
three bytes in one transfer than using one transfer for each.
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i n t S P I M a s t e r T r a n s f e r ( u8 ∗ rx , u8 ∗ tx , i n t l e n )
{
// S t r u c t s f o r t h e t r a n s f e r .
struct s p i m e s s a g e msg ;
struct s p i t r a n s f e r t r a n s f e r ;
// Makes t h e t r a n s f e r s t r u c t .
memset(& t r a n s f e r , 0 , s i z e o f ( t r a n s f e r ) ) ;
transfer . len = len ;
t r a n s f e r . r x b u f = rx ;
t r a n s f e r . t x b u f = tx ;
// Makes t h e m e s s a g e s t r u c t , and i n c l u d e s t h e t r a n s f e r i n i t .
s p i m e s s a g e i n i t (&msg ) ;
s p i m e s s a g e a d d t a i l (& t r a n s f e r , &msg ) ;
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CHAPTER 8. IMPLEMENTATION OF I/O-CARD SOFTWARE
// E x e c u t e t r a n s f e r and r e t u r n r e s u l t .
return s p i s y n c ( d e v i c e −>s p i , &msg ) ;
}
8.3
Linux Kernel Patch
Compiling the device driver as a module was a practical solution during development. This
made it possible to quickly recompile and install the module when changing the code. For
users that don’t want to change the source code of the device drivers, it’s easier to have it
compiled into the kernel. This would mean that the device driver starts up during start
up, and it will work until the system shuts down. To make this as easy as possible for
users, a Linux kernel patch was made that includes the driver into the kernel. This patch
are included on the CR-ROM and the instruction for patching and compiling the kernel
are in 12.1.2.
8.4
User Mode Driver
The user mode driver consists of functions that open, read/write and close the device
nodes, and by doing this give commands to the I/O-card. The different functions and
what they do are described int he header file avr32io_driver below, and the code file are
in the appendix C.3.1.
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#i f n d e f
#define
AVRDRIVER H
AVRDRIVER H
#include
#include
#include
#include
#include
#include
#include
#include
<s y s / i o c t l . h>
<u n i s t d . h>
<s t d i o . h>
< s t d l i b . h>
< f c n t l . h>
<math . h>
<p t h r e a d . h>
<l i n u x / i o c t l . h>
// D e f i n e s IOCTL numbers .
#define AVR32IO IOCTL MAGIC ’ k ’
#define AVR32IO IOCTL RES AOUT IOW(AVR32IO IOCTL MAGIC , 0 , i n t )
#define AVR32IO IOCTL EN AIN IOW(AVR32IO IOCTL MAGIC , 1 , i n t )
// D e f i n e s i f d r i v e r s h o u l d p r i n t o u t d e b u g g i n g i n f o r m a t i o n .
//#d e f i n e VERBOSE DEBUG
#i f d e f VERBOSE DEBUG
#d e f i n e DEBUG( fmt , a r g s . . . ) { p r i n t f ( fmt , ## a r g s ) ; }
#e l s e
#d e f i n e DEBUG( fmt , a r g s . . . )
#endif
// Get i n t e g e r r e s u l t from a n a l o g i n c h a n n e l .
long a v r 3 2 i o G e t A n a l o g I n ( char c h a n n e l ) ;
// S e t i n t e g e r v a l u e t o a n a l o g o u t c h a n n e l and s u b c h a n n e l .
short a v r 3 2 i o S e t A n a l o g O u t ( char c h a n n e l , char s u b c h a n n e l , unsigned short v a l u e ) ;
// S e t d o u b l e v a l u e t o a n a l o g o u t c h a n n e l and s u b c h a n n e l .
short a v r 3 2 i o S e t A n a l o g O u t D o u b l e ( char c h a n n e l , char s u b c h a n n e l , double v a l u e ) ;
8.4. USER MODE DRIVER
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// Get d i g i t a l i n b y t e .
short a v r 3 2 i o G e t D i g i t a l I n ( ) ;
// Get s i n g l e b i t o f d i g i t a l i n .
short a v r 3 2 i o G e t D i g i t a l I n B i t ( char b i t ) ;
// S e t d i g i t a l o u t w i t h a mask and v a l u e .
short a v r 3 2 i o S e t D i g i t a l O u t ( unsigned char mask , unsigned char v a l u e ) ;
// S e t j u s t a s i n g l e d i g i t a l o u t b i t .
short a v r 3 2 i o S e t D i g i t a l O u t B i t ( char b i t , char v a l u e ) ;
// S e t a new a n a l o g o u t r e s o l u t i o n f o r a c h a n n e l .
short a v r 3 2 i o S e t A n a l o g O u t R e s o l u t i o n ( char c h a n n e l , char r e s o l u t i o n ) ;
// E n a b l e s or d i s a b l e s an a n a l o g i n c h a n n e l ( w i l l o n l y work i n BUFFERING MODE)
short a v r 3 2 i o E n a b l e A n a l o g I n ( char c h a n n e l , char e n a b l e ) ;
// C o n t a i n i n g a d o u b l e v a l u e f o r as f a s t as p o s s i b l e c o n v e r t 0−5 d o u b l e v a l u e t o
integer with the correct r e s o l u t i o n .
double a o u t M u l t i p l i e r [ 2 ] ;
// Mutex used so o n l y one t h r e a d can a c c e s s t h e SPI a t t h e same time .
p t h r e a d m u t e x t spiMutex = PTHREAD MUTEX INITIALIZER ;
#include ” a v r 3 2 i o d r i v e r . c ”
#endif //
AVRDRIVER H
The avr32io_SetAnalogOut() function are shown below, and are an example on how
these functions works. The function are called from a normal user mode program that has
included the header file, and the new value for the analog out are sent as a parameter.
The function then opens the correct device node, and writes the data to it. The data that
originally was a 16-bit integer are converted into two 8-bit integers so the 8-bit ATmega128
can use it.
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short a v r 3 2 i o S e t A n a l o g O u t ( char c h a n n e l , char s u b c h a n n e l , unsigned short v a l u e )
{
int ret , fd ;
char d e v F i l e [ 1 4 ] ;
unsigned char data [ 3 ] ;
// Prepare d a t a t o send .
data [ 0 ] = s u b c h a n n e l ;
data [ 1 ] = v a l u e >> 8 ;
data [ 2 ] = v a l u e ;
p t h r e a d m u t e x l o c k (&spiMutex ) ;
// Open t h e c o r r e c t d e v i c e node .
s p r i n t f ( d e v F i l e , ”/ dev / avr32Aout%i ” , c h a n n e l ) ;
f d = open ( d e v F i l e , O RDWR) ;
i f ( fd < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on open : %i \n ” , f d ) ;
return f d ;
}
// Write d a t a t o d e v i c e node and c l o s e i t .
r e t = w r i t e ( fd , data , 3 ) ;
c l o s e ( fd ) ;
i f ( r e t < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on w r i t e : %i \n ” , r e t ) ;
return r e t ;
}
p t h r e a d m u t e x u n l o c k (& spiMutex ) ;
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CHAPTER 8. IMPLEMENTATION OF I/O-CARD SOFTWARE
return 0 ;
}
8.5
Threaded User Mode Driver
The threaded driver was implemented as a layer above the user mode driver, which means
that it will use the functions of this driver. It should contain function calls for starting the
analog I/O-threads and functions that sends and gets data to these threads. The header
file for the threaded driver are below, while the code file is in the appendix C.3.2.
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#include ” p e r i o d i c T a s k . h ”
#include ” a v r 3 2 i o d r i v e r . h ”
#define MASTER TIMER PERIOD 0 . 0 0 1
// S t r u c t u r e c o n t a i n i n g i n f o r m a t i o n a b o u t each o f t h e a n a l o g i n p u t c h a n n e l s .
struct sAinChan {
i n t chanNumber ;
double v a l u e ;
p t h r e a d m u t e x t mutex ;
struct s P e r i o d i c T a s k samplingTask ;
};
struct sAinChan a i n C h a n L i s t [ 8 ] ;
// S t r u c t u r e f o r l i s t o f command t h e worker t h r e a d has t o e x e c u t e .
struct sAoutCmd{
i n t chanNumber ;
i n t subchanNumber ;
double v a l u e ;
struct sAoutCmd ∗ n e x t ;
};
struct sAoutCmd ∗ a o u t C m d L i s t F i r s t , ∗ aoutCmdListLast ;
p t h r e a d t aoutWorker ; // Worker t h r e a d f o r a n a l o g o u t .
p t h r e a d m u t e x t cmdListMutex = PTHREAD MUTEX INITIALIZER ; // Mutex f o r command l i s t
.
p t h r e a d m u t e x t workMutex = PTHREAD MUTEX INITIALIZER ; // Mutex f o r new command
signal .
p t h r e a d c o n d t workCond = PTHREAD COND INITIALIZER ; // New command s i g n a l .
i n t workCount = 0 ; // Number o f commands i n l i s t .
i n t I O S t a r t e d = 0 ; // P r o t e c t s t h e I n i t I O ( ) f u n c t i o n from b e e i n g run s e v e r a l
times .
// I n i t i a l i z e IO .
void I n i t I O ( ) ;
// I n i t i a l i z e an a n a l o g i n p u t chan n el , and s t a r t a p e r i o d i c t h r e a d t h a t s a m p l e s
t h i s channel .
i n t a v r 3 2 i o I n i t A n a l o g I n ( i n t chanNumber , double p e r i o d ) ;
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// Function f o r a n a l o g i n p u t s a m p l i n g t h r e a d .
void ∗ Sampling Ain ( void ∗ p t r ) ;
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// Give command t o t h e worker t h r e a d a b o u t a new a n a l o g o u t p u t v a l u e .
i n t a v r 3 2 i o S e t A n a l o g O u t T h r e a d ( i n t chanNumber , i n t subchanNumber , double v a l u e ) ;
// Function f o r r e t r i v i n g a n a l o g i n p u t v a l u e from b u f f e r . For some r e a s o n r e t u r n i n g
a d o u b l e d i d n ’ t work w i t h t h e RTW program , so t h e v a l u e w i l l be r e t u r n e d i n a
pointer instead .
i n t a v r 3 2 i o G e t A n a l o g I n T h r e a d ( i n t chanNumber , double ∗ data ) ;
// Function f o r t h e worker t h r e a d , used t o e x e c u t e commands w i t h new a n a l o g o u t p u t
values .
8.5. THREADED USER MODE DRIVER
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void ∗ Worker Aout ( ) ;
#include ” a v r 3 2 i o t h r e a d s . c ”
8.5.1
Threaded Analog Input
To make periodic tasks that samples from the I/O-card, this driver uses the periodicTask
library, that allows to easily make periodic threads. These tasks samples from the I/Ocard and store the analog values in variables, that are protected by a mutex. A function
avr32io_GetAnalogInThread is used by the main thread to get the currently buffered
value.
The SPI connection is also protected by a mutex, to avoid that two threads tries to use it
at the same time. The device driver also has protection against this, that will return an
error if the SPI connection is busy. By using a mutex here, these errors are avoided, and
it’s therefore a better solution.
8.5.2
Threaded Analog Output
The worker thread starts a forever loop and waits for a signal from the main thread. This
signal is a pthread condition variable, and is the same type of signals that are used to
control the periodic tasks in periodicTaks. When the worker thread receives a signal it
means that there is one or more items in the command list. This list is a single linked
list that contain information about new values to analog out channels. After receiving the
signal, the thread starts executing the commands in the list, one at the time until the list
it empty. This list has to be protected with mutexes as well, so new items won’t get added
to the list while the worker thread reads a command from it.
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CHAPTER 8. IMPLEMENTATION OF I/O-CARD SOFTWARE
Chapter 9
Testing with prototype card
This chapter desribes tests performed on the prototype card and the software developed
for it. The parts that are tested, are the API communication and the analog I/O.
9.1
9.1.1
Test of SPI communication
Frequency of SPI connection
In 5.5.4 the highest possible SPI frequency was about 1.9M Hz, which was about one quarter of the clock frequency of STK500. When using a clock twice as high, the ATmega128
should be able to receive SPI transfers with twice as high frequency. In avr32io.c the
following line sets the SPI frequency to the highest that works with ATmega128 as slave.
s p i −>max speed hz = 2 1 0 0 0 0 0 ;
When using an oscilloscope to probe the SPI clock, the time used by one high and one
low period was measured to 0.25µs. This is the time used to transfer one bit of data.
This gives a frequency of 4M Hz. This is one quarter of the frequency of the ATmega128,
which is the theoretical maximum.
9.1.2
Time used on SPI transfers
In 9.1.1 the time used to transfer one bit of data was measured to 0.25µs. The SPI transfer
consists of 8 bits of data serially, which means that the total 8 bits (= 1 byte) takes 2µs.
To test how much time the kernel uses before and between SPI transfers, a small test
system was created that sent out pairs of data transfers. By using an oscilloscope, the
time between the two pairs of data was measured. The test system could send pairs of
data in two different ways. Either sending two individual bytes of data, or sending two
bytes of data at the time.
When sending two individual bytes, the test system used 23.5µs from the end of the first
to the start of the last byte. When sending the two bytes at the same time, this time was
reduced to 9.2µs. First of all, this means that the AVR32 uses much more time preparing
and configuring the SPI transfer than it uses on the SPI transfer itself. It also means that
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CHAPTER 9. TESTING WITH PROTOTYPE CARD
to minimize the time used, it’s important to send several bytes at the same time whenever
possible.
This have been used in the device driver. When sending data to the I/O-card, all the
data are sent at once, and the acknowledgments returned by the I/O-card was checked
afterwards. When receiving data from the I/O-card this was not possible to do, since each
acknowledgment consist of the previously received byte. This means that only one byte
can be sent at the time. This makes the digital input command slower than the digital
output command, as seen in 9.1.3, even if they transfer the same amount of data.
9.1.3
Time used on Commands
How many commands that could be sent during a period of time depends on how long it
takes to send a command. To find out this, a test was designed to find the average time
used by each command when doing 10000 equal commands. When testing the analog out
command the code below was used.
StartStopWatch (&sw ) ;
f o r ( i =0; i <COUNT; i ++){
r e t = avrIO SetAnalogOut ( 0 , 0 , 2 . 5 ) ;
i f ( r e t < 0 ) break ;
}
u s e c = StopStopWatch(&sw ) ;
p r i n t f ( ”Analog out r e s u l t : %i u s e c : %i \n ” , r e t , u s e c /COUNT) ;
Table 9.1 shows the average number of microseconds the different commands used. It
shows that the commands use between 180µs and 400µs. This means that only a two to
five commands can be sent each millisecond.
Table 9.1: Time used for executing the different commands
Command
Average time
Enable analog in channel
229µs
Change analog out resolution
233µs
Get analog in voltage continuous mode 286µs
Get analog in voltage interrupt mode
406µs
Set analog out voltage
250µs
217µs
Get digital in
Set digital out
182µs
9.1.4
Reliability
When testing the average time used by each command, the reliability of the communication
was tested as well. If any of the 10000 commands returned an error, the test would abort.
The test was performed several times, with almost no errors, so it’s safe to say that the
communication is almost free for errors. Since the transfer nearly error free, the error
detection might not be necessary.
9.2. TEST OF ANALOG OUTPUT
9.1.5
79
Reliability when using Timeout
The ATmega128 can use timeouts when it waits for SPI transfers, to avoid the possibility
of ending in an unknown state. The problems with this is that a timeout may be triggered
before the AVR32 is able to send the next SPI transfer. A test was performed to find
out how often errors occurs for different timeout values. The results are in table 9.2. The
results show that a high timeout has to be selected to avoid errors, but when using a
timeout about 100µs the chance of error is low enough to be ignored.
Table 9.2: Chance of error
Timeout
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8
10
15
20
25
9.2
9.2.1
with different slave SPI timeouts
µs
Error %
20
59.1%
40
5.85%
60
5.23%
80
0.70%
120 0.020%
160 0.005%
200 0.004%
300 0.004%
400 0.004%
500 0.000%
Test of Analog Output
Simulation
One reason for making a prototype card was to try out different filters for the analog
out channels. To convert PWM signals to analog signals, low-pass filters were used, as
explained in 5.3. As explained in 5.3.3, a filter has a RC value that determine the response
time. With Simulink simulations, the value RC = 1.0 ∗ 10−4 was found to give a response
time of about 0.3ms. This is shown in figure 9.1
9.2.2
Testing Filters
In 9.2.1 Simulink simulations was used to find that when testing filters, they should have a
RC values around 1e−4 . Three different filters were tested, one higher, one lower and one
approximately this value. The ripple and response time where measured with an oscilloscope for the different filters with 8, 9, 10, 11 and 12 bits resolutions. Since the response
time does not change for different resolution, only the value for 8-bit was measured. Table
9.3 shows the results.
These results shows the that ripple increases for higher resolution and for lower RC values.
It also shows that the acutual response time was higher than the simulated response time.
RC = 1.0 ∗ 10−4 gave a response time of 0.5ms. A higher response time than this is not
acceptable if the system should be able to have a fast changing analog output. The final
card should have RC values around this value.
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CHAPTER 9. TESTING WITH PROTOTYPE CARD
5
4.5
4
3.5
Volt
3
2.5
2
1.5
1
0.5
0
0
0.2
0.4
0.6
Time
0.8
1
−3
x 10
Figure 9.1: RC = 1.0 ∗ 10−4 gives a response time of 0.3ms.
R
0.36kΩ
1kΩ
3kΩ
9.2.3
Table 9.3: Results of analog output filters
C
RC
Response time Resolution
−4
100nF 0.36 ∗ 10
0.2ms
8-bit
9-bit
10-bit
11-bit
12-bit
−4
100nF 1.0 ∗ 10
0.5ms
8-bit
9-bit
10-bit
11-bit
12-bit
−4
100nF 3.0 ∗ 10
1.3ms
8-bit
9-bit
10-bit
11-bit
12-bit
Ripple
20mV
75mV
222mV
640mV
1400mV
5mV
15mV
45mV
140mV
400mV
< 5mV
5mV
10mV
25mV
70mV
Operational Amplifiers
When connecting the op amps to the prototype card, the op amps was only able to give
out voltages between 2V and 3V . This is because the op amp that was used (MC1458)
could not give outputs that was less than (V − + 2V ) or more than (V + − 2V ). Since
V − = GN D and V + = VCC the output range became limited. The final version of the
card should have another type of op-amps and these will need other supply voltages.
9.3. TEST OF ANALOG INPUT
9.3
9.3.1
81
Test of Analog Input
Precision of Analog Input
In 5.2.1 the precision of the ADC of ATmega128 was tested. The result was not very
precise. When testing the ADC of the prototype card the AVR32 used the analog input
command to do the conversion. Table 9.4 shows that the analog input part of the I/Ocard gives very accurate results. On the prototype card, the inductor of the LC-filter was
replaced with a short circuit, bu it didn’t seem like this affected the result.
Table 9.4: Results of ADC test with prototype card
Voltage Multimeter voltage ADC result in voltage
2.5V
2.50V
2.47V
3.3V
3.27V
3.26V
5V
5.00V
5.00V
9.3.2
Buffering and Interrupt mode
The design and implementation of the analog input was done in two ways, and both gives
correct values. In 9.1.3 the time used by the two different modes was measured, and the
result was that with interrupts the command used about 120µs longer. This is just a bit
more than the 104µs that an ADC conversion should take according to 7.2.2, and is as
expected.
The advantage of using interrupts is that the returned result are a newly converted result.
When using buffering mode, there is no way to know how old the result are. If many
channels are used, the result might be almost 1ms old. If few channels are used, the result
will be almost new. The advantage of saving almost one third of the time used for getting
an analog input value means that buffering mode will be used in the rest of the thesis.
Interrupt mode will be available in the code, and can be used by changing the header files
of both the ATmega128 code and the device driver.
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Chapter 10
Final version of I/O-card
The purpose of the prototype card was to make a customizable card with good debugging
capabilities, while the new and final version of the card was designed to be of less physical
size and easier to use. The new card also had corrected the flaws of the prototype card
and introduced a few extra features.
10.1
Changes from Prototype
◦ Used SMD components when possible, which makes the card smaller.
◦ Removed the RS-232 connection, since this was only used for debugging. This makes
the card smaller, and also reduced total cost of the card, since the MAX233 is fairly
expensive. The UART signals of the ATmega128 were made available on headers,
so it’s possible to use them if needed.
◦ Added header interface for the NGW board. This is a new AVR32 development
board that has a slightly different expansion header than STK1000. The headers are
also smaller, and only use the necessary signals. The interrupt signal was no longer
sent through the normal header, but has to use another wire between a interrupt
header on the I/O card and the header on the STK1000/NGW.
◦ Used headers for digital I/O instead of screw clamps. The choice of screw clamps
for these signals was a mistake, since they took to much space. Headers are smaller
and equally easy to use. They are also commonly used for digital signals.
◦ Added a bridge rectifier before the voltage regulator. This means that the polarity of
the external power source doesn’t matter. Without a rectifier, the voltage regulator
might be broken if a negative voltage is applied. This makes the card more “foolproof”.
◦ Added a screw clamp power supply in addition to the ordinary power jack plug. This
makes it easy to connect different power sources.
◦ On the new card all screw clamps and headers are marked with numbers that corresponds to the number of pin on ATmega128. Analog in channel 0 is the same as the
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CHAPTER 10. FINAL VERSION OF I/O-CARD
ADC0 pin on ATmega128, and so on. Ordering these signals gives a slightly more
complex routing, but it’s more practical and easy to use.
◦ A new type of op amps were used, to correct the flaw described in 9.2.3. These
op-amps are single supply op amps, that are able to give output between GN D and
(V + − 2V ). As V + the rectified but unregulated power supply was used, since the
op amp don’t need regulated power supply. This means that the output range of the
op amp are defined by the supply voltage of the I/O-card. The disadvantage of this
solution is that the op-amps, and therefor the analog output, will not work when
running on power from the STK1000 board.
◦ All three subchannels on the first channel (channel 0) of the analog out was designed
with two jumpers each. One of these jumpers were used to bypass the filter, meaning
that the output will be a PWM signal instead of a analog signal. This is useful when
using components like servos. The other jumper are used to change the op-amp
circuit from being a voltage follower to a non-inverting amplifier that amplifies the
0V − 5V signal to a 0V − 10V signal. To use this option, the power supply has to
be high enough so the op-amps can give out 10V .
◦ The PWM filters were made with resistors with value R = 3.9kΩ and capacitors
with value C = 22nF , giving them RC = 8.58 ∗ 10−5 . This should give a response
time around half a millisecond.
10.2
Schematic
The whole schematic of the final version of the card are in the appendix B.2. This schematic
is the same as the prototype except for the changes described in 10.1
10.3
Layout
The layout of the final I/O-card are shown in 10.1 on the facing page and 10.2 on the next
page. Since it used SMD components whenever possible and other design changes, this
card was almost half the size of the prototype. Since more components are SMD, almost
all of them were placed on the top layer of the card instead of the bottom layer on the
prototype. Since the I/O-signals were ordered after pin numbers, it meant that the routing
of signals was more complex than for the prototype card. This made the gain of placing
the ATmega128 on the bottom layer less than for the prototype card, since both solutions
would be equally complex. Therefor the top layer was chosen because of cosmetic reasons.
Figure 10.3 on page 86 is an image of an almost assembeled final version of the I/O-card.
10.4
Problems with Analog Output
The new I/O-card also had problems with the analog output. The operational amplifiers
and the supply voltage for these worked better than on the prototype, but the filters for
converting the PWM signals to analog voltages didn’t work. They gave out lower voltages
10.4. PROBLEMS WITH ANALOG OUTPUT
Figure 10.1: Top layer of final card. (Not to scale)
Figure 10.2: Bottom layer of final card. (Not to scale)
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CHAPTER 10. FINAL VERSION OF I/O-CARD
Figure 10.3: Final version of I/O-card
than they should have. The reason for this is unknown, but the filters was difficult to
solder since the SMD resistors and capacitors were very small and were placed on a small
surface. Inaccurate assembly may be the reason for the poor performance of the filters.
Redesign of this I/O-card should give the filters more space.
Chapter 11
Matlab Real-Time Workshop
11.1
Matlab Real-Time Workshop
Matlab Simulink can be used to design and simulate mathematical models. With the
help of Matlab Real-Time Workshop (RTW for short) C-code can be generated from the
Simulink model. The code will (if compiled) give a program that does the same simulation
as in Simulink. This can be used for rapid prototyping control systems, as described in
2.4. How to use RTW is described in [13]
11.1.1
Target Language Compiler (TLC)
When Matlab Real-Time workshop generates C-code from a Simulink diagram it actually
does it in two steps. The first step is to make a .rtw file. This file contains all the
information from the Simulink diagram presented in a hierarchy The TLC language is
describes in detail in [12].
The TLC is the second step of the code generation, and it generates multiple source
files from the information in the .rtw file and several .tlc files. The .rtw file contains
information about the Simulink diagram, while the different .tlc files contain information
on how the generated code should look like.
It’s two different types of .tlc files. The system target file specify the overall structure of
the generated code, and it’s selected before generating code among a list of system target
files supplied with RTW. It’s also possible to change existing or make new system target
files. For rapid prototyping the general real-time target (grt) is a good starting point.
This makes C-code that can run on most platforms, as shown in 4.3.
Code generated with grt, will as in Simulink execute the simulation as fast as possible. A
control system has to execute the simulation with correct time between each time step, or
it wouldn’t work as intended. To make this possible with grt, some of the code have to be
modified.
Each Simulink block has its own block target file. This file contain the information TLC
needs to generate code that does the same as the block would do in Simulink.
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CHAPTER 11. MATLAB REAL-TIME WORKSHOP
11.1.2
S-functions
S-functions are Simulink blocks written in a computer programming language, like Matlabs
own language M, C, C++, Ada and FORTRAN. This allows users to add their own blocks
in Simulink, that can have functionality that normal Simulink blocks can’t provide. When
using Matlab RTW as a rapid prototyping tool for a control system, S-functions are often
used to control I/O.
S-functions are written as a code file for the selected computer language, but this file has
to follow a specific structure. To use the S-function the code has to be compiled using the
Matlab command mex. As for other compiled program, this file has to be compiled again
each time changes have been made.
When using RTW, it’s possible to use three types of S-functions, that are described below.
◦ Noninlined S-functions are S-functions that doesn’t have a .tlc file, which means
that it’s treated equally by Simulink and RTW. This is the easiest solution, since
everything that works in Simulink will work equally in RTW, and it’s not necessary to
write any TLC code. Unfortunately this is not very efficient, and will need additional
CPU and memory usage when running a program from the generated code.
◦ Fully inlined S-functions have a .tlc (target block) file, and the behavior of the
S-function in RTW is defined by this file, and not by the S-function code file used
by Simulink. This means that the S-function might not do the same thing when
simulating in Simulink as, when running the program made by RTW generated
code. This can both be a good and a bad feature. If the block is supposed to do the
same in both cases, it will be error-prone and time consuming to upgrade two files at
the same time. In some applications like controlling I/O, it might be preferable that
the Simulink simulation does something different than the RTW generated code.
◦ Wrapper S-functions are a special type of inlined S-functions, where a third code
file is used. This file has functions that both the .tlc file and S-function code files
uses. This allows the Simulink and RTW to execute the same code as in a noninlined
S-function, but without the loss of performance.
11.2
Making a AVR32 Real-Time Target
When using Matlab RTW, a system target has to be chosen. This system target defines
how code will be generated and compiled. As mentioned in 11.1.1, the GRT system target
generates code that will run on most platforms, and in 4.3 GRT generated code with a
few modifications, compiled and ran on AVR32.
One of the goals with this thesis is to make a system that is easy to install and use.
Because of this, a new system target was created, based on the GRT. This system target
was named AVR32 Real-Time Target and will be installed by moving a directory into
MATLAB_ROOT/rtw/c.
11.2. MAKING A AVR32 REAL-TIME TARGET
11.2.1
89
avr32.tlc
This is the system target file for the new AVR32 Real-Time Target, and it’s the file that
controls how code are generated. Since the code generated by GRT will compile and
run on AVR32 with a few modifications to the Makefile, this file will be very similar to
grt.tlc. The few changes necessary are to specify a new Makefile template and change
some names.
Each system target has a short text that describes itself, which is showed in the list
where users can choose system targets. To change this text, and specify a new Makefile,
the following lines has to be added to the top of the avr32.tlc file. Any similar lines
(containing SYSTLC or TMF) should be removed.
1
2
%% SYSTLC : AVR32 Real−Time T arg et \
%%
TMF: a v r 3 2 . tmf MAKE: make rtw EXTMODE: ext comm
In the end of the grt.tlc file, a suffix for the generated code directory is specified. This
should be changed to another name by using the line below instead of the original line.
168
rtwgensettings . BuildDirSuffix = ’ avr32 rtw ’ ;
11.2.2
avr32.tmf
This is the Makefile template of the system target, that was made by doing some modifications to the grt_unix.tmf file. The Makefile template for GRT on UNIX/Linux platforms.
The first change was to replace the “grt.tlc” with “avr32.tlc” as system target file. This is
done changing the original system target file definition with the line below.
46
SYS TARGET FILE = a v r 3 2 . t l c
The next step is to change the compiler and compiler flags used by the Makefile. This is
done by adding the following lines before the “C flags” section of the original template.
This should be around line 185 of the original file.
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184
185
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188
189
190
191
192
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#−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− AVR32 S p e c i f i c −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−
#AVR32 c o m p i l a t o r
CC=avr32−l i n u x −g c c
#Removes −m32
OPT OPTS = −O − f f l o a t −s t o r e −fPIC
#L i n k s with p t h r e a d
LDFLAGS = −l p t h r e a d
#e n a b l e s // comments
ANSI OPTS =
The line starting with CC are used to specify the AVR32 compiler, and the line with
OPT_OPTS are used to remove the -m32 flag causes an error, as I discovered in 4.3. This
flag specifies that the target is a 32-bit processor, and is unknown for the AVR32 compiler.
With these two changes, the compilation to AVR32 works, and it produces a runnable
executable.
The line starting with LDFLAGS means that the executable will be linked with the pthread
library. This is required for using pthread, that are needed for using threads, mutexes and
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CHAPTER 11. MATLAB REAL-TIME WORKSHOP
other pthread functionality. The last line was used to remove the -ansi flag. This doesn’t
affect the compilation, it will only make it possible to comment code with double slash //.
The next issue that needs to be modified is the C file containing the main function used
by the generated code. This is done by replacing the grt_main.c with avr32_main.c in
line 233 of the original file. The new line should then look like this:
244
SRCS
+= $ (MODEL) . $ (TARGET LANG EXT) a vr 3 2 m a i n . c r t s i m . c $ (
EXT SRC) $ (SOLVER)
Since the new AVR32 target files are in another directory than the GRT target files, the
Makefile has to be changed so it compiles the correct files. This are done by adding the
following lines. The lines that are equal but contain the rtw/c/grt instead should be
removed.
339
340
341
%.o : $ (MATLAB ROOT) / rtw / c / a v r 3 2 /%. c
@$(GCC TEST CMD) $< $ (GCC TEST OUT)
$ (CC) −c $ (CFLAGS) $ (GCC WALL FLAG MAX) $<
11.2.3
avr32main.c
The Makefile template specifies that the new system target will use a C file named
avr32_main.c. This file is also based on the GRT C file called grt_main.c. As mentioned in 11.1.1, GRT version of the file makes a program that execute all time-steps as
fast as possible. The reason for modifying the avr32_main.c is to make a control system
that executes the time steps of the simulation periodically, and it has to include the files
necessary to use the I/O-card.
For making the program execute the time steps periodically periodicTask library presented and used in 4.2 was used. The I/O-card user mode driver has to be included,
since they are used by the S-functions, see 11.3. For debugging and testing of the RTW
generated code, the stopWatch library was used. This was used to calculate how much
time the AVR32 used on each of the time step.
The following lines was added after the other #include statements of the original file.
These lines contain the different files required by this new main function file. The threaded
version of the user mode driver was included, since it includes the non-threaded version.
48
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50
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/∗ AVR32
#include
#include
#include
i n c l u d e s ∗/
”driver / avr32io threads . h”
”driver / periodicTask . h”
” d r i v e r / stopwatch . h ”
The following lines are global structures and variables that are needed to make the time
steps periodical and to measure the workload,
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159
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/∗===================∗
∗ G l o b a l AVR32 Data ∗
∗===================∗/
struct s P e r i o d i c T a s k m a t l a b S i m u l a t i o n P e r i o d e ;
struct sStopWatch timerStopWatch , workStopWatch ;
long usecWork , usecTimer ;
i n t count =0;
The following lines are added to make the time steps periodical. These should be added
twice in the file, one time for single tasking and one for multitasking. Both places where
11.3. S-FUNCTIONS FOR I/O-CARD
91
this function should be added are marked in the original file with a comment saying that
“interrupts should be enabled here”.
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233
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/∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗
∗ AVR32 Timing i n t e r r u p t ∗
∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗/
StartStopWatch (&timerStopWatch ) ;
usecWork += StopStopWatch(&workStopWatch ) ;
W a i t P e r i o d i c T a s k (& m a t l a b S i m u l a t i o n P e r i o d e ) ;
usecTimer += StopStopWatch(&timerStopWatch ) ;
StartStopWatch (&timerStopWatch ) ;
StartStopWatch (&workStopWatch ) ;
count++;
The WaitPeriodicTask function is a function that wait until the next period before returning. This function is defined in the periodicTask library. Two different stopwatches
(two different stopwatch structures) are used to measure the time used in each period,
and how much of the period the processor are working (the time it doesn’t wait for next
period).
The following code are in the start of the main function, and it initialize and start the
timer. rtmGetStepSize(S) will return the time step in seconds, and this is used to set
the period time. Since that function needs the variable S to work, these lines have to be
added last in the initialization part of the main function. This means just above the big
comment block which is named “Execute the model”.
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638
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640
/∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗
∗ I n i t i a l i z e AVR32 Timing ∗
∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗/
InitPeriodicTasks () ;
S t a r t P e r i o d i c T a s k (& m a t l a b S i m u l a t i o n P e r i o d e , ( i n t ) ( r t m G e t S t e p S i z e ( S ) ∗ 1 0 0 0 ) ) ;
The last bit of code is used to print out the results of the time measurements. This code
has to be added in the main function after the simulation is finished. It’s not dependent
on any RTW code, so it can be added just above the return statement.
713
714
715
/∗ For d e b u g g i n g ∗/
p r i n t f ( ”Avrage p e r i o d e : %i \n ” , usecTimer / count ) ;
p r i n t f ( ”Avrage work : %i \n ” , usecWork / count ) ;
11.3
S-functions for I/O-card
11.2 described the changes needed to compile the generated code for AVR32, and make
the code execute the time steps periodically. This means that systems made in Simulink
can run on AVR32, but it doesn’t make it able to use the I/O-card. S-functions were made
to control the I/O-card. They are, as explained in 11.1.2, Simulink blocks that are coded
in a programming language.
There are different types of S-functions, but here only fully inlined S-functions were used.
First of all, it’s important that the program are as effective as possible, since the AVR32
aren’t very fast and STK1000 have a very limited amount of RAM. That meant that
noninlined functions wouldn’t be a good choice. Fully inlined was preferred before wrapper,
since these S-functions should behave different when running simulations in Simulink and
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CHAPTER 11. MATLAB REAL-TIME WORKSHOP
when running a RTW generated program on STK1000. It wouldn’t make sense to try and
contact the I/O-card via SPI from a workstation computer.
The following S-functions has been created:
◦ Analog input, reads one or more analog input channel of the I/O-card and gives
values between 0 and 5.
◦ Threaded analog input, does the same as the normal analog input, except that it
uses the threads for I/O operations.
◦ Analog output, takes value between 0 and 5 and writes it to the used subchannels.
Can also select resolution between 8-bit and 12-bit.
◦ Threaded analog output, does the same as the normal analog output, except that it
uses the threads for I/O operations.
◦ Digital input, reads all digital input channels of the I/O-card and gives either low
(0) or high (5) values.
◦ Digital output, writes values to digital outputs of the I/O-card. Limit values can be
selected for each channel, and are used to decide if the digital output should be high
or low.
11.3.1
Simulink S-function File
The Simulink S-function file is the file that defines how the S-function works in Simulink.
sfuntmpl_basic.c is a template file for simple S-functions, and it will be used here. Since
the workstation computer that runs Simulink, can’t use the I/O-card, the S-functions will
have Simulink S-function files that doesn’t do anything during simulation. This means
that the only function from sfuntmpl_basic.c that will be modified is the mdlInitializeSizes(), that defines different sizes of the S-function.
The sizes that are changed from the template is the number of input, outputs and parameters used by the S-function. These numbers are different for the different S-functions,
as described in table 11.1. Notice that the input S-functions has outputs and visa verca,
since a input S-function reads from the I/O-card and send the signals out of the block.
Table 11.1: Sizes of the different S-functions
S-function
Inputs Outputs Parameters
Analog input
0
8
0
Threaded analog input
0
8
8 (sampling time)
Analog output
6
0
2 (resolution)
Threaded analog output 6
0
2 (resolution)
Digital input
0
8
0
1
0
8 (limit value)
Digital output
Below is the mdlInitializeSizes() function of the analog input S-function. This is an
example of what these functions look like. The whole files are on the CD-ROM
45
46
47
s t a t i c void m d l I n i t i a l i z e S i z e s ( S i m S t r u c t ∗S )
{
int i ;
11.4. RESULTS
48
49
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51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
93
/∗ See s f u n t m p l d o c . c f o r more d e t a i l s on t h e macros b e l o w ∗/
ssSetNumSFcnParams ( S , 0 ) ;
/∗ Number o f e x p e c t e d p a r a m e t e r s ∗/
i f ( ssGetNumSFcnParams ( S ) != ssGetSFcnParamsCount ( S ) ) {
/∗ Return i f number o f e x p e c t e d != number o f a c t u a l p a r a m e t e r s ∗/
return ;
}
ssSetNumContStates ( S , 0 ) ;
ssSetNumDiscStates (S , 0) ;
if
( ! ssSetNumInputPorts ( S , 0 ) ) return ;
i f ( ! ssSetNumOutputPorts ( S , 8 ) ) return ;
f o r ( i =0; i <8; i ++){
ssSetOutputPortWidth ( S , i , 1 ) ;
}
ssSetNumSampleTimes ( S , 1 ) ;
ssSetNumRWork ( S , 0 ) ;
ssSetNumIWork ( S , 0 ) ;
ssSetNumPWork ( S , 0 ) ;
ssSetNumModes ( S , 0 ) ;
ssSetNumNonsampledZCs ( S , 0 ) ;
ssSetOptions (S , 0) ;
}
11.3.2
Target Block Files
Target block files are written in the TLC language and defines how code should be generated for the S-function. Two TLC functions are used, the InitializeConditions function
generates code that initialize the I/O-card, and the Outputs function generates code that
reads or writes to the I/O-card each time step. Since the TLC language is able to find out
which inputs and outputs of the blocks that are connected, code will only be generated
for the connected ports.
The target block files for the S-functions are in the appendix, from C.4.1 to C.4.4. Lines
start start with % are some kinds of TLC statements, like looping through all inputs or
outputs of a S-function. There are also some %< > tags in these files, that are TLC variables
or functions. All these will be replaced with some text in the generated code.
11.4
Results
Several Simulink diagrams were made to test how signals could be sent through the I/Ocard. With Real-Time Workshop generated code. This was done by connecting inputs
and outputs of the I/O-card together, so a signal that was sent to an output in Simulink
could be read by an input in Simulink.
11.4.1
Results of Analog Test
As mentioned in 10.4, the analog output channels of the I/O-card did not work as planned.
To be able to perform this test, a back up filter was made with regular resistors, capacitors
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CHAPTER 11. MATLAB REAL-TIME WORKSHOP
untitled.mat
Chan 0.0
Chan 0
Chan 1
Chan 2
Chan 3
Chan 4
Chan 5
Chan 6
Chan 7
Chan 0.1
Sine Wave
Chan 0.2
Chan 1.0
Chan 1.1
Chan 1.2
AVR32
Analog
Output
To File
AVR32
Analog
Input
Figure 11.1: Simulink model used for testing the S-functions and the I/O-card
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
Figure 11.2: Results of sending sinus signal through analog I/O
and a breadboard1 . This gave a much better analog value than the SMD components on
the I/O-card did, which strenghten the theory that the card was assembled poorly.
A Simulink diagram was made, that contained a sinus source, a data logger and the blocks
for analog input and output. This can be seen in figure 11.1. The time step used in this
diagram was 5ms. Figure 11.2 shows the original sinus signals together with sinus signals
sent through the analog I/O, both by using normal and threaded I/O blocks.
Figure 11.2 shows that sinus signals that was sent through either the normal or threaded
analog I/O blocks was delayed compared to the original signal. The normal blocks were
delayed one time step of 5ms, which makes sense, since it means that the value sent to
the analog output one time step will be read by the analog input the next.
The threaded blocks have higher delays, about 3 time steps. This is because of the double
buffering and that the complexity of the threaded drivers adds some overhead. This is a
considerable delay, and means that threaded I/O gives a worse result than normal I/O.
To get a performance gain from using threads, the implementation has to be optimized.
1
A breadboard is a electronics prototype board where components can easily be connected without
soldering.
11.4. RESULTS
95
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
Figure 11.3: Results of sending sinus signal through analog I/O with low sampling frequency
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
Figure 11.4: Results of sending sinus signal through digital I/O
11.3 shows what may happen if the sampling thread has a long period. Several of the
Simulink time steps will read the same analog input value. This will be a problem if the
input signal changes fast, but for a more stable signal it would be a good opportunity to
reduce the SPI usage.
11.4.2
Results of Digital Test
This test was executed almost in the same way as the analog test. This means that a
sinus signal was sent to one of the channels of the digital outputs, that was connected
to the digital input. Since the digital output only can send 0V or 5V signals, the digital
input should receive a square signal. Figure 11.4 shows how two different square signals
are made in this way with a sinus signal. The two signals have different duty-cycles, since
they have been made with different limit values in the digital output S-function.
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CHAPTER 11. MATLAB REAL-TIME WORKSHOP
Chapter 12
User manual for AVR32 I/O
In June 2007 Øyvind Netland finished a master thesis[24] about how to use the new Atmel
AVR32 processor architecture as a control system. In this work a STK1000 development
board was used together with an I/O-card that was developed during the thesis. This I/Ocard communicates with the STK1000 through SPI, and it has 6-channel analog output,
8-channel analog input, 8-channel digital output and 8-channel digital input.
This manual describes a control system platform that consists of AVR32 Linux running
on a STK1000 or NGW development board from Atmel and the AVR32 I/O-card. This
platform is used together with a Linux or Windows workstation that can use Matlab
Real-Time Workshop as a rapid prototyping tool. Readers of this manual should have
some experience with using Linux, since not all basic Linux commands are explained.
Readers should also read the documentation for AVR32 Linux on AVR freaks Wiki http:
//www.avrfreaks.net/wiki and the AVR32 Linux project http://avr32linux.org.
12.1
Installing
Before using this system platform, some tools has to be installed on the workstation. This
workstation can be either a Windows or Linux workstation that has Matlab Real-Time
Workshop installed. The install instructions are based on a Ubuntu Workstation, but
installing on other Linux distributions should be similar.
12.1.1
Install AVR32 tool-chain
For Ubuntu the AVR32 tool-chain can be installed with the Apt package management
system. To add the AVR32 repository to the Apt sources, the following line has to be
added at the end of /etc/apt/sources.list.
deb h t t p : / /www. atmel . no / b e t a w a r e / a v r 3 2 / ubuntu / dapper b i n a r y /
To install the tools, execute the following commands, and answer yes to all questions.
˜ $ sudo a p t i t u d e update
˜ $ sudo a p t i t u d e i n s t a l l avr32−l i n u x −d e v e l
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CHAPTER 12. USER MANUAL FOR AVR32 I/O
If this approach doesn’t work, or instructions for installing on other platforms, check the
AVR freaks Wiki (http://www.avrfreaks.net/wiki).
12.1.2
Compile Linux kernel with AVR32 I/O-card support
This system uses a patched version of the Linux kernel version 2.6.20. The patches needed
are the 2.6.20-avr2 patchset from http://www.avr32linux.org and the avr32io patch
from the CD-ROM. To patch, configure and compile the kernel with AVR32 I/O-card
support, Use the commands below from a directory with the Linux source tarball and the
two patches.
˜$
˜$
˜$
˜$
˜$
˜$
t a r x j f l i n u x − 2 . 6 . 2 0 . t a r . bz2
cd l i n u x − 2 . 6 . 2 0
patch −p1 < . . / l i n u x −2.6.20 − a v r 2 . patch
patch −p1 < . . / l i n u x −2.6.20 − a v r 3 2 i o . patch
make ARCH=a v r 3 2 CROSS COMPILE=avr32−l i n u x − me nuco nfig
make ARCH=a v r 3 2 CROSS COMPILE=avr32−l i n u x −
The second last command will open a menu based configure tool for the Linux kernel. To
enable AVR32 I/O, the Atmel SPI Controller and AVR32 I/O-card has to be enabled.
These are both found in device drivers/SPI support. Another solution is to use the
linux-2.6.20-avr32io-config file from the CD-ROM and rename it to .config and
move it to the linux source folder. The last command will compile the kernel and make
an uImage, which is the kernel binary file.
To be able to use the AVR32 I/O-card support, the file system of AVR32 Linux needs some
device nodes for this card. These are made by running a script as root on the workstation
called mknod.sh that are on the CD-ROM. The script has to be modified to use the correct
major number and file system path. The major number are printed out during booting,
or can be found when running more /proc/devices on AVR32 Linux. The file system
path is the path to the file system of AVR32 Linux, either a SD-card or a shared folder
on the workstation.
12.1.3
Install AVR32 support in Matlab
Matlab Real-Time Workshop can generate code that with few modifications can be compiled for AVR32, but to make it easier to use, a new system target files have been created.
These are located on the CD-ROM, in the folder matlab/avr32. The content of this
folder should be copied into matlab_root/rtw/c/avr32 on the workstation computer,
where matlab_root is the folder where Matlab is installed.
When copying the avr32 directory, the subdirectory blocks is also copied. This directory
contain the S-functions that are used to control the I/O-card. These has to be compiled
for Matlab. Start up Matlab and move to the blocks directory. If using Linux, Matlab
has to be started as root. Run the commands below to compile the S-functions.
˜$
˜$
˜$
˜$
˜$
˜$
mex
mex
mex
mex
mex
mex
avr32io
avr32io
avr32io
avr32io
avr32io
avr32io
ain . c
aout . c
din . c
dout . c
ain thread . c
aout thread . c
12.2. AVR32 I/O-CARD
99
If this gives an error, the mex compiler has to be configured. The following command
starts a simple interactive configuration.
˜$
mex −s
To use the S-functions in the library, this directory has to be in Matlabs path variable.
To add the path use the following commands in Linux, or similar if Matlab is installed
somewhere else.
˜ $ addpath / u s r / l o c a l / matlab / rtw / c / a v r 3 2 / b l o c k s
˜$ savepath
To add the path when using Windows, the following commands should be used:
˜ $ addpath c : \ Program F i l e s \ Matlab \ rtw \ c \ a v r 3 2 \ b l o c k s
˜$ savepath
Now the S-functions for the I/O-card are available in the library in the blocks directory,
and they can be used in other Simulink models.
12.2
AVR32 I/O-card
12.2.1
Hardware description
AVR32 I/O-card is an add-on card for STK1000. It provides the following I/O:
◦ 8-channel analog input, with a resolution of 10 bits. The analog value can be between
0V − 5V , where 0V equals ground.
◦ 6-channel analog output, with a resolution between 8 and 12 bits. 3 of the channels
has output between 0V − 5V , where 0V equals ground. The 3 other channels have
jumpers for selecting output type, see 12.2.4.
◦ 8-channel digital input.
◦ 8-channel digital output.
Figure 12.1 show the front side of the I/O-card, below are a description of the different
parts:
1. Screw clamps for ground and VCC , that gives easy access to these signals.
2. Jumper for selecting if analog output channels 0.0 − 0.2 should have 5V or 10V
output.
3. Screw clamps for analog output signals.
4. Connector or screw clamp for external power supply. The supply should be between
9V and 18V , and the polarity doesn’t matter, because of a bridge rectifier.
5. Jumper for selecting if external power supply or supply from STK1000 should be
used.
6. Operational amplifiers used as voltage followers or non-inverting amplifiers.
100
CHAPTER 12. USER MANUAL FOR AVR32 I/O
Figure 12.1: I/O-card
12.2. AVR32 I/O-CARD
101
7. Jumpers for bypassing the filter which means that the analog output will become a
PWM signal.
8. Passive filters that are used to convert a PWM signal into an analog voltage.
9. Headers for connecting STK1000 or NGW development boards.
10. LC-filter for the analog in power-supply.
11. Reset button
12. UART headers that can be used for debugging.
13. AVR32 interrupt signals, that can be connected to STK1000/NGW if interrupts are
used. Not normally used, but might be useful for further development.
14. ATmega128 is the microcontroller that controls the I/O-card.
15. JTAG header for programming and debug ATmega128.
16. Screw clamps for analog input signals.
17. Header for digital input signals.
18. Header for digital output signals.
12.2.2
Connecting I/O-card
The I/O-card connects to either a STK1000 or NGW board through a 14 pin header cable.
On STK1000 cards this header cable connects from the header marked STK on the I/Ocard, to the general expansion header marked J29 on STK1000. On NGW it connects
from the header marked NGW to the general expansion header called J5 on NGW. On
both boards the header has to be connected to pins 0-13. If interrupts are used, interrupt
signals from the I/O-card has to be connected to the STK1000 or NGW boards aswell.
12.2.3
Analog Input
The card has 8 Analog input channels with 10-bit resolution. Each of these can measure
an voltage between 0V and 5V above GN D. The I/O-card will continuously convert
analog values into digital values and buffer them. Each analog input channel that are
used increased the time a value is stored in the buffer before it’s updated by about 110µs.
This means that if four channels are used, the values are stored about 440µs before they
are updated.
12.2.4
Analog Output
The card has 2 Analog output channels with 8-bit to 12-bit resolution. Each of these
channels have 3 subchannels that can have different analog values. The analog outputs
are generated with PWM timers and passive filters. This means that a high resolution will
give high ripple on the analog output voltage. Table 12.1 contains the maximum ripple
amplitude for different resoultions.
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CHAPTER 12. USER MANUAL FOR AVR32 I/O
Table 12.1: Rippe for different resolutions
Resolution Ripple
8-bit
10mV
9-bit
20mV
10-bit
60mV
11-bit
180mV
12-bit
500mV
Channel 0 has jumpers that can select the output range of the analog output to be either
(0V − 5V ) or (0V − 10V ). And other jumpers that can be used to bypass the filter, so the
output becomes a PWM signal instead of a analog signal. These jumpers are on the card
to make it possible control as many instruments as possible.
12.3
Rapid prototyping with Matlab Real-Time Workshop
12.3.1
AVR32 System Target
The AVR32 system target are used to easily configure Real-Time Workshop to generate
and compile code correctly for rapid prototyping on AVR32. In addition to selecting this
system target file, some Simulink preferences has to be changed. The solver has to be
a fixed-step solver, since the generated code has to use a constant time step. It’s also a
good idea to specify the time step, since Matlab might try and use a lower period than
the AVR32 is able to run. The minimum time step is 1ms, but a complex system has to
use a higher time step.
The code automatically logs the average period time, and the average time used for work
each period, and this information will be displayed after completing the simulation. This
makes it easy to find out if the periods are stable and if the AVR32 are able to complete
each time step inside the period.
12.3.2
S-functions for I/O-card
Four S-functions have been made for each of the four I/O on the card, analog input, analog
output, digital input and digital output.
The analog input has 8 channels, that gives a value between 0 and 5, which is an analog
voltage between 0V and 5V . Each channel that are connected is an active channel. This
means that the generated code will read from the I/O-card, and this takes approximately
300µs. If connected, a channel will be read, even if the value isn’t used for anything useful.
The analog output has 2 channels with 3 subchannels each. Each channel can choose a
resolution between 8-bit and 12-bit. The I/O-card will give out a voltage between 0V and
5V , depending on the value of the S-function blocks input. Each channel connected to the
will be written to each period, and it will use about 250µs.
The digital input has 8 channels, and each channel gives out the value 0 if the channel is
low and the value 5 if the channel is high. If any digital input channels are used, it will be
12.3. RAPID PROTOTYPING WITH MATLAB REAL-TIME WORKSHOP
103
read each period and it takes 220µs no matter how many of the channels that are in use.
The digital output has 8 channels, and each channel can be configured with a threshold
value. For all values over this threshold the digital output channel will give a voltage of
5V , and all values under it will give a voltage of 0V .
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CHAPTER 12. USER MANUAL FOR AVR32 I/O
Chapter 13
Discussion
The work in this thesis has consisted of developing the hardware and software necessary
for using the a AVR32 processor in a control system. The work has consisted of several
smaller tasks, that had to work together. Each of these tasks are discussed separately
13.1
AVR32 Linux
Atmel Norway have done a good job when porting the Linux kernel and development tools
to the AVR32 architecture, but when the work on this thesis began (January 2007), some
of the ported software had some problems. Especially AVR32 Linux version 2.6.16 was
problematic, as described in 3.2. By the end of this thesis (June 2000), both the Linux
kernel version and development tools was more mature and also easy to install on Windows
and on popular Linux distributions like Ubuntu and Fedora.
A small library for making periodic threads and tasks was developed, since control system
needs to execute work periodically. This library used the Linux timer, which gave acceptable accuracy. The shortest period that was possible to make was 1ms, that turned out
to be more than enough because of the speed of the AVR32.
13.2
I/O-card
The I/O-card has an ATmega128 microcontroller that controls everything on the card. It
communicates with the AVR32, sets analog and digital output and measure analog and
digital input. Since this component does all this, only a few other components are needed
on the card. The disadvantage of using a ATmega128 for analog I/O, is that making
an analog output signal from a PWM-signal isn’t the best solution and it needs many
additional components like passive filters and operational amplifiers circuits. The ADC
(analog input) of the ATmega128 is not the best ADC available.
The analog output part of the I/O-card didn’t work as planned. The prototype card had
working low-pass filters, but a wrong type of operational amplifiers was used. The final
card on the other hand had a better type of operational amplifiers, but the low-pass filters
didn’t work as they should have. The most likely reason for this is that the filters were
105
106
CHAPTER 13. DISCUSSION
poorly assembled. Design of future versions of this card should give the filters more room
to make the assembly easier. Apart from the problems with the analog output, all the
parts of the I/O-card worked as planned.
Two different solutions were developed for using the ADC of the ATmega128. The reason
for this was that the ADC conversion takes a significant amount of time. This was solved
by either interrupting the AVR32 when the ADC conversion was finished, or continuously
convert analog values and store them in a buffer. Since the drivers of the I/O-card doesn’t
use threading the continuous mode is the best choice, specially if only some of the Analog
input channels are used. The interrupt mode would be a better choice if a thread was
running sending the analog input command, since then the rest of the program could use
the CPU cycles wasted while waiting for the interrupt from the I/O-card.
13.3
I/O-card Communication and Drivers
The communication between the AVR32 and the I/O-card was successfully implemented
with SPI. A protocol was developed for this communication, that the AVR32 uses to give
commands to the I/O-card. This protocol has effective error detection, so both the AVR32
and the I/O-card will detect if an error occur. The error detection means that all data
passing between the two processors are returned to the sender for confirmation. This uses
the full duplex capability of SPI, but it still takes longer to send a command than it would
without error detection.
Sending a command to the I/O-card takes between 180µs and 400µs. This is a considerable
amount of time, specially if the control system uses small time steps. The main reason
that sending a command takes this long is that the SPI driver for AVR32. Transferring
one byte takes only 2µs, but when sending several bytes after each other, the AVR32 uses
at least 9µs between each transfer. If two bytes are sent individually after each other, as
much as 23µs was used between the transfers.
The SPI driver is obviously not very effective, since so much time is used before and
between transfers. For the implementation of the I/O-card driver it meant that it was
important to try and avoid transferring individual bytes, since this takes longer than
sending several bytes at the time.
When testing the SPI communication, almost no commands ended with errors. This means
that the error detection may not be necessary, since it’s almost never used. By not using
error detections, the commands would probably be executed faster, since the number of
transfers would be reduced. For special situations where the time used for sending SPI
messages has to be as low as possible, this may be a possibility, but normally the error
detection should be used.
It’s also possible that the device driver could be more effective. The User Mode driver
opens and closes the device node each time it reads and writes from them, since the device
driver has mutexes that makes it only possible that one process has it open at the time.
This could possibly be made more effective.
13.4. MATLAB REAL-TIME WORKSHOP
13.4
107
Matlab Real-Time Workshop
Matlab Real-Time Workshop was used in this thesis as a rapid prototyping tool. It generates code from Simulink models, that runs on the control system. A new system target
was created to allow some modifications to the way code are generated. This new system
target was able to compile the code for AVR32, and make the code execute periodically.
The system target can easily be installed, and are easy to use.
S-functions were developed for the different features of the I/O-card, and it gave Simulink
blocks that was able to control the I/O. The S-functions that uses the normal user mode
drivers worked as planned, and they were effective. A test concluded that a value sent
through the I/O-card only was delayed with one time step. When using the threaded
user mode driver, the results were a longer delay. This means that the threading is a less
effective solutions. Optimizing the driver might help, but it’s more likely that the increased
overhead of the threaded driver is bigger than the effectively gain of using threads.
108
CHAPTER 13. DISCUSSION
Chapter 14
Conclusion
This thesis has developed the hardware and software necessary for using the AVR32 processor architecture as a control system. This resulted in a control system platform that
can easily be installed and used. The platform it specially suited for applications where
low weight and power consumption is important, because both the AVR32 itself and the
microcontroller used in the I/O-card are low-power devices.
An I/O-card and drivers were developed and this enabled the AVR32 to measure and
control its environment with digital and analog (0V − 5V ) signals. AVR32 communicates
uses SPI to give commands to the I/O-card. This gave a reasonable fast and very reliable
communication. Since SPI has no error checking, the communication protocol was designed
with an effective error detection, even if the communication itself was reliable. This means
that in the case of an unlikely error, the system will detect it.
The platform has be configured to use Matlab Real-Time Workshop as a rapid prototyping
tool. This tool generates code from Matlab Simulink models, that makes it suited for
designing and testing different controllers. With the developed S-functions, the I/O-card
could be controlled with Real-Time Workshop. In this thesis standard Linux timers have
been used to make the time steps periodical. This gives a minimum period of 1ms, but this
haven’t been a problem since the control system aren’t fast enough to use lower periods.
The platform has some performance limitation. The AVR32 processor isn’t a fast processor
compared to a normal computer, and it lacks a FPU. This means that floating-point
operations has to be software emulated and is less effective, which limits the ability to
control complex systems. If a system is to complex, the risk of breaking any real-time
constraints increases. However, the platform is well suited to control less complex systems,
and the workload is logged, and can be used to detect if the system is close to breaking a
real-time constraint.
The user manual was made to make it easy for users to install and use the control system
platform. For users, the system will function as a black box where they don’t need to know
how the system works, only that it can be controlled using Matlab Real-Time Workshop.
109
110
CHAPTER 14. CONCLUSION
Chapter 15
Further Work
This thesis has built a control system platform that uses the AVR32 architecture, and
further work would be to use this platform in a actual control system. The platform may
also be developed further, to improve it by making it faster and more stable. Below is a
list of ideas for further development.
◦ Find ways to make sending commands to the I/O-card more effectively. This can be
done by making the AVR32 Linux SPI driver more efficient, drop error detection or
reduce the overhead introduced by it or by optimizing the interaction between the
User Mode driver and the device driver.
◦ Increase the number of I/O protocols that the I/O-card can use. The existing SPI
communication protocol may be extended to for new commands.
◦ Improve the I/O protocols that are already present.
111
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CHAPTER 15. FURTHER WORK
Appendix A
Digital appendix
The digital appendix includes the code and other files from the thesis, and have the
following directories:
◦ code
Contains the code developed in the thesis.
• atmega128
Firmware code for the ATmega128.
• avr32
Code used by Matlab to make the AVR32 Real-Time target. Contain drivers
and blocks in subdirectories.
• kernel module
Code for the device driver as a kernel module.
◦ eagle
Schematics and layout of the two AVR32 I/O-card versions in eagle format.
◦ file system
Files used in the AVR32 file system.
◦ linux
Patches, config files and other AVR32 Linux related files.
◦ report
The report and the user manual. Subdirectory contain graphics used in the report.
113
Appendix B
Schematics
B.1
Schematic for protoype card
Figure B.1 on the next page is the total schematics for the prototype card.
B.2
Schematic for final card
Figure B.2 on page 116 is the total schematics for the final card.
114
B.2. SCHEMATIC FOR FINAL CARD
Figure B.1: Schematics for the prototype card.
115
116
APPENDIX B. SCHEMATICS
Figure B.2: Schematics for the final card.
Appendix C
Code
C.1
C.1.1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
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Makefile
CC=avr−g c c
OBJCOPY=avr−o b j c o p y
CFLAGS=−g −mmcu=atmega128 −I / u s r / a v r / i n c l u d e
am128main . hex : am128main . out
$ (OBJCOPY) −j . t e x t −O i h e x am128main . out am128main . hex
am128main . out : am128main . o
$ (CC) $ (CFLAGS) −o am128main . out −Wl,−Map, am128main . map am128main . o
am128main . o : am128main . c
$ (CC) $ (CFLAGS) −Os −c am128main . c
clean :
rm −f ∗ . o ∗ . out ∗ . map ∗ . hex
install :
avrdude −P usb −pm128 −c j t a g 2 −U f l a s h : w : am128main . hex
C.1.2
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3
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5
6
7
8
9
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ATmega128
am128main.c
#include ”am128main . h ”
i n t main ( )
{
// I n i t i a l i z e UART.
UART Init ( ) ;
// I n i t i a l i z e am128 .
IO Init () ;
// Main program l o o p .
while ( 1 ) {
// Prepare t o send r e a d y s i g n a l , and w a i t f o r code from master .
SPDR = SLAVE READY;
// Wait f o r SPI t r a n s f e r .
while ( ! t e s t b i t (SPSR , SPIF ) ) {
#i f d e f BUFFERING MODE
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APPENDIX C. CODE
// Checks i f c o n v e r s i o n i s f i n i s h e d
ADC CheckBuffer ( ) ;
#endif
}
// S t a r t r e c e i v i n g new command .
IO NewCommand (SPDR) ;
}
}
C.1.3
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i f u s i n g b u f e r i n g mode .
am128io.c
void I O I n i t ( )
{
// I n i t I /O.
SPI SlaveInit () ;
PWM Init ( ) ;
ADC Init ( ) ;
// D i r e c t i o n o f t h e d i g i a l i o .
DDRA = 0 x00 ;
DDRC = 0 x f f ;
}
signed char IO TestAck ( unsigned char tx , unsigned char r x )
{
i f ( t x == 2 5 5 ) {
// I f t h e ack has o v e r f l o w e d .
i f ( r x != 0 ) return −1;
}
e l s e { // Normal ack .
i f ( r x != t x + 1 ) return −1;
}
// Ack was c o r r e c t .
return 0 ;
}
signed char IO NewCommand ( unsigned char code )
{
// Checks t h e code , and s t a r t t h e c o r r e c t command .
// Only t e s t a g a i n s t 5 MSB, s i n c e 3LSB o n l y c o n t a i n i n f o r m a t i o n a b o u t c h a n n e l .
switch ( code & 0 x f 8 ) {
case CODE AIN :
IO AnalogIn ( code ) ;
break ;
case CODE AOUT:
IO AnalogOut ( code ) ;
break ;
case CODE DIN :
I O D i g i t a l I n ( code ) ;
break ;
case CODE DOUT:
I O D i g i t a l O u t ( code ) ;
break ;
#i f d e f BUFFERING MODE
case CODE AIN EN :
IO AnalogInEnable ( code ) ;
break ;
#endif
case CODE AOUT RES :
IO AnalogOutRes ( code ) ;
break ;
default :
// P r i n t s cmd t o UART i f i t d i d n ’ t match any c o d e s .
UART Print ( ’ e ’ , ( code & 0 x f 8 ) ) ;
break ;
}
}
C.1. ATMEGA128
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signed char IO AnalogIn ( unsigned char code ) {
unsigned char rx , data [ 2 ] ;
char r e t ;
// 1 s t b y t e : c h e c k r e c e i v e d DUMMY, r e t u r n code + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( code + 1 , &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != DUMMY) return −1;
#i f d e f INTERRUPT MODE
// S t a r t s c o n v e r s i o n and p o l l s u n t i l t h e c o n v e r s i o n i s c o m p l e t e .
ADC StartConversion (CODE TO CH AIN( code ) ) ;
while ( ! ADC CheckConversion ( data ) ) ;
// Send i n t e r r u p t t o AVR32 .
s e t b i t (PORTD, 7 ) ;
delay us (2) ;
c l e a r b i t (PORTD, 7 ) ;
#endif
#i f d e f BUFFERING MODE
// S t o r e d a t a t h a t s h o u l d be s e n t t o master .
data [ 0 ] = dataH [ CODE TO CH AIN( code ) ] ;
data [ 1 ] = dataL [ CODE TO CH AIN( code ) ] ;
#endif
// 2nd b y t e : c h e c k r e c e i v e d DUMMY, r e t u r n h i g h b y t e v a l u e .
r e t = S P I S l a v e T r a n s f e r B y t e ( data [ 0 ] , &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != DUMMY) return −1;
// 3 rd b y t e : c h e c k r e c e i v e d h i g h b y t e v a l u e + 1 , r e t u r n low b y t e v a l u e .
r e t = S P I S l a v e T r a n s f e r B y t e ( data [ 1 ] , &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
r e t = IO TestAck ( data [ 0 ] , r x ) ;
i f ( r e t < 0 ) return r e t ;
// 4 t h b y t e : c h e c k r e c e i v e d low b y t e v a l u e + 1 , r e t u r n DUMMY.
r e t = S P I S l a v e T r a n s f e r B y t e (DUMMY, &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
r e t = IO TestAck ( data [ 1 ] , r x ) ;
i f ( r e t < 0 ) return r e t ;
// 5 t h b y t e : c h e c k r e c e i v e d MASTER OK, r e t u r n SLAVE OK.
r e t = S P I S l a v e T r a n s f e r B y t e (SLAVE OK, &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != MASTER OK) return −1;
// Debug p r i n t i n g , i f e n a b l e d .
UART Print ( ’ c ’ , code ) ;
UART Print ( ’ h ’ , data [ 0 ] ) ;
UART Print ( ’ l ’ , data [ 1 ] ) ;
return 0 ;
}
signed char IO AnalogOut ( unsigned char code )
{
unsigned char valueH , valueL , r x ;
char r e t ;
// 1 s t b y t e : s t o r e r e c e i v e d valueH , r e t u r n code + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( code + 1 , &valueH , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
// 2nd b y t e : s t o r e r e c e i v e d valueL , r e t u r n valueH + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( valueH + 1 , &valueL , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
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APPENDIX C. CODE
// 3 rd b y t e : c h e c k r e c e i v e d DUMMY, r e t u r n v a l u e L + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( v a l u e L + 1 , &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != DUMMY) return −1;
// 4 t h b y t e : c h e c k r e c e i v e d MASTER OK, r e t u r n SLAVE OK.
r e t = S P I S l a v e T r a n s f e r B y t e (SLAVE OK, &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != MASTER OK) return −1;
// When t h e message i s c o n f i r m e d t h e mask and d a t a a r e a p p l i e d t o d i g i t a l o u t .
PWM SetOutValue (CODE TO CH AOUT( code ) , CODE TO SCH AOUT( code ) , valueH , v a l u e L ) ;
// Debug p r i n t i n g , i f e n a b l e d .
UART Print ( ’ c ’ , code ) ;
UART Print ( ’ h ’ , valueH ) ;
UART Print ( ’ l ’ , v a l u e L ) ;
}
signed char I O D i g i t a l I n ( unsigned char code )
{
unsigned char rx , v a l u e ;
char r e t ;
// Only r e a d from t h e p o r t once d u r i n g communication
v a l u e = PINA ;
// 1 s t b y t e : c h e c k r e c e i v e d DUMMY, r e t u r n code + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( code + 1 , &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != DUMMY) return −1;
// 2nd b y t e : c h e c k r e c e i v e d DUMMY, r e t u r n v a l u e .
r e t = S P I S l a v e T r a n s f e r B y t e ( v a l u e , &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != DUMMY) return −1;
// 3 rd b y t e : c h e c k r e c e i v e d v a l u e + 1 , r e t u r n DUMMY.
r e t = S P I S l a v e T r a n s f e r B y t e (DUMMY, &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
r e t = IO TestAck ( v a l u e , r x ) ;
i f ( r e t < 0 ) return r e t ;
// 4 t h b y t e : c h e c k r e c e i v e d MASTER OK, r e t u r n SLAVE OK.
r e t = S P I S l a v e T r a n s f e r B y t e (SLAVE OK, &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != MASTER OK) return −1;
// Debug p r i n t i n g , i f e n a b l e d .
UART Print ( ’ c ’ , code ) ;
UART Print ( ’ v ’ , v a l u e ) ;
return 0 ;
}
signed char I O D i g i t a l O u t ( unsigned char code )
{
unsigned char mask , v a l u e , r x ;
char r e t , i ;
// 1 s t b y t e : s t o r e r e c e i v e d mask , r e t u r n code + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( code + 1 , &mask , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
// 2nd b y t e : s t o r e r e c e i v e d v a l u e , r e t u r n mask + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( mask + 1 , &v a l u e , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
C.1. ATMEGA128
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// 3 rd b y t e : c h e c k r e c e i v e d DUMMY, r e t u r n v a l u e + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( v a l u e + 1 , &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != DUMMY) return −1;
// 4 t h b y t e : c h e c k r e c e i v e d MASTER OK, r e t u r n SLAVE OK.
r e t = S P I S l a v e T r a n s f e r B y t e (SLAVE OK, &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != MASTER OK) return −1;
// When t h e message i s c o n f i r m e d t h e mask and d a t a a r e a p p l i e d t o d i g i t a l o u t .
f o r ( i =0; i <8; i ++){
i f ( t e s t b i t ( mask , i ) ) {
i f ( t e s t b i t ( v a l u e , i ) ) s e t b i t (PORTC, i ) ;
e l s e c l e a r b i t (PORTC, i ) ;
}
}
// Debug p r i n t i n g , i f e n a b l e d .
UART Print ( ’ c ’ , code ) ;
UART Print ( ’m ’ , mask ) ;
UART Print ( ’ v ’ , v a l u e ) ;
}
#i f d e f BUFFERING MODE
signed char IO AnalogInEnable ( unsigned char code )
{
unsigned char e n a b l e , r x ;
char r e t ;
// 1 s t b y t e : s t o r e r e c e i v e d e n a b l e , r e t u r n code + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( code + 1 , &e n a b l e , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
// 2nd b y t e : s t o r e r e c e i v e d DUMMY, r e t u r n e n a b l e + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( e n a b l e + 1 , &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != DUMMY) return −1;
// 3 rd b y t e : c h e c k r e c e i v e d MASTER OK, r e t u r n SLAVE OK.
r e t = S P I S l a v e T r a n s f e r B y t e (SLAVE OK, &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != MASTER OK) return −1;
// When t h e message i s c o n f i r m e d t h e c h a n n e l a r e e n a b l e d or d i s a b l e d .
i f ( e n a b l e == 0 ) {
ADC DisableChan (CODE TO CH AIN( code ) ) ;
}
else {
ADC EnableChan (CODE TO CH AIN( code ) ) ;
}
// Debug p r i n t i n g , i f e n a b l e d .
UART Print ( ’ c ’ , code ) ;
UART Print ( ’ e ’ , e n a b l e ) ;
}
#endif
signed char IO AnalogOutRes ( unsigned char code )
{
unsigned char r e s o l u t i o n , chEnable , r x ;
char r e t ;
// 1 s t b y t e : s t o r e r e c e i v e d r e s o l u t i o n , r e t u r n code + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( code + 1 , &r e s o l u t i o n , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
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// 2nd b y t e : c h e c k r e c e i v e d DUMMY, r e t u r n r e s o l u t i o n + 1 .
r e t = S P I S l a v e T r a n s f e r B y t e ( r e s o l u t i o n + 1 , &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != DUMMY) return −1;
// 3 rd b y t e : c h e c k r e c e i v e d MASTER OK, r e t u r n SLAVE OK.
r e t = S P I S l a v e T r a n s f e r B y t e (SLAVE OK, &rx , TIMEOUT) ;
i f ( r e t < 0 ) return r e t ;
i f ( r x != MASTER OK) return −1;
// When t h e message i s c o n f i r m e d t h e a n a l o g o u t r e s o l u t i o n o f t h e s e l e c t e d
c h a n n e l w i l l be u p d a t e d .
PWM SetResolution (CODE TO CH AOUT( code ) , r e s o l u t i o n ) ;
// Debug p r i n t i n g , i f e n a b l e d .
UART Print ( ’ c ’ , code ) ;
UART Print ( ’ r ’ , r e s o l u t i o n ) ;
}
C.1.4
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am128spiSlave.c
void S P I S l a v e I n i t ( void )
{
// E n a b l e s SPI and s e t s t h e MISO s i g n a l as an o u t p u t .
SPCR = (1<<SPE) ;
DDRB = (1<<3) ;
// Timer p r e s c a l e r 256 (16 us ) .
#i f d e f TIMEOUT ENABLE
TCCR0 = ( 1 << CS02 ) | ( 1 << CS01 ) ;
#endif
}
signed char S P I S l a v e T r a n s f e r B y t e ( unsigned char tx , unsigned char ∗ rx , unsigned
char u s e c )
{
#i f d e f TIMEOUT ENABLE
// S t a r t s t i m e r .
TCNT0 = 0 ;
#endif
// Prepare d a t a t o send and w a i t f o r SPI t r a n s f e r from master .
SPDR = t x ;
while ( ! ( SPSR & (1<<SPIF ) ) ) {
#i f d e f TIMEOUT ENABLE
// Checks f o r t i m e o u t .
i f (TCNT0 > u s e c ) return −1;
#endif
}
// Returns d a t a .
∗ ( r x ) = SPDR;
return 0 ;
}
C.1.5
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APPENDIX C. CODE
am128adc.c
void ADC Init ( )
{
// D i r e c t i o n o f adc c h a n n e l s .
DDRF = 0 ;
#i f d e f INTERRUPT MODE
// D i r e c t i o n o f i n t e r r u p t .
s e t b i t (DDRD, 7 ) ;
C.1. ATMEGA128
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c l e a r b i t (PORTD, 7 ) ;
#endif
// I n i t i a l i z e ADC.
ADMUX = (1<<REFS0) ;
ADCSRA = (1<<ADEN) | (1<<ADPS2) | (1<<ADPS1) | (1<<ADPS0) ;
}
#i f d e f BUFFERING MODE
void ADC EnableChan ( char c h a n n e l )
{
char i ;
struct c h a n L i s t ∗temp , ∗ temp2 ;
i f ( chCount == 0 ) {
// Make t a b l e e l e m e n t and s t a r t c o n v e r t i n g .
channels = ( channeltab + channel ) ;
c h a n n e l s −>n e x t = c h a n n e l s ;
c h a n n e l s −>p r e v = c h a n n e l s ;
c h a n n e l s −>c h a n n e l = c h a n n e l ;
ADC NewConversion ( ) ;
}
else {
// Search t h r o u g h c h a n n e l s and c h e c k i f t h e c h a n n e l i s a l r e a d y e n a b l e d .
temp = c h a n n e l s ;
f o r ( i =0; i <chCount ; i ++){
// I f c h a n n e l a l r e a d y i s e n a b l e d t h e f u n c t i o n ends .
i f ( temp−>c h a n n e l == c h a n n e l ) return ;
temp = temp−>n e x t ;
}
// Make new c h a n n e l .
temp = ( c h a n n e l t a b + c h a n n e l ) ;
temp−>c h a n n e l = c h a n n e l ;
// I n s e r t s new c h a n n e l i n l i s t .
temp−>n e x t = c h a n n e l s −>n e x t ;
temp−>p r e v = c h a n n e l s ;
c h a n n e l s −>n e x t = temp ;
c h a n n e l s −>next−>p r e v = temp ;
}
// I n c r e a s e number o f c h a n n e l s ;
chCount++;
}
void ADC DisableChan ( char c h a n n e l )
{
char i , e n a b l e d ;
struct c h a n L i s t ∗temp ;
temp = c h a n n e l s ;
enabled = 0 ;
// Search t h r o u g h c h a n n e l s and c h e c k i f t h e c h a n n e l i s e n a b l e d .
f o r ( i =0; i <chCount ; i ++){
i f ( temp−>c h a n n e l == c h a n n e l ) {
enabled = 1 ;
break ;
}
temp = temp−>n e x t ;
}
// I f c h a n n e l aren ’ t e n a b l e d t h e f u n c t i o n ends .
i f ( e n a b l e d == 0 ) return ;
// Update p o i n t e r s i n s i d e t h e l i s t .
temp−>prev−>n e x t = temp−>n e x t ;
temp−>next−>p r e v = temp−>p r e v ;
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APPENDIX C. CODE
chCount −−;
i f ( chCount == 0 ) ADC StopConversion ( ) ;
}
void ADC CheckBuffer ( )
{
i f ( t e s t b i t (ADCSRA, ADIF) ) {
// S t o r i n g new d a t a .
dataL [ c h a n n e l s −>c h a n n e l ] = ADCL;
dataH [ c h a n n e l s −>c h a n n e l ] = ADCH;
// S t a r t new c o n v e r s i o n .
ADC NewConversion ( ) ;
}
}
void ADC NewConversion ( )
{
c h a n n e l s = c h a n n e l s −>n e x t ;
ADMUX = ADMUX & 0 xe0 ;
ADMUX = ADMUX | c h a n n e l s −>c h a n n e l ;
// S t a r t c o n v e r s i o n .
s e t b i t (ADCSRA, ADSC) ;
}
void ADC StopConversion ( )
{
c l e a r b i t (ADCSRA, ADSC) ;
}
#endif
#i f d e f INTERRUPT MODE
void ADC StartConversion ( char c h a n n e l )
{
ADMUX = ADMUX & 0 xe0 ;
ADMUX = ADMUX | c h a n n e l ;
// S t a r t c o n v e r s i o n .
s e t b i t (ADCSRA, ADSC) ;
}
signed char ADC CheckConversion ( unsigned char ∗ data )
{
i f ( t e s t b i t (ADCSRA, ADIF) ) {
// C l e a r s t a t u s b i t .
s e t b i t (ADCSRA, ADIF) ;
// S t o r i n g new d a t a .
data [ 1 ] = ADCL;
data [ 0 ] = ADCH;
// F i n i s h e d .
return 1 ;
}
// Not f i n i s h e d .
return 0 ;
}
#endif
C.1.6
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am128pwm.c
void PWM Init ( )
{
// S e t t h e PWM p o r t s as o u t p u t
C.1. ATMEGA128
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set
set
set
set
set
set
b i t (DDRE,
b i t (DDRE,
b i t (DDRE,
b i t (DDRB,
b i t (DDRB,
b i t (DDRB,
3) ;
4) ;
5) ;
5) ;
6) ;
7) ;
// S e t t h e c o n t r o l r e g i s t e r s f o r PWM t o f a s t PWM, w i t h no p r e s c a l e r and c l e a r
o u t p u t on compare match ( non−i n v e r t i n g mode ) .
TCCR1A =(1<<COM1A1) | (1<<COM1B1) | (1<<COM1C1) | (1<<WGM11) ;
TCCR1B = (1<<WGM13) | (1<<WGM12) | (1<<CS10 ) ;
TCCR3A =(1<<COM3A1) | (1<<COM3B1) | (1<<COM3C1) | (1<<WGM31) ;
TCCR3B = (1<<WGM33) | (1<<WGM32) | (1<<CS30 ) ;
// S e t b o t h PWM t o have 8− b i t r e s o l u t i o n .
PWM SetResolution ( 0 , 8 ) ;
PWM SetResolution ( 1 , 8 ) ;
// S e t a l l PWM−o u t p u t s t o z e r o .
PWM SetOutValue ( 0 , 1 , 0 x00 , 0 x00 ) ;
PWM SetOutValue ( 0 , 2 , 0 x00 , 0 x00 ) ;
PWM SetOutValue ( 0 , 3 , 0 x00 , 0 x00 ) ;
PWM SetOutValue ( 1 , 1 , 0 x00 , 0 x00 ) ;
PWM SetOutValue ( 1 , 2 , 0 x00 , 0 x00 ) ;
PWM SetOutValue ( 1 , 3 , 0 x00 , 0 x00 ) ;
}
void PWM SetOutValue ( char ch , char sch , char valueH , char v a l u e L )
{
// Checks which PWM/ t i m e r t h a t s h o u l d be s e t . E i t h e r 0 or 1 .
switch ( ch ) {
case 0 :
// Checks what c h a n n e l o f t h e PWM/ t i m e r . A=1, B=2 and C=3.
switch ( s c h ) {
case 0 :
OCR1AH = valueH ;
OCR1AL = v a l u e L ;
break ;
case 1 :
OCR1BH = valueH ;
OCR1BL = v a l u e L ;
break ;
case 2 :
OCR1CH = valueH ;
OCR1CL = v a l u e L ;
break ;
}
break ;
case 1 :
// Checks what c h a n n e l o f t h e PWM/ t i m e r . A=1, B=2 and C=3.
switch ( s c h ) {
case 0 :
OCR3AH = valueH ;
OCR3AL = v a l u e L ;
break ;
case 1 :
OCR3BH = valueH ;
OCR3BL = v a l u e L ;
break ;
case 2 :
OCR3CH = valueH ;
OCR3CL = v a l u e L ;
break ;
}
break ;
}
}
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void PWM SetResolution ( char ch , char r e s o l u t i o n )
{
char resH , resL , i ;
resH = 0 x00 ;
r e s L = 0 x00 ;
// Finds v a l u e s f o r t h e ICRn r e g i s t e r s t h a t g i v e s t h e r e q u e s t e d r e s o l u t i o n .
i f ( r e s o l u t i o n <= 8 ) { // For r e s o l u t i o n e q u a l or l e s s than 8− b i t s .
f o r ( i =0; i <r e s o l u t i o n ; i ++){
s e t b i t ( resL , i ) ;
}
}
e l s e { // For r e s o l u t i o n o v e r 8− b i t s .
resL = 0 x f f ;
f o r ( i =0; i <r e s o l u t i o n −8; i ++){
s e t b i t ( resH , i ) ;
}
}
// Writes t h e
switch ( ch ) {
case 0 :
ICR1H =
ICR1L =
break ;
case 1 :
ICR3H =
ICR3L =
break ;
}
v a l u e s t o t h e r i g h t ICRn r e g i s t e r .
resH ;
resL ;
resH ;
resL ;
// S e t s o u t p u t on a l l s u b c h a n n e l s t o z e r o .
PWM SetOutValue ( ch , 1 , 0 x00 , 0 x00 ) ;
PWM SetOutValue ( ch , 2 , 0 x00 , 0 x00 ) ;
PWM SetOutValue ( ch , 3 , 0 x00 , 0 x00 ) ;
}
C.1.7
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APPENDIX C. CODE
am128uart.c
void UART Init ( )
{
#i f d e f RS232 DEBUG
// S e t d i r e c t i o n r e g i s t e r s .
s e t b i t (DDRD, 3 ) ;
c l e a r b i t (DDRD, 2 ) ;
// BAUD r a t e = 1 9 . 2 k .
UBRR1H = 0 ;
UBRR1L = 5 1 ;
// Enable b o t h t r a n s m i t and r e c e i v e .
UCSR1B = (1<<RXEN1) | (1<<TXEN1) ;
// Use 8 b i t data , no p a r i t y and 2 s t o p b i t s .
UCSR1C = (1<<UCSZ11 ) | (1<<UCSZ10 ) | (1<<USBS1 ) ;
#endif
}
void UART TxByte ( char data )
{
#i f d e f RS232 DEBUG
// Wait u n t i l l a s t message i s s e n t , t h e n send t h i s one .
l o o p b i t i s s e t (UCSR1A, UDRE1) ;
UDR1=data ;
#endif
}
C.1. ATMEGA128
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void UART TxSpace ( )
{
#i f d e f RS232 DEBUG
UART TxByte ( 3 2 ) ;
#endif
}
void UART TxNewLine ( )
{
#i f d e f RS232 DEBUG
UART TxByte ( ’ \n ’ ) ;
UART TxByte ( ’ \ r ’ ) ;
#endif
}
void UART TxDecimal ( unsigned char v a l u e )
{
#i f d e f RS232 DEBUG
char t x [ 3 ] , i ;
// t x [ 0 ]
tx [ 0 ] = ’ 0 ’ ;
f o r ( i =0; i <3; i ++){
i f ( value > 99) {
tx [ 0 ] = tx [ 0 ] + 1 ;
value = value − 100;
}
}
// t x [ 1 ]
tx [ 1 ] = ’ 0 ’ ;
f o r ( i =0; i <10; i ++){
i f ( value > 9) {
tx [ 1 ] = tx [ 1 ] + 1 ;
value = value − 10;
}
}
// t x [ 2 ]
tx [ 2 ] = ’ 0 ’ ;
f o r ( i =0; i <10; i ++){
i f ( value > i ) {
tx [ 2 ] = tx [ 2 ] + 1 ;
}
}
// P r i n t
f o r ( i =0; i <3; i ++){
UART TxByte ( t x [ i ] ) ;
}
#endif
}
void UART Print ( char symbol , unsigned char v a l u e )
{
#i f d e f RS232 DEBUG
UART TxByte ( symbol ) ;
UART TxByte ( ’ : ’ ) ;
UART TxSpace ( ) ;
UART TxDecimal ( v a l u e ) ;
UART TxNewLine ( ) ;
#endif
}
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C.2
C.2.1
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Kernel module
Makefile
# I n c l u d e t h e AVR32 h e a d e r f i l e s
CFLAGS += −I / u s r / l o c a l / avr32−l i n u x / i n c l u d e
CFLAGS += −D AVR32 AP7000
MAKE
KERNELDIR
PWD
:= make ARCH=a v r 3 2 CROSS COMPILE=avr32−l i n u x −
:= /home/ o y v i n d n e / diplom / s o u r c e / l i n u x
:= $ ( s h e l l pwd)
obj−m := a v r 3 2 i o . o
default :
$ (MAKE) −C $ (KERNELDIR) M=$ (PWD) modules
clean :
rm −f ∗ . o ∗ . ko ∗ . mod . ∗ . ∗ cmd c o r e
rm − r f . t m p v e r s i o n s
install :
cp a v r 3 2 i o . ko /home/ o y v i n d n e / diplom / f s / a v r 3 2 i o . ko
C.2.2
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APPENDIX C. CODE
avr32ioc
#include ” a v r 3 2 i o . h ”
static int
{
int r e t ;
init
a v r 3 2 i o I n i t ( void )
i f ( ! ( d e v i c e = k z a l l o c ( s i z e o f ( struct a v r 3 2 i o d e v i c e ) , GFP KERNEL) ) )
{
p r i n t k (KERN ALERT ” a v r 3 2 i o I n i t : k z a l l o c f a i l e d \n ” ) ;
return −ENOMEM;
}
// Major / minor number a l l o c a t i o n
r e t = a l l o c c h r d e v r e g i o n (& d e v i c e −>number , 0 , COUNT TOTAL, ” a v r 3 2 i o ” ) ;
i f ( r e t < 0) {
p r i n t k (KERN ALERT ” a v r 3 2 i o I n i t : a l l o c c h r d e v r e g i o n f a i l e d %i \n ” , r e t ) ;
goto e r r R e g i o n ;
}
// Adding c d e v .
d e v i c e −>c h a r D e v i c e = c d e v a l l o c ( ) ;
d e v i c e −>c h a r D e v i c e −>ops = &f o p s ;
d e v i c e −>c h a r D e v i c e −>owner = THIS MODULE ;
r e t = cde v add ( d e v i c e −>c h a r D e v i c e , d e v i c e −>number , COUNT TOTAL) ;
i f ( r e t < 0) {
p r i n t k (KERN ALERT ” a v r 3 2 i o I n i t : c h a r D e v i c e f a i l e d %i \n ” , r e t ) ;
goto e r r C h a r D e v i c e ;
}
// R e g i s t r a t i o n o f t h e d r i v e r w i t h t h e l i n u x d e v i c e model
r e t = s p i r e g i s t e r d r i v e r (& a v r 3 2 i o d r i v e r ) ;
i f ( r e t < 0) {
p r i n t k (KERN ALERT ” a v r 3 2 i o I n i t : s p i r e g i s t e r d r i v e r f a i l e d %i \n ” , r e t ) ;
goto e r r R e g D r i v e r ;
}
#i f d e f INTERRUPT MODE
// R e g i s t r a t i o n o f IRQ
r e t = r e q u e s t i r q ( EIM IRQ BASE , irqFunk , IRQF TRIGGER RISING , ” a v r 3 2 i o i n t e r r u p t
” , NULL) ;
C.2. KERNEL MODULE
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i f ( r e t < 0) {
DEBUG( ” a v r I O I n i t : r e q u e s t i r q f a i l e d %i \n ” , r e t ) ;
goto errRegIRQ ;
}
d e v i c e −>i r q I D = r e t ;
#endif
p r i n t k (KERN INFO ” a v r 3 2 i o I n i t : s u c e s s f u l l major : %i \n ” , MAJOR( d e v i c e −>number ) ) ;
// Return s u c e s s f u l l
return 0 ;
// Error , r o l l b a c k r e s o u r s e s .
#i f d e f INTERRUPT MODE
errRegIRQ :
s p i u n r e g i s t e r d r i v e r (& a v r 3 2 i o d r i v e r ) ;
#endif
errRegDriver :
c d e v d e l ( d e v i c e −>c h a r D e v i c e ) ;
errCharDevice :
u n r e g i s t e r c h r d e v r e g i o n ( d e v i c e −>number , 4 ) ;
errRegion :
kfree ( device ) ;
return r e t ;
}
s t a t i c void
e x i t a v r 3 2 i o E x i t ( void )
{
#i f d e f INTERRUPT MODE
// Free t h e IRQ .
f r e e i r q ( EIM IRQ BASE ,NULL) ;
#endif
// U n r e g i s t e r t h e d r i v e r from t h e l i n u x d e v i c e model
s p i u n r e g i s t e r d r i v e r (& a v r 3 2 i o d r i v e r ) ;
// U n r e g i s t e r t h e c h a r a c t e r d e v i c e from t h e k e r n e l
c d e v d e l ( d e v i c e −>c h a r D e v i c e ) ;
// U n r e g i s t e r major / minor numbers a l l o c a t e d
u n r e g i s t e r c h r d e v r e g i o n ( d e v i c e −>number , COUNT TOTAL) ;
// Free memory used by t h e d e v i c e s t r u c t .
kfree ( device ) ;
p r i n t k (KERN INFO ” a v r 3 2 i o E x i t : module e x i t \n ” ) ;
}
static int
{
int r e t ;
d e v i n i t a v r 3 2 i o P r o b e ( struct s p i d e v i c e ∗ s p i )
// I n i t i a l i z e t h e s p i s t r u c t
d e v i c e −>s p i = s p i ;
s p i −>mode = SPI MODE 0 ;
s p i −>b i t s p e r w o r d = 0 x08 ; // 8− b i t s p e r t r a n s f e r .
s p i −>max speed hz = 2 1 0 0 0 0 0 ; // h i g h e s t v a l u e t h a t works i s 2100000 @ 16MHz
s p i −>c h i p s e l e c t = 0 x02 ; // Uses s l a v e number 2 .
// S e t u p t h e SPI d r i v e r and c h a n n e l
ret = spi setup ( spi ) ;
i f ( r e t < 0) {
p r i n t k (KERN ALERT ” a v r 3 2 i o P r o b e : s p i s e t u p f a i l e d %d\n ” , r e t ) ;
return r e t ;
}
d e v s e t d r v d a t a (& s p i −>dev , d e v i c e ) ;
return 0 ;
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APPENDIX C. CODE
}
s t a t i c i n t a v r 3 2 i o O p e n ( struct i n o d e ∗ node , struct f i l e ∗ f i l p )
{
i n t minor , r e t ;
minor = i m i n o r ( f i l p −>f d e n t r y −>d i n o d e ) ;
DEBUG( ”a v r 3 2 i o O p e n : minor %i \n ” , minor ) ;
// Take mutex .
r e t = d o w n i n t e r r u p t i b l e (&spiMutex ) ;
i f ( r e t < 0 ) return −ERESTARTSYS;
// Check i f SPI i s used .
i f ( d e v i c e −>busy == 0 ) {
// SPI busy , r e t u r n e r r o r .
r e t = −EBUSY;
}
else {
// SPI n o t busy , mark as b u s y and r e t u r n s u c c e s s .
d e v i c e −>busy == 1 ;
ret = 0;
}
// Returns t h e mutex and r e t u r n i f t h e SPI was b u s y or n o t .
up(&spiMutex ) ;
return r e t ;
}
s t a t i c i n t a v r 3 2 i o R e l e a s e ( struct i n o d e ∗ node , struct f i l e ∗ f i l p )
{
DEBUG( ” a v r 3 2 i o R e l e a s e \n ” ) ;
// Take mutex .
r e t = d o w n i n t e r r u p t i b l e (&spiMutex ) ;
i f ( r e t < 0 ) return −ERESTARTSYS;
// Mark t h e SPI as n o t b u s y .
d e v i c e −>busy == 0 ;
// Returns t h e mutex and r e t u r n s s u c c e s s .
up(&spiMutex ) ;
return 0 ;
}
s t a t i c s s i z e t a v r 3 2 i o R e a d ( struct f i l e ∗ f i l p , char
l o f f t ∗ f pos )
{
int r e t ;
u8 t o U s e r [ l e n ] ;
i n t minor = i m i n o r ( f i l p −>f d e n t r y −>d i n o d e ) ;
u s e r ∗ userBuf ,
s i z e t len ,
DEBUG( ” a v r 3 2 i o R e a d : minor %i i s A i n : %i i s D i n : %i \n ” , minor , IS AIN ( minor ) ,
IS DIN ( minor ) ) ;
i f ( IS AIN ( minor ) ) { // Analog In
i f ( l e n != 2 ) return −EPERM;
r e t = Cmd GetAIn ( toUser , MinorToChAin ( minor ) ) ;
i f ( r e t < 0 ) return r e t ;
c o p y t o u s e r ( u s e rB u f , toUser , l e n ) ;
return l e n ;
}
i f ( IS DIN ( minor ) ) { // D i g i t a l In
i f ( l e n != 1 ) return −EPERM;
r e t = Cmd GetDIn ( t o U s e r ) ;
i f ( r e t < 0 ) return r e t ;
c o p y t o u s e r ( u s e rB u f , toUser , l e n ) ;
C.2. KERNEL MODULE
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return l e n ;
}
// I f no o u t p u t matches t h e minor number t h e w r i t e o p e r a t i o n f a i l s .
return −EPERM;
}
s t a t i c s s i z e t a v r 3 2 i o W r i t e ( struct f i l e ∗ f i l p , const char
len , l o f f t ∗ f p o s )
{
u8 fromUser [ l e n ] ;
i n t minor = i m i n o r ( f i l p −>f d e n t r y −>d i n o d e ) ;
u s e r ∗ userBuf ,
size t
c o p y f r o m u s e r (&fromUser , u s e r B u f , l e n ) ;
DEBUG( ” a v r 3 2 i o W r i t e : minor %i i s A o u t : %i i s D o u t : %i \n ” , minor , IS AOUT ( minor ) ,
IS DOUT( minor ) ) ;
i f ( IS AOUT ( minor ) ) { // Analog Out
i f ( l e n != 3 ) return −EPERM;
i f ( Cmd SetAOut ( fromUser + 1 , MinorToChAout ( minor ) , fromUser [ 0 ] ) >= 0 ) {
return l e n ;
}
}
i f (IS DOUT( minor ) ) { // D i g i t a l Out
i f ( l e n != 2 ) return −EPERM;
i f ( Cmd SetDOut ( fromUser ) >= 0 ) {
return l e n ;
}
}
// I f no o u t p u t matches t h e minor number t h e w r i t e o p e r a t i o n f a i l s .
return −EPERM;
}
s t a t i c i n t a v r 3 2 i o I o c t l ( struct i n o d e
∗ node , struct f i l e ∗ f i l p , unsigned i n t cmd ,
unsigned long a r g )
{
i n t minor = i m i n o r ( f i l p −>f d e n t r y −>d i n o d e ) ;
DEBUG( ” a v r 3 2 i o I o c t l : i o c t l minor : %i cmd : %i i s A o u t : %i i s A i n : %i \n ” , minor ,
cmd , IS AOUT ( minor ) , IS AIN ( minor ) ) ;
switch ( cmd ) {
case AVR32IO IOCTL RES AOUT : // Change r e s o l u t i o n on a a n a l o g c h a n n e l .
i f ( IS AOUT ( minor ) ) {
return Cmd SetAOutResolution ( ( u8 ) ( a r g ) , MinorToChAout ( minor ) ) ;
}
#i f d e f BUFFERING MODE
case AVR32IO IOCTL EN AIN : // E n a b l e s or d i s a b l e s a n a l o g i n .
i f ( IS AIN ( minor ) ) {
return Cmd EnableAIn ( ( u8 ) ( a r g ) , MinorToChAin ( minor ) ) ;
}
#endif
}
// I f cmd i s n o t a v a l i d command .
return −ENOIOCTLCMD;
}
C.2.3
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4
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avr32io Cmd.c
i n t Cmd WaitForAM128 ( u8 code )
{
i n t count = 0 ;
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APPENDIX C. CODE
u8 r e a d y ;
// Loops u n t i l i t r e c e i v e s t h e c o r r e c t code from ATMega128 .
while ( r e a d y != SLAVE READY) {
S P I M a s t e r T r a n s f e r (& ready , &code , 1 ) ;
i f ( count++ > 1 0 0 ) return −EIO ;
}
return count ;
}
i n t Cmd GetAIn ( u8 ∗ toUser , i n t ch )
{
int r e t ;
// c h e c k f o r v a l i d c h a n n e l .
i f ( ch < 0 ) return −EIO ;
// S y n c h r o n i z e w i t h ATMega128
r e t = Cmd WaitForAM128 (CH TO CODE AIN( ch ) ) ;
DEBUG( ”code : %i count : %i \n ” , CH TO CODE AIN( ch ) , r e t ) ;
i f ( r e t < 0 ) return r e t ;
// Send DUMMY, r e c e i v e code ack .
r e t = S P I M a s t e r T r a n s f e r B y t e (DUMMY) ;
DEBUG( ”dummy : %i code +1: %i \n ” , DUMMY, r e t ) ;
i f ( r e t != CH TO CODE AIN( ch ) + 1 ) return −EIO ;
#i f d e f INTERRUPT MODE
// Wait f o r i n t e r r u p t .
d e v i c e −>i r q F l a g = 0 ;
DEBUG( ” w a i t \n ” ) ;
r e t = w a i t e v e n t i n t e r r u p t i b l e t i m e o u t (wq , d e v i c e −>i r q F l a g != 0 , 1 0 0 0 0 ) ;
i f ( r e t < 0 ) return −ERESTARTSYS;
DEBUG( ” i n t e r r u p t \n ” ) ;
#endif
// Send DUMMY, r e c e i v e d a t a 0 .
r e t = S P I M a s t e r T r a n s f e r B y t e (DUMMY) ;
DEBUG( ”dummy : %i data0 : %i \n ” , DUMMY, r e t ) ;
i f ( r e t < 0 ) return r e t ;
t o U s e r [ 0 ] = ( u8 ) r e t ;
// Send d a t a 0 ack , r e c e i v e d a t a 1 .
r e t = S P I M a s t e r T r a n s f e r B y t e ( ( u8 ) ( t o U s e r [ 0 ] + 1 ) ) ;
DEBUG( ”data0 +1: %i data1 : %i \n ” , ( ( u8 ) ( t o U s e r [ 0 ] ) + 1 ) , r e t ) ;
i f ( r e t < 0 ) return r e t ;
t o U s e r [ 1 ] = ( u8 ) r e t ;
// Send d a t a 1 ack , r e c e i v e DUMMY.
r e t = S P I M a s t e r T r a n s f e r B y t e ( ( u8 ) ( t o U s e r [ 1 ] + 1 ) ) ;
DEBUG( ”data0 +1: %i dummy : %i \n ” , ( ( u8 ) ( t o U s e r [ 1 ] ) + 1 ) , r e t ) ;
i f ( r e t != DUMMY) return −EIO ;
// Confirm command .
r e t = S P I M a s t e r T r a n s f e r B y t e (MASTER OK) ;
DEBUG( ”masterOK : %i slaveOK : %i \n ” , MASTER OK, r e t ) ;
i f ( r e t != SLAVE OK) return −EIO ;
return 0 ;
}
i n t Cmd SetAOut ( u8 ∗ fromUser , i n t ch , i n t s c h )
{
int r e t ;
unsigned char t x [ 3 ] , expectedRx [ 3 ] ;
// c h e c k f o r v a l i d c h a n n e l .
i f ( ch < 0 ) return −EIO ;
C.2. KERNEL MODULE
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// S y n c h r o n i z e w i t h ATMega128
r e t = Cmd WaitForAM128 (CH TO CODE AOUT( ch , s c h ) ) ;
DEBUG( ”code : %i count : %i \n ” , CH TO CODE AOUT( ch , s c h ) , r e t ) ;
i f ( r e t < 0 ) return r e t ;
// Prepare t o send s e v e r a l b y t e s .
t x [ 0 ] = fromUser [ 0 ] ;
t x [ 1 ] = fromUser [ 1 ] ;
t x [ 2 ] = DUMMY;
expectedRx [ 0 ] = CH TO CODE AOUT( ch , s c h ) + 1 ;
expectedRx [ 1 ] = fromUser [ 0 ] + 1 ;
expectedRx [ 2 ] = fromUser [ 1 ] + 1 ;
// Send d a t a and c h e c k r e t u r n s .
r e t = SPI SendTableOfBytes ( tx , expectedRx , 3 ) ;
i f ( r e t < 0 ) return r e t ;
// Confirm command .
r e t = S P I M a s t e r T r a n s f e r B y t e (MASTER OK) ;
DEBUG( ”masterOK : %i slaveOK : %i \n ” , MASTER OK, r e t ) ;
i f ( r e t != SLAVE OK) return −EIO ;
return 0 ;
}
i n t Cmd GetDIn ( u8 ∗ t o U s e r )
{
int r e t ;
// S y n c h r o n i z e w i t h ATMega128
r e t = Cmd WaitForAM128 (CODE DIN) ;
DEBUG( ” 1 : code : %i count : %i \n ” , CODE DIN, r e t ) ;
i f ( r e t < 0 ) return r e t ;
// Send DUMMY, r e c e i v e code ack .
r e t = S P I M a s t e r T r a n s f e r B y t e (DUMMY) ;
DEBUG( ” 2 : dummy : %i code +1: %i \n ” , DUMMY, r e t ) ;
i f ( r e t != CODE DIN + 1 ) return −EIO ;
// Send DUMMY, r e c e i v e d a t a 0 .
r e t = S P I M a s t e r T r a n s f e r B y t e (DUMMY) ;
DEBUG( ” 3 : dummy : %i data0 : %i \n ” , DUMMY, r e t ) ;
i f ( r e t < 0 ) return r e t ;
t o U s e r [ 0 ] = ( u8 ) r e t ;
// Send d a t a 0 ack , r e c e i v e DUMMY.
r e t = SPI MasterTransferByte ( toUser [ 0 ] + 1) ;
DEBUG( ” 4 : data0 +1: %i dummy : %i \n ” , ( ( u8 ) ( t o U s e r [ 0 ] ) + 1 ) , r e t ) ;
i f ( r e t != DUMMY) return −EIO ;
// Confirm command .
r e t = S P I M a s t e r T r a n s f e r B y t e (MASTER OK) ;
DEBUG( ”masterOK : %i slaveOK : %i \n ” , MASTER OK, r e t ) ;
i f ( r e t != SLAVE OK) return −EIO ;
return 0 ;
}
i n t Cmd SetDOut ( u8 ∗ fromUser )
{
int r e t ;
unsigned char t x [ 3 ] , expectedRx [ 3 ] ;
// S y n c h r o n i z e w i t h ATMega128
r e t = Cmd WaitForAM128 (CODE DOUT) ;
DEBUG( ”code : %i count : %i \n ” , CODE DOUT, r e t ) ;
i f ( r e t < 0 ) return r e t ;
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APPENDIX C. CODE
// Prepare t o send s e v e r a l b y t e s .
t x [ 0 ] = fromUser [ 0 ] ;
t x [ 1 ] = fromUser [ 1 ] ;
t x [ 2 ] = DUMMY;
expectedRx [ 0 ] = CODE DOUT + 1 ;
expectedRx [ 1 ] = fromUser [ 0 ] + 1 ;
expectedRx [ 2 ] = fromUser [ 1 ] + 1 ;
// Send d a t a and c h e c k r e t u r n s .
r e t = SPI SendTableOfBytes ( tx , expectedRx , 3 ) ;
i f ( r e t < 0 ) return r e t ;
// Confirm command .
r e t = S P I M a s t e r T r a n s f e r B y t e (MASTER OK) ;
DEBUG( ”masterOK : %i slaveOK : %i \n ” , MASTER OK, r e t ) ;
i f ( r e t != SLAVE OK) return −EIO ;
return 0 ;
}
#i f d e f BUFFERING MODE
i n t Cmd EnableAIn ( u8 e n a b l e , i n t ch )
{
int r e t ;
unsigned char t x [ 2 ] , expectedRx [ 2 ] ;
// c h e c k f o r v a l i d c h a n n e l .
i f ( ch < 0 ) return −EIO ;
// S y n c h r o n i z e w i t h ATMega128
r e t = Cmd WaitForAM128 (CH TO CODE AIN EN( ch ) ) ;
DEBUG( ”code : %i count : %i \n ” , CH TO CODE AIN EN( ch ) , r e t ) ;
i f ( r e t < 0 ) return r e t ;
// Prepare t o send s e v e r a l b y t e s .
tx [ 0 ] = enable ;
t x [ 1 ] = DUMMY;
expectedRx [ 0 ] = CH TO CODE AIN EN( ch ) + 1 ;
expectedRx [ 1 ] = e n a b l e + 1 ;
// Send d a t a and c h e c k r e t u r n s .
r e t = SPI SendTableOfBytes ( tx , expectedRx , 2 ) ;
i f ( r e t < 0 ) return r e t ;
// Confirm command .
r e t = S P I M a s t e r T r a n s f e r B y t e (MASTER OK) ;
DEBUG( ”masterOK : %i slaveOK : %i \n ” , MASTER OK, r e t ) ;
i f ( r e t != SLAVE OK) return −EIO ;
return 0 ;
}
#endif
i n t Cmd SetAOutResolution ( u8 r e s o l , i n t ch )
{
int r e t ;
unsigned char t x [ 2 ] , expectedRx [ 2 ] ;
// S y n c h r o n i z e w i t h ATMega128
r e t = Cmd WaitForAM128 (CH TO CODE AOUT RES( ch ) ) ;
DEBUG( ”code : %i count : %i \n ” , CH TO CODE AOUT RES( ch ) , r e t ) ;
i f ( r e t < 0 ) return r e t ;
// Prepare t o send s e v e r a l b y t e s .
tx [ 0 ] = r e s o l ;
t x [ 1 ] = DUMMY;
expectedRx [ 0 ] = CH TO CODE AOUT RES( ch ) + 1 ;
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expectedRx [ 1 ] = r e s o l + 1 ;
// Send d a t a and c h e c k r e t u r n s .
r e t = SPI SendTableOfBytes ( tx , expectedRx , 2 ) ;
i f ( r e t < 0 ) return r e t ;
// Confirm command .
r e t = S P I M a s t e r T r a n s f e r B y t e (MASTER OK) ;
DEBUG( ”masterOK : %i slaveOK : %i \n ” , MASTER OK, r e t ) ;
i f ( r e t != SLAVE OK) return −EIO ;
return 0 ;
}
#i f d e f INTERRUPT MODE
i r q r e t u r n t irqFunk ( i n t i r q , void ∗ d e v i d , struct p t r e g s ∗ r e g s )
{
// Wake up queue w a i t i n g f o r i n t e r r u p t .
DEBUG( ” r e c e i v e d i n t e r r u p t \n ” ) ;
d e v i c e −>i r q F l a g = 1 ;
w a k e u p i n t e r r u p t i b l e (&wq) ;
return IRQ HANDLED ;
}
#endif
C.2.4
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avr32io SPI.c
i n t S P I M a s t e r T r a n s f e r ( u8 ∗ rx , u8 ∗ tx , i n t l e n )
{
// S t r u c t s f o r t h e t r a n s f e r .
struct s p i m e s s a g e msg ;
struct s p i t r a n s f e r t r a n s f e r ;
// Makes t h e t r a n s f e r s t r u c t .
memset(& t r a n s f e r , 0 , s i z e o f ( t r a n s f e r ) ) ;
transfer . len = len ;
t r a n s f e r . r x b u f = rx ;
t r a n s f e r . t x b u f = tx ;
// Makes t h e m e s s a g e s t r u c t , and i n c l u d e s t h e t r a n s f e r i n i t .
s p i m e s s a g e i n i t (&msg ) ;
s p i m e s s a g e a d d t a i l (& t r a n s f e r , &msg ) ;
// E x e c u t e t r a n s f e r and r e t u r n r e s u l t .
return s p i s y n c ( d e v i c e −>s p i , &msg ) ;
}
i n t S P I M a s t e r T r a n s f e r B y t e ( u8 t x )
{
int r e t ;
u8 r x ;
// E x e c u t e t r a n s f e r o f one b y t e .
r e t = S P I M a s t e r T r a n s f e r (&rx , &tx , 1 ) ;
i f ( r e t < 0 ) return r e t ;
return r x ;
}
i n t SPI SendTableOfBytes ( u8 ∗ tx , u8 ∗ expectedRx , i n t l e n )
{
int i , r e t ;
u8 r x [ l e n ] ;
// E x e c u t e t r a n s f e r o f t h e g i v e n number o f b y t e s .
r e t = S P I M a s t e r T r a n s f e r ( rx , tx , l e n ) ;
i f ( r e t < 0 ) return r e t ;
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// Checks t h a t a l l r e c e i v e d d a t a was t h e e x p e c t e d d a t a .
f o r ( i = 0 ; i < l e n ; i ++){
DEBUG( ”t x%i : %i expectedRx%i : %i r x%i : %i \n ” , i , t x [ i ] , i , expectedRx [ i ] , i ,
rx [ i ] ) ;
i f ( r x [ i ] != expectedRx [ i ] ) return −EIO ;
}
return 0 ;
}
C.3
C.3.1
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APPENDIX C. CODE
User Mode
avr32io driver.c
long a v r 3 2 i o G e t A n a l o g I n ( char c h a n n e l )
{
i n t fd , r e t ;
char d e v F i l e [ 1 3 ] ;
unsigned char data [ 2 ] ;
unsigned short r e s u l t ;
p t h r e a d m u t e x l o c k (&spiMutex ) ;
// Open t h e c o r r e c t d e v i c e node .
s p r i n t f ( d e v F i l e , ”/ dev / avr32Ain%i ” , c h a n n e l ) ;
f d = open ( d e v F i l e , O RDWR) ;
i f ( fd < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on open : %i \n ” , f d ) ;
return f d ;
}
// Read d a t a from d e v i c e node and c l o s e i t .
r e t = r e a d ( fd , data , 2 ) ;
c l o s e ( fd ) ;
i f ( r e t < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on r e a d : %i \n ” , r e t ) ;
return r e t ;
}
p t h r e a d m u t e x u n l o c k (& spiMutex ) ;
// Convert r e s u l t and r e t u r n .
r e s u l t = ( data [ 0 ] << 8 ) + data [ 1 ] ;
return ( long ) ( r e s u l t ) ;
}
short a v r 3 2 i o S e t A n a l o g O u t ( char c h a n n e l , char s u b c h a n n e l , unsigned short v a l u e )
{
int ret , fd ;
char d e v F i l e [ 1 4 ] ;
unsigned char data [ 3 ] ;
// Prepare d a t a t o send .
data [ 0 ] = s u b c h a n n e l ;
data [ 1 ] = v a l u e >> 8 ;
data [ 2 ] = v a l u e ;
p t h r e a d m u t e x l o c k (&spiMutex ) ;
// Open t h e c o r r e c t d e v i c e node .
s p r i n t f ( d e v F i l e , ”/ dev / avr32Aout%i ” , c h a n n e l ) ;
f d = open ( d e v F i l e , O RDWR) ;
i f ( fd < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on open : %i \n ” , f d ) ;
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return f d ;
}
// Write d a t a t o d e v i c e node and c l o s e i t .
r e t = w r i t e ( fd , data , 3 ) ;
c l o s e ( fd ) ;
i f ( r e t < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on w r i t e : %i \n ” , r e t ) ;
return r e t ;
}
p t h r e a d m u t e x u n l o c k (& spiMutex ) ;
return 0 ;
}
short a v r 3 2 i o S e t A n a l o g O u t D o u b l e ( char c h a n n e l , char s u b c h a n n e l , double v a l u e )
{
// C o n v e r t i n g t h e d o u b l e v a l u e t o i n t e g e r and c a l l t h e a n a l o g o u t f u n c t i o n .
return a v r 3 2 i o S e t A n a l o g O u t ( c h a n n e l , s u b c h a n n e l , ( i n t ) ( a o u t M u l t i p l i e r [ c h a n n e l ] ∗
value ) ) ;
}
short a v r 3 2 i o G e t D i g i t a l I n ( )
{
i n t fd , r e t ;
unsigned char data ;
p t h r e a d m u t e x l o c k (&spiMutex ) ;
// Open t h e c o r r e c t d e v i c e node .
f d = open ( ”/ dev / avr32Din ” , O RDWR) ;
i f ( fd < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on open : %i \n ” , f d ) ;
return f d ;
}
// Read d a t a from d e v i c e node and c l o s e i t .
r e t = r e a d ( fd , &data , 1 ) ;
c l o s e ( fd ) ;
i f ( r e t < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on r e a d : %i \n ” , r e t ) ;
return r e t ;
}
p t h r e a d m u t e x u n l o c k (& spiMutex ) ;
// Return r e s u l t .
return ( short ) ( data ) ;
}
short a v r 3 2 i o G e t D i g i t a l I n B i t ( char b i t )
{
short data ;
unsigned char ucData ;
// Get d i g i t a l i n d a t a .
data = a v r 3 2 i o G e t D i g i t a l I n ( ) ;
i f ( data < 0 ) {
return data ;
}
// Check t h e b i t , and r e t u r n t h e r e s u l t .
ucData = ( unsigned char ) ( data ) ;
i f ( ( ucData & ( 1 << b i t ) ) > 0 ) {
return 1 ;
}
else {
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APPENDIX C. CODE
return 0 ;
}
}
short a v r 3 2 i o S e t D i g i t a l O u t ( unsigned char mask , unsigned char v a l u e )
{
i n t fd , r e t ;
unsigned char data [ 2 ] ;
// Prepare d a t a t o send .
data [ 0 ] = mask ;
data [ 1 ] = v a l u e ;
p t h r e a d m u t e x l o c k (&spiMutex ) ;
// Open t h e c o r r e c t d e v i c e node .
f d = open ( ”/ dev / avr32Dout ” , O RDWR) ;
i f ( fd < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on open : %i \n ” , f d ) ;
return f d ;
}
// Write d a t a t o t h e d e v i c e node and c l o s e i t .
r e t = w r i t e ( fd , data , 2 ) ;
c l o s e ( fd ) ;
i f ( r e t < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on w r i t e : %i \n ” , r e t ) ;
return r e t ;
}
p t h r e a d m u t e x u n l o c k (& spiMutex ) ;
return 0 ;
}
short a v r 3 2 i o S e t D i g i t a l O u t B i t ( char b i t , char v a l u e )
{
unsigned char mask , newValue ;
// Prepare d a t a f o r new f u n c t i o n c a l l .
mask = 1 << b i t ;
newValue = 0 ;
i f ( value > 0) {
newValue = 1 << b i t ;
}
// Write d a t a and r e t u r n .
return a v r 3 2 i o S e t D i g i t a l O u t ( mask , newValue ) ;
}
short a v r 3 2 i o S e t A n a l o g O u t R e s o l u t i o n ( char c h a n n e l , char r e s o l u t i o n )
{
i n t fd , r e t ;
char d e v F i l e [ 1 4 ] ;
a o u t M u l t i p l i e r [ c h a n n e l ] = ( double ) ( ( pow ( 2 , r e s o l u t i o n ) − 1 ) / 5 ) ;
p t h r e a d m u t e x l o c k (&spiMutex ) ;
// Open t h e c o r r e c t d e v i c e node .
s p r i n t f ( d e v F i l e , ”/ dev / avr32Aout%i ” , c h a n n e l ) ;
f d = open ( d e v F i l e , O RDWR) ;
i f ( fd < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on open : %i \n ” , f d ) ;
return f d ;
}
// Perform IOCTL command on t h e d e v i c e node and c l o s e i t .
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r e t = i o c t l ( fd , AVR32IO IOCTL RES AOUT , r e s o l u t i o n ) ;
c l o s e ( fd ) ;
i f ( r e t < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on w r i t e : %i \n ” , r e t ) ;
return r e t ;
}
p t h r e a d m u t e x u n l o c k (& spiMutex ) ;
return 0 ;
}
short a v r 3 2 i o E n a b l e A n a l o g I n ( char c h a n n e l , char e n a b l e )
{
i n t fd , r e t ;
char d e v F i l e [ 1 4 ] ;
p t h r e a d m u t e x l o c k (&spiMutex ) ;
// Open t h e c o r r e c t d e v i c e node .
s p r i n t f ( d e v F i l e , ”/ dev / avr32Ain%i ” , c h a n n e l ) ;
f d = open ( d e v F i l e , O RDWR) ;
i f ( fd < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on open : %i \n ” , f d ) ;
return f d ;
}
// Perform IOCTL command on t h e d e v i c e node and c l o s e i t .
r e t = i o c t l ( fd , AVR32IO IOCTL EN AIN , e n a b l e ) ;
c l o s e ( fd ) ;
i f ( r e t < 0) {
DEBUG( ” a v r 3 2 i o u s e r : e r r o r on w r i t e : %i \n ” , r e t ) ;
return r e t ;
}
p t h r e a d m u t e x u n l o c k (& spiMutex ) ;
return 0 ;
}
C.3.2
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avr32io threads.c
#include <s t d i o . h>
#include <p t h r e a d . h>
#include <math . h>
void I n i t I O ( ) {
i f ( ! IO Started ) {
// I n i t i a l i z e p e r i o d i c t a s k s .
InitPeriodicTasks () ;
// S t a r t s a n a l o g o u t p u t worker t h r e a d .
aoutCmdListFirst = 0 ;
aoutCmdListLast = 0 ;
workCount = 0 ;
p t h r e a d c r e a t e (&aoutWorker , NULL, Worker Aout , NULL) ;
// Marks t h a t t h i s f u n c t i o n have been run .
IO Started = 1;
}
}
i n t a v r 3 2 i o I n i t A n a l o g I n ( i n t chanNumber , double p e r i o d )
{
// E n a b l e s s e l e c t e d c h a n n e l .
struct sAinChan ∗ chan ;
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APPENDIX C. CODE
chan = a i n C h a n L i s t + chanNumber ;
a v r 3 2 i o E n a b l e A n a l o g I n ( chanNumber , 1 ) ;
// S t a r t p e r i o d i c t h r e a d f o r s a m p l i n g t h e a n a l o g i n p u t c h a n n e l .
p t h r e a d m u t e x i n i t (&( chan−>mutex ) , NULL) ;
S t a r t P e r i o d i c T h r e a d (&( chan−>samplingTask ) , ( i n t ) ( p e r i o d /MASTER TIMER PERIOD
) , Sampling Ain , chan ) ;
}
void ∗ Sampling Ain ( void ∗ p t r )
{
i n t count = 0 ;
struct sAinChan ∗ chan ;
chan = p t r ;
chan−>v a l u e = 0 ;
// F o r e v e r l o o p f o r s a m p l i n g a n a l o g i n p u t .
while ( 1 ) {
// Wait f o r p e r i o d e .
W a i t P e r i o d i c T a s k (&( chan−>samplingTask ) ) ;
// Lock mutex , u p d a t e v a l u e and u n l o c k mutex .
p t h r e a d m u t e x l o c k (&( chan−>mutex ) ) ;
chan−>v a l u e = ( f l o a t ) ( a v r 3 2 i o G e t A n a l o g I n ( chan−>chanNumber ) ∗
0.004888) ;
p t h r e a d m u t e x u n l o c k (&( chan−>mutex ) ) ;
}
}
i n t a v r 3 2 i o G e t A n a l o g I n T h r e a d ( i n t chanNumber , double ∗ data )
{
double r e s u l t ;
struct sAinChan ∗ chan ;
chan = a i n C h a n L i s t + chanNumber ;
// Lock mutex , s a v e v a l u e and u n l o c k mutex .
p t h r e a d m u t e x l o c k (&( chan−>mutex ) ) ;
r e s u l t = chan−>v a l u e ;
p t h r e a d m u t e x u n l o c k (&( chan−>mutex ) ) ;
// For some r e a s o n r e t u r n i n g a d o u b l e d i d n ’ t work w i t h RTW
∗ data = r e s u l t ;
return 0 ;
}
i n t a v r 3 2 i o S e t A n a l o g O u t T h r e a d ( i n t chanNumber , i n t subchanNumber , double v a l u e )
{
// Makes new l i s t item .
struct sAoutCmd ∗temp ;
temp = m a l l o c ( s i z e o f ( struct sAoutCmd ) ) ;
temp−>chanNumber = chanNumber ;
temp−>subchanNumber = subchanNumber ;
temp−>v a l u e = v a l u e ;
temp−>n e x t = NULL;
// Lock mutex , add item t o t h e l i s t and u n l o c k mutex .
p t h r e a d m u t e x l o c k (&cmdListMutex ) ;
i f ( a o u t C m d L i s t F i r s t == NULL) {
// L i s t empty .
a o u t C m d L i s t F i r s t = temp ;
}
else {
// L i s t n o t empty .
aoutCmdListLast−>n e x t = temp ;
}
aoutCmdListLast = temp ;
workCount++;
p t h r e a d m u t e x u n l o c k (&cmdListMutex ) ;
C.3. USER MODE
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// S i g n a l i n g t h e worker t h r e a d .
p t h r e a d c o n d s i g n a l (&workCond ) ;
return 0 ;
}
void ∗ Worker Aout ( )
{
struct sAoutCmd ∗temp ;
// F o r e v e r l o o p .
while ( 1 ) {
// Wait
pthread
pthread
pthread
f o r work .
m u t e x l o c k (&workMutex ) ;
c o n d w a i t (&workCond , &workMutex ) ;
m u t e x u n l o c k (&workMutex ) ;
// E x e c u t e s commands u n t i l l i s t i s empty .
while ( workCount >0){
// Locks mutex , g r a b f i r s t l i s t item and u n l o c k mutex .
p t h r e a d m u t e x l o c k (&cmdListMutex ) ;
temp = a o u t C m d L i s t F i r s t ;
a o u t C m d L i s t F i r s t = temp−>n e x t ;
workCount−−;
p t h r e a d m u t e x u n l o c k (&cmdListMutex ) ;
// Send v a l u e t o I /O−c a r d and f r e e t h e l i s t i t e m s memory .
a v r 3 2 i o S e t A n a l o g O u t ( temp−>chanNumber , temp−>subchanNumber ,
( i n t ) ( a o u t M u l t i p l i e r [ temp−>chanNumber ] ∗ temp−>v a l u e ) )
;
f r e e ( temp ) ;
}
}
}
C.3.3
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periodictask.h
#i f n d e f DEF PTASK
#define DEF PTASK
// i n c l u d e s
#include < s i g n a l . h>
#include <p t h r e a d . h>
#include <s y s / time . h>
// S t r u c t t h a t r e p r e s e n t s one p e r i o d i c t a s k .
struct s P e r i o d i c T a s k {
struct s P e r i o d i c T a s k ∗ n e x t ; // P o i n t e r t o t h e n e x t p e r i o d c t a s k .
i n t p e r i o d e ; // The p e r i o d e o f t h e t a s k .
p t h r e a d t t h r e a d ; // The t h r e a d t h a t s ru n n i n g t h e t a s k .
p t h r e a d c o n d t cond ; // The c o n d i t i o n t h a t c o n t r o l s t h e t a s k .
p t h r e a d m u t e x t mutex ; // The mutex p r o t e c t i n g t h e c o n d i t i o n .
};
// S t r u c t f o r t h e t i m e r .
struct i t i m e r v a l r t t i m e r ;
// S t r u c t f o r t h e r o o t t a s k .
struct s P e r i o d i c T a s k ∗ r o o t T a s k ;
// This f u n c t i o n i n i t i a l i z e t h e p e r i o d i c t a s k sy stem .
int I n i t P e r i o d i c T a s k s ( ) ;
// Function t h a t runs e v e r y m i l l i s e c o n d , s i g n a l i n g
void fTimer ( ) ;
a l l the periodic tasks .
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// This f u n c t i o n s t a r t s a new p e r i o d i c t a s k . S t a r t e d t a s k s can ’ t be s t o p p e d .
i n t S t a r t P e r i o d i c T a s k ( struct s P e r i o d i c T a s k ∗pTask , i n t p e r i o d e ) ;
// This f u n c t i o n s t a r t s a new p e r i o d i c t h r e a d . S t a r t e d t h r e a d s can ’ t be s t o p p e d .
i n t S t a r t P e r i o d i c T h r e a d ( struct s P e r i o d i c T a s k ∗pTask , i n t p e r i o d e , void ∗ ( ∗ f u n c t i o n )
( void ∗ ) , void ∗ data ) ;
// Used i n s i d e t h e p e r i o d i c t a s k / t h r e a d t o s l e e p u n t i l n e x t p e r i o d e .
i n t W a i t P e r i o d i c T a s k ( struct s P e r i o d i c T a s k ∗ pTask ) ;
#include ” p e r i o d i c T a s k . c ”
#endif
C.3.4
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3
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APPENDIX C. CODE
periodictask.c
int I n i t P e r i o d i c T a s k s ( ) {
static int i n i t i a l i z e d ;
i f ( i n i t i a l i z e d > 0 ) return −1;
// I n i t i a l i z e t h e t i m e r .
s i g n a l (SIGALRM, fTimer ) ;
rttimer . it value . tv sec = 0;
rttimer . it value . tv usec = 1;
rttimer . i t i n t e r v a l . tv sec = 0;
rttimer . i t i n t e r v a l . tv usec = 1000;
s e t i t i m e r (ITIMER REAL , &r t t i m e r , NULL) ;
// I n i t i a l i z e a empty t a k s t a b l e .
r o o t T a s k = NULL;
i n i t i a l i z e d = 1;
// Return z e r o .
return 0 ;
}
void fTimer ( ) {
// V a r i a b l e s
s t a t i c long count ;
struct s P e r i o d i c T a s k ∗ t a s k ;
// I n c r e a s e t h e c o u n t e r .
count++;
// Walks t h r o u g h t h e t a s k s and s i g n a l t h e ones t h a t need t o run .
task = rootTask ;
while ( t a s k != NULL) {
i f ( ( count % ( t a s k −>p e r i o d e ) ) == 0 ) {
// S i g n a l a t a s k .
p t h r e a d c o n d s i g n a l (&( t a s k −>cond ) ) ;
}
// Next t a s k .
t a s k = t a s k −>n e x t ;
}
}
i n t S t a r t P e r i o d i c T a s k ( struct s P e r i o d i c T a s k ∗pTask , i n t p e r i o d e )
{
// V a r i a b l e s
struct s P e r i o d i c T a s k ∗newTask , ∗ p r e v i o u s T a s k ;
// The new t a s k w i l l be p o i n t i n g t o n o t h i n g .
pTask−>n e x t = NULL;
i f ( r o o t T a s k == NULL) {
// I f r o o t T a s k doesn ’ t p o i n t a t a n y t h i n g , t h i s t a s k i s t h e f i r s t t a s k .
r o o t T a s k = pTask ;
C.3. USER MODE
}
else {
// I f r o o t T a s k p o i n t a t something , t h e f i r s t t a s k t h a t d o e s n t p o i n t a t a n e x t
t a s k has t o be found .
previousTask = rootTask ;
newTask = rootTask−>n e x t ;
while ( newTask != NULL) {
// W i l l q u i t when a empty n e x t p o i n t e r i s found .
p r e v i o u s T a s k = newTask ;
newTask = newTask−>n e x t ;
}
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// The empty newTask w i l l now p o i n t t o pTask , and t h e former n e w e s t t a s k w i l l
p o i n t t o t h e new .
newTask = pTask ;
p r e v i o u s T a s k −>n e x t = newTask ;
}
// I n i t i a l i z e t h e c o n t e n t o f t h e new t a s k .
pTask−>p e r i o d e = p e r i o d e ;
p t h r e a d c o n d i n i t (&( pTask−>cond ) , NULL) ;
p t h r e a d m u t e x i n i t (&( pTask−>mutex ) , NULL) ;
return 0 ;
}
i n t S t a r t P e r i o d i c T h r e a d ( struct s P e r i o d i c T a s k ∗pTask , i n t p e r i o d e , void ∗ ( ∗
s t a r t r o u t i n e ) ( void ∗ ) , void ∗ data )
{
int r e t ;
// S t a r t a p e r i o d i c t a s k and a t h r e a d .
r e t = S t a r t P e r i o d i c T a s k ( pTask , p e r i o d e ) ;
p t h r e a d c r e a t e (&( pTask−>t h r e a d ) , NULL, ( ∗
return r e t ;
s t a r t r o u t i n e ) , data ) ;
}
i n t W a i t P e r i o d i c T a s k ( struct s P e r i o d i c T a s k ∗ pTask )
{
// Wait f o r t h e s i g n a l t o t h e g i v e n t a s k .
p t h r e a d m u t e x l o c k (&( pTask−>mutex ) ) ;
p t h r e a d c o n d w a i t (&( pTask−>cond ) , &(pTask−>mutex ) ) ;
p t h r e a d m u t e x u n l o c k (&( pTask−>mutex ) ) ;
return 0 ;
}
C.3.5
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143
stopwatch.h
#i f n d e f DEF SWATCH
#define DEF SWATCH
// i n c l u d e s
#include <s y s / time . h>
#include <s t d i o . h>
// C o n s t a n t s
#define SWATCH IDLE 0
#define SWATCH STARTED 1
#define SWATCH STOPED 2
// S t r u c t t h a t r e p r e s e n t a s t o p w a t c h .
struct sStopWatch {
i n t s t a t e ; // The s t a t e o f t h e s t o p w a t c h .
i n t u s e c ; // R e s u l t o f t h e s t o p w a t c h , might n o t be n e c e s a r y .
struct t i m e v a l s t a r t , s t o p ; // S t r u c t s f o r k e e p i n g t h e time .
};
// This f u n c t i o n s t a r t s t h e s t o p w a t c h .
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i n t StartStopWatch ( struct sStopWatch ∗sWatch ) ;
// This f u n c t i o n s t o p s t h e s t o p w a t c h and r e t u r n s t h e r e s u l t .
i n t StopStopWatch ( struct sStopWatch ∗sWatch ) ;
#include ”s t o p w a t c h . c ”
#endif
C.3.6
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// S t a r t s t h e watch , n o t i c e t h a t g e t t i m e o f d a y i s t h e l a s t t h i n g t o happen . This
i s b e c a u s e t h a t w i l l be most a c c u r a t e .
sWatch−>s t a t e = SWATCH STARTED;
sWatch−>u s e c = −1;
g e t t i m e o f d a y (&( sWatch−>s t a r t ) , NULL) ;
return 0 ;
}
i n t StopStopWatch ( struct sStopWatch ∗sWatch )
{
// Returns an e r r o r i f t h e watch h a v e n t been s t a r t e d .
i f ( sWatch−>s t a t e != SWATCH STARTED) return −1;
// S t o p s t h e watch and c a l c u l a t e t h e r e s u l t , and r e t u r n t h i s . N o t i c e t h a t
g e t t i m e o f d a y i s t h e f i r s t t h i n g t o happen . This i s b e c a u s e t h a t w i l l be most
accurate .
g e t t i m e o f d a y (&( sWatch−>s t o p ) , NULL) ;
sWatch−>s t a t e = SWATCH STOPED;
sWatch−>u s e c = sWatch−>s t o p . t v s e c ∗ 1000000 + sWatch−>s t o p . t v u s e c − sWatch−>
s t a r t . t v s e c ∗ 1000000 − sWatch−>s t a r t . t v u s e c ;
return sWatch−>u s e c ;
}
C.4
C.4.1
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stopwatch.c
i n t StartStopWatch ( struct sStopWatch ∗sWatch )
{
// Returns an e r r o r i f t h e watch have a l r e a d y been s t a r t e d .
i f ( sWatch−>s t a t e == SWATCH STARTED) return −1;
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APPENDIX C. CODE
Matlab S-functions
Analog input TLC
%implements ” a v r 3 2 i o a d c ” ”C”
%f u n c t i o n I n i t i a l i z e C o n d i t i o n s ( b l o c k , system ) Output
/∗ %<Type> B l o c k : %<Name> ∗/
%% E n a b l e s a l l a n a l o g i n p u t c h a n n e l s when system s t a r t s up .
%f o r e a c h opIdx = NumDataOutputPorts
%i f L i b B l o c k O u t p u t S i g n a l C o n n e c t e d ( opIdx )
a v r 3 2 i o E n a b l e A n a l o g I n(%<opIdx >, 1 ) ;
%e n d i f
%e n d f o r e a c h
%e n d f u n c t i o n
%f u n c t i o n Outputs ( b l o c k , system ) Output
/∗ %<Type> B l o c k : %<Name> ∗/
%% Do command f o r g e t t i n g a n a l o g i n p u t v a l u e .
%f o r e a c h opIdx = NumDataOutputPorts
%i f L i b B l o c k O u t p u t S i g n a l C o n n e c t e d ( opIdx )
C.4. MATLAB S-FUNCTIONS
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%<L i b B l o c k O u t p u t S i g n a l ( opIdx , ” ” , ” ” , 0 )> = a v r 3 2 i o G e t A n a l o g I n(%<opIdx >)
∗ 0.0048828;
%e n d i f
%e n d f o r e a c h
%e n d f u n c t i o n
C.4.2
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Analog output TLC
%implements ” a v r 3 2 i o d a c ” ”C”
%f u n c t i o n I n i t i a l i z e C o n d i t i o n s ( b l o c k , system ) Output
/∗ %<Type> B l o c k : %<Name> ∗/
%% S e t r e s o l u t i o n f o r both o f t h e a n a l o g out c h a n n e l s .
a v r 3 2 i o S e t A n a l o g O u t R e s o l u t i o n ( 0 , ( i n t )%<L i b B l o c k P a r a m e t e r ( P1 , ” ” , ” ” , 0 )> + 7 ) ;
a v r 3 2 i o S e t A n a l o g O u t R e s o l u t i o n ( 1 , ( i n t )%<L i b B l o c k P a r a m e t e r ( P2 , ” ” , ” ” , 0 )> + 7 ) ;
%e n d f u n c t i o n
%f u n c t i o n Outputs ( b l o c k , system ) Output
/∗ %<Type> B l o c k : %<Name> ∗/
%%Loops t h r o u g h a l l p o r t s , and s e t a n a l o g out f u n c t i o n s f o r t h e p o r t s t h a t a r e
connected .
s t a t i c i n t count [ 6 ] ;
int r e t ;
%f o r e a c h opIdx = NumDataInputPorts
%i f L i b B l o c k I n p u t S i g n a l C o n n e c t e d ( opIdx )
%i f opIdx <3
r e t = a v r 3 2 i o S e t A n a l o g O u t D o u b l e ( 0 , %<opIdx >, ( double )(%<
L i b B l o c k I n p u t S i g n a l ( opIdx , ” ” , ” ” , 0 ) >) ) ;
%e l s e
r e t = a v r 3 2 i o S e t A n a l o g O u t D o u b l e ( 1 , %<opIdx> − 3 , ( double )(%<
L i b B l o c k I n p u t S i g n a l ( opIdx , ” ” , ” ” , 0 ) >) ) ;
%e n d i f
i f ( r e t < 0) {
count[%<opIdx >]++;
p r i n t f ( ”%<opIdx> count : %i data : %f \n ” , count[%<opIdx >] , %<
L i b B l o c k I n p u t S i g n a l ( opIdx , ” ” , ” ” , 0 ) >) ;
}
%e n d i f
%e n d f o r e a c h
%e n d f u n c t i o n
C.4.3
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145
Digital input TLC
%implements ” a v r 3 2 i o d i n ” ”C”
%f u n c t i o n Outputs ( b l o c k , system ) Output
/∗ %<Type> B l o c k : %<Name> ∗/
%% Reads d i g i t a l i n o u t v a l u e s from I /O−c a r d .
unsigned char d i n = a v r 3 2 i o G e t D i g i t a l I n ( ) ;
%f o r e a c h opIdx = NumDataOutputPorts
%i f L i b B l o c k O u t p u t S i g n a l C o n n e c t e d ( opIdx )
i f ( d i n & (1<<%<opIdx >) ) {
%<L i b B l o c k O u t p u t S i g n a l ( opIdx , ” ” , ” ” , 0 )> = 5 ;
}
else {
%<L i b B l o c k O u t p u t S i g n a l ( opIdx , ” ” , ” ” , 0 )> = 0 ;
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}
%e n d i f
%e n d f o r e a c h
%e n d f u n c t i o n
C.4.4
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APPENDIX C. CODE
Digital output TLC
%implements ” a v r 3 2 i o d o u t ” ”C”
%f u n c t i o n Outputs ( b l o c k , system ) Output
/∗ %<Type> B l o c k : %<Name> ∗/
%% Checking a l l c h a n n e l s and make a mask and data b y t e t h a t a r e s e n d t a s a command
t o t h e I /O−c a r d .
unsigned char dout = 0 ;
unsigned char mask = 0 ;
%i f L i b B l o c k I n p u t S i g n a l C o n n e c t e d ( 0 )
mask = mask | (1<<0) ;
i f ( ( double )(%<L i b B l o c k I n p u t S i g n a l ( 0 , ” ” ,
L i b B l o c k P a r a m e t e r ( P1 , ” ” , ” ” , 0 ) >) ) {
dout = dout | (1<<0) ;
}
%e n d i f
%i f L i b B l o c k I n p u t S i g n a l C o n n e c t e d ( 1 )
mask = mask | (1<<1) ;
i f ( ( double )(%<L i b B l o c k I n p u t S i g n a l ( 1 , ” ” ,
L i b B l o c k P a r a m e t e r ( P2 , ” ” , ” ” , 0 ) >) ) {
dout = dout | (1<<1) ;
}
%e n d i f
%i f L i b B l o c k I n p u t S i g n a l C o n n e c t e d ( 2 )
mask = mask | (1<<2) ;
i f ( ( double )(%<L i b B l o c k I n p u t S i g n a l ( 2 , ” ” ,
L i b B l o c k P a r a m e t e r ( P3 , ” ” , ” ” , 0 ) >) ) {
dout = dout | (1<<2) ;
}
%e n d i f
%i f L i b B l o c k I n p u t S i g n a l C o n n e c t e d ( 3 )
mask = mask | (1<<3) ;
i f ( ( double )(%<L i b B l o c k I n p u t S i g n a l ( 3 , ” ” ,
L i b B l o c k P a r a m e t e r ( P4 , ” ” , ” ” , 0 ) >) ) {
dout = dout | (1<<3) ;
}
%e n d i f
%i f L i b B l o c k I n p u t S i g n a l C o n n e c t e d ( 4 )
mask = mask | (1<<4) ;
i f ( ( double )(%<L i b B l o c k I n p u t S i g n a l ( 4 , ” ” ,
L i b B l o c k P a r a m e t e r ( P5 , ” ” , ” ” , 0 ) >) ) {
dout = dout | (1<<4) ;
}
%e n d i f
%i f L i b B l o c k I n p u t S i g n a l C o n n e c t e d ( 5 )
mask = mask | (1<<5) ;
i f ( ( double )(%<L i b B l o c k I n p u t S i g n a l ( 5 , ” ” ,
L i b B l o c k P a r a m e t e r ( P6 , ” ” , ” ” , 0 ) >) ) {
dout = dout | (1<<5) ;
}
%e n d i f
%i f L i b B l o c k I n p u t S i g n a l C o n n e c t e d ( 6 )
mask = mask | (1<<6) ;
i f ( ( double )(%<L i b B l o c k I n p u t S i g n a l ( 6 , ” ” ,
L i b B l o c k P a r a m e t e r ( P7 , ” ” , ” ” , 0 ) >) ) {
dout = dout | (1<<6) ;
}
” ” , 0 ) >) >= ( double )(%<
” ” , 0 ) >) >= ( double )(%<
” ” , 0 ) >) >= ( double )(%<
” ” , 0 ) >) >= ( double )(%<
” ” , 0 ) >) >= ( double )(%<
” ” , 0 ) >) >= ( double )(%<
” ” , 0 ) >) >= ( double )(%<
C.4. MATLAB S-FUNCTIONS
52
53
54
55
56
57
58
59
60
61
62
%e n d i f
%i f L i b B l o c k I n p u t S i g n a l C o n n e c t e d ( 7 )
mask = mask | (1<<7) ;
i f ( ( double )(%<L i b B l o c k I n p u t S i g n a l ( 7 , ” ” , ” ” , 0 ) >) >= ( double )(%<
L i b B l o c k P a r a m e t e r ( P8 , ” ” , ” ” , 0 ) >) ) {
dout = dout | (1<<7) ;
}
%e n d i f
a v r 3 2 i o S e t D i g i t a l O u t ( mask , dout ) ;
%e n d f u n c t i o n
147
Bibliography
[1] ATmega128 datasheet.
[2] AVR32 32-bit MCU/DSP Overview. Atmel Corporation.
http://www.atmel.com/products/AVR32.
[3] AVR32 Linux Wiki. AVR32 Linux Wiki contributors. http://www.avr32linux.org.
[4] Eagle Layout Editor. CadSoft. http://www.cadsoft.de/.
[5] MAXIM 233 datasheet.
[6] MC1458 datasheet.
[7] MC7805 datasheet.
[8] STK1000. Atmel Corporation.
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918.
[9] STK500 User guide.
[10] Ubuntu. Canonical Ltd. http://www.ubuntu.com.
[11] AVR32 Architecture Manual. Atmel Corporation, Feb 2006.
[12] Real-Time Workshop Target Language Compiler. The Mathworks, Mar 2007.
[13] Real-Time Workshop Target User’s Guide. The Mathworks, Mar 2007.
[14] Wikipedia contributors. Control System. Wikipedia, The Free Encyclopedia., May
2007. http://en.wikipedia.org/w/index.php?title=Control_system&oldid=131753209.
[15] Wikipedia contributors. Linux Kernel. Wikipedia, The Free Encyclopedia., Jun
2007. http://en.wikipedia.org/w/index.php?title=Linux_kernel&oldid=137027739.
[16] Wikipedia contributors. Porting. Wikipedia, The Free Encyclopedia., Jun 2007.
http://en.wikipedia.org/w/index.php?title=Porting&oldid=136428272.
[17] Wikipedia contributors. Porting. Wikipedia, The Free Encyclopedia., May 2007.
http://en.wikipedia.org/w/index.php?title=APT&oldid=131003365.
[18] Wikipedia contributors. Real-Time Computing. Wikipedia, The Free Encyclopedia.,
Jun 2007.
http://en.wikipedia.org/w/index.php?title=Real-time_computing&oldid=135997153.
[19] Wikipedia contributors. Ring. Wikipedia, The Free Encyclopedia., May 2007. http:
//en.wikipedia.org/w/index.php?title=Ring_%28computer_security%29&oldid=131608375.
148
BIBLIOGRAPHY
149
[20] Marco Cesati Daniel P. Bovet. Understanding the Linux Kernel. O’Reilly, 3rd
edition, Nov 2005.
[21] Greg Kroah-Hartman Jonathan Corbet, Alessandro Rubini. Linux Device Drivers.
O’Reilly, 3rd edition, February 2005.
[22] Lindergren. Åpent marked for Linux Embedded. Datarespons - Interrupt, 2006.
http://www.datarespons.com/templates/interrupt.aspx?id=1826.
[23] GNU Project. The Free Software Definition. GNU Project, February 2007.
http://www.gnu.org/philosophy/free-sw.html.
[24] Øyvind Netland. Rapid prototyping with matlab real-time workhsop on an
embedded control system with atmel avr32 processor. Master’s thesis, NTNU, 2007.
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