Series 90-70 Genius Bus Controller IC697BEM731Y, GFK

Series 90-70 Genius Bus Controller IC697BEM731Y, GFK
August 17, 2005
IMPORTANT PRODUCT INFORMATION
GFK-0363AF
READ THIS INFORMATION FIRST
Product:
Firmware version:
Hardware ID:
Genius Bus Controller, IC697BEM731Y
5.9
44A729723-G01R06
Compatibility
Firmware Version 5.9 is available in both production IC697BEM731Y Genius Bus Controller modules and as an upgrade kit
for Bus Controllers in both PACSystems RX7i PLCs and Series 90-70 PLCs. Upgrade Kit 44A286373-G19 is available at
no charge. The upgrade kit is compatible with hardware originally produced as IC697BEM731B and later.
This upgrade replaces Bus Controller version IC697BEM731X, 44A286373-G18
Version 5.9 or later of the Bus Controller firmware is required for operation in PACSystems RX7i PLCs. Prior
versions are subject to the Loss of IOC faults described in this document.
Firmware version 5.9 for the Series 90-70 Genius Bus Controller is qualified for operation in TUV-approved Series 90-70
PLCs.
Changes for this Release
Version 5.9 corrects a safety issue in all previous versions. See “Error Rate Safety Issue” in the Problems Resolved section
for more information.
WARNING
Depending on the application, the safety issue that is corrected in this release can potentially cause
bodily injury, property damage, or both. All users are advised to address this issue for every GBC
either by upgrading to version 5.9 firmware or by setting the Error Rate configuration parameter to
zero, as described in the Problems Resolved section. Version 5.9 upgrade kits are available at no
charge upon request.
New Features and Enhancements
New PLC Fault: Bus Controller operation during a communications disruption with a non-zero Error Rate configuration is
incompatible with all redundancy modes. When the hardware configuration for a Bus Controller contains both a bus device
configured for Redundancy: Yes, and a non-zero Error Rate, Bus Controller firmware version 5.9 does the following:
1.
Replaces the error rate value in the stored configuration with zero; and
2.
Reports a System configuration mismatch fault to the PLC fault table. The fault error code is 77 (4D hexadecimal).
The fault action is Informational to assure that the fault cannot cause the CPU to enter Stop/Fault mode.
Problems Resolved
PACSystems RX7i Loss of IOC Possible At Power-On: With previous Bus Controller firmware versions, there was a
very small possibility that a Bus Controller in a PACSystems RX7i PLC would lose communications if the rack where it
was installed was powered up. This is corrected in firmware Version 5.9.
Error Rate Safety Issue: In previous versions of Bus Controller firmware, with the Bus Controller’s Error Rate parameter
configured to be any non-zero value, if the bus error rate exceeds half that configured value during any 5-second period (the
configured error rate is the maximum number of errors acceptable in any 10-second period), the Bus Controller may drop off
the bus temporarily. Depending on the nature of the bus disruption that causes the errors, the Bus Controller could remain
off the bus indefinitely. During the entire time the Bus Controller is off the bus:
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Important Product Information
GFK-0363AF
1.
The BUS LED is off.
2.
Devices with outputs do not receive output data because the Bus Controller stops sending output data. Output devices
that are configured to default their outputs do so.
3.
The Bus Controller does not receive input data from bus devices.
4.
The Bus Controller does not send or receive global data.
5.
Loss of device, Addition of device, and Extra device faults are suppressed.
6.
All bus devices are marked INACTIVE in the 4-byte (32-bit) bit field structure at offset 7E8 Hex. in VME memory.
There are two unexpected consequences from this mode of operation:
1.
Input data retains its last received state during the entire time the Bus Controller is off the bus. Inputs from devices that
are configured to default inputs are NOT defaulted.
2.
When the Bus Controller returns to the bus, any devices that were previously active but that were lost while the Bus
Controller was off the bus are NOT reported as lost. Inputs from lost devices that are configured to default inputs are
NOT defaulted.
Similarly, any devices that were NOT active before the Bus Controller went off the bus but that were added while the
Bus Controller was off the bus are NOT reported as added or extra. The loss/addition of device condition for these
devices remains undetected until either a hardware configuration is stored to the PLC, or the Bus Controller is restarted
by cycling power on either the main PLC rack or (if so configured) the expansion rack where the Bus Controller is
installed.
WARNING
These consequences can potentially cause bodily injury, property damage, or both, depending on the
application. Users of GBC firmware version 5.8 and earlier versions are advised to avoid this safety issue
either by upgrading to version 5.9 or by setting the Error Rate item in the GBC hardware configuration to
0 (zero).
Firmware Version 5.9 changes the way the Bus Controller operates during excessive bus faults conditions. In version 5.9:
1.
The Bus Controller does not drop off the bus. It continues to receive messages, including input data, from devices on
the bus. Note that input data received during excessive bus faults conditions may be corrupted by undetected bus errors.
2.
Outputs are disabled on all bus devices that have outputs for the duration of the excessive bus faults condition. Output
devices that are configured to default their outputs do so.
3.
The Bus Controller keeps track of loss and addition of bus devices. However, Loss/Addition/Extra device faults are
NOT reported as long as the excessive bus faults condition continues. Note that devices may be lost temporarily
because of the communications disruption that caused the excessive bus faults condition. Whenever a device that is
configured for inputs defaulted OFF is lost, the inputs for that device are defaulted. If the device is subsequently added
to the bus, input data from the device replaces the defaults. During an extended excessive bus faults condition, input
data may periodically toggle between the actual and default states.
4.
The byte at offset 7FA hexadecimal in VME memory contains the value 1 during excessive bus faults conditions and
the value 0 (zero) at all other times. PLC applications can monitor the status of excessive bus faults conditions by using
a VME_READ/BUS_READ function block to read this byte.
5.
The 32-bit (4-byte) bit field structure at offset 7E8 hexadecimal in VME memory changes dynamically to indicate
whether bus devices are active or not. These bits are updated during excessive bus faults conditions and at all other
times. For example, the most significant bit in the byte at offset 7E8 (corresponding to Serial Bus Address = 7) is set to
1 when the device at that address is active and to 0 (zero) when the device at that address is not active. PLC
applications can monitor the status of individual bus devices during excessive bus faults conditions by using a
VME_READ/BUS_READ function block to read these bytes.
Important Product Information
3
GFK-0363AF
Firmware Version 5.9 also changes the way the Bus Controller operates at the end of excessive bus faults conditions. In
version 5.9:
1.
When a bus disturbance ends and no more bus errors occur, the Bus Controller exits from an excessive bus faults
condition within ¾ second of the end of the disturbance. Bus disturbances that occur in bursts with quiet intervals
greater than ¾ second between them can cause multiple excessive bus faults conditions to occur frequently. Bursts with
quiet intervals less than ¾ second can extend a single excessive bus faults condition indefinitely.
2.
At the end of excessive bus fault conditions, the Bus Controller reports a Loss of device fault for every device that was
active at the start of the bus disturbance but was not active at the end. The Bus Controller also reports Addition of
device or Extra device faults (as appropriate) for devices that were not active at the start of the disturbance but were
active at the end.
Firmware Version 5.9 does not change the following:
1.
The BUS LED is off during excessive bus faults conditions.
2.
The Bus Controller does not send or receive global data during excessive bus faults conditions.
3.
Loss of device, Addition of device, and Extra device faults are suppressed during excessive bus faults conditions.
Operating Notes
Communications Window Time For Internally-Redundant Bus Controllers. Operation of internally-redundant Bus
Controllers in the same PLC relies on backplane communications between the Bus Controllers. When a PLC hardware
configuration includes one or more pairs of internally-redundant Bus Controllers, the Backplane (or System) Communications
Window Mode for the CPU should be set to Complete. When the CPU is configured for constant sweep mode, the specified
sweep time must be long enough to assure that communications between the Bus Controllers will occur without delays.
Depending on the CPU model, communication times from one to six milliseconds are recommended.
BSMs and Bus Error Rate Configuration: If the bus includes any Bus Switching Module(s), the Bus Error Rate must be set to
zero. This keeps the Bus Controller from dropping off the bus while the BSMs are switching.
Input Defaults: If the Bus Controller loses communications with a device on the bus, the Bus Controller continues supplying
“input” data for that device to the PLC. The content of that data depends on the device type:
A. Discrete block, PowerTRAC block or Remote I/O Scanner: Inputs may either default or hold last state, as configured.
B. Analog block or High-speed Counter: Inputs automatically hold last state.
C. Global data: Automatically defaults to off.
Queuing Fault Information: If a large number of faults (45 or more) occurs simultaneously, some faults may be lost. This is
most likely to be caused by the sudden loss of numerous blocks at each bus controller in the system. The resulting PLC
diagnostics and diagnostic contacts may be incorrect.
Impact on PLC Sweep Time when Adding or Losing Bus Devices: If a number of bus devices are lost or added at the same
time, it can cause a PLC’s watchdog timer to expire, shutting down the PLC. For example, I/O blocks that do not use the same
power source as the PLC might all lose power during the same CPU sweep, while the PLC kept operating. When power was
restored, the blocks might all return to the system during the same CPU sweep. When calculating CPU sweep time, include the
following steps:
1.
Determine the maximum number of devices on all busses in the system that might be lost or added in the same PLC
sweep period.
2.
Find the “Asynchronous Events Fault Message” time listed for the type of CPU in the system. Multiply this time by
the number of devices that might be added or lost together.
3.
Add the total to the worst case PLC sweep time. Set the PLC sweep timeout period above this value.
Downloading a Configuration When the Bus is Damaged: If you download a configuration to the Bus Controller while
the bus is broken, shorted, or otherwise damaged, it may be necessary to cycle power to the Bus Controller for it to function.
If the bus is known to be corrupted, do not download a configuration.
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Important Product Information
GFK-0363AF
Repeated Power Cycles to Main Rack May Cause Loss of Bus Controller in Expansion Rack. Using the same power
source for the main rack and expansion rack switching them on and off together will usually prevent this.
Read/Write Device Rejection: This Bus Controller will ignore any incoming Read or Write Device datagrams sent using
the routing parameter FE (hex) in byte 0. This byte is designated as “reserved” in the datagram descriptions in the Genius
I/O System User’s Manual. For a Bus Controller to use this capability, datagrams must be sent with the Send Datagram
command. Please refer to the Bus Controller User’s Manual for instructions.
Checking COMREQ Status for Send Datagrams: When using the Send Datagrams command (COMMREQ 14),
permissive logic should be used to test the COMREQ status before sending the request. Otherwise, the Bus Controller may
reset. Alternatively, COMREQ 12 (Write Device) can be used instead of COMMREQ 14.
Document Correction
Description: In some versions of the Bus Controller User’s Manual, there are mistakes in the programming example that
illustrates the use of COMMREQs. The Status Pointer Offset given in the example would cause the Status Block to overlap
the start of the Command Block.
Recommendation: If necessary, correct the Status Pointer Offset example in your manual. In two logic illustrations, and in
the table showing the Command Block contents, change the value in %R0103 to 97. The two-word Status Block would then
use %R0098 and %R0099, avoiding conflict with the Command Block which begins at %R0100.
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