HDMI_RX_HSMC

1

HDMI_RX_HSMC

Terasic HDMI Video Receiver Daughter Board

User Manual

CONTENTS

Chapter 1

Introduction

.......................................................................................................................... 2

1.1 About the KIT ....................................................................................................................................................... 2

1.2 Assemble the HDMI_RX_HSMC Board .............................................................................................................. 3

1.3 Getting Help .......................................................................................................................................................... 4

Chapter 2 Features .............................................................................................................................. 6

2.1 Features ......................................................................................................................................................... 6

2.2 Layout and Components ....................................................................................................................................... 8

2.3 Block Diagram of HDMI Signal Receiving .......................................................................................................... 9

2.4 Generate Pin Assignments .................................................................................................................................. 11

2.5 Pin Definition of HSMC Connector .................................................................................................................... 12

Chapter 3

Demonstration

................................................................................................................... 18

3.1 Introduction ......................................................................................................................................................... 18

3.2 System Requirements.......................................................................................................................................... 18

3.3 Setup the Demonstration ..................................................................................................................................... 19

3.4 Operation ........................................................................................................................................................ 19

Chapter 4

Case Study

........................................................................................................................ 22

4.1 Overview ......................................................................................................................................................... 22

4.2 System Function Block ....................................................................................................................................... 22

4.3 Nios Program ...................................................................................................................................................... 25

Chapter 5

Appendix

............................................................................................................................ 29

5.1 Revision History ................................................................................................................................................. 29

5.2 Always Visit HDMI_RX_HSMC board Webpage for Update ............................................................................ 29

1

Chapter 1

Introduction

HDMI_RX_HSMC is a HDMI receiver daughter board with HSMC (High Speed Mezzanine

Connector) interface. Host boards, supporting HSMC-compliant connectors, can control the HDMI daughter board through the HSMC interface.

This HDMI_RX_HSMC kit contains complete reference design with source code written in Verilog and C, for HDMI signal receiving. Based on reference design, users can easily and quickly develop their applications.

1 .

.

1 A b o u t t h e K

I

I T

This section describes the package content.

The HDMI_RX_HSMC package, as shown in

Figure 1-1

, contains:

HDMI_RX_HSMC board x 1

System CD-ROM x 1

The CD contains technical documents of the HDMI receiver, and one reference design for HDMI receiving with source code.

2

Figure 1-1 HDMI_RX_HSMC Package

1 .

.

2 A s s e m b l l e t h e H D M

I

I _ R X _ H S M C B o a r d

This section describes how to connect the HDMI_RX_HSMC daughter board to a main board, and uses DE4 as an example.

The HDMI_RX_HSMC board connects to main boards through the HSMC interface. For DE4, the

HDMI_RX_HSMC daughter board can be connected to any one of the two HSMC connectors on

DE4.

Figure 1-2

shows a HDMI_RX_HSMC daughter board connected to the HSMC connector of DE4.

Due to high speed data rate in between, users are strongly recommended to screw the two boards together.

3

Figure 1-2 Connect HDMI_RX_HSMC daughter board to DE4 board

Note. We need to use the THCB-HMF2 card in between to make the HDMI_RX_HSMC daughter board connected to the HSMC connector of DE4. The photo of the THCB-HMF2 card is shown in

Figure 1-3.

Figure 1-3 THCB-HMF2 card

1 .

.

3 G e t t i i n g H e l l p

Here are some places to get help if you encounter any problem:

4

Email to [email protected]

Taiwan : +886-3-550-8800

China : +0086-13971483508

Korea : +82-2-512-7661

English Support Line: +1-408-512-12336

5

Chapter 2

Features

This chapter will illustrate technical details of HDMI_RX_HSMC board.

2 .

.

1

F e a t u r e s

This section describes the major features of the HDMI_RX_HSMC board.

Board Features:

One HSMC interface for connection purpose

One HDMI receiver with dual receiving ports

Two 2K EEPROM for storing EDID of two receiver ports separately

Powered by 3.3V power pins of HSMC connector

HDMI Receiver Features:

1. Dual-Port HDMI 1.4 receiver, Pin compliant with CAT6023

2. Compliant with HDMI 1.3, HDMI 1.4a 3D, HDCP 1.4 and DVI 1.0 specifications

3. Supporting link speeds up to 2.25 Gbps (link clock rate of 225MHZ)

4. Supporting diverse 3D formats which are compliant with HDMI 1.4a 3D specification.

Supporting 3D video up to [email protected]/24/30Hz, [email protected]/59.94/60/Hz,

[email protected]/59.94/60Hz

Supporting formats: framing packing, side-by-side ( half ), top-and-bottom.

5. Various video input interface supporting digital video standards such as:

24/30/36-bit RGB/YCbCr 4:4:4

6

16/20/24-bit YCbCr 4:2:2

8/10/12-bit YCbCr 4:2:2 (ITU BT-656)

12/15/18-bit double data rate interface (data bus width halved, clocked with both rising and falling edges) for RGB/YCbCr 4:4:4

24/30/36-bit double data rate interface (full bus width, pixel clock rate halved, clocked with both rising and falling edges)

Input channel swap

MSB/LSB swap

6. Bi-direction Color Space Conversion (CSC) between RGB and YCbCr color space with programmable coefficients

7. Up/down sampling between YCbCr 4:4:4 and YCbCr 4:2:2

8. Dither for conversion from 12-bit/10-bit to component to 10-bit/8-bit

9. Support Gammat Metadata packet

10. Digital audio output interface supporting:

Up to four I2S interface supporting 8-channel audio, with sample rates of 32~192 kHz and sample accuracy of 16~24 bits

S/PDIF interface supporting PCM, Dolby Digital, DTS digital audio at up to 192kHz frame rate

Optional support for 8-channel DSD audio up to 8 channels at 88.2kHz sample rate

Support for high-bit-rate (HBR) audio such as DTS-HD and Dolby TrueHD through the four I2S interface or the S/PDIF interface, with frame rates as high as 768kHz

Automatic audio error detection for programmable soft mute, preventing annoying harsh output sound due to audio error or hot-unplug

11. Auto-calibrated input termination impedance provides process-, voltage- and temperature-invariant matching to the input transmission lines

12. Integrated pre-programmed HDCP keys

13. Intelligent, programmable power management

7

2 .

.

2 L a y o u t a n d C o m p o n e n t s

The photos of the HDMI_RX_HSMC board are shown in

Figure 2-1

and

Figure 2-2

. They indicate

the location of the connectors and key components.

Figure 2-1 HDMI receiver on the front of the HDMI_RX_HSMC board

8

Figure 2-2 On the back of the HDMI_RX_HSMC board with HSMC connector

The HDMI_RX_HSMC board includes the following key components:

Receiver (U3)

Receiver port 0/1 (J1/J2)

27MHZ OSC (Y1)

HSMC expansion connector (J3)

Receiver I2C EEPORM (U2/U4)

RX Regulator (REG1/U6)

Level shifter (U1)

2 .

.

3

B l l o c k D i i a g r a m o f f H D M I S i i g n a l l

R e c e i i v i i n g

This section describes the block diagram of HDMI signal receiving.

Figure 2-3

shows the block diagram of HDMI signal receiving. Please refer to the schematic

included in the CD for more details. The HDMI receiver is controlled through the I2C interface, where the host works as master and the transmitter works as a slave. Because the pin PCADR is pulled low, the transmitter I2C device address is set to 0x90. Through the I2C interface, the host board can access the internal registers of receiver to control its behavior. The receiver can support two receiving ports, but only one port can be activated at the same time.

9

Figure 2-3 Block diagram of HDMI signal receiving

The host can use the reset pin RX_RST_N to reset the receiver, and listen to the interrupt pin

RX_INT_N to detect change of the receiver status. When interrupt happens, the host needs to read the internal register to find out which event is triggered and perform proper actions for the interrupt.

Here are the steps to control the receiver:

1. Reset the receiver from the RX_RST_N pin

2. Read the EEPROM (EDID) to check whether the EEPROM contents need to be updated.

When writing data to EEPROM, remember to pull-low the EEPROM write protection pin

EDID_WP(please refer to the part schematic of the EEPROM circuit). Finally, make sure

EDID_WP is pulled high and configure the both I2C pins as input pins, so the attached HSMC source device can read the EDID successfully

3. Initialize the receiver through the I2C interface

4. Pull-Low the RX1_HPD_N and RX2_PHD_N pins to enable HPD pins of receiving ports

5. Set receiver port 1 as active port

6. Polling the interrupt pin RX_INT_N. Switch to another receiver port every three seconds and

10

activate it if no HDMI source device found on the current active port

If a HDMI source device is detected:

Perform HDCP authentication

Read the input video format, including color space and color depth

Configure input and output color space

2 .

.

4 G e n e r a t e P i i n A s s i i g n m e n t s

This section describes how to automatically generate a top-level project, including HDMI pin assignments.

Users can easily create the HDMI_RX_HSMC board pin assignments by utilizing the Terasic

System Builder (Please visit http://www.terasic.com.tw/en/ to download the latest version of System

Builder). Here are the procedures to generate a top-level project for HDMI_RX_HSMC.

Launch Terasic System Builder(from the following path on the HDMI_RX system

CD:HDMI_RX_Tool\DE4_SystemBuilder.exe)

Select CLOCK,LED x 8,Button x 4

Select HDMI TX and HDMI RX on the HSMC Expansion options, which is shown in

Figure 2-4

Input desired pin Prefix Name in the dialog of DE4 Configuration

11

Figure 2-4 Select the DE4 Board

Click “Generate” to generate the desired top-level and pin assignments for a HDMI project.

2 .

.

5 P i i n D e f f i i n i i t i i o n o f f H S M C C o n n e c t o r

This section describes pin definition of the HSMC interface onboard.

All the control and data signals of HDMI receiver are connected to the HSMC connector, so users can fully control the HDMI_RX_HSMC daughter board through the HSMC interface. Power is derived from 3.3V and 12V pins of the HSMC connector.

Figure 2-5

shows the physical pin

location and signal name on the HSMC connector.

12

13

14

Figure 2-5 HSMC Connector of HDMI_RX_HSMC board

Table 2-1

below lists the HSMC signal direction and description.

Note. The power pins are not shown in the table.

15

Signal Name

HSMC_SDA

HSMC_SCL

RX_RST_n

EDID_WP_n

RX_SCDT

RX1_CEC

RX_INT_n

RX1_HPD_n

RX_RD11

RX_MUTE

RX_RD10

RX_DSD

RX_RD9

RX_SPDIF

RX_RD8

RX_I2S0

RX_RD7

RX_WS

RX_RD6

RX_I2S3

RX_RD5

RX_I2S2

RX_RD4

RX_I2S1

RX_RD3

RX0_HPD_n

RX_RD2

RX0_CEC

Table 2-1 The HSMC pin definition of the HDMI_RX_HSMC board

Pin NO.

33

34

55

56

59

60

61

62

65

66

73

74

77

78

67

68

71

72

91

92

RX_MCLK

RX_SCK

RX_RD1

RX_PCSCL

96

98

101

102

RX_RD0

RX_PCSDA

103

104

RX_GD11 107

RX_EVENODD 108

79

80

83

84

85

86

89

90 input input

Input inout

Input inout

Input input

Direction

(FPGA

View)

inout output input output input inout input output

Input input

Input input

Input input

Input input

Input input

Input input

Input input

Input input

Input output

Input inout

Description

I2C serial data for on-board EEPROM

I2C serial clock for onboard EEPROM

Hardware reset pin. Active LOW

EEPROM Write Protection(active high)

Indication for active HDMI signal at input port

CEC (Consumer Electronics Control) for HDMI Port

1

Interrupt output. Default active-low

Enable Hardware Plug Detection for HDMP Port 1,

Low Active

Digital Video Input Pins

Mute output, doubles as DSD Serial Right CH3 data output

Digital Video Input Pins

DSD Serial Left CH3 data output

Digital Video Input Pins

S/PDIF audio output, doubles as DSD Serial Left

CH2 data output

Digital Video Input Pins

I2S serial data output, doubles as DSD

Digital Video Input Pins

I2S word select output, doubles as DSD Serial Right

CH0 data output

Digital Video Input Pins

I2S serial data output, doubles as DSD

Digital Video Input Pins

I2S serial data output, doubles as DSD

Digital Video Input Pins

I2S serial data output, doubles as DSD

Digital Video Input Pins

Enable Hardware Plug Detection for HDMP Port 0,

Low Active

Digital Video Input Pins

CEC (Consumer Electronics Control) for HDMI Port

0

Audio master clock

I2S serial clock output, doubles as DSD clock

Digital Video Input Pins

Serial Programming Clock for chip programming

Digital Video Input Pins

Serial Programming Data for chip programming

Digital Video Input Pins

Indicates whether the current field is Even or Odd

16

RX_GD10

RX_VS

RX_GD9

RX_HS

RX_GD8

RX_DE

RX_GD7

RX_BD0

RX_GD6

RX_BD1

RX_GD5

RX_BD2

RX_GD4

RX_BD3

RX_GD3

RX_BD4

RX_GD2

RX_BD5

RX_GD1

RX_BD6

RX_GD0

138

139

RX_BD7 140

RX0_DDC_SCL 143

RX_BD11 144

RX0_DDC_SDA 145

RX_BD10 146

RX1_DDC_SCL 149

122

125

126

127

128

131

132

133

134

137

RX_BD9 150

RX1_DDC_SDA 151

RX_BD8

RX_PCLK

152

156

109

110

113

114

115

116

119

120

121

Input

Input

Input inout

Input inout input input

Input

Input

Input

Input

Input

Input

Input

Input

Input

Input input inout input input

Input output

Input output

Input input

Input

Input

Input for interlaced format

Digital Video Input Pins

Vertical sync. signal

Digital Video Input Pins

Horizontal sync. signal

Digital Video Input Pins

Data enable

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

Digital Video Input Pins

DDC I2C Clock for HDMI Port 0

Digital Video Input Pins

DDC I2C Data for HDMI Port 0

Digital Video Input Pins

DDC I2C Clock for HDMI Port 1

Digital Video Input Pins

DDC I2C Data for HDMI Port 1

Digital Video Input Pins

Output data clock.

17

Chapter 3

Demonstration

This chapter illustrates the video/audio demonstration for the HDMI_RX_HSMC board. Users may modify the reference design for various purposes accordingly.

3 .

.

1

I

I n t r o d u c t i i o n

This section describes the functionality of the demonstrations briefly.

This demonstration shows how to use DE4 to control the HDMI_RX_HSMC board.

The demonstration includes:

Loopback HDMI_RX to HDMI_TX:

Loopback (internal bypass) the HDMI Video and Audio Signals. The audio and video output pins of the receiver are directly connected to the input audio and video pins of the transmitter.

3 .

.

2 S y s t e m R e q u i i r e m e n t s

The following items are required for Loopback HDMI_RX to HDMI_TX demonstration.

Loopback HDMI_RX to HDMI_TX

HDMI_RX_HSMC board x 1

HDMI_TX_ HSMC board x 1

DE4 Board x 1

LCD monitor with at least one HDMI input x 1

HDMI Source Device x 1

HDMI Cable x 2

THCB-HMF2 board x2

18

3 .

.

3 S e t u p t h e D e m o n s t r a t i i o n

Figure 3-1

shows how to setup hardware for Loopback HDMI_RX to HDMI_TX demonstration.

Figure 3-1 Loopback HDMI_RX to HDMI_TX Demonstration Setup

3 .

.

4

O p e r a t i i o n

This section describes the procedures of running the demonstrations.

FPGA Configuration

Please follow the steps below to configure the FPGA.

Make sure hardware setup is completed

Connect PC with DE4 via a USB cable

Power on DE4

Make sure Quartus II has been installed on your PC

Execute the batch file hdmi_demo.bat under the folder

“HDMI_RX_Demonstration\DE4_230_HDMI_TX_RX\demo batch”(for the Loopback demonstration)

19

Internal Loopback HDMI_RX to HDMI_TX

Note. Do not attempt to connect/remove the HSMC_HDMI daughter board to/from the main board when the power is on, or the hardware could be damaged.

After FPGA is configured, please follow the steps below to run the Loopback HDMI_RX to

HDMI_TX demonstration.

Connect the HDMI LCD and the HDMI TX port with a HDMI Cable

Power on the LCD monitor and make sure the LCD monitor is set to the mode where

HDMI input is the source

Connect the HDMI source device and HDMI RX port on the HDMI_RX_HSMC board with a HDMI Cable

Power on the HDMI source device and make sure its HDMI port is selected as the output

Users will be able to see the video displayed on the LCD monitor and hear the sound, if there is a speaker built-in

Users can change the RX port connected to the HDMI source device. The demonstration can automatically detect the RX port and activate it

Figure 3-2

shows the Nios II program trace log when a HDMI LCD source device is detected. It indicates the input video resolution is 1280 x 720 (VIC=4) with color space RGB444 and 36-bits color depth.

Both input color and output color of the receiver and transmitter are configured as RGB444. In another words, the color format doesn’t change from the source to the LCD monitor during the loopback process. The output color depth of the transmitter is configured as 24-bits.

20

Figure 3-2 Nios II program trace log of Loopback HDMI_RX to HDMI_TX demonstration

21

Chapter 4

Case Study

This chapter describes the design concepts for the Loopback HDMI_RX to HDMI_TX demonstration in the previous chapter.

4 .

.

1 O v e r v i i e w

This section describes the overview of the reference design.

This reference design shows how to use DE4 to control HDMI_RX_HSMC board. Please refer to the previous chapter for the demonstration of this reference design.

The source code of the reference design can be found under the directory of Examples folder in the

CD of the HDMI_RX_HSMC board. The demonstration includes the following function:

Loopback HDMI_RX to HDMI_TX:

Loopback (internal bypass) the HDMI Video and Audio Signals. The audio and video output pins of the receiver are directly connected to the input audio and video pins of the transmitter.

4 .

.

2

S y s t e m F u n c t i i o n B l l o c k

This section will describe the system behavior in function blocks.

Figure 4-1

shows the system function block diagram of this demonstration. In the design, SOPC is

included because Nios II processor is used to control receiver through I2C interface. The Nios II program is designed to run on the on-chip memory.

The source selector circuit is designed to select the desired video source between the video pattern generator and the video from the receiver. Four LEDs on DE4 are used for human interface. LEDs

are designed to indicate the HDMI status, which is illustrated in

Table 4-1

. BUTTONs are designed

to change the video format and color space of the build-in video pattern generator, which is illustrated in

Table 4-2

22

LED

Figure 4-1 System Function Block Diagram

Table 4-1 LED Indications

Description

System is running.

HDMI sink device is detected and synchronized.

HDMI source device is detected and synchronized.

23

BUTTON

Table 4-2 Button Operation Definition

Description

Press to change active video format of the built-in video pattern generator.

Press to change active video color space of the built-in video pattern generator.

Receiver Controlled by Nios II Processor

The receiver is controlled by Nios II program through I2C interface. Based on I2C protocol, the

Nios II program can read/write the internal registers of the receiver, and control the behavior of the receiver. The revision number of receiver is either A1 or A2, which can be determined by querying the register 4 of receiver.

The major differences between both revisions are:

1. Receiver initialization process

2. Video synchronization process

Please search the global variable “Is_A2” in it6605.c for detail information.

The Nios II program controls the receiver to perform the following procedures step by step:

Initialize the HDMI receiver chip

Detect if a HDMI source device is attached or detached

Select one of the receiving ports and activate it

Read and parse the EDID content to find the capability of the HDMI source device. The capability includes supported color space, video format (VIC code), and color depth etc

Perform HDCP authentication

Report the input video (VIC) and audio format of the attached HDMI source device

Configure the color space of input and output. The receiver can provide color space transformation

Video Source Selector

The source selector is implemented using Megafunction LPM_MUX.

24

4 .

.

3 N i i o s P r o g r a m

This section describes the design flow and how Nios II processor controls receiver.

Figure 4-2

shows the software stack of the Nios II program. The I2C block implements the I2C

read/write functions based on GPIO system call. The HDMI receiver block is referred as the HDMI driver. The HDMI receiver chip is managed and controlled through the I2C protocol.

Figure 4-2 Software Stack

Figure 4-3

shows the file list of the Nios II program. The control center is located in main.c. The

beep.c includes audio raw data for generating a tone sound. The folder named terasic_lib includes the I2C driver. The folder named HDMI_Lib includes transmitter and receiver drivers. The platform-dependent functions are located in mcu.c under HDMI_Lib.

25

Figure 4-3 Nios II Program File List

26

System Configuration

To use the HDMI library in Nios II, the const _MCU_ should be defined in the configuration

settings, as shown in

Figure 4-4

. Two on-chip memories are created to store the Nios II program

and data separately. The size of each on-chip memory is 128 K bytes. One on-chip memory is used to store program and the other one is used to store data. The option “Small C Library” must be

enabled to reduce the size of the program. The associated configuration is shown in

Figure 4-5

Figure 4-4 Define _MCU_ constant

27

Figure 4-5 Configuration of System Library

Audio Test

If users would like to test audio during HDMI transmitting-only mode, please remove the constant definition TX_VPG_COLOR_CTRL_DISABLED from main.c. Users will hear a tone sound from the built-in speaker of HDMI LCD monitor when pressing BUTTON1 of DE4 board.

28

Chapter 5

Appendix

5 .

.

1 R e v i i s i i o n H i i s t o r y

Revision Date

1.0 NOV 02 2010

1.1

1.2

FEB 11 2011

MAR 9 2011

Change Log

Initial Version

Change the EDID_WP descriptions

Update to HDMI 1.4

5 .

.

2 A l l w a y s V i i s i i t H D M

I

I _ R X _ H S M C b o a r d W e b p a g e f f o r u p d a t e

We will be continuing providing interesting examples and labs on our HDMI_RX_HSMC board web page. Please visit www.altera.com

or hdmi_1.4_rx.terasic.com

for more information.

29

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