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MG2639_V2 Module Hardware Design
User Manual
Version:V1.1
Copyright Statement
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This product conforms to the design requirements of relevant environment protection and personal safety. The storage, usage and disposal of this product should comply with the product user manual, relevant contracts or requirements of laws and regulation in relevant countries.
ZTE Corporation keeps the right to modify or improve the product described in the manual without prior notice; and meanwhile keeps the right to modify or retract this manual.
If there is anything ambiguous in this manual, please consult ZTE Corporation or its distributor or agent promptly.
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第 I 页
Version update description
Product version Document version
MG2639_V2 V1.1
Writer
Document version Date
1.1 2012-8-23
Document No. Document update descriptions
Released for the first time
Written by
Liu Yang/Zhu Ying
Requested by Approved by
第 II 页
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With strong technical force, ZTE Corporation can provide CDMA/GPRS/WCDMA/GSM module customers with the following all-around technical support:
1. Provide complete technical documentation;
2. Provide the development board used for R&D, test, production, after-sales, etc.
3. Provide evaluations and technical diagnosis for principle diagram, PCB, test scenarios;
4. Provide test environment;
ZTE Corporation provides customers with onsite supports, and also you could get supports through telephone, website, instant messenger, E-mail, etc.
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第 III 页
Preface
Summary
This document introduces MG2639_V2 module’s product principle diagram, PINs, hardware interface and module’s mechanical design, which can instruct the users how to quickly and conveniently design different kinds of wireless terminals based on this type of module.
Target Readers
This document mainly applies to the following engineers:
System designing engineers
Mechanical engineers
Hardware engineers
Software engineers
Test engineers
第 IV 页
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Contents
2 DESCRIPTIONS OF MODULE’S EXTERNAL INTERFACES .................................................. 6
3.1 DESCRIPTIONS OF LEVELS OF INTERFACE SIGNALS ............................................... 12
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Figures
Tables
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第 VII 页
1
General description of module
With 30-PIN stamp-hole interface, MG2639_V2 module developed by ZTE Corporation is a kind of GSM850/EGSM900/DCS1800/PCS1900 industrial module, which can be built in the Set-Top-Box, vehicle-mounted terminals, and enable users to get access to the Internet wirelessly and send/receive
Emails, browse the web pages, download at high speed, etc.
It enables users to get access to the Internet any time in a place where the GSM network is covered. It also features in SMS, voice call, etc. and provides highly free and convenient solutions for users in mobile data communication, and truly realizes the dream of mobile office.
This chapter mainly provides a general description of the module, including basic functions and logic block diagram.
1.1 Introduction of module’s functions
See the functions of MG2639_V2 module in table 1-1:
Table 1-1 Module’s functions
Parameter
Frequency Bands
Dimensions
Weight
Operating Temperature Range
Storage Temperature Range
Operating Voltage Range
Standard power consumption
Max. TX Power
Rx. Sensitivity
Connector
Antenna
MG2639_V2
General Features
GSM850/EGSM900/DCS1800/PCS1900
30.0×25.0x2.68mm
7g
-30°C~+70°C
-40°C~+85°C
Performance
3.4V~4.25V/Typical: 3.8V
Standby Current: 2mA@-75dBm
Talk Current: 128mA@-75dBm
Max. Current: 300mA@-104dBm
GSM850/EGSM900: Class 4 (2W)
DCS1800/PCS1900: Class 1 (1W)
<-107dBm
Interfaces
30Pin Stamp-hole
SMT 50Ω Antenna Connector
Integrated Full Duplex UART
SIM Card Interface
AT commands/Data transmission
1.8V/3.0V
Data Features
GPRS Class 10
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第 1 页
Parameter
Mobile Station
Max Downlink
Max Uplink
Protocol
MG2639_V2
Class B
85.6kbps
42.8kbps
Internal TCP/IP&UDP
Embedded FTP
SMS
Support TEXT/PDU Mode
Point-to-point MO/MT
SMS Cell Broadcast
Voice call
Vocoders HR/FR/EFR/AMR
Echo Cancellation/Volume Control/DTMF
AT Command Set
GSM 07.05/GSM 07.07/ZTE Proprietary AT Commands
1.2 Module’s principle diagram
See the application block diagram of MG2639_V2 in figure 1-1:
Figure 1-1 Module’s application block diagram
第 2 页
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1.3 Abbreviations
A
ADC
CDMA
CDG
CS
CSD
CPU
D
DAI
DAC
DCE
AFC
AGC
ARFCN
ARP
ASIC
B
BER
BTS
C
Analog-Digital Converter
Automatic Frequency Control
Automatic Gain Control
Absolute Radio Frequency Channel Number
Antenna Reference Point
Application Specific Integrated Circuit
Bit Error Rate
Base Transceiver Station
Code Division Multiple Access
CDMA Development Group
Coding Scheme
Circuit Switched Data
Central Processing Unit
Digital Audio interface
Digital-to-Analog Converter
Data Communication Equipment
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第 3 页
LED
M
MCU
MMI
MS
MTBF
P
PCB
PCL
PCS
H
HR
I
IC
IMEI
ISO
ITU
L
LCD
EMI
ESD
ETS
F
FDMA
FR
G
GPRS
GSM
DSP
DTE
DTMF
DTR
E
EDGE
EFR
EGSM
EMC
PDU
PLL
PPP
R
RAM
RF
ROM
RMS
RTC
S
SIM
SMS
SMT
第 4 页
Digital Signal Processor
Data Terminal Equipment
Dual Tone Multi-Frequency
Data Terminal Ready
Enhanced Data Rate for GSM Evolution
Enhanced Full Rate
Enhanced GSM
Electromagnetic Compatibility
Electro Magnetic Interference
Electronic Static Discharge
European Telecommunication Standard
Frequency Division Multiple Access
Full Rate
General Packet Radio Service
Global Standard for Mobile Communications
Half Rate
Integrated Circuit
International Mobile Equipment Identity
International Standards Organization
International Telecommunications Union
Liquid Crystal Display
Light Emitting Diode
Machine Control Unit
Man Machine Interface
Mobile Station
Mean Time Before Failure
Printed Circuit Board
Power Control Level
Personal Communication System
Protocol Data Unit
Phase Locked Loop
Point-to-point protocol
Random Access Memory
Radio Frequency
Read-only Memory
Root Mean Square
Real Time Clock
Subscriber Identification Module
Short Message Service
Surface Mount Technology
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SRAM
T
TA
TDMA
TE
U
UART
UIM
USB
USIM
V
VSWR
Z
ZTE
Static Random Access Memory
Terminal adapter
Time Division Multiple Access
Terminal Equipment also referred it as DTE
Universal asynchronous receiver-transmitter
User Identifier Management
Universal Serial Bus
Universal Subscriber Identity Module
Voltage Standing Wave Ratio
ZTE Corporation
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2
Descriptions of module’s external interf aces
MG2639_V2 module adopts a 30PIN stamp-hole connector for the external connections.
2.1 Definitions of module’s interfaces
See the definitions of the 30PIN stamp-hole of MG2639_V2 module below:
Table 2-1 30Pin stamp-hole definition
No. Classification Definition I/O Description
1 GND GND Ground
2
3
4
5
6
ANT
GND
UART
GND
POWER
RF_ANT
GND
RING
GND
VBAT
DC feature
I/O RF antenna plug
Ground
O
Ring signal indication
Ground
V
ILmax
=0.25*VDDIO,V
IHmin
=0.75*VDDIO,
V
OLmax
=0.15*VDDIO,V
OHmin
=0.85*VDDIO
, output driver capability is 4mA.
I Work voltage
Vmin=3.4V,Vmax=4.25v,
Typical=3.9V
7 Other RSSI_LED O
Network signal indication
Remarks
The voltage varies upon an incoming call or receipt of text message.
Internal pull-down, drive at high level. For details, please refer to
3.1.5.
8 UART RTS1 O Ready to send
V
ILmax
=0.25*VDDIO,V
IHmin
=0.75*VDDIO,
第 6 页
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9
10
11
12
13
14
15
16
17
18
19
20
21
UART
UART
UART
UART
SIM
SIM
UART
UART
POWER
AUDIO
AUDIO
AUDIO
AUDIO
CTS1
DCD1
SIM_RST
SIM_CLK
SIM_DATA
VSIM
RXD1
TXD1
I
O
O
O
I
O
Clear to send
O Carrier detection
SIM card reset
SIM card clock
I/O SIM card data
SIM card voltage
Receive through
First group of ports
Transmit through first group of ports
V
OLmax
=0.15*VDDIO,V
OHmin
=0.85*VDDIO
V
ILmax
=0.25*VDDIO,V
IHmin
=0.75*VDDIO,
V
OLmax
=0.15*VDDIO,V
OHmin
=0.85*VDDIO
V
ILmax
=0.25*VDDIO,V
IHmin
=0.75*VDDIO,
V
OLmax
=0.15*VDDIO,V
OHmin
=0.85*VDDIO
3.0V SIM card:
V
OLmax
=0.36V,V
OHmin
=0.9*VSIM;
1.8V SIM card:
V
OLmax
=0.2*VSIM,V
OHmin
=0.9*VSIM;
3.0V SIM card:
V
OLmax
=0.4V,V
OHmin
=0.9*VSIM
1.8V SIM card:
V
OLmax
=0.12*VSIM,V
OHmin
=0.9*VSIM;
3.0V SIM card:
V
ILmax
=0.4V,V
IHmin
=0.9*VSIM,
V
OLmax
=0.4V,V
OHmin
=0.9*VSIM
1.8V SIM card:
V
ILmax
=0.15*VSIM,V
IHmin
=VSIM-0.4,
V
OLmax
=0.15*VSIM,V
OHmin
= VSIM-0.4
3.0V SIM card:
Vmax==3.15V,Vmin=2.9V,
1.8V SIM card:
Vmax==1.9V,Vmin=1.71V,
V
ILmax
=0.25*VDDIO,V
IHmin
=0.75*VDDIO,
V
OLmax
=0.15*VDDIO,V
OHmin
=0.85*VDDIO
V
ILmax
=0.25*VDDIO,V
IHmin
=0.75*VDDIO,
V
OLmax
=0.15*VDDIO,V
OHmin
=0.85*VDDIO
SYSRST_N I Module reset
SPK2_P
SPK1_P
SPK1_N
MIC2_P
O
O
Headset speaker
Host speaker
O Host speaker
I Headset receiver
Compatible with
3.0V/1.8V SIM card
Valid at low level. For details, please refer to
4.1 Power and reset.
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第 7 页
27
28
29
22
23
24
25
26
30
AUDIO
AUDIO
POWER
UART
UART
POWER
GND
UART
UART
MIC1_P
MIC1_N
PWRKEY_N
DTR1
DSR1
VDDIO
GND
RXD2
TXD2
I
I
I
I
O
O 2.8V output
Group
I
Receive through
Second group of ports
O
Host receiver
Host receiver power on-off
Data terminal ready
_WAKEUP
Data set ready
Transmit through Second group of ports
V
ILmax
=0.25*VDDIO,V
=0.75*VDDIO,
IHmin
V
OLmax
=0.15*VDDIO,V
OHmin
=0.85*VDDIO
Internal pull-up, valid at low pulse. For details, please refer to 4.1
Power and reset.
Duplexing PIN, valid at low level; besides the
DTR signal, also used as the module’s wakeup signal as the module enters the sleep mode and needs to wake up by the external signal
V
ILmax
=0.25*VDDIO,V
IHmin
=0.75*VDDIO,
V
OLmax
=0.15*VDDIO,V
OHmin
=0.85*VDDIO
Vmin=2.7V,Typical=2.8V,
Vmax=2.9V
V
ILmax
=0.25*VDDIO,V
IHmin
=0.75*VDDIO,
V
OLmax
=0.15*VDDIO,V
OHmin
=0.85*VDDIO
V
ILmax
=0.25*VDDIO,V
IHmin
=0.75*VDDIO,
V
OLmax
=0.15*VDDIO,V
OHmin
=0.85*VDDIO powered by external level conversion
2.2 Antenna interface
Regarding the antenna of MG2639_V2 module, proper measures should be taken to reduce the access loss of effective bands, and good shielding should be established between external antenna and RF connector. Besides, external RF cables should be kept far away from all interference sources such as high-speed digital signal or switch power supply.
According to mobile station standard, stationary wave ratio of MG2639_V2 module’s antenna should be between 1.1 and 1.5, and input impedance is 50 ohm. Different environments may have different requirements on the antenna’s gain. Generally, the larger gain in the band and smaller outside the band, the better performance the antenna has.
Isolation degree among ports must more than 30dB when multi-ports antenna is used. For example, between two different polarized ports on dual-polarized antenna, two different frequency ports on dual-frequency antenna, or among four ports on dual-polarized dual-frequency antenna, isolation degree should be more than 30dB.
MG2639_V2 module provides two kind of external antenna interfaces, therefore customers can select reasonably according to the product form to optimize the cost of BOM.
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Program 1:
PIN2 is used as the antenna PIN. Pay attention to the following when using it as the antenna’s feed PIN:
(1) The feed connected to PIN2 is 50ohm micro-strip or strip line. To approach the module, put π shape or F shape matching network for later tuning.
Figure 2-1π shape matching network diagram
(2)The RF wires must be kept away from the GND, and generally the distance should be 3 times of the width of RF wires.
(3)It’s forbidden to put some interference sources such as DCDC, WIFI module around RF wires or
RF port
Program 2:
When using RF plug as the antenna feed, disconnect PIN2 from the main board and make sure there are some clean areas below or around PIN2. Keep 2mm distance between the surface of PIN2 and GND, and drill holes below PIN2. It’s not suggested to use the compatible design of PIN2 at the same time when using the RF connector.
Figure 2-2 Antenna interface diagram
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Figure 2-3 RF test socket’s dimensions
2.3 Antenna interface’s RF performance
See the antenna interface’s RF performance in table 2-2:
第 10 页
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Antenna interface’s RF performance
GSM850
EGSM900
DCS1800
PCS1900
Table 2-2 Antenna interface’s RF performance
Module’s uplink
(MS->BTS)
Module’s downlink
(BTS->MS)
Power
(dBm)
824MHz-849MHz
880MHz-915MHz
869MHz-894MHz
925MHz-960MHz
33±2
33±2
1710MHz-1785MHz 1805MHz-1880MHz 30±2
1850MHz-1910MHz 1930MHz-1990MHz 30±2
Antenna interface’s Rx. sensitivity
< -107dBm
< -107dBm
< -107dBm
< -107dBm
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3
Module’s electrical characteristics
This chapter mainly introduces the module’s electrical characteristics, including the level, power consumption, reliability of module’s interfaces.
3.1 Descriptions of levels of interface signals
It describes the MAX, MIN and typical value of the level of module’s external interfaces.
3.1.1 Reset
The reset PIN is pulled up to 2.8V(Vmax=2.9V,Vmin=2.7V,Typical=2.8V)through the resistance inside the module.
The SYSRST_N PIN is used to reset the module’s main chipset. You have to pull down the SYSRST_N signal 500ms when resetting the module.
3.1.2 UART
MG2639_V2 module provides two serial interfaces UART1 and UART2. The UART1 supports 8-wire serial BUS interface or 4-wire serial BUS interface or 2-wire serial interface; while UART2 supports
2-wire serial interface only. The module can communicate externally and input the AT commands through the UART interface
3.1.3 SIM Card Interface
MG2639_V2 module baseband processor integrates SIM card interface conforming to ISO 7816-3 standard, and it’s compatible with SIM card with two voltages 1.8V/3.0V and reserves SIM card interface signal on the stamp-hole PIN.
Users should note that SIM card’s electrical interface definitions are the same as SIM card socket’s definitions.
Table 3-1 SIM card’s electronic signals
Classification No. Definition
SIM 14 VSIM
11
12
SIM_RST
SIM_CLK
13 SIM_DATA
I/O
O
O
O
I/O
Description
SIM card voltage
SIM card reset
SIM card clock
SIM card data
Remarks
1.8V/3V; maximum output current 30mA
第 12 页
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3.1.4 Audio Interface
MG2639_V2 module supports 2CH audio signal inputs/outputs. These two MIC inputs are coupled in AC domain and the offset voltage is added inside, and they should directly connect with the receiver.
See the audio interface signals in the table below:
Table 3-2 Audio interface’s signal definitions
Classification No. Definition
AUDIO 23
22
21
20
19
18
MIC1_N
MIC1_P
MIC2_P
SPK1_N
SPK1_P
SPK2_P
I/O
I
I
I
O
O
O
Description
Host receiver
Host receiver
Headset receiver
Host speaker
Host speaker
Headset speaker
Remarks
Differential input
Single-ended input
Differential input
Single-ended input
3.1.5 Network Signal Indication
RSSI_LED drive at high level.
-Power-on status: LED off;
-Network searching status: LED blinks at 3Hz
-Idle status: LED blinks at 1Hz
-Traffic status (call, data): LED blinks at 5Hz.
The RSSI_LED PIN output status is defined according to the software protocol. The RSSI_LED PIN is common I/O port, and it’s output driving capability is 4mA.
3.2 Module Power Consumption
It describes the module’s power consumption under each status:
Table 3-3 MG2639_V2 power consumption
Status
Power-off
Frequency Rx. power MIN
Idle
Talk
Network searching
GSM850
EGSM900
GSM1800
GSM1900
1 mA
Ave.
34uA
208 mA
233 mA
177 mA
172 mA
67mA
MAX Remarks
VBAT=4.2V
Sleep
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3.3 Reliability Characteristics
The module’s reliability testing items include: High/low temperature operation, high/low temperature storage, thermal shock, alternating temperature humidity, etc. The test results must conform to the industrial requirements. See the module’s working temperature in the table below:
Table 3-4 MG2639_V2 module’s temperature characteristics
Parameters Descriptions
To Normal working temperature
MIN
-30℃
MAX
75℃
Remarks
Ta
Limited work temperature
-40℃ +85℃
Make sure there is no obvious decline in the RF performance
Ts Module’s storage temperature
-40℃
+85℃
3.4 ESD Characteristics
See the ESD characteristics at room temperature below:
Table 3-5 ESD performance
Interface
Antenna interface
SIM card interface
Testing items
Air discharge
Contact discharge
Air discharge
Contact discharge
Testing requirements Performance
±8 kV Nothing unusual
±6 kV
±8 kV
±6 kV
Nothing unusual
Nothing unusual
Nothing unusual
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4
Interf ace circuit design
It provides the reference design circuit of the interface and precautions according to the module’s functions.
4.1 Reset and power design
See the power and reset circuit reference design principle in figure 4-1. Since VD1 is TVS tube, you can select appropriate parameters according to the actual selected power supply; since VT1 is
MOS tube, you can select CJ2305 from Changjiang Electronics or DMP2305U-7 from DIODES. Refer to figure 4-2 for the design of power circuit. Select MIC29302 and adjust the output voltage through the adjustment of R5 and R6. Please refer to the specification of MIC29302 for detailed parameter design.
Please note that the components in the figure are just for your reference. For details, please adjust according to the actual circuit.
Figure 4-1 Power and reset circuit reference design principle diagram
Power
输出模块用电压VBAT
VD1
TVS
C1 C2
22uf
VT1
C3
100uf
C4
0.1uf
R1
15k
缓启动电路
PWRKEY_N SYSRST_N
MCU_ON/OFF
R2
4.7K
输入电压
C5
10uF
R4
10K
MCU_RESET
R3
4.7K
Figure 4-2 Power reference circuit
IN
/SHUT
TAB
OUT
GND
SENSE
D1
MIC29302
R5
2.2K
R6
1K
输出模块用电压VBAT
C6
0.1uF
C7
0.1uF
C8
100uF
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Power design
MG2639_V2 module is powered by VBAT. If the external power cannot be stably started, it’s recommended to add buffer circuit in the circuit. See the module’s required voltage characteristics in table 4-1.
Table 4-1 Voltage characteristics
Classification
Input voltage
MIN
3.4V
Typical
3.8V
MAX
4.25V
Input current 1mA --
300mA(depends on the network signal)
The module is very strict with the requirements on power and GND:
(1) The filtering must be performed to power and GND, and the power ripple must be controlled under 50Mv. Do not power any other part in the system because it might affect the RF performance.
(2) Select the power cables with at least 80mil traces during the layout and keep the integrality of ground line.
(3) Make sure the Max. instantaneous output current is larger than 2A if the Max. input current is very high.
Power on
The module is under power-off status after it’s normally powered on. To turn on the module, provide a 2s-5s low level pulse to PWRKEY_N pin when the module is OFF. If one 1K resistance is connected with PWRKEY_N, the module can be turned on after power supply.
Power off
To turn off the module, use AT command “AT+ZPWROFF” or provide a 2s~5s low level pulse to
PWRKEY_N PIN.
Reset
Use the above method to firstly “power-off” and then “power-on” to hard reset the module.
If the external reset function has to be used, low level pulse lasting at least 500ms should be provided to /RESET Pin within 2 seconds after the module is turned on. Before that, the external I/O signal must be kept at low level. See the reset circuit design in figure 4-1.
If SYSRST_N Pin is not used, suspend the pin.
See the module’s power-on/off time sequence in figure 4-3 below:
Figure 4-3 Power-on/off time sequence
Power-off status
Power-on sequence Power-on status
Power-off sequence Power-off status
第 16 页
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t a
20ms
Table 4-2 Power-on/off circuit time characteristics
t b t c t d
10ms 3s 3s
t e
6s
VDDIO
The module has one LDO voltage output pin, which can be used to supply external power to the main board. The voltage output is available only when the module is on. The normal output voltage is
2.8V, and the user should absorb the current from this pin as little as possible (less than 10mA).
Generally, it is recommended to use this pin to pull up the chipset PIN as per the requirements of level matching. Therefore, it’s not recommended to use this pin for other purposes.
Other advice
In order to make sure the data is saved safely, please don’t cut off the power when the module is on.
It’s strongly recommended to add battery or soft switch like the power key on the module.
4.2 UART interf ace
MG2639_V2 module provides an integrated full duplex UART1 interface and an accessorial full duplex UART2 interface with the maximal baud rate is 115200bps. The external interface adopts 2.8V
CMOS level signal, which conforms to RS-232 interface protocol. The UART1 interface could be used as serial interface for AT commands transmission, data service and software upgrade. The UART2 interface can be used to debug the applications.
Note: when using the module for overall unit design, users should educe UART1 for module’s software upgrade.
MG2639_V2 module’s output IO level is 2.8V,it needs to transfer the level when connecting with standard 3.3V or 5V logic circuit(such as MCU or RS232 drive chip MAX3238 etc), Figure 4-3 shows the COM port level transfer circuit. The converted signal should connect with MCU or RS232 drive chip directly. Common low power switch triode should be applied as the crystal triode shown in
Figure 4-3. Please note that the module won’t enter sleep mode as RXD is at high level.
The module’s output I/O level is 2.8V,therefore the level should be converted when it connects with standard 3.3V or 5V logic circuit (such as MCU or RS232 drive chip MAX3238 etc). Normally a triode is used to realize the level conversion. Figure 4-3 shows the level conversion to 3.3V through the serial port. The resistance and capacitance in figure 4-3 are just for reference, and they need to be recalculated during the design. The diode in Figure 4-4 is Schottky diode (forward voltage drop is
0.3V). If you select other diodes, please select one with lower forward voltage drop to make sure
RXD_2V8 is below the threshold when inputting low level.
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Figure 4-4 UART interface reference design diagram
VDDIO VCC(3.3V)
33.2K
1K
22pF
TXD_2V8 TXD_3V3
VDDIO
10K
RXD_2V8 RXD_3V3
100pF
Remarks: the module doesn’t support USB.
4.2.1 UART1 Interface
Figure 4-5 UART1 DCE-DTE connection relationship
MG2639_V2
RXD1
TXD1
CTS1
RTS1
DTR1
DSR1
Application
TXD
RXD
RTS
CTS
DTR
DSR
DCD1
RINGO
DCD
RING
DCE
DTE
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See the definitions of UART1 interface in table 4-3.
Table 4-3 UART1 Interface Definitions
Classification No. Definitions I/O
UART 15
8
16
25
9
RXD1
RTS1
TXD1
DTR1
CTS1
4
26
10
RING
DSR1
DCD1
Descriptions Remarks
I Receive data
O Ready to send
DTE transmits serial data
DTE informs DCE to send
O Transmit data DTE receives serial data
I Data terminal ready DTE is ready
I Clear to send
DCE has switched to Rx. mode
O Ringtone indication Inform DTE upon a remote call
O Data set ready
O Carrier detection
DCE is ready
Data link connected
4.2.2 UART2 Interface
Figure 4-6 UART2 DCE-DTE connection relationship
MG2639_V2 Application
RXD2
TXD2
TXD
RXD
DCE DTE
See the definitions of UART2 interface in table 4-4.
Table 4-4 UART2 Interface Definitions
Classification No. Definitions I/O
UART 29 RXD2
I
Descriptions
Receive data
30
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TXD2 O Transmit data
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Remarks
DTE transmits serial data
DTE receives serial data
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4.3 SIM card interf ace
MG2639_V2 module supports 1.8V or 3.0V SIM card. Refer to figure 4-7 for design.
Figure 4-7 SIM card circuit reference design diagram
NOTE:
(1) The SIM card PCB wiring should be laid closely around the module as much as possible.
(2) The VSIM, CLK, DATA and RST signals should be enveloped by the ground wires. The position of 33pF capacitance should be reserved on CLK, DATA and RST signals wiring and the position should be close to the SIM card socket to prevent the interference sources from affecting the SIM card’s reading/writing.
(3) Since the ESD components are very close to the SIM card socket, it’s recommended to add TVS
components on 4-CH SIM card signals, meanwhile, the signal wires need go through TVS component
before entering the module’s baseband processor during the layout to avoid damaging the module.
(4) The width of VSIM power wiring should be above 6mil at least (recommended to use 8mil).
(5) The filter capacitance of VSIM power wiring adopts 1uf (the value can’t be larger than 10uf or smaller than 1uf), and then 0.1uf capacitance is added.
4.4 Audio interf ace
MG2639_V2 module provides audio input and output interfaces through its PINs. There are 2
Speaker interfaces and 2 Microphone interfaces. Only one pair I/O works at the same time. See the audio interface circuit in figure 4-8.
Figure 4-8 Audio interface circuit reference design principle diagram
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Note: the capacitance value which is not marked is 33pF.
Microphone
The MIC_N & MIC_P are both differential interfaces, and they can also be used for single-ended input.
It’s recommended to use differential method to reduce the noises. The MIC_2 interface is only used for single-ended input. Directly connect to the microphone since two inputs are coupled in AC domain and 1.9V offset voltage is generated.
Speaker
The SPK_P & SPK_N are both differential interfaces with 32 ohm impedance, while the SPK2_P is single-ended interface with 32 ohm impedance.
GSM/GPRS module audio interface is designed as below:
Design of the audio interface on the receiver
Select the microphone with the sensitivity lower than -51.5dB since the max. gain inside MIC1 reaches 51.5dB. The level of MIC1_P is about 1.48V.
Note: if other kind of audio input method is adopted, the dynamic range of input signals should be
within 0.5V. If the dynamic range is lower than 0.5V, then the pre-amplifier should be added. If the dynamic range is higher than 0.5V, then network attenuation should be added.
Design of the audio interface on the earphone
Select the microphone with the sensitivity lower than -51.5dB since the max. gain in MIC2 reaches
51.5dB. The level of MIC2_P is about 1.73V.
Note: In order to get better audio effect for users, we present the following suggestions:
1)During the process of using MG2639_V2 module, it’s advised to use 100pf & 33pf capacitance on its external audio path, and serially connect with the beads to improve the audio quality
2)Connect TVS tube or pressure sensitive resistance on the audio path (approaching the module’s interface) to prevent the ESD from damaging the module.
3)Make sure the use environment and module are well grounded and there is no mutual influence.
4)The power ripple supplied to the module is less than 50mV.
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5. Mechanical dimensions
It introduces the module’s mechanical dimensions.
5.1 Module’s Appearance Diagram
Figure 0-1 MG2639_V2 appearance diagram
Dimensions (L×W×H): 30.0×25.0×2.68mm
Weight: <6g
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5.2 Module’s Assembly Diagram
See the module assembly diagram in figure 5.2.
Figure 0-2 Module’s assembly diagram
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5.3 PCB Dimensions
See the module’s PCB dimensions in figure 5-3.
Figure 0-3 Relevant encapsulation dimensions from TOP view
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Figure 0-4 Relevant encapsulation dimensions from BOTTOM view
Precautions while designing PCB:
1) Copper-clad and wiring are forbidden on each layer of the PCB at the area below the RF test points.
2) For the convenience of testing and maintenance, it might be necessary to drill holes on the
PCB to expose J-TAG test points.
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