PSIM User Manual

PSIM

User Manual

Powersim Inc.

PSIM User Manual

PSIM Version 5.0

(with Motor Drive Module Version 3.0 and Digital Control Module Version 2.0)

May 2001



Copyright 2001 Powersim Inc.

All rights reserved. No part of this manual may be photocopied or reproduced in any form or by any means without the written permission of Powersim Inc.

Disclaimer

Powersim Inc. (“Powersim”) makes no representation or warranty with respect to the adequacy or accuracy of this documentation or the software which it describes. In no event will Powersim or its direct or indirect suppliers be liable for any damages whatsoever including, but not limited to, direct, indirect, incidental, or consequential damages of any character including, without limitation, loss of business profits, data, business information, or any and all other commercial damages or losses, or for any damages in excess of the list price for the licence to the software and documentation.

Powersim Inc.

email: [email protected]

http://www.powersimtech.com

Table of Contents

Chapter 1 General Information

1.1

Introduction 1-1

1.2

Circuit Structure 1-1

1.3

Software/Hardware Requirement 1-2

1.4

Installing the Program 1-2

1.5

Simulating a Circuit 1-3

1.6

Component Parameter Specification and Format 1-3

Chapter 2 Power Circuit Components

2.1

Resistor-Inductor-Capacitor Branches (RLC) 2-1

2.2

Switches 2-2

2.2.1

Diode and Zener Diode (DIODE/ZENER) 2-2

2.2.2

Thyristor (THY) 2-3

2.2.3

GTO, Transistors, and Bi-Directional Switch 2-4

2.2.4

Linear Switches 2-6

2.2.5

Switch Gating Block (GATING) 2-8

2.2.6

Single-Phase Switch Modules 2-10

2.2.7

Three-Phase Switch Modules 2-1

2.3

Coupled Inductors (MUT2/MUT3) 2-12

2.4

Transformers 2-14

2.4.1

Ideal Transformer (TF_IDEAL) 2-14

2.4.2

Single-Phase Transformers 2-14

2.4.3

Three-Phase Transformers 2-17

2.5

Motor Drive Module 2-18

2.5.1

Electric Machines 2-18

2.5.1.1 DC Machine (DCM) 2-18

2.5.1.2 Induction Machine (INDM_3S/INDM_3SN) 2-21

2.5.1.3 Switched Reluctance Machine (SRM3) 2-26

2.5.1.4 Brushless DC Machine (BDCM3) 2-28

PSIM User Manual iii

2.5.1.5 Permanent Magnet Synchronous Machine (PMSM3) 2-33

2.5.2

Mechanical Loads 2-36

2.5.2.1 Constant-Torque Load (MLOAD_T) 2-36

2.5.2.2 Constant-Power Load (MLOAD_P) 2-36

2.5.2.3 Constant-Speed Load (MLOAD_WM) 2-37

2.5.2.4 General-Type Load (MLOAD) 2-38

2.5.3

Mechanical-Electrical Interface Block 2-39

Chapter 3 Control Circuit Components

3.1

Transfer Function Block (TFCTN) 3-1

3.1.1

Proportional Controller (P) 3-2

3.1.2

Integrator (INT/RESETI) 3-2

3.1.3

Differentiator (DIFF) 3-3

3.1.4

Proportional-Integral Controller (PI) 3-4

3.1.5

Built-in Filter Blocks 3-5

3.2

Computational Function Blocks 3-6

3.2.1

Summer (SUM) 3-6

3.2.2

Multiplier and Divider (MULT/DIVD) 3-7

3.2.3

Square-Root Block (SQROT) 3-7

3.2.4

Exponential/Power Function Blocks (EXP/POWER) 3-7

3.2.5

Root-Mean-Square Block (RMS) 3-8

3.2.6

Absolute and Sign Function Blocks (ABS) 3-8

3.2.7

Trigonometric Functions (SIN/COS/COS_1/TG_1) 3-9

3.2.8

Fast Fourier Transform Block (FFT) 3-9

3.3

Other Function Blocks 3-10

3.3.1

Comparator (COMP) 3-10

3.3.2

Limiter (LIM) 3-11

3.3.3

Look-up Table (LKUP/LKUP2D) 3-11

3.3.4

Trapezoidal and Square Blocks (LKUP_TZ/LKUP_SQ) 3-13

3.3.5

Sampling/Hold Block (SAMP) 3-14

3.3.6

Round-Off Block (ROUNDOFF) 3-15

3.3.7

Time Delay Block (TDELAY) 3-16

3.3.8

Multiplexer (MUX2/MUX4/MUX8) 3-17

3.4

Subcircuit Blocks 3-18

3.4.1

Operational Amplifier (OP_AMP) 3-18

iv PSIM User Manual

3.4.2

THD Block (THD) 3-19

3.5

Logic Components 3-21

3.5.1

Logic Gates 3-21

3.5.2

Set-Reset Flip-Flop (SRFF) 3-21

3.5.3

J-K Flip-Flop (JKFF) 3-22

3.5.4

Monostable Multivibrator (MONO/MONOC) 3-22

3.5.5

Pulse Width Counter (PWCT) 3-23

3.6

Digital Control Module 3-23

3.6.1

Zero-Order Hold 3-23

3.6.2

z-Domain Transfer Function Block 3-24

3.6.2.1 Integrator 3-25

3.6.2.2 Differentiator 3-27

3.6.2.3 Digital Filters 3-27

3.6.3

Unit Delay 3-30

3.6.4

Quantization Block 3-31

3.6.5

Circular Buffer 3-32

3.6.6

Convolution Block 3-33

3.6.7

Memory Read Block 3-34

3.6.8

Data Array 3-34

3.6.9

Multi-Rate Sampling System 3-35

Chapter 4 Other Components

4.1

Simulation Control 4-1

4.2

Time 4-2

4.3

Parameter File 4-2

4.4

Independent Voltage/Current Sources 4-3

4.4.1

DC Source (VDC/IDC/VDC_GND) 4-3

4.4.2

Sinusoidal Source (VSIN/VSIN3/ISIN) 4-3

4.4.3

Square-Wave Source (VSQU/ISQU) 4-4

4.4.4

Triangular Source (VTRI/ITRI) 4-5

4.4.5

Step Source (VSTEP/ISTEP) 4-6

4.4.6

Piecewise Linear Source (VGNL/IGNL) 4-7

4.4.7

Random Source (VRAND/IRAND) 4-8

PSIM User Manual v

4.5

Voltage/Current-Controlled Sources 4-9

4.6

Nonlinear Voltage-Controlled Sources 4-11

4.7

Voltage/Current Sensors (VSEN/ISEN) 4-12

4.8

Speed/Torque Sensors (WSEN/TSEN) 4-12

4.9

Probes and Meters 4-13

4.10 Switch Controllers 4-16

4.10.1 On-Off Switch Controller (ONCTRL) 4-16

4.10.2 Alpha Controller (ACTRL) 4-17

4.10.3 PWM Lookup Table Controller (PATTCTRL) 4-18

4.11 Control-Power Interface Block (CTOP) 4-20

4.12 ABC-DQO Transformation Block (ABC2DQO/DQO2ABC) 4-21

4.13 External DLL Block 4-22

4.14 Simulated Frequency Response Analyzer (SFRA) 4-26

Chapter 5 Circuit Schematic Design Using SIMCAD

5.1

Creating a Circuit 5-2

5.2

Editing a Circuit 5-3

5.3

Subcircuit 5-3

5.3.1

Creating Subcircuit - In the Main Circuit 5-4

5.3.2

Creating Subcircuit - Inside the Subcircuit 5-5

5.3.3

Connecting Subcircuit - In the Main Circuit 5-6

5.3.4

Other Features of the Subcircuit 5-7

5.3.4.1 Passing Variables from the Main Circuit to Subcircuit 5-7

5.3.4.2 Customizing the Subcircuit Image 5-8

5.3.4.3 Including Subcircuits in the SIMCAD Element List 5-9

5.4

Other Options 5-10

5.4.1

Simulation Control 5-10

5.4.2

Running the Simulation 5-10

5.4.3

Password Protection of a Circuit Schematic 5-10

5.4.4

Settings 5-10

5.4.5

Printing the Circuit Schematic 5-11

vi PSIM User Manual

5.5

Editing SIMCAD Library 5-11

5.5.1

Editing an Element 5-11

5.5.2

Creating a New Element 5-1

5.5.3

Ground Element 5-12

Chapter 6 Waveform Processing Using SIMVIEW

6.1

File Menu 6-2

6.2

Edit Menu 6-2

6.3

Axis Menu 6-3

6.4

Screen Menu 6-4

6.5

View Menu 6-5

6.6

Option Menu 6-7

6.7

Label Menu 6-8

6.8

Exporting Data 6-8

Chapter 7 Error/Warning Messages and General Simulation Issues

7.1

Simulation Issues 7-1

7.1.1

Time Step Selection 7-1

7.1.2

Propagation Delays in Logic Circuits 7-1

7.1.3

Interface Between Power and Control Circuits 7-1

7.1.4

FFT Analysis 7-2

7.2

Error/Warning Messages 7-2

7.3

Debugging 7-4

Appendix A: Examples A-1

Appendix B: List of Elements B-1

PSIM User Manual vii

viii PSIM User Manual

Introduction

Chapter 1: General Information

1.1

Introduction

PSIM is a simulation package specifically designed for power electronics and motor control. With fast simulation, friendly user interface and waveform processing, PSIM provides a powerful simulation environment for power converter analysis, control loop design, and motor drive system studies.

This manual covers both PSIM

*

and its add-on Motor Drive Module and Digital Control

Module. The Motor Drive Module has built-in machine models and mechanical load models for drive system studies. The Digital Control Module provides discrete elements such as zero-order hold, z-domain transfer function blocks, quantization blocks, digital filters, for digital control analysis.

The PSIM simulation package consists of three programs: circuit schematic editor SIM-

CAD

*

, PSIM simulator, and waveform processing program SIMVIEW

*

. The simulation environment is illustrated as follows.

SIMCAD

Circuit Schematic Editor (input: *.sch)

PSIM

PSIM Simulator (input: *.cct; output: *.txt)

SIMVIEW

Waveform Processor (input: *.txt)

Chapter 1 of this manual describes the circuit structure, software/hardware requirement, and installation procedure. Chapter 2 through 4 describe the power and control circuit components. The use of SIMCAD and SIMVIEW is discussed in Chapter 5 and 6. Error/ warning messages are listed in Chapter 7. Finally, sample examples are provided in

Appendix A, and a list of the PSIM elements is given in Appendix B.

1.2

Circuit Structure

A circuit is represented in PSIM in four blocks: power circuit, control circuit, sensors, and switch controllers. The figure below shows the relationship between these blocks.

*. PSIM, SIMCAD, and SIMVIEW are copyright by Powersim Inc., 2001

PSIM User Manual 1-1

Chapter 1: General Information

Power Circuit

Switch

Controllers

Sensors

Control Circuit

The power circuit consists of switching devices, RLC branches, transformers, and coupled inductors. The control circuit is represented in block diagram. Components in s domain and z domain, logic components (such as logic gates and flip flops), and nonlinear components (such as multipliers and dividers) can be used in the control circuit. Sensors measure power circuit voltages and currents and pass the values to the control circuit. Gating signals are then generated from the control circuit and sent back to the power circuit through switch controllers to control switches.

1.3

Software/Hardware Requirement

PSIM runs in Microsoft Windows environment (95/98/NT/2000) on PC computers. The minimum RAM memory requirement is 32 MB.

1.4

Installing the Program

A quick installation guide is provided in the flier “PSIM - Quick Guide” and on the CD-

ROM.

Some of the files in the PSIM directory are:

Files

psim.dll

simcad.exe

simview.exe

simcad.lib

*.hlp

*.sch

Description

PSIM simulator

Circuit schematic editor SIMCAD

Waveform processor SIMVIEW

PSIM component library

Help files

Sample schematic circuit files

1-2 PSIM User Manual

Simulating a Circuit

File extensions used in PSIM are:

*.sch

*.cct

*.txt

*.smv

SIMCAD schematic file (binary)

PSIM circuit file (text)

PSIM simulation output file (text)

SIMVIEW waveform file (binary)

1.5

Simulating a Circuit

To simulate the sample one-quadrant chopper circuit “chop.sch”:

- Start SIMCAD. Choose Open from the File menu to load the file “chop.sch”.

- From the Simulate menu, choose Run PSIM. PSIM simulator will read the netlist file and start simulation. The simulation results will be saved to File

“chop.txt”. Any warning messages occurred in the simulation will be saved to

File “message.doc”.

- If the option Auto-run SIMVIEW is not selected in the Options menu, from the

Simulate menu, choose Run SIMVIEW to start SIMVIEW, and select curves for display. If the option Auto-run SIMVIEW is selected, SIMVIEW will be launched automatically.

1.6

Component Parameter Specification and Format

The parameter dialog window in each component in PSIM has two tabs: Parameters and

Other Info, as shown below.

The parameters in the Parameters tab are used to perform the simulation. The information in the Other Info tab, on the other hand, is not used in the simulation. It is for report-



ing purposes and will appear in the parts list in View | Element List in SIMCAD.

Information such as device rating, manufacturer, and part no. can be stored under the

Other Info tab.

The parameters under the Parameters tab can be a numerical value, or can be a mathematical expression. A resistance, for example, can be specified in any one of the following ways:

12.5

12.5k

12.5Ohm

12.5kOhm

25./2.Ohm

R1+R2

R1*0.5+(Vo+0.7)/Io where R1, R2, Vo, and Io are symbols defined either in a parameter file (see Section 4.3,

Chapter 4 of the PSIM User Manual), or in a main circuit if this resistor is in a subcircuit

(see Section 5.3.4.1, Chapter 5 of the PSIM User Manual).

The power-of-ten suffix letters are allowed in PSIM. The following suffix letters are supported:

G

M

10

9

10

6 k or K 10

3 m u n p

10

-3

10

-6

10

-9

10

-12

A mathematical expression can contain brackets and is not case sensitive. The following math functions are allowed:

-

+ addition subtraction

/

* multiplication division

^ to the power of [Example: 2^3 = 2*2*2]

SQRT square-root function

SIN

COS sine function cosine function


Component Parameter Specification and Format

TAN tangent function

ATAN inverse tangent function

EXP

LOG exponential (base e) [Example: EXP(x) = e x

] logarithmic function (base e) [Example: LOG(x) = ln (x)]

LOG10 logarithmic function (base 10)

ABS absolute function

SIGN sign function [Example: SIGN(1.2) = 1; SIGN(-1.2)=-1]




Resistor-Inductor-Capacitor Branches

Chapter 2: Power Circuit Components

2.1

Resistor-Inductor-Capacitor Branches

Both individual resistor, inductor, capacitor branches and lumped RLC branches are provided in PSIM. Initial conditions of inductor currents and capacitor voltages can be defined.

To facilitate the setup of three-phase circuits, symmetrical three-phase RLC branches,

“R3”, “RL3”, “RC3”, “RLC3”, are provided. Initial inductor currents and capacitor voltages of the three-phase branches are all zero.

Images:

R L

C

RL RC

LC

RLC

R3 RL3 RC3 RLC3

For the three-phase branches, the phase with a dot is Phase A.

Attributes:

Parameters

Resistance

Inductance

Capacitance

Initial Current

Initial Cap. Voltage

Current Flag

Current Flag_A;

Current Flag_B;

Current Flag_C

Resistance, in Ohm

Inductance, in H

Description

Capacitance, in F

Initial inductor current, in A

Initial capacitor voltage, in V

Flag for branch current output. If the flag is zero, there is no current output. If the flag is 1, the current will be saved to an output file for display in SIMVIEW. The current is positive when it flows into the dotted terminal of the branch.

Flags for Phase A, B, and C of the three-phase branches, respectively.

The resistance, inductance, or capacitance of a branch can not be all zero. At least one of


Chapter 2: Power Circuit Components

the parameters has to be a non-zero value.

2.2

Switches

There are two basic types of switches in PSIM. One is switchmode. It operates either in the cut-off region (off state) or saturation region (on state). The other is linear switch. It can operates in either cut-off, linear, or saturation region.

Switches in the switchmode include the following:

- Diode (DIODE)

- Thyristor (THY)

- Self-commutated switches, specifically:

- Gate-Turn-Off switch (GTO)

- npn bipolar junction transistor (NPN)

- pnp bipolar junction transistor (PNP)

- Insulated-Gate Bipolar transistor (IGBT)

- n-channel Metal-Oxide-Semiconductor Field-Effect Transistor

(MOSFET) and p-channel MOSFET (MOSFET_P)

- Bi-directional switch (SSWI)

The names inside the bracket are the names used in PSIM.

Switch models are ideal. That is, both turn-on and turn-off transients are neglected. A switch has an on-resistance of 10

µΩ

and an off-resistance of 1M

Ω

. Snubber circuits are not required for switches.

Linear switches include the following:

- npn bipolar junction transistor (NPN_1)

- pnp bipolar junction transistor (PNP_1)

2.2.1 Diode and Zener Diode

The conduction of a diode is determined by the circuit operating condition. The diode is turned on when it is positively biased, and is turned off when the current drops to zero.

Image:

DIODE


Switches

Attributes:

Parameters

Diode Voltage Drop

Initial Position

Current Flag

Description

Diode conduction voltage drop, in V

Flag for the initial diode position. If the flag is 0, the diode is open. If it is 1, the diode is closed.

Flag for the diode current printout. If the flag is 0, there is no current output. If the flag is 1, the diode current will be saved to the output file for display.

A zener diode is modelled by a circuit as shown below.

Image:

ZENER

K

Circuit Model

K

A

V

B

A

Attributes:

Parameters Description

Breakdown Voltage Breakdown voltage V

B

of the zener diode, in V

Forward Voltage Drop Voltage drop of the forward conduction (diode voltage drop from anode to cathode)

Current Flag Flag for zener current output (from anode to cathode)

If the zener diode is positively biased, it behaviors as a regular diode. When it is reverse biased, it will block the conduction as long as the cathode-anode voltage V

KA

is less than the breakdown voltage V

B

. When V

KA

exceeds V

B

, the voltage V

KA

will be clamped to V

B

.

[Note: when the zener is clamped, since the diode is modelled with an on-resistance of 10

10

µΩ

, the cathode-anode voltage will in fact be equal to: V

KA

= V

B

+ 10

µΩ

* I

KA

. Therefore, depending on the value of I

KA

, V

KA

will be slightly higher than V

B

. If I

KA

is very large, V

KA

can be substantially higher than V

B

].

2.2.2 Thyristor

A thyristor is controlled at turn-on. The turn-off is determined by circuit conditions.



Image:

A

THY

K

Gate

Attributes:

Parameters

Voltage Drop

Initial Position

Current Flag

Description

Thyristor conduction voltage drop, in V

Flag for the initial switch position

Flag for switch current output

There are two ways to control a thyristor. One is to use a gating block (GATING), and the other is to use a switch controller. The gate node of a thyristor, therefore, must be connected to either a gating block or a switch controller.

The following examples illustrate the control of a thyristor switch.

Examples: Control of a Thyristor Switch

Gating Block

Alpha Controller

This circuit on the left uses a switching gating block (see Section 2.2.5). The switching gating pattern and the frequency are pre-defined, and will remain unchanged throughout the simulation. The circuit on the right uses an alpha controller (see Section 4.7.2). The delay angle alpha, in deg., is specified through the dc source in the circuit.

2.2.3 GTO, Transistors, and Bi-Directional Switch

Self-commutated switches in the switchmode are turned on when the gating is high (a voltage of 1V or higher is applied to the gate node) and the switch is positively biased

(collector-emitter or drain-source voltage is positive). It is turned off whenever the gating is low or the current drops to zero. For PNP (pnp bipolar junction transistor) and

MOSFET_P (p-channel MOSFET), switches are turned on when the gating is low and switches are negatively biased (collector-emitter or drain-source voltage is negative).


Switches

A GTO switch is a symmetrical device with both forward-blocking and reverse-blocking capabilities. An IGBT or MOSFET/MOSFET_P switch consist of an active switch with an anti-parallel diode.

A bi-directional switch (SSWI) conducts currents in both directions. It is on when the gating is high and is off when the gating is low, regardless of the voltage bias conditions.

Note that for NPN and PNP switches, contrary to the device behavior in the real life, the model in PSIM can block reverse voltage (in this sense, it behaviors like a GTO). Also, it is controlled by a voltage signal at the gate node, not the current.

Images:

GTO

NPN PNP MOSFET

MOSFET_P

IGBT

SSWI

Attributes:

Parameters

Initial Position

Current Flag

Description

Initial switch position flag. For MOSFET/IGBT, this flag is for the active switch, not for the anti-parallel diode.

Switch current printout flag. For MOSFET/IGBT, the current through the whole module (the active switch plus the diode) will be displayed.

A switch can be controlled by either a gating block (GATING) or a switch controller. They must be connected to the gate (base) node of the switch. The following examples illustrate the control of a MOSFET switch.

Examples: Control of a MOSFET Switch

On-off Controller

The circuit on the left uses a gating block, and the one on the right uses an on-off switch



controller (see Section 4.7.1). The gating signal is determined by the comparator output.

Examples: Control of a NPN bipolar junction transistor

NPN

NPN

The circuit on the left uses a gating block, and the one on the right uses an on-off switch controller.

The following shows another example of controlling the NPN switch. The circuit on the left shows how a NPN switch is controlled in the real life. In this case, the gating voltage

VB is applied to the transistor base drive circuit through a transformer, and the base current determines the conduction state of the transistor.

This circuit can be modelled and implemented in PSIM as shown on the right. A diode,

D be

, with a conduction voltage drop of 0.7V, is used to model the pn junction between the base and the emitter. When the base current exceeds 0 (or a certain threshold value, in which case the base current will be compared to a dc source), the comparator output will be 1, applying the turn-on pulse to the transistor through the on-off switch controller.

NPN

NPN

2.2.4 Linear Switches

Models for npn bipolar junction transistor (NPN_1) and pnp bipolar junction transistor

(PNP_1), which can operate in either cut-off, linear, and saturation region, is provided.

Images:


Switches

NPN_1

PNP_1

Attributes:

Parameters

Current Gain beta

Bias Voltage V r

Description

Transistor current gain

β

, defined as:

β

=I c

/I b

Forward bias voltage between base and emitter for NPN_1, or between emitter and base for PNP_1

Saturation voltage between collector and emitter for NPN_1, and between emitter and collector for PNP_1

V ce,sat

[or V ec,sat

for PNP_1]

The switch is controlled by the base current I b

. It can operate in either one of the three regions: cut-off (off state), linear, and saturation region (on state). The properties of these regions for NPN_1 are:

- Cut-off region: V be

< V r

; I b

= 0; I c

= 0

- Linear region: V be

= V r

; I c

=

β∗

I b

; V ce

> V ce,sat

- Saturation region: V be

= V r

; I c

<

β∗

I b

; V ce

= V ce,sat where is V be the base-emitter voltage, V ce is the collector-emitter voltage, and I c

is the collector current.

Note that for NPN_1 and PNP_1, the gate node (base node) is a power node, and must be connected to a power circuit component (such as a resistor or a source). It can not be connected to a gating block or a switch controller.

WARNING: It has been found that the linear model for NPN_1 and PNP_1 works well in simple circuits, but may not work when circuits are complex. Please use this model with caution and user discretion is advised.

Examples below illustrate the use of the linear switch model. The circuit on the left is a linear voltage regulator circuit, and the transistor operates in the linear mode. The circuit on the right is a simple test circuit.



Examples: Sample circuits using the linear switch NPN_1

NPN_1

NPN_1

2.2.5 Switch Gating Block

A switch gating block defines the gating pattern of a switch or a switch module. The gating pattern can be specified either through the dialog box (with the gating block GATING) or in a text file (with the gating block GATING_1).

Note that the switch gating block can be connected to the gate node of a switch ONLY. It can not be connected to any other elements.

Image:

GATING/GATING_1

Attributes:

Parameters

Frequency

No. of Points

Switching Points

File for Gating Table

Description

Operating frequency, in Hz, of the switch or switch module connected to the gating block

Number of switching points (for GATING only)

Switching points, in deg. If the frequency is zero, the switching points is in second. (for GATING only)

Name of the file that stores the stores the gating table (for

GATING_1 only)

The number of switching points is defined as the total number of switching actions in one period. Each turn-on and turn-off action is counted as one switching point. For example, if a switch is turned on and off once in one cycle, the number of switching points will be 2.

For GATING_1, the file for the gating table must be in the same directory as the schematic file. The gating table file has the following format:


Switches

n

G1

G2

... ...

Gn where G1, G2, ..., Gn are the switching points.

Example:

Assume that a switch operates at 2000 Hz and has the following gating pattern in one period:

35

92 175

187

345

357

0 180 360

(deg.)

In SIMCAD, the specifications of the gating block GATING for this switch will be:

Frequency

No. of Points

Switching Points

2000.

6

35. 92. 175. 187. 345. 357.

The gating pattern has 6 switching points (3 pulses). The corresponding switching angles are 35 o

, 92 o

, 175 o

, 187 o

, 345 o

, and 357 o

, respectively.

If the gating block GATING_1 is used instead, the specification will be:

Frequency 2000.

File for Gating Table test.tbl

The file “test.tbl” will contain the following:

6

35.

92.

175.

187.

345.

357.



2.2.6 Single-Phase Switch Modules

Built-in single-phase diode bridge module (BDIODE1) and thyristor bridge module

(BTHY1) are provided in PSIM. The images and the internal connections of the modules are shown below.

Images:

BDIODE1

A+

A-

1

DC+

A+

A-

DC-

4

3

DC+

2

DC-

A+

A-

BTHY1

DC+

A+

1

Ct

3

DC-

A-

4

2

Ct

DC+

DC-

Attributes:

Parameters

Diode Voltage Drop or

Voltage Drop

Init. Position_i

Current Flag_i

Description

Forward voltage drop of each diode or thyristor, in V

Initial position for Switch i

Current flag for Switch i

Node Ct at the bottom of the thyristor module is the gating control node for Switch 1. For the thyristor module, only the gatings for Switch 1 need to be specified. The gatings for other switches will be derived internally in the program.

Similar to the single thyristor switch, a thyristor bridge can also be controlled by either a gating block or an alpha controller, as shown in the following examples.

Examples: Control of a Thyristor Bridge

The gatings for the circuit on the left are specified through a gating block, and on the right are controlled through an alpha controller. A major advantage of the alpha controller is


Switches

that the delay angle alpha of the thyristor bridge, in deg., can be directly controlled.

2.2.7 Three-Phase Switch Modules

The following figure shows three-phase switch modules and the internal circuit connections. The three-phase voltage source inverter moduleVSI3 consists of MOSFET-type switches, and the module VSI3_1 consists of IGBT-type switches.

Images:

BDIODE3

A

B

C

DC+

A

B

C

DC-

4

1

BTHY3H

3 5

6 2

DC+

DC-

A

B

C

A1

BTHY3

DC+

A

B

C

DC-

4

1

Ct

3

6

Ct

BTHY6H

1

2

Ct

5

2

DC+

DC-

A

B

C

N

A

B

C

1

2

3

Ct

N

N

N

6

Ct

A6

Ct

CSI3

DC+

VSI3/VSI3_1

A

DC+

1

Ct

DC-

B

C

4

Ct

DC-

VSI3

3

5

6 2

A

B

C

DC+

DC-

Ct

A

DC+

Ct

B

C

DC-

1

4

3

6

5

2

A

B

C

Attributes:

Parameters

On-Resistance

Saturation Voltage

Diode Voltage Drop

Init. Position_i

Current Flag_i

Description

On resistance of the MOSFET switch during the on state, in

Ohm (for VSI3 only)

Conduction voltage drop of the IGBT switch, in V (for

VSI3_1 only)

Conduction voltage drop of the anti-parallel diode, in V (for

VSI3 and VSI3_1 only)

Initial position for Switch i

Current flag for Switch i



Similar to single-phase modules, only the gatings for Switch 1 need to be specified for the three-phase modules. Gatings for other switches will be automatically derived. For the half-wave thyristor bridge (BTHY3H), the phase shift between two consecutive switches is 120 o

. For all other bridges, the phase shift is 60 o

.

Thyristor bridges (BTHY3/BTHY3H/BTHY6H) can be controlled by an alpha controller.

Similarly, PWM voltage/current source inverters (VSI3/CSI3) can be controlled by a

PWM lookup table controller (PATTCTRL).

The following examples illustrate the control of a three-phase voltage source inverter module.

Examples: Control of a Three-Phase VSI Module

V ac

PWM Controller

The thyristor circuit on the left uses an alpha controller. For a three-phase circuit, the zerocrossing of the voltage V

ac

corresponds to the moment when the delay angle alpha is equal to zero. This signal is, therefore, used to provide synchronization to the controller.

The circuit on the right uses a PWM lookup table controller. The PWM patterns are stored in a lookup table in a text file. The gating pattern is selected based on the modulation index. Other input of the PWM lookup table controller includes the delay angle, the synchronization, and the enable/disable signal. A detailed description of the PWM lookup table controller is given in Section 4.8.3.

2.3

Coupled Inductors

Coupled inductors with two, three, and four branches are provided. The following shows coupled inductors with two branches.

i

1

+

v

1

-

i

2

+

v

2

-


Coupled Inductors

Let L11 and L22 be the self-inductances of Branch 1 and 2, and L12 and L21 the mutual inductances, the branch voltages and currents have the following relationship:

v

1

v

2

=

L11 L12

L21 L22

⋅

dt i

1

i

2

The mutual inductances between two windings are assumed to be always equal, i.e.,

L12=L21.

Images:

MUT2

MUT3

MUT4

Attributes:

Parameters

Lii (self)

Lij (mutual) i

i

_initial

Iflag_i

Description

Self inductance of the inductor i, in H

Mutual inductance between Inductor i and j, in H

Initial current in Inductor i

Flag for the current printout in Inductor i

In the images, the circle, square, triangle, and plus refer to Inductor 1, 2, 3, and 4, respectively.

Example:

Two mutually coupled inductors have the following self inductances and mutual inductance: L11=1 mH, L22=1.1 mH, and L12=L21=0.9 mH. In SIMCAD, the specifications of the element MUT2 will be:

L11 (self)

L12 (mutual)

L22 (self)

1.e-3

0.9e-3

1.1e-3



2.4

Transformers

2.4.1 Ideal Transformer

An ideal transformer has no losses and no leakage flux.

Image:

TF_IDEAL

Np

Ns

TF_IDEAL_1

Np

Ns

The winding with the larger dot is the primary and the other winding is the secondary.

Attributes:

Parameters

Np (primary)

Ns (secondary)

Description

No. of turns of the primary winding

No. of turns of the secondary winding

Since the turns ratio is equal to the ratio of the rated voltages, the number of turns can be replaced by the rated voltage at each side.

2.4.2 Single-Phase Transformers

The following single-phase transformer modules are provided in PSIM:

Transformer with 1 primary and 1 secondary windings TF_1F/

TF_1F_1

TF_1F_3W

TF_1F_4W

TF_1F_5W/

TF_1F_5W_1

TF_1F_7W

TF_1F_8W

Transformer with 1 primary and 2 secondary windings





A single-phase two-winding transformer is modelled as:


Transformers

Rp Lp

Rs Ls

Np:Ns

Primary

Lm

Secondary

Ideal where Rp and Rs are the primary/secondary winding resistances; Lp and Ls are the primary/secondary winding leakage inductances; and Lm is the magnetizing inductance. All the values are referred to the primary side.

Images:

p

TF_1F

s

TF_1F_3W

p t s p

TF_1F_1

s

p_1

p_2

TF_1F_4W

s_1

s_2

p

TF_1F_5W

s_1

s_4

p_1

p_2

TF_1F_5W _1

s_1

TF_1F_7W

s_1

s_2

TF_1F_8W

s_1

s_2

p_1

s_3

p

p_2

s_6 s_6

In the images, p refers to primary, s refers to secondary, and t refers to tertiary.

The winding with the larger dot is the primary winding (or the first primary winding for the 2-primary-2-secondary-winding transformer (TF_1F_4W)). For the multiple winding transformers, the sequence of the windings is from the top to the bottom.

For the transformers with 2 or 3 windings, the attributes are as follows.

Attributes:

Parameters

Rp (primary);

Rs (secondary);

Rt (tertiary)

Lp (pri. leakage);

Ls (sec. leakage);

Lt (ter. leakage)

Lm (magnetizing)

Resistance of the primary/secondary/tertiary winding, in

Ohm

Description

Leakage inductance of the primary/secondary/tertiary winding, in H (seen from the primary)

Magnetizing inductance, in H



Np (primary);

Ns (secondary);

Nt (tertiary)

Attributes:

Parameters

Rp_i (primary i);

Rs_i (secondary i)

Lp_i (pri. i leakage);

Ls_i (sec. i leakage)

Lm (magnetizing)

Np_i (primary i);

Ns_i (secondary i)

No. of turns of the primary/secondary/tertiary winding

All the resistances and inductances are referred to the primary side.

For the transformers with more than 1 primary winding or more than 3 secondary windings, the attributes are as follows.

Description

Resistance of the i th

primary/secondary/tertiary winding, in

Ohm

Leakage inductance of the i th

primary/secondary/tertiary winding, in H (referred to the first primary winding)

Magnetizing inductance, in H (seen from the first primary winding)

No. of turns of the i th

primary/secondary/tertiary winding

All the resistances and inductances are referred to the first primary side.

Example:

A single-phase two-winding transformer has a winding resistance of 0.002 Ohm and leakage inductance of 1 mH at both the primary and the secondary side (all the values are referred to the primary). The magnetizing inductance is 100 mH, and the turns ratio is

Np:Ns=220:440. In SIMCAD, the transformer will be TF_1F with the specifications as:

Rp (primary)

Rs (secondary)

Lp (primary)

Ls (secondary)

Lm (magnetizing)

Np (primary)

Ns (secondary)

2.e-3

2.e-3

1.e-3

1.e-3

100.e-3

220

440


Transformers

2.4.3 Three-Phase Transformers

PSIM provides two-winding and three-winding transformer modules as shown below.

They all have 3-leg cores.

TF_3F

TF_3YY; TF_3YD

3-phase transformer (windings unconnected)

3-phase Y/Y and Y/

∆

connected transformer

TF_3F_3W 3-phase 3-winding transformer (windings unconnected)

TF_3YYD; TF_3YDD

3-phase 3-winding Y/Y/

∆

and Y/

∆

/

∆

connected transformer

TF_3F_4W 3-phase 4-winding transformer (windings unconnected)

Images:

TF_3YY

A

B

C

N n

A

B

C

TF_3YYD n a b c aa bb cc

N a b c

A

B

C

A

B

C

TF_3YD

N

TF_3YDD a b c aa bb cc a b c

N

A

B

C

TF_3DD a b c

A+

A-

B+

B-

C+

C-

TF_3F a+ ab+ bc+ c-

A+

A-

B+

B-

C+

C-

TF_3F_3W aa+ aabb+ cc+ bbcc- a+ ab+ bc+ c-

A+

A-

B+

B-

C+

C-

AA+

AA-

BB+

BB-

CC+

CC-

TF_3F_4W a+ ab+ bc+ caa+ aabb+ bbcc+ cc-

Attributes:

Parameters

Rp (primary);

Rs (secondary);

Rt (tertiary)

Lp (pri. leakage);

Ls (sec. leakage);

Lt (ter. leakage)

Lm (magnetizing)

Description

Resistance of the primary/secondary/tertiary winding, in

Ohm

Leakage inductance of the primary/secondary/tertiary winding, in H

Magnetizing inductance, in H (seen from the primary side)



Np (primary);

Ns (secondary);

Nt (tertiary)

No. of turns of the primary/secondary/tertiary winding

In the images, “P” refers to primary, “S” refers to secondary, and “T” refers to tertiary. All the resistances and inductances are referred to the primary or the first primary side.

Three-phase transformers are modelled in the same way as the single-phase transformer.

All the parameters are referred to the primary side.

2.5

Motor Drive Module

The Motor Drive Module, as an add-on option to the basic PSIM program, provides machine models and mechanical load models for motor drive studies.

2.5.1 Electric Machines

2.5.1.1 DC Machine

The image and parameters of a dc machine are as follows:

Image:

DCM

Armature

Winding

+

-

Shaft Node

+

Field

Winding

-

Attributes:

Parameters

R a

(armature)

L a

(armature)

R f

(field)

L f

(field)

Description

Armature winding resistance, in Ohm

Armature winding inductance, in H

Field winding resistance, in Ohm

Field winding inductance, in H


Motor Drive Module

Moment of Inertia

V t

(rated)

I a

(rated)

n (rated)

I f

(rated)

Torque Flag

Master/Slave Flag

Moment of inertia of the machine, in kg*m

Rated armature terminal voltage, in V

Rated armature current, in A

Rated mechanical speed, in rpm

Rated field current, in A

Output flag for internal torque T

em

2

Flag for the master/slave mode (1: master; 0: slave)

When the torque flag is set to 1, the internal torque generated by the machine is saved to the data file for display.

A machine is set to either master or slave mode. When there is only one machine in a mechanical system, this machine must be set to the master mode. When there are two or more machines in a system, only one must be set to master and the rest to slave. The same applies to a mechanical-electrical interface block, as explained later.

The machine in the master mode is referred to as the master machine, and it defines the reference direction of the mechanical system. The reference direction is defined as the direction from the shaft node of the master machine along the shaft to the rest of the mechanical system, as illustrated below:

Master

Reference direction of the mechanical system

Slave

Load 1

T

L1

Speed

Sensor 1

Torque

Sensor 1

Load 2

T

L2

Speed Torque

Sensor 2 Sensor 2

In this mechanical system, the machine on the left is the master and the one on the right is the slave. The reference direction of the mechanical system is, therefore, defined from left to the right along the mechanical shaft. Furthermore, if the reference direction enters an element at the dotted side, it is said that this element is along the reference direction. Otherwise it is opposite to the reference direction. For example, Load 1, Speed Sensor 1, and

Torque Sensor 1, are along the reference direction, and Load 2, Speed Sensor 2, and

Torque Sensor 2 are opposite to the reference direction.

It is further assumed the mechanical speed is positive when both the armature and the field



currents of the master machine are positive.

Based on this notation, if the speed sensor is along the reference direction of the mechanical system, a positive speed produced by the master machine will give a positive speed sensor output. Otherwise, the speed sensor output will be negative. For example, if the speed of the master machine in example above is positive, Speed Sensor 1 reading will be positive, and Speed Sensor 2 reading will be negative.

The reference direction also determines how a mechanical load interacts with the machine.

In this system, there are two constant-torque mechanical loads with the amplitudes of T

L1

and T

L2

, respectively. Load 1 is along the reference direction, and Load 2 is opposite to the reference direction. Therefore, the loading torque of Load 1 to the master machine is T

L1

, whereas the loading torque of Load 2 to the master machine is -T

L2

.

The operation of a dc machine is described by the following equations:

v t

=

E a

+

i a

⋅

R a

+

L a di

-------

dt v f

=

i f

⋅

R f

+

L f di

------

dt f

E a

=

k

⋅ ⋅

m

J

T em

⋅

d

ω

----------

dt

=

=

k

φ

i a

T em

–

T

L

where v

t

E a

, v

f

, i

a

, and i

f

are the armature and field winding voltage and current, respectively;

is the back emf,

ω

m

is the mechanical speed in rad./sec., T

em

is the internal developed torque, and T

L

is the load torque. The back emf and the internal torque can also be expressed as:

E a

=

L af f

ω

m

T em

=

L af f i a

where L

af

is the mutual inductance between the armature and the field windings. It can be calculated based on the rated operating conditions as:

L af

=

(

V

-------------------------------

I

–

f

⋅

I

⋅

m

R

)

Note that the dc machine model assumes magnetic linearity. Saturation is not considered.



Example: A DC Motor with a Constant-Torque Load

The circuit below shows a shunt-excited dc motor with a constant-torque load T

L

. Since the load is along the reference direction of the mechanical system, the loading torque to the machine is T

L

. Also, the speed sensor is along the reference direction. It will give a positive output for a positive speed.

The simulation waveforms of the armature current and the speed are shown on the right.

Speed

Sensor

Armature current

Constant-

Torque

Load

Speed (in rpm)

Example: A DC Motor-Generator Set

The circuit below shows a dc motor-generator set. The motor on the left is set to the master mode and the generator on the right is set to the slave mode. The simulation waveforms of the motor armature current and the generator voltage show the start-up transient.

Motor Generator

Motor armature current

Generator voltage

2.5.1.2 Induction Machine

PSIM provides the model for 3-phase squirrel-cage induction machines. The model comes in two versions: one with the stator winding neutral accessible (INDM_3SN) and the other without the neutral (INDM_3S). The images and parameters are shown as follows.

Image:



a b c

INDM_3S a b c

INDM_3SN neutral

Attributes:

Parameters

R s

(stator)

L s

(stator)

R r

(rotor)

L r

(rotor)

L m

(magnetizing)

R o

(common mode)

L o

(common mode)

C o

(common mode)

No. of Poles

Moment of Inertia

Torque Flag

Master/Slave Flag

Description

Stator winding resistance, in Ohm

Stator winding leakage inductance, in H

Rotor winding resistance, in Ohm

Rotor winding leakage inductance, in H

Magnetizing inductance, in H

Common mode resistance, in Ohm (for INDM_3SN only)

Common mode inductance, in H (for INDM_3SN only)

Common mode capacitance, in F (for INDM_3SN only)

Number of poles P of the machine (an even integer)

Moment of inertia J of the machine, in kg*m

2

Flag for internal torque (T

em

) output. When the flag is set to

1, the output of the internal torque is requested.


All the parameters are referred to the stator side.

Again, the master/slave flag defines the mode of operation for the machine. Please refer to

Section 2.5.1.1 for detailed explanation. It is assumed the mechanical speed is positive when the input source sequence is positive.

The model INDM_3SN is the same as INDM_3S, except that the state neutral point is assessible. Using this model, one can calculate the neutral current when a common mode voltage is present. In the model, the abc coordinate is transformed into the stationary dqo coordinate. The transformations are:

v

=

2

3

⋅

v

–

v

---------

2

–

v

--------

2



v v

=

=

1

3

⋅ (

v

1

2

⋅ (

v

+

v

–

v

)

+

v

) and

i i

=

=

i

3

⋅

–

i

--------

2

+

i

3

⋅

=

–

i

2

i

3

⋅

--------

2

–

i

+

i

--------

2

⋅

⋅

2

2

+

i

--------

2

+

i

--------

2 where v

a,s

, v

b,s

, and v

c,s

are the stator phase a, b, and c voltages with respect to the stator neutral point, and i

a,s

, i

b,s

, and i

c,s

are the stator line currents. Quantities v

d,s

, v

q,s

, v o,s

and

i d,s

, i

q,s

, i o,s

are the voltages and currents in the dqo coordinate.

The phase o voltage, v

o,s

, is applied across the phase o impedance of the machine, also called the common mode impedance. The common mode impedance consists of resistance

R o

, inductance L

o

, and capacitance C

o

, all in series. The current flowing through the common mode impedance is i

o,s

.

The operation of a 3-phase squirrel-cage induction machine is described by the following equations:

v

=

R s

⋅

i

+

L s

⋅

dt

+

M sr

⋅

d i dt

0 =

R r

⋅

i

+

L r

⋅

d i dt

+

M sr

T

⋅

d i dt

where

v

=

v v v i

=

i i i i

=

i i i

The parameter matrices are defined as:



R s

=

R s

0 0

0 R

s

0

0 0 R

s

R r

=

R r

0 0

0 R

r

0

0 0 R

r

L s

=

L s

+

M sr

–

M

--------

2

sr

–

M

--------

2

sr

–

L s

+

M sr

–

M

--------

2

M

--------

2

–

–

M

--------

2

M

--------

2

L s

+

M sr

L r

=

L r

+

M sr

–

M

--------

2

–

M

--------

2

–

L r

+

M sr

–

M

--------

M

2

--------

2

–

–

M

--------

M

2

sr

--------

2

sr

L r

+

M sr

cos

θ

M sr

=

M sr

⋅ cos cos

θ

–

2

π

3

θ

+

2

π

3 cos

θ

+

2

π

3 cos

θ cos

θ

–

2

π

3 cos

θ

+

2

π

3 cos

θ

–

2

π

3 cos

θ where M

sr

is the mutual inductance between the stator and rotor windings, and

θ

is the mechanical angle. The mutual inductance is related to the magnetizing inductance as:

L m

=

2

sr

The mechanical equation is expressed as:

J

⋅

d

ω

----------

dt

=

T em

–

T

L

where the developed torque T

em

is defined as:

T em

=

P

⋅

i

T

⋅

d

θ

sr

⋅

i

The steady state equivalent circuit of the machine is shown below. In the figure, s is the slip.



R s

L s

L m

R r

L r

R r

(1-s)/s

Example: A VSI Induction Motor Drive System

The figure below shows an open-loop induction motor drive system. The motor has 6 poles and is fed by a voltage source inverter with sinusoidal PWM. The dc bus is established via a diode bridge.

The simulation waveforms of the mechanical speed (in rpm), developed torque T

em

and load torque T

load

, and 3-phase input currents show the start-up transient.

VSI

Diode

Bridge

Induction

Motor

Speed

Sensor

Torque

Sensor

SPWM

Speed

T em

T load

3-phase currents



2.5.1.3 Switched Reluctance Machine

PSIM provides the model for 3-phase switched reluctance machine with 6 stator teeth and

4 rotor teeth. The images and parameters are shown as follows.

Image:

SRM3 a+ ab+ bc+ c-

Shaft Node c

1 c

2 c

3 c

4

Phase a c

1 c

4 c

1

Phase b c

4

θ

Phase c

Attributes:

Parameters

Resistance

Inductance L

min

Inductance L

max

θ

r

Moment of Inertia

Torque Flag

Master/Slave Flag

Description

Stator phase resistance R, in Ohm

Minimum phase inductance, in H

Maximum phase inductance, in H

Duration of the interval where the inductance increases, in deg.


2

Output flag for internal torque T

em

. When the flag is set to 1, the output of the internal torque is requested.


The master/slave flag defines the mode of operation for the machine. Please refer to Section 2.5.1.1 for detailed explanation.

The node assignments are: Nodes a+, a-, b+, b-, and c+, c- are the stator winding terminals for Phase a, b, and c, respectively. The shaft node is the connecting terminal for the mechanical shaft. They are all power nodes and should be connected to the power circuit.

Node c

1

, c

2

, c

3

, and c

4

are the control signals for Phase a, b, and c, respectively. The control signal value is a logic value of either 1 (high) or 0 (low). Node

θ

is the mechanical rotor angle. They are all control nodes and should be connected to the control circuit.



The equation of the switched reluctance machine for one phase is:

v

=

i R

+

d L i dt

) where v is the phase voltage, i is the phase current, R is the phase resistance, and L is the phase inductance. The phase inductance L is a function of the rotor angle

θ

, as shown in the following figure.

L

Rising Flat-Top Fallin Flat-Bottom

L max

L min

θ

r

θ

The rotor angle is defined such that, when the stator and the rotor teeth are completely out of alignment,

θ

= 0. The value of the inductance can be in either rising stage, flat-top stage, falling stage, or flat-bottom stage.

If we define the constant k as:

k

=

L max

–

θ

L

---------------------------we can express the inductance L as a function of the rotor angle

θ

:

L = L

min

+ k

∗ θ

[rising stage. Control signal c

1

=1)

L = L

max

L = L

max

- k

∗ θ

[flat-top stage. Control signal c

2

=1)

[falling stage. Control signal c

3

=1)

L = L

min

[flat-bottom stage. Control signal c

4

=1)

The selection of the operating state is done through the control signal c

1

, c

2

, c

3

, and c

4 which are applied externally. For example, when c

1 is selected and Phase a inductance will be: L = L

min

in Phase a is high (1), the rising stage

+ k

∗ θ

. Note that only one and at least one control signal out of c

1

, c

2

, c

3

, and c

4

in one phase must be high (1).

The developed torque of the machine per phase is:

T em

=

2

------

d

θ



Based on the inductance expression, we have the developed torque in each stage as:

T em

= i

2

*k / 2 [rising stage]

[flat-top stage]

T em

= 0

T em

= - i

2

*k / 2 [falling stage]

T em

= 0 [flat-bottom stage]

Note that saturation is not considered in this model.

2.5.1.4 Brushless DC Machine

A 3-phase brushless dc machine is a type of permanent magnet synchronous machine. It has 3-phase windings on the stator, and permanent magnet on the rotor. The model in

PSIM is for brushless dc machines with trapezoidal waveform back emf.

The image and parameters of the 3-phase brushless dc machine are shown as follows.

Image:

BDCM3 a b c

Shaft Node n s a s b s c

6-pulse Hall Effect Position Sensor

Attributes:


R (stator resistance) Stator phase resistance R, in Ohm

L (stator self ind.) Stator phase self inductance L, in H

M (stator mutual ind.) Stator mutual inductance M, in H.

The mutual inductance M is a negative value. Depending on the winding structure, the ratio between M and the stator self inductance L is normally between -1/3 and -1/2. If M is unknown, a reasonable value of M equal to -0.4*L can be used as the default value.



Vpk / krpm Peak line-to-line back emf constant, in V/krpm (mechanical speed)

Vrms / krpm RMS line-to-line back emf constant, in V/krpm (mechanical speed).

The values of Vpk/krpm and Vrms/krpm should be available from the machine data sheet. If these values are not available, they can be obtained through experiments by operating the machine as a generator at 1000 rpm and measuring the peak and rms values of the line-to-line voltage.

No. of Poles P Number of poles P

Moment of Inertia


2

Mech. Time Constant Mechanical time constant

τ mech theta_0 (deg.) Initial rotor angle

θ

r

, in electrical deg.

The initial rotor angle is the rotor angle at t=0. The zero rotor angle position is defined as the position where Phase A back emf crosses zero (from negative to positive) under a positive rotation speed.

theta_advance (deg.) Position sensor advance angle

θ

advance

, in electrical deg.

The advance angle is defined as the angle difference between the turn-on angle of Phase A upper switch and 30 o

in an 120 o conduction mode. For example, if Phase A is turned on at 25 o

, the advance angle will be 5 o

(i.e. 30 - 25 = 5).

Conduction Pulse

Width

Position sensor conduction pulse width, in electrical deg.

Positive conduction pulse can turn on the upper switch and negative pulse can turn on the lower switch in a full bridge inverter. The conduction pulse width is 120 electrical deg. for

120 o

conduction mode.

Torque Flag

Master/Slave Flag

Output flag for internal developed torque T

em

(1: output; 0: no output)

Flag for the master/slave mode (1: master; 0: slave).

The flag defines the mode of operation for the machine. Refer to Section 2.5.1.1 for detailed explanation.

The node assignments of the image are: Nodes a, b, and c are the stator winding terminals for Phase A, B, and C, respectively. The stator windings are Y connected, and Node n is the neutral point. The shaft node is the connecting terminal for the mechanical shaft. They are all power nodes and should be connected to the power circuit.



Node s a

, s b

, and s c

are the outputs of the built-in 6-pulse hall effect position sensors for

Phase A, B, and C, respectively. The sensor output is a bipolar commutation pulse (1, 0, and -1). The sensor output nodes are all control nodes and should be connected to the control circuit.

The equations of the 3-phase brushless dc machine are:

v v v a b c

=

=

=

a

+

(

L

–

M

) ⋅

di

-------

dt

+

E a b

+

(

L

–

M

) ⋅

di

-------

dt

+

E b c

+

(

L

–

M

) ⋅

di

-------

dt

+

E c

where v

a

, v

b,

and v

c

are the phase voltages, i

a

, i

b,

and i

c

are the phase currents, R, L, and M are the stator phase resistance, self inductance, and mutual inductance, and E

a

, E

b,

and E

c

are the back emf of Phase A, B, and C, respectively.

The back emf voltages are a function of the rotor mechanical speed

ω

m

and the rotor electrical angle

θ

r

, that is:

E

E

E a b c

=

=

=

k

e_a

⋅ ω

m k

e_b

⋅ ω

m k

e_c

⋅ ω

m

The coefficients k

e_a

, k

e_b, and k

e_c

are dependent on the rotor angle

θ

r.

In this model, an ideal trapezoidal waveform profile is assumed, as shown below for Phase A. Also shown is the Phase A current.

k e_a

K pk i a

180 o

360 o

θ

r

-K pk

α where K

pk

is the peak trapezoidal value, in V/(rad./sec.), which is defined as:

K pk

=

V

⁄

-------------------------

2

krpm

⋅

⋅

1

1000 2

π

60

. Given the values of Vpk/krpm and Vrms/krpm, the angle

α

is determined automatically in PSIM.

The developed torque of the machine is:



T em

=

(

E a

⋅

i a

+

E b

⋅

i b

+

E c

⋅

i c m

The mechanical equations are:

J

⋅

d

ω

----------

dt

=

d

θ

--------

dt r

T em

–

B

⋅ ω

m

–

T load

=

P

ω

2

⋅

m

where B is a coefficient, T

load

is the load torque, and P is the no. of poles. The coefficient

B is calculated from the moment of inertia J and the mechanical time constant

τ mech as below:

B

=

τ

mech

More Explanation on the Hall Effect Sensor:

A hall effect position sensor consists of a set of hall switches and a set of trigger magnets.

The hall switch is a semiconductor switch (e.g. MOSFET or BJT) that opens or closes when the magnetic field is higher or lower than a certain threshold value. It is based on the hall effect, which generates an emf proportional to the flux-density when the switch is carrying a current supplied by an external source. It is common to detect the emf using a signal conditioning circuit integrated with the hall switch or mounted very closely to it. This provides a TTL-compatible pulse with sharp edges and high noise immunity for connection to the controller via a screened cable. For a three-phase brushless dc motor, three hall switches are spaced 120 electrical deg. apart and are mounted on the stator frame.

The set of trigger magnets can be a separate set of magnets, or it can use the rotor magnets of the brushless motor. If the trigger magnets are separate, they should have the matched pole spacing (with respect to the rotor magnets), and should be mounted on the shaft in close proximity to the hall switches. If the trigger magnets use the rotor magnets of the machine, the hall switches must be mounted close enough to the rotor magnets, where they can be energized by the leakage flux at the appropriate rotor positions.

Example: Start-Up of an Open-Loop Brushless DC Motor

The figure below shows an open-loop brushless dc motor drive system. The motor is fed by a 3-phase voltage source inverter. The outputs of the motor hall effect position sensors are used as the gatings signals for the inverter, resulting a 6-pulse operation.

The simulation waveforms show the start-up transient of the mechanical speed (in rpm), developed torque T

em

, and 3-phase input currents.



Brushless DC Motor

Speed

T em

3-phase currents

Example: Brushless DC Motor with Speed Feedback

The figure below shows a brushless dc motor drive system with speed feedback. The speed control is achieved by modulating sensor commutation pulses (Vgs for Phase A in this case) with another high-frequency pulses (Vgfb for Phase A). The high-frequency pulse is generated from a dc current feedback loop.

The simulation waveforms show the reference and actual mechanical speed (in rpm),

Phase A current, and signals Vgs and Vgfb. Note that Vgfb is divided by half for illustration purpose.

Brushless DC Motor

Speed

Phase A current

Vgfb/2

T em

Vgs



2.5.1.5 Permanent Magnet Synchronous Machine

A 3-phase permanent magnet synchronous machine has 3-phase windings on the stator, and permanent magnet on the rotor. The difference between this machine and the brushless dc machine is that the machine back emf is sinusoidal.

The image and parameters of the machine are shown as follows.

Image:

PMSM3 a b c

Shaft Node n

Attributes:


R s

(stator resistance) Stator winding resistance, in Ohm

L d

(d-axis ind.) Stator d-axis inductance, in H

L q

(q-axis ind.) Stator q-axis inductance, in H.

The d-q coordinate is defined such that the d-axis passes through the center of the magnet, and the q-axis is in the middle between two magnets. The q-axis is leading the d-axis.

Vpk / krpm Peak line-to-line back emf constant, in V/krpm (mechanical speed).

The value of Vpk/krpm should be available from the machine data sheet. If this data is not available, it can be obtained through an experiment by operating the machine as a generator at 1000 rpm and measuring the peak line-to-line voltage.

Number of poles P No. of Poles P

Moment of Inertia


2

Mech. Time Constant Mechanical time constant

τ mech

Torque Flag Output flag for internal developed torque T

em

(1: output; 0: no output)



Master/Slave Flag Flag for the master/slave mode (1: master; 0: slave).

The flag defines the mode of operation for the machine. Refer to Section 2.5.1.1 for detailed explanation.

The node assignments of the image are: Nodes a, b, and c are the stator winding terminals for Phase a, b, and c, respectively. The stator windings are Y connected, and Node n is the neutral point. The shaft node is the connecting terminal for the mechanical shaft. They are all power nodes and should be connected to the power circuit.

The equations of the permanent-magnet synchronous machine can be described by the following equations:

v a v b v c

=

R s

0 0

0 R

s

0

0 0 R

s

⋅

i a i b i c

+

dt

λ

a

λ

b

λ

c

where v

a

, v

b, v c

, and i

a

, i

b,

and i

c

, and

λ

a

,

λ

b

, λ

c

are the stator phase voltages, currents, and flux linkages, respectively, and R

s

is the stator phase resistance. The flux linkages are further defined as:

λ

a

λ

b

λ

c

=

L aa

L ab

L ac

L aa

L ab

L ac

L aa

L ab

L ac

⋅

i a i b i c

+

λ

pm

⋅ cos cos

r

θ

r

–

2

π

3 cos

θ

r

+

2

π

3 where

θ

r

is the rotor electrical angle, and

λ

pm

is a coefficient which is defined as:

λ

pm

=

π

⁄

krpm

P 1000

⋅

3 where P is the number of poles.

The stator self and mutual inductances are rotor position dependent, and are defined as:

L

L bb

L cc ab

L aa

=

=

=

L

=

L

L ba sl sl

L

=

+

+

sl

L

+

L o

+

o

L o

–

L

+

+

o

L

L

+

2

2

L

⋅

⋅

L

2

2

⋅ cos cos cos

2

θ

2

θ

(

r r

2

θ

+

–

r

)

------

3

2

π

⋅ cos 2

θ

r

–

3

------

3

π



L ac

=

L bc

L ca

=

=

L cb

–

=

L o

+

L

2

⋅ cos 2

θ

r

+

2

π

3

–

L o

+

L

2

⋅ cos

(

2

θ

r

) where L

sl

is the stator leakage inductance. The d-axis and q-axis inductances are associated with the above inductances as follows:

L d

=

L sl

+

2

o

+

2

2

L q

=

L sl

+

2

o

–

2

2

The developed torque can be expressed as: sin

(

2

θ

r

)

T em

=

--- L

2

⋅

2

⋅

i a i b i c

⋅ sin 2

θ

r

–

2

π

3 sin 2

θ

r

+

2

π

3 sin 2

θ

r

–

2

π

3 sin 2

θ

r

+

2

π

3 sin

(

2

θ

r

) sin 2

θ

r

+

2

π

3 sin sin

(

2

θ

r

2

θ

r

)

–

2

π

3

i a

⋅

i b

–

i c

=

P

2

⋅ λ

pm

⋅

i a i b i c

⋅ sin sin

r

θ

r

–

2

π

3 sin

θ

r

+

2

π

3

The mechanical equations are:

J

⋅

d

ω

----------

dt

=

d

θ

--------

dt r

T em

–

B

⋅ ω

m

–

T load

=

P

ω

2

⋅

m

where B is a coefficient, T

load

is the load torque, and P is the no. of poles. The coefficient

B is calculated from the moment of inertia J and the mechanical time constant

τ mech as below:

B

=

τ

mech



2.5.2 Mechanical Loads

Several mechanical load models are provided in PSIM: constant-torque, constant-power, and general-type load. Note that they are available in the Motor Drive Module.

2.5.2.1 Constant-Torque Load

The image of a constant-torque load is:

Image:

MLOAD_T

Attributes:

Parameters

Constant Torque

Moment of Inertia

Description

Torque constant T const

, in N*m

Moment of inertia of the load, in kg*m

2

If the reference direction of a mechanical system enters the dotted terminal, the load is said to be along the reference direction, and the loading torque to the master machine is

T

const

. Otherwise the loading torque will be -T const

. Please refer to Section 2.5.1.1 for more

detailed explanation.

A constant-torque load is expressed as:

T

L

=

T

const

The torque does not depend on the speed direction.

2.5.2.2 Constant-Power Load

The image of a constant-power load is:

Image:

MLOAD_P



Attributes:

Parameters

Maximum Torque

Base Speed

Moment of Inertia

Description

Maximum torque T max

of the load, in N*m

Base speed n base

of the load, in rpm


2

The torque-speed curve of a constant-power load can be illustrated below:

T

max

Torque

(N*m)

0

n

base

Speed (rpm)

When the mechanical speed is less than the base speed n base

, the load torque is:

T

L

=

T

max

When the mechanical speed is above the base speed, the load torque is:

T

L

=

----------

m

where P = T max

*

ω base

and

ω base

= 2

π∗

n

base

/60. The mechanical speed

ω

m

is in rad./sec.

2.5.2.3 Constant-Speed Load

The image of a constant-torque load is:

Image:

MLOAD_WM



Attributes:


Constant Speed (rpm) Speed constant, in rpm

Moment of Inertia


2

A constant-speed mechanical load defines the speed of a mechanical system, and the speed will remain constant, as defined by the speed constant.

2.5.2.4 General-Type Load

Besides constant-torque and constant-power load, a general-type load is provided in

PSIM. The image of the load is as follows:

Image:

MLOAD

Attributes:

Tc

Parameters

k

1

(coefficient)

k

2

(coefficient)

k

3

(coefficient)

Moment of Inertia

Description

Constant torque term

Coefficient for the linear term

Coefficient for the quadratic term

Coefficient for the cubic term


2

A general-type load is expressed as:

T

L

=

sign

( ω

m

) ⋅ (

T c

+

k

1

⋅ ω

m

+

k

2

⋅ ω

2

m

+

k

3

⋅ ω

m

3

) where

ω

m

is the mechanical speed in rad./sec.

Note that the torque of the general-type load is dependent on the speed direction.



2.5.3 Mechanical-Electrical Interface Block

This block allows users to access the internal equivalent circuit of the mechanical system for a machine.

Image:

MECH_ELEC

Mechanical Side

Electrical Side

Attributes:

Parameters

Master/Slave Flag

Description

Flag for the master/slave mode (1: master, 0: slave)

Similar to an electric machine, the mechanical-electrical interface block can be used to define the reference direction of a mechanical system through the master/slave flag. When the interface block is set to the master mode, the reference direction is along the mechanical shaft, away from the mechanical node, and towards the rest of the mechanical elements. In a mechanical system, only one and at least one machine/interface block must be set to the master mode. Refer to the help on the dc machine for more explanation on the master/slave flag.

Let’s assume that a drive system consists of a motor (with a developed torque of T

em

and a moment of inertia of J

1

) and a mechanical load (with a load torque of T

load

and a moment of inertia of J

2

). The equation that describes the mechanical system is:

(

J

1

+

J

2

) ⋅

d

ω

----------

dt

=

T em

–

T load

where

ω

m

is the shaft mechanical speed. In PSIM, this equation is modelled by an equivalent circuit as shown below.

ω

m

speed node

T em

J

1

J

2

T load

In this circuit, the two current sources have the values of T

em

and T

load

, and the capacitors have the values of J

1

and J the mechanical speed

ω

m

2

. The node-to-ground voltage (speed node voltage) represents

. This is analogous to C*dV/dt = i for a capacitor where



C = J

1

+J

2

, V =

ω

m

, and i = T

em

-T

load

.

In PSIM, the mechanical equivalent circuit for motors and mechanical loads all uses the capacitor-based circuit model. The mechanical-electrical interface block provides the access to the internal mechanical equivalent circuit. If the mechanical side of an interface block (with the letters “MECH”) is connected to a mechanical shaft, the electrical side

(with the letters “ELEC”) will be the speed node of the mechanical equivalent circuit. One can thus connect any electrical circuits to this node.

With this element, users can connect the built-in motors or mechanical loads with custombuilt load or motor models.

Example: An induction machine with a custom mechanical load model

The figure below shows an induction machine connected to a user defined mechanical load model through the mechanical-electrical interface block. As explained, the voltage at the electrical side represents the shaft mechanical speed. A current source flowing out of this node represents a mechanical load, and a capacitor connected to this node represents the load moment of inertia.

Mechanical load model

Example: A custom machine model with a constant-torque mechanical load

Similarly, one can build a custom machine model and connect it to the mechanical load available in the PSIM library. The figure belows shows such a circuit. The custom machine model must use the capacitor analogy to model the mechanical equation. The node representing the mechanical speed is then made available and is connected to the electrical side of the mechanical-electrical interface block.

Custom machine model (in subcircuit form)

Wm

Mechanical speed


Transfer Function Block

Chapter 3: Control Circuit Components

3.1

Transfer Function Block

A transfer function block is expressed in polynomial form as:

G s

=

k

⋅

B

⋅

s n

+ ...

+

B

⋅

s

2

+

B

1

⋅

s

+

B

--------------------------------------------------------------------------------

A n

⋅

s n

+ ...

+

A

2

⋅

s

2

+

A

1

⋅

s

+

A

0

Image:

TFCTN TFCTN1

Attributes:

Parameters

Order n

Gain

Coeff. B

n

...B o

Coeff. A

n

...A o

Initial Values x

n

..x

1

Description

Order n of the transfer function

Gain k of the transfer function

Coefficients of the nominator (from B

n

to B o

)

Coefficients of the denominator (from A

n

to A o

)

Initial values of the state variables x

n

to x

1

(for TFCTN1 only)

Let Y(s) = G(s)*U(s) where Y(s) is the output and U(s) is the input, we can convert the sdomain expression into the differential equation form as follows:

dt x

1

x

2

x

3

...

x n

=

0 0 0 ... 0 –

A

0

1 0 0 ... 0 –

A

1

0 1 0 ... 0 –

A

2

⁄

⁄

⁄

A n

A n

A n

... ... ... ... ...

...

0 0 0 ... 1 –

A n

– 1

⁄

A n

⋅

x

1

x

2

x

3

...

x n

+

A n

⋅

B

0

B

1

B

2

–

A

0

⋅

–

A

1

⋅

–

A

2

⋅

B n

⁄

B n

⁄

B n

⁄

A n

A n

A n

B n

– 1

...

–

A n

– 1

⋅

B n

⁄

A n

⋅

u

The output equation in the time domain can be expressed as:

y

=

x n

+

k

⋅

B

------ u

A n

⋅


Chapter 3: Control Circuit Components

The initial values of the state variables x

n

to x

1 can be specified at the input in the element

TFCTN1.

Example:

The following is a second-order transfer function:

G s

= 1.5

⋅

----------------------------------------------------

s

2

+

400.e

1200 s

3

+ 400.e

3

In SIMCAD, the specifications are:

Order n

Gain

Coeff. B

n

...B o

Coeff. A

n

...A o

2

1.5

0. 0. 400.e3

1. 1200. 400.e3

3.1.1 Proportional Controller

The output of a proportional (P) controller is equal to the input multiplied by a gain.

Image:

P

Attribute:

Gain


Gain k of the transfer function

3.1.2 Integrator

The transfer function of an integrator is:

=

sT

There are two types of integrators. One is the regular integrator (I). The other is the resettable integrator (RESETI).

Images:


RESETI


I

Attribute:

Parameters

Time Constant

Initial Output Value

Reset Flag

Description

Time constant T of the integrator, in sec.

Initial value of the output

Reset flag (0: edge reset; 1: level reset) (for RESETI only)

The output of the resettable integrator can be reset by an external control signal (at the bottom of the block). For the edge reset (reset flag = 0), the integrator output is reset to zero at the rising edge of the control signal. For the level reset (reset flag = 1), the integrator output is reset to zero as long as the control signal is high (1).

To avoid over saturation, a limiter should be placed at the integrator output.

Example:

The following circuit illustrates the use of the resettable integrator. The input of the integrator is a dc quantity. The control input of the integrator is a pulse waveform which resets the integrator output at the end of each cycle. The reset flag is set to 0.

V d v o v ctrl

3.1.3 Differentiator

The transfer function of a differentiator is:

G s

=

sT



A differentiator is calculated as follows:

v o t

=

T

⋅

v in t

–

v in

∆

t

(

t

–

∆

t

--------------------------------------------

) where

∆

t is the simulation time step, v

in

(t) and v

in

(t-

∆

t) are the input values at the present and the previous time step.

Image:

DIFF

Attribute:

Parameters

Time Constant

Description

Time constant T of the differentiator, in sec.

Since sudden changes of the input will generate spikes at the output, it is recommended that a low-pass filter be placed before the differentiator.

3.1.4 Proportional-Integral Controller

The transfer function of a proportional-integral (PI) controller is defined as:

G s

=

k

⋅

1 +

sT sT

Image:

PI

Attributes:

Gain

Parameters

Time Constant

Description

Gain k of the PI controller

Time constant T of the PI controller

To avoid over saturation, a limiter should be placed at the PI output.



3.1.5 Built-in Filter Blocks

Four second-order filters are provided as built-in modules in PSIM. The transfer function of these filters are listed below.

For a second-order low-pass filter:

G s

=

k

⋅

ω

2

---------------------------------------

s

2

+ 2

ξω

c s

+

ω

2

c

For a second-order high-pass filter:

G s

=

k

⋅

---------------------------------------

s

2

+

s

2

ξω

2

c s

+

ω

2

c

For a second-order band-pass filter:

G s

=

k

⋅

----------------------------------

2 2

s

+

B s

+

ω

o

For a second-order band-stop filter:

G s

=

k

⋅

s

2

+

ω

2

----------------------------------

s

2

+

B s

+

ω

2

o

Images:

FILTER_LP2

FILTER_HP2

FILTER_BP2

FILTER_BS2

Attributes:

Parameters

Gain

Damping Ratio

Cut-off Frequency

Description

Gain k

Damping ratio

ξ

Cut-off frequency f

c

(

f c

=

ω

------

2

π

c

), in Hz, for low-pass and high-pass filters



Center Frequency

Passing Band;

Stopping Band

Center frequency f

o

(

f o

=

ω

2

o

π

), in Hz, for band-pass and band-stop filter

Frequency width f

b

of the passing/stopping band for bandpass/band-stop filters, in Hz

f b

=

------

2

()

3.2

Computational Function Blocks

3.2.1 Summer

For a summer with one input (SUM1) or two inputs (SUM2 and SUM2P), the input can be either a scalar or a vector. For the summer with three inputs (SUM3), the input can only be a scalar.

Images:

SUM1 SUM2

SUM2P

SUM3

Input 1

Input 1

Input 1

Input 2

Input 2 Input 2

Input 3

Attributes:

Parameters

Gain_i Gain k

i

for the i th

input

Description

For SUM3, the input with a dot is the first input.

If the inputs are scalar, the output of a summer with n inputs is defined as:

V o

=

k

1

V

1

+

k

2

V

2

+ ...

+

k n

V n

If the input is a vector, the output of a two-input summer will also be a vector, which is defined as:

V

1

= [a

1

a

2

... a n

]

V

2

= [b

1

b

2

... b n

]

V

o

= V

1

+ V

2

= [a

1

+b

1

a

2

+b

2

... a n

+b n

]

For a one-input summer, the output will still be a scalar which is equal to the summation


Computational Function Blocks

of the input vector elements, that is, V o

= a

1

+ a

2

+ ... a n

.

3.2.2 Multiplier and Divider

The output of a multipliers (MULT) or dividers (DIVD) is equal to the multiplication or division of two input signals.

Images:

MULT

DIVD

Nominator

Denominator

For the divider, the dotted node is for the nominator input.

The input of a multiplier can be either a vector or a scalar. If the two inputs are vectors, their dimensions must be equal. Let the two inputs be:

V

1

= [a

1

a

2

... a n

]

V

2

= [b

1

b

2

... b n

]

The output, which is a scalar, will be:

V

o

= V

1

* V

2

T

= a

1

*b

1

+ a

2

*b

2

+ a n

*b n

3.2.3 Square-Root Block

A square-root function block calculates the square root of the input quantity.

Image:

SQROT

3.2.4 Exponential/Power Function Blocks

Images:

EXP POWER



Attributes:

Parameters

Coefficient k

Coefficient k

1

2

Coefficient k

1

Coefficient k

2

Description

For the exponential function block (EXP), the output is defined as: :

V o

=

k

1

⋅

k

V in

2

For example, if k

1

=1, k

2

=2.718281828, and V

in

=2.5, then V

o

=e

2.5

where e is the base of the natural logarithm.

For the power function block (POWER), the output is defined as: :

V o

=

k

1

⋅

V k in

2

3.2.5 Root-Mean-Square Block

A root-mean-square function block calculates the RMS value of the input signal over a period specified by the base frequency f

b

. The output is defined as:

V rms

=

1

T

∫

T

0

v

2

in t dt

where T=1/f

b

. The output is only updated at the beginning of each period.

Image:

RMS

Attribute:

Parameters

Base frequency

Description

Base frequency f

b

, in Hz

3.2.6 Absolute and Sign Function Blocks

An absolute value function block (ABS) gives the absolute value of the input. A sign function block (SIGN) gives the sign of the input, i.e., the output is 1 if the input is positive,


Computational Function Blocks

and the output is -1 if the input is negative.

Image:

ABS

SIGN

3.2.7 Trigonometric Functions

Four trigonometric functions are provided: sine (SIN), cosine (COS), arc cosine (COS_1), and arc tangent (TG_1). The output is equal to the corresponding trigonometric function of the input. For Blocks SIN and COS, the input is in deg., and for Blocks COS_1 and

TG_1, the output is in deg.

Images:

SIN COS COS_1

Imaginary

Real

TG_1

For the arc tangent block, the dotted node is for the real input and the other node is for the imaginary input. The output is the arc tangent of the ratio between the imaginary and the real input, i.e.

θ

=

tg

– 1

V

------------------------

V real

.

3.2.8 Fast Fourier Transform Block

A Fast Fourier Transform block calculates the fundamental component of the input signal.

The FFT algorithm is based on the radix-2/decimation-in-frequency method. The number of the sampling points within one fundamental period should be 2

N

(where N is an integer). The maximum number of sampling points allowed is 1024.

The output gives the amplitude (peak) and the phase angle of the input fundamental component. The output voltage (in complex form) is defined as:

v o

=

N

⋅

n

=

N

1

2

–

∑

n

= 0

v in n

–

v in n

+

----

2



⋅

e

–

j

2

π

n

N



Image:



FFT

Amplitude

Phase Angle

Attributes:


No. of Sampling Points No. of sampling points N

Fundamental Frequency Fundamental frequency f

b

, in Hz.

The dotted node of the block refers to the output of the amplitude. Note that the phase angle has been internally adjusted such that a sine function V

m

*sin(

ω t) will give a phase angle output of 0.

Example:

In the circuit below, the voltage v

in

contains a fundamental component v

1

(100 V, 60 Hz), a 5th harmonic voltage v

5

(25 V, 300 Hz), and a 7th harmonic v

7

(25 V, 420 Hz). After one cycle, the FFT block output reaches the steady state with the amplitude of 100 V and the phase angle of 0 o

.

v

1

v

5

v in v amp

Angle v

7

v

1

v in v amp

Angle

3.3

Other Function Blocks

3.3.1 Comparator

The output of a comparator is high when the positive input is higher than the negative input. When the positive input is low, the output is zero. If the two input are equal, the output is undefined and it will keep the previous value.

Image:


Other Function Blocks

COMP

Note that the comparator image is similar to that of the op. amp. For the comparator, the noninverting input is at the upper left and the inverting input is at the lower left. For the op. amp., however, it is the opposite.

3.3.2 Limiter

The output of a limiter is clamped to the upper/lower limit whenever the input exceeds the limiter range. If the input is within the limit, the output is equal to the input.

Image:

LIM

Attributes:

Parameters

Lower Limit

Upper Limit

Description

Lower limit of the limiter

Upper limit of the limiter

3.3.3 Look-up Table

There are two types of lookup tables: one-dimensional lookup tables (LKUP), and 2dimensional lookup tables (LKUP2D). The one-dimensional lookup table has one input and one output. Two data arrays, corresponding to the input and the output, are stored in the lookup table in a file. The format of the table is as follows.

V in

(1), V

o

(1)

V in

(2), V

o

(2)

...

V in

(n), V

o

(n)

The input array V

in

must be monotonically increasing. Between two points, linear interpolation is used to obtain the output. When the value of the input is less than V

in

(1) or greater than V

in

(n), the output will be clamped to V

o

(1) or V

o

(n).

The 2-dimensional lookup table has two input and one output. The output data is stored in



a 2-dimensional matrix. The two input correspond to the row and column indices of the matrix. For example, if the row index is 3 and the column index is 4, the output will be

A(3,4) where A is the data matrix. The data for the lookup table are stored in a file and have the following format: m, n

A(1,1), A(1,2), ..., A(1,n)

A(2,1), A(2,2), ..., A(2,n)

... ... ...

A(m,1), A(m,2), ..., A(m,n) where m and n are the number of rows and columns, respectively. Since the row or the column index must be an integer, the input value is automatically converted to an integer. If either the row or the column index is out of the range (for example, the row index is less than 1 or greater than m), the output will be zero.

Images:

LKUP

LKUP2D

Index j

Index i

Attribute:

Parameters

File Name

Description

Name of the file storing the lookup table

For the 2-dimensional lookup table block, the node at the left is for the row index input, and the node at the top is for the column index input.

Examples:

The following shows a one-dimensional lookup table:

1., 10.

2., 30.

3., 20.

4., 60.

5., 50.

If the input is 0.99, the output will be 10. If the input is 1.5, the output will be

10 +

(

1.5

– 1

) ⋅ (

2 – 1

30 – 10

)

=20.



The following shows a 2-dimensional lookup table:

3, 4

1., -2., 4., 1.

2., 3., 5., 8.

3., 8., -2., 9.

If the row index is 2 and the column index is 4, the output will be 8. If the row index is 5, regardless of the column index, the output will be 0.

3.3.4 Trapezoidal and Square Blocks

The trapezoidal waveform block (LKUP_TZ) and square waveform block (LKUP_SQ) are specific types of lookup tables: the output and the input relationship is either a trapezoidal or a square waveform.

Images:

LKUP_TZ

LKUP_S

For the trapezoidal waveform block:

Attributes:

Parameters

Rising Angle theta

Peak Value

Description

Rising angle

θ

, in deg.

Peak value V

pk

of the waveform

For the square waveform block:

Attribute:

Parameters

Pulse Width (deg.)

Description

Pulse width

θ

in half cycle, in deg.

The waveforms of these two blocks are shown below. Note that the input v

in

is in deg., and can be in the range of -360 o

to 360 o

. Both waveforms are half-wave and quarter-wave symmetrical.



v o

V pk

0

-V pk

θ

LKUP_TZ

180 o

360 o

v in

0

-1

v o

1

LKUP_SQ

θ

180 o

360 o

v in

3.3.5 Sampling/Hold Block

A sampling/hold block output samples the input when the control signal changes from low to high (from 0 to 1), and holds this value until the next point is sampled.

Image:

SAMP

The node at the bottom of the block is for the control signal input.

The difference between this block and the zero-order hold block (ZOH) is that this block is treated as a continuous element and the sampling moments can be controlled externally; whereas the zero-order hold block is a discrete element and the sampling moments are fixed and of equal distance.

For a discrete system, the zero-order hold block should be used.

Example:

In this example, a sinusoidal input is sampled. The control signal is implemented using a square wave voltage source with an amplitude of 1.



v in v ctrl v o

3.3.6 Round-Off Block

The image of a round-off block is shown below:

Image:

ROUNDOFF

Attribute:

Parameters

No. of Digits

Truncation Flag

Description

No. of digits N after the decimal point

Truncation flag (1: truncation; 0: round-off)

Assume the input of the round-off block is V

in

, this input is first scaled based on the following expression:

V

=

V in

⋅

10

N

If the truncation flag is 1, the output will be equal to V

in,new

truncated, and then divided by

10

N

. Otherwise, the output will be equal to V

in,new

rounded off to the nearest integer, and then divided by 10

N

.

Examples:

If V

in

= 34.5678; N = 0, truncation flag = 0, then the output V

out

= 35. If V

in

= 34.5678; N =

0, truncation flag = 1, then the output V

out

= 34. If V

in

= 34.5678; N = 1, truncation flag =



1, then the output V

out

= 34.5. If V

in

= 34.5678; N = -1, truncation flag = 1, then the output

V out

= 30.

3.3.7 Time Delay Block

A time delay block delays the input waveform by a specified amount of time interval. It can be used to model the propagation delay of a logic element.

Image:

TDELAY

Attribute:

Parameters

Time Delay Time delay, in sec.

Description

Note that the difference between this block and the unit delay block (UDELAY) is that this block is a continuous element and the delay time can be arbitrarily set; whereas the unit delay block is a discrete element and the delay time is equal to the sampling period.

For a discrete system, the unit delay block should be used.

Example:

In this circuit, the first time delay block has a delay time of 1 ms, and the second block has a delay time of 4 ms. This example illustrates that the input of the time delay block can be either an analog or a digital signal.

1 ms

v

in1

v

o1

v

in2

v

o2

4 ms

v

in2

v

o2



3.3.8 Multiplexer

The output of a multiplexer is equal to a selected input depending on the control signal.

Three multiplexers are provided: multiplexers with 2 inputs; 4 inputs; and 8 inputs.

Image:

MUX2

MUX4 d0

MUX8 d0 d1 s0

Y d0 d1 d2 d3 s1 s0

Y d7 s2 s1 s0

Y

In the images, d0..d7 are the data inputs; and s0..s2 are the control signals. The truth tables of the multiplexers are:

2-Input MUX s0

0

1

Y d0 d1 0

1

1

4-Input MUX s1 s0

0 0

1

0

1

Y d0 d1 d2 d3

1

1

1

0

1

0

0

8-Input MUX s2 s1 s0

0 0 0

0

1

1

0

1

0

1

0

0

1

1

1

0

1 d3 d4 d5 d6 d7

Y d0 d1 d2

Note that the data input could be either an analog or digital signal.

Example:

The following circuit performs the function of selecting the maximum value out of two inputs. When V

a

is greater than V

b

, the comparator output will be 1, and V

o

= V

a

. Otherwise V

o

= V

b

.



3.4

Subcircuit Blocks

3.4.1 Operational Amplifier

An ideal operational amplifier (op. amp.) is modelled using the PSIM power circuit elements, as shown below.

Image:

OP_AMP

V

-

V

+

V o

V

-

V

+

OP_AMP_1

V o gnd

V

+

V

-

OP_AMP_2 gnd

V o

V

+

V

-

Circuit Model of the Op. Amp.

R o

A*(V

+

- V

-

)

Vs-

Vs+

V o gnd where

V+; V- noninverting and inverting input voltages

V

A o

- output voltage

- op. amp. gain (A is set to 100,000.)

R o

- output resistance (R o

is set to 80 Ohms)

Attributes:

Parameters

Voltage Vs+

Voltage Vs-

Description

Upper voltage source level of the op. amp.

Lower voltage source levels of the op. amp.


Subcircuit Blocks

The difference between OP_AMP and OP_AMP_1 and OP_AMP_2 is that, for OP_AMP, the reference ground node of the op. amp. model is connected to the power ground, whereas in OP_AMP_1 and OP_AMP_2, the reference ground node of the model is accessible and can be floating.

Note that the image of the op. amp. OP_AMP is similar to that of the comparator. For the op. amp., the inverting input is at the upper left and the noninverting input is at the lower left. For the comparator, it is the opposite.

Example: A Boost Power Factor Correction Circuit

The figure below shows a boost power factor correction circuit. It has the inner current loop and the outer voltage loop. The PI regulators of both loops are implemented using op.

amp.

Comparator

3.4.2 THD Block

For an ac waveform that contains both the fundamental and harmonic components, the total harmonic distortion of the waveform is defined as:

THD

=

V

------

V

1

=

V

2

----------------------------

V

1

–

V

2

1 where V

1

is the fundamental component (rms), V

h

is the harmonic rms value, and V

rms

is the overall rms value of the waveform. The THD block is modelled as shown below.

Image:



THD

v in

(t)

THD

v

1

(t)

v in

(t)

Circuit Model of the THD Block

V rms

V h

V

1

THD

v

1

(t)

A second-order band-pass filter is used to extract the fundamental component. The center frequency and the passing band of the band-pass filter need to be specified.

Attributes:

Parameters

Fundamental

Frequency

Passing Band

Description

Fundamental frequency of the input, in Hz

Passing band of the band-pass filter, in Hz

Example:

In the single-phase thyristor circuit below, a THD block is used to measure the THD of the input current. The delay angle of the thyristor bridge is chosen as 30 o

. For the THD block, the fundamental frequency is set at 60 Hz and the passing band of the filter is set at 20 Hz.

The simulation results are shown on the right.

v s i s

alpha=30 deg.

THD

i

s1

One of the THD block output is the input current fundamental component i

s1

. By comparing the phase difference between the input voltage v

s

and the current i

s1

, one can calculate the input displacement power factor. This, together with the THD value, can be used to calculate the input power factor.


Logic Components

3.5

Logic Components

3.5.1 Logic Gates

Basic logic gates are AND, OR, XORGATE (exclusive-OR), NOT, NAND, and NOR gates.

Images:

ANDGATE ORGATE

NOTGATE

XORGATE

ANDGATE3

ORGATE3

NANDGATE

NORGATE

3.5.2 Set-Reset Flip-Flop

There are two types of set-reset flip-flops. One is edge-triggered and the other is level-triggered.

Attributes:

Parameters

Trigger Flag

Description

Trigger flag (0: edge-triggered; 1: level-triggered)

The edge-triggered flip-flop only changes the states at the rising edge of the set/reset input. The truth table of an edge-triggered flip-flop is:

S

0

0

↑

↑

R

0

↑

0

↑

Q

1 not used

Q no change

0 1

0

The level-triggered flip-flop, on the other hand, changes the states based on the input level. The truth table of a level-triggered set-reset flip-flop is:

0

1

S

0

1

R

0

1

0

1

Q no change

0

1 not used

Q

1

0



Image:

SRFF

3.5.3 J-K Flip-Flop

The J-K flip-flop is positive edge-triggered. The truth table is:

J

0

0

1

1

K

0

1

0

1

D

↑

↑

↑

↑

0

1

Q Q no change

Toggle

1

0

Image:

JKFF

3.5.4 Monostable Multivibrator

In a monostable multivibrator, the positive (or negative) edge of the input signal triggers the monostable. A pulse, with the specified pulse width, will be generated at the output.

The output pulse width can be either fixed or adjusted through another input variable. The latter type of monostables is referred to as controlled monostables (MONOC). Its on-time pulse width, in second, is determined by the control input.

Image:

MONO MONOC

Attribute:

Parameters

Pulse Width


Description

On-time pulse width, in sec.

Digital Control Module

For the controlled monostable block, the input node at the bottom is for the input that defines the pulse width.

3.5.5 Pulse Width Counter

A pulse width counter measures the width of a pulse. The rising edge of the input activates the counter. At the falling edge of the input, the output gives the width of the pulse (in sec.). During the interval of two falling pulse edges, the pulse width counter output remains unchanged.

Image:

PWCT

3.6

Digital Control Module

The Digital Control Module, as an add-on option to the standard PSIM program, provides discrete elements, such as zero-order hold, z-domain transfer function blocks, digital filters, etc., for studies of digital control schemes.

As compared to a s-domain circuit which is continuous, a z-domain circuit is discrete. Calculation is, therefore, only performed at the discrete sampling points and there is no calculation between two sampling points.

3.6.1 Zero-Order Hold

A zero-order hold samples the input at the point of sampling. The output remains unchanged between two sampling points.

Image:

ZOH

Attribute:

Parameters

Sampling Frequency

Description

Sampling frequency, in Hz, of the zero-order hold

Like all other discrete elements, the zero-order hold has a free-running timer which determines the moment of sampling. The sampling moment, therefore, is synchronized with the



origin of the simulation time. For example, if the zero-order hold has a sampling frequency of 1000 Hz, the input will be sampled at 0, 1 msec., 2 msec., 3 msec., and so on.

Example:

In the following circuit, the zero-order hold sampling frequency is 1000 Hz. The input and output waveforms are shown on the left.

Note that in above circuit, a continuous-domain integrator is also connected to the input sine source. This makes it a mixed continuous-discrete circuit, and a simulation time step selected for the continuous circuit will be used. With this time step, the familiar staircaselike waveform can be observed at the zero-order hold output.

Without the integrator, the circuit becomes a discrete circuit. In this case, since only the calculation at the discrete sampling points is needed, the simulation time step will be equal to the sampling period, and the results at only the sampling points are available. The waveforms, as shown below, appear continuous. In fact the waveforms are discrete, and the connection between two sampling points makes it look like continuous.

3.6.2 z-Domain Transfer Function Block

A z-domain transfer function block is expressed in polynomial form as:



If a

0

= 1, the expression Y(z) = H(z) * U(z) can be expressed in difference equation as:

y n

=

b

0

[

a

1

⋅

⋅

u n

+

b

1

(

– 1

)

⋅

+

a

(

2

⋅

– 1

)

+ ...

+

b

N

(

– 2

)

+ ...

+

⋅

a

(

N

⋅

–

(

N

)

–

–

N

) ]

Image:

=

b

+

+

...

...

+

+

b a

N

– 1

N

– 1

⋅

---------------------------------------------------------------------------------------------

a

0

⋅

⋅

z z

N

N

+

+

b a

1

⋅

⋅

z z

N

– 1

N

– 1

⋅

z z

+

+

b a

N

TFCTN_D

Attributes:

Parameters

Order N

Coeff. b

0

...b

N

Coeff. a

0

...a

N

Sampling Frequency

Description

Order N of the transfer function

Coefficients of the nominator (from b

0

to b

N

)

Coefficients of the nominator (from a

0

to a

N

)

Sampling frequency, in Hz

Example:

The following is a second-order transfer function:

3

=

z

2

+

⋅

+ 400.e

3 with a sampling frequency of 3 kHz. In SIMCAD, the specifications are:

Order N 2

Coeff. b

0

...b

N

Coeff. a

0

...a

N

0. 0. 400.e3

1. 1200. 400.e3

Sampling Frequency 3000.

3.6.2.1 Integrator

There are two types of integrators. One is the regular integrator (I_D). The other is the



resettable integrator (I_RESET_D).

Images:

I_D

I_RESET_D

Attribute:

Parameters

Algorithm Flag

Initial Output Value

Reset Flag

Sampling Frequency

Description

Flag for integration algorithm

0: trapezoidal rule

1: backward Euler

2: forward Euler

Initial output value

Reset flag (0: edge reset; 1: level reset)


The output of the resettable integrator can be reset by an external control signal (at the bottom of the block). For the edge reset (reset flag = 0), the integrator output is reset to zero at the rising edge of the control signal. For the level reset (reset flag = 1), the integrator output is reset to zero as long as the control signal is high (1).

If we define u(t) as the input, y(t) as the output, T as the sampling period, and H(z) as the discrete transfer function, the input-output relationship of an integrator can be expressed under different integration algorithms as follows.

With trapezoidal rule:

=

2

⋅

-----------

z

– 1

y n

=

(

– 1

)

+

T

2

⋅ (

u n

+

(

– 1

) )

With backward Euler:

H z

=

T

⋅

z

– 1

y n

=

(

– 1

)

+

⋅



With forward Euler:

H z

=

T

⋅

z

– 1

y n

=

(

– 1

)

+

⋅ (

– 1

)

3.6.2.2 Differentiator

The transfer function of a discrete differentiator is:

=

T

⋅

z

–

z

1 where T is the sampling period. The input-output relationship can be expressed in difference equation as:

=

1

T

⋅ (

u n

–

(

– 1

) )

Image:

D_D

Attribute:

Parameters

Sampling Frequency

Description


3.6.2.3 Digital Filters

Two types of digital filters are provided: general digital filter (FILTER_D) and finite impulse response (FIR) filter.

The transfer function of the general digital filter is expressed in polynomial form as:

=

b a

0

+

z z

–

–

+

+

...

...

+

+

b a z z

–

(

–

(

b a

N

N

⋅

z

-----------------------------------------------------------------------------------------------------------

+

b a

1

⋅

⋅

1

1

N

– 1

N

– 1

⋅

⋅

N

– 1

N

– 1

)

)

+

+

⋅

z

–

N

–

N

If a

0

= 1, the output y and input u can be expressed in difference equation form as:

y n

=

b

0

⋅

u n

+

b

1

⋅ (

– 1

)

+ ...

+

b

N

⋅ (

–

N

)

–



[

a

1

⋅ (

– 1

)

+

a

2

⋅ (

– 2

)

+ ...

+

a

N

⋅ (

–

N

) ]

If the denominator coefficients a

0

..a

N

are not zero, this type of filter is called infinite impulse response (IIR) filter.

The transfer function of the FIR filter is expressed in polynomial form as:

H z

=

b

0

+

b

1

⋅

z

– 1

+ ...

+

b

N

– 1

⋅

z

–

(

N

– 1

)

+

b

N

⋅

z

–

N

If a

0

= 1, the output y and input u can be expressed in difference equation form as:

y n

=

b

0

⋅

u n

+

b

1

⋅ (

– 1

)

+ ...

+

b

N

⋅ (

–

N

)

Filter coefficients can be specified either directly or through a file. The following are the filter images and attributes when filter coefficients are specified directly.

Images:

FILTER_D FILTER_FIR

Attributes:

Parameters

Order N

Coeff. b

0

...b

N

Coeff. a

0

...a

N

Sampling Frequency

Description

Order N of the transfer function

Coefficients of the nominator (from b

0

to b

N

)

Coefficients of the nominator (from a

0

to a

N

)


The following are the filter images and attributes when filter coefficients are specified through a file.

Images:

FILTER_D1 FILTER_FIR1



Attributes:

Parameters

File for Coefficients

Sampling Frequency

Description

Name of the file storing the filter coefficients


The coefficient file has the following format:

For Filter_FIR1:

N b

0

b

1

... ... ...

b

N

For Filter_D1, the format can be either one of the following:

N b

0

b

1

b

N a

0

a

1

... ... ...

a

N

... ... ...

or

N b

0,

a

0

b

1,

a

1

... ... ...

b

N, a

N

Example:

To design a 2nd-order low-pass Butterworth digital filter with the cut-off frequency fc =

1 kHz, assuming the sampling frequency fs = 10 kHz, using MATLAB

*

, we have:

Nyquist frequency fn = fs / 2 = 5 kHz

Normalized cut-off frequency fc* = fc/fn = 1/5 = 0.2

[B,A] = butter (2, fc*) which will give:

B = [0.0201 0.0402 0.0201 ] = [b

0

b

1

b

2

]

*. MATLAB is a registered trademark of MathWorks, Inc.



A = [ 1 -1.561 0.6414 ] = [a

0

a

1

a

2

]

The transfer function is:

=

0.0201

+ 0.0402 z

– 1

+

⋅

z

– 1

+

The input-output difference equation is:

y n

=

⋅ ( )

+

⋅ (

– 1

)

+

– 2

– 2

⋅ (

– 1

)

– 0.6414

⋅ (

– 2

)

The parameter specification of the filter in SIMCAD will be:

Order N

Coeff. b

0

...b

N

2

0.0201 0.0402 0.0201

Coeff. a

0

...a

N

1. -1.561 0.6414

Sampling Frequency 10000.

If the coefficients are stored in a file, the file content will be:

2

0.0201

0.0402

0.0201

1.

-1.561

0.6414

Or the file can also have the content as follows:

2

0.0201, 1

0.0402, -1.561

0.0201, 0.6414

3.6.3 Unit Delay

The unit delay block provides one sampling period delay of the input signal.

Image:



UDELAY

Attribute:

Parameters

Sampling Frequency

Description


The difference between the unit delay block and the time delay block (TDELAY) is that the unit delay block is a discrete element and it delays the sampled points by one sampling period, whereas TDELAY is a continuous element and it delays the whole waveform by the delay time specified.

3.6.4 Quantization Block

The quantization block is used to simulate the quantization error during the A/D conversion.

Image:

DIGIT

Attribute:

Parameters

No. of Bits

Vin_min

Vin_max

Vo_min

Vo_max

Sampling Frequency

Description

Number of bits N

Lower limit of the input value V

in,min

Upper limit of the input value V

in,max

Lower limit of the output value V

o,min

Upper limit of the output value V

o,max


The quantization block performs two functions: scaling and quantization.

The input value V

in

, sampled at the given sampling frequency, is first scaled based on the following:



V ox

=

V

+

V

–

V

----------------------------------------- V

V

–

V

(

–

V

)

The number of bits determines the output resolution

∆

V which is defined as:

∆

V

=

V

–

V

--------------------------------------

N

2 – 1

The output V

o

will be equal to the truncated value of V

ox

based on the resolution

∆

V.

Example:

If N = 4, V

in,min

= 0, V

in,max

= 10, V

o,min

= -5, V

o,min

= 5, and V

in

= 3.2, then:

V ox

= -5 + (3.2 - 0) * (5 - (05)) / (10 - 0) = -1.8

∆

V = (5 - (-5)) / (2

4

- 1) = 0.66667

The value -1.8 is between -2.33332 and -1.66665. Therefore, the lower value is selected, that is, V

o

= -1.66665.

3.6.5 Circular Buffer

A circular buffer is a memory location that can store an array of data.

Image:

C_BUFFER

Attribute:

Parameters

Buffer Length

Sampling Frequency

The length of the buffer

Description


The circular buffer stores data in a buffer. When the pointer reaches the end of the buffer, it will start again from the beginning.

The output of the circular buffer is a vector. To access to each memory location, use the memory read block MEMREAD.



Example:

If a circular buffer has a buffer length of 4 and sampling frequency of 10 Hz, we have the buffer storage at different time as follows:

Time

0

0.1

0.2

0.3

0.4

... ... ...

Input

0.11

0.22

0.33

0.44

0.55

1

0.11

Value at Memory Location

2 3

0 0

0.11

0.11

0.22

0.22

0

0.33

0.11

0.55

0.22

0.22

0.33

0.33

0.44

0.44

0

0

4

0

3.6.6 Convolution Block

A convolution block performs the convolution of the two input vectors. The output is also a vector.

Image:

CONV

Let the two input vectors be:

A = [ a m

a m-1

a m-2

... a

1

]

B = [ b n

b n-1

b n-2

... b

1

]

We have the convolution of A and B as:

C

=

A

⊗

B

=

[c m+n-1

c m+n-2

... c

1

] where c i

=

Σ

[ a k+1

* b j-k

], k=0, ..., m+n-1; j=0, ..., m+n-1; i=1, ..., m+n-1

Example:



If A = [1 2 3] and B = [4 5], we have m = 3; n = 2; and the convolution of A and B as C =

[4 13 22 15].

3.6.7 Memory Read Block

A memory read block can be used to read the value of a memory location of a vector.

Image:

MEMREAD

Attribute:

Parameters

Memory Index Offset

Description

Offset from the starting memory location

This block allows one to access the memory location of elements, such as the convolution block, vector array, and circular buffer. The index offset defines the offset from the starting memory location.

Example:

Let a vector be A = [2 4 6 8], if index offset is 0, the memory read block output is 2. If the index offset is 2, the output is 6.

3.6.8 Data Array

This is a one-dimensional array. The output is a vector.

Image:

ARRAY ARRAY1

Attributes:

Parameters

Array Length

Values

File for Coefficients

Description

The length of the data array N (for ARRAY only)

Values of the array (for ARRAY only)

Name of the file storing the array (for ARRAY1 only)



If the array is read from a file, the file will have the following format:

N a

1

... ... ...

a

N

where N is the length of the array, and a

1

..a

N

are the array values.

Example:

To define an array A = [2 4 6 8], we will have: Array Length = 4; Values = 2 4 6 8. If the array is to be read from a file, the file will be:

4

2.

4.

6.

8.

3.6.9 Multi-Rate Sampling System

A discrete system can have more than one different sampling rate. The following system is used to illustrate this.

The system below has 3 sections. The first section has a sampling rate of 10 Hz. The output, Vo, fed back to the system and is sampled at 4 Hz in the second section. In the third section, the output is displayed at a sampling rate of 2 Hz.

It should be noted that a zero-order hold must be used between two elements having different sampling rates.



Vo


Simulation Control

Chapter 4: Other Components

4.1

Simulation Control

By selecting Simulation Control in the Simulate menu in SIMCAD, the following simulation control parameters can be modified.

Time Step

Total Time

Print Time

Print Step

Load Flag

Save Flag

Simulation Control Parameters

Simulation time step, in sec.

Total simulation time, in sec.

Time from which simulation results are saved to the output file. No output is saved before this time.

Print step. If the print step is set to 1, every data point will be saved to the output file. If it is 10, only one out of 10 data points will be saved. This helps to reduce the size of the output file.

Flag for the LOAD function. If the flag is 1, the previous simulation values will be loaded from a file (with the “.ssf” extension) as the initial conditions.

Flag for the SAVE function. If the flag is 1, values at the end of the current simulation will be saved to a file with the

“.ssf” extension.

With the SAVE and LOAD functions, the circuit voltages/currents and other quantities can be saved at the end of a simulation session, and loaded back as the initial conditions for the next simulation session. This provides the flexibility of running a long simulation in several shorter stages with different time steps and parameters. Components values and parameters of the circuit can be changed from one simulation session to the other. The circuit topology, however, should remain the same.

In PSIM, the simulation time step is fixed throughout the simulation. In order to ensure accurate simulation results, the time step must be chosen properly. The factors that limit the time step in a circuit include the switching period, widths of pulses/waveforms, and intervals of transients. It is recommended that the time step should be at least one magnitude smaller than the smallest of the above.

The allowable maximum time step is automatically calculated in PSIM. It is compared with the time step set by the user, and the smaller value of the two will be used in the simulation. If the selected time step is different from the one set by the user, it will be saved to the file “message.doc”.


Chapter 4: Other Components

4.2

Time

The Time element is a special case of the piecewise linear voltage source. It is treated as a grounded voltage source, and the value is equal to the simulation time, in sec.

Images:

Time

4.3

Parameter File

The parameter file element .FILE defines the name of the file that stores the component parameters and limit settings. For example, the resistance of a resistor can be specified as

R1, and in the parameter file, the value of R1 is defined.

Image:

.FILE

The parameter file is a text file created by the user. The format of the parameter file is:

<name> = <value>

<name> <value>

LIMIT <name> <lower limit> <upper limit>

* A comment line

The field <value> can be either a numerical number (e.g. “R1 = 12.3”) or a mathematical expression (e.g. “R3 = R1 + R2/2.”). The name and the value can be separated by either an equation sign (e.g. “R1 = 12.3”) or a space (e.g. “R1 12.3”). Text from the character “%” to the end of the line is treated as comments (e.g. “% R3 is the load resistance”).

For example, a parameter file may look like the following:

R1=12.3

R2 23.4Ohm

% R3 is the load resistance

R3=R1+R2/2.

L1=3m

C1=100uF

[R1 is defined as 12.3]

[Equation sign can be replaced by space]

[This line is comments]

[Math expression is allowed]

[power-of-ten suffix is allowed. L1=0.003]


Independent Voltage/Current Sources

LIMIT R3 5. 25.

[R3 is limited between 5. and 25.]

The names R1, R2, R3, L1, and C1 can be used in SIMCAD to define component parameters, and the actual values are defined here.

4.4

Independent Voltage/Current Sources

Several types of independent voltage/current sources are available in PSIM. The notation of the current source direction is defined as: the current flows out of the higher-potential node, through the external circuit, and back into the lower-potential node of the source.

Note that current sources, regardless of the type, can be used in the power circuit only.

4.4.1 DC Source

A dc source has a constant amplitude. One side of the dc voltage VDC_GND is grounded

Images:

VDC VDC_CELL VDC_GND

IDC

Attributes:

Parameters

Amplitude Amplitude of the source

Description

4.4.2 Sinusoidal Source

A sinusoidal source is defined as:

v o

=

V m

⋅ sin

(

2

π ⋅ ⋅

+

θ )

+

V offset

The specifications can be illustrated as follows.

V m

V offset

θ/(2π

f

)

1/f

t



Images:

VSIN

ISIN

Attributes:

Parameters

Peak Amplitude

Frequency

Phase Angle

DC Offset

Tstart

Description

Peak amplitude V

m

Frequency f, in Hz

Initial phase angle

θ

, in deg.

DC offset V

offset

Starting time, in sec. Before this time, the source is 0.

To facilitate the creation of three-phase circuits, a symmetrical three-phase Y-connected sinusoidal voltage module (VSIN3) is provided. The dotted phase of the module refers to

Phase A.

Image:

VSIN3 a b c

Attributes:

Parameters

V (line-line-rms)

Frequency

Init. Angle (phase A)

Description

Line-to-line rms voltage amplitude

Frequency f, in Hz

Initial angle for Phase A

4.4.3 Square-Wave Source

A square-wave voltage source (VSQU) or current source (ISQU) is defined by its peak-topeak amplitude, frequency, duty-cycle, and DC offset. The duty cycle is defined as the ratio between the high-potential interval versus the period.


Images:


ISQU

VSQU

Attributes:

Parameters

Vpeak-peak

Frequency

Duty Cycle

DC Offset

Description

Peak-to-peak amplitude V

pp

Frequency, in Hz

Duty cycle D of the high-potential interval

DC offset V

offset

The specifications of a square wave source are illustrated as follows.

D*T

V pp

V offset

0

T

t

(T=1/f)

4.4.4 Triangular Source

A triangular-wave voltage source (VTRI) or current source (ITRI) is defined by its peakto-peak amplitude, frequency, duty-cycle, and DC offset. The duty cycle is defined as the ratio between the rising-slope interval versus the period.

Images:

VTRI ITRI

Attributes:

Parameters

Vpeak-peak

Description

Peak-to-peak amplitude V

pp



Frequency

Duty Cycle

DC Offset

Frequency, in Hz

Duty cycle D of the rising slope interval

DC offset V

offset

The specifications of a triangular wave source are illustrated as:

0

D*T

T

V pp

(T=1/f)

V offset t

4.4.5 Step Source

A step voltage/current source changes from one level to another at a given time.

Images:

VSTEP/VSTEP_1

ISTEP/ISTEP_1

Attributes:

For VSTEP/ISTEP:

Vstep

Tstep


Value V

step

after the step change

Time T

step

at which the step change occurs

For VSTEP_1/ISTEP_1:

Parameters

Vstep1

Vstep2

Tstep

Description

Value V

step1

before the step change

Value V

step2

after the step change

Time T

step

at which the step change occurs



T_transition Transition time T

transition

from V

step1

to V

step2

The specifications of the voltage step sources are illustrated as follows:

VSTEP

V step

VSTEP_1

V step2

V step1

T transition

0

T step t

0

T step t

4.4.6 Piecewise Linear Source

The waveform of a piecewise linear source consists of many linear segments. It is defined by the number of points, the values and the corresponding time (in sec.).

Images:

VGNL/VGNL_1

IGNL/IGNL_1

Attributes:

For VGNL/IGNL:

Parameters

Frequency

No. of Points n

Values V1...Vn

Time T1...Tn

Description

Frequency of the waveform, in Hz

No. of points

Values at each point

Time at each point, in sec.

For VGNL_1/IGNL_1:

Parameters

Frequency

Description

Frequency of the waveform, in Hz

Times, Values (t1,v1) ...

Time and value at each point

The time and value pair must be enclosed by left and right brackets. The time and value



can be separated by either a comma (such as (1.2m,5.5)) or a space (such as (1.2m 5.5)), or both (such as (1.2m, 5.5)).

Example:

The following is a non-periodic piecewise linear source. It has 3 segments which can be defined by four points (marked in the figure).

3

2

1

0

0.1

0.2

Time (sec.)

0.3

The specifications for VGNL will be:

Frequency

No. of Points n

Values V1...Vn

Times T1...Tn

0.

4

1. 1. 3. 3.

0. 0.1 0.2 0.3

The specifications for VGNL_1 will be:

Frequency 0.

Times, Values (t1,v1)...

(0., 1) (0.1, 1) (0.2, 3) (0.3, 3)

4.4.7 Random Source

The amplitude of a random voltage source (VRAND) or a current source (IRAND) is determined randomly at each simulation time step. A random source is defined as:

v o

=

V m

⋅

n

+

V offset

where V

m

is the peak-to-peak amplitude of the source, n is a random number in the range of 0 to 1, and V

offset

is the dc offset.

Images:

VRAND

IRAND


Voltage/Current-Controlled Sources

Attributes:

Parameters

Peak-Peak Amplitude

DC Offset

Description

Peak-to-peak amplitude of the source

DC offset

4.5

Voltage/Current-Controlled Sources

Four types of controlled sources are available:

- Voltage controlled voltage source (VVCVS)

- Current controlled voltage source (VCCVS/VCCVS_1)

- Voltage controlled current source (IVCCS)

- Current controlled current source (ICCCS/ICCCS_1)

- Variable-gain voltage controlled voltage source (VVCVSV)

- Variable-gain voltage controlled current source (IVCCSV)

For current controlled voltage/current source (VCCVS/ICCCS), the controlling current must come from a RLC branch. Also, for a controlled current source, the controlling voltage/current can not be an independent source.

Note that voltage/current-controlled sources can be used in the power circuit only.

Images:

VVCVS

VCCVS

VCCVS_1

IVCCS

ICCCS

ICCCS_1 VVCVSV IVCCSV

v

in1

v

in2

v

in1

v

in2

Attribute:

Gain


Gain of the source

For voltage-controlled sources VVCVS/IVCCS, the controlling voltage is from the positive node (+) to the negative node (-). For current-controlled sources VCCVS/ICCCS, the control nodes are connected across a RLC branch, and the direction of the controlling current is indicated by the arrow. For current-controlled sources VCCVS_1/ICCCS_1, the controlling current flows into one control node and out of the other. A 10-uOhm resistor is used to sense the controlling current.



For variable-gain controlled voltage/current sources, Input 1 is on the side with the multiplication sign, and Input 2 is on the side with the letter “k”

For the controlled voltage/current sources, the output is equal to the gain multiplied by the controlling voltage or current, respectively. For the variable-gain controlled voltage/current sources, however, the output is equal to the following:

v o

=

(

in2

) ⋅

v

in1

i o

=

( ⋅

in2

) ⋅

v

in1

The difference between the variable-gain controlled sources and the nonlinear sources

VNONM/INONM described in the following section is that for VNONM/INONM, values of both v

in1

and v

in2 at the current time step are used to calculate the output and are updated in each iteration. But for the variable-gain controlled sources, it is assumed that the change of v

in2

is small from one time step to the next, and the value of v

in2

at the previous time step is used at the current time step. This assumption is valid as long as v

in2 changes at a much slower rate as compared to v

in1

and the time step is small as compared to the change of v

in2

. The variable-gain controlled sources can be used in circuits which may otherwise have convergence problem with the nonlinear sources VNONM/INONM.

Example:

The circuits below illustrates the use of the current controlled voltage sources VCCVS and

VCCVS_1.

In the circuit on the left, the voltage source VCCVS is controlled by the inductor current

i s

. With a gain of 1, the waveform of the voltage v

is

is identical to that of i

s

. In this way, a current quantity can be converted to a voltage quantity.

The circuit on the right is equivalent to that on the left, except that the source VCCVS_1 is used instead.

V is

V is i s i s


Nonlinear Voltage-Controlled Sources

4.6

Nonlinear Voltage-Controlled Sources

The output of a nonlinear voltage-controlled source is either the multiplication, division, or square-root of the input voltage(s). They are defined as:

v o

=

in1

⋅

v

in2

i o

=

⋅

in1

⋅

v

in2

v o i o

=

=

k

⋅

v

---------

v

in2

k

⋅

v

---------

v

in2

v o

=

k

⋅

v

in1

i o

=

k

⋅

v

in1

VPOWERS - Voltage source where

v o

=

sign v in

⋅ ⋅ (

k

1

⋅

v in

)

k

2

In VPOWERS, the term sign(v

in

) is 1 if v

in

is positive, and it is -1 if v

in

is negative.

Note that these nonlinear voltage-controlled sources can be used in the power circuit only

Images:

VNONM

VNOND VNONSQ VPOWERS INONM

INOND

INONSQ

v

in1

v

in2

v

in1

v

in2

Attributes:

For all the sources except VPOWERS:

Gain

Parameters

Gain k of the source

Description

For VPOWERS:

Parameters

Gain

Coefficient k

1

Gain k of the source

Coefficient k

1

Description



Coefficient k

2

Coefficient k

2

For VNOND/INOND, Input 1 is on the side of the division sign.

4.7

Voltage/Current Sensors

Voltage/current sensors measure the voltages/currents of the power circuit and send the value to the control circuit. The current sensor has an internal resistance of 1

µΩ

.

Images:

VSEN

ISEN

Attribute:

Gain

Parameters

Gain of the sensor

Description

4.8

Speed/Torque Sensors

A speed sensor (WSEN) or a torque sensor (TSEN) can be used to measure the mechanical speed or torque. They are available in the Motor Drive Module only.

Images:

WSEN

TSEN

Attribute:

Gain

Parameters

Gain of the sensor

Description

If the reference direction of a mechanical system enters the dotted side of the sensor, it is

said that the sensor is along the reference direction. Refer to Section 2.5.1.1 for more

details. Note that the output of the speed sensor is in rpm.

The torque sensor measures the torque transferred from the dotted side of the sensor to the


Probes and Meters

other side alone the positive speed direction. To illustrate this, the following mechanical system is taken as an example:

Load 1

Load 2

Sensor 1

Sensor 2

T em

J

T

L1

J

L1

T

L2

J

L2

The system consists of one machine, 2 torque sensors, and 2 mechanical loads. The torques and moment of inertia for the machine and the loads are as labelled in the diagram.

The reference direction of this mechanical system is from left to right. The equation for this system can be written as:

(

J

+

J

L1

+

J

L2

) ⋅

d

ω

m

----------

dt

=

T em

–

T

L1

–

T

L2

The equivalent electrical circuit of the equation is shown below:

ω m

Sensor 1

Sensor 2

T em

J

T

L1

J

L1

T

L2

J

L2

Machine

Load 1

Load 2

The node voltage in the circuit represents the mechanical speed

ω m

. The current probe on the left represents the reading of the torque sensor No. 1. Similarly, the current probe on the right represents the reading of the torque sensor No. 2. Note that the second current probe is from right to left since Sensor 2 is opposite to the reference direction of the mechanical system.

The equivalent circuit also illustrates how mechanical power is transferred. The multiplication of the current to the voltage, which is the same as the torque times the mechanical speed, represents the mechanical power. If the power is positive, it is transferred in the direction of the speed

ω m

.

4.9

Probes and Meters

Probes and meters are used to request a voltage, current, or power quantity to be displayed. The voltage probe (VP) measures a node voltage with respect to ground. The twoterminal voltage probe (VP2) measures the voltage between two nodes. The current probe



(IP) measures the current through the probe. Note that all the probes and meters, except the node-to-ground probe VP, are allowed in the power circuit only.

While probes measure a voltage or current quantity in its true form, meters can be used to measure the dc or ac voltage/current, or the real power and reactive power. These meters function in the same way as the actual meters.

For the current probe, a small resistor of 1

µΩ

is used internally to measure the current.

Images:

Voltage Probe

VP

VP2

Current Probe

IP

DC Voltmeter

V_DC

AC Voltmeter

V_AC

DC Ammeter

A_DC

AC Ammeter

A_AC

Wattmeter

W

VAR Meter

VAR

3-phase Wattmeter

W3

3-phase VAR Meter

VAR3

VA-Power Factor Meter

VA_PF

3-phase VA-Power Factor Meter

VA_PF3

Attributes:

Parameters

Operating Frequency

Cut-off Frequency

VA Display Flag

PF Display Flag

DPF Display Flag

Description

Operating frequency, or fundamental frequency, in Hz, of the ac meter

Cut-off frequency, in Hz, of the low-pass/high-pass filter

Display flag for apparent power (0: no display; 1: display)

Display flag for power factor (0: no display; 1: display)

Display flag for displacement power factor (0: no display; 1: display)


Probes and Meters

A low-pass filter is used in the dc meter and wattmeter models to filter out the high-frequency components, whereas a high-pass filter is used in the ac meter and VAR meter models to filter out the dc component. The cut-off frequency determines the transient response of the filter.

Except the voltage current probes (VP/VP2/IP), the readings of all the meters are meaningful only when the readings reach the steady state.

For the single-phase VA-Power Factor meter, the apparent power (S), total power factor

(PF), and the displacement power factor (DPF) are defined as follows.

Assume both the voltage and current contains harmonics, i.e.

= 2V

1 sin

( ω

1

t

+

φ

1

)

+ 2V

2 sin

( ω

2

t

+

φ

2

)

+ ...

= 2I

1 sin

( ω

1

t

+

θ

1

)

+ 2I

2 sin

( ω

2

t

+

θ

2

)

+ ...

where

ω

1

is the fundamental frequency and all others are harmonic frequencies. We have the rms values of the voltage and current as:

V rms

=

2

V

1

+

V

2

2

+ ...

I rms

=

2

I

1

2

+

I

2

+ ...

The apparent power is defined as:

S

=

V rms

⋅

I rms

The real power (or average power) is defined as:

P

=

1

T

∫

T

0

( ( ) ⋅

i t

)

d t

where T is the fundamental period. The total power factor PF and the displacement power factor DPF are then defined as follow:

DPF

PF

=

=

S

cos

( φ

1

–

θ

1

)

For the three-phase circuit, the definitions are similar. Note that the meter VA_PF3 is for the 3-phase 3-wire circuit, and the summation of the three phase voltages or currents must be equal to zero, that is:

v a

+

v b

+

v c

= 0



i a

+

i b

+

i c

= 0

4.10

Switch Controllers

A switch controller has the same function as a switch gate/base drive circuit in an actual circuit. It receives the input from the control circuit, and controls the switches in the power circuit. One switch controller can control multiple switches simultaneously.

4.10.1 On-Off Switch Controller

On-off switch controllers are used as the interface between the control gating signals and the power switches. The input, which is a logic signal (either 0 or 1) from the control circuit, is passed to the power circuit as the gating signal to control switches.

Image:

ONCTRL

Example:

The circuit below implements the step change of a load. In the circuit, the on-off switch controller is used to control the bi-directional switch. The step voltage source, which is connected to the controller input, changes from 0 to 1 at the time of 12 ms. The closure of the switch results in the short-circuit of the resistor across the switch and the increase of the current.

On-off

Controller


Switch Controllers

4.10.2 Alpha Controller

The alpha controller is used for delay angle control of thyristor switches or bridges. There are three input for the controller: the alpha value, the synchronization signal, and the gating enable/disable signal. The transition of the synchronization signal from low to high

(from 0 to 1) provides the synchronization and this moment corresponds to when the delay angle alpha equals zero. A gating with a delay of alpha degrees is generated and sent to the thyristors. The alpha value is updated instantaneously.

Image:

ACTRL

Enable/Disable

Sync.

Signal

Alpha

Attributes:

Parameters

Frequency

Pulse Width

Description

Operating frequency of the controlled switch/switch module, in Hz

On-time pulse width of the switch gating, in deg.

The input for the delay angle alpha is in deg.

Example:

The figure below shows a thyristor circuit using delay angle control. In the circuit, the zero-crossing of v

s

, which corresponds to the moment that the thyristor would start conducting naturally, is used to provide the synchronization. The delay angle is set at 30 o

. The gating signal is delayed from the rising edge of the synchronization signal by 30 o

.

v s i

RL1 v sync



4.10.3 PWM Lookup Table Controller

There are four input signals in PWM lookup table controllers: the modulation index, the delay angle, the synchronization signal, and the gating enable/disable signal. The gating pattern is selected based on the modulation index. The synchronization signal provides the synchronization to the gating pattern. The gating pattern is updated when the synchronization signal changes from low to high. The delay angle defines the relative angle between the gating pattern and the synchronization signal. For example, if the delay angle is 10.

deg., the gating pattern will be leading the synchronization signal by 10 deg.

Image:

PATTCTRL

Enable/Disable

Delay

Angle

Mod.

Index

Sync.

Signal

Attributes:

Parameters

Frequency

Update Angle

File Name

Description

Switching frequency, in Hz

Update angle, in deg., based on which the gatings are internally updated. If the angle is 360 o

, the gatings are updated at every cycle. If it is 60 o

, the gatings are updated at every 60 o

.

Name of the file storing the PWM gating pattern

A lookup table, which is stored in a file, contains the gating patterns. It has the following format:

n, m

1

, m

2

, ..., m

n k

1

G

1,1

, G

1,2

, ..., G

1,k1

... ... ...

k n

G

n,1

, G

n,2

, ..., G

n,kn where n is the number of gating patterns; m

i

is the modulation index correspondent to Pattern i; and k

i

is the number of switching points in Pattern i. The modulation index array m

1 to m

n

should be monotonically increasing. The output will select the i th

pattern if the input is smaller than or equal to m

i

. If the input exceeds m

n

, the last pattern will be selected.


Switch Controllers

The following table shows an example of a PWM pattern file with five modulation index levels and 14 switching points.

5, 0.901, 0.910253, 0.920214, 1.199442, 1.21

14

7.736627 72.10303 80.79825 99.20176 107.8970 172.2634 180.

187.7366 252.1030 260.7982 279.2018 287.8970 352.2634 360.

14

7.821098 72.27710 80.72750 99.27251 107.7229 172.1789 180.

187.8211 252.2771 260.7275 279.2725 287.7229 352.1789 360.

14

7.902047 72.44823 80.66083 99.33917 107.5518 172.0979 180.

187.9021 252.4482 260.6608 279.3392 287.5518 352.0980 360.

14

10.186691 87.24225 88.75861 91.24139 92.75775 169.8133 180.

190.1867 267.2422 268.7586 271.2414 272.7578 349.8133 360.

14

10.189426 87.47009 88.97936 91.02065 92.52991 169.8106 180.

190.1894 267.4701 268.9793 271.0207 272.5299 349.8106 360.

In this example, if the modulation index input is 0.8, the output will select the first gating pattern. If the modulation index is 0.915, the output will select the third pattern.

Example:

This example shows a three-phase voltage source inverter (file: “vsi3pwm.sch”). The

PWM for the converter uses the selected harmonic elimination. The gating patterns are described above and are pre-stored in File “vsi3pwm.tbl”. The gating pattern is selected based on the modulation index. The waveforms of the line-to-line voltage and the threephase load currents are shown below.



4.11

Control-Power Interface Block

A control-power interface block passes a control circuit value to the power circuit. It is used as a buffer between the control and the power circuit. The output of the interface block is treated as a constant voltage source when the power circuit is solved. With this block, some of the functions that can only be generated in the control circuit can be passed to the power circuit.

Image:

CTOP

Example: A Constant-Power Load Model

For a constant-power dc load, the voltage V, current I, and power P have the relationship as P=V*I. Given the voltage and the power, the current can be calculated as I=P/V. This can be implemented using the circuit as shown below.

The load voltage is measured through a voltage sensor and is fed to a divider. The output of the divider gives the current value I. Since the voltage could be zero or a low value at the initial stage, a limiter is used to limit the current amplitude. This value is converted into the load current quantity through a voltage-controlled current source.

LOAD

V

I

P

k=1

Example:

The following circuit illustrates how a control circuit signal can be passed to the power circuit. As seen from the power circuit, the CTOP block behaviors as a grounded voltage source.


Control Circuit

ABC-DQO Transformation Block

Power Circuit

4.12

ABC-DQO Transformation Block

Function blocks ABC2DQO and DQO2ABC perform the abc-dqo transformation. They convert three voltage quantities from one coordinate system to another. These blocks can be used in either the power circuit or the control circuit.

It should be noted that, in the power circuit, currents must first be converted into voltage quantities (using current-controlled voltage sources) before they can be transformed.

The transformation equations from abc to dqo are:

v d v q v o

=

3

⋅ cos

θ sin

θ cos sin

θ

–

2

π

3

θ

–

2

π

3

2 2 cos

θ

+

2

π

3 sin

θ

+

2

π

3

2

⋅

v a v b v c

The transformation equations from dqo to abc are:

v a v b v c

= cos cos

θ

θ

–

2

π

3 cos

θ

+

2

π

3 sin sin

θ

θ

–

2

π

3 sin

1

1

θ

+

2

π

3



1

⋅

v d v q v o

Images:



ABC2DQO DQO2ABC

θ

θ

Example:

In this example, three symmetrical ac waveforms are transformed into dqo quantities. The angle

θ

is defined as

θ

=

ω t where

ω

=2

π

*60. Since the angle

θ

changes linearly with time, a piecewise linear voltage which has a ramp waveform is used to represent tion waveforms show the three-phase ac (top), the angle

θ

. The simula-

θ

(middle), and the dqo output. In this example, the “q” component is constant, and both the “d” and the “o” components are zero.

4.13

External DLL Block

The external DLL (dynamic link library) blocks allow users to write code in C or Fortran language, compile it into DLL using either Microsoft C/C++, Borland C++, or Digital

Visual Fortran, and link it with PSIM. These blocks can be used in either the power circuit or the control circuit.

Image:


External DLL Block

DLL_EXT12

DLL_EXT1

1

2

3 input

DLL_EXT3

1

2

3 output

DLL_EXT6

Attributes:

Parameters

File Name Name of the DLL file

Description

The node with a dot is for the first input (in[0]).

The name of the custom routine must be one of the following:

For Microsoft C/C++: ms_user0.dll, ms_user1.dll, ms_user2.dll, ..., ms_user14.dll.

For Borland C++: bc_user0.dll, bc_user1.dll, bc_user2.dll, ..., bc_user9.dll.

For Digital Visual Fortran: for_user0.dll, for_user1.dll

One can, therefore, have up to 15 Microsoft C/C++ routines, 10 Borland C++ routines, and 2 Fortran routines.

A DLL block receives the values from PSIM as the input, performs the calculation, and sends the output back to PSIM. PSIM calls the DLL routine at each simulation time step.

However, when the inputs of the DLL block are connected to one of these discrete elements (zero-order hold, unit delay, discrete integrators and differentiators, z-domain transfer function blocks, and digital filters), the DLL block is called only at the discrete sampling times.

Sample files are provided for Microsoft C/C++, Borland C++, and Fortran routines. Users can use these files as the template to write their own. Procedures on how to compile the

DLL routine and link with PSIM are provided in these files and in the on-line help.

Example:

The following shows a power factor correction circuit with the inductor current and the load voltage feedback. The input voltage is used to generate the current reference. The control scheme is implemented in a digital environment, with a sampling rate of 30 kHz.

The control scheme is implemented in an external C code and is interfaced to the power circuit through the DLL block.



The input of the DLL block are the sampled input voltage, inductor current, and output voltage. One of the DLL block outputs is the modulation wave V

m

, which is compared with the carrier wave to generate the PWM gating signal for the switch. The other output is the inductor current reference for monitoring purpose.

The source code, which is stored in the file “ms_user4.c”, is shown below. Both the inner current loop and the outer voltage loop use a PI controller. Trapezoidal rule is used to discretize the controllers. Discretization using Backward Euler is also implemented but the codes are commented out.


External DLL Block

// This is a sample C program for Microsoft C/C++ which is to be linked to PSIM via DLL.

//To compile the program into DLL:

// For Microsoft Visual C++ 5.0 or 6.0:

// - Create a directory called "C:\ms_user4", and copy the file "ms_user4.c"

// that comes with the PSIM software into the directory C:\ms_user4.

// - Start Visual C++. From the "File" menu, choose "New". In the "Projects" page,

// select "Win32 Dynamic-Link Library", and set "Project name" as

// "ms_user4", and "Location" as "C:\ms_user4". Make sure that "Create

// new workspace" is selected, and under "Platform", "Win32" is selected.

// - [for Version 6.0] When asked "What kind of DLL would you like to create?",

// select "An empty DLL project.".

// - From the "Project" menu, go to "Add to Project"/"Files...", and select

// "ms_user4.c".

// - From the "Build" menu, go to "Set Active Configurations...", and select

// "Win32 Release". From the "Build" menu, choose "Rebuild All" to generate the

// DLL file "ms_user4.dll". The DLL file will be stored under the directory

// "C:\ms_user4\release".

// After the DLL file "ms_user4.dll" is generated, backup the default file into another file or directory,

// and copy your DLL file into the PSIM directory (and overwriting the existing file). You are then ready

// to run PSIM with your DLL.

// This sample program implement the control of the circuit "pfvi-dll.sch" in a C routine.

// Input: in[0]=Vin; in[1]=iL; in[2]=Vo

// Output: Vm=out[0]; iref=out[1]

// Activate (enable) the following line if the file is a C++ file (e.g. “ms_user4.cpp”)

// extern “C”

// You may change the variable names (say from "t" to "Time").

// But DO NOT change the function name, number of variables, variable type, and sequence.

// Variables:

// t: Time, passed from PSIM by value

// delt: Time step, passed from PSIM by value

// in: input array, passed from PSIM by reference

// out: output array, sent back to PSIM (Note: the values of out[*] can be modified in PSIM)

// The maximum length of the input and output array "in" and "out" is 20.

// Warning: Global variables above the function ms_user4 (t,delt,in,out) are not allowed!!!

#include <math.h>

__declspec(dllexport) void ms_user4 (t, delt, in, out)

// Note that all the variables must be defined as "double" double t, delt; double *in, *out;



{

// Place your code here............begin

double Voref=10.5, Va, iref, iL, Vo, Vm, errv, erri, Ts=33.33e-6; static double yv=0., yi=0., uv=0., ui=0.;

// Input

Va=fabs(in[0]); iL=in[1];

Vo=in[2];

// Outer Loop errv=Voref-Vo;

// Trapezoidal Rule yv=yv+(33.33*errv+uv)*Ts/2.; iref=(errv+yv)*Va;

// Inner Loop erri=iref-iL;

// Trapezoidal Rule yi=yi+(4761.9*erri+ui)*Ts/2.;

Vm=yi+0.4*erri;

// Store old values uv=33.33*errv; ui=4761.9*erri;

// Output out[0]=Vm; out[1]=iref;

// Place your code here............end

}

4.14

Simulated Frequency Response Analyzer

Similar to the actual frequency response analyzer, the Simulated Frequency Response

Analyzer (SFRA) measures the frequency response of a system between the input and the output. The input of the analyzer must be connected to a sinusoidal source. The response, measured in dB for the amplitude and in deg. for the phase angle, is calculated at the end of the simulation and is stored in a file with the “.fre” extension.

Image:

SFRA

Input Output

The current version of SFRA only calculates the frequency response at one point. T obtain the frequency response over a frequency region, one needs to manually change the


Simulated Frequency Response Analyzer

excitation frequency for different values.

In order to obtain accurate results, one should make sure that the output reaches the steady state at the end of the simulation. Moreover, the amplitude of the sinusoidal excitation source needs to be properly selected to maintain the small-signal linearity of the system.

Example:

The following example illustrates the use of the simulated frequency response analyzer in a one-quadrant chopper circuit. A simulated frequency response analyzer is used to measure the frequency response of the output voltage versus the reference voltage. The dc duty cycle is chosen as 0.7. An ac perturbation with the amplitude of 0.1 is generated through an ac source. The load filter cut-off frequency is 291 Hz. In this example, the perturbation source frequency is also chosen as 291 Hz. The simulated frequency response results are: Gain=13.7 dB and Phase=-90.05

o

at the frequency of 291 Hz.

SFRA

The simulated waveforms of the load voltage, modulation wave and the carrier wave are shown on the right.




Chapter 5: Circuit Schematic Design Using SIMCAD

SIMCAD provides interactive and user-friendly interface for the circuit schematic design.

The following figure shows a rectifier circuit in the SIMCAD environment.

In SIMCAD, all the PSIM components are stored under the menu Elements. The structure of the PSIM component library is as follows:

Library Elements

- Power

- RLC Branches

- Switches

- Transformers

- Motor Drive

- Control

- Filters

- Function Blocks

- Logic Elements

Description

Power circuit elements

R, L, C, lumped RLC branches, and coupled inductors

Switches/switch modules and the gating element

1-phase and 3-phase transformers

Electric machines and mechanical loads

Control circuit elements

Built-in filter blocks

Function blocks

Logic gates and other digital elements


Chapter 5: Circuit Schematic Design Using SIMCAD

- Discrete Elements

- Other

- Switch Controllers

- Sensors

- Probes

- Sources

- Voltage

- Current

Discrete elements

Elements shared by power and control circuits

Switch controllers

Voltage/current and speed/torque sensors

Voltage/current probes and meters, and power meters

Voltage sources

Current sources

5.1

Creating a Circuit

The following functions are provided in the SIMCAD for circuit creation.

Get

To get an element from the component library, click on the Elements menu. Choose the submenu and highlight the element to be selected.

Place

For example, to get a dc voltage source, click on Elements, Sources, and

Voltage, then highlight “Vdc”.

Once an element is selected from the menu, the image of the element will appear on the screen and move with the mouse.

Click the left button of the mouse to place the element.

Once an element is selected, select Rotate to rotate the element.

Rotate

Wire

Label

To connect a wire between two nodes, select Wire. An image of a pen will appear on the screen. To draw a wire, keep the left button of the mouse pressed and drag the mouse. A wire always starts from and end at a grid intersection.

For easy inspection, a floating node is displayed as a circle, and a junction node is displayed as a solid dot.

If two or more nodes are connected to the same label, they are connected. It is equivalent as though they were connected by wire. Using labels will reduce the cross-wiring and improve the layout of the circuit schematic.

The text of a label can be moved. To select the text, left click on the label,


Assign

Editing a Circuit

then press the Tab key.

To assign the parameters of an element, double click on the element. A dialog box will appear. Specify the values and hit the <Return> key or click on

OK.

5.2

Editing a Circuit

The following functions are provided in the Edit menu and View menu for circuit editing:

Select

To select an element, click on the element. A rectangle will appear around the element.

Copy

Delete

Move

Text

Zoom

Esc

To select a block of a circuit, keep the left button of a mouse pressed and drag the mouse until the rectangle covers the selected area.

To copy an element or a block of the circuit, select the element or the region, and choose Copy. Then choose Paste place the element or circuit.

To delete an element, a block of a circuit, or a wire, select the item, and choose Cut, or hit the <Delete> key. Note that if Cut is used, the last deleted item can be pasted back. This is equivalent to un-do.

To move an element or a circuit block, select the element/circuit block and drag the mouse while keeping the left button pressed.

To place text on the screen, choose Text. Enter the text in the dialog box, and click the left button of the mouse to place it.

Select Zoom In to zoom in the circuit, or Zoom In Selected to zoom in to a selected region. Choose Zoom Out to zoom out, or Fit to Page to zoom out to fit the entire circuit to the screen.

Quit from any of the above editing modes by choosing Escape.

5.3

Subcircuit

The following functions are provided for subcircuit editing and manipulation.

New Subcircuit

To create a new subcircuit.

Load Subcircuit To load an existing subcircuit. The subcircuit will appear on the screen as a block.



Edit Subcircuit

To edit the size and the file name of the subcircuit.

Set Size

To set the size of the subcircuit.

Place Port

Display Port

To place the connection port between the main circuit and the subcircuit.

To display the connection port of the subcircuit.

Edit Default Variable List To edit the default variable list of the subcircuit.

Edit Image

To edit the image of the subcircuit.

Display Subcircuit Name To display the name of the subcircuit.

Show Subcircuit Ports To display the port names of the subcircuit in the main circuit.

Hide Subcircuit Ports To hide the port names of the subcircuit in the main circuit.

Subcircuit List

To list the file names of the main circuit and the subcircuits.

One Page up

Top Page

To go back to the main circuit. The subcircuit is automatically saved.

To jump from a lower-level subcircuit to the top-level main circuit.

This is useful for circuits with multiple layers of subcircuits.

The one-quadrant chopper circuit below illustrates the use of the subcircuit.

Subcircuit

Inside the subcircuit:

File: chop.sch

File: chop_sub.sch

5.3.1 Creating Subcircuit - In the Main Circuit

The following are the steps to create the subcircuit “chop_sub.sch” in the main circuit

“chop.sch”.

- Open or create the main circuit “chop.sch”.

- If the file “chop_sub.sch” does not exist, go to the Subcircuit menu, and select


Subcircuit

New Subcircuit. If the file exists, select Load Subcircuit instead.

- A subcircuit block (rectangle) will appear on the screen. Place the subcircuit.

Once the subcircuit is placed, connect the wires to the border of the subcircuit. Note that the nodes at the four corners of the subcircuit block can not be used for connection.

5.3.2 Creating Subcircuit - Inside the Subcircuit

To enter the subcircuit, double click on the subcircuit block.

- Create/edit the content of the subcircuit circuit exactly the same way as in the main circuit.

- To specify the subcircuit size, select Set Size in the Subcircuit menu. In this example, the size is set to 4x7 (width of 4 divisions and height of 7 divisions).

Note that the size of the subcircuit should be chosen such that it gives the proper appearance and allows easy wire connection in the main circuit.

- Once the subcircuit is complete, define ports to connect the subcircuit nodes with the corresponding nodes in the main circuit. Choosing Place Port in the Subcir-

cuit menu, and a port image will appear. After the port is placed in the circuit, a pop-up window (shown on the left below) will appear

Subcircuit port assignments

The diamonds on the four sides represent the connection nodes and the positions of the subcircuit. They correspond to the connection nodes of the subcircuit block on the right. There are no diamonds at the four corners since connections to the corners are not permitted.

When a diamond is selected, it is colored red. By default, the left diamond at the top is selected and marked with red color. Click on the desired diamond to select



and to specify the port name.

In this example, in the main circuit “chop.sch”, there are four linking nodes, two on the left side and two on the right side of the subcircuit block. The relative position of the nodes are that the upper two nodes are 1 division below the top and the lower two nodes are 1 division above the bottom.

To specify the upper left linking node, click on the top diamond of the left side, and type “in+”. The text “in+” will be within that diamond box and a port labelled with “in+” will appear on the screen. Connect the port to the upper left node. The same procedure is repeated for the linking nodes “in-”, “out+”, and

“out-”.

- After the four nodes are placed, the node assignment and the subcircuit appear in

SIMCAD as shown below.

The creation of the subcircuit is now complete. Save the subcircuit, and go back to the main circuit.

5.3.3 Connecting Subcircuit - In the Main Circuit

Once the subcircuit is created and connection ports are defined, complete the connection to the subcircuit block in the main circuit.

- In the main circuit, the connection points on the borders of the subcircuit block appear as hollow circles.

- Select the subcircuit block, and select Show Subcircuit Ports in the Subcircuit menu to display the port names as defined inside the subcircuit.

- Connect the wires to the connection points accordingly.


Subcircuit

5.3.4 Other Features of the Subcircuit

This section describes other features of the subcircuit through another example as shown below.

File: main.sch

Inside the subcircuit:

File: sub.sch

5.3.4.1 Passing Variables from the Main Circuit to Subcircuit

In this example, the main circuit “main.sch” uses a subcircuit “sub.sch”. In the subcircuit, the inductance value is defined as “L” and the capacitance is defined as “C”. The default values of L and C can be set by selecting Subcircuit | Set Default Variable List. In this case, L is set to 5mH and C is set to 100uF.

When the subcircuit is loaded into the main circuit the first time, this default variable list will appear in the tab “Subcircuit Variables” in Subcircuit | Edit Subcircuit from the main circuit “main.sch”. New variables can be added here and variable values can be changed. In this case, L is changed to 2mH, and C is kept the same as the default value.

Note that the variables and the values are saved to the netlist file and used in simulation.

The default variable list inside the subcircuit is not saved to the netlist and is not used for simulation.



This feature allows the parameters of a subcircuit to be defined at the main circuit level. In the case where the same subcircuit is used several times in one main circuit, different parameters can be assigned to the same variable. For example, if the subcircuit “sub.sch” is used two times in above example, in one subcircuit L can be defined as 3mH, and in another subcircuit L can be defined as 1mH.

Note that this example also illustrates the feature that parameters can be defined as a variable (for example “Vin” for the input dc voltage source) or a mathematical expression (for example “R1+R2” for the load resistance). The variables “Vin”, “R1”, and “R2”, are defined in the parameter file “para-main.txt”. For more details, see Section 4.3 of the

PSIM User Manual.

5.3.4.2 Customizing the Subcircuit Image

The following are the procedures to customize the subcircuit image of “sub.sch”:

- In the subcircuit, select Edit Image in the Subcircuit menu. A window will popup, as shown below.

In the window, the diamonds marked red are the connection nodes of the subcircuit block, in exactly the same positions as appearing in the main circuit.

- Use the drawing tool to create/edit the image for the subcircuit block. If the drawing tool is not already displayed, go to the View menu and check Drawing

Tools. Click on Zoom In and Zoom Out icons on the toolbar to adjust the size of the image working area.

After the image is created, the pop-out window will appear as follows.


Subcircuit

- Go back to the subcircuit window (“sub.sch” in this case), and save the subcircuit. The new subcircuit block image should appear in the main circuit.

5.3.4.3 Including Subcircuits in the SIMCAD Element List

If you create a directory called “User Defined” under the PSIM directory, and place subcircuits inside this directory. subcircuits will appear as an item in the Elements menu in

SIMCAD, under Elements | User Defined, just like any other SIMCAD elements. You can also create subdirectories under the directory User Defined, and place subcircuits inside the subdirectories. For example, the Elements menu may look like this:

- Power

- Control

- Other

- Sources

- Symbols

- User Defined

- Subcircuit 1

- Project A

- Subcircuit 2

- Subcircuit 3

- Project B

- Subcircuit 4

In this way, common-used custom-built subcircuits can be grouped together and easily managed and accessed.



5.4

Other Options

5.4.1 Simulation Control

Before a circuit can be simulated, simulation control parameters must be specified. By choosing Simulation control in the Simulate menu, an image of a clock will appear on the screen. After double clicking on the clock, simulation control parameters can be specified.

Refer to Section 4.1 for more details on simulation parameters.

5.4.2 Running the Simulation

To run the simulation, choose Run PSIM from the Simulate menu. This will create the netlist file with the “.cct” extension, and start the PSIM simulator.

To view the simulation results, choose Run SIMVIEW from the Simulate menu. Refer to

Chapter 6 for the use of SIMVIEW.

5.4.3 Password Protection of a Circuit Schematic

If you wish others to run the simulation of a file that you created, but do not want to reveal the circuit schematic, you can use the password protection feature. Select Save with Pass-

word in the File menu to set the password protection of a file. In case you lose the password, it is strongly recommended that you make a backup copy of the file before protecting it.

Once the file is protected, the display of the circuit is disabled, but one can still perform the simulation and view the waveforms. One must enter the correct password to view the schematic by selecting Enter Password in the Options menu. The password protection can be disabled by selecting Disable Password in the Options menu.

5.4.4 Settings

Grid display, text fonts, and colors can be set in the Settings... in the Option menu.

Before a circuit is printed, its position on the paper can be viewed by selecting Print Page

Border in the Settings... option. If a circuit is split into two pages, it can be moved into one single page. If the circuit is too big to fit in one page, one can zoom out and reduce the circuit size by clicking the Zoom Out button.

Print page legend, such as company name, circuit title, designer’s name, date, etc., can be specified by choosing Print Page Setup in the File menu. It can be disabled in the Set-

tings... option.

In the Option menu, if Auto-Exit PSIM is checked, if PSIM performs the simulation suc-


Editing SIMCAD Library

cessfully without error or warning messages, the PSIM window will be closed automatically.

5.4.5 Printing the Circuit Schematic

The circuit schematic can be printed from a printer by choosing Print in the File menu. It is also possible to print the selected region of a circuit by choosing Print Selected.

The schematic can also be saved to the clipboard which can be imported into a word processor (such as Microsoft Word). By default, the schematic image is saved in monochrome in order to save memory space. One can save the image in color by selecting Edit/Copy to

Clipboard/Color.

5.5

Editing SIMCAD Library

The SIMCAD library can be edited by choosing Edit Library in the Edit menu. The library editor allows one to edit the existing elements, or to create new elements. Note that new types of elements will not be recognized by PSIM simulator as it only recognizes the existing elements provided in the SIMCAD library

5.5.1 Editing an Element

To edit an element, go to the specific element, and double click on the element name. The image of the element will appear.

Use the drawing tools on the left to modify the element image. Click on the zoom-in icon to zoom in the element.

To change the attribute settings, choose Attributes in the View menu. Double click on a parameter. For each parameter, if “Display as Text Link” is checked, the display of this parameter can be enabled or disabled in the attribute pop-up window, and the value of this parameter will appear in the list of elements when List Elements in the View menu is selected. If “Initial Display State” is checked, the display will be on by default.

5.5.2 Creating a New Element

The following is the procedure to create a new element:

- Choose New Element in the Library menu.

- Specify the netlist name.

- Modify the width and the height of the element by selecting Set Size in the Edit menu.



- Specify the terminal nodes. The nodes are defined by clicking on the diamonds on the left and on the right. Numerical numbers “1” and “2” will appear. These numbers determine the sequence of the nodes in the netlist.

- Create the component images using the drawing utilities provided.

- Specify the attributes of the element.

In the Menu Editor, the new element can be deleted, or moved to a different location.

5.5.3 Ground Element

There are two grounds in SIMCAD, “Ground” and “Ground_1”. They have different images, but the functions are exactly the same. Node connected to either of the ground element are automatically assigned a node name of “0”.


Chapter 6: Waveform Processing Using SIMVIEW

SIMVIEW is a waveform display and post-processing program. The following shows simulation waveforms in the SIMVIEW environment.

SIMVIEW reads data in the ASCII text format. The following shows a sample data file:

Time I(L1) V(o) V(a) V(pi)

0.1000000E-04 0.000000E+00 -0.144843E-18 0.307811E+00 0.100000E+01

0.2000000E-04 0.000000E+00 -0.289262E-18 0.615618E+00 0.100000E+01

0.3000000E-04 0.000000E+00 -0.576406E-18 0.923416E+00 0.100000E+01

0.4000000E-04 0.000000E+00 -0.860585E-18 0.123120E+01 0.100000E+01

0.5000000E-04 0.000000E+00 -0.114138E-17 0.153897E+01 0.100000E+01

0.6000000E-04 0.000000E+00 -0.141920E-17 0.184671E+01 0.100000E+01

0.7000000E-04 0.000000E+00 -0.169449E-17 0.215443E+01 0.100000E+01

0.8000000E-04 0.000000E+00 -0.196681E-17 0.246212E+01 0.100000E+01

0.9000000E-04 0.000000E+00 -0.223701E-17 0.276978E+01 0.100000E+01

0.1000000E-03 0.000000E+00 -0.250468E-17 0.307739E+01 0.100000E+01

Functions in each menu are explained below.


Chapter 6: Waveform Processing Using SIMVIEW

6.1

File Menu

Function

Open

Open Binary

Merge

Re-Load Data

Save

Save As

Load text data file

Load SIMVIEW binary file

Description

Merge another data file with the existing data file for display

Re-load data from the same text file

In the time display, save waveforms to a SIMVIEW binary file with the .smv extension.

In the FFT display, save the FFT results to a text file with the .fft extension. The data range saved will be the same as shown on the screen.

In the time display, save waveforms to a SIMVIEW binary file specified by the user.

In the FFT display, save the FFT results to a text file specified by the user.

Print

Print the waveforms

Print Setup

Set up the printer

Print Page Setup

Set up the hardcopy printout size

Print Preview

Exit

Preview the printout

Quit SIMVIEW

When the data of a text file are currently being displayed, after new data of the same file have become available, by selecting Re-Load Data, waveforms will be re-drawn based on the new data.

By using the Merge function, data from multiple files can be merged together for display.

For example, if one file contains the curves “I1” and “I2”, and another file contains the curves “V1” and “V2”, all four curves can be merged and displayed on one screen. Note that if the second file also contains a curve with the same name “I1”, it will be modified to

“I1_1” automatically.

6.2

Edit Menu

Function Description

Copy to Clipboard

Copy the waveforms to the clipboard


Axis Menu

Edit Title

Edit the title of the printout. By default, the title shows the file name and path.

6.3

Axis Menu

X Axis


Y Axis

Axis Label Setting

Change the settings of the X axis

Change the settings of the Y axis

Change the settings of the X/Y axis labels

Default X-Axis: Time

If the item is checked, the first column, which is usually Time, will be used as the X axis.

The dialog box of the X/Y axis settings are shown below.

If the Auto-Scale box is checked and the Grid Division is chosen as default, the maximum data range will be selected and the number of axis divisions will be automatically determined. Both the data range and grid division, however, can be manually set.

In the Axis Label Setting, the label font size can be changed, and the display of the label can be disabled.

By default, the option Default X-Axis: Time is selected. That is, the first column of the data, which is usually Time, is used as the X axis. If this option is not selected, any other column of the data can be used as the X axis. For example, the following figure shows a sine waveform as the X-axis versus a cosine waveform in the Y-axis.



Note that this option can only be selected or de-selected when there are no documents in the SIMVIEW environment.

6.4

Screen Menu


Add/Delete Curves

Add or delete curves from the selected screen

Add Screen

Delete Screen

Add a new screen

Delete the selected screen

A screen is selected by clicking the left mouse on top of the screen.

The dialog box of the Add/Delete Curves function is shown below.

Edit Box

All the data variables available for display are in the Variables Available box, and the vari-


View Menu

ables currently being displayed are in the Variables for Display box. After a variable is highlighted in the Variables Available box, it can be added to the Variables for Display box by clicking on “Add ->”. Similarly, a variable can be removed from display by highlighting the variable and clicking on “<- Remove”.

In the Edit Box, an mathematical expression can be specified.

A mathematical expression can contain brackets and is not case sensitive. The following math functions are allowed:

-

+ addition subtraction

/

* multiplication division

^ to the power of [Example: 2^3 = 2*2*2]

SQRT square-root function

SIN

COS sine function cosine function

TAN tangent function

ATAN inverse tangent function

EXP

LOG exponential (base e) [Example: EXP(x) = e x

] logarithmic function (base e) [Example: LOG(x) = ln (x)]

LOG10 logarithmic function (base 10)

ABS absolute function

SIGN sign function [Example: SIGN(1.2) = 1; SIGN(-1.2)=-1]

Type this expression in the Edit Box, and click on “Add ->”. Highlight the expression on the right, click on “<- Remove”, and the expression will be moved into the Edit Box for further editing.

6.5

View Menu

Zoom

Function

Re-Draw

Measure

Escape

Max

Description

To zoom into a selected region

To re-draw the waveform using the auto-scale

To measure the values of the waveforms

To escape from the Zoom or Measure mode

To find the global maximum of a selected curve



Min

Next Max

Next Min

Toolbar

Status Bar

To find the global minimum of a selected curve

To find the next local maximum of a selected curve

To find the next local minimum of a selected curve

To enable/disable toolbar

To enable/disable status bar

A region is selected by pressing the left button of the mouse and, at the same time, drag the mouse.

The Measure function allows the measurement of waveforms. After Measure is selected, the measurement dialog box will appear. By clicking the left mouse, a line will appear and the values of the waveforms will be displayed. By clicking the right mouse, another line will appear and the different between the current position and the previous position, which is marked by the left mouse, will be measured. A SIMVIEW window with the measurement boxes in these two modes are shown below.

Left mouse click

Right mouse click

Once Measure is selected, an individual curve can be selected by clicking on the name of the curve at the left top of the graph, and the four functions, Max, Min, Next Max, and

Next Min can be used to evaluate the curve. Note that these four functions are only enabled in the Measure mode and after a curve is selected.

In the zoom-in mode, waveforms can be shifted horizontally or vertically. There are left and right arrows below the x-axis, and up and down arrows in the far right axis. By click-


Option Menu

ing on the arrow, the waveforms will be shifted by one division.

6.6

Option Menu

FFT

Function

Time

Set Text Fonts

Description

Perform the Fast Fourier Transform analysis

Switch from the frequency spectrum display to time domain display

Change the text font type and size

Set Curves

Change the display of curves

Set Background

Set the screen background to be either Black (default) or White

Grid

Enable or disable the grid display

Color

Set the curves to be either Color (default) or Black and White

By selecting FFT, the harmonic amplitudes of time domain waveforms can be calculated and displayed. Note that, in order to obtain correct FFT results, the simulation should reach the steady state, and the simulation data should be restricted (using the manual range setting in the X Axis function) to have the integer number of the fundamental period.

The display of a curve can be changed through Set Curves. The data points of a curve can have either no symbol, or one of the following symbols: Circle, Rectangle, Triangle, Plus, and Star. Also, data points can be either connected or discrete.

To change the settings of a curve, first select the curve using the left mouse, then choose the proper settings, and click on Apply. After all the settings are selected, Click on OK.

The dialog box of the Set Curves function is shown below.



Once “Color” is de-selected, the display becomes black-and-white. If the waveform screen is copied to the clipboard, the bitmap image will be in monochrome. This will result a much smaller memory size as compared to the image in color display.

6.7

Label Menu

Text

Line

Function

Dotted Line

Arrow

Place text on the screen

Draw a line

Draw a dotted line

Draw a line with arrow

Description

To draw a line, first select Line from the Label menu. Then click the left mouse at the position where the line begins, and drag the mouse while keeping the left button pressed.

Dotted lines and lines with arrows are drawn in the same way.

If one is in the Zoom or Measure mode, and wishes to edit a text or a label, one should first escape from the Zoom/Measure mode by selecting “Escape” in the “View” menu.

6.8

Exporting Data

As stated in Section 6.1, FFT results can be saved to a text file. Therefore, both simulation results (*.txt) and FFT results (*.fft) are in text format and can be edited using a text editor

(such as Microsoft NotePad), or exported to other software (such as Microsoft Excel).

For example, to load a simulate result file “chop-1q.txt” in Microsoft Excel, follow these steps:

- In Microsoft Excel, select Open from the File menu. Open the file “chop-1q.txt”.

- In the dialog window “ Text Import Wizard - Step 1 of 3”, under Original data type, choose Delimited. Click on Next.

- In the dialog window “ Text Import Wizard - Step 2 of 3”, under Delimiters, choose

Space. Click on Next.

- In the dialog window “Text Import Wizard - Step 3 of 3”, under Column data format, choose General. Click on Finish.


Simulation Issues

Chapter 7: Error/Warning Messages and General Simulation Issues

7.1

Simulation Issues

7.1.1 Time Step Selection

PSIM uses the fixed time step in the simulation. In order to assure accurate results, the simulation time step should be properly chosen. The factors that limit the time step in a circuit include the switching period, widths of pulses or square waveforms, and intervals of fast transients. It is recommended that the time step should be at least one magnitude smaller than the smallest of the above.

7.1.2 Propagation Delays in Logic Circuits

The logic elements in PSIM are ideal, i.e. there is no propagation delay. For a logic circuit that utilizes the propagation delays for its operation, a function block in PSIM, called the

Time Delay block (TDELAY), can be used to represent the effect of the propagation delay.

To illustrate this, take a two-bit counter circuit as an example.

Q

1

Q

0

Q

1

Q

0 clock clock

1 V

1 V

In the circuit on the left, the initial values of both Q0 and Q1 are assumed to be zero. At the clock rising edge, Q0 will change to 1. Without delay, the position of Q1, which should remain at 0, will toggle to 1 at the same time.

To prevent this, a time delay element with the delay period of one time step is inserted between Q0 and the input (J) of the second flip-flop.

7.1.3 Interface Between Power and Control Circuits

In PSIM, power circuits are represented in the discrete circuit form, and control circuits


Chapter 7: Error/Warning Messages and General Simulation Issues

are represented in transfer function block diagram. Power circuit components, such as

RLC branches, switches, transformers, mutual inductors, current sources, floating voltage sources, and all types of controlled sources are not allowed in the control circuit. Similarly, control circuit components, such as logic gates, PI controllers, lookup tables, and other function blocks, are not allowed in the power circuit.

If there is a direct connection between the power circuit and the input of a control circuit element, a voltage sensor will be automatically inserted by the program. Similarly, if there is a direct connection between the output of a control circuit element and the power circuit, a control-power interface block (CTOP) will be automatically inserted. This is illustrated in the examples below.

Comparator

Comparator

Transfer Function op. amp.

Transfer Function op. amp.

It should be noted that, in PSIM, the power circuit and the control circuit are solved separately. There is one time step delay between the power and the control circuit solutions.

7.1.4 FFT Analysis

When using FFT for the harmonic analysis, one should make sure that the following requirements are satisfied:

- The waveforms have reached the steady state;

- The length of the data selected for FFT should be the multiple integer of the fundamental period.

For a 60-Hz waveform, for example, the data length should be restricted to 16.67 msec.

(or multiples of 16.67 msec.). Otherwise, the FFT results will be incorrect.

7.2

Error/Warning Messages

The error and warning messages are listed in the following.


Error/Warning Messages

E-1 Input format errors occurred in the simulation.

It may be caused by one of the following:

- Incorrect/Incomplete specifications

- Wrong input for integers and character strings

Make sure that the PSIM library is not modified, and the PSIM simulator is up-todate.

In the circuit file, character strings should be included between two apostrophes

(like ‘test’). Also, make sure an integer is specified for an integer variable. The specification of a real number (like 3. instead of 3) for an integer will trigger the error message.

E-2 Error message: The node of an element is floating.

This can also be caused by a poor connection in SIMCAD. When drawing a wire between two nodes, make sure that the wire is connected to the terminal of the element.

E-3 Error message: No. of an element exceeds the limit.

This error message occurs when the total number of a particular element exceeds the limit specified by the program. This problem can only be solved by re-compiling the PSIM simulator with increased array dimensions. Please contact Powersim

Technologies Inc. for assistance.

W-1 “Warning!!! The program failed to converge after 10 iterations when determining switch positions. The computation continues with the following switch positions: ...

...”

This warning occurs when the program fails to converge when determining switching positions. Since the computation continues based on the switch positions at the end of the 10th iteration, results could be inaccurate. One should be cautious when analyzing the results.

There are many factors that cause this problem. The following measures can be taken to isolate and solve the problem:

- Check the circuit and make sure the circuit is correct

- Check the switch gating signals

- Connect small resistors/inductors in series with switches and voltage


Chapter 7: Error/Warning Messages and General Simulation Issues

sources

7.3

Debugging

Some of the approaches in debugging a circuit is discussed in the following.

Symptom:

Simulation results show sudden changes (discontinuity) of inductor currents and capacitor voltages.

Solution:

This may be caused by the interruption of inductor current path and short-circuit of capacitor (or capacitor-voltage source) loops. Check the switch gating signals. If necessary, include overlap or dead time pulses to avoid open-circuit or shootingthrough.

If an initial current is assigned to an inductor, initial switch positions should be set such that a path is provided for the current flow. Otherwise, the inductor current will be forced to start from zero.

Symptom:

Simulation waveforms look incorrect or inaccurate, or the waveform resolution is poor.

Solution:

This may be caused by two reasons. One is the time step. Since PSIM uses the fixed time step during the entire simulation, one should make sure that the time step is sufficiently small. As a rule of thumb, the time step should be several tens times smaller than the switching period.

Another reason is the problem of waveform display. One should make sure that the print step I print

is not too big. To display all the data points, set I print

to 1.


Examples

Appendix A: Examples

Examples are included in this Appendix to illustrate the use of the program.

A.1

Phase-Controlled Rectifier (thy-3f.sch)

The following is a phase-controlled rectifier system with feedback control.

x10 -3

1500

1000

500 x10 0

0

200

100

-100

0

Vpi

Vdc

Vo

(ms)

The rectifier is controlled through an alpha controller. The synchronization of the controller is provided by the zero-crossing of the line voltage Vac. The alpha value is created through the load voltage feedback loop.

The simulation waveforms of the PI output (after the limiter), the rectifier output voltage, and the load voltage are shown on the right:

A.2

SPWM Three-Phase Voltage Source Inverter (vsi3spwm.sch)

The following is a three-phase voltage source inverter

The gatings are generated through sinusoidal pulse width modulation .The simulated waveforms of the Phase A modulation wave, the triangular carrier, and the three-phase load currents are shown below.

PSIM User Manual A-1

Examples

x10 0

1

0 x10 0

-1

50

0

-50

Vcarr

Vma

I(RL4a)

I(RL4b)

I(RL4c)

(ms)

A.3

Phase-Controlled Magnet Power Supply Using A Series Active Filter (rec-pwm.sch)

The following is a phase-controlled magnet power supply. In this system, a PWM converter connected in series with the rectifier is used as an active filter for harmonic cancellation and error compensation. A feedforward technique is used to control the rectifier.

The PWM converter is controlled through the load current error and the error signal between the desired voltage profile and the rectifier output voltage.

iref vref

+ vd

-

vc

+

+ vo

alpha x10 -3

2002

2000 x10 0

1998

15

10

5 x10 0

0

15

10

5

0

I(io)

Vd

Vo

(ms)

The simulated waveforms of the load current, rectifier voltage (after the low-pass filter), and the load voltage are shown.

A-2 PSIM User Manual

Examples

A.4

Cycloconverter Circuit (cyclo.sch)

The following is a cycloconverter circuit. It consists of two phase-controlled rectifier bridges. The bridge on the left conducts during the positive half cycle of the load current, while the one on the right conducts the negative half cycle. In order to detect the zerocrossing of the load current, a band-pass filter tuned at the load frequency is used to extract the fundamental component. The output of the comparator is used as the enable/ disable signal for the two bridges.

The simulated waveforms of the load voltage, load current (before and after the band-pass filter), and the currents through the positive and negative rectifier bridges are shown below:

A.5

One-Quadrant Chopper System with Full-State Feedback (state-1q.sch)

The following is a one-quadrant buck-type chopper circuit in transfer function block diagram. The chopper circuit is described through state space representation (enclosed in the dotted box). Both the output filter inductor current and the capacitor voltage are fedback to modify the pole location of the overall system. An outer voltage loop with the integral regulator is included to ensure zero steady state error.

The simulated output voltage and inductor current are shown below.

PSIM User Manual A-3

Examples

r v u

Plant iL vo y

60

40

20

0

30

20

10

0

0

Vo iL

(ms)

A-4 PSIM User Manual

Appendix B: List of Elements

The following is the list of the PSIM elements with brief descriptions.

BTHY6H

C

C_BUFFER

COMP

CONV

COS

COS_1

CSI3

CTOP

D

DCM

D_D

DIGIT

DIODE

Names

A_AC

ABC2DQO

ABS

ACTRL

A_DC

ANDGATE

ANDGATE3

ARRAY

BDCM3

BDIODE1

BDIODE3

BTHY1

BTHY3

BTHY3H

AC ammeter

ABC-DQO transformation block

Absolute value function block

Delay angle alpha controller

DC ammeter

AND gate

3-input AND gate

Vector array

3-phase permanent magnet brushless dc machine

Single-phase diode bridge

3-phase diode bridge

Single-phase thyristor bridge

3-phase thyristor bridge

3-pulse half-wave thyristor bridge

6-pulse half-wave thyristor bridge

Capacitor

Circular buffer

Comparator

Convolution block

Cosine function block

Arc cosine function block

3-phase PWM current source inverter

Control-to-power interface block

Differentiator

DC machine

Discrete differentiator

Quantization block

Diode

Description

PSIM User Manual B-1

Appendix B: List of Elements

Names

DIVD

DLL_EXT1

DLL_EXT3

DLL_EXT6

DLL_EXT12

DQO2ABC

EXP

.FILE

FFT

FILTER_BP2

FILTER_BS2

FILTER_D

FILTER_D1

FILTER_HP2

FILTER_FIR

FILTER_FIR1

FILTER_LP2

GATING/GATING_1

Ground/Ground_1

GTO

I

ICCCS/ICCCS_1

I_D

IDC

IGBT

IGNL/IGNL_1

INDM_3S

INDM_3SN

INOND

INONM

INONSQ

Description

Divider

External DLL block (1 input)

External DLL block (3 inputs)



DQO-ABC transformation block

Exponential function block

Parameter file element

Fast Fourier Transformer block

2nd-order band-pass filter

2nd-order band-stop filter

General digital filter

General digital filter

2nd-order high-pass filter

FIR filter

FIR filter

2nd-order low-pass filter

Switch gating block for gating specifications

Ground

Gate-Turn-Off thyristor

Integrator

Current controlled current source

Discrete integrator

DC current source

Insulated Gate Bipolar Transistor

Piecewise linear current source

3-phase squirrel-cage induction machine

3-phase squirrel-cage induction machine (stator neutral available)

Nonlinear current source (multiplication)

Nonlinear current source (division)

Nonlinear current source (square-root)

B-2 PSIM User Manual

Names

INONSP_1

INONOSP_2

IP

IRAND

I_RESET_D

ISIN

ISQU

ISTEP/ISTEP_1

ITRI

IVCCS

IVCCSV

JKFF

L

LIM

LKUP

LKUP_SQ

LKUP_TZ

LKUP2D

MECH_ELEC

MEMREAD

MLOAD

MLOAD_T

MLOAD_P

MLOAD_WM

MONO

MONOC

MOSFET/MOSFET_P

MULT

MUT2

MUT3

MUX2/MUX4/MUX8

Description

Special nonlinear current source (Type 1)

Special nonlinear current source (Type 2)

Current probe

Random current source

Resettable discrete integrator

Sinusoidal current source

Square-wave current source

Step current source

Triangular-wave current source

Voltage controlled current source

Variable-gain voltage controlled current source

JF Flip-Flop

Inductor

Limiter

Lookup table

Square waveform lookup table

Trapezoidal waveform lookup table

2-dimensional lookup table

Mechanical-electrical interface block

Memory read block

General type mechanical load

Constant-torque mechanical load

Constant-power mechanical load

Constant-speed mechanical load

Monostable multivibrator

Controlled monostable multivibrator

Metal-Oxide-Semiconductor Field Effect Transistor

Multiplier

Coupled inductor with 2 branches

Coupled inductor with 3 branches

Multiplexer with 2 inputs, 4 inputs, and 8 inputs



PATTCTRL

PI

PMSM3

PNP/PNP_1

POWER

PWCT

R

R3

RC

RC3

RESETI

RL

Names

NANDGATE

NORGATE

NOTGATE

NPN/NPN_1

Description

NAND gate

NOR gate

NOT gate npn bipolar junction transistor

ONCTRL On-off switch controller

OP_AMP Operational amplifier

OP_AMP_1/OP_AMP_2 Op, amp. with floating reference ground

ORGATE

ORGATE3

P

OR gate

3-input OR gate

Proportional controller

PWM lookup table controller

Proportional-Integral controller

3-phase permanent-magnet synchronous machine pnp bipolar junction transistor

Power function block

Pulse width counter

Resistor

3-phase resistor branch

Resistor-capacitor branch

3-phase resistor-capacitor branch

Resettable integrator

Resistor-inductor branch

RL3

RLC3

RMS

ROUNDOFF

SAMP

SFRA

SIGN

SIN

SRFF

3-phase resistor-inductor branch

3-phase resistor-inductor-capacitor branch

Root-mean-square function block

Round-off function block

Sampling/hold block

Simulated Frequency Response Analyzer

Sign function block

Sine function block

Set-Reset Flip-Flop


Names

SRM3

SQROT

SSWI

SUM1

SUM2

SUM2P

SUM3

TDELAY

TF_1F

TF_1F_3W

TF_1F_4W

TF_1F_5W

TF_1F_7W

TF_1F_8W

TF_3F

TF_3F_3W

TF_3DD

TF_3YD

TF_3YDD

TF_3YY

TF_3YYD

TF_3F_4W

TF_IDEAL

TFCTN

TFCTN_D

TG_1

THD

Description

3-phase switched reluctance machine (6 stator and 4 rotor teeth)

Square-root function block

Simple bi-directional switch

1-input summer

2-input summer (one positive and the other negative)

2-input summer (both positive)

3-input summer

Time delay block

Single-phase transformer

Single-phase transformer with 1 primary and 2 secondary windings





3-phase transformer (windings unconnected)

3-phase 3-winding transformer (windings unconnected)

3-phase D/D transformer

3-phase Y/D transformer

3-phase Y/D/D transformer

3-phase Y/Y transformer

3-phase Y/Y/D transformer

3-phase 4-winding transformer (windings unconnected)

Single-phase ideal transformer s-domain transfer function block z-domain transfer function block

Arc tangent function block

Total Harmonic Distortion block



THY

Time

UDELAY

V_AC

Names

VA_PF

VA_PF3

VAR

VAR3

VCCVS/VCCVS_1

VDC

VDC_CELL

V_DC

VDC_GND

VGNL/VGNL_1

VNOND

VNONM

VNONSQ

VP

VP2

VSI3/VSI_3

VSIN

VSIN3

VSQU

VSTEP/VSTEP_1

VTRI

VVCVS

VVCVSV

W

W3

XORGATE

ZENER

Description

Thyristor switch

Time element, in sec.

Unit delay

AC voltmeter

VA-power factor meter

3-phase VA-power factor meter

VAR meter

3-phase VAR meter

Current controlled voltage source

DC voltage source

DC voltage source with the battery cell image

DC voltmeter

Grounded DC voltage source

Piecewise linear voltage source

Nonlinear voltage source (multiplication)

Nonlinear voltage source (division)

Nonlinear voltage source (square-root)

Voltage probe (node to ground)

Voltage probe (between two nodes)

3-phase PWM voltage source inverter

Sinusoidal voltage source

3-phase sinusoidal voltage source

Square-wave voltage source

Step voltage source

Triangular-wave voltage source

Voltage controlled voltage source

Variable-gain voltage controlled voltage source

Wattmeter

3-phase wattmeter exclusive-OR gate

Zener diode


ZOH

Names

Zero-order hold

Description




PSIM User Manual

User Manual

Powersim Inc.

PSIM User Manual

Disclaimer

Table of Contents

Chapter 1 General Information

Chapter 2 Power Circuit Components

Chapter 3 Control Circuit Components

Chapter 4 Other Components

Chapter 5 Circuit Schematic Design Using SIMCAD

Chapter 6 Waveform Processing Using SIMVIEW

Chapter 7 Error/Warning Messages and General Simulation Issues

Appendix A: Examples A-1

Appendix B: List of Elements B-1

Chapter 1: General Information

Chapter 2: Power Circuit Components

Chapter 3: Control Circuit Components

∫

∑

Chapter 4: Other Components

∫

Chapter 5: Circuit Schematic Design Using SIMCAD

Chapter 6: Waveform Processing Using SIMVIEW

Chapter 7: Error/Warning Messages and General Simulation Issues

Appendix A: Examples

Appendix B: List of Elements

Related manuals

Table of contents

PSIM User Manual

User Manual

Powersim Inc.

PSIM User Manual

Disclaimer

Table of Contents

Chapter 1: General Information

Chapter 2: Power Circuit Components

Chapter 3: Control Circuit Components

∫

∑

Chapter 4: Other Components

∫

Chapter 5: Circuit Schematic Design Using SIMCAD

Chapter 6: Waveform Processing Using SIMVIEW

Chapter 7: Error/Warning Messages and General Simulation Issues

Appendix A: Examples

Appendix B: List of Elements

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Table of contents