InductEx v5.02 User Manual

InductEx v5.02 User Manual
InductEx User’s Manual
1
InductEx
User’s Manual
Version 5.02 - 2015
Coenrad J. Fourie
Stellenbosch University
Available at: www.inductex.info
This document dated 15 August 2015
InductEx User’s Manual
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Copyright © 2003-2015 by Coenrad Fourie
Permission is granted to anyone to make or distribute verbatim copies of this document as
received, in any medium, provided that the copyright notice and the permission notice are
preserved, and that the distributor grants the recipient permission for further redistribution as
permitted by this notice.
InductEx is a registered trademark of Stellenbosch University.
Linux is a registered trademark of Linus Torvalds.
Ubuntu is a registered trademark of Canonical Ltd.
Mac OS and OS X are registered trademarks of Apple Inc.
Windows is a registered trademark of Microsoft Corporation.
GDSII is a trademark of Calma, Valid, Cadence.
AutoCAD and DXF are trademarks of Autodesk Inc.
MATLAB is a registered trademark of The MathWorks Inc.
All other trademarks are the property of their respective owners.
InductEx User’s Manual
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Contents
1.
CREDITS
5
2.
INTRODUCTION
6
3.
INSTALLING INDUCTEX
7
3.1.
3.2.
3.3.
3.4.
MICROSOFT WINDOWS
LINUX
MAC OS X
LICENSE FILE
4.
LAYER DEFINITION FILE
5.
LAYOUT INPUT FILE REQUIREMENTS
5.1.
5.2.
5.3.
5.4.
5.5.
5.6.
5.7.
5.8.
6.
IXI
GDSII
CIF
DXC
PORT / TERMINAL DECLARATIONS
PORT LABEL INPUT FILE
EXTRACTION BOUNDARY
OPERATOR DECLARATIONS
INDUCTANCE CALCULATION WITH INDUCTEX
6.1.
6.2.
6.3.
6.4.
6.5.
6.6.
7.
CIRCUIT NETLIST FILE
MINIMUM SETUP REQUIREMENTS
SINGLE INDUCTOR EXAMPLE
SINGLE INDUCTOR EXAMPLE WITH NON-MANHATTAN GEOMETRY AND OFF-EDGE PORTS
THREE-INDUCTOR MULTI-LAYER EXAMPLE
MUTUAL INDUCTANCE EXAMPLE WITH GROUND PLANE HOLE
OUTPUT FILES
7.1.
7.2.
7.3.
SOL.TXT
I_IMAG.OUT
EXTRACT.OUT
7
7
8
8
8
17
17
18
18
19
19
20
20
21
21
21
22
22
25
26
28
29
29
30
30
8.
INTERPRETING SOLUTIONS AND CONTROLLING ACCURACY
31
9.
TECHNIQUES FOR SPEEDING UP THE EXTRACTION TIME
31
10.
BUNDLED VISUALIZATION TOOLS
31
11.
INTEGRATION INTO EXISTING CAD TOOLS
32
11.1.
11.2.
12.
12.1.
13.
13.1.
13.2.
13.3.
13.4.
13.5.
13.6.
CADENCE VIRTUOSO
LAYOUTEDITOR
MODELLING
TERMINALS
EXAMPLES
CONFLUENCE CELL FOR FLUXONICS 1KA/CM2 PROCESS
JTL FOR ADP2 PROCESS
ETFF WITH SKYPLANE FOR HYPRES PROCESS
PULSE TRANSFER CIRCUIT IN STP2
COUPLED ANTENNAS WITHOUT GROUND PLANE IN IPHT PROCESS
SQUID IN HTS MONOLAYER PROCESS
32
32
32
32
33
33
33
33
33
33
33
14.
COMMAND LINE PARAMETERS / SWITCHES
33
15.
ENVIRONMENT VARIABLES
35
16.
SPECIFICATIONS
35
InductEx User’s Manual
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17.
EXIT CODES
37
18.
COMMON MISTAKES NEW USERS MAKE
39
19.
FREQUENTLY ASKED QUESTIONS
39
20.
KNOWN BUGS
40
21.
BINARIES AND SOURCE FILES DISTRIBUTED WITH INDUCTEX
40
22.
REFERENCES
40
23.
THIRD-PARTY SOFTWARE NOTICES AND LICENSES
41
23.1.
23.2.
24.
LAPACK
CLIPPER
APPENDIX A – LDF FILE EXAMPLE
41
41
42
InductEx User’s Manual
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1. Credits
InductEx (the code base, file translators, pre-processor and post-processing algorithms and
visaulisation tools) is the product of the combined research and development efforts of:
•
•
•
•
•
•
•
Coenrad Fourie
Mark Volkmann
Kyle Jackman
Rebecca Roberts
Thomas Weighill
Ruben van Staden
Pierre Lötter
InductEx also builds on the work done by Matton Kamon and Steve Whiteley (FFH), Paul
Bunyk and Sergei Rylov (Lmeter), Angus Johnson and Bala Vatti (the polygon clipper unit).
Process-specific support with the assistance of Thomas Ortlepp, Olaf Wetzstein and Jürgen
Kunert (FLUXONICS), Oleg Mukhanov and Alex Kirichenko (Hypres), Nobuyuki
Yoshikawa, Yuki Yamanashi and Kohei Ehara (AIST STP and ADP) and Vasili Semenov,
Sergey Tolpygo and Timur Filippov (MIT Lincoln Labs).
Integration into LayoutEditor was done by Jürgen Thies (Juspertor).
Integration into Cadence design environment with the help of Vasili Semenov (Stony Brook
University) and Timur Filippov (Hypres).
Quality assurance (by the patient Beta testers and bug reporters): Timur Filippov and Alex
Kirichenko (Hypres), Pascal Febvre and Romain Collot (IMEP-LAHC), Felix Jaeckel
(University of New Mexico), Xizhu Peng and Naoki Takeuchi (Yokohama National
University), Damian Steiger (ETH Zurich), Oliver Brandel (IPHT Jena) and Steve Kaplan, as
well as Mark Volkmann, Rodwell Bakolo and Hein van Heerden (in-house).
InductEx is based upon work supported financially by the South African National Research
Foundation, grant numbers 69006, 78789 and 93586.
InductEx User’s Manual
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2. Introduction
Before you read any further, or do any experiments, take note:
Numerical inductance calculations are only as reliable as the models used to obtain
them. No solution is absolutely correct – some are just better than others. You are
strongly advised not to put too much trust in a calculation result until you are familiar
with modelling and interpreting results, and have verified one of your own extractions
against a known measurement result for a similar structure.
If you have limited experience in modelling layouts for inductance extraction, please
study the examples described in this manual carefully before you attempt to do your
own extractions. A simple modelling mistake (such as inverting the polarity of a port on
a layout, or making a connection mistake in a circuit netlist) can lead to wildly
inaccurate solutions.
InductEx [1]-[5] was developed to enable VLSI circuit designers to extract the inductance of
complex 3D structures in superconducting integrated circuits, but also supports normal
conductivity and the calculation of inductance in simpler structures such as SQUID loops or
wires. Current distribution in, and magnetic fields in and around conductors can also be
computed. Although early versions were focused on inductive substructures, InductEx is now
aimed at full-gate extraction [5]. InductEx functions well as a stand-alone command line
programme that accepts GDSII or CIF input files created by any layout software, but was
carefully designed to be integrated with CAD software in the same way that Lmeter [6] is
done through its own IXI interface.
InductEx is a powerful tool for geometry processing, modelling and segmentation of
integrated circuit layout structures and the solution of inductive networks. InductEx uses
numerical engines to calculate current distribution in layout structures, from which
inductance and coupling is determined. The default engine is FFH, a re-engineered numerical
solver built on a similar base as FastHenry [7], with support for multithreading on multi-core
processors. InductEx also uses TetraHenry, a new magnetoquasistatic solver that uses
tetrahedral segments to model complex 3D geometries more efficiently.
If you are familiar with Lmeter, then InductEx will be easier to get used to.
Your use of InductEx is subject to the licence terms made available on the InductEx website.
InductEx was developed for and tested to interface well with LayoutEditor and LASI. It also
interfaces easily with XIC, and with the correct script files it works directly from Cadence
Virtuoso. It also works within LayoutEditor.
Finally, InductEx was developed to allow inductance extraction of complete circuit cells. The
intention is to allow users to work directly on “ready-for-fabrication” cells without the need
to alter layouts during modelling. To this end, InductEx supports auxiliary layers and
operators, and cells that pass extraction may be sent for fabrication without the need to strip
out modelling text or objects. The resistance of inductors with normal metal sections can be
calculated, but not specified separately in netlist files.
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3. Installing InductEx
3.1. Microsoft Windows
Download the install file for Windows from the InductEx website (www.inductex.info),
either for 32 bit or 64 bit operating systems, open the file and follow the instructions. You
will be asked to select an install directory ([AppDir]). The installer automatically adds the
directory for the InductEx binaries ([Appdir]\bin) to the path. The default license directory,
([AppDir]\licenses), is added to the system environment variable IXLICDIR, although you
have to create the directory yourself when you receive your license file.
In some cases the installer does not add the directory for the InductEx binaries to the path.
You then have to add it to the path manually. If, for example, your install directory is
c:\utils\inductex, you can (permanently) set the path in MS Windows from the command
prompt with:
Setx path ”%path%;c:\utils\inductex\bin”
The install directory can also be added to the path by selecting Advanced System Settings
from the Control Panel, opening the Advanced tab and clicking on Environment Variables.
You can alter the system environment variable for the license file in the same way (see Fig.
3.1). The installer sets IXLICDR as a system environment variable, but under Windows 10
you would need to declare this as a user environment variable.
After installation, the uninstall shortcut and user manual can be found under “InductEx” in
the Windows Start Menu.
Figure 3.1: Setting system environment variables in Windows 7 and later.
3.2. Linux
InductEx and its auxiliary tools are packaged in a .tar.gz zipped tarball distribution file.
Download the 32 or 64 bit version, depending on your OS, and unpack it to the directory of
your choice.
The primary InductEx distribution files for Linux contain tools that are built on Ubuntu
14.04, with Linux kernel 3.x. However, the field solver FFH, and the linear algebra solver
Solver do not work on operating systems still running on Linux kernel 2.18.16 and earlier.
InductEx User’s Manual
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This includes RHEL 5, which is sometimes used on Cadence servers for backwards
compatibility. For operating systems that use old Linux kernels, download the InductEx
distribution file for old kernels. This is only available to Professional subscribers, and is
limited to 64 bit.
3.3. Mac OS X
For Mac OS X, InductEx and its auxiliary tools are packaged in a zip file. No installation is
required – the file can simply be unpacked into the directory of choice.
3.4. License file
InductEx requires the presence of a valid license file to execute. This file is always called
ix_license.txt, and is issued by the InductEx team upon submission of a system
identification file, IX_sysID.txt.
If InductEx is executed without a valid license file, it calculates a system identification
number and writes this to file IX_sysID.txt in the same directory. The InductEx team
then uses this ID to generate a license unique to your computer system. The license file,
ix_license.txt, must be placed where InductEx can find it. Under MS Windows, it can
be in any directory, provided that the directory is identified with the environment variable
IXLICDIR. The default install setup sets IXLICDIR = C:\InductEx\licenses.
Under Linux and Mac OS X, the license file must be placed in the directory
/usr/share/inductex/licenses. You will need root privileges to create the license
directory and copy the license file here. Also note that you will least need read permission for
world users, which can be checked with ls -l and set with chmod.
One license file may contain many licenses to accommodate multiple users and computer
systems in an organisation.
4. Layer definition file
The layer definition file is the most important aspect of any calculation setup, because it
describes to InductEx how a layout drawing (which is essentially a set of disconnected twodimensional objects) should be modelled in three dimensions with the correct layer sequence
and connections. As such, it describes the fabrication process, with the important caveat that
the description is focused on creating numerical models that have the same geometry as
fabricated circuit structures, but may differ (substantially) from the actual fabrication
sequence.
The layer definition file controls or configures InductEx by defining both the modelling and
process technology parameters used to build extraction models. Modelling parameters are
not derived from the actual fabrication process, and control segment size, ground plane
modelling, optional segment blanking, etc. Process technology parameters describe the
actual layers in terms of model construction order (which is not necessarily the same as the
fabrication order), dimensions, mask-to-wafer bias and physical parameters such as
penetration depth.
There is no limit on the number of configuration files, as the user controls which file is used
when InductEx is called.
Standard layer definition files for the IPHT RSFQ1F and Hypres 4.5 kA/cm2 processes are
available on the InductEx website. Layer definition files for some other processes, such as
AIST’s STP 2.5 kA/cm2 (standard) and ADP 10 kA/cm2 (advanced) processes, are available
InductEx User’s Manual
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to registered users. Until you are an experienced user, it is strongly recommended that you do
not build a process file from scratch, but rather adapt one of these files to suit your needs.
Table 1 shows the parameters available in the layer definition file, and what they control. The
parameters are defined inside a control block starting with
$Parameters
and ending with
$End
Parameters are defined as:
Parametername = value
Every layer has to be defined as well. Layers are defined in control blocks starting with
$Layers
and ending with
$End
Layer parameters are defined similarly to global parameters, and are listed with functionality
in Table 2.
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Table 1: Layer definition file global parameters.
Parameter name
Default
value
Units
1e-6
The unit size in meters in the layer definition file. The
default is 1 µm. (Only change this if you are an advanced
user).
CIFUnitsPerMicron
100
This sets the number of units per micrometre in CIF files.
The default is 100. However, XIC uses 1000 unless forced to
revert through the “strip for export” function.
10e9
The frequency of the port excitation voltages. For purely
superconductive circuits, this does not influence the results.
With resistive components, the frequency dependent skin
depth affects current distribution in the normal conductors.
2.51
Sets the maximum x and y dimensions of any segment in
Units. Larger segments are subdivided. For IPHT’s RSFQ1F
process, 2.5 is a good value. Use 2.0 for Hypres’s 4.5
kA/cm2 process, and 1.0 for AIST’s STP and ADP processes
and MIT-LL’s SFQ processes. Larger values speed up
calculations, but cause higher inductance results. Always
compare calculations against a known result after you adjust
GapMax.
0.01
Sets the radius of a test sphere around a current density node
within which it is mapped to a FFH geometry node (should
NOT be zero). (Don’t change this value without
consulting the InductEx team first).
GPOverHang
2.5
Sets the distance in Units between the edge of any object
and the edge of the ground plane that is generated to cover
the smallest necessary area beneath structures. A smaller
value results in artificially higher calculation results. 2.5 is a
good value for all processes, but 7.5 is recommended when
lines crossing holes in the ground plane are investigated (the
ground plane automatically wraps around holes). This
parameter is disregarded for positive mask ground planes.
ProcessHasGroundPlane
TRUE
Boolean value to indicate ground plane in process. Usually
only FALSE for monolayer HTS circuits.
TRUE
Boolean value to indicate that negative mask ground planes
should be cropped to within GPOverHang of the union of all
non-ground plane structures (this reduces unnecessary
segments). It does not affect positive mask ground planes.
FALSE
Boolean value to force InductEx to replace z-directed
segments with electrical connections. This removes segment
size matching between layers, and generally leads to reduced
memory requirements and improved speed, especially in
large cells. Applicable to FFH engine only. Use with care.
Frequency
GapMax
AbsMin
CropGP
ZSegsToEC
Function
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Table 2: Layer definition file global parameters (continued).
Parameter name
Default
value
Function
LastDieLayerOrder
-
Indicates the order of the last layer fabricated on the wafer.
This is used to separate on-chip and off-chip layers when
packaging, bonding and excitation coil structures are
included in a model.
GPLayer
-
Indicates the GDS layer number of the ground plane.
TermLayer
-
Indicates the GDS layer number of the layer on which
terminals are drawn.
TextLayer
-
Sets the text layer (according to its GDS layer number).
ExtractBoundLayer
-
Sets the optional extraction boundary layer (according to its
GDS layer number).
BlankAllLayer
-
Sets the optional global blanking layer number. No objects
or parts of objects falling within blanking layer objects are
segmented, which allows user-defined model trimming.
-
Sets the optional x-direction blanking layer number. Any
objects or parts of objects falling with x-blanking layer
objects are only segmented in the y direction. Applicable to
FFH engine only.
BlankYLayer
-
Sets the optional y-direction blanking layer number. Any
objects or parts of objects falling with y-blanking layer
objects are only segmented in the x direction. Applicable to
FFH engine only.
Lambda
0.09
Default (global) value for London penetration depth. Can be
overrided per layer.
Sigma
10
Bulk conductivity of resistive layers (global). Calculated as
the inverse of resistance per square times layer thickness for
thin films, and expressed as Ω-1Units-1. For example, if unit
size is in µm, and layer thickness is 80 nm, a conductivity of
10 Ω-1µm-1 equals a sheet resistance of 1.25 Ω/ .
HFilaments
1
The global value for the number of height filaments into
which segments are divided. Can be overrided per layer.
Applicable to FFH engine only.
Colour
1
Global default for AutoCAD DXF layer colour.
TerminalInRange
1.0
Sets the distance (in Units) from the rectangular boundary
around any terminal object within which a text label will be
accepted as “linked” to that object.
ResZero
1e-3
Sets the smallest calculated resistance value printed to the
output – below this the resistance is considered zero and an
element is considered to be purely inductive.
BlankXLayer
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Table 3: Layer definition file global parameters (continued).
Parameter name
Default
value
Function
UnitL
1.0
Sets a unit size to which all inductance (self and mutual)
results are normalized. Inductance results are divided by the
value of UnitL after calculation. As an example, inductance
results can be normalized to PSCAN dimensionless units by
setting UnitL = 2.64.
UnitR
1.0
Sets a unit size to which all resistance results are
normalized. Resistance results are divided by the value of
UnitR after calculation.
UnitI
1.0
Sets a unit size to which all current results are normalized.
Current results are divided by the value of UnitI after
calculation.
JoinShortSegments
FALSE
Activates node optimisation (stitching segments together
length-wise when orthogonal segments are blanked out).
Applicable to FFH engine only.
BlankAllCutsGP
FALSE
If TRUE, BlankAllLayer also blanks the ground plane.
DataTypeNotZero
FALSE
If TRUE, GDSII objects with DataType <> 0 are also
accepted.
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Table 4: Layer definition file parameters for layers.
Layer
parameter
name
Default
value
Function
-
This parameter is required, and sets the layer number associated
with this layer (which coincides with the GDSII layer number if
GDSII input is used). Since version 4.26, this number can range
from 0 – 255.
-
This parameter is required, and sets the name of the layer in DXC
and CIF input files (to be supported), as well as in terminal label
definitions. The name is also applied to output files for
visualization.
Bias
0
This parameter is optional, and defines the mask-wafer offset for
the layer. The value is added to the boundaries of any object on the
layer (positive values “grow” the object, while negative values
“shrink” the object). Non-zero values are only necessary for
Hypres’s processes. For other processes it is a calibration tool.
Thickness
-
Required parameter that defines layer thickness in Units.
Lambda
Global
lambda
Optional parameter that defines the London penetration depth of
the layer. If undefined, the global value is used.
Sigma
Global
sigma
Optional parameter that defines the bulk conductivity of a layer
(see the description under global parameters in Table 1 for more
detail). If undefined, the global value is used.
Number
Name
Order
Mask
-
0
Required parameter that sets the construction order of the wafer.
The lowest layer must start at 0, and order numbering must be
sequential. If one layer is higher than another in the wafer, it must
have a higher order. Different layers cannot share the same order.
If you add layers to a process file, always verify the order
numbers, and set the global value LastDieLayerOrder to
the last physical layer’s order.
Sets the mask polarity of the layer. The options are:
1 Positive layer (deposited where objects are defined). Normally
all superconductive and resistive layers.
0 Layer does not contribute to the vertical height of the wafer –
typically used to define auxiliary or operational layers.
-1 Negative layer (etched away where objects are defined).
Normally all isolation and anodization layers.
-2 | -3 Are reserved for the blanking layers
-4 Is reserved for the terminal layer
InductEx User’s Manual
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Table 5: Layer definition file parameters for layers (continued).
Layer
parameter
name
Default
value
Function
Sets the film type of the layer. The options are:
S Superconducting layer
Filmtype
-
N Normal (resistive) layer that is not segmented (used for
instance for superconductive circuits where only inductance is
extracted, and resistive components should be ignored during
calculation).
R Resistive layer that is segmented
I Isolation layer
A Auxiliary layer
C Cut layer (everything underneath ablated away)
IsGP
IDensity
FALSE
-
Used for auxiliary ground planes in high layer count processes
such as ADP. When set to true, this layer is cropped similarly to
the main ground plane if the global parameter CropGP is true.
Optional parameter that sets the current density of a
superconductive Josephson junction layer. This is multiplied by the
area of objects in the layer if it exists between the terminals of a
port to give junction critical current. This parameter can be used in
other processes to yield any linear relationship to the area of a
layout object of interest.
Sets the planarization model applied to this layer. The options are:
0 No planarization.
PlanarModel
0
1 Full planarization up to last layer before this one. If set to 1 for
an isolation layer directly below a metal layer, it creates
depressions at vias through this isolation layer. This
implements the complemented caldera planarization method
used by AIST for the ADP process [7]. If set to 1 for a metal
layer, vias to lower layers will be studded, as envisioned for the
MIT Lincoln Lab 10-layer process.
2 (and higher) Reserved for future models.
HFilaments
1
Sets the number of height filaments into which segments on this
layer will be divided. This is only applied to superconductive
layers. More filaments result in exponentially longer calculation
times, but it is suggested that this value is set to 2 if a layer is
thicker than 1.5 times the penetration depth, and to 3 if a layer is
thicker than 2.5 times the penetration depth. For the standard
processes, it is of no benefit to exceed 3.
GapMax
Global
GapMax
Optional parameter that sets the maximum x and y dimensions of
any segment in Units (see the description under global parameters
in Table 1 for more detail). If undefined, the global value is used.
InductEx User’s Manual
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Table 6: Layer definition file parameters for layers (continued).
Layer
parameter
name
Default
value
Function
When set to true for a conductive layer of mask type -1 or +1, via
etching through an isolation layer directly above this layer will
continue to the isolation layer directly below this layer if no
conductive object is in the way. This is used for example to
propagate vias through I1B past R2 in the Hypres process when R2
is included for resistance modelling.
ViaBypass
FALSE
Colour
1
Sets the DXF colour of the layer for visualization purposes. The
range is 0 to 255 (indexed colours). Use different values for each
superconductive layer to tell them apart during visualization.
-
GDS/layer number of any lower order layer to be added to this
layer. Useful for layer operations, for example adding layer BC to
layer RC in the AIST STP process to allow via continuity. Up to
10 layers may be added to any layer.
-
GDS/layer number of any lower order layer to be subtracted from
this layer. Useful for layer operations, for example subtracting
resistive layer R2 from via layer I1B in the Hypres 4.5 kA/cm2
process (this prevents vias from upper wiring layer M2 to resistors
from shorting to lower wiring layer M1 when InductEx removes
normal metal layers during segmentation). Up to 10 layers may be
subtracted from any layer.
LayerAdd
LayerSub
Layer addition and subtraction precedence is: 1 – LayerAdd; 2 – LayerSub.
Apart from parameter and layer definitions, InductEx allows the user to define specific
operators that may be added to layouts to control modelling. These operators, if used
effectively, can reduce segment count and solution time, but need to be used with care.
Operator parameters are listed in Table 3.
Every operator has to be defined in the layer definition file. Operator control blocks start with
$Operator
and end with
$End
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Table 3: Layer definition file operator parameters.
Operator
parameter name
Default
value
Name
-
Function
This parameter is required, and sets the name of the operator as
it is used in text labels on layouts.
Sets the operator type. The options are:
UD Undefined – does nothing
MR Make rectangle – Changes all polygons in the layers
defined by LayersRem and within which the operator text
label falls to rectangles.
EC Electrical connection – Connects nodes on the layers
defined in LayersConnect electrically (without
segments), and removes objects in layers defined by
LayersRemove within which operator text labels fall.
Electrical connections are only made between nodes falling
inside the polygon with smallest area in any of the layers
defined by LayersRemove.
OD Object delete – Removes objects in layers defined by
LayersRemove within which operator text labels fall.
Useful to get rid of excess structures, such as multiple
ground planes when these do not influence extraction
results.
LD Layer delete – Removes all objects in layers defined by
LayersRemove. Useful to get rid of excess structures,
such as multiple ground planes when these do not influence
extraction results.
Type
UD
LayersTransform
-
Creates a list of GDS layer numbers (separated by space or
TAB characters) of layers on which objects should be
transformed by the operator.
LayersRemove
-
Creates a list of GDS layer numbers (separated by space or
TAB characters) of layers on which objects should be removed
by the operator.
LayersConnect
-
Creates a list of GDS layer numbers (separated by space or
TAB characters) of layers on which nodes should be electrically
connected by the operator.
InductEx User’s Manual
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5. Layout input file requirements
InductEx was primarily developed to processes structures in the GDSII stream file format.
This is an industry standard binary format, and most layout tools can convert layouts to
GDSII. InductEx also supports input processing from ASCII-format CIF files. Autocad DXF
compatibility will be added in the future.
In order to provide port/terminal information to InductEx, a TERM layer is needed. You can
use any layer, as long as it is called TERM, and the layer number or index corresponds to the
parameter TermLayer in the layer definition file.
Terminals are drawn as polygons, boxes or paths in the terminal layer. It is not necessary to
draw terminals over vias or Josephson junctions, as InductEx will automatically use the via or
junction boundaries to determine the terminal dimensions. Therefore, it is mostly only
necessary to draw terminals on the edges of input/output lines or on bias lines (we shall call
them “line terminals”. Collapsed boxes (zero width) can be used to draw line terminals, but
these do not conform to proper GDSII protocol and might not be exported correctly by most
programmes. When using GDSII files, it is better to draw line terminals as paths or 2-point
polygons on the TERM layer. The path width is immaterial, as InductEx only uses the centre
line as the actual terminal (thereby “forcing” a zero width path). Path width is therefore only
used as a visual aid during layout.
5.1. IXI
The IXI input file format is text based and human readable, and uses a flat hierarchy. It was
developed to allow an easy interface from Cadence Virtuoso while maintaining readability.
Every layout object is represented by a polygon with an unlimited set of (x, y) coordinate
pairs and a layer name (rather than a layer number). Boxes and paths are also represented as
polygons. Coordinate values are in drawing units, as specified in the layer technology file.
Optionally, unit sizes can be specified to override the layer technology file. Object identifiers
are preceded by the $ character, and object declarations are terminated with an end
command. The file is ended with $EOF.
Drawing objects are defined as:
$POLY
layername
(x1, y1)
(x2, y2)
…
(xN, yN)
(x1, y1)
$EOP
Terminal layer polygons may have the terminal number and text directly beneath the layer
name:
$POLY
TERM
number
textstring
(x1, y1)
(x2, y2)
…
InductEx User’s Manual
18
(xN, yN)
(x1, y1)
$EOP
All text labels (to identify ports/terminals or operators) are represented with an (x, y)
coordinate pair and a text string, currently limited to 40 characters:
$TEXT
textstring
(x, y)
$EOT
The (optional) unit size in metres is defined as:
$UNITSIZE
Real value;
or
$UNITSIZE
Real value
$EOR
The (optional) number of drawing units in the unit size is defined as:
$DUPERUNIT
Integer value;
or
$DUPERUNIT
Integer value
$EOI
5.2. GDSII
For GDSII input files, InductEx currently requires all object DATATYPE and text label
TEXTTYPE values to be equal to zero. This is easily defined in LASI (by layer), XIC and
Cadence. If, for any reason, DATATYPE or TEXTTYPE values other than zero should be
supported, you may set the DataTypeNotZero parameter in the layer definition file to
TRUE. If you need more specific support, you may contact us with a request.
InductEx also requires GDSII file structures to be sorted according to ascending rank.
5.3. CIF
CIF file read-in was developed for interface with LASI.
CIF allows easy manual changes to object coordinates because it is ASCII-based. It also
allows you to define a simple layout in text format by hand (without the need for a circuit
layout programme). However, CIF is inferior to GDSII. If your layout editor supports both,
you are advised to always use GDSII rather than CIF.
When InductEx processes CIF input files, it only uses the CIF layer names to obtain the layer
numbers (for compatibility with GDSII inputs). CIF layer names therefore do not have to
correspond to the layer names in port/terminal labels, as those are defined in InductEx’s layer
definition files (.ldf). When exporting to CIF format from XIC, select index-based structure
references (which uses the layer number instead of layer name).
InductEx User’s Manual
19
5.4. DXC
DXC file read-in was developed for interface with Cadence.
Support for the Lmeter-specific DXC input file format was added to InductEx to enable
integration into the Cadence design environment as used by superconductive electronic
circuit designers. In its current implementation, InductEx acts as a one-to-one replacement for
Lmeter in the Cadence environment. This allows the reuse of all Lmeter scripts (except when
executing the solver), but limits port modelling to that supported by Lmeter.
Therefore, when using Lmeter scripts from the Cadence environment, ports cannot be defined
as with positive and negative terminals linked to different terminal objects (see Section 5.5).
If such modelling is required, layouts should be exported to GDSII format and InductEx
executed separately.
5.5. Port / Terminal declarations
Ports or terminals are declared in the text layer, and their geometries defined in the TERM
layer. The (x,y) coordinate of a text label is used to match the port text to a structure in the
TERM layer. Syntax is:
Pname[s {+ / | \ -}] b [c]
with the first letter always “P”. The port name may be up to 20 characters long. If the
optional suffix s is in {+ -}, it indicates that this is only one terminal of the port and
specifies the polarity (positive or negative). If s is in {\ | /}, the port is a virtual cut. b is
the name of the layer on which the terminal (defined by the polarity) is located, or the
positive terminal if the polarity is not specified. If polarity is not specified, c is required and
is the name of the layer on which the negative terminal is located. For a virtual cut port, c
defines the axis along which the port is connected to a conductor (x or y, which should
coincide with the predominant axis of current flow) and the direction of the positive terminal.
Examples of valid labels are:
P1 M2 M0
(Port 1, with the positive terminal in layer M2 and the negative in M0)
PTWO M1 M0
(Port TWO, with positive terminal in layer M1 and the negative in M0)
P3+ M2
(Positive terminal of Port 3, in layer M2)
P3- M0
(Negative terminal of Port 3, in layer M0)
P4/ YBCO +y
(Port 4, a virtual cut through a conductor in layer YBCO, with current
flow and port connection along the y axis. The positive terminal is in
the positive direction along the y axis.)
P5/ M3 -x
(Port 5, a virtual cut through a conductor in layer M3, with current
flow and port connection along the x axis. The positive terminal is in
the negative direction along the x axis.)
If the port text label coordinates fall inside or on the boundary of an object in the TERM
layer, this is used as the port definition. Note that only Manhattan-type objects are supported
as terminals.
When no TERM layer object can be linked to the port label coordinates, and if the positive
and negative terminals where defined in the same label, InductEx searches for a via object
(with MASK = -1) that encloses the label coordinates and is ordered between the
superconducting layers on which the terminals are declared. If more than one via object
InductEx User’s Manual
20
satisfies these conditions, the one with the smallest area is used. When such a via is used as a
terminal object, it is moved to the TERM layer (and should show up as such when a GDSII
output file is generated with the –d option). For convenience, it is therefore not necessary to
define a terminal layer object over a Josephson junction when it is to be used as a port.
However, all vias changed to terminals by InductEx are converted to rectangular
objects to accommodate octagonal or circular junctions. Furthermore, all polygons on
isolation/anodization layers (with MASK = -1) between the upper and lower terminal layers,
and within which the terminal layer text coordinates fall, are also converted to rectangles
encompassing their furthest coordinates. This is done to reduce the segmentation
requirements of junctions, specifically octagonal and circular junctions.
Terminal geometries are restricted to Manhattan structures, but may be defined anywhere in
on the edge or inside of a superconductive layer object.
Currently, InductEx also accepts text labels on layers other than the text layer when reading
in terminal declarations. However, terminal text must be placed in the highest ranking cell of
a layout.
For instances where text labels are not supported by a layout tool (such as WaveMaker), or
where it is required for convenience to alter port labels without the use of a layout tool, port
terminals can be defined in a text file. This is discussed in Section 5.6.
5.6. Port label input file
When a port label input file (in ASCII text format) is specified with the –p parameter, port
labels (both text and coordinates) are read in from the file. This overrides any port labels that
may have been read in from the geometry input file. The file may have any suffix, although
.txt is preferable.
Port declarations follow the rules set out in Section 5.5, and the file syntax is:
Plabel; (x, y)
where Plabel is the port label that contains the port name and positive and/or negative
terminal layers as described in Section 5.5. The label coordinates within the layout are at x
and y, which is in Units as defined in the layer definition file.
Examples of valid port label definitions are:
P1 M2 M0; (0, 25.5)
(Port 1 between layers M2 and M0, at x=0; y=25.5)
PIN+ M2; (10, 20)
(Port IN, with positive terminal on M2, at x=10; y=20)
5.7. Extraction boundary
InductEx allows you to specify an extraction boundary, outside of which all structures are
ignored. This is helpful in large circuit layouts where the structures to be extracted do not
span the entire layout. With an extraction boundary, structures outside the area of interest are
not discretized, which saves calculation time and memory.
The extraction boundary also makes it easy to separate isolated sections of a negative
mask layer (mostly ground planes in current recycling circuits) during modelling. This is best
illustrated with an example.
The extraction boundary is defined on the layout in a special non-fabrication layer which
is set with the ExtractBoundLayer global parameter in the layer definition file. Any
InductEx User’s Manual
21
combination of layout objects may be used – it is thus possible to define several isolated
extraction zones.
5.8. Operator declarations
Operators are declared with text labels (on any layer). Operators act at the coordinates of the
text label. Syntax is:
@Name
with the first character always “@”. The name of the operator must match (case-insensitive)
that of an operator declared in the layer definition file. If no match is found, the operator is
ignored.
6. Inductance calculation with InductEx
Examples shown in this chapter, as well as more detailed examples not discussed here, are
available on the InductEx website for download.
6.1. Circuit netlist file
In order to run an inductance calculation with InductEx, a circuit netlist file is needed. This
netlist file is in part a subset of the Spice electrical netlist. The netlist should contain all the
inductors and mutual inductors in the circuit model, and the values assigned to each will be
used as the “design value” during InductEx post-processing.
The netlist should also contain port definitions for the extraction setup.
Valid netlist elements are:
L1
node+
Kname
Lname1 Lname2
Lname
P1
Ptwo
node+
node+
node+
PAny_name
nodenodenode-
designvalue
designvalue
designvalue
node-
node+
node-
A control block may be included in the netlist file, and can be used to assign values to certain
variables in order to exert control over modelling and solution methods. In future more
variables may be added to the control list, but for now the only variable that can be controlled
is the rcond. This defines the limit (as a fraction of the largest singular value) below which
singular values of the branch current matrix are taken as zero. The default value for rcond is
1e-4. An example of the use of the control block is:
.control
SET rcond = 1e-5
.endc
For compatibility with JSIM, keep node names numerical. Design values are in pH. Mutual
inductors are specified with K (coupling) for compatibility with Spice, although InductEx
writes the output as a mutual inductance in pH.
A note on resistivity: InductEx can calculate the resistive component of an inductive
structure that contains normal metal segments. However, resistors cannot yet be specified
separately in the circuit netlist file. Even if the impedance of a resistor is of interest, it should
InductEx User’s Manual
22
be defined in the netlist as an inductor. InductEx is primarily an inductance calculation tool,
and resistance is seen only as a parasitic element. In a practical superconductive circuit, the
inductance of shunt resistors is of interest, while the resistance can be determined more
accurately with analytical methods.
6.2. Minimum setup requirements
To execute InductEx, you need an input geometry file (GDS or CIF, since DXC and DXF
files are not yet supported), a layer definition file, a circuit netlist and the numerical solvers
FFH and TetraHenry.
InductEx can be executed from the command prompt or terminal, and simple examples are
listed in the next section.
The minimum command line statement to execute InductEx is:
inductex structurename.gds –l layerdefinitionfile.ldf –i name.inp -fh
The first parameter is the geometry input file. The -l switch identifies the layer definition file.
The -i switch precedes the name of the FFH model file, while -fh forces a call to FFH.
If the -fh switch is omitted, InductEx terminates after dumping the .inp model file. The user
can then run FFH manually.
When used as above, InductEx searches for the circuit netlist file by using the name of the
geometry input file (thus: structurename.cir or structurename.js). However,
any other circuit netlist file can be specified with the –n circuitfilename.cir switch.
If it is necessary to see the adjusted geometry (after mask-to-wafer bias adjustments were
made), InductEx can be forced to dump the result to a GDSII file with the -d switch, followed
by the name of the output file.
6.3. Single inductor example
This example is available on the InductEx website as ex1.
Consider the calculation of the inductance of a single, straight inductor above a ground plane
(a problem best solved analytically [8], but used here due to its simplicity). A cross-sectional
view of such a microstrip line above a ground plane is shown in Figure 6.1.
For our example, we use a microstrip line of length 100 µm and width (W) 10 µm. Line
thickness (t1) is 0.25 µm, ground plane thickness (t2) is 0.2 µm and dielectric isolation is
thickness (h) is 0.15 µm. The analytical solution, assuming an infinite ground plane, is
3.897 pH.
Figure 6.1: Cross-sectional view of superconductive microstrip line and ground plane
Calculating the same inductance with InductEx requires us to draw a 100 × 10 µm line in a
CAD tool. For the example discussed here, and shown in Figure 6.2, LASI is used. Four
layers are defined: M0 as the ground plane, I0 as the dielectric isolation layer, M1 as the
conductor, and TERM as the terminal layer. The microstrip line is drawn as a box in M1, and
InductEx User’s Manual
23
the terminals are added as paths of width 1 µm at the furthest edges of the microstrip line.
Text labels are placed with their coordinates exactly on the edges of the microstrip line,
inside the terminal paths, to identify the ports. The ground plane is not drawn, because the
ground plane layer mask in this example is negative – it thus exists everywhere except where
it is drawn. The next step is to export the layout to GDS or CIF file formats (from LASI;
DXF and DXC formats may be used from other CAD tools as soon as these are supported).
For this example, we use lman1.gds.
(a)
(b)
(c)
Figure 6.2: (a) LASI screenshot of microstrip line layout with two ports, (b) three-dimensional
drawing showing finite ground plane, and (c) InductEx segmented model. Vertical dimensions in (b)
and (c) enlarged 5 times for clarity.
A circuit netlist file is required to link ports to inductors. For simplicity, we use the same
project name, with the extension .cir (although InductEx will also search for .js files if it
cannot find a .cir file). The netlist file lman1.cir for a single inductor with two ports
(one at each node) is:
* spice netlist for InductEx user manual example 1
* Inductors
L1
1
2
10
* Ports
P1
1
0
P2
2
0
.end
Finally, we need a layer definition file that defines layer dimensions and simulation variables.
InductEx will accept any file extension, but we use .ldf by default. The layer definition file
ixman1.ldf is:
*Layer Definitions for InductEx
* manual - ex1
*
$Parameters
Units
= 1e-6
CIFUnitsPerMicron = 100
GapMax
= 2.0
AbsMin
= 0.025
GPOverhang
= 5.0
* I0
$Layer
Number
Name
Thickness
Order
Mask
Filmtype
$End
=
=
=
=
=
=
2
I0
0.15
1
-1
I
InductEx User’s Manual
ProcessHasGroundPlane = TRUE
LastDieLayerOrder = 2
GPLayer
= 17
TermLayer
= 19
TextLayer
= 18
HFilaments
= 1
TerminalInRange
= 1.0
$End
*
* LAYERS
*
* M0
$Layer
Number
=
17
Name
=
M0
Thickness =
0.2
Lambda
=
0.09
Order
=
0
Mask
=
-1
Filmtype
=
S
HFilaments =
2
Colour
=
135
$End
*
24
*
* M1
$Layer
Number
Name
Thickness
Lambda
Order
Mask
Filmtype
HFilaments
Colour
$End
*
* TERM
$Layer
Number
Name
Order
Mask
$End
=
=
=
=
=
=
=
=
=
5
M1
0.25
0.09
2
1
S
3
10
=
=
=
=
19
TERM
3
-4
The parameters are discussed in Section 0. Note that the ground plane uses a negative mask,
and that the TERM layer uses a mask value of -4. Since we cannot model an infinite ground
plane, the ground plane overhang (GPOverhang) is specified as 5 µm (given the dimensions
of the problem, this is sufficient).
InductEx is executed from the command prompt with:
inductex lman1.gds –l ixman1.ldf –i lman1.inp -fh
The screen output under Windows is shown below. Under Linux and OS X, FFH is executed
in the same terminal and the output is more verbose. A summary of the InductEx output is
written to the file sol.txt.
c:\usr\local\bin>inductex lman1.gds –l ixman1.ldf –i lman1.inp -fh
InductEx v5.01 Pro (22 May 2015). Copyright 2003-2015 Coenrad Fourie
lman1.gds -l ixman1.ldf -i lman1.inp -fh
Spice netlist lman1.cir read. Totals: L = 1, k = 0, P = 2.
GDS file lman1.gds read: db units in 1E-0009 m, 0.001 units per user unit.
1 structures read. Reduced 3 objects to 2 polygons and 2 terminals.
Techfile ixman1.ldf read: Units in 1E-0006 m. AbsMin=0.025 GapMax=2
Using FastHenry with port currents and DIAG preconditioner.
FastHenry version 4.0su_p64 found.
Total unique loops identified in netlist = 2
Terminal blocks = 2; Labels = 2; Extracted Ports = 2
Port
Positive terminal
P1
M1,
line along y;
P2
M1,
line along y;
Minimum filaments in FastHenry = 4323
Negative terminal
M0,
same as "+" terminal.
M0,
same as "+" terminal.
Impedance
Inductance [pH]
Resistance [Ohm] AbsDiff
Name
Design
Extracted Design
Extracted (L only)
L1
3.89700
3.89751
--+0.0005
Deallocating memory.
Cycles found in 0.002 seconds.
SVD solution in 0.165 seconds.
Job finished in 1.835 seconds.
PercDiff
(L only)
+0.01%
InductEx User’s Manual
25
The calculated inductance compares very well to the analytical result, but is a strong function
of segmentation size, filament numbers and ground plane overlap. For example, if the
overhang is reduced to 2.5 µm, L1 is calculated as 3.911 pH (in 3.96 seconds). If height
filaments for M0 and M1 are then reduced to 1 each, L1 is calculated as 4.2253 pH (in 1.36
seconds), and if the segment size is increased to 2.5 µm (GapMax = 2.5), L1 becomes
4.234 pH (in 0.41 seconds).
6.4. Single inductor example with non-Manhattan geometry
and off-edge ports
This example is available on the InductEx website as ex2.
Staying with a single inductor calculation, we can define the conductor in layer M1 as a
polygon, and add ports away from the boundary of the conductor. Port 1 is defined as a path
with non-zero width, and port 2 as a Manhattan-type polygon, as shown in Figure 5.3(a). The
GDSII geometry file is lman2.gds.
For this example, we set GapMax = 2.0, GPOverhang = 2.5 and all height filaments
equal to 1, in a layer technology file named ixman2.ldf. Since a netlist file for a single
inductor already exists, it can be reused. The netlist file name differs from that of our current
example, so that InductEx will not assign it automatically. We have to specify the netlist file
with the –n parameter. InductEx is executed with:
inductex lman2.gds –l ixman2.ldf –i lman2.inp –fh –n lman1.cir
InductEx calculates L1 = 1.7447 pH. The segmented model and current density distribution,
rendered in DXF Sharp Viewer from DXF output files, are shown in Figure 6.3(b) and (c).
(a)
(b)
(c)
Figure 6.3: (a) LASI screenshot of polygon inductor layout with port 1 a non-zero width path located
inside the conductor and port 2 a Manhattan-type polygon, (b) three-dimensional rendering of
InductEx model, and (c) calculated current density distribution in the conductor showing the effects of
ports located inside the conductor boundaries. Vertical dimensions in (b) enlarged 5 times for clarity
InductEx User’s Manual
26
6.5. Three-inductor multi-layer example
As a third example (available on the InductEx website as ex3), consider a three-inductor
network as shown in Figure 5.4(a). We use two conductive layers above a ground plane to
demonstrate multi-layer calculations. Furthermore, we use two isolation layers between the
first conductive layer (M1) and the second conductive layer (M2). These mimic typical
anodization and isolation layers. The layout is shown in Figure 6.4(b), with port 2 connected
to an inductor in M2. A via between M2 and M1 is created with holes defined in the
negative-mask anodization and isolation layers I1A and I1B.
The circuit netlist file lman3.cir is shown below:
* spice netlist for InductEx user manual example 3
* Inductors
L1
1
2
1
L2
2
3
1
L3
2
4
1
* Ports
P1
1
0
P2
3
0
P3
4
0
.end
The layer definition file needs to be expanded to account for the anodization and isolation
layers (I1A and I1B) and the conductive layer M2. Note that the LastDieLayerOrder is
updated. Layers I1A and I1B have Mask = -1 (negative mask, thus removed where
structures are drawn) and Filmtype = I. The layer definition file ixman3.ldf is listed
below:
*Layer Definition File for
InductEx manual - ex3
*
$Parameters
Units
= 1e-6
CIFUnitsPerMicron = 100
GapMax
= 2.0
AbsMin
= 0.025
GPOverhang
= 2.5
ProcessHasGroundPlane = TRUE
LastDieLayerOrder = 5
GPLayer
= 17
TermLayer
= 19
TextLayer
= 18
HFilaments
= 1
TerminalInRange
= 1.0
$End
*
* LAYERS
*
* M0
$Layer
Number
=
17
Name
=
M0
Thickness =
0.2
Lambda
=
0.09
Order
=
0
Mask
=
-1
Filmtype
=
S
Lambda
Order
Mask
Filmtype
HFilaments
Colour
$End
*
* I1A
$Layer
Number
Name
Thickness
Order
Mask
Filmtype
$End
*
* I1B
$Layer
Number
Name
Thickness
Order
Mask
Filmtype
$End
*
* M2
=
=
=
=
=
=
0.09
2
1
S
1
10
=
=
=
=
=
=
7
I1A
0.1
3
-1
I
=
=
=
=
=
=
11
I1B
0.2
4
-1
I
InductEx User’s Manual
HFilaments
Colour
$End
*
* I0
$Layer
Number
Name
Thickness
Order
Mask
Filmtype
$End
*
* M1
$Layer
Number
Name
Thickness
=
=
1
135
=
=
=
=
=
=
2
I0
0.15
1
-1
I
=
=
=
27
$Layer
Number
Name
Thickness
Lambda
Order
Mask
Filmtype
Colour
$End
*
* TERM
$Layer
Number
Name
Order
Mask
$End
5
M1
0.25
=
=
=
=
=
=
=
=
12
M2
0.35
0.09
5
1
S
182
=
=
=
=
19
TERM
6
-4
InductEx is executed from the command prompt with:
inductex lman3.gds –l ixman3.ldf –i lman3.inp –fh
An excerpt from the solution file is shown below:
Port
Positive terminal
P1
M1,
line along y;
P2
M2,
line along x;
P3
M1,
line along y;
Minimum filaments in FastHenry = 1643
Negative terminal
M0,
same as "+" terminal.
M0,
same as "+" terminal.
M0,
same as "+" terminal.
Impedance
Inductance [pH]
Resistance [Ohm]
Name
Design
Extracted Design
Extracted
L1
1.00000
1.65861
--L2
1.00000
3.21219
--L3
1.00000
1.27788
--Deallocating memory.
Cycles found in 0.005 seconds.
SVD solution in 0.078 seconds.
Job finished in 0.797 seconds.
AbsDiff
(L only)
+0.6586
+2.2122
+0.2778
PercDiff
(L only)
+65.86%
+221.22%
+27.79%
The InductEx model, with segments, is shown in Figure 6.4(c), and a solid rendering in
Figure 6.4(d). Metal flow through the via is visible, as well as vertical offset at layer
crossings. For this process, planarization is not modelled.
InductEx User’s Manual
P1
1
2
L1
L
3
2
L
3
28
4
P3
P2
(a)
(b)
(c)
(d)
Figure 6.4: (a) Circuit netlist for three-inductor example showing node numbers, inductors and ports,
(b) LASI screenshot of layout, (c) three-dimensional rendering of InductEx model showing segments,
and (d) solid three-dimensional rendering of InductEx model. Vertical dimensions in (c) and (d)
enlarged 5 times for clarity.
6.6. Mutual inductance example with ground plane hole
This example example (available on the InductEx website as ex4) demonstrates mutual
coupling and a ground plane hole. Two conductors, one in M1 and one in M2, are laid out as
shown in Figure 6.5(a). A ground plane hole underneath the coupling inductors is created by
drawing a box in the M0 layer. The layer definition file is the same as ixman3.ldf shown
in Section 6.5, except that GPOverhang = 7.5. As can be seen in this example, the
ground plane is wrapped around holes that intersect structures in any layer other that the
designated ground plane. We use the larger value for ground plane overhang to prevent a toonarrow ground plane ribbon around the hole (you should experiment with this overhang
parameter, and observe the increase in calculated inductance when the ribbon around the
ground plane hole becomes too narrow).
The spice netlist is shown below. Coupling is defined by the K element for compatibility with
Spice. The value in the netlist is the coupling factor.
* spice netlist for InductEx user manual example 4
* Inductors
L1
1
2
17
L2
3
4
22
K1
L1 L2 0.75
* Ports
P1
1
0
P2
2
0
P3
3
0
P4
4
0
InductEx User’s Manual
29
.end
An excerpt from the solution file is shown below. Note that the coupling is now listed as a
mutual inductance (M1), and the design and extracted values are listed in picohenry. The
design value for mutual inductance is calculated from the inductance values and coupling
factor in the netlist.
Inductor
L1
L2
M1
Design
17.00000
22.00000
14.50400
Extracted
16.92200
22.35300
14.63800
AbsDiff
-0.07796
+0.35273
+0.13405
PercDiff
-0.46%
+1.60%
+0.92%
(a)
(b)
Figure 6.5: (a) LASI screenshot of coupled inductors over ground plane hole and (b) threedimensional rendering of InductEx model showing segments. Vertical dimensions enlarged 5 times
for clarity.
7. Output files
In order to aid CAD integration, InductEx writes several output files.
7.1. sol.txt
The file sol.txt is a recreation of the screen output generated by InductEx, and lists progamme
version number, information about the circuit netlist and layout geometry input files, the units
used, the FFH version and pre-processor used, the number of loops (cycles) identified in the
circuit netlist, and information on the ports.
The minimum number of filaments used by FFH is also listed (the actual number is higher if
FFH subdivides narrow elements). This is a convenient debug tool: if the number exceeds
roughly 100 000, demands on memory and CPU time will be severe, and the user might
consider early termination and recalculation with a larger discretization size.
The extraction results are listed in pH and Ω, as shown below:
Impedance
Name
L1
L2
L3
Inductance [pH]
Design
Extracted
2.00000
2.09480
0.60000
0.48300
0.00000
6.86310
Resistance [Ohm]
Design
Extracted
0.000
0.000
0.000
2.430
0.000
8.080
Mutual Inductance [pH]
Name
Design
Extracted AbsDiff
M1
+0.2000
-0.0293
-0.2293
M2
+0.2000
+0.0185
-0.1814
PercDiff
+114.68%
+90.74%
AbsDiff
(L only)
+0.0948
-0.1170
+6.8631
PercDiff
(L only)
+4.74%
-19.50%
--%
Coupling factor
k
-0.0141
+0.0090
InductEx User’s Manual
Ports
Pj1
Design
250.000
30
Extracted
250.200
Some observations are highlighted:
Inductor L1 is a typical superconductive microstrip line. The absolute and percentage
differences between the extracted value and the design value (listed in the netlist file) are
shown.
Inductor L2 includes a bias resistor, but absolute and percentage differences are only shown
for the inductive component. The design value for a resistance is always zero, because the
circuit netlist input file currently only supports inductances (but we reserve the position for
future use).
Inductor L3 is a “don’t care” inductance, specified in the circuit netlist with a zero value. In
this case, no percentage difference is calculated.
Mutual inductance M1 is listed in pH. The negative extracted value indicates that the
coupling is in the opposite direction. The coupling factor is calculated from the extracted
mutual inductance as well as the extracted inductance of each of the coupled inductors linked
by M1. This coupling factor should be substituted into the circuit netlist if a simulation on a
layout-extracted circuit is required.
For Josephson junctions, the exact junction area (with wafer-to-mask bias accounted for) is
used to calculate the critical current (the unit is left dimensionless). If specified in the circuit
netlist file, the design value is also printed.
7.2. i_imag.out
If the IXI input format is used (developed for Cadence Virtuoso), InductEx writes the
calculated port currents to the text file i_imag.out.
The format is:
Excited port (no.)
Measured port (no.)
Scaled current value
The scaled current is the imaginary component only of the port current at the measured port
when the excited port is driven with 1 Volt. It is normalised for frequency (1 Hz) and to
dimensionless PSCAN units. This allows the legacy tool lm2sch to calculate inductances
directly.
Warning: the port numbers correspond to the order in which ports were defined in the circuit
netlist, not to the order in which they appear in the layout input file. This could lead to
ambiguity. Finally, this file should only be used if all structures in a layout are
superconductive (omission of the real current components leads to errors otherwise).
7.3. extract.out
If the IXI input format is used (developed for Cadence Virtuoso), InductEx writes the
calculated inductance values to the text file extract.out.
The format is:
Inductance name
Dimensionless extracted value
The extracted value is in dimensionless PSCAN units, which can be converted to pH by
multiplying each by 2.63. Although it only lists the inductance, these are still correct even if
the extraction model contains resistive components.
InductEx User’s Manual
31
8. Interpreting solutions and controlling accuracy
Numerical solutions are never as well-defined as analytical solutions. The biggest contributor
to accuracy is correct modelling. If you calculate a negative inductance, reassess your model,
starting with the circuit netlist. The same applies if some calculated inductance values
fluctuate more than expected when small dimensional changes are made to a layout. You can
improve model stability by remodelling all nodes with four or more inductive branches as
more than one node interconnected by small inductances so that no node has more than three
inductive branches.
The other main contributor to inaccuracies is discretization. Simply put, large segments
means choppy current distribution and inaccurate solutions. Finer discretization leads to
more accurate answers, but always with a hugely increased burden on computing resources.
9. Techniques for speeding up the extraction time
You can make extractions with InductEx run faster by applying some basic techniques to
your circuit models. Firstly, any structures not forming part of the inductances you are trying
to analyse, or not coupled to these, can be omitted. This cuts down on the number of
segments, and cause an exponential improvement in solution time.
The quickest way to simplify a model is to remove or trim unnecessary objects. One way to
do so requires you to save a duplicate of your layout, and trim this duplicate. For instance, the
furthest parts of a damping resistor’s geometry (connecting the resistor and the lower wiring
layer) can be deleted without affecting calculation results. Bias lines can also be trimmed
down to within one or two squares of the modelled inductors.
However, it is never convenient to work on a duplicate (if you for instance adjust the
geometry to alter inductance, and then have to migrate the same adjustments to a master
layout). InductEx therefore allows you to declare blanking layers, and use geometries on
these layers to remove segments in the x or y directions, or to remove all segments within the
blanking objects.
10.
Bundled visualization tools
InductEx is distributed with visualization tools included:
Inp2dxf: Creates a 3D DXF file from the FFH input model file. This is best viewed with
AutoCAD, DXF Sharp Viewer (v2) or similar programmes.
Execution: inp2dxf inpfile.inp dxffile.dxf [–h n]
The optional switch –h followed by a real number n sets the height scaling factor to aid
visualization of vertical dimensions.
Idensity: Creates a 3D DXF file from the FFH input model and current density output files
with 20 colour values corresponding to the size of current density, normalised so that the top
of the colour scale equals the maximum current density found in the output file(s).
For Idensity to execute, current density output files are needed. When InductEx is executed
with the option –k switch, current density output files are created. These files, one for each
port in the layout, are named j_Pxxx.mat, where xxx is the corresponding port name.
InductEx User’s Manual
32
Execution: idensity inpfile.inp j_Pport.mat dxffile.dxf [-h n] [-s
n] [-a n]
The optional switch –h followed by a real number n sets the height scaling factor to aid
visualization of vertical dimensions.
The optional switch –s followed by a real number n sets the current density colour scale to n
dB. The default value is 6 dB. For comparison to legacy plots generated with Idensity (before
November 2013), use –s 3.
The optional switch –a followed by a real number n adjusts the maximum of the colour scale
by n dB down from the maximum current density found in the FFH current density output
file(s). This is useful to shift the scale down when the low current density structures (such as
ground or shields plains) are of interest.
The current distribution over the entire model when the selected port is excited while all
others are shorted, is calculated and rendered. The combined current distribution of multiple
ports can be plotted by substituting the second parameter with a list of file names without the
.mat extension, no spaces in the list, and list items separated by commas, such as:
idensity inpfile.inp [j_P1,j_P2,j_Pportname2] dxffile.dxf
11.
Integration into existing CAD tools
InductEx is not a CAD tool – it is merely an inductance calculation utility that can be used as
a loose-standing tool or as part of a larger CAD suite. Some examples of CAD suites that can
use InductEx are given below.
11.1. Cadence Virtuoso
InductEx can be integrated into Cadence Virtuoso with the appropriate SKILL interface. Such
an implementation is currently under development by Vasili Semenov from Stony Brook
University. For this interface, Cadence outputs a .ixi file that is read by InductEx. This ascii
text file is easy to read and debug, allows direct identification of port/terminal objects from
within Cadence, and bypasses the need to convert layouts to GDSII format before extraction.
{Vasili: Please write short user description, with screenshots where applicable}
11.2. LayoutEditor
LayoutEditor, by Juspertor, has direct support for InductEx. To learn more, visit:
http://www.layouteditor.net/wiki/InductEx.
12.
Modelling
In future, this manual will describe problem modelling. For now, view the examples (and
batch files) on the InductEx web homepage to familiarize yourself with modelling basics.
Should you have any questions, e-mail coenrad@sun.ac.za for help.
12.1. Terminals
Terminals can be defined as lines (paths) or boundaries/polygons. There is a slight difference
between these methods, which results in slightly different calculation results.
InductEx User’s Manual
13.
33
Examples
Layouts in this section are real circuit examples from a host of processes. Permission was
obtained to use each example.
13.1. Confluence cell for FLUXONICS 1kA/cm2 process
Shows CUT layer effects and series junctions (for both instances: ports and not declared as
ports), as well as resistivity. Reference Fourie Full gate verification.
13.2. JTL for ADP2 process
Show with all GND layers, as well as with layers removed.
13.3. eTFF with skyplane for Hypres process
To be added. Will show skyplane.
13.4. Pulse transfer circuit in STP2
Show delimitation of ground to handle left-right ground plane isolation.
13.5. Coupled antennas without ground plane in IPHT process
Show handling of ungrounded layouts of extreme dimensions, with direction-specific
blanking and split terminals.
13.6. SQUID in HTS monolayer process
Show handling of split terminals and no ground plane.
14.
Command line parameters / switches
InductEx uses command line parameters and switches to enable CAD tool integration.
The first command line parameter must be the layout input file, which can be any of the
following formats (identified by the file extension): Calma GDSII, CIF or DXC.
The other parameters or switches can be organized at random, and many are optional.
-b – Disables SVD solution, so that the user must use matrix_I.txt and
matrix_v.txt to solve inductance.
-c n – specifies n as the GMRES iteration limit for FFH or TetraHenry. The FFH
default is 200 iterations, but InductEx lifts this default to 400 iterations when no
preconditioner is selected.
-d [outfilename.gds] – the -d switch instructs InductEx to write the geometry
input to a GDS file after flattening all cell hierarchies and applying mask-wafer bias
adjustments. If the optional output file name is omitted, InductEx will add the prefix
InductEx User’s Manual
34
inductex_ to name of the geometry input file and use this as the output file name. This
switch is useful to verify what InductEx thinks it read, and to view mask-wafer bias effects.
InductEx also writes a file with slicing and node number information for debugging purposes.
-e – Equalises grid slicing, irrespective of positions of individual vertices. This
option is only useful for very large structures with non-Manhattan polygon structures (such as
spiral inductors) that create intractably large segment counts (such as millions of segments).
The GapMax value for each layer is then used to set segment size. Because there is no
alignment of segments above vias, ZSegsToEC is overrided to TRUE.
-fh – the -fh switch enables FFH execution. If the switch is omitted, only the .inp
mesh file is created, and the output from the last execution of FFH is used to solve the
impedance network. If a change to the circuit netlist is made without any change to the
layout, leaving out the –fh switch lets InductEx solve the network without recalculating
current distribution with FFH.
-i {filename.inp | filename.geo} – specifies the name of either the
meshed FFH input file generated by InductEx (if the .inp suffix is used), or the TetraHenry
geometry file for the third-party meshing software Gmsh if the .geo suffix is used. If this
switch is omitted, InductEx will use the value assigned to the environment variable IXINP.
Failing that, the default name ix.inp is used and InductEx defaults to the FFH engine.
-k – Disables file cleanup after InductEx execution. This leaves the current density
files (j_Pxxx.mat) for processing/visualization with IDensity2 and any DXF viewer.
-l filename.ldf – specifies the layer definition file from which process
parameters are read. If no filename is specified (the switch omitted), InductEx will use the
default layer definition filename assigned to the environment variable IXLDF. If the
environment variable is also not set, InductEx will attempt to read the layer definitions from
the default file ix.ldf.
-m – Enables the creation of a Matlab script solve_impedances.m that solves
impedance from the calculated branch currents and port voltages. This script can be used to
alter the solution model when the user wants control over the solution for especially
underdetermined systems with bad condition numbers.
-n {filename.cir | filename.js} – specifies the name of the Spice
netlist file used by InductEx to find the inductance network. If this switch is omitted,
InductEx will try to read the netlist from the file with the same name as the geometry input
file (in GDSII or other format). For example, if the input file is jtl.gds, then InductEx will
search for jtl.cir and jtl.js (in that order) to read the netlist from.
-o – sets FFH parameter override. This requires the override parameter string to be
defined in the environment variable IXFHP. InductEx will only pass the mesh file
(filename.inp) to FFH, while the value of IXFHP will replace all other parameters. This is
useful for playing with the accuracy and preconditioner options in FFH to optimize solution
speed of a specific problem.
-p filename.txt – specifies the name of the port label text file used by InductEx
to override port labels in the layout. The ASCII text file may have any extension, but .txt is
preferable.
-s n – specifies n as the speed-up option. If the parameter is omitted, InductEx uses
the default DIAG pre-processor in FFH, and analytical integration in TetraHenry. The
InductEx User’s Manual
35
options for FFH are: 0 – CUBE preconditioner, 1 – DIAG preconditioner, 2 – no
preconditioner with a default limit of 400 GMRES iterations. The limit can be altered with
the –c parameter. The options for TetraHenry are: 1 – Analytical integration, 2 – Gaussian
quadrature numerical integration.
-t filename – specifies the name of the text-based terminal definition file that
declares ports/terminals in Lmeter-compatible format. If the filename or the switch is omitted,
InductEx defaults to lmeter.term for compatibility with Cadence-based Lmeter scripts.
-th – enables TetraHenry execution. This overrides the -fh swith. If the switch is
omitted, only the .geo geometry file is created, and the output from the last execution of
TetraHenry is used to solve the impedance network. If a change to the circuit netlist is made
without any change to the layout, leaving out the -th switch lets InductEx solve the network
without recalculating current distribution.
-v – Verbose mode on. With this switch set, InductEx prints more information to the
screen and the output file sol.txt.
-w name – writes all native output files with name_ as prefix (yielding
name_sol.txt, name_ix.cur, name_fastout.out and name_a.txt). This
allows InductEx to execute without overwriting previous output files, and enables multiple
instances of the programme to execute in the same working directory.
-x n – specifies n as the number of processor cores to use with the numerical solver.
The default for FFH is the system maximum. For TetraHenry, the default is 4.
-y filename.txt – specifies the name of an ASCII text file that contains extra
FFH parameters on the first line. This allows users to override precision, maximum cores,
etc.
15.
Environment variables
InductEx reads default values from the following environment variables:
•
•
•
•
IXINP – default name for meshed FFH input file.
IXLDF – default layer definition file.
IXFHP – FFH parameter string passed from InductEx if override switch -o is set.
IXLICDIR – License file directory. The default is c:\inductex\licenses.
16.
Specifications
Table 7: Tested specifications of InductEx
Specification
Verified for
OS
Windows XP 32-bit
Windows 7 32-bit & 64-bit,
Windows 8.1 32-bit & 64-bit,
Mac OS 10.9.5 (Mavericks),
Linux Ubuntu 14.04 LTS (Trusty Tahr),
Linux RedHat 7
InductEx User’s Manual
36
GDSII file read-in
LASI 6
XIC 3.2.25
LayoutEditor
CIF file read-in
LASI 6
InductEx supports GDSII stream version 3 read-in, and writes out files in version 3 format.
For GDSII input files, all boundaries, boxes and paths must be of DATATYPE 0, and all text
of TEXTTYPE 0, unless the DataTypeNotZero parameter is TRUE. This is implicit in
LASI and XIC, but not in Cadence. Make sure to specify this if your layout tool allows
multiple data- and text types.
InductEx places no limit on the number of vertices per path or polygon in GDSII or CIF input
files.
No text in InductEx input files is case sensitive. All text is converted to lowercase before
processing.
InductEx discards resistive layers automatically, even though these should be defined to
allow the correct vertical offset of upper layers, and to allow operational layers to process
vias that terminate on resistive layers (such as I1B for Hypres).
From version 4.25 onwards, InductEx allows positive or negative mask ground planes (where
earlier versions only supported negative mask ground planes).
The maximum supported GDSII structure reference name length is 127 characters.
Apply text labels for port declarations in the topmost level only for GDSII files. All text in
subcells is discarded. Text labels may be in any layer, and have to start with the letter “P”.
Text labels for port / terminal declarations are matched to structures defined in the TERM
layer. For polygon structures, text labels must be placed within the boundaries of the polygon.
For paths (lines) or crushed boxes, the text labels must be placed on the edge of the terminal
structure. If a terminal object cannot be identified, InductEx will process vias to try and link
one to the port / terminal text layer.
Maximum text label length (for terminal declaration): 40 characters.
The layer names in a text label must correspond to the layer names defined in the technology
definition (.ldf) file, and do not have to be the same as those in your layout editor or CIF file.
InductEx uses only layer numbers to identify layers from layout files (for compatibility with
GDSII).
Ports can be defined in a single text label, which assigns the same terminal block or boundary
to the positive and negative terminals of the port. Ports can also defined one terminal at a
time, which can then be linked to different boundaries. Ports must have one positive and
either one or two negative terminals.
Port names may be up to 20 characters long, and may contain any alpha-numeric characters
except SPACE, + and -. (SPACE is a separator in the label, while + and – indicate terminal
polarity (which does not form part of the port name).
Since ports on different layers may overlap in the xy plane, port polygons are not merged
during processing. Thus, if non-rectangular ports/terminals are required, these should be
defined as a single polygon in layout, rather than abutting blocks.
InductEx User’s Manual
37
Port structures must have all edges aligned with the x or y axes.
Paths are converted to polygons by InductEx. Non-Manhattan layouts are accepted, but the
bend angle must not exceed 90 degrees.
Objects are processed by layer order, and layer operations (add, subtract, etc.) are therefore
only effective for layers of lower order. If multiple isolation layers need to be combined into
one, for instance, include the layerADD operation in the highest order isolation layer.
17.
Exit codes
Exit codes are also printed in the exit message to the standard output. A comprehensive list,
with possible solutions, is shown below.
1 : Error while trying to open GDS file. The file does not exist, or cannot be read.
2 : GDS, CIF, IXI or DXC input filename does not exist.
3 : No layer definition file (filename.ldf) was supplied, either as a command line
parameter or an environment variable.
4 : Error while trying to open layer definition file.
5 : Error while trying to open Spice netlist file, either as “.cir” or as “.js”.
6 : Error creating FFH .inp deck file.
7 : Could not execute FFH.exe.
8 : Could not execute shell application.
9 : Error while trying to open port label file.
10 : Layer definition file does not specify ground plane layer. Add the parameter
gplayer=n to the .LDF file, where n is the ground plane layer’s GDS number.
11 : Duplicate layer number in .LDF file. This will overwrite the first instance of the layer,
and could cause errors. Look for duplication in the .LDF file by searching the layer number.
12 : Duplicate layer order in .LDF file. This will overwrite the layer order sequence, so that
the process will most likely not be modelled correctly. Look for duplication in the .LDF file
by searching the layer order number.
13 : No parameter block defined in .LDF file. Check if parameter block starts with
$Parameters.
20 : Cannot resolve all inductor (branch) currents. This could mean that there are not enough
ports.
21 : Singular value decomposition failed.
40 : Inductor name duplicated in circuit netlist file. Remove ambiguity by renaming one of
the inductors (case – capitals or not – is ignored).
42 : Port with given name not completely defined. Verify that the corresponding port labels in
the layout are correct.
43 : Number of ports in geometry input file do not match number of ports in circuit netlist.
44 : Number of ports extracted from text labels does not match number found in terminal
layer plus converted vias.
InductEx User’s Manual
38
45 : Cannot link positive or negative terminal of a port to a layout figure. This aborts
InductEx execution.
46 : Port positive or negative terminal layer definition invalid, or does not support terminals
(should be FilmType “S” or “R”).
47: There are more ports in the current output file (ix.cur) than in the netlist/layout. This will
cause junk solutions.
48: There are fewer ports in the current output file (ix.cur) than in the netlist/layout. This will
cause junk solutions.
50 : GDSII file header corrupt or invalid. Check GDSII conversion or verify with external
viewer.
51 : GDSII structure name exceeds 127 characters. Check that all cell names are shorter than
128 characters.
52 : GDSII SREF has magnification unequal to 1. Check that no cells are magnified.
53 : GDSII SREF has angle not equal to 0, 90, 180 or 270 degrees.
55 : Path read with type = 1 (thus extends beyond the endpoints of the path in semicircles).
This is not supported. Check paths in all cells.
56 : Path with bend angle greater than 90 degrees read, causing ambiguity at corner.
57 : Polygon with wrong orientation causes ground plane delimit failure. Try to make give all
polygons the same orientation in your layout.
58 : Duplicate terminal label names found at different coordinates in layout file. Ambiguity
causes program termination.
60 : Duplicate layer name in CIF file – ambiguity causes InductEx to terminate. Check the
top of the CIF file (especially LASI output) for text such as (LAYER 1 CIF="M0");. If
another layer number has the same name, delete the incorrect definition and correct the layer
table in your layout tool.
71 : Terminal line not directed along x or y axis for TetraHenry mesh setup. Currently, line
terminals are only allowed along one of these Cartesian axes.
80 : Error opening FFH port current output file after field solving. Check your FFH version.
81 : Error opening Solver output file solver_out.txt after SVD. File might not exist –
check that Solver executes correctly or is in the path.
90 : Exception – positive or negative terminal of a port has no nodes. This is an InductEx
node-building error and should be reported if seen.
100 : Bad cycle found from netlist. This could be due to series inductors in a branch, or a
branch with a port but no inductance.
110 : Could not read FFH version number.
111 : FFH version is incompatible with InductEx. Use the FFH binaries distributed with this
version of InductEx.
112 : Could not read license file ix_license.txt.
113 : Invalid license string;
InductEx User’s Manual
39
120 : Cannot split a concave polygon into two, so that InductEx forces an exit from an
endless loop. This means that a polygon was processed for which a line intersect from one
edge of a concave angle to any other edge on the polygon could not be found. It should not
occur, and would indicate a bug in the “SplitPoly” or “CheckExtendedLineIntersect”
functions.
18.
Common mistakes new users make
InductEx, despite its small size and console-only implementation, is a complex tool. It takes
some practice getting used to, and some user mistakes crop up regularly. If you are a new
user, browse through the list if your extraction does not want to work.
•
Text labels not placed on ports (InductEx cannot link text to ports/terminals)
In all demonstrations of InductEx, the lower left part of a port text label is placed on
or in a port object because that is where the coordinate cursor is. In LASI, the
coordinates of a text label are displayed prominently, and by default is at the left
bottom of the text. The position of this coordinate cursor is used by InductEx to link
text to a port or terminal. However, some layout utilities centre text around the
coordinates (mid centre), and if a user then tries to put the lower left part of text on a
port object, the actual coordinates might be far to the right and top, causing a port
mismatch. The first time you draw your own extraction model, make sure that you
know where text is displayed in relation to the text coordinates, and place the
coordinates over port objects. You may also try to set the text label properties to
bottom-left.
•
Series inductors
If your circuit netlist contains inductors in series, the individual inductor values are
mathematically intractable.
19.
Frequently asked questions
1. Why are some inductances negative?
Negative inductance results are incorrect. This is mostly the result of ports defined the wrong
way round. If you find a negative inductance in your results, scrutinize your layout model and
make sure that every port’s terminals (positive first and negative second) correspond to the
nodes defined in the circuit netlist. For instance, if a port is defined as
P1 1 0
in the circuit netlist, the positive terminal in the layout should not be on a layer connected
immediately to ground. The problem is easily solved by swopping around the terminals of
offending ports.
If all port polarities are correctly defined, the cause of negative inductance is often a
disregarded mutual inductance. Scrutinize your layout for inductors that are collocated or that
might be coupled (strongly or weakly). Add coupling factors (K elements) to the netlist file,
and solve again.
2. Why do I lose connectivity through vias for SDP and ADP, and how do I solve it?
For the SDP and ADP layer definitions, there are two isolation negative mask layers that
specify connection from the upper wiring layer (COU) to a lower structure, either the lower
wiring layer (BAS) or the trilayer (JJ). These mask layers, BC and JC respectively, have
InductEx User’s Manual
40
different GDS numbers and must therefore have different orders in the layer definition file for
InductEx. When a connection from the COU layer to a lower layer is checked, the layer with
negative mask layer with the highest order will be investigated first. If an object is found, the
next highest order layer will be interrogated for an overlapping object. If one is not found,
InductEx calculates that no connection exists. Since the SDP and ADP processes assume both
BC and JC to be sufficient for connection, and these are therefore not drawn as overlapping,
an indication is needed for InductEx that connectivity is not broken if one mask layer is
absent. This is easily done with the LayerADD parameter in the layer definition file. In the
example SDP.LDF, the layer BC has a LayerADD parameter equal to the GDS layer
number of layer JC. This lets InductEx add all structures from the JC layer to BC before
checking connectivity and segmenting models.
20.
•
Known bugs
None reported in version 5 as yet.
21.
Binaries
InductEx
and
source
files
distributed
with
•
Idensity – Visualization tool. Processes a FFH .inp and associated .mat current density
output file to produce an AutoCAD DXF file with a 3D colour or grayscale
representation of current distribution (binary only).
•
Inp2dxf – Visualization tool. Processes a FFH .inp file to produce an AutoCAD DXF
file with a 3D representation of the elements in the numerical model. Layer numbers
and colours are determined from the layer definition file for ease-of-view (binary
only).
•
FFH – Magnetoquasistic MoM field solver.
•
Solver – Linear system of equations solver, calling the Lapack zgelsd function.
22.
References
[1] C. J. Fourie, O. Wetzstein, T. Ortlepp and J. Kunert, “Three-dimensional multi-terminal superconductive
integrated circuit inductance extraction,” Supercond. Sci. Technol., vol. 24, 125015, December 2011.
[2] C. J. Fourie, O. Wetzstein, J. Kunert and H.-G. Meyer, “SFQ circuits with ground plane hole-assisted
inductive coupling designed with InductEx,” IEEE Trans. Appl. Supercond., vol. 23, no. 3, pp. 1300705,
June 2013.
[3] C. J. Fourie, O. Wetzstein, J. Kunert, H. Toepfer and H.-G. Meyer, “Experimentally verified inductance
extraction and parameter study for superconductive integrated circuit wires crossing ground plane holes,”
Supercond. Sci. Tech., vol. 26, 015016, January 2013.
[4] C. J. Fourie and W. J. Perold, “Simulated inductance variations in RSFQ circuit structures,” IEEE Trans.
Appl. Supercond., vol. 15, no. 2, pp. 300-303, June 2005.
[5] C. J. Fourie, “Full-gate verification of superconductive integrated circuit layouts with InductEx,” IEEE
Trans. Appl. Supercond., vol. 25, no. 1, 1300209, February 2015.
[6] P. I. Bunyk and S. V. Rylov, “Automated calculation of mutual inductance matrices of multilayer
superconductor integrated circuits,” Ext. Abs. ISEC, p. 62, 1993.
[7] M. Kamon, M. J. Tsuk and J. K. White, “Fasthenry: a multipole-accelerated 3-d inductance extraction
program,” IEEE Trans. Microw. Theory Tech., vol. 42, pp. 1750-1758, 1994.
[8] S. Nagasawa et al., “New Nb multi-layer fabrication process for large-scale SFQ circuits,” Physica C, vol.
469, pp. 1578-1584, 2009.
[9] W. H. Chang, “The inductance of a superconducting strip transmission line,” J. Appl. Phys., vol. 50, pp.
8129-8134, 1979.
InductEx User’s Manual
23.
41
Third-Party Software Notices and Licenses
InductEx contains procedures from the third-party software listed below:
23.1. Lapack
Lapack available at www.netlib.org/lapack.
Copyright (c) 1992-2013 The University of Tennessee and The University of Tennessee Research Foundation.
All rights reserved.
Copyright (c) 2000-2013 The University of California Berkeley. All rights reserved.
Copyright (c) 2006-2013 The University of Colorado Denver. All rights reserved.
$COPYRIGHT$
Additional copyrights may follow
$HEADER$
Redistribution and use in source and binary forms, with or without modification, are permitted provided
that the following conditions are met:
- Redistributions of source code must retain the above copyright notice, this list of conditions and the
following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
following disclaimer listed in this license in the documentation and/or other materials provided with the
distribution.
- Neither the name of the copyright holders nor the names of its contributors may be used to endorse or
promote products derived from this software without specific prior written permission.
The copyright holders provide no reassurances that the source code provided does not infringe any patent,
copyright, or any other intellectual property rights of third parties. The copyright holders disclaim any
liability to any recipient for claims brought against recipient by any third party for infringement of that
parties intellectual property rights.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
23.2. Clipper
Clipper available at http://www.angusj.com/delphi/clipper.php.
Boost Software License - Version 1.0 - August 17th, 2003
Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the
software and accompanying documentation covered by this license (the "Software") to use, reproduce,
display, distribute, execute, and transmit the Software, and to prepare derivative works of the
Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the
following:
The copyright notices in the Software and this entire statement, including the above license grant, this
restriction and the following disclaimer, must be included in all copies of the Software, in whole or in
part, and all derivative works of the Software, unless such copies or derivative works are solely in the
form of machine-executable object code generated by a source language processor.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT
LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT.
IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR
OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
InductEx User’s Manual
24.
42
Appendix A – LDF file example
*Layer info Hypres 4k5 A.cm-2 process
*
$Parameters
* Global parameters
Units
= 1e-6
CIFUnitsPerMicron = 100
AbsMin
= 0.001
GapMax
= 2.5
GPOverhang
= 2.5
ProcessHasGroundPlane = TRUE
LastDieLayerOrder = 10
GPLayer
= 30
BlankAllLayer
= 60
BlankXLayer
= 61
BlankYLayer
= 62
TermLayer
= 63
TextLayer
= 64
Lambda
= 0.09
Sigma
= 10
HFilaments
= 1
Colour
= 1
TerminalInRange
= 1.0
$End
*
* LAYERS
* M0
$Layer
Number
=
30
Name
=
M0
Bias
=
0.2
Thickness =
0.1
Lambda
=
0.09
Order
=
0
Mask
=
-1
Filmtype
=
S
HFilaments =
1
Colour
=
130
$End
*
$Layer
Number
=
1
Name
=
M1
Bias
=
0
Thickness =
0.135
Lambda
=
0.09
Order
=
2
Mask
=
1
Filmtype
=
S
HFilaments =
2
Colour
=
10
$End
*
$Layer
Number
=
6
Name
=
M2
Bias
=
-0.2
Thickness =
0.3
Lambda
=
0.09
Order
=
7
Mask
=
1
Filmtype
=
S
HFilaments =
3
Colour
=
182
$End
*
$Layer
Number
=
10
Name
=
M3
Bias
=
-0.4
Thickness =
0.6
Lambda
=
0.09
Order
=
9
Mask
=
1
Filmtype
=
S
HFilaments =
3
Colour
=
160
$End
*
* I0
$Layer
Number
=
31
Name
=
I0
Bias
=
0.2
Thickness =
0.15
Order
=
1
Mask
=
-1
Filmtype
=
I
$End
*
* I1C
$Layer
Number
=
4
Name
=
I1C
Bias
=
0
Thickness =
0.05
Order
=
3
Mask
=
0
Filmtype
=
A
$End
*
* I1B
$Layer
Number
=
3
Name
=
I1B
Bias
=
-0.1
Thickness =
0.2
Order
=
6
Mask
=
-1
Filmtype
=
I
LayerSUB
=
9
* We subtract layer 9 (R2) from I1B to
* eradicate I1B vias to resistors that
* will short to M1 otherwise (all
* normal layers are discarded during
* segmentation, thus removing them
* from the z-directed stack for
* connectivity checking).
$End
*
* I2
$Layer
Number
=
8
Name
=
I2
Bias
=
0.2
Thickness =
0.5
Order
=
8
Mask
=
-1
Filmtype
=
I
$End
*
InductEx User’s Manual
* R2
$Layer
Number
Name
Bias
Thickness
Sigma
Order
Mask
Filmtype
$End
*
* R3
$Layer
Number
Name
Bias
Thickness
Sigma
Order
Mask
Filmtype
$End
*
* A1
$Layer
Number
Name
Bias
Thickness
=
=
=
=
=
=
=
=
9
R2
0
0.07
10
5
1
N
=
=
=
=
=
=
=
=
11
R3
0
0.35
10
10
1
N
=
=
=
=
5
A1
0
0.04
43
Order
=
4
Mask
=
0
Filmtype
=
A
$End
*
* TERM
$Layer
Number
=
63
Name
=
TERM
Bias
=
0
Thickness =
0.1
Order
=
11
Mask
=
-4
$End
*
* OPERATORS
** Define operators here
*
$Operator
Name
=
GPM3M0
Type
=
EC
LayersRemove
=
1 6 31 4 3 8 9 5
LayersConnect
=
30 10
$End
*
$Operator
Name
=
SQJJ
Type
=
MR
LayersTransform =
3 4 5
$End
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