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32-BIT ARM-BASED
MICROPROCESSORS
SAMA5D2 (Rev. C) Xplained Ultra Evaluation Kit User's
Guide
Introduction
This user guide introduces the Microchip SAMA5D2 (Rev. C) Xplained Ultra evaluation kit (SAMA5D2C-
XULT kit) and describes the development and debugging capabilities for applications running on the
SAMA5D2 Arm ® Cortex ® -A5-based microprocessor unit (MPU). The SAMA5D2C-XULT kit supports the following part numbers:
• ATSAMA5D21C
• ATSAMA5D22C
• ATSAMA5D23C
• ATSAMA5D24C
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 1
• ATSAMA5D26C
• ATSAMA5D27C
• ATSAMA5D28C
32-BIT ARM-BASED MICROPROCESSORS
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 2
Table of Contents
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 3
32-BIT ARM-BASED MICROPROCESSORS
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 4
32-BIT ARM-BASED MICROPROCESSORS
Kit Contents
1. Kit Contents
The SAMA5D2 (Rev. C) Xplained Ultra evaluation kit includes:
• One SAMA5D2C-XULT board
• One Micro-AB type USB cable
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 5
32-BIT ARM-BASED MICROPROCESSORS
Evaluation Kit Specifications
2. Evaluation Kit Specifications
Table 2-1. Evaluation Kit Specifications
Characteristic
Board
Board Supply Voltage
Temperature Operating
Storage
Relative Humidity
Main Board Dimensions (L x W x H)
Board Identification
Specifications
SAMA5D2C-XULT
USB and/or Battery powered
0°C to +70°C
-40°C to +85°C
0 to 90% (non-condensing)
135 × 88 × 20 mm
SAMA5D2 XPLAINED ULTRA (see Note 1 )
Note:
1.
No change to board name marking from Revision A and B. The bill of materials of mounted components has changed but the PCB itself remains unchanged.
2.1 Electrostatic Warning
WARNING
ESD-Sensitive Electronic Equipment!
The evaluation kit is shipped in a protective anti-static package. The board system must not be subject to high electrostatic potentials.
We recommend using a grounding strap or similar ESD protective device when handling the board in hostile ESD environments (offices with synthetic carpet, for example). Avoid touching the component pins or any other metallic element on the board.
2.2 Power Supply Warning
WARNING
Hardware Power Supply Limitation
Powering the board with voltages higher than 5 VCC (e.g., the 12 VCC power adapters from other kits such as Arduino kits) may damage the board.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 6
32-BIT ARM-BASED MICROPROCESSORS
Evaluation Kit Specifications
WARNING
Hardware Power Budget
Using the USB as the main power source (max. 500 mA) is acceptable only with the use of the on-board peripherals and low-power LCD extension.
When external peripheral or add-on boards need to be powered, we recommend the use of an external power adapter connected to the USB Micro-AB connectors (can provide up to 1.2A on the 3.3V node).
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 7
32-BIT ARM-BASED MICROPROCESSORS
Board Powerup
3. Board Powerup
Three sources are available to power up the SAMA5D2C-XULT board:
• USB-powered through the USB Micro-AB connector (J23 - default configuration)
• Powered through the USB Micro-AB connector on the Embedded Debugger (EDBG) interface (J14)
• Powered through a rechargeable battery Li-polymer 3.7V connected to J3 or J4
WARNING
Unlike Arduino Uno boards, the SAMA5D2C-XULT board runs at 3.3V. The maximum voltage that the I/O pins can tolerate is 3.3V. Providing higher voltages (e.g., 5V) to an I/O pin could damage the board.
The sequence for the initial powerup of the board is the following:
1.
Unpack the board, taking care to avoid electrostatic discharge.
2.
Connect the USB Micro-AB cable to the connector J23 (or J14).
3.
Connect the other end of the cable to a free USB port of your PC.
Table 3-1. Electrical Characteristics
Parameter
Input voltage
Maximum input voltage (limits)
Maximum DC 3.3V current available
I/O voltage
Value
5 VCC
6 VCC
1.2A
3.3V only
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 8
32-BIT ARM-BASED MICROPROCESSORS
Sample Code and Technical Support
4. Sample Code and Technical Support
After boot up, you can run sample code or your own application on the evaluation kit. Sample code and technical support is available on http://www.microchip.com
. In particular, the software package (example source code and drivers) can be found on the “SAMA5D2 Software Package” page of our website.
Linux software and demos can be found on http://www.at91.com/linux4sam/bin/view/Linux4SAM/ .
WARNING
Make sure that the latest software version is downloaded before starting your evaluation. For more information, go to http://www.at91.com/linux4sam/bin/view/Linux4SAM/ .
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 9
32-BIT ARM-BASED MICROPROCESSORS
Hardware Overview
5. Hardware Overview
5.1 Introduction
The SAMA5D2C-XULT kit is a full-featured evaluation platform for the SAMA5D2 series ARM-based microprocessor units (MPU). It allows users to extensively evaluate, prototype and create applicationspecific designs.
5.2 Equipment List
The SAMA5D2C-XULT board is based on the integration of an ARM Cortex-A5-based microprocessor with external memory, one Ethernet physical layer transceiver, one SD/MMC interface, one host USB port and one device USB port, one 24-bit RGB LCD and debug interfaces.
Seven headers, compatible with Arduino R3 (Uno, Due) and two Xplained headers are available for various shield connections.
5.3 Board Features
Table 5-1. Board Specifications
Characteristics
Dimensions (L x W x H)
Processor
Oscillators
Specifications
135 x 88 x 20 mm
SAMA5D27C (289-ball BGA package), 14x14 mm body, 0.8 mm ball pitch
MPU, EDBG: 12 MHz crystal
RTC: 32.768 kHz
PHY: 25 MHz
Main memory
Accessory memories
SD/MMC
USB
Display
Image sensor
Ethernet
Debug port
2 x DDR3L SDRAM 2 Gbit - 16 Mbit x 16 x 8 banks (total 4 Gbit = 512 Mbyte)
1 x eMMC NAND Flash 4 Gbit
One Serial EEPROM SPI
One QSPI Serial Flash MX25L25673G
One EEPROM with MAC Address and Serial Number
One 4-bit SD card connector
One USB Host with power switch
One Micro-AB USB device
One LCD interface connector, LCD TFT Controller with overlay, alpha-blending, rotation, scaling and color space conversion
One ISC interface and connector
One Ethernet PHY (RMII 10/100 MHz)
One JTAG interface connector
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 10
32-BIT ARM-BASED MICROPROCESSORS
Hardware Overview
Characteristics
Expansion connector
Board supply voltage
Battery
User interface
Specifications
One EDBG interface with CDC
One serial debug console interface (3.3V level)
Arduino R3 compatible set of connectors
XPRO set of connectors
5V from USB
On-board power regulation by PMIC
External battery-powered capability
On-board PowerCap
Reset, Wakeup and user configurable push buttons
One tri-color user LED (red, green, blue)
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 11
32-BIT ARM-BASED MICROPROCESSORS
Board Components
6. Board Components
6.1 Board Overview
The fully-featured SAMA5D2C-XULT board integrates multiple peripherals and interface connectors as shown in the figure below.
Figure 6-1. SAMA5D2C-XULT Board Overview
WWW.ATMEL.COM
R184
R183
C57
2
2
BP3
3
4
BP2
3
4
C50
L13
C49
C56
R153
EDBG-JTAG A5-JTAG R104
R99
R75
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
R59
R43
C15
L4
R46
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
C14
C11
JP7
VDDIODDR
R127
R125
R128
R126
R106
R101
R 9 7
R107
R102
R 9 8
C17
C13
L3
R103
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15 HSIC
R152
C51
R146
R139
C46
JP6 VDDBU
C44
R131 L12
R123
R105
R100
JP4
VDDCORE
1
C19
R44
R41
R30
2
R26 VBAT
4
3
C2 C3
R27
R24
R18
R11
LCD
J2
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
6.1.1 Default Jumper Settings
The board overview shows the default jumper settings. Blue jumpers are configuration items. Red jumpers are current measurement points. The table below describes the functionality of the jumpers.
Table 6-1. SAMA5D2C-XULT Jumper Settings
Jumper
JP1
JP2
JP3
JP4
JP5
JP6
Default
OPEN
OPEN
CLOSE
CLOSE
CLOSE
CLOSE
Function
Disable EDBG
Disable Debug
VDD_3V3_LP current measurement
VDDCORE current measurement
VDDISC + VDDIOP0/1/2 current measurement
VDDBU current measurement
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 12
Jumper
JP7
JP8
JP9
Default
CLOSE
CLOSE
OPEN
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Function
VDDIODDR_MPU current measurement
VDD_5V_IN current measurement
Disable CS of SPI, QSPI and eMMC memories
6.2 Connectors On Board
The table below describes the interface connectors on the SAMA5D2C-XULT board.
Table 6-2. SAMA5D2C-XULT Board Interface Connectors
Connector Interfaces to
J23
J13
J1
J11
USB A Device. Supports USB device using a type Micro-AB connector
USB Host B. Supports USB host using a type A connector
Serial DBGU (3.3V level)
JTAG, 10-pin IDC connector
J14
J15
J6
J2
EDBG USB connector
USB C (not populated)
Ethernet
Expansion connector with all LCD controller signals for display module connection (QTouch
®
,
TFT LCD display with touchscreen and backlight)
SDHCI SD/MMC connector
Battery connectors
J19
J3, J4
J12 Tamper connector (not populated)
J7, J8, J9,
J16, J17,
J20, J21, J22
Expansion connectors with Arduino R3 compatible PIO signals
J24, J25, J26 Xplained Pro Expansion connectors
J10 EDBG JTAG (not populated)
J18
J5
ISC interface
Class-D amplifier output
6.3 Function Blocks
6.3.1 Processor
The SAMA5D2 Series is a high-performance, power-efficient MPU based on the ARM Cortex-A5 processor. Refer to the SAMA5D2 Series datasheet for more information.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 13
32-BIT ARM-BASED MICROPROCESSORS
Board Components
6.3.2 Power Supply Topology and Power Distribution
6.3.2.1 Power Supplies
Detailed information on the device power supplies is provided in the tables “SAMA5D2 Power Supplies” and “Power Supply Connections” in the SAMA5D2 Series datasheet.
Figure 6-2. Processor Power Lines Supplies
VDDCORE
(1V2)
C28
10uF
VDDIODDR
C70
10uF
VDDBU
C134
100nF
VDDIOP0
( 3 V 3 )
C135
100nF
C118
100nF
C27
10uF
(1V35)
C71
10uF
(3V3) VDDBU
VDDIOP0
C131
100nF
VDDHSIC
( 1 V 2 ) VDDHSIC
C143
100nF
C31
100nF
C108
100nF
C119
100nF
C29
100nF
C132
100nF
C80
100nF
C104
100nF
C88
100nF
C102
100nF
C101
100nF
C114
100nF
VDDUTMIC
(1V2) VDDUTMIC
C147
4.7uF
C133
100nF
VDDANA
(3V3)
C144
100nF
VDDIOP1
( 3 V 3 )
C107
100nF
VDDFUSE
( 2 V 5 ) VDDFUSE
C111
100nF
VDDUTMII
(3V3) VDDUTMII
C125
100nF
VDDANA
C136
100nF
VDDIOP1
C103
100nF
C30
1nF
C105
1nF
VDDAUDIOPLL
(3V3) VDDAUDIOPLL
C148
4.7uF
C140
100nF
C110
100nF
C122
1nF
C84
1nF
VDDIOP2
( 3 V 3 ) VDDIOP2
C120
100nF
VDDSDHC
(3V3 or 1V8) VDDSDHC
VDDCORE
C137
1nF
VDDIODDR
C97
1nF
VDDCORE
U6G
(1V2) D7
D9
H3
K13
N5
N9
VDDCORE_1
VDDCORE_2
VDDCORE_3
VDDCORE_4
VDDCORE_5
VDDCORE_6
VDDIODDR (1V35) D11
D12
D15
E15
H15
J15
L15
VDDDDR_1
VDDDDR_2
VDDDDR_3
VDDDDR_4
VDDDDR_5
VDDDDR_6
VDDDDR_7
VDDBU
VDDANA
VDDIOP0
VDDIOP1
VDDIOP2
(3V3) N7
VDDBU
(3V3) K3
L5
VDDANA_1
VDDANA_2
(3V3) E6
F7
(3V3)
(3V3)
N13
R14
F10
VDDIOP0_1
VDDIOP0_2
VDDIOP1_1
VDDIOP1_2
VDDIOP2
VDDHSIC
VDDFUSE
VDDAUDIOPLL
(1V2) R9
(2V5) M12
(3V3) T3
VDDHSIC
VDDFUSE
VDDAUDIOPLL
VDDUTMIC
VDDUTMII
(1V2)
(3V3)
P7
P8
VDDSDHC (3V3 or 1V8) P11
VDDPLLA
VDDOSC
VDDISC
(1V2) U4
T7 (3V3)
(3V3) F4
VDDUTMIC
VDDUTMII
VDDSDMMC
VDDPLLA
VDDOSC
VDDISC
GNDCORE_1
GNDCORE_2
GNDCORE_3
GNDCORE_4
GNDCORE_5
GNDCORE_6
E7
E9
H4
K12
M5
M9
GNDDDR_1
GNDDDR_2
GNDDDR_3
GNDDDR_4
GNDDDR_5
GNDDDR_6
GNDDDR_7
D14
E11
E12
E14
H14
J14
L14
GNDBU
N6
GNDANA_1
GNDANA_2
L3
K5
GNDIOP0_1
GNDIOP0_2
GNDIOP1_1
GNDIOP1_2
GNDIOP2
F6
G7
M13
P14
F9
GNDDPLL
GNDAUDIOPLL
T5
T4
GNDUTMIC
GNDUTMII
GNDSDMMC
GNDPLLA
GNDOSC
GNDISC
G4
R7
P9
R11
U5
T6
SAMA5D27-CU
GNDUTMII
R264 0R
VDDPLLA
( 1 V 2 ) VDDPLLA
R131
1R 1%
C43
4.7uF
C45
100nF
VDDOSC
( 3 V 3 ) VDDOSC
R269
1R 1%
C142
4.7uF
C128
100nF
VDDISC
(3V3) VDDISC
C138
100nF
GNDUTMII
6.3.2.2 Powerup and Powerdown Considerations
Powerup and powerdown considerations are described in section “Power Considerations” of the
SAMA5D2 Series datasheet.
WARNING
The powerup sequence provided in the SAMA5D2 Series datasheet must be respected for reliable operation.
6.3.2.3 ACT8945A Power Management IC
The ACT8945A is a complete, cost-effective and highly-efficient ActivePMU ™ power management solution, optimized to provide a single-chip power solution and voltage sequencing for SAMA5D2/
SAMA5D3/SAMA5D4 and SAM9 series MPUs. It also meets the control requirements of these devices.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 14
32-BIT ARM-BASED MICROPROCESSORS
Board Components
The ACT8945A features three step-down DC-DC converters and four low-noise, low-dropout linear regulators along with a complete battery charging solution featuring the advanced ActivePath ™ systempower selection function.
WARNING
Refer to the ACT8945A datasheet at http://www.active-semi.com/ for more details.
The three DC-DC converters utilize a high efficiency, fixed-frequency (2 MHz), current-mode PWM control architecture that requires a minimum number of external components. Two DC-DC converters are capable of supplying up to 1100 mA of output current, while the third supports up to 1200 mA. All four low-dropout linear regulators are high performance, low-noise regulators that supply up to 320 mA of output current.
Figure 6-3. Board Power Management
JP8
Header 1X2
JPR8
Jumper
VSYS_5V
A3
VIN
U22
VOUT1
VOUT2
A1
A2
VDDB_5V VDD_3V3
JPR6
Jumper
JP6
Header 1X2
[14] EDBG_USB_VBUS_5V
[10] USBA_VBUS_5V
R187
R186
10K
10K
2
6
8
3
IN1
VSNS
U12
STAT
OUT
EN ILIM
IN2 GND
TPS2113
1
7
4
5
VDD_5V_IN
C60
10uF
C58
100nF
D5
RB160M-60TR
R280 100R 1%
+ C42
0.2F/3.3V
1
2
D6
BAT54C
3
C44
DNP(1uF)
1 2
VDDBU
R185
1 2
390R 1%
C59
10uF
C180
10uF
L27
0.47uH
B1
B2
B3
SW1
SW2
PGND1
PGND2
AGND
EN
FAN48610
C1
C2
C3
C181
22uF
(Super)-Capacitor energy storage
C46
100nF
R139
DNP(2.2K)
Populate R if no Super Cap
[15] 5V_EXT_INP
[7] PMIC_CHGLEV_PA12
[9,10,12,14,15]
[7]
NRST
PMIC_IRQ_PB13
[8,15]
[8]
[8]
PMIC_LBO/EXP_PC8
PMIC_TWD0_PD21
PMIC_TWCK0_PD22
[9] SHDN
VDD_5V_IN
R11
DNP(11K 1%)
R24
DNP
(3.9K 1%)
1
Q2
BSS138 2
R9
3
VSYS_5V
R8
68K
(See note 1)
D9
(replaced with 0R-1206
- see User Guide)
R18
11K 1%
VDD_3V3
3
2 3
Q7
DNP
(IRLML6402) nPBSTAT
R26
DNP(8.2K 1%)
R15
100K
VSYS_5V
C165
4.7uF
1K
1
Q1
BSS138 2
C10 100nF
C8
100nF
R12
100K
R13
49.9K 1%
1
Q3
BSS138
3
2
R16
R17
R20
VIN_5V
VBAT
R21
R22
R27
2.43K 1%
C7
VSYS_5V
DNP(1nF)
R30
2.2M 1%
1.5M 1%
100R 1%
100R 1%
100R 1%
R41
C166
47nF
23
1
ISET
REFBP
R14
TP14
SMD
49.9K 1%
TP11
SMD
33
CHGIN
21
ACIN
20
LBI
22
11
12
13
19
27
26
CHGLEV nRSTO nIRQ nPBSTAT nLBO
SDA
SCL
0R
DNP(0R)
25
VSEL
10
PWRHLD
9 nPBIN
R19
0R
U2 ACT8945AQJ405-T
SW3
OUT3
15
17
VSYS_5V
VSYS1
VSYS2
VP1
VP2
VP3
INL
NC1 nSTAT
BAT1
BAT2
TH
28
29
30
24
31
32
39
35
16
6
40
R44
SW1
OUT1
SW2
OUT2
38
2
36
34
C163
10uF
C22
10uF
C164
10uF
C37
10uF
C176
10uF
L5
L6
100R 1%
VBAT 1
2
3
2.2uH
C20
10uF
C23
10uF
VDD_1V2
D1
J3
1X3Pin
RED
VSYS_5V
VBAT 1
2
C19
4.7uF
J4
DNP(Header 1X2 2.00MM)
VDD_1V35 VDD_1V35
For DDR3
JP7
Header 1X2
JPR7
Jumper
VDDIODDR
1 2
For MPU
C24
100nF
VDD_1V2
2.2uH
VDD_3V3
C38
C167
100nF
100nF
VDD_3V3
1 2
L1 2.2uH
OUT4
OUT5
OUT6
OUT7
4
5
8
7
VDD_2V5
VDD_3V3
VDD_3V3
VDD_1V8
C169
4.7uF
C17
4.7uF
C3
10uF
C173
4.7uF
C2
10uF
R327
R330
C1
100nF
VDDFUSE
0R VDD_3V3_LP
VDD_LED
VDDSDHC1V8 0R
1
L3
2
180ohm at 100MHz
C13
4.7uF
VDD_3V3_LP
JP3
Header 1X2
1 2
JPR3
Jumper
R129
JPR5
Jumper
R293
R284
R303
R300
JP4
Header 1X2
JPR4
Jumper
VDDCORE
1 2
2R2
L12
VDDPLLA
10uH_150mA
VDDUTMIC
1
L18
2
180ohm at 100MHz
1
L16
2
180ohm at 100MHz
VDDHSIC
VDDIOP2
1
L7
2
180ohm at 100MHz
1
L8
2
180ohm at 100MHz
1
L9
2
180ohm at 100MHz
1
L10
2
180ohm at 100MHz
VDDIOP1
VDDIOP0
VDDISC
VDDOSC
2R2
0R
L20 10uH_150mA
VDDUTMII
1
L19
2
VDDANA
0R
180ohm at 100MHz
1
L23
2
180ohm at 100MHz
VDDAUDIOPLL
2R2
L22 10uH_150mA
WAKE UP RESET
Note: Occasional board startup problems occurred when powered from a USB source with a weak
VBUS level below 4.8V. To avoid the voltage drop and resulting startup problems, production boards were assembled with a 0 Ω resistor in place of the Schottky diode D9 shown here.
Supply Group Configuration
The ACT8945A provides:
• All power supplies required by the SAMA5D2 device:
– 1.2V VDDCORE, VDDPLLA, VDDUTMIC, VDDHSIC
– 1.35V VDDIODDR
– 2.0V VDDBU
– 3.3V VDDIOP, VDDISC
– 1.8V or 3.3V VDDSDHC (= VDDSDMMC)
– 2.5V VDDFUSE
– 3.3V VDDOSC, VDDUTMII, VDDANA, VDDAUDIOPLL
• Power supplies to external chips on the main board:
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 15
32-BIT ARM-BASED MICROPROCESSORS
Board Components
– 2.5V VDDLED
– 4.8V VSYS_5V
6.3.2.4 Power Boost 5V
To generate a true 5V voltage from the PMIC output (4.8V typical), a FAN48610 low-power boost regulator is integrated into the design. This feeds the 5V USB host and the 5V LCD.
Figure 6-4. Power Boost 5V
VSYS_5V VDDB_5V
U22
A3
VIN VOUT1
VOUT2
A1
A2
C180
10uF
L27
0.47uH
C181
22uF
B1
B2
B3
PGND1
PGND2
SW1
SW2
EN
AGND
FAN48610
C1
C2
C3
6.3.2.5 Input Power Options
There are several power options for the SAMA5D2C-XULT board.
USB-powered operation is the default configuration, where the USB device port is connected to a PC or a
5V DC supply. The USB supply is sufficient to power the board in most applications. It is important to note that when the USB supply is used, the USB-B Host port has limited power. If USB Host port is required for the application, it is recommended that an external DC supply be used.
The figure below provides the schematics of power options.
Figure 6-5. Input Powering Scheme
JP8
Header 1X2
JPR8
Jumper VDD_5V_IN
[14] EDBG_USB_VBUS_5V
[10] USBA_VBUS_5V
R187
R186
10K
10K
8
3
2
6
IN1
U12
STAT
VSNS
EN
OUT
ILIM
IN2 GND
TPS2113
1
7
4
5
R185
1 2
390R 1%
C59
10uF
C60
10uF
C58
100nF
Note: USB-powered operation eliminates additional wires and batteries. It is the preferred mode of operation for any project that requires only a 5V source at up to 500 mA.
6.3.2.6 Battery Supply Source
The ACT8945A features an advanced battery charger that incorporates the ActivePath architecture for system power selection. This combination of circuits provides a complete, advanced battery-management system that automatically selects the best available input supply, manages charge current to ensure system power availability, and provides a complete, high accuracy (±0.5%), thermally regulated, fullfeatured single-cell linear Li+ charger.
The ActivePath circuitry monitors the state of the input supply, the battery, and the system, and automatically reconfigures itself to optimize the power system. If a valid input supply is present,
ActivePath powers the system from the input while charging the battery in parallel. This allows the battery to charge as quickly as possible, while supplying the system. If a valid input supply is not present,
ActivePath powers the system from the battery. Finally, if the input is present and the system current requirement exceeds the capability of the input supply, ActivePath allows system power to be drawn from both the battery and the input supply.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 16
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-6. Battery Powering Scheme
[7] PMIC_CHGLEV_PA12
[9,10,12,14,15]
[7]
NRST
PMIC_IRQ_PB13
[8,15]
[8]
[8]
PMIC_LBO/EXP_PC8
PMIC_TWD0_PD21
PMIC_TWCK0_PD22
VDD_3V3
(See note 1) nPBSTAT
R26
DNP(8.2K 1%)
R16
R17
R20
R27
2.43K 1%
100R 1%
100R 1%
100R 1%
33
CHGIN
21
20
ACIN
LBI
C166
47nF
23
1
ISET
REFBP
U2 ACT8945AQJ405-T
VSYS_5V
VSYS1
VSYS2
VP1
VP2
VP3
INL
NC1 nSTAT
BAT1
BAT2
TH
28
29
30
31
32
39
35
16
6
40
24
R44
C163
10uF
C164
10uF
C176
10uF
100R 1%
(See note 2)
VBAT 1
2
3
D1
J3
1X3Pin
RED
VSYS_5V
VBAT 1
2
C19
4.7uF
(See note 3)
SW1
OUT1
38
2
C167
100nF
J4 (See note 3)
DNP(Header 1X2 2.00MM)
22
11
12
13
19
27
26
CHGLEV nRSTO nIRQ nPBSTAT nLBO
SDA
SCL
SW2
OUT2
36
34
C7
VSYS_5V
DNP(1nF)
R30
R41
0R
DNP(0R)
25
VSEL
SW3
OUT3
15
17
Note:
1.
Refer to errata NRST .
2.
If the battery does not have a pack embedded thermistor (i.e., battery temperature monitoring), the
TH pin should be connected to ground => short J3 pins 2 and 3.
3.
If no battery is connected on connector J3 or J4, it is recommended that the charging function be disabled in the ACT8945 chip. To do so, write the SUSCHG bit to ‘1’ in APCH register (REG 0x71,
SUSCHG = 1).
Charger Input Interrupts
To facilitate input supply detection and eliminate the size and cost of external detection circuitry, the charger has the ability to generate interrupts based upon the status of the input supply. This function is capable of generating an interrupt when the input is connected, disconnected, or both, when the charger state machine transitions.
Charge Status Indicator
The charger provides a charge-status indicator output, nSTAT. nSTAT is an open-drain output which sinks current when the charger is in an active-charging state, and is high-Z otherwise. nSTAT features an internal 8 mA current limit, and is capable of directly driving an LED (D1).
Precision Voltage Detector
The low battery input (LBI) connects to one input of a precision voltage comparator, which can be used to monitor a system voltage such as the battery voltage. An external resistive-divider network can be used to set voltage monitoring thresholds. The output of the comparator is present at the open-drain low battery indicator output (nLBO) and connected to the red LED D1.
Table 6-3. PIOs Used to Control the Battery Charger
PIO Function
PA12 CHGLEV: Charge Current Selection Input
PB13 nIRQ: Open-Drain Interrupt Output. nIRQ is asserted any time an unmasked fault condition exists or a charger interrupt occurs.
PC8 nLBO: Low Battery Indicator Output. nLBO is asserted low whenever the voltage at LBI is lower than1.2V; it is high-Z otherwise.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 17
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-7. Battery Connector J3 and Optional J4
WWW.ATMEL.COM
BOOT_DIS
R184
R183
C57
2
2
BP3
BP2
3
4
3
4
C50
L13
C49
C56
R153
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
R123
R105
R100
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
R43
C15
L4
R46 C17
C13
L3
R26 VBAT
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10 C2 C3
R27
R24
R18
R11
Table 6-4. Battery J3 Signal Descriptions
4
3
C44
LCD
J2
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
2
3
Pin Mnemonic Signal Description
1 VBAT Battery I/O (exploitation and charging). Connect this pin directly to the battery anode (+ terminal)
GND
TH
Common ground
Temperature Sensing Input. Connect to battery thermistor. TH is pulled up with a 102 μA
(typical) current internally.
6.3.2.7 Backup Power Supply
The SAMA5D2C-XULT board requires a power source to permanently power the backup part of the
SAMA5D2 device (refer to SAMA5D2 Series datasheet). A super capacitor sustains such permanent power to VDDBU when all system power sources are off.
Figure 6-8. VDDBU Powering Scheme Option
VDD_3V3
JPR6
Jumper
JP6
Header 1X2
D6
BAT54C
VDDBU
R280 100R 1%
1
2
3 1 2
D5
RB160M-60TR
+ C42
0.2F/3.3V
C44
DNP(1uF)
C46
100nF
R139
DNP(2.2K)
(Super)-Capacitor energy storage
Populate R if no Super Cap
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 18
32-BIT ARM-BASED MICROPROCESSORS
Board Components
6.3.2.8 Power Supply Control
In the ACT8945A, three DC-DC converters (1.8V, 1.2V, 3.3V) and two LDO outputs are available.
All ACT8945A outputs can be controlled by the TWI interface through software.
The three DC-DC outputs can be enabled or disabled by the SAMA5D2 SHDN output:
• SHDN = 0: The DC-DC output is disabled.
• SHDN = 1: The DC-DC output is enabled.
Two push buttons are also available:
• Wakeup push button: When pressed, the ACT8945A power outputs are restarted if the ACT8945A is in shutdown mode.
• Reset push button: When pressed, the ACT8945A transfers the reset signal to the MPU.
6.3.3 Reset Circuitry
The reset sources for the SAMA5D2C-XULT board are:
• Power-on reset from the power management unit (PMIC)
• Push button reset BP3
• External reset from Arduino connectors
• JTAG or EDBG reset from an in-circuit emulator
Figure 6-9. Reset/Wakeup and Shutdown Control
[9] SHDN
R20 100R 1% 19
27
26 nPBSTAT nLBO
SDA
SCL
VSYS_5V
3
R8
68K
3
R15
100K
VSYS_5V
1
Q2
BSS138 2
R9
1
Q1
BSS138 2
1K C10 100nF
C8
100nF
R12
100K
3
R13
49.9K 1%
1
Q3
BSS138
2
VSYS_5V
R30
R41
R14
TP14
SMD
49.9K 1%
TP11
SMD
0R
DNP(0R)
25
VSEL
10
PWRHLD
9 nPBIN
R19
0R
WAKE UP RESET
6.3.4 Clock Circuitry
The SAMA5D2C-XULT board includes four clock sources:
• Two clocks are alternatives for the SAMA5D2 processor (12 MHz, 32 kHz)
• One crystal oscillator used for the Ethernet RMII chip (25 MHz)
• One crystal oscillator used for the EDBG (12 MHz)
SW2
OUT2
34
SW3
OUT3
15
17
OUT4
OUT5
OUT6
OUT7
8
7
4
5
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 19
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-10. Clock Circuitry
XIN
R146 DNP(1M) XOUT
C47
27pF
1
2
Y4
4
3
12MHz CL=15pF
C45
27pF
C41
22pF
R109 DNP(1M)
XOUT32
XIN32
32.768KHz CL=12.5pF
4 1
3 2
Y3
C40
22pF
C34 22pF ETH_XI
Y2 R68
DNP(1M)
C35
22pF
25MHz CL=20pF
ETH_XO
6.3.5 Memory
6.3.5.1 Memory Organization
The SAMA5D2 features a DDR/SDR memory interface and an External Bus Interface (EBI) to allow interfacing to a wide range of external memories and to almost any kind of parallel peripheral.
This section describes the memory devices that equip the SAMA5D2C-XULT board.
6.3.5.2 DDR3/SDRAM
Two DDR3L/SDRAM (MT41H128M16JT-125-K - 2 Gbit = 16 Mbit x 16 x 8 banks) are used as main system memory and total 4 Gbit of SDRAM on the board. The memory bus is 32 bits wide and operates with a frequency of up to 166 MHz.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 20
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-11. DDR3L
DDR_RESETN
DDR_CLK+
DDR_CLK-
DDR_CKE
DDR_CS
DDR_RAS
DDR_CAS
DDR_WE
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
T2
U8
RESET#
J7
K7
K9
L2
J3
K3
L3
CK
CK#
CKE
CS#
RAS#
CAS#
WE#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DDR_DQS1+
DDR_DQS1-
C7
B7
UDQS
UDQS#
DDR_DQS0+
DDR_DQS0-
F3
G3
LDQS
LDQS#
DDR_DQM1
DDR_DQM0
D3
E7
UDM
LDM
VDD_1V35
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
NC1
NC2
NC3
NC4
DDR_VREF
C91
100nF
C72
100nF
M8
VREFCA
H1
VREFDQ
K1
B2
G7
R9
K2
K8
N1
N9
R1
D9
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
P8
P2
R8
R2
T8
N3
P7
P3
N2
ODT
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
A9
A10/AP
A11
A12/BC#
A5
A6
A7
A8
A13
A14
A15
A0
A1
A2
A3
A4
BA0
BA1
BA2
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
ZQ
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
L8
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_BA0
DDR_BA1
DDR_BA2
R179
R178
VDD_1V35
DNP(1K)
0R
VDD_1V35
MT41K128M16JT-125:K
R238
240R 1%
DDR_RESETN
DDR_CLK+
DDR_CLK-
DDR_CKE
DDR_CS
DDR_RAS
DDR_CAS
DDR_WE
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
T2
U4
RESET#
J7
K7
K9
L2
J3
K3
L3
CK
CK#
CKE
CS#
RAS#
CAS#
WE#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DDR_DQS3+
DDR_DQS3-
C7
B7
UDQS
UDQS#
DDR_DQS2+
DDR_DQS2-
F3
G3
LDQS
LDQS#
DDR_DQM3
DDR_DQM2
D3
E7
UDM
LDM
VDD_1V35
DDR_VREF
C145
100nF
C121
100nF
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
M8
H1
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
NC1
NC2
NC3
NC4
VREFCA
VREFDQ
K1
B2
G7
R9
K2
K8
N1
N9
R1
D9
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
P8
P2
R8
R2
T8
N3
P7
P3
N2
ODT
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
A9
A10/AP
A11
A12/BC#
A5
A6
A7
A8
A13
A14
A15
A0
A1
A2
A3
A4
BA0
BA1
BA2
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
ZQ
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
L8
DDR_BA0
DDR_BA1
DDR_BA2
R254
R258
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
VDD_1V35
VDD_1V35
DNP(1K)
0R
MT41K128M16JT-125:K
R124
240R 1%
VDDIODDR
L14 10uH_150mA
C83
4.7uF
R182
1R 1%
C56
4.7uF
C55
100nF
C54
100nF
R181
6.8K 1%
DDR_VREF
R180
6.8K 1%
6.3.5.3 DDR_CAL Analog Input
One specific analog input, DDR_CAL, is used to calibrate all DDR I/Os.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 21
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-12. DDR Signals and CAL Analog Input
U6E
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
F12
C17
B17
B16
C16
G14
F14
F11
C14
D13
C15
A16
A17
G11
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_BA0
DDR_BA1
DDR_BA2
H12
H13
F17
DDR_BA0
DDR_BA1
DDR_BA2
DDR_RAS
DDR_CAS
DDR_CLK+
DDR_CLK-
DDR_CKE
F13
G12
E17
D17
F16
DDR_RAS
DDR_CAS
DDR_CLK
DDR_CLKN
DDR_CKE
R243
100K
DDR_CS
DDR_WE
VDD_1V35
23.2K 1%
R250
R242
100K
G13
F15
E13
22pF
C106
DDR_CS
DDR_WE
DDR_CAL
DDR_RESETN
DDR_VREF
C100
100nF
C99
100nF
E16
H16
D16
DDR_RESETN
DDR_VREFB0
DDR_VREFCM
SAMA5D27-CN
B13
B14
J17
J16
C10
B10
J13
K14
K15
B8
B9
C9
A9
A10
D10
B11
A11
J12
H10
J11
K11
L13
L11
L12
M17
B12
A12
C12
A13
A14
C13
A15
B15
G17
G16
H17
K17
K16
C11
G15
C8
H11
DDR_DQS2
DDR_DQSN2
DDR_DQS3
DDR_DQSN3
L17
L16
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
DDR_DQS0
DDR_DQSN0
DDR_DQS1
DDR_DQSN1
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
DDR_DQS0+
DDR_DQS0-
DDR_DQS1+
DDR_DQS1-
DDR_DQS2+
DDR_DQS2-
DDR_DQS3+
DDR_DQS3-
6.3.5.4 eMMC
The Secure Digital Multimedia Card (SDMMC) Controller supports the Embedded MultiMedia Card
(e.MMC) Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0 specification.
It is compliant with the SD Host Controller Standard V3.0 specification
One MTFC4GLDEA 4 GB eMMC is connected to the processor through the SDMMC0 port.
Table 6-5. SDMMC Reference Documents
Name
SD Host Controller Simplified Specification V3.00
SDIO Simplified Specification V3.00
Physical Layer Simplified Specification V3.01
Embedded MultiMedia Card (e.MMC) Electrical Standard 4.51
Link www.sdcard.org
www.sdcard.org
www.sdcard.org
www.jedec.org
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 22
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-13. eMMC
VDDSDHC
VDD_3V3 VDDSDHC
(3V3 or 1V8)
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
SDHC0_DAT0_PA2
SDHC0_DAT1_PA3
SDHC0_DAT2_PA4
SDHC0_DAT3_PA5
SDHC0_DAT4_PA6
SDHC0_DAT5_PA7
SDHC0_DAT6_PA8
SDHC0_DAT7_PA9
SDHC0_CMD_PA1
SDHC0_CK_PA0
SDHC0_RSTN_PA10
[7] SDHC0_VDDSEL_PA11
R140 39R
R235
DNP(47K)
47K pull down on SDHC0_CMD_PA1 close to MPU.
39R on SDHC0_CK_PA0 close to MPU.
VDDSDHC
(3V3 or 1V8)
C61
2.2uF
C81
100nF
VDD_3V3
(3V3)
C73
2.2uF
C69
100nF
VDD_3V3 VDDSDHC1V8
VDD_3V3
R210
R212
DNP(0R)
DNP(0R)
VDDSDHC
C86
100nF
R225
10K
6
4
1
S2
S1
IN
D
5 R211
U13
ADG849
0R
IN=0: S1 Closed
IN=1: S2 Closed
N3
P10
N1
M14
M13
M12
M11
M10
M9
M8
M7
P11
P12
P13
M3
M2
M1
L14
L13
L12
K6
N6
E5
N9
N8
N7
J12
P14
A10
A11
A12
A13
A14
B1
B7
G1
L3
L2
L1
K14
K13
K12
B3
B4
B5
B6
A3
A4
A5
B2
M5
M6
K5
NC123
NC122
NC121
NC120
NC119
NC118
NC117
NC116
NC115
NC114
NC113
NC112
NC111
NC110
NC109
NC108
NC107
NC106
NC105
NC104
NC103
NC102
NC101
NC100
NC99
NC98
NC97
NC96
NC95
NC94
NC93
NC92
NC91
NC90
NC89
NC88
NC87
NC86
NC85
NC84
NC83
NC82
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
CMD
CLK
RST
Impedance match of
CLK/CMD/DAT[7:0] 50R
U11 MTFC4GLDEA-0M WT
6.3.5.5 CS Disable
The SAMA5D2 device boots according to the following sequence:
1.
SD CARD connected on SDHC1
2.
eMMC connected on SDHC0
3.
Serial Flash connected on SPI0_IOSET1 (Chip Select 0: NPCS0)
4.
Optional QSPI Flash connected on QSPI0_IOSET3 (Chip Select 0: CS0)
In this sequence, the first device found with bootable contents is selected as the boot source. The others are disregarded. (see Note below)
An on-board jumper (JP9) controls the selection (CS#) of the on-board bootable memory components
(eMMC and Serial Flash) using a non-inverting 3-state buffer.
F10
C10
F12
F13
F14
C9
C8
C7
C5
C3
C1
D14
E14
F1
F2
F3
A9
B14
C14
C13
C12
C11
E1
E2
E3
A2
A6
A7
A8
E8
E9
E10
A1
E12
E13
D13
D12
D4
D3
G12
G13
G14
H1
H2
H3
D2
H5
D1
B13
B12
B11
B10
B9
H12
NC24
NC25
NC26
NC27
NC28
NC29
NC30
NC31
NC32
NC33
NC34
NC35
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC36
NC37
NC38
NC39
NC40
NC41
NC42
NC43
NC44
NC45
NC46
NC47
NC48
NC49
NC50
NC51
NC52
NC53
NC54
C85
1uF
C79
100nF
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 23
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-14. CS Disable
VDD_3V3
[7] QSPI0_CS_PA23
JP9
Header 1X2
JPR9
Jumper
1 2
R226
10K
C63
100nF
1
2
3
GND
U15
VCC
5
4
R227
NL17SZ126DFT2G
100R 1%
R218
10K
QSPI0_CS
QSPI Flash CS
1
VDD_3V3
3
R230
10K
SDHC0_CD_PA13 eMMC Flash CS
[7]
2
Q6
BSS138
BOOT_DIS
C62
100nF
[7] SPI0_NPCS0_PA17
1
2
U14
VCC
3
GND
NL17SZ126DFT2G
5
4
R217
10K
SPI0_CS0_PA17
SPI Flash CS
The rule of operation is:
• JP9 = OFF (default) → enable normal boot from serial Flash memories mounted on board
• JP9 = ON → booting from optional serial Flash memories is disabled
Refer to the SAMA5D2 Series datasheet for more information on standard boot strategies and sequencing.
Note: The errata in the SAMA5D2 datasheet state that booting from SD/MMC devices is nondeterministic. In order to have a known behavior regardless of SD/MMC data contents, we recommend SDMMC0/SDMMC1 boot bits be disabled in the Boot Configuration Word fuse.
6.3.6 Additional Memories
6.3.6.1 Serial Flash
The SAMA5D2 provides two high-speed Serial Peripheral Interface (SPI) controllers. One port is used to interface with the on-board serial serial Flash.
The four main signals used in the SPI are Clock, Data In, Data Out, and Chip Select. The SPI is a serial interface similar to the I 2 C bus interface but with three main differences:
• It operates at a higher speed.
• Transmit and receive data lines are separate.
• Device access is chip select-based instead of address-based.
Figure 6-15. Serial Flash
VDD_3V3
[7]
[7]
[7]
SPI0_MOSI_PA15
SPI0_MISO_PA16
SPI0_SPCK_PA14
SPI0_CS0_PA17
5
2
6
1
U9
SI
SO
SCK
VCC
WP
HOLD
CS
GND
AT25DF321A
8
3
7
4
C53
100nF
6.3.6.2 QSPI Serial Flash
The SAMA5D2 provides two Quad Serial Peripheral Interfaces (QSPI). One port is used to interface with the optional on-board QSPI serial Flash.
The Quad SPI Interface (QSPI) is a synchronous serial data link that provides communication with external devices in Master mode.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 24
32-BIT ARM-BASED MICROPROCESSORS
Board Components
The QSPI can be used in SPI mode to interface to serial peripherals (such as ADCs, DACs, LCD controllers, CAN controllers and sensors), or in Serial Memory mode to interface to serial Flash memories.
The QSPI allows the system to execute code directly from a serial Flash memory (XIP) without code shadowing to RAM. The serial Flash memory mapping is seen in the system as other memories (ROM,
SRAM, DRAM, embedded Flash memory, etc.).
With the support of the Quad SPI protocol, the QSPI allows the system to use high-performance serial
Flash memories which are small and inexpensive, in place of larger and more expensive parallel Flash memories.
Figure 6-16. QSPI Serial Flash
VDD_3V3
[7]
[7]
QSPI0_IO0_PA24
QSPI0_IO1_PA25
[7]
[7]
QSPI0_IO2_PA26
QSPI0_IO3_PA27
5
2
3
7
U10
8
SI/SIO0 VCC
4
SO/SIO1 GND
1
SIO2 CS#
SIO3 SCLK
MX25L25673GM2I-08G
6
C52
100nF
QSPI0_CS
QSPI0_SCK_PA22 [7]
6.3.6.3 Serial EEPROM with Unique MAC Address
The SAMA5D2C-XULT board embeds one Microchip AT24MAC402/602 EEPROM using a TWI1 interface.
The AT24MAC402/602 provides 2048 bits of Serial Electrically-Erasable Programmable Read-Only
Memory (EEPROM) organized as 256 words of eight bits each and is accessed via an I 2 C-compatible (2wire) serial interface. In addition, the AT24MAC402/602 incorporates an easy and inexpensive method to obtain a globally unique MAC or EUI address (EUI-48 or EUI-64).
The EUI-48/64 addresses can be assigned as the actual physical address of a system hardware device or node, or it can be assigned to a software instance. These addresses are factory-programmed by Atmel and guaranteed unique. They are permanently write-protected in an extended memory block located outside of the standard 2-Kbit memory array.
In addition, the AT24MAC402/602 provides the value-added feature of a factory-programmed, also guaranteed unique 128-bit serial number located in the extended memory block (same area as the EUI address values).
WARNING
The EEPROM device is also used as a “software label” to store board information such as chip type, manufacture name and production date, using the last two 16-byte blocks in memory. To preserve the ease of board identification by software, the information contained in these blocks should not be modified.
Figure 6-17. EEPROM
VDD_3V3
EEPROM_WP
R316
0R
VDD_3V3
1
A0
U18
VCC
8
2
A1 WP
7
3
A2 SCL
6
4
GND SDA
5
AT24MAC402-MAHM-T
C161 100nF
EEPROM_WP
EEPROM_TWCK1_PD5 [8]
EEPROM_TWD1_PD4 [8]
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 25
32-BIT ARM-BASED MICROPROCESSORS
Board Components
6.4 PIO Usage and Interface Connectors
6.4.1 Secure Digital Multimedia Card Interface
6.4.1.1 Secure Digital Multimedia Card Controller (SDMMC)
The SAMA5D2C-XULT board has two SDMMC interfaces that support the MultiMedia Card (e.MMC)
Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0 specification. It is compliant with the SD Host Controller Standard V3.0 specification.
• SDMMC0 interface is connected to the eMMC.
• SDMMC1 Interface based on a 7-pin interface (clock, command, 4-bit data, power lines).
6.4.1.2 SDMMC1 Card Connector
A standard MMC/SD card connector, connected to SDMMC1, is mounted on the top side of the board. It includes a card detection switch.
Figure 6-18. SDMMC1
VDD_3V3
VDD_3V3 R214
0R
C64
10uF
C75
100nF
[7]
[7]
[7]
SDHC1_CD_PA30
SDHC1_DAT1_PA19
SDHC1_DAT0_PA18
[7] SDHC1_CK_PA22
[7]
[7]
[7]
SDHC1_CMD_PA28
SDHC1_DAT3_PA21
SDHC1_DAT2_PA20
(MCI1_CD)
(MCI1_DA1)
(MCI1_DA0)
(MCI1_CK)
(MCI1_CDA)
(MCI1_DA3)
(MCI1_DA2)
Note:
Refer to details on SDcard boot in CS Disable
.
J19
3
2
5
4
1
9
8
7
6
SD Card Connector
13
12
11
10
16
15
14 0R R249
(SDHC1_WP)
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 26
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Standard SD Socket J19
WWW.ATMEL.COM
8
9
10
6
7
4
5
2
3
Pin
1
R184
R183
C57
BP3
3
4
3
4
C56
JP7
R176
R174
R172
R170
R168
R166
2
2
BP2
R153
VDDIODDR
R160
R157
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R151 R150
R148
R147
R144
R142
R145
R143
R140 R141
J15 HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C50
L13
C49
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C48
C47
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
R123
R105
R100
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
4
3
R43
C15
L4
R46 C17
C13
L3
LCD J2
R26 VBAT
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10 C2 C3
R27
R24
R18
R11
Table 6-6. Standard SD Socket J19 Signal Descriptions
Mnemonic
DAT3
CDA
GND
VCC
CLK
CD
DAT0
DAT1
DAT2
GND
PIO
PA21
PA28
–
–
PA22
PA30
PA18
PA19
PA20
–
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
D31
D33
D35
D37
5 V 5 V
D23
D25
D27
D29
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER
2
BP1
4
3
Signal Description
Data Bit 3
Command Line
Common ground
Supply Voltage 3.3V
Clock / Command Line
Card Detect
Data Bit 0
Data Bit 1
Data Bit 2
Common ground
6.4.2 Communication Interfaces
The SAMA5D2C-XULT board is equipped with GMAC and USB Host/Device communication interfaces.
6.4.2.1 Ethernet 10/100 (GMAC) Port
The SAMA5D2C-XULT board contains a MICREL PHY device (KSZ8081) operating at 10/100 Mb/s. The board supports RMII interface modes. The Ethernet interface consists of two pairs of low-voltage differential pair signals designated from GRX± and GTX± plus control signals for link activity indicators.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 27
32-BIT ARM-BASED MICROPROCESSORS
Board Components
These signals can be used to connect to a 10/100 Base-T RJ45 connector integrated on the SAMA5D2C-
XULT board.
Additionally, for monitoring and control purposes, LED functionality is carried on the RJ45 connectors to indicate activity, link, and speed status information.
For more information about the Ethernet controller device, refer to the MICREL KSZ8081RN controller datasheet.
Figure 6-19. Ethernet (GMAC)
EARTH_ETH
VDD_3V3
R314
R317
1 TX+
J6
2 TX-
3 RX+
6 RX-
13
14
15
16
7
8
4
5
75
75
Right yellow LED
470R
470R
RJ45 Connector
75 75
1nF
TD+ 1
CT 4
TD2
RD+ 3
CT 5
RD6
Left Green LED
NC 7
8
C160
100nF
GND_ETH
C162
100nF
EARTH_ETH
ACT
LINK
ETH_LED1
ETH_LED0
TX+
TX-
RX+
RX-
R33
10K
ETH_LED0
ETH_LED1
VDD_3V3
VDD_3V3
TX+ top/bot
TXtop/bot
RX+ top/bot
7
TXP
6
TXM
5
RXP
RXtop/bot 4
RXM
C16
C18
6.49K 1%
2.2uF
100nF
2
VDD_1V2
R70
1
33
22
26
27
10
GND
PADDLE
TXC
TXD2
TXD3
REXT
Ethernet
10Base-T/100Base-TX
U3
RXC/B-CAST_OFF
TXD1
TXD0
TXEN
RXD3/PHYAD0
RXD2/PHYAD1
RXD1/PHYAD2
RXD0/DUPLEX
RXDV/CONFIG2
RXER/ISO
CRS/CONFIG1
COL/CONFIG0
19
14
15
16
18
25
24
23
13
20
29
28
MDC
MDIO
INTRP/NAND
12
11
21
VDDA_3V3
3
VDDA_3V3
C12
10uF
R34
10K
ETH_XO
ETH_XI
8
9
XO
XI
30
31
LED0/NWAYEN
LED1/SPEED
VDDIO
17
C36
10uF
R45
1K
R69
1K
L2 VDD_3V3
180ohm at 100MHz
1 2
C21
100nF
C25
100nF
RESET
32 R35 0R
NRST [4,9,10,14,15]
KSZ8081RNB
Figure 6-20. ETH RJ45 Connector J6
ETH_GTXCK_PB14 [7]
ETH_GTX1_PB21 [7]
ETH_GTX0_PB20 [7]
ETH_GTXEN_PB15 [7]
ETH_GRX1_PB19 [7]
ETH_GRX0_PB18 [7]
ETH_GRXDV_PB16 [7]
ETH_GRXER_PB17 [7]
ETH_GMDC_PB22
ETH_GMDIO_PB23
ETH_INT_PC9 [8]
[7]
[7]
WWW.ATMEL.COM
R184
R183
C57
2
2
BP3
3
4
BP2
3
4
C50
L13
C49
C56
R153
EDBG-JTAG A5-JTAG R104
R99
R75
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
R59
R43
C15
L4
R46
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
C14
C11
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C17
C13
L3
R103
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
R123
R105
R100
JP4
VDDCORE
C19
R44
R41
R30
1
2
R26 VBAT
4
3
C2 C3
R27
R24
R18
R11
LCD J2
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
D29
D31
D33
D35
D37
D39
D41
D43
5 V 5 V
D23
D25
D27
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER
2
BP1
4
3
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 28
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Table 6-7. ETH RJ45 Connector Signal Descriptions
9
10
11
12
7
8
5
6
13
14
15
16
Pin
3
4
1
2
Mnemonic
TX+
TX-
RX+
Decoupling capacitor
Decoupling capacitor
RX-
NC
EARTH / GND
ACT LED
ACT LED
LINK LED
LINK LED
EARTH / GND
EARTH / GND
NC
NC
Signal Description
Transmit
Transmit
Receive
–
–
Receive
–
Common ground
LED activity
LED activity
LED link connection
LED link connection
–
–
Common ground
Common ground
6.4.2.2 USB Host/Device A, B
The SAMA5D2C-XULT board features three USB communication ports:
• USB Host B High- and Full-speed Interface
– One USB host type A connector
• USB A Device Interface
– One USB device standard micro-AB connector. This port has a VBUS detection function made through the resistor ladder R183 and R184.
• UBC C high-speed host port
– One USB high-speed host port with a High-Speed Inter-Chip (HSIC) interface. This port is connected to a single 2-pin jumper.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 29
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-21. USB-B Host & USB-A Device Interface
USB A
R183
C57
20pF
100K
R184
200K
USBA_VBUS_5V [4]
USBA_VBUS_5V_PA31 [7]
9
10
VBUS
DM
DP
ID
GND
1
2
3
4
5
J23
MicroUSB AB Connector
USBA_DM [9]
USBA_DP [9]
EARTH_USB_A
USB B
5
SH1
A
VBUS
DM
DP
GND
3
4
1
2
SH2
6
J13
Single USB Type A
USBB_VBUS_5V
USBB_DM [9]
USBB_DP [9]
EARTH_USB_B
The USB B Host port is equipped with 500 mA high-side power switch for self-powered and bus-powered applications.
Figure 6-22. USB Power Switch
USBB_VBUS_5V
L21
180ohm at 100MHz
1 2
C156
100nF
C157
10uF VDDB_5V
8
6
U16
OUT_2
OUT_1
EN
FLG
1
2
EN: Active High
USBB_EN5V_PB10 [7]
USBB_OVCUR_PA29 [7]
C155
100nF
7
5
IN_2
IN_1
GND
NC
3
4
R301
10K
SP2525A-1EN-L
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 30
32-BIT ARM-BASED MICROPROCESSORS
Board Components
6.4.3 USB-A Micro-AB Connector J23
Figure 6-23. USB-A Connector J23
R184
R183
C57
2
2
BP3
3
4
BP2
3
4
C50
L13
C49
C56
R153
EDBG-JTAG A5-JTAG R104
R99
R75
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
R59
R46 R43
C15
L4
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
C14
C11
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C17
C13
L3
R103
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R151 R150
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
R123
R105
R100
JP4
VDDCORE
C19
R44
R41
R30
1
2
R26 VBAT
4
3
C2 C3
R27
R24
R18
R11
LCD
J2
D34
D36
D38
D40
D42
D22
D24
D26
D28
D30
D32
D44
D46
D48
D50
D52
GND
WWW.ATMEL.COM
D29
D31
D33
D35
D37
D39
D41
D43
5 V 5 V
D23
D25
D27
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER
2
BP1
4
3
6.4.4 USB-B Type B Connector J13
The USB-B host port A (J13) features a VBUS insert detection function through the ladder-type resistors
R26 and R27.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 31
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-24. USB B Connector J13
WWW.ATMEL.COM
Pin
3
4
1
2
5
R184
R183
C57
BP3
3
4
3
4
C56
JP7
R176
R174
R172
R170
R168
R166
2
2
BP2
R153
VDDIODDR
R160
R157
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C50
L13
C49
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C48
C47
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
R123
R105
R100
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
4
3
R43
C15
L4
R46 C17
C13
L3
R26 VBAT
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10 C2 C3
R27
R24
R18
R11
Table 6-8. USB A&B Connector Signal Descriptions
LCD J2
Mnemonic
VBUS
DM
DP
ID
GND
Signal Description
5V power
Data minus
Data plus
On-the-go identification
Common ground
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER
2
BP1
4
3
6.4.5 LCD TFT Interface
6.4.5.1 LCD
The SAMA5D2C-XULT board provides 18 bits of data and control signals to the LCD interface. Other signals are used to control the LCD and are available on connector J2: TWI, SPI, two GPIOs for interrupt,
1-Wire and power supply lines.
6.4.5.2 LCD Expansion Header
J2 is a 1.27mm pitch 50-pin header. It gives access to the LCD signals.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 32
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-25. LCD Expansion Header Interface Schematic
VDDB_5V VDD_3V3
R335
R347
R40
[4,9,12,14,15] NRST
[8,10,15]
[8] LCD_AD3_YM_PD22
ISC_PCK/SPI1_NPCS0_PC4
[8]
[8,10,15]
[8]
[8,10,15]
[8]
[8,10,15]
LCD_AD2_YP_PD21
ISC_D9/SPI1_MISO_PC3
LCD_AD1_XM_PD20
ISC_D8/SPI1_MOSI_PC2
LCD_AD0_XP_PD19
ISC_D7/SPI1_SPCK_PC1
R39
R231
R38
R213
R37
R219
R36
R222
DNP(0R)
22R
DNP(0R)
22R
DNP(0R)
22R
DNP(0R)
39R
[8]
[7]
[7]
[8]
[8]
[8]
LCD_PWM_PC28
LCD_IRQ2_PB8
LCD_IRQ1_PB7
LCD_TWCK1_PD5
LCD_TWD1_PD4
LCD_DISP_PC29
[8]
[8]
[8]
[8]
LCD_DEN_PD1
LCD_HSYNC_PC31
LCD_VSYNC_PC30
LCD_PCK_PD0
[8]
[8]
[8]
[8]
LCD_DAT23_PC27
LCD_DAT22_PC26
LCD_DAT21_PC25
LCD_DAT20_PC24
[8]
[8]
LCD_DAT19_PC23
LCD_DAT18_PC22
[8]
[8]
[8]
[8]
LCD_DAT15_PC21
LCD_DAT14_PC20
LCD_DAT13_PC19
LCD_DAT12_PC18
[8]
[8]
LCD_DAT11_PC17
LCD_DAT10_PC16
[8]
[8]
[8]
[8]
LCD_DAT7_PC15
LCD_DAT6_PC14
LCD_DAT5_PC13
LCD_DAT4_PC12
[8]
[8]
LCD_DAT3_PC11
LCD_DAT2_PC10
[7]
[14]
LCD_ID_PB0
EDBG_ID_01
R42
R28
DNP(0R)
0R
0R
(LCDPWM)
(IRQ2)
(IRQ1)
(TWI_SCL)
(TWI_SDA)
(LCDDISP)
(LCDDEN)
(LCDHSYNC)
(LCDVSYNC)
(LCDPCK)
(LCDDAT23)
(LCDDAT22)
(LCDDAT21)
(LCDDAT20)
(LCDDAT19)
(LCDDAT18)
(LCDDAT17)
(LCDDAT16)
(LCDDAT15)
(LCDDAT14)
(LCDDAT13)
(LCDDAT12)
(LCDDAT11)
(LCDDAT10)
(LCDDAT9)
(LCDDAT8)
(LCDDAT7)
(LCDDAT6)
(LCDDAT5)
(LCDDAT4)
0R
(LCDDAT3)
(LCDDAT2)
(LCDDAT1)
(LCDDAT0)
(ID_SYS)
DNP(330R)
LCD
J2
34
33
32
31
30
29
28
27
38
37
36
35
26
25
24
23
22
21
20
19
18
17
16
3
2
1
9
8
11
10
7
6
5
4
15
14
13
12
50
49
48
47
46
45
44
43
42
41
40
39
52
51
50 Pin FPC Connector
6.4.5.3 LCD Power
In order to operate correctly out of the processor with various LCD modules, two voltage lines are available: 3.3V and 5 VCC (default), both selected by 0R resistors R335 and R347.
Figure 6-26. LCD Power
VDDB_5V VDD_3V3
R335
R347
[4,9,12,14,15] NRST
R40
DNP(0R)
0R
0R
50
49
48
47
46
45
LCD
J2
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 33
32-BIT ARM-BASED MICROPROCESSORS
Board Components
6.4.5.4 LCD Connector J2
Figure 6-27. LCD Connector J2
WWW.ATMEL.COM
4
5
2
3
Pin Signal
1 ID_SYS
–
–
–
LCDDAT2
8
9
6
7
LCDDAT3
–
LCDDAT4
LCDDAT5
10 LCDDAT6
11 LCDDAT7
12 –
13 –
14 –
R184
R183
C57
2
2
BP3
BP2
3
4
3
4
C56
R153
JP7
VDDIODDR
R160
R157
R176
R174
R172
R170
R168
R166
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15 HSIC
R152
C51
R146
R139
C46
JP6 VDDBU
C50
L13
C49
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C48
C47
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
R123
R105
R100
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
4
3
R43
C15
L4
R46 C17
C13
L3
R26 VBAT
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
R27
R24
R18
R11 C2 C3
Table 6-9. LCD Connector J2 Signal Descriptions
LCD
J2
PC11
GND
PC12
PC13
PC14
PC15
GND
–
–
PIO Signal
PB0/ ID00 ID
GND
–
–
PC10
GND
–
–
D2
D3
GND
D4
D5
D6
D7
GND
–
–
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER
2
BP1
4
3
RGB Interface Function
Extension module identification
GND
–
–
Data line
Data line
GND
Data line
Data line
Data line
Data line
GND
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Alternate
EDBG_ID_01
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 34
Pin Signal PIO
15 LCDDAT10 PC16
16 LCDDAT11 PC17
17 – GND
18 LCDDAT12 PC18
19 LCDDAT13 PC19
20 LCDDAT14 PC20
21 LCDDAT15 PC21
22 – GND
23 –
24 –
–
–
25 LCDDAT18 PC22
26 LCDDAT19 PC23
27 – GND
28 LCDDAT20 PC24
29 LCDDAT21 PC25
30 LCDDAT22 PE26
31 LCDDAT23 PE27
32 – GND
33 LCDPCK PD0
34 LCDVSYNC PC30
35 LCDHSYNC PC31
36 LCDDEN PD1
37 SPI1_SPCK PC1
38 SPI1_MOSI PC2
39 SPI1_MISO PC3
40 SPI1_NPCS0 PC4
41 LCDDISP
42 TWD1
PA29
PD4
43 TWCK1
44 GPIO
45 GPIO
PD5
PB7
PB8
32-BIT ARM-BASED MICROPROCESSORS
Board Components
D21
D22
D23
GND
PCLK
VSYNC/CS
HSYNC/WE
DATA_ENABLE/R
E
SPI_SCK
SPI_MOSI
SPI_MISO
SPI_CS
ENABLE
TWI_SDA
TWI_SCL
IRQ1
IRQ2
–
–
D15
GND
D18
D19
GND
D20
Signal
D10
D11
GND
D12
D13
D14
RGB Interface Function
Data line
Data line
GND
Data line
Data line
Data line
–
–
Data line
GND
Data line
Data line
GND
Data line
Data line
Data line
Data line
GND
Pixel clock
Vertical synchronization
Horizontal synchronization
Data enable
–
–
–
–
Display enable signal
I2C data line (maXTouch
®
)
I2C clock line (maXTouch) maXTouch interrupt line
Interrupt line for other I2C devices –
–
–
AD3/YM PD22
AD2/YP PD21
–
–
AD1/XM PD20
AD0/XP PD19
–
–
–
–
–
–
–
–
–
–
–
–
Alternate
–
–
–
–
–
–
–
–
–
–
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 35
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Pin Signal
46
47
LCDPWM
RESET
PIO
PC28
–
48 Main_5V/3V3 VCC
49 Main_5V/3V3 VCC
50 GND GND
Signal
PWM
RESET
VCC
VCC
GND
RGB Interface Function
Backlight control
Reset for both display and maXTouch
3.3V or 5V supply (0R)
3.3V or 5V supply (0R)
GND
Alternate
–
–
–
–
–
6.4.6 ISC
The Image Sensor Controller (ISC) system manages incoming data from a parallel or serial csi-2 based
CMOS/CCD sensor. It supports a single active interface. It supports the ITU-R BT 656/1120 422 protocol with a data width of 8 bits or 10 bits and raw Bayer format. The internal image processor includes adjustable white balance, color filter array interpolation, color correction, gamma correction, 12-bit to 10bit compression, programmable color space conversion, horizontal and vertical chrominance subsampling module.
Figure 6-28. ISC J18
WWW.ATMEL.COM
BOOT_DIS
R184
R183
C57
2
2
BP3
BP2
3
4
3
4
C50
L13
C49
C56
R153
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
R123
R105
R100
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
R43
C15
L4
R46 C17
C13
L3
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10 C2 C3
R27
R24
R18
R11
Table 6-10. ISC J18 Signal Descriptions
R26 VBAT
4
3
Pin
1
2
Mnemonic
3V3
GND
PIO
–
–
LCD
J2
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
Signal Description
ISC Power Supply
Ground
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 36
25
26
27
28
29
30
21
22
23
24
17
18
19
20
13
14
15
16
9
10
11
12
7
8
5
6
Pin
3
4
GND
ISC_D4
ISC_D5
ISC_D6
ISC_D7
ISC_D8
ISC_D9
ISC_D10
ISC_D11
ISC_D0
ISC_D1
ISC_D2
ISC_D3
GND
Mnemonic
3V3
GND
ISC_RST
ISC_PWD
TWCK1
TWD1
GND
ISC_MCK
GND
ISC_VSYNC
GND
ISC_HSYNC
GND
ISC_PCK
32-BIT ARM-BASED MICROPROCESSORS
Board Components
PB25
PB26
PB27
PB28
PB29
–
–
PB30
PB31
PC0
PC1
PC2
PC3
PB24
–
PC6
–
PC4
–
PC7
–
PC5
PIO
–
–
PB11
PB12
PD5
PD4
Ground
Image data D0
Data D1
Data D2
Data D3
Data D4
Data D5
Data D6
Data D7
RFU
RFU
RFU
RFU
Ground
Signal Description
ISC Power Supply
Ground
Reset ISC module
Power Down module
TWI Clock
TWI Data
Ground
ISC Master Clock
Ground
ISC Vertical Synchronization
Ground
ISC Horizontal Synchronization
Ground
Clock
WARNING
The connector ISC J18 has been laid out to be compatible with previous evaluation kits and existing extensions in 8-bit modes. Hence, the 8-bit image data [7:0] are aligned with
ISC_D[11:4] in the table above. Refer to the SAMA5D2 Series datasheet for an in-depth description of the ISC bussing scheme. A summary is also provided below.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 37
32-BIT ARM-BASED MICROPROCESSORS
Board Components
The table below shows how ISC_DATA[11:0] is routed to image data D[11:0] in relation to the bit mode.
Table 6-11. ISC Interface - ISC_DATA to Image Data
Interface isc_data[11](MSB) isc_data[10] isc_data[9] isc_data[8] isc_data[7] isc_data[6] isc_data[5] isc_data[4] isc_data[3] isc_data[2] isc_data[1] isc_data[0]
12-bit
D[11]
D[10]
D[9]
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
11-bit
D[10]
D[9]
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
Not Used
10-bit
D[9]
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
Not Used
Not Used
9-bit
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
Not Used
Not Used
Not Used
8-bit
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
Not Used
Not Used
Not Used
Not Used
Figure 6-29. ISC J18 Header
[7,15]
[8,10,15]
[8,10,15]
[7,15]
[7,15]
[7,15]
ISC_D5/EXP/XPRO_PB31
ISC_D7/SPI1_SPCK_PC1
ISC_D9/SPI1_MISO_PC3
ISC_D11/EXP_PB25
ISC_D1/EXP_PB27
ISC_D3/EXP/XPRO_PB29
VDD_3V3
R130
[7,15]
[8]
ISC_RST/EXP_PB11
ISC_TWCK1_PD5
R224
R220
R216
R208
R191
R188
0R
22R
22R
22R
22R
22R
22R
ISC
17
19
21
23
25
27
29
9
11
13
15
5
7
1
3
J18
18
20
22
24
26
28
30
10
12
14
16
6
8
2
4
R259
R251
R246
R239
R228
R223
R221
R215
R207
R190
Header 2X15
39R
39R
39R
39R
22R
22R
22R
22R
22R
22R
ISC_PWD/EXP_PB12 [7,15]
ISC_TWD1_PD4 [8]
ISC_MCK/EXP_PC7 [8,15]
ISC_VSYNC/EXP_PC5 [8,15]
ISC_HSYNC/EXP_PC6 [8,15]
ISC_PCK/SPI1_NPCS0_PC4
ISC_D4/EXP_PB30 [7,15]
[8,10,15]
ISC_D6/EXP/XPRO_PC0 [8,15]
ISC_D8/SPI1_MOSI_PC2 [8,10,15]
ISC_D10/EXP_PB24 [7,15]
ISC_D0/EXP_PB26 [7,15]
ISC_D2/EXP/XPRO_PB28 [7,15]
6.4.7 Audio Class D Amplifier
The Audio Class D Amplifier (CLASSD) is a digital input, Pulse Width Modulated (PWM) output stereo
Class D amplifier. It features a high-quality interpolation filter embedding a digitally controlled gain, an equalizer and a de-emphasis filter.
On its input side, the CLASSD is compatible with most common audio data rates. On the output side, its
PWM output can drive either:
• high-impedance single-ended or differential output loads (Audio DAC application) or,
• external MOSFETs through an integrated non-overlapping circuit (Class D power amplifier application).
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 38
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-30. Audio PWM Class D MOSFET Mono Amplifier
VSYS_5V
R62
0R
R71 0R
[7]
[7]
CLASSD_R0_PB1
CLASSD_R1_PB2
R311 22R C158 10nF
R315 22R
D7
1N4148W
5 G2
PMOS
S2
4
D2 3
D1
6
2 G1
S1
NMOS
U17 DMC2400UV
1
180ohm at 100MHz
1
L25
2 Right P
1
L26
2 Right N
180ohm at 100MHz
2
3
1
J5
4
[7]
[7]
CLASSD_R2_PB3
CLASSD_R3_PB4
R322 22R C159 10nF
R324 22R
D8
1N4148W
PMOS
5 G2 S2
4
D2 3
D1
6
2 G1
S1
NMOS
U19 DMC2400UV
1
CLASSD Output Connector J5
R184
R183
C57
2
2
BP3
3
4
BP2
3
4
C50
L13
C49
C56
R153
EDBG-JTAG A5-JTAG R104
R99
R75
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
R59
R43
C15
L4
R46
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
C14
C11
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C17
C13
L3
R103
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
R123
R105
R100
JP4
VDDCORE
C19
R44
R41
R30
1
2
R26 VBAT
4
3
C2 C3
R27
R24
R18
R11
LCD
J2
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
WWW.ATMEL.COM
D29
D31
D33
D35
D37
D39
D41
D43
5 V 5 V
D23
D25
D27
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER
2
BP1
4
3
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 39
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Table 6-12. CLASSD Output Connector J5 Signal Descriptions
Pin
3
4
1
2
Mnemonic
VSYS_5V
GND
OUTPUT RIGHT P
OUTPUT RIGHT N
Signal Description
Power
GND
Positive Level
Negative Level
6.4.8 Tamper Interface
The SAMA5D2C-XULT board features eight tamper pins for static or dynamic intrusion detections, UART reception, and two analog pins for comparison.
For information on intrusion detection for SAMA5D23 and SAMA5D28, refer to the document “SAMA5D2
Security Module”, document no. 44036. This document is available under Non-Disclosure Agreement
(NDA).
Contact a Microchip sales representative for further details.
Figure 6-31. Tamper Pin Connector J12
PIOBU0
PIOBU2
PIOBU4
PIOBU6
RXD
R76
R77
R78
R79
R80
ACP R81
330R
330R
330R
330R
0R
0R
9
11
13
5
7
1
3
J12
6
8
2
4
10
12
14
R132
R133
R134
R135
R136
0R
330R
330R
330R
330R
0R
PIOBU1
PIOBU3
PIOBU5
PIOBU7
R137 ACN
DNP(Header 2X7)
VDD_5V_IN
R100
10K
R123
R105
47K
100R 1%
VDD_5V_IN
R152 1K
ACP
C51
100nF
U7
TLV431A
(1.24V) R146 100R 1% ACN
1
R155
0R
R158
DNP(0R)
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 40
32-BIT ARM-BASED MICROPROCESSORS
Board Components
6.4.9 Tamper Connector
Figure 6-32. Tamper Connector J12
R184
R183
C57
BP3
3
4
C56
JP7
R176
R174
R172
R170
R168
R166
2
BP2
VDDIODDR
R160
R157
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
2
3
4
R153
C50
L13
C49
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C48
C47
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
R123
R105
R100
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
4
3
R43
C15
L4
R46 C17
C13
L3
LCD
J2
R26 VBAT
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10 C2 C3
R27
R24
R18
R11
Table 6-13. Tamper Connector J12 Signal Descriptions
Signal
PIOBU0
PIOBU2
PIOBU4
PIOBU6
RXD
GND
ACP
Pin No.
1
3
5
7
9
11
13
2
4
6
8
10
12
14
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
WWW.ATMEL.COM
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
Signal
PIOBU1
PIOBU3
PIOBU5
PIOBU7
NC
GND
ACN
6.4.10 RGB LED
There is one RGB LED on the SAMA5D2C-XULT board; it can be controlled by the user. The three LED cathodes are controlled via GPIO PWM pins.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 41
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-33. RGB LED Indicators
D2
[7] LED_RED_PB6
[7] LED_GREEN_PB5
[7] LED_BLUE_PB0
R326
R325
R328
470R
470R
470R
1
Red
4
Green
3
Blue
Anode
2
VDD_LED
RGB LED
6.4.11 Push Button Switches
The SAMA5D2C-XULT board features three push buttons:
• One board Reset button (BP3) connected to the PMIC ACT8945A. When pressed and released, it causes a power-on reset of the board.
• One Wakeup push button connected to the PMIC ACT8945A, used to exit the processor from lowpower mode (BP2).
• One User momentary push button (BP1).
Figure 6-34. User Push Buttons (BP1)
BP1 Tact Switch
[7] USER_PB_PB9
6.4.12 Debug Interfaces
The SAMA5D2C-XULT board includes a JTAG, a Debug serial COM port and an EDBG interface port, to provide debug level access to the SAMA5D2.
6.4.12.1 Debug JTAG
A 10-pin JTAG header is provided on the SAMA5D2C-XULT board to facilitate the software development and debugging by using various JTAG emulators. The interface signals have a voltage level of 3.3V.
Figure 6-35. JTAG Interface
VDD_3V3
JTAG_TCK_PD14 R99
VDD_3V3
DNP(0R)
J11
5
7
1
3
9
Header 2X5
6
8
2
4
10
R104
100K
R75
100K
R74
100K
JTAG_TMS_PD17 [8]
JTAG_TCK_PD14 [8]
JTAG_TDO_PD16 [8]
JTAG_TDI_PD15 [8]
NRST [4,9,10,12,14,15]
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 42
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-36. JTAG J11
WWW.ATMEL.COM
R184
R183
C57
BP3
3
4
C56
JP7
R176
R174
R172
R170
R168
R166
2
BP2
VDDIODDR
R160
R157
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
2
3
4
R153
C50
L13
C49
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C48
C47
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
R123
R105
R100
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
4
3
R43
C15
L4
R46 C17
C13
L3
LCD
J2
R26 VBAT
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10 C2 C3
R27
R24
R18
R11
Table 6-14. JTAG/ICE Connector J11 Signal Descriptions
Pin Mnemonic
1 VTref. 3.3V power
2 TMS TEST MODE SELECT
3 GND
4 TCK TEST CLOCK – Output timing signal, for synchronizing test logic and control register access
5 GND
6 TDO JTAG TEST DATA OUTPUT –
Serial data input from the target
7 RTCK – Input Return test clock signal from the target
8 TDI TEST DATA INPUT – Serial data output line, sampled on the rising edge of the TCK signal
Common ground
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
Some targets having too slow system clock must synchronize the JTAG inputs to internal clocks. In present case such synchronization is unneeded and
TCK merely looped back into RTCK.
JTAG data input into target CPU
BOOT_DIS
JTAG data output from target CPU
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
Signal Description
This is the target reference voltage (main 3.3V).
JTAG mode set input into target CPU
Common ground
JTAG clock signal into target CPU
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 43
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Pin Mnemonic
9 GND
10 nSRST RESET
Signal Description
Common ground
Active-low reset signal. Target CPU reset signal.
6.4.12.2 Serial Console Port
The SAMA5D2C-XULT board has a dedicated serial port for debugging, which is accessible through the
6-pin male header J1. Various interfaces can be used as USB/Serial DBGU port bridge, such as FTDI
TTL-232R USB to TTL serial cable or basic breakout board for the RS232/USB converter.
Figure 6-37. Debug Com Port for Console
VDD_3V3
VDD_3V3 VSYS_5V
[8,14] DBGU_UTXD1_PD3
DBGU_OE
VDD_3V3
1
2
U21
VCC
3
GND
NL17SZ126DFT2G
5
4
C177
100nF
DBGU_TXD
DBGU_CTS
DBGU_TXD
DBGU_RXD
DBGU_RTS
3
4
1
2
5
6
J1
[8,14] DBGU_URXD1_PD2
C170
100nF
5
VCC
4
U20
1
GND
NL17SZ126DFT2G
2
3
DBGU_OE
DBGU_RXD
VDD_3V3
R340
10K
DBGU_OE
TP27 SMD
TP28 SMD
R336
R344
DNP(0R)
DNP(0R)
DBGU_CTS
DBGU_RTS
A jumper (JP2) is available to disable the Debug communication interface.
1 2
DBGU_DIS
Header 1X6
JP2
Header 1X2
JPR2
Jumper
R341 and R342 are optional (not implemented) resistors that can be used for power selection. Power can be delivered either by the SAMA5D2C-XULT board or by the debug interface tool. To avoid malfunction between the debug interface (e.g., FTDI) and the on-board power system, ensure that the selected voltage level corresponds to application requirements. The console baud rate is set to 115200 by default.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 44
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-38. DEBUG Connector J1
WWW.ATMEL.COM
3
4
5
6
R184
R183
C57
BP3
3
4
C56
JP7
R176
R174
R172
R170
R168
R166
2
BP2
VDDIODDR
R160
R157
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
2
3
4
R153
C50
L13
C49
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C48
C47
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
R123
R105
R100
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
4
3
R43
C15
L4
R46 C17
C13
L3
R26 VBAT
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10 C2 C3
R27
R24
R18
R11
Table 6-15. DEBUG Connector J1 Signal Descriptions
LCD
J2
Pin
1
2
Mnemonic
CTS
TXD1 (Transmitted
Data)
PIO
RFU
PD3
RXD1 (Received Data) PD2
Power –
RTS RFU
GND –
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
Signal Description
Handshake input
RS232 serial data output signal
RS232 serial data input signal
5V/3.3V (selected by resistors)
Handshake output
Common ground
WARNING
When using a console connected to the DEBUG interface J1, the jumper JP2 DEBUG_DIS should be OFF.
6.4.13 Embedded Debugger (EDBG) Interface
The Embedded Debugger (EDBG) 1 is an intuitive plug-and-play solution which adds full programming and debugging support to embedded hardware kits containing Microchip microcontrollers and microprocessors. It enables seamless integration between the target hardware and the Atmel Studio front end.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 45
32-BIT ARM-BASED MICROPROCESSORS
Board Components
In addition to the Virtual COM port which provides a UART bridge to the target device, the EDBG provides a Data Gateway Interface, through which the target device and host PC can communicate, facilitating high-level application debugging, monitoring, graphing and logging of system information in real-time.
The EDBG is based on the AT32UC3A4256J high-performance low-power 32-bit AVR microcontroller running at up to 60 MHz. The device includes an on-chip USB 2.0 high-speed hardware module with dedicated DMA channels, making it ideal for data communications.
By default, the EDBG is in Reset state and not usable. To use the EDBG interface, remove the jumper
JP1. To avoid any conflicts with the debug signals, do not use the JTAG and EDBG at the same time.
Figure 6-39. EDBG Interface
VDD_3V3
R29 DNP(1M)
EDBG_XIN
EDBG_XOUT
1
Y1
2
4
3
12MHz CL=15pF
C11
20pF
[15]
[15]
EDBG_ID_03
EDBG_ID_02
EDBG_ID_01
EDBG_ID_02
EDBG_ID_03
EDBG_ID_04
EDBG_ID_05
EDBG_ID_06
EDBG_ID_07
EDBG_DGI_TWD
EDBG_DGI_TWCK
EDBG_TWI
C14
20pF
TP4
SMD
ERASE
VSYS_5V
9
10
R3
100K
EDBG_ADC0
R2
200K
[8,9]
[8,9]
DBGU_UTXD1_PD3
DBGU_URXD1_PD2
VBUS
DM
DP
ID
GND
[15]
[15]
[15]
[15]
[15]
[15]
3
4
1
2
5
EDBG_DGI_GPIO0
EDBG_DGI_GPIO1
EDBG_DGI_GPIO2
EDBG_DGI_GPIO3
TP1
SMD
TP2
SMD
EDBG_DGI_TWD
EDBG_DGI_TWCK
[10] EDBG_ID_01
[4,9,10,12,14,15] NRST
EDBG_USB_VBUS_5V
EDBG_USB_DM
EDBG_USB_DP
R4
R5
U5
R23
R25
330R
330R
R46
EDBG_CDC_UART_RX
EDBG_CDC_UART_TX
EDBG_DGI_SDA
EDBG_FORCE_BOOT
Force s/n
R329 0R
EDBG_DGI_SCL
330R
C10
C9
G7
K7
J7
E7
H9
K10
G8
G10
E1
F9
E9
G9
E8
H10
F8
D8
H6
G6
J10
F7
A2
A1
B4
A4
C2
PA00 / PA18
PA01 / PA17
PA02 / PX47
PA03
PA04
PA05
PA06 / PA13
PA07 / PA19
PA08
PA09
PA10
PA11
PA12 / PA25
PA14 / PX11
PA15 / PX45
PA16
PA20 / PX18
PA21 / PX22
PA22 / PX20
PA23 / PX46
PA24 / PX17
PA26 / PB05
PA27
PA28
PA29
PA30
PA31
L13
180ohm at 100MHz
1 2
C49
1nF
C50
1nF
39R
39R
EDBG_USB_HS_DM
EDBG_USB_HS_DP
EDBG_USB_FS_DM
EDBG_USB_FS_DP
A10
A9
A8
B9
B8
C7
USB_VBUS
DMHS
DPHS
DMFS
DPFS
USB_VBIAS
VDD_3V3
U1
AT32UC3A4256HHB-C1UR ( AT32UC3A4256J-C1UR, Factory Programmed )
R10
6.8K 1%
C9
10pF
VDD_3V3
L4
180ohm at 100MHz
1 2
EDBG_USB_VBUS_5V
EDBG_USB_DM
EDBG_USB_DP
[4]
C15
100nF
VDD_3V3
C6
2.2uF
C5
1nF
C168
2.2uF
VDD_3V3
C175
100nF
(3V3)
J14
MicroUSB AB Connector
EARTH_USB_EDBG
L11
180ohm at 100MHz
1 2
C179
2.2uF
C171
2.2uF
C178
100nF
C172
100nF
C174
100nF
PRTR5V0U2X
EARTH_USB_EDBG
EDBG_JTAG_TCK_PD14
EDBG_JTAG_TDO_PD16
[8]
[8]
EDBG_JTAG_TMS_PD17 [8]
EDBG_JTAG_TDI_PD15 [8]
EDBG
D3
K4
D4
F1
E3
E4
D2
D1
H2
K1
H1
G1
F3
F4
G4
G2
G3
J1
K3
J4
G5
H5
J2
H4
J3
K2
PX08
PX09
PX10
PX12
PX13
PX15 / PX32
PX16 / PX53
PX19 / PX59
PX00
PX01
PX02
PX03
PX04
PX05
PX06
PX07
PX21
PX23
PX24
PX25
PX26
PX27
PX28
PX29
PX30
PX31
TCK
TDI
TDO
TMS
RESET_N
K9
K8
J8
H7
J9
EDBG_ID_06 [15]
EDBG_ID_07 [15]
EDBG_ID_05 [15]
EDBG_ID_04 [15]
STATUS_LED_CTRL
TARGET_RESET_SENSE R50
EDBG_JTAG_TCK
EDBG_JTAG_TDI
EDBG_JTAG_TDO
EDBG_JTAG_TMS
EDBG_RESET_N
1
0R
3
2
Q4
BSS138
3
1
R53
100K
2
Q5
BSS138
NRST [4,9,10,12,14,15]
EDBG_SPI_MISO
EDBG_SPI_MOSI
EDBG_SPI_SCK
EDBG_SPI_NCS
[15]
[15]
[15]
[15]
EDBG_JTAG_TCK
EDBG_JTAG_TDO
EDBG_JTAG_TMS
EDBG_JTAG_TDI
5
7
1
3
9
JTAG
J10
VDD_3V3
6
8
2
4
10
EDBG_RESET_N
DNP(Header 2X5)
D4
RED
VDD_3V3
JPR1
Jumper
JP1
Header 1X2
VDD_3V3
R1
10K
EDBG_RESET_N
1 2
EDBG_DIS
C4
100nF
D3
BLUE
6.4.14 CDC Debug Interface
This feature is enabled only if pin J9 (RESET_N) of the microcontroller is not tied to ground. The pin is normally pulled high and controlled by jumper JP1.
• Jumper JP1 not installed: The CDC device is enabled.
• Jumper JP1 installed: The CDC device is disabled.
WARNING
The default baud rate CDC is 57600 (57600/N/8/1).
1 Device and Ordering Information—The EDBG is a factory-programmed AT32UC3A4256J-C1UR standard microcontroller with ordering code AT32UC3A4256HHB-C1UR. For more information, contact your local Microchip sales representative.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 46
32-BIT ARM-BASED MICROPROCESSORS
Board Components
WARNING
When using a console with the EDBG-CDC, the jumper JP2 DEBUG_DIS should be ON.
6.4.15 EDBG USB Type Micro-AB
Figure 6-40. EDBG USB Type Micro-AB Connector J14
WWW.ATMEL.COM
3
4
5
Pin
1
2
R184
R183
C57
2
2
BP3
BP2
3
4
3
4
C56
R153
JP7
VDDIODDR
R160
R157
R176
R174
R172
R170
R168
R166
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R151 R150
R147
R144
R142
R140
R148
R145
R143
R141
J15 HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C50
L13
C49
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C48
C47
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
R123
R105
R100
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
4
3
R43
C15
L4
R46 C17
C13
L3
R26 VBAT
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10 C2 C3
R27
R24
R18
R11
Table 6-16. USB Connector J14 Signal Descriptions
LCD
J2
Mnemonic
VBUS
DM
DP
ID
GND
D30
D32
D34
D36
D22
D24
D26
D28
D38
D40
D42
D44
D46
D48
D50
D52
GND
D35
D37
D39
D41
D43
D45
D47
D49
5 V 5 V
D23
D25
D27
D29
D31
D33
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER
2
BP1
4
3
Signal Description
5V power
Data minus
Data plus
On-the-go identification (not connected)
Common ground
6.5 PIO Usage on Expansion Connectors
6.5.1 Arduino Connectors
Five 8-pin, one 6-pin, one 10-pin and one 36-pin headers (J7, J8, J9, J16, J17, J20, J21, J22) are provided on the SAMA5D2C-XULT board to enable the PIO connection of various expansion cards.
These headers’ physical and electrical implementation match the Arduino R3 extension (“shields”) system.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 47
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Due to I/O multiplexing, different signals can be provided on each pin.
Figure 6-41. Expansion Boards Connectors
R194
R193
R196
R195
0R
DNP(330R)
0R
DNP(330R)
VDD_3V3
[4,9,10,12,14]
[4]
NRST
5V_EXT_INP
R310 100R 1%
6
7
4
5
8
1
2
3
J7
Socket 1X8
J20
8
7
6
5
4
3
2
1
10
9
Socket 1X10
R198
R197
0R
DNP(330R)
ISC_D6/EXP/XPRO_PC0 [8,10,15]
EDBG_DGI_TWCK [14]
ISC_D5/EXP/XPRO_PB31 [7,10,15]
EDBG_DGI_TWD [14]
AREF [9]
EXP/XPRO_PD25 [8,15]
EXP/XPRO_PD27 [8,15]
EXP/XPRO_PD26 [8,15]
EXP/XPRO_PD28 [8,15]
EDBG_SPI_NCS [14]
EXP/XPRO_PB5 [7,15]
EXP/XPRO_PB6 [7,15]
[7]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
EXP_PA16
EXP_PD19
EXP_PD20
EXP_PD23
EXP_PD21
EXP_PD22
EXP_PD24
EXP_PD30
7
8
5
6
3
4
1
2
J8
Socket 1X8
J21
7
8
5
6
3
4
1
2
Socket 1X8
R200
R199
R202
R201
0R
DNP(330R)
0R
DNP(330R)
R203
R204
R206
R205
0R
DNP(330R)
0R
DNP(330R)
EXP/XPRO_PB9 [7,15]
EXP_PA19 [7,15]
EDBG_DGI_GPIO0 [14]
EXP_PA20 [7]
EDBG_DGI_GPIO1 [14]
EXP/XPRO_PD29 [8,15]
EXP/XPRO_PB10 [7,15]
EDBG_DGI_GPIO2 [14]
EXP/XPRO_PA21 [7,15]
EDBG_DGI_GPIO3 [14]
EXP/XPRO_PD12 [8,15]
EXP/XPRO_PD13 [8,15]
[4,8,15]
[7,15]
[7]
EXP_PA19
EXP_PA17
[7] EXP_PA18
PMIC_LBO/EXP_PC8
[8] EXP_PC27
[8,15]
[8]
[8]
EXP_PC26
EXP_PC11
EXP_PC10
[7,10,15]
[7,10,15]
[7,10,15]
[8,10]
[8,10]
[8,10]
[9]
[8] EXP_PD6
[7]
[7]
EXP_PA15
ISC_D5/EXP/XPRO_PB31
EXP_PB20
ISC_D1/EXP_PB27 [7,10]
ISC_D3/EXP/XPRO_PB29
ISC_D5/EXP/XPRO_PB31
ISC_D7/SPI1_SPCK_PC1
[7]
[7]
EXP_PA22
EXP_PA26
ISC_D8/SPI1_MOSI_PC2
CLK_AUDIO
ISC_VSYNC/EXP_PC5
[7,10]
[8,10]
ISC_RST/EXP_PB11
ISC_MCK/EXP_PC7
[14] EDBG_ID_04
[7,10] ISC_D10/EXP_PB24
[14] EDBG_ID_06
[8] EXP_PD31
R266
R262
22R
DNP(22R)
R271
R273
R290
R283
0R
DNP(0R)
0R
DNP(0R)
5
6
3
4
7
8
1
2
J9
Socket 1X8
J22
5
6
3
4
7
8
1
2
Socket 1X8
5V_EXT_INP
J17
29
31
33
35
21
23
25
27
9
11
13
15
17
19
5
7
1
3
Socket 2X18
30
32
34
36
22
24
26
28
10
12
14
16
6
8
2
4
18
20
EXP/XPRO_PA24 [7,15]
EXP/XPRO_PA23 [7,15]
ISC_D2/EXP/XPRO_PB28 [7,10,15]
ISC_D3/EXP/XPRO_PB29 [7,10,15]
EXP_PB23 [7]
EXP_PB22 [7]
EXP_TWD1_PD4 [8]
EXP_TWCK1_PD5 [8]
R294
R292
R302
R299
0R
DNP(0R)
0R
DNP(0R)
EXP_PA14 [7]
ISC_D4/EXP_PB30 [7,10,15]
ISC_D6/EXP/XPRO_PC0 [8,10,15]
EXP_PB21 [7]
ISC_D0/EXP_PB26 [7,10]
ISC_D2/EXP/XPRO_PB28 [7,10,15]
ISC_D4/EXP_PB30 [7,10,15]
ISC_D6/EXP/XPRO_PC0 [8,10,15]
EXP_PA25 [7]
ISC_D9/SPI1_MISO_PC3
ISC_HSYNC/EXP_PC6
[8,10]
[8,10]
ISC_PCK/SPI1_NPCS0_PC4
ISC_PWD/EXP_PB12 [7,10]
[8,10]
ISC_D11/EXP_PB25 [7,10]
EDBG_ID_05 [14]
PMIC_LBO/EXP_PC8 [4,8,15]
EDBG_ID_07 [14]
EXP_PC26 [8,15]
VDD_3V3 5V_EXT_INP
[8,15]
[14]
[8,15]
[14]
EXP/XPRO_PD27
EDBG_SPI_MISO
EXP/XPRO_PD25
EDBG_SPI_SCK
NRST
SPI1_MISO 0R
DNP(330R)
SPI1_SPCK 0R
DNP(330R)
100R 1%
R247
R248
R260
R257
R261
J16
1
3
5
2
4
6
Header 2X3
R252
R253
0R SPI1_MOSI
DNP(330R)
EXP/XPRO_PD26 [8,15]
EDBG_SPI_MOSI [14]
6.5.1.1 Functions Available Through the Arduino Headers
The multiplexing of the SAMA5D27 I/Os (standard parallel I/O and up to three peripheral functions per pin) makes it possible to route alternate signals via Arduino extension headers. To enable these signals,
SAMA5D27 PIO multiplexing must be properly configured. For more details, refer to
and the section PIO Controller (PIO) in the SAMA5D2 Series datasheet.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 48
32-BIT ARM-BASED MICROPROCESSORS
Board Components
The tables below, together with the connector schematics, provide the alternate signals available for use with Arduino connectors.
Figure 6-42. J7 Connector
WWW.ATMEL.COM
R184
R183
C57
2
2
BP3
BP2
3
4
3
4
C50
L13
C49
C56
R153
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
EDBG-JTAG A5-JTAG R104
R99
R75
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
R59
JP4
R46 R43
C15
L4
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
Table 6-17. J7 Connector Signals
C17
C13
L3
6
7
4
5
2
3
Pin No.
1
8
C2 C3
Signal
VBAT
3V3
RST
3V3
5V
GND
GND
VIN
VDDCORE
C19
R44
R41
R30
1
2
R27
R24
R18
R11
R26 VBAT
R103
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
R123
R105
R100
4
3
LCD
J2
–
–
–
–
Function
NC
(IOREF)
–
NC
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 49
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-43. J8 Connector
WWW.ATMEL.COM
BOOT_DIS
R184
R183
C57
2 PD1
9
3 PD2
0
4 PD2
3
5 PD2
1
6 PD2
2
7 PD2
4
8 PD3
0
2
2
BP3
BP2
3
4
3
4
C50
L13
C49
C56
R153
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
VDD_3V3
R123
R105
R100
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
R46 R43
C15
L4
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
Table 6-18. J8 Connector Signals
C17
C13
L3
C2 C3
Pin
.
No Type
SAMA5D27 PIO Muxing Alternates
1 PA16 SPI0_MISO TD1 QSPI0_IO0
R27
R24
R18
R11
R26 VBAT
4
3
I2SWS1
LCD
J2
PCK0 TWD1 URXD2 –
FLEXCOM3_IO
4
I2SCK0
TIOA2
URXD2
TIOB2
TCLK2
UTXD2
SPI1_NPCS2
TWCK1
–
TWD0
TWCK0
–
TMS
UTXD2 –
FLEXCOM4_IO
3
FLEXCOM4_IO
1
–
–
FLEXCOM4_IO
2
FLEXCOM4_IO
4
–
–
FLEXCOM2_O1 TIOB3
I2SDI0
–
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
I2SMCK0
I2SDO0
I2SWS0
TWCK0
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
D11
ISC_D11
ISC_PCK
ISC_FIELD
ISC_VSYNC
ISC_HSYNC
–
–
R130
R
–
TM
AD0
AD1
AD4
AD2
AD3
AD5
AD11
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 50
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-44. J9 Connector
R184
R183
C57
2
2
BP3
BP2
3
4
3
4
C50
L13
C49
C56
R153
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
VDD_3V3
R123
R105
R100
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
R46 R43
C15
L4
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
Table 6-19. J9 Connector Signals
C17
C13
L3
5
6
7
8
2
3
4
Pin
No.
Type
1
SAMA5D27 PIO Muxing Alternates
PA19 SPI0_NPCS2 RF1
PA17
PA18
PC8
SPI0_NPCS0
SPI0_NPCS1
LCDDEN
RD1
RK1
NANDRDY
PC27 LCDDAT23
PC26 LCDDAT22
PC11
PC10
LCDDAT3
LCDDAT2
GTX3
–
GTXEN
GTXCK
C2 C3
R27
R24
R18
R11
R26 VBAT
QSPI0_IO3
QSPI0_IO1
QSPI0_IO2
FIQ
PCK1
GTX2
ISC_D2
ISC_D1
4
3
LCD
J2
TIOA0
I2SDI1
I2SDO1
PCK0
CANRX1
CANTX1
TCLK4
TIOB4
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
WWW.ATMEL.COM
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
SDHC1_DAT1
FLEXCOM3_O1
SDHC1_DAT0
UTXD1
TWD0
–
CANRX0
CANTX0
D14
D12
D13
ISC_FIELD
A16
A15
A0/NBS0
–
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 51
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-45. J20 Connector
WWW.ATMEL.COM
R184
R183
C57
2
2
BP3
BP2
3
4
3
4
C50
L13
C49
EDBG-JTAG A5-JTAG R104
R99
C56
R153
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
R103
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
R131 L12
C44
R75
VDD_3V3
R123
R105
R100
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
4
3
R46 R43
C15
L4
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
Table 6-20. J20 Connector Signals
C17
C13
L3
3
2
1
6
5
4
9
8
7
Pin
No.
Type
10 PC0
PB31
AREF
GND
SAMA5D27 PIO Muxing Alternates
LCDDAT21
LCDDAT20
–
–
A23
A20
–
–
PD25
PD27
PD26
PD28 SPI1_NPCS0
PB5
PB6
SPI1_SPCK
SPI1_MISO
SPI1_MOSI
TCLK2
TIOA2
TCK
–
TDI
D10
D11
C2 C3
R27
R24
R18
R11
R26 VBAT
LCD
J2
FLEXCOM0_O1 TWCK0
FLEXCOM0_IO4 TWD0
– –
– –
FLEXCOM4_O1 –
FLEXCOM2_IO2 –
FLEXCOM2_IO1 –
FLEXCOM2_IO3 –
PWMH2 QSPI1_SCK
PWML2 QSPI1_CS
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
–
–
–
–
–
–
–
–
PTCPORT5
PTCPORT6
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
ISC_D6
ISC_D5
–
–
AD6
AD8
AD7
AD9
GTSUCOMP
GTXER
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 52
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-46. J21 Connector
WWW.ATMEL.COM
R184
R183
C57
2
2
BP3
BP2
3
4
3
4
C50
L13
C49
EDBG-JTAG A5-JTAG R104
R99
C56
R153
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
R103
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
R131 L12
C44
R75
VDD_3V3
R123
R105
R100
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
VDDCORE
C19
R44
R41
R30
1
2
4
3
5
6
7
8
2
3
4
Pin
No.
1
R46 R43
C15
L4
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
Table 6-21. J21 Connector Signals
C17
C13
L3
C2 C3
R27
R24
R18
R11
R26 VBAT
LCD
J2
SAMA5D27 PIO Muxing Alternates
Type
PB9 TIOA3 D14
PA19 SPI0_NPCS2
PA20 SPI0_NPCS3
PD29 SPI1_NPCS1
RF1
–
TDO
PB10 TIOB3
PA21 IRQ
PD12 TIOB1
PD13 TCLK1
D15
PCK2
FLEXCOM4_IO1
PWMFI1
QSPI0_IO3
–
FLEXCOM2_IO4
PWMEXTRG1
UTMI_LS1
QSPI1_IO2
TIOA0
TIOB0
TIOA3
QSPI1_IO3
TCLK0
GRXER
FLEXCOM4_IO2 UTMI_CRDCPSEL0 GRX0
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
–
SDHC1_DAT1
SDHC1_DAT2
TWD0
–
SDHC1_DAT3
ISC_D5
ISC_D6
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
GCOL
D14
D15
AD10
GRX2
NANDRDY
ISC_D0
ISC_D1
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 53
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-47. J22 Connector
WWW.ATMEL.COM
R184
R183
C57
2
2
BP3
BP2
3
4
3
4
C50
L13
C49
C56
R153
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
R103
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
R123
R105
R100
EDBG-JTAG A5-JTAG R104
R99
R75
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
R59
JP4
5
6
7
8
2
3
4
Pin
No.
1
R46 R43
C15
L4
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
Table 6-22. J22 Connector Signals
C17
C13
L3
C2 C3
SAMA5D27 PIO Muxing Alternates
Type
PA24 FLEXCOM1_IO0 D2
PA23 FLEXCOM1_IO1 D1
PB28 LCDDAT17 A17
PB29 LCDDAT18 A18
PB23 LCDDAT12
PB22 LCDDAT11
PD4 TWD1
PD5 TWCK1
A12
A11
URXD2
UTXD2
VDDCORE
C19
R44
R41
R30
1
2
R27
R24
R18
R11
R26 VBAT
4
3
LCD
J2
RD0
TD0
–
–
TDO SPI1_MISO
TDI SPI1_MOSI
FLEXCOM0_IO0 TIOA5
FLEXCOM0_IO1 TIOB5
TIOB2
TIOA2
GCOL
GRX2
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
–
–
–
–
QSPI0_IO0
QSPI0_CS
ISC_D2
ISC_D3
FLEXCOM3_IO1 GMDIO
FLEXCOM3_IO2 GMDC
ISC_D10 NCS0
ISC_D9 NCS1
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 54
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-48. J17 Connector
WWW.ATMEL.COM
R184
R183
C57
2
2
BP3
BP2
3
4
3
4
C50
L13
C49
C56
R153
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99
R75
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
R59
R103
JP4
R123
R105
R100
8
9
10
5
6
7
2
3
4
Pin
No.
1
14
15
16
11
12
13
R46 R43
C15
L4
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
Table 6-23. J17 Connector Signals
C17
C13
L3
C2 C3
SAMA5D27 PIO Muxing Alternates
Type
5V
5V
PD6
PA14
–
–
TCK
SPI0_SPCK
PA15 SPI0_MOSI
PB30 LCDDAT19
PB31 LCDDAT20
PC0 LCDDAT21
PB20 LCDDAT9
PB21 LCDDAT10
–
–
PCK1
TK1
TF1
A19
A20
A23
A9
A10
PB27 LCDDAT16
PB26 LCDDAT15
PB29 LCDDAT18
PB28 LCDDAT17
PB31 LCDDAT20
PB30 LCDDAT19
A16
A15
A18
A17
A20
A19
VDDCORE
C19
R44
R41
R30
1
2
R27
R24
R18
R11
R26 VBAT
4
3
LCD
J2
–
–
–
QSPI0_SCK
–
–
GRX3
I2SMCK1
QSPI0_CS I2SCK1
FLEXCOM0_IO3 TCLK5
FLEXCOM0_IO4 TWD0
FLEXCOM0_O1
TK0
TF0
TWCK0
TIOB3
TCLK3
UTXD0
URXD0
PDMCLK0
PDMDAT0
FLEXCOM0_IO1 TIOB5
FLEXCOM0_IO0 TIOA5
FLEXCOM0_IO4 TWD0
FLEXCOM0_IO3 TCLK5
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
–
–
–
–
–
–
– –
–
ISC_D8
–
NCS2
FLEXCOM3_IO3 D9
FLEXCOM3_IO1 D10
– ISC_D4
– ISC_D5
–
PCK1
ISC_D6
GTX0
FLEXCOM3_IO3 GTX1
ISC_D1
ISC_D0
ISC_D3
ISC_D2
ISC_D5
ISC_D4
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 55
32
33
34
35
36
29
30
31
26
27
28
21
22
23
24
25
18
19
20
Pin
No.
17
32-BIT ARM-BASED MICROPROCESSORS
Board Components
SAMA5D27 PIO Muxing Alternates
PA26
PC3
PC2
PC6
PC5
Type
PC1
PC0
PA22
PA25
PC4
PB11
LCDDISP
LCDDAT0
PB12 LCDDAT1
PC7 LCDPCK
PB25 LCDDAT14
PB24 LCDDAT13
PC8 LCDDEN
PD31 ADTRG
PC26 LCDDAT22
GND
GND
–
–
LCDDAT22 A24
LCDDAT21 A23
FLEXCOM1_IO3 D0
FLEXCOM1_IO4 D3
FLEXCOM1_O1
LCDPWM
LCDDAT23
LCDHSYNC
LCDVSYNC
D4
NWAIT
A25
NCS1
NCS0
NWR1/NBS1
A0/NBS0
A1
NCS2
A14
A13
–
–
NANDRDY
NTRST
–
–
–
FIQ
IRQ
GTX2
TIOB1
URXD3
UTXD3
TWCK1
RF0
RK0
CANTX0
FLEXCOM0_O1
TCK
TMS
NTRST
TIOA1
CANRX0
TWD1
TCLK1
SPI1_SPCK
TWCK0
SPI1_SPCK
SPI1_NPCS0
SPI1_NPCS1
SPI1_MISO
SPI1_MOSI
SPI1_NPCS2
SPI1_NPCS1
SPI1_NPCS0
PDMDAT0
PDMCLK0
SPI1_NPCS3
–
TCLK2
–
–
PCK0
TCLK3
CANTX1
–
–
I2SCK0
–
SDHC1_CK
–
–
I2SWS0
I2SMCK0
QSPI0_IO2
ISC_D9
ISC_D8
ISC_HSYNC
ISC_VSYNC I2SDO0
I2SDI0
–
–
ISC_PCK
GRX3
GTX2
URXD1 ISC_MCK
FLEXCOM3_IO1 ISC_D11
FLEXCOM3_IO4 ISC_D10
UTXD1
PCK0
ISC_FIELD
–
A15
–
–
ISC_D7
ISC_D6
QSPI0_SCK
QSPI0_IO1
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 56
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-49. J16 Connector
R184
R183
C57
2
2
BP3
BP2
3
4
3
4
C50
L13
C49
C56
R153
JP7
VDDIODDR
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C44
R131 L12
EDBG-JTAG A5-JTAG R104
R99 R103
R75
VDD_3V3
R123
R105
R100
CLASS D
R71
C32
R62
C39
C33
C26
JP4
R59
R46 R43
C15
L4
C14
C11
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
Table 6-24. J16 Connector Signals
C17
C13
L3
C2 C3
5
6
2
3
Pin
No.
Type
1 PD27
POWER
4
PD25
PD26 nRST
GND
SAMA5D27 PIO Muxing Alternates
SPI1_MISO
–
SPI1_SPCK
SPI1_MOSI
–
–
TCK
–
–
–
–
–
VDDCORE
C19
R44
R41
R30
1
2
R27
R24
R18
R11
R26 VBAT
4
3
FLEXCOM2_IO2 –
–
–
– –
FLEXCOM4_O1 –
FLEXCOM2_IO1 –
–
–
LCD
J2
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
GND
–
–
–
–
–
–
WWW.ATMEL.COM
5 V 5 V
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER BP1
2 4
3
AD8
–
–
–
AD6
AD7
Note: 5V/3.3V selected by resistors
6.5.2 XPRO
The SAMA5D2C-XULT board features three connectors to interface with standard Xplained PRO extensions.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 57
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Figure 6-50. XPRO Connectors Schematics
5V_EXT_INP
VSYS_5V
XPRO Power
J24
1
3
2
4
DNP(Header 2X2)
[7,10,15]
[14]
[8]
EDBG_ID_02
XPRO_PD11
[8,15]
[7,15]
[8,15]
[7,15]
[8,15]
[8,15]
EXP/XPRO_PD13
EXP/XPRO_PB9
EXP/XPRO_PD13
ISC_D5/EXP/XPRO_PB31
EXP/XPRO_PA23
EXP/XPRO_PD28
EXP/XPRO_PD27
VDD_3V3
ID
ADC(+)
GPIO
PWM(+)
IRQ/GPIO
TWI_SDA
UART_RX
SPI_SS_A
SPI_MISO
XPRO EXT1
J25
9
11
13
15
17
5
7
1
3
19
10
12
14
16
18
6
8
2
4
20
ADC(-)
GPIO
PWM(-)
SPI_SS_B/GPIO
TWI_SCL
UART_TX
SPI_MOSI
SPI_SCK
VDD_3V3
DNP(Header 2X10)
EXP/XPRO_PD12 [8,15]
XPRO_PD18 [8]
EXP/XPRO_PB10 [7,15]
EXP/XPRO_PD29 [8,15]
ISC_D6/EXP/XPRO_PC0 [8,10,15]
EXP/XPRO_PA24 [7,15]
EXP/XPRO_PD26 [8,15]
EXP/XPRO_PD25 [8,15]
[7,10,15]
[7,10,15]
[14]
[8]
[8]
[7,15]
EDBG_ID_03
XPRO_PD7
XPRO_PD9
EXP/XPRO_PB5
[7,15] EXP/XPRO_PA21
ISC_D2/EXP/XPRO_PB28
ISC_D3/EXP/XPRO_PB29
[8,15] EXP/XPRO_PD29
[8,15] EXP/XPRO_PD27
ID
ADC(+)
GPIO
PWM(+)
IRQ/GPIO
TWI_SDA
UART_RX
SPI_SS_A
SPI_MISO
XPRO EXT2
J26
1
11
13
15
17
19
7
9
3
5
2
12
14
16
18
20
4
6
8
10
ADC(-)
GPIO
PWM(-)
SPI_SS_B/GPIO
TWI_SCL
UART_TX
SPI_MOSI
SPI_SCK
VDD_3V3
DNP(Header 2X10)
The standard extension headers include common signals.
Figure 6-51. XPRO Connectors
XPRO_PD8 [8]
XPRO_PD10 [8]
EXP/XPRO_PB6 [7,15]
EXP/XPRO_PD28 [8,15]
ISC_D3/EXP/XPRO_PB29 [7,10,15]
ISC_D2/EXP/XPRO_PB28 [7,10,15]
EXP/XPRO_PD26 [8,15]
EXP/XPRO_PD25 [8,15]
WWW.ATMEL.COM
R184
R183
C57
2
2
BP3
3
4
BP2
3
4
C50
L13
C49
C56
R153
EDBG-JTAG A5-JTAG R104
R99
R75
VDD_3V3
CLASS D
R71
C32
R62
C39
C33
C26
R59
R43
C15
L4
R46
EDBG_DIS
TP1 TP2
R25
R23
C9
R10
C14
C11
JP7
VDDIODDR
R127
R125
R106
R101
R 9 7
R128
R126
R107
R102
R 9 8
C17
C13
L3
R103
R160
R157
R176
R174
R172
R170
R168
R166
C48
C47
R177
R175
R173
R171
R169
R167
R165
R163
R161
R159
R156
C53
R158
R155
R149
R147
R144
R142
R140
R148
R145
R143
R141
J15
HSIC
R152
C51
R146
R139
C46
JP6
VDDBU
C44
R131 L12
R123
R105
R100
JP4
VDDCORE
C19
R44
R41
R30
1
2
R26 VBAT
4
3
C2 C3
R27
R24
R18
R11
LCD
J2
D30
D32
D34
D36
D38
D40
D42
D44
D22
D24
D26
D28
D46
D48
D50
D52
GND
D29
D31
D33
D35
D37
D39
D41
D43
5 V 5 V
D23
D25
D27
D45
D47
D49
D51
D53
GND
BOOT_DIS
R130
R
TM
JP2
C25
R61
R60
R49
R48
R47
R45
DEBUG_DIS
J1 DEBUG
R64
CTS TXD RXD VCC RTS GND
C21
C18
C16
C12
L2
PB_USER
2
BP1
4
3
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 58
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Table 6-25. XPRO Power Connector J24 Signal Descriptions
Signal
EXP_5V
VDD_5V
Pin No.
1
3
2
4
Table 6-26. XPRO EXT1 Connector J25 Signal Descriptions
5
6
7
8
9
Pin
2
3
XPRO
Signal
No. Type
1 EDBG_ID_0
2
GND –
PD11 ADC(+)
4 PD12 ADC(-)
SAMA5D27 PIO Muxing Alternates
– – –
10
11
12
13
14
15
16
17
18
19
20
PD13 GPIO
PD18 GPIO
PB9 PWM(+)
PB10
PD13
PD29
PB31
PC0
PA23
PA24
PD28
PD26
PD27
PD25
GND
3V3
PWM(-)
IRQ/GPIO
SPI_SS_B/
GPIO
TWI_SDA
TWI_SCL
UART_RX
UART_TX
SPI_SS_A
SPI_MOSI
SPI_MISO
SPI_SCK
–
–
SPI1_MOSI
SPI1_MISO
SPI1_SPCK
–
–
–
–
TIOA1
TIOB1
TCLK1
NTRST
TIOA3
TIOB3
TCLK1 FLEXCOM4_IO
2
UTMI_CDRCP
SEL0
SPI1_NPCS1 TDO FLEXCOM2_IO
4
GRX0
TIOA3
LCDDAT20
LCDDAT21
–
PCK2
FLEXCOM1_IO
2
D1
FLEXCOM1_IO
1
D2
SPI1_NPCS0 TDI
–
UTMI_LS0
FLEXCOM4_IO
1
UTMI_LS1
FLEXCOM4_IO
2
UTMI_CDRCP
SEL0
–
D14
D15
A20
A23
–
PWMFI1
PWMEXTRG1 QSPI1_IO3
FLEXCOM0_IO
4
TWD0
TWCK0 FLEXCOM0_O
1
TDI SPI1_MOSI
TDO
–
GRXDV
GRXER
GRX0
GMDIO
QSPI1_IO2
SPI1_MISO
–
TCK
–
–
–
FLEXCOM2_IO
3
–
FLEXCOM2_IO
1
–
FLEXCOM2_IO
2
–
– FLEXCOM4_O
1
– –
– –
–
–
–
–
ISI_D4
ISI_D5
ISI_D6
Signal
GND
VSYS_3V3
–
–
ISI_MCK
ISI_D4
ISI_D5
ISI_FIELD ISI_D10
– GCOL
– GRX2
ISI_D6 ISI_D5
TWD0
–
–
–
–
–
–
–
–
–
ISI_D5
ISI_D6
–
PTCCOL0
PTCCOL1
PTCCOL7
–
–
PTCCOL2
QSPI0_CS –
QSPI0_IO0 –
–
–
–
–
–
–
–
PTCCOL2
AD10
–
–
AD9
AD7
AD8
AD6
–
–
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 59
32-BIT ARM-BASED MICROPROCESSORS
Board Components
Table 6-27. XPRO EXT2 Connector J26 Signal Descriptions
2
3
Pin
No. Type
1 –
XPRO
Signal
EDBG_ID_0
3
GND –
PD7 ADC(+)
SAMA5D27 PIO Muxing Alternates
–
–
TDI
–
–
–
– –
– –
UTMI_RXVAL GTX2
– – –
6
7
4
5
PD8 ADC(-)
PD9 GPIO
PD10 GPIO
PB5 PWM(+)
8
9
PB6 PWM(-)
PA21 IRQ/GPIO
TIOA2
IRQ
10 PD28 SPI_SS_B/
GPIO
11 PB28 TWI_SDA
SPI1_NPCS0 TDI
LCDDAT17 A17
12 PB29 TWI_SCL
13 PB29 UART_RX LCDDAT18
14 PB28 UART_TX
15 PD29 SPI_SS_A SPI1_NPCS1 TDO
16 PD26 SPI_MOSI SPI1_MOSI
17 PD27 SPI_MISO SPI1_MISO
18 PD25 SPI_SCK
19 GND –
20 3V3 –
–
–
TDO
TMS
NTRST
TCLK2
LCDDAT18
LCDDAT17
SPI1_SPCK
A18
A18
A17
–
TCK
–
–
–
–
–
–
D10
D11
PCK2
UTMI_RXERR GTX3
UTMI_RXACT GTXCK
UTMI_HDIS
PWMH2
GTXEN
QSPI1_SCK
PWML2
–
QSPI1_CS
TCLK0
FLEXCOM2_IO
3
–
FLEXCOM0_IO
1
TIOA5
FLEXCOM0_IO
2
TIOB5
FLEXCOM0_IO
2
TIOB5
FLEXCOM0_IO
1
TIOA5
FLEXCOM2_IO
4
TIOA3
FLEXCOM2_IO
1
–
FLEXCOM2_IO
2
–
–
–
–
FLEXCOM4_O
1
–
–
–
ISI_D0
ISI_D1
ISI_D2
–
NWR1/
NBS1
–
PTCROW4
NANDRDY PTCROW5
– PTCROW6
ISI_D3 –
PTCPORT5 GTSUCOM
P
PTCROW7
–
PTCPORT6 GTXER
SDHC1_DA
T3
–
NANDRDY –
– – AD9
–
–
–
–
TWD0
–
–
–
–
–
ISI_D2
ISI_D3
ISI_D3
ISI_D2
–
–
–
–
–
–
–
–
–
–
AD10
AD7
AD8
AD6
–
–
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 60
32-BIT ARM-BASED MICROPROCESSORS
Board Schematics
7. Board Schematics
This section contains the following schematics:
• Block Diagram
• PIO Muxing Table
• Power Supply
• SAMA5D27 – Power
• SAMA5D27 – DDR3
• SAMA5D27 – PIOA and PIOB
• SAMA5D27 – PIOC and PIOD
• SAMA5D27 – SYS, Tamper, and Debug
• USB, ISC, and LCD
• Serial Flash, LEDS, Push Button and ClassD
• Ethernet
• SD and eMMC
• EDBG
• Expansion and XPRO Connectors
Important: Design Reuse Recommendation
In case the memory or PIO busses go to multiple destinations, series resistors must be added.
These resistors must be located at the beginning of each branch, as close as possible to the
MPU.
In case these connections are point-to-point, the branch resistors found in the following schematics can be removed.
In all cases, it is recommended to always perform routing simulation to check signal integrity prior to PCB manufacturing.
7.1 Schematics
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 61
A
D
C
B
Figure 7-1. Block Diagram rotatethispage90
5 4 3 2
Push
Buttons
Reset
Force PwrOn
Sheet 4
5V & 3V3
Single
PMU
Solution
Sheet 4
Power rails
Sheet 11
User LEDs
Push Buttons
PIO
Sheet 4
PMU or
Super Cap
VBAT
ANALOG Reference
PIO A,B,C,D
5V INPUT
Atmel
SAMA5D27
5V INPUT
Cortex(R)-A5 Processor
Sheet 5: Power Part
Sheet 6: DDR3 CTL
Sheet 7: PIOA & PIOB
Sheet 8: PIOC & PIOD
Sheet 9: SYS & JTAG & DBUG
USB A,B,C
EBI
Sheet 10
USB A
OTG
USB B
Host
USB C
HSIC
JTAG
Sheet 6
4Gb
DDR3
SDRAM
PIO A
32Gb eMMC
Flash
Sheet 13
PIO A,B,C,D
USB
DEVICE
1
Sheet 14
EDBG
JTAG
Connector
Sheet 9
D
C
B
Sheet 15
ISC
Connector
Sheet 10
5
LCD
Connector
S h e e t 1 0
MAC
Serial
EEPROM
Sheet 11
QSPI
Serial
Flash
Sheet 11
SPI
Serial
Flash
Sheet 11
Audio
Class D
Sheet 11
Ethernet
10/100M bps
S h e e t 1 2
4 3 2
SD
Card
Sheet 13
SAMA5D2C-XULT
Block Diagram
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1
XXX
XXX
XXX
XXX
XX-XXX-XX
C
2
15
A
D
C
B
A
Figure 7-2. PIO Muxing Table rotatethispage90
5
PIO Muxing & Jumper setting
4
LCD
ID_SYS
GND
NC
NC
LCDDAT2
LCDDAT3
GND
LCDDAT4
LCDDAT5
LCDDAT6
LCDDAT7
GND
NC
NC
LCDDAT10
LCDDAT11
GND
LCDDAT12
LCDDAT13
LCDDAT14
LCDDAT15
GND
NC
NC
LCDDAT18
LCDDAT19
GND
LCDDAT20
LCDDAT21
LCDDAT22
LCDDAT23
GND
LCDPCK
LCDVSYNC
LCDHSYNC
LCDDEN
SPI1_SPCK/AD0_XP
SPI1_MOSI/AD1_XM
SPI1_MISO/AD2_YP
SPI1_NPCS0/AD3_YM
LCDDISP
TWD1
TWCK1
IRQ1
IRQ2
LCDPWM
NRST
VCC
VCC
GND
45
46
47
42
43
44
48
49
50
37
38
39
40
41
34
35
36
31
32
33
28
29
30
25
26
27
22
23
24
19
20
21
14
15
16
17
18
11
12
13
8
9
10
5
6
7
1
2
3
4
PIOA
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
USAGE
SDHC0_CK
SDHC0_CMD
SDHC0_DAT0
SDHC0_DAT1
SDHC0_DAT2
SDHC0_DAT3
SDHC0_DAT4
SDHC0_DAT5
SDHC0_DAT6
SDHC0_DAT7
SDHC0_RSTN
SDHC0_VDDSEL
PMIC_CHGLEV
SDHC0_CD
SPI0_SPCK/EXP
SPI0_MOSI/EXP
PIOC
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
USAGE
LCD_DAT10
LCD_DAT11
LCD_DAT12
LCD_DAT13
LCD_DAT14
LCD_DAT15
LCD_DAT18
LCD_DAT19
LCD_DAT20
LCD_DAT21
LCD_DAT22/EXP
LCD_DAT23/EXP
LCD_PWM
LCD_DISP
LCD_VSYNC
LCD_HSYNC
3
PIOA
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
USAGE
SPI0_MISO/EXP
SPI0_CS0/EXP
SDHC1_DAT0/EXP
SDHC1_DAT1/EXP
SDHC1_DAT2/EXP
SDHC1_DAT3/EXP/XPRO
SDHC1_CK/QSPI0_SCK/EXP
QSPI0_CS/EXP/XPRO
QSPI0_IO0/EXP/XPRO
QSPI0_IO1/EXP
QSPI0_IO2/EXP
QSPI0_IO3
SDHC1_CMD
USBB_OVCUR
SDHC1_CD
USBA_VBUS Detection
PIOB
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
USAGE
LED_BLUE/LCD_ID
CLASSD_R0
CLASSD_R1
CLASSD_R2
CLASSD_R3
LED_GREEN/EXP/XPRO
LED_RED/EXP/XPRO
LCD_IRQ1
LCD_IRQ2
USER_PB/EXP/XPRO
USBB_EN5V/EXP/XPRO
ISC_RST/EXP
ISC_PWD/EXP
PMIC_IRQ
ETH_GTXCK
ETH_GTXEN
PIOD
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
USAGE
LCD_PCK
LCD_DEN
DBGU_URXD1
DBGU_UTXD1
LCD/EEP/ISC/EXP_TWD1
LCD/EEP/ISC/EXP_TWCK1
EXP
XPRO
XPRO
XPRO
XPRO
XPRO
EXP/XPRO
EXP/XPRO
JTAG_TCK
JTAG_TDI
PIOD
PD16
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
PD17
PD18
PD19
PD20
PD21
PD22
PD23
USAGE
JTAG_TDO
JTAG_TMS
XPRO
LCD_XP/EXP
LCD_XM/EXP
LCD_YP/PMIC_TWD0/EXP
LCD_YM/PMIC_TWCK0/EXP
EXP
EXP
EXP/XPRO
EXP/XPRO
EXP/XPRO
EXP/XPRO
EXP/XPRO
EXP
EXP
2
PIOB
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
USAGE
ETH_GRXDV
ETH_GRXER
ETH_GRX0
ETH_GRX1
ETH_GTX0/EXP
ETH_GTX1/EXP
ETH_GMDC/EXP
ETH_GMDIO/EXP
ISC_D10/EXP
ISC_D11/EXP
ISC_D0/EXP
ISC_D1/EXP
ISC_D2/EXP/XPRO
ISC_D3/EXP/XPRO
ISC_D4/EXP
ISC_D5/EXP/XPRO
JP2
JP3
JP4
JP5
JP6
JP7
JP8
JP9
JUMPER DESCRIPTION
PART DEFAULT FUNCTION
JP1 OPEN Disable EDBG
OPEN
CLOSE
CLOSE
CLOSE
CLOSE
CLOSE
CLOSE
OPEN
Disable Debug
I VDD_3V3_LP Measurement
I VDDCORE Measurement
I VDDISC+VDDIOP0/1/2 Measurement
I VDDBU Measurement
I VDDIODDR_MPU Measurement
I VDD_5V_IN Measurement
Disable CS of SPI&QSPI&eMMC Memory
SAMA5D2C-XULT
PIO Muxing
1
PIOC
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
USAGE
ISC_D6/EXP/XPRO
ISC_D7/SPI1_SPCK/EXP
ISC_D8/SPI1_MOSI/EXP
ISC_D9/SPI1_MISO/EXP
ISC_PCK/SPI1_NPCS0/EXP
ISC_VSYNC/EXP
ISC_HSYNC/EXP
ISC_MCK/EXP
PMIC_LBO/EXP
ETH_INT
LCD_DAT2/EXP
LCD_DAT3/EXP
LCD_DAT4
LCD_DAT5
LCD_DAT6
LCD_DAT7
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1 5 4 3 2
XXX
XXX
XXX
XXX
XX-XXX-XX
C
3
15
A
D
C
B
D
C
B
A
Figure 7-3. Power Supply rotatethispage90
5 4 3 2 1
[14] EDBG_USB_VBUS_5V
[10] USBA_VBUS_5V
[9] WKUP
R187
R186
10K
10K
2
6
8
3
IN1
VSNS
U12
STAT
OUT
EN ILIM
IN2 GND
TPS2113
4
5
1
7
R185
JP8
Header 1X2
JPR8
Jumper
1 2
390R 1%
VDD_5V_IN
C59
10uF
C60
10uF
C58
100nF
VDDBU
3
R346
100K
2
1
Q9
BSS138
VSYS_5V VSYS_5V
3
R332
100K
2
1
Q8
BSS138
R333
100K nPBSTAT
VSYS_5V
C180
10uF
A3
VIN
U22
VOUT1
VOUT2
A1
A2
L27
0.47uH
B1
B2
B3
SW1
SW2
EN
PGND1
PGND2
AGND
FAN48610
C1
C2
C3
PCB1
SAMA5D2-XULT PCB
VDDB_5V
C181
22uF
VDD_3V3
D5
RB160M-60TR
R280 100R 1%
+ C42
0.2F/3.3V
1
2
D6
BAT54C
3
C44
DNP(1uF)
JPR6
Jumper
JP6
Header 1X2
VDDBU
C46
100nF
1 2
R139
DNP(2.2K)
(Super)-Capacitor energy storage
Populate R if no Super Cap
VDD_1V35
For DDR3
JP7
Header 1X2
JPR7
Jumper
VDDIODDR
1 2
For MPU
[15] 5V_EXT_INP
VDD_5V_IN D9
(replaced with 0R-1206 -see User Guide)
2 3
C165
4.7uF
Q7
DNP(IRLML6402)
R11
DNP(11K 1%)
R18
11K 1%
VIN_5V
VBAT
R21
R22
2.2M 1%
1.5M 1%
R24
DNP(3.9K 1%)
VDD_3V3
R27
2.43K 1%
33
21
20
U2
CHGIN
ACIN
LBI
C166
47nF
23
1
ISET
REFBP
ACT8945AQJ405-T
[7]
[8,15]
[8]
[8]
PMIC_CHGLEV_PA12
[9,10,12,14,15]
[7]
NRST
PMIC_IRQ_PB13
PMIC_LBO/EXP_PC8
PMIC_TWD0_PD21
PMIC_TWCK0_PD22
VSYS_5V nPBSTAT
R26
DNP(8.2K 1%)
C7
R16
R17
R20
100R 1%
100R 1%
100R 1%
VSYS_5V
DNP(1nF)
R30
22
11
12
13
19
27
26
CHGLEV nRSTO nIRQ nPBSTAT nLBO
SDA
SCL
R41
0R
DNP(0R)
25
VSEL
3
R8
68K
3
R15
100K
VSYS_5V
10
PWRHLD
[9] SHDN
1
Q2
BSS138 2
R9
1
Q1
BSS138 2
1K C10 100nF
C8
100nF
R12
100K
R13
49.9K 1%
1
Q3
BSS138
3
2
R14
TP14
SMD
49.9K 1%
TP11
SMD
9 nPBIN
R19
0R
VSYS_5V
VSYS1
VSYS2
VP1
VP2
VP3
INL
NC1 nSTAT
BAT1
BAT2
TH
31
32
39
35
16
6
40
28
29
30
24
R44
C163
10uF
C164
10uF
C176
10uF
100R 1%
VBAT 1
2
3
D1
J3
1X3Pin
RED
VSYS_5V
VBAT 1
2
C19
4.7uF
C167
100nF
J4
DNP(Header 1X2 2.00MM)
VDD_1V35
SW1
OUT1
38
2
L5 2.2uH
C20
10uF
C23
10uF
C24
100nF
VDD_1V2
SW2
OUT2
36
34
L6 2.2uH
C22
10uF
C37
10uF
C38
100nF
VDD_3V3
SW3
OUT3
15
17
L1 2.2uH
OUT4
OUT5
OUT6
OUT7
4
5
8
7
VDD_2V5
VDD_3V3
VDD_3V3
VDD_1V8
C169
4.7uF
C17
4.7uF
C3
10uF
C173
4.7uF
C2
10uF
R327
R330
C1
100nF
VDDFUSE
0R VDD_3V3_LP
VDD_LED
VDDSDHC1V8 0R
1
L3
2
180ohm at 100MHz
C13
4.7uF
WAKE UP RESET
Place TP11 and TP14 to Bottom.
VDD_1V2
R129
JP4
Header 1X2
JPR4
Jumper
VDDCORE
1 2
VDDPLLA
L12 10uH_150mA
2R2
VDDUTMIC
1
L18
2
180ohm at 100MHz
1
L16
2
180ohm at 100MHz
VDDHSIC
VDD_3V3
JP5
Header 1X2
JPR5
Jumper
1 2
VDDIOP2
1
L7
2
180ohm at 100MHz
1
L8
2
180ohm at 100MHz
1
L9
2
180ohm at 100MHz
1
L10
2
180ohm at 100MHz
VDDIOP1
VDDIOP0
VDDISC
VDD_3V3_LP
JP3
Header 1X2
JPR3
Jumper
1 2
R293
R284
R303
R300
VDDOSC
2R2
0R
0R
L20 10uH_150mA
VDDUTMII
1
L19
2
VDDANA 180ohm at 100MHz
1
L23
2
180ohm at 100MHz
VDDAUDIOPLL
2R2
L22 10uH_150mA
SAMA5D2C-XULT
Power Supply
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
XXX
XXX
XXX
XXX
XX-XXX-XX
C
4
15
D
C
B
A
5 4 3 2 1
A
D
C
B
Figure 7-4. SAMA5D27 – Power rotatethispage90
5 4 3
POWER TEST POINTS
VDDB_5V
VSYS_5V
VDD_1V35
VDD_1V2
VDD_3V3
VDDFUSE
VDD_3V3_LP
VDD_LED
VDDSDHC1V8
TP30 SMD
TP24 SMD
TP6 SMD
TP7 SMD
TP3 SMD
TP15 SMD
TP5 SMD
TP25 SMD
TP10 SMD
VDDCORE
VDDIODDR
VDDBU
VDDHSIC
VDDFUSE
VDDUTMIC
VDDUTMII
VDDSDHC
VDDOSC
VDDPLLA
TP22 SMD
TP12 SMD
TP17 SMD
TP16 SMD
TP23 SMD
TP18 SMD
TP20 SMD
TP9 SMD
TP21 SMD
TP8 SMD
TP26 SMD
TP13 SMD
TP19 SMD
VDDCORE
C28
10uF
(1V2)
C27
10uF
C143
100nF
C31
100nF
C108
100nF
C119
100nF
C29
100nF
C132
100nF
C30
1nF
C122
1nF
VDDCORE
C137
1nF
VDDIODDR
C70
10uF
(1V35)
C71
10uF
C80
100nF
C104
100nF
C88
100nF
C102
100nF
C101
100nF
C114
100nF
C105
1nF
C84
1nF
VDDIODDR
C97
1nF
VDDBU
(3V3) VDDBU
C134
100nF
VDDANA
(3V3)
C144
100nF
VDDANA
C136
100nF
VDDIOP0
(3V3)
C135
100nF
VDDIOP0
C131
100nF
VDDIOP1
(3V3)
C107
100nF
VDDIOP1
C103
100nF
VDDIOP2
(3V3) VDDIOP2
C120
100nF
VDDHSIC
(1V2) VDDHSIC
C118
100nF
VDDFUSE
(2V5) VDDFUSE
C111
100nF
VDDAUDIOPLL
(3V3) VDDAUDIOPLL
C148
4.7uF
C140
100nF
VDDUTMIC
(1V2) VDDUTMIC
C147
4.7uF
C133
100nF
VDDUTMII
(3V3) VDDUTMII
C125
100nF
VDDSDHC
(3V3 or 1V8) VDDSDHC
C110
100nF
VDDPLLA
(1V2) VDDPLLA
R131
1R 1%
C43
4.7uF
C45
100nF
VDDOSC
(3V3) VDDOSC
R269
1R 1%
C142
4.7uF
C128
100nF
VDDISC
(3V3) VDDISC
C138
100nF
All 100nF 0402 capacitors close to the the Pin of VDD***.
2 1
VDDCORE
U6G
(1V2) D7
D9
H3
K13
N5
N9
VDDCORE_1
VDDCORE_2
VDDCORE_3
VDDCORE_4
VDDCORE_5
VDDCORE_6
VDDIODDR (1V35) D11
D12
D15
E15
H15
J15
L15
VDDDDR_1
VDDDDR_2
VDDDDR_3
VDDDDR_4
VDDDDR_5
VDDDDR_6
VDDDDR_7
VDDBU
VDDANA
(3V3) N7
VDDBU
(3V3) K3
L5
VDDANA_1
VDDANA_2
VDDIOP0
VDDIOP1
VDDIOP2
(3V3) E6
F7
(3V3) N13
R14
(3V3) F10
VDDIOP0_1
VDDIOP0_2
VDDIOP1_1
VDDIOP1_2
VDDIOP2
VDDHSIC
VDDFUSE
(1V2)
(2V5)
R9
M12
VDDAUDIOPLL (3V3) T3
VDDHSIC
VDDFUSE
VDDAUDIOPLL
VDDUTMIC (1V2) P7
VDDUTMII (3V3) P8
VDDSDHC (3V3 or 1V8) P11
VDDPLLA (1V2) U4
VDDOSC
VDDISC
(3V3) T7
(3V3) F4
VDDUTMIC
VDDUTMII
VDDSDMMC
VDDPLLA
VDDOSC
VDDISC
GNDDPLL
GNDAUDIOPLL
T5
T4
GNDUTMIC
GNDUTMII
GNDSDMMC
GNDPLLA
GNDOSC
GNDISC
U5
T6
G4
R7
P9
R11
SAMA5D27C-CU (MRLC)
GNDCORE_1
GNDCORE_2
GNDCORE_3
GNDCORE_4
GNDCORE_5
GNDCORE_6
E7
E9
H4
K12
M5
M9
GNDDDR_1
GNDDDR_2
GNDDDR_3
GNDDDR_4
GNDDDR_5
GNDDDR_6
GNDDDR_7
D14
E11
E12
E14
H14
J14
L14
GNDBU
N6
GNDANA_1
GNDANA_2
L3
K5
GNDIOP0_1
GNDIOP0_2
GNDIOP1_1
GNDIOP1_2
GNDIOP2
F6
G7
M13
P14
F9
GNDUTMII
R264 0R A copper plan for GNDUTMII cover all USB compoments
GNDUTMII
SAMA5D2C-XULT
SAMA5D27- Power
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1
XXX
XXX
XXX
XXX
XX-XXX-XX
C
5
15
A
5 4 3 2
D
C
B
D
C
B
A
Figure 7-5. SAMA5D27 – DDR3 rotatethispage90
5 4 3 2 1
VDD_1V35
R242
100K
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_BA0
DDR_BA1
DDR_BA2
DDR_RAS
DDR_CAS
DDR_CLK+
DDR_CLK-
DDR_CKE
R243
100K
DDR_CS
DDR_WE
23.2K 1%
R250
F12
C17
B17
B16
C16
G14
F14
F11
C14
D13
C15
A16
A17
G11
H12
H13
F17
F13
G12
E17
D17
F16
G13
F15
E13
22pF
C106
U6E
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_BA0
DDR_BA1
DDR_BA2
DDR_RAS
DDR_CAS
DDR_CLK
DDR_CLKN
DDR_CKE
DDR_CS
DDR_WE
DDR_CAL
DDR_RESETN
DDR_VREF
C100
100nF
C99
100nF
E16
H16
D16
DDR_RESETN
DDR_VREFB0
DDR_VREFCM
SAMA5D27C-CU (MRLC)
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
DDR_DQS0
DDR_DQSN0
DDR_DQS1
DDR_DQSN1
DDR_DQS2
DDR_DQSN2
DDR_DQS3
DDR_DQSN3
B13
B14
J17
J16
C10
B10
L17
L16
K14
K15
B8
B9
C9
A9
A10
D10
G17
G16
H17
K17
K16
J13
B11
A11
J12
H10
J11
K11
L13
L11
L12
M17
B12
A12
C12
A13
A14
C13
A15
B15
C11
G15
C8
H11
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
DDR_DQS0+
DDR_DQS0-
DDR_DQS1+
DDR_DQS1-
DDR_DQS2+
DDR_DQS2-
DDR_DQS3+
DDR_DQS3-
100 ohms differential trace impedance
Routing top or bottom
DDR_RESETN
DDR_CLK+
DDR_CLK-
DDR_CKE
DDR_CS
DDR_RAS
DDR_CAS
DDR_WE
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
H3
H8
G2
H7
E3
F7
F2
F8
D7
C3
C8
C2
A7
A2
B8
A3
T2
U8
RESET#
J7
K7
K9
L2
J3
K3
L3
CK
CK#
CKE
CS#
RAS#
CAS#
WE#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DDR_DQS1+
DDR_DQS1-
C7
B7
UDQS
UDQS#
DDR_DQS0+
DDR_DQS0-
F3
G3
LDQS
LDQS#
DDR_DQM1
DDR_DQM0
D3
E7
UDM
LDM
VDD_1V35
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
NC1
NC2
NC3
NC4
DDR_VREF
C91
100nF
C72
100nF
M8
VREFCA
H1
VREFDQ
DDR_CLK+
MT41K128M16JT-125:K
R153
DNP(100R 1%)
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
A4
A5
A6
A7
A0
A1
A2
A3
N7
T3
T7
M7
T8
R3
L7
R7
M2
N8
M3
N3
P7
P3
N2
P8
P2
R8
R2
ODT
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
K1
B2
G7
R9
K2
K8
N1
N9
R1
D9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
ZQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
L8
DDR_CLK-
VDDIODDR
L14 10uH_150mA
VDD_1V35
C83
4.7uF
R182
1R 1%
C56
4.7uF
C55
100nF
C54
100nF
R181
6.8K 1%
DDR_VREF
R180
6.8K 1%
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
100 ohms differential trace impedance
Routing top or bottom
DDR_BA0
DDR_BA1
DDR_BA2
R179
R178
VDD_1V35
DNP(1K)
0R
VDD_1V35
DDR_RESETN
DDR_CLK+
DDR_CLK-
DDR_CKE
DDR_CS
DDR_RAS
DDR_CAS
DDR_WE
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
H3
H8
G2
H7
E3
F7
F2
F8
D7
C3
C8
C2
A7
A2
B8
A3
T2
U4
RESET#
J7
K7
K9
L2
J3
K3
L3
CK
CK#
CKE
CS#
RAS#
CAS#
WE#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DDR_DQS3+
DDR_DQS3-
C7
B7
UDQS
UDQS#
DDR_DQS2+
DDR_DQS2-
F3
G3
LDQS
LDQS#
DDR_DQM3
DDR_DQM2
D3
E7
UDM
LDM
VDD_1V35
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
NC1
NC2
NC3
NC4
R238
240R 1%
DDR_VREF
C145
100nF
C121
100nF
M8
H1
VREFCA
VREFDQ
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
A4
A5
A6
A7
A0
A1
A2
A3
N7
T3
T7
M7
T8
R3
L7
R7
M2
N8
M3
N3
P7
P3
N2
P8
P2
R8
R2
ODT
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
K1
B2
G7
R9
K2
K8
N1
N9
R1
D9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
ZQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
L8
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_BA0
DDR_BA1
DDR_BA2
R254
R258
VDD_1V35
VDD_1V35
DNP(1K)
0R
MT41K128M16JT-125:K
R124
240R 1%
C154
2.2uF
C98
2.2uF
C92
100nF
C113
100nF
C93
100nF
C150
100nF
C95
100nF
C96
100nF
C89
100nF
C76
100nF
C129
100nF
C126
100nF
C123
100nF
C149
100nF
C66
100nF
C115
100nF
C74
1nF
C82
1nF
VDD_1V35
C152
2.2uF
C124
2.2uF
C94
100nF
C112
100nF
C117
100nF
C139
100nF
C153
100nF
C146
100nF
C151
100nF
C90
100nF
C116
100nF
C65
100nF
C78
100nF
C77
100nF
C87
100nF
C68
100nF
C67
1nF
C141
1nF
Keep nets as short as possible, therefore, DDR devices have to be placed close as possible of SAMA5D27
The layout DDR should use controlled impedance traces of ZO= 50ohm characteristic impedance.
Address, control and data traces may not exceed 1.3 inches (33.0 mm).
Address, control and data traces must be length-matched to within 0.1 inch (2.54mm).
Address, control and data traces must match the data group trace lengths to within 0.25 inches (6.35mm).
SAMA5D2C-XULT
SAMA5D27- DDR3
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
5 4 3 2 1
XXX
XXX
XXX
XXX
XX-XXX-XX
C
6
15
A
D
C
B
A
B
D
C
Figure 7-6. SAMA5D27 – PIOA and PIOB rotatethispage90
5 4
U6A
T15
U17
P13
T16
R16
T17
R15
R17
M10
N17
U14
T14
P12
R13
U15
U16
N10
N11
U13
P15
N15
P16
M14
N16
U11
P10
T11
R10
U12
T12
R12
T13
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA08
PA09
PA10
PA11
PA12
PA13
PA14
PA15
PA00
PA01
PA02
PA03
PA04
PA05
PA06
PA07
SAMA5D27C-CU (MRLC)
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
SDHC0_CK_PA0
SDHC0_CMD_PA1
SDHC0_DAT0_PA2
SDHC0_DAT1_PA3
SDHC0_DAT2_PA4
SDHC0_DAT3_PA5
SDHC0_DAT4_PA6
SDHC0_DAT5_PA7
[13]
[13]
[13]
[13]
[13]
[13]
[13]
[13]
SDHC0_DAT6_PA8
SDHC0_DAT7_PA9
[13]
[13]
SDHC0_RSTN_PA10
SDHC0_VDDSEL_PA11
PMIC_CHGLEV_PA12
SDHC0_CD_PA13 [11]
[13]
[4]
[13]
QSPI0_IO3_PA27
SDHC1_CMD_PA28
[11]
USBB_OVCUR_PA29
SDHC1_CD_PA30
[13]
[10]
[13]
USBA_VBUS_5V_PA31 [10]
3
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA14
PA15
PA16
PA17
22R
22R
22R
22R
22R
22R
22R
22R
39R
39R
39R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
R154
R150
R159
R156
R143
R141
R145
R148
R163
R165
R161
R164
R162
R157
R160
R168
R166
R169
R167
R175
R177
R172
R170
R173
R171
R174
R176
2
SPI0_SPCK_PA14
EXP_PA14 [15]
SPI0_MOSI_PA15
EXP_PA15 [15]
SPI0_MISO_PA16
EXP_PA16 [15]
SPI0_NPCS0_PA17
EXP_PA17 [15]
[11]
[11]
[11]
[11]
SDHC1_DAT0_PA18
EXP_PA18 [15]
SDHC1_DAT1_PA19
EXP_PA19 [15]
[13]
[13]
SDHC1_DAT2_PA20
EXP_PA20 [15]
[13]
SDHC1_DAT3_PA21
EXP/XPRO_PA21 [15]
[13]
SDHC1_CK_PA22
QSPI0_SCK_PA22
EXP_PA22 [15]
[13]
[11]
QSPI0_CS_PA23 [11]
EXP/XPRO_PA23 [15]
QSPI0_IO0_PA24 [11]
EXP/XPRO_PA24 [15]
QSPI0_IO1_PA25
EXP_PA25 [15]
[11]
QSPI0_IO2_PA26
EXP_PA26 [15]
[11]
39R on PA22 close to MPU.
U6B
B1
C2
D3
D2
C1
A1
E5
B2
E4
H7
D5
C4
A3
D4
B3
A2
C3
C6
A5
A4
H8
B5
D6
B4
C5
J8
A8
A7
A6
B6
B7
C7
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB00
PB01
PB02
PB03
PB04
PB05
PB06
PB07
PB08
PB09
PB10
PB11
PB12
PB13
PB14
SAMA5D27C-CU (MRLC)
PB0
PB5
PB6
PB9
PB10
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
CLASSD_R0_PB1
CLASSD_R1_PB2
CLASSD_R2_PB3
CLASSD_R3_PB4
[11]
[11]
[11]
[11]
LCD_IRQ1_PB7
LCD_IRQ2_PB8
[10]
[10]
ISC_RST/EXP_PB11
ISC_PWD/EXP_PB12
PMIC_IRQ_PB13 [4]
[10,15]
[10,15]
ISC_D10/EXP_PB24
ISC_D11/EXP_PB25
ISC_D0/EXP_PB26
ISC_D1/EXP_PB27
ISC_D4/EXP_PB30
[10,15]
[10,15]
[10,15]
[10,15]
ISC_D2/EXP/XPRO_PB28
ISC_D3/EXP/XPRO_PB29
[10,15]
ISC_D5/EXP/XPRO_PB31
[10,15]
[10,15]
[10,15]
PB10
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB0
PB5
PB6
PB9
22R
22R
39R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
1K
22R
22R
22R
R267
R265
R49
R108
R61
R47
R72
R73
R84
R111
R85
R112
R87
R114
R86
R113
R88
R89
R82
R109
R275
R274
R83
R110
LED_BLUE_PB0
LCD_ID_PB0
[11]
[10]
LED_GREEN_PB5 [11]
EXP/XPRO_PB5 [15]
LED_RED_PB6 [11]
EXP/XPRO_PB6 [15]
USER_PB_PB9 [11]
EXP/XPRO_PB9 [15]
USBB_EN5V_PB10 [10]
EXP/XPRO_PB10 [15]
ETH_GTXCK_PB14 [12]
ETH_GTXEN_PB15 [12]
ETH_GRXDV_PB16
ETH_GRXER_PB17
[12]
[12]
ETH_GRX0_PB18 [12]
ETH_GRX1_PB19 [12]
ETH_GTX0_PB20 [12]
EXP_PB20 [15]
ETH_GTX1_PB21 [12]
EXP_PB21 [15]
ETH_GMDC_PB22 [12]
EXP_PB22 [15]
ETH_GMDIO_PB23
EXP_PB23 [15]
[12]
SAMA5D2C-XULT
SAMA5D27- PIOA & PIOB
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1
XXX
XXX
XXX
XXX
XX-XXX-XX
C
7
15
A
5 4 3 2
1
D
C
B
D
C
B
A
Figure 7-7. SAMA5D27 – PIOC and PIOD rotatethispage90
5 4 3 2 1
U6C
H1
H5
J9
H9
E8
G8
F8
D8
G6
F1
H6
G2
G3
G1
H2
G5
J10
D1
E3
E2
E1
F3
F5
F2
P17
N12
N14
M15
M11
L10
K10
M16
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC08
PC09
PC10
PC11
PC12
PC13
PC14
PC15
PC00
PC01
PC02
PC03
PC04
PC05
PC06
PC07
PC9
PC10
PC11
PC26
PC27
PC28
PC30
PC31
SAMA5D27C-CU (MRLC)
ISC_D6/EXP/XPRO_PC0
ISC_D7/SPI1_SPCK_PC1
ISC_D8/SPI1_MOSI_PC2
ISC_D9/SPI1_MISO_PC3
ISC_PCK/SPI1_NPCS0_PC4
ISC_VSYNC/EXP_PC5
ISC_HSYNC/EXP_PC6
ISC_MCK/EXP_PC7
PMIC_LBO/EXP_PC8
[10,15]
[4,15]
[10,15]
[10,15]
[10,15]
[10,15]
[10,15]
[10,15]
[10,15]
LCD_DAT4_PC12
LCD_DAT5_PC13
LCD_DAT6_PC14
LCD_DAT7_PC15
LCD_DAT10_PC16
LCD_DAT11_PC17
LCD_DAT12_PC18
LCD_DAT13_PC19
LCD_DAT14_PC20
LCD_DAT15_PC21
LCD_DAT18_PC22
LCD_DAT19_PC23
LCD_DAT20_PC24
LCD_DAT21_PC25
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
LCD_DISP_PC29 [10]
PC9
PC10
PC11
PC26
PC27
PC30
PC31
PC28
R288
R276
R285
R282
R279
R115
R304
R305
R90
R116
R289
R277
R272
10K
22R
22R
39R
39R
39R
22R
22R
22R
22R
22R
22R
22R
ETH_INT_PC9 [12]
LCD_DAT2_PC10
EXP_PC10 [15]
LCD_DAT3_PC11
EXP_PC11 [15]
LCD_DAT22_PC26
EXP_PC26 [15]
[10]
[10]
[10]
LCD_DAT23_PC27
EXP_PC27 [15]
LCD_VSYNC_PC30
LCD_HSYNC_PC31
[10]
[10]
[10]
LCD_PWM_PC28 [10]
D
C
U6D
L7
L6
N2
L8
M4
N3
L9
M7
L1
K2
J5
K6
M2
N1
L4
M3
J1
K9
J3
M1
K8
L2
K4
K7
J6
J4
J2
J7
G10
E10
G9
K1
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD08
PD09
PD10
PD11
PD12
PD13
PD14
PD15
PD00
PD01
PD02
PD03
PD04
PD05
PD06
PD07
PD0
PD1
PD4
PD5
PD14
PD15
PD16
PD17
PD19
PD20
PD21
PD22
SAMA5D27C-CU (MRLC)
DBGU_URXD1_PD2
DBGU_UTXD1_PD3
[9,14]
[9,14]
EXP_PD6 [15]
XPRO_PD7 [15]
XPRO_PD8 [15]
XPRO_PD9 [15]
XPRO_PD10 [15]
XPRO_PD11 [15]
EXP/XPRO_PD12
EXP/XPRO_PD13
[15]
[15]
XPRO_PD18 [15]
EXP_PD23
EXP_PD24
[15]
[15]
EXP/XPRO_PD25
EXP/XPRO_PD26
EXP/XPRO_PD27
EXP/XPRO_PD28
EXP/XPRO_PD29
EXP_PD30
EXP_PD31
[15]
[15]
[15]
[15]
[15]
[15]
[15]
4
PD0
PD1
PD14
PD15
PD16
PD17
R278
R291
R94
R93
R91
R92
R119
R120
R117
R118
39R
22R
100R 1%
330R
100R 1%
330R
100R 1%
330R
100R 1%
330R
LCD_PCK_PD0
LCD_DEN_PD1
[10]
[10]
JTAG_TCK_PD14 [9]
EDBG_JTAG_TCK_PD14 [14]
JTAG_TDI_PD15 [9]
EDBG_JTAG_TDI_PD15 [14]
JTAG_TDO_PD16 [9]
EDBG_JTAG_TDO_PD16 [14]
JTAG_TMS_PD17 [9]
EDBG_JTAG_TMS_PD17 [14]
PD19
PD20
R96
R95
R121
R122
DNP(0R)
22R
DNP(0R)
22R
LCD_AD0_XP_PD19
EXP_PD19 [15]
[10]
LCD_AD1_XM_PD20 [10]
EXP_PD20 [15]
R126
2.2K
PD21
VDD_3V3
R125
2.2K
R102
R107
R98
TWI0
22R
22R
22R
PD22
R101
R97
R106
22R
22R
22R
R306
2.2K
PD4
PD5
VDD_3V3
R309
2.2K
R307
R296
R286
R295
TWI1
22R
22R
22R
22R
R308
R297
R287
R298
22R
22R
22R
22R
LCD_AD2_YP_PD21
PMIC_TWD0_PD21
EXP_PD21 [15]
[10]
[4]
LCD_AD3_YM_PD22
PMIC_TWCK0_PD22
EXP_PD22 [15]
[10]
[4]
LCD_TWD1_PD4 [10]
EEPROM_TWD1_PD4
EXP_TWD1_PD4 [15]
ISC_TWD1_PD4 [10]
[11]
LCD_TWCK1_PD5 [10]
EEPROM_TWCK1_PD5
EXP_TWCK1_PD5
ISC_TWCK1_PD5
[15]
[10]
[11]
3 2
B
SAMA5D2C-XULT
SAMA5D27- PIOC & PIOD
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1
XXX
XXX
XXX
XXX
XX-XXX-XX
C
8
15
A
5
D
C
B
A
Figure 7-8. SAMA5D27 – SYS, Tamper, and Debug rotatethispage90
5 4 3 2 1
5
R138 DNP(1M)
XIN
XOUT
SYS
PIOBU0
PIOBU2
PIOBU4
PIOBU6
RXD
R76
R77
R78
R79
R80
ACP R81
C48
27pF
C41
22pF
1
2
Y4
4
3
12MHz CL=15pF
R103
330R
330R
330R
330R
0R
0R
9
11
13
5
7
1
3
J12
DNP(1M)
32.768KHz CL=12.5pF
4 1
3 2
Y3
6
8
2
4
10
12
14
R132
R133
R134
R135
R136
0R
C47
27pF
XOUT32
XIN32
C40
22pF
330R
330R
330R
330R
0R
PIOBU1
PIOBU3
PIOBU5
PIOBU7
R137 ACN
Routing top or bottom
[4,9,10,12,14,15] NRST
[4]
[4]
SHDN
WKUP
VDDBU
R128
R281
R127
XIN
XOUT
XIN32
XOUT32
U7
U6
U6F
XIN
XOUT
P1
P2
XIN32
XOUT32
DNP(10K)
R1
P4
T2
SHDN
WKUP
JTAGSEL
0R
10K
U2
P3
NRST
TST
HHSDPA
HHSDMA
T8
R8
HHSDPB
HHSDMB
HSIC_DATA
HSIC_STRB
VBG
U8
U9
T9
U10
R6
ACP
ACN
T1
U1
[15]
VDDANA
AREF
[15]
R270
R268
R256
C109
CLK_AUDIO
0R
20K 1%
22pF
RXD
DNP(0R)
T10
N4
U3
M6
SDCAL
RXD
CLK_AUDIO
ADVREFP
PIOBU0
PIOBU1
PIOBU2
PIOBU3
PIOBU4
PIOBU5
PIOBU6
PIOBU7
C130
100nF SAMA5D27C-CU (MRLC)
R3
N8
R2
R5
R4
P5
P6
M8
Top/Bot
Top/Bot
Top/Bot
Top/Bot
Top/Bot
Top/Bot
ACP
ACN
PIOBU0
PIOBU1
PIOBU2
PIOBU3
PIOBU4
PIOBU5
PIOBU6
PIOBU7
DNP(Header 2X7)
USBA_DP
USBA_DM
[10]
[10]
USBB_DP
USBB_DM
[10]
[10]
HSIC_DATA
HSIC_STRB
[10]
[10]
C127
10pF
R263
5.62K 1%
GNDUTMII
R&C as close as possible
VDD_5V_IN
R100
10K
R123
R105
47K
100R 1%
VDD_5V_IN
R152 1K
ACP
C51
100nF
U7
TLV431A
(1.24V) R146 100R 1% ACN
1
R155
0R
R158
DNP(0R)
VDD_3V3
JTAG_TCK_PD14 R99
VDD_3V3
DNP(0R)
J11
5
7
1
3
9
Header 2X5
6
8
2
4
10
R104
100K
R75
100K
R74
100K
JTAG
JTAG_TMS_PD17 [8]
JTAG_TCK_PD14 [8]
JTAG_TDO_PD16 [8]
JTAG_TDI_PD15 [8]
NRST [4,9,10,12,14,15]
4
Routing USB
Max trace-length mismatch between USB signals pairs should be no greater than 3.8mm
90 ohms differential trace impedance
Routing HSIC
Routing HSIC Refers to Specif
VDD_3V3
VDD_3V3 VSYS_5V
[8,14] DBGU_UTXD1_PD3
DBGU_OE 1
2
U21
VCC
5
4
VDD_3V3
3
GND
NL17SZ126DFT2G
C170
100nF
[8,14] DBGU_URXD1_PD2
C177
100nF
DBGU_TXD
5
VCC
U20
4
GND
NL17SZ126DFT2G
3
1
2
DBGU_OE
DBGU_RXD
DEBUG
DBGU_CTS
DBGU_TXD
DBGU_RXD
DBGU_RTS
TP27 SMD
TP28 SMD
R336
R344
DNP(0R)
DNP(0R)
DBGU_CTS
DBGU_RTS
VDD_3V3
R340 JP2
Header 1X2
JPR2
Jumper
10K
DBGU_OE
1 2
DBGU_DIS
3
4
1
2
5
6
J1
Header 1X6
SAMA5D2C-XULT
SAMA5D27- SYS & JTAG & DBUG
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1
XXX
XXX
XXX
XXX
XX-XXX-XX
C
9
15
A
3 2
B
D
C
D
C
B
A
Figure 7-9. USB, ISC, and LCD rotatethispage90
5 4 3 2 1
[7,15]
[8,10,15]
[8,10,15]
[7,15]
[7,15]
[7,15]
ISC_D5/EXP/XPRO_PB31
ISC_D7/SPI1_SPCK_PC1
ISC_D9/SPI1_MISO_PC3
ISC_D11/EXP_PB25
ISC_D1/EXP_PB27
ISC_D3/EXP/XPRO_PB29
VDD_3V3
R130
[7,15]
[8]
ISC_RST/EXP_PB11
ISC_TWCK1_PD5
R224
R220
R216
R208
R191
R188
0R
22R
22R
22R
22R
22R
22R
ISC
17
19
21
23
25
27
29
9
11
13
15
5
7
1
3
J18
18
20
22
24
26
28
30
10
12
14
16
6
8
2
4
R259
R251
R246
R239
R228
R223
R221
R215
R207
R190
Header 2X15
39R
39R
39R
39R
22R
22R
22R
22R
22R
22R
The signal ISC[D11-0], ISC_VSYNC, ISC_HSYNC, ISC_PCK, ISC_MCK on connector J18 are connected trough serial resistor 22R from J17.
Like: MPU (ISC) -> J17 -> 22R -> J18
ISC_PWD/EXP_PB12
ISC_TWD1_PD4
ISC_MCK/EXP_PC7
[8]
ISC_VSYNC/EXP_PC5
ISC_HSYNC/EXP_PC6
[7,15]
[8,15]
[8,15]
[8,15]
ISC_PCK/SPI1_NPCS0_PC4
ISC_D4/EXP_PB30 [7,15]
ISC_D6/EXP/XPRO_PC0
[8,10,15]
ISC_D8/SPI1_MOSI_PC2
ISC_D10/EXP_PB24
ISC_D0/EXP_PB26
[7,15]
[7,15]
[8,15]
[8,10,15]
ISC_D2/EXP/XPRO_PB28 [7,15]
USB A
9
10
R183
C57
20pF
100K
R184
200K
VBUS
DM
DP
ID
GND
3
4
1
2
5
J23
MicroUSB AB Connector
USBA_DM [9]
USBA_DP [9]
EARTH_USB_A
USBA_VBUS_5V [4]
USBA_VBUS_5V_PA31 [7]
L15
180ohm at 100MHz
1 2
L17
EARTH_USB_A
180ohm at 100MHz
1 2
EARTH_USB_B
[8,10,15]
[8] LCD_AD3_YM_PD22
ISC_PCK/SPI1_NPCS0_PC4
[8]
[8,10,15]
[8]
[8,10,15]
LCD_AD2_YP_PD21
ISC_D9/SPI1_MISO_PC3
LCD_AD1_XM_PD20
ISC_D8/SPI1_MOSI_PC2
[8]
[8,10,15]
LCD_AD0_XP_PD19
ISC_D7/SPI1_SPCK_PC1
USB C
J15
DNP(Header 1X2 2.54MM)
1
2
HSIC_DATA
HSIC_STRB
[9]
[9]
R39
R231
R38
R213
R37
R219
R36
R222
DNP(0R)
22R
DNP(0R)
22R
DNP(0R)
22R
DNP(0R)
39R
VDDB_5V VDD_3V3
R335
R347
[4,9,12,14,15] NRST
R40
[8]
[7]
[7]
[8]
[8]
[8]
LCD_PWM_PC28
LCD_IRQ2_PB8
LCD_IRQ1_PB7
LCD_TWCK1_PD5
LCD_TWD1_PD4
LCD_DISP_PC29
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
LCD_DEN_PD1
LCD_HSYNC_PC31
LCD_VSYNC_PC30
LCD_PCK_PD0
LCD_DAT23_PC27
LCD_DAT22_PC26
LCD_DAT21_PC25
LCD_DAT20_PC24
LCD_DAT19_PC23
LCD_DAT18_PC22
[8]
[8]
[8]
[8]
[8]
[8]
LCD_DAT15_PC21
LCD_DAT14_PC20
LCD_DAT13_PC19
LCD_DAT12_PC18
LCD_DAT11_PC17
LCD_DAT10_PC16
[8]
[8]
[8]
[8]
[8]
[8]
LCD_DAT7_PC15
LCD_DAT6_PC14
LCD_DAT5_PC13
LCD_DAT4_PC12
LCD_DAT3_PC11
LCD_DAT2_PC10
[7]
[14]
LCD_ID_PB0
EDBG_ID_01
R42
R28
DNP(0R)
0R
0R
(LCDPWM)
(IRQ2)
(IRQ1)
(TWI_SCL)
(TWI_SDA)
(LCDDISP)
(LCDDEN)
(LCDHSYNC)
(LCDVSYNC)
(LCDPCK)
(LCDDAT23)
(LCDDAT22)
(LCDDAT21)
(LCDDAT20)
(LCDDAT19)
(LCDDAT18)
(LCDDAT17)
(LCDDAT16)
(LCDDAT15)
(LCDDAT14)
(LCDDAT13)
(LCDDAT12)
(LCDDAT11)
(LCDDAT10)
(LCDDAT9)
(LCDDAT8)
(LCDDAT7)
(LCDDAT6)
(LCDDAT5)
(LCDDAT4)
0R
(LCDDAT3)
(LCDDAT2)
(LCDDAT1)
(LCDDAT0)
(ID_SYS)
DNP(330R)
LCD
J2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
52
51
50 Pin FPC Connector
USB B
5
SH1
A
VBUS
DM
DP
GND
3
4
1
2
SH2
6
J13
Single USB Type A
USBB_VBUS_5V
USBB_DM
USBB_DP
[9]
[9]
USBB_VBUS_5V
C156
100nF
C157
10uF
L21
180ohm at 100MHz
1 2
VDDB_5V
C155
100nF
8
6
U16
OUT_2
OUT_1
EN
FLG
1
2
7
5
IN_2
IN_1
GND
NC
3
4
SP2525A-1EN-L
R301
10K
EN: Active High
USBB_EN5V_PB10
USBB_OVCUR_PA29
[7]
[7]
MH1
PTH
MH2
PTH
MH3
PTH
MH4
PTH
Through Holes
EARTH_USB_B
SAMA5D2C-XULT
ISC & USB & LCD
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1
D
C
B
XXX
XXX
XXX
XXX
XX-XXX-XX
C
10
15
A
5 4 3 2
D
C
B
A
Figure 7-10. Serial Flash, LEDS, Push Button and ClassD rotatethispage90
5 4
EEPROM_WP
VDD_3V3
R316
0R
EEPROM
1
2
A0
U18
VCC
8
3
A1
A2
WP
SCL
7
6
4
GND SDA
5
AT24MAC402-MAHM-T
VDD_3V3
C161 100nF
EEPROM_WP
EEPROM_TWCK1_PD5
EEPROM_TWD1_PD4
[8]
[8]
[7] QSPI0_IO0_PA24
[7]
[7]
QSPI0_IO1_PA25
QSPI0_IO2_PA26
[7] QSPI0_IO3_PA27
QSPI Flash
5
2
3
7
U10
SI/SIO0 VCC
8
SO/SIO1 GND
4
SIO2 CS#
1
SIO3 SCLK
MX25L25673GM2I-08G
6
VDD_3V3
C52
100nF
QSPI0_CS
QSPI0_SCK_PA22 [7]
SPI Flash
[7]
[7]
[7]
SPI0_MOSI_PA15
SPI0_MISO_PA16
SPI0_SPCK_PA14
SPI0_CS0_PA17
5
2
6
1
U9
SI
SO
SCK
VCC
WP
HOLD
CS
GND
AT25DF321A
8
3
7
4
VDD_3V3
C53
100nF
QSPI & eMMC & SPI Flash CS
JPR9
Jumper
[7] QSPI0_CS_PA23
JP9
Header 1X2
1 2
BOOT_DIS
[7] SPI0_NPCS0_PA17
R226
10K
C63
100nF
1
2
3
GND
U15
VCC
5
4
R227
NL17SZ126DFT2G
100R 1%
C62
100nF
1
2
3
GND
U14
VCC
5
4
NL17SZ126DFT2G
VDD_3V3
R218
10K
QSPI0_CS
QSPI Flash CS
R217
10K
SPI0_CS0_PA17
SPI Flash CS
1
VDD_3V3
3
R230
10K
2
Q6
BSS138
SDHC0_CD_PA13 eMMC Flash CS
[7]
3 2 1
VSYS_5V
R62
0R
[7]
[7]
CLASSD_R0_PB1
CLASSD_R1_PB2
R311 22R C158 10nF
R315 22R
D7
1N4148W
5 G2
PMOS
S2
4
D2
D1
3
6
2 G1
S1
NMOS
U17 DMC2400UV
1
Class D
[7]
[7]
CLASSD_R2_PB3
CLASSD_R3_PB4
R322 22R C159 10nF
R324 22R
D8
1N4148W
5 G2
PMOS
S2
4
D2 3
D1
6
2 G1
S1
NMOS
U19 DMC2400UV
1
R71 0R
180ohm at 100MHz
1
L25
2 Right P
1
L26
2 Right N
180ohm at 100MHz
3
4
1
J5
2
[7] LED_RED_PB6
[7] LED_GREEN_PB5
[7] LED_BLUE_PB0
LED
R326
R325
R328
470R
470R
470R
1
Red
4
Green
3
Blue
D2
Anode
2
RGB LED
VDD_LED
[7] USER_PB_PB9
TP29
SMD
BP1 Tact Switch
Place TP to Bottom
USER BUTTON
SAMA5D2C-XULT
Flash & Audio & LED
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1
XXX
XXX
XXX
XXX
XX-XXX-XX
C
11
15
A
2
B
5 4 3
D
C
Figure 7-11. Ethernet rotatethispage90
5 4 3 2 1
A
D
B
C
EARTH_ETH
VDD_3V3
R314
R317
1 TX+
J6
2 TX-
3 RX+
6 RX-
4
75
5
13
14
7
8
15
16
75
Right yellow LED
470R
470R
RJ45 Connector
75 75
1nF
Left Green LED
TD+ 1
CT 4
TD2
RD+ 3
CT 5
RD6
NC 7
8
C160
100nF
GND_ETH
100 ohms differential trace impedance
Routing top or bottom
C162
100nF
EARTH_ETH
ACT
LINK
ETH_LED1
ETH_LED0
TX+
TX-
RX+
RX-
R33
10K
ETH_LED0
ETH_LED1
VDD_3V3
VDD_3V3
TX+ top/bot
TXtop/bot
RX+ top/bot
7
TXP
6
TXM
5
RXP
RXtop/bot 4
RXM
C16
C18
6.49K 1%
2.2uF
100nF
R70
2
VDD_1V2
1
33
22
26
27
10
GND
PADDLE
TXC
TXD2
TXD3
REXT
Ethernet
10Base-T/100Base-TX
U3
RXC/B-CAST_OFF
TXD1
TXD0
TXEN
RXD3/PHYAD0
RXD2/PHYAD1
RXD1/PHYAD2
RXD0/DUPLEX
RXDV/CONFIG2
RXER/ISO
CRS/CONFIG1
COL/CONFIG0
19
14
15
16
18
25
24
23
13
20
29
28
R45
1K
R69
1K
MDC
MDIO
INTRP/NAND
12
11
21
VDDA_3V3
3
VDDA_3V3
L2 VDD_3V3
180ohm at 100MHz
1 2
C12
10uF
C21
100nF
R34
10K
ETH_XO
ETH_XI
8
9
XO
XI
30
31
LED0/NWAYEN
LED1/SPEED
VDDIO
17
C36
10uF
C25
100nF
RESET
32 R35 0R
NRST [4,9,10,14,15]
KSZ8081RNB
L24
180ohm at 100MHz
1 2 R321
EARTH_ETH
0R
GND_ETH
C34 22pF ETH_XI
Y2 R64
DNP(1M)
C35
22pF
25MHz CL=20pF
ETH_XO
At the De-Assertion of Reset:
PHY ADD[2:0]-pin15/14/13: 001 = 1
CONFIG[2:0]-pin18/29/28:001,RMII mode
Duplex Mode-pin16: 1,Half Duplex
Isolate Mode-pin20: 0,Disable
Speed Mode-pin31: 1,100Mbps
Nway Auto-Negotiation-p30: 1,Enable
ETH_GTXCK_PB14 [7]
ETH_GTX1_PB21 [7]
ETH_GTX0_PB20 [7]
ETH_GTXEN_PB15 [7]
ETH_GRX1_PB19 [7]
ETH_GRX0_PB18 [7]
ETH_GRXDV_PB16
ETH_GRXER_PB17
[7]
[7]
ETH_GMDC_PB22 [7]
ETH_GMDIO_PB23
ETH_INT_PC9 [8]
[7]
D
C
B
SAMA5D2C-XULT
Ethernet_10/100M
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1
XXX
XXX
XXX
XXX
XX-XXX-XX
C
12
15
A
5 4 3 2
Figure 7-12. SD and eMMC rotatethispage90
5 4 3 2 1
VDDSDHC
VDD_3V3 VDDSDHC
(3V3 or 1V8)
D
C
B
VDD_3V3 VDDSDHC1V8
[7] SDHC0_VDDSEL_PA11
R225
10K
4
1
6
S2
S1
IN
VDD_3V3
R210
R212
DNP(0R)
DNP(0R)
C86
100nF
D
5 R211
U13
ADG849
VDDSDHC
0R
IN=0: S1 Closed
IN=1: S2 Closed
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
SDHC0_DAT0_PA2
SDHC0_DAT1_PA3
SDHC0_DAT2_PA4
SDHC0_DAT3_PA5
SDHC0_DAT4_PA6
SDHC0_DAT5_PA7
SDHC0_DAT6_PA8
SDHC0_DAT7_PA9
SDHC0_CMD_PA1
SDHC0_CK_PA0
SDHC0_RSTN_PA10
VDDSDHC
(3V3 or 1V8)
C61
2.2uF
C81
100nF
VDD_3V3
(3V3)
C73
2.2uF
C69
100nF
Placement and Routing: Refers to technical guide TN-FC-35: e¡¤MMC PCB Design
Guide
R140 39R
R235
DNP(47K)
47K pull down on SDHC0_CMD_PA1 close to MPU.
39R on SDHC0_CK_PA0 close to MPU.
N3
P10
N1
M14
M13
M12
M11
M10
M9
M8
M7
P11
P12
P13
M3
M2
M1
L14
L13
L12
K6
N6
E5
N9
N8
N7
J12
P14
A10
A11
A12
A13
A14
B1
B7
G1
L3
L2
L1
K14
K13
K12
A3
A4
A5
B2
B3
B4
B5
B6
M5
M6
K5
NC123
NC122
NC121
NC120
NC119
NC118
NC117
NC116
NC115
NC114
NC113
NC112
NC111
NC110
NC109
NC108
NC107
NC106
NC105
NC104
NC103
NC102
NC101
NC100
NC99
NC98
NC97
NC96
NC95
NC94
NC93
NC92
NC91
NC90
NC89
NC88
NC87
NC86
NC85
NC84
NC83
NC82
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
CMD
CLK
RST
VDD_3V3
VDD_3V3 R214
0R
Impedance match of
CLK/CMD/DAT[7:0] 50R
U11 MTFC4GLDEA-0M WT eMMC - SDHC0
A
[7]
[7]
[7]
SDHC1_CD_PA30
SDHC1_DAT1_PA19
SDHC1_DAT0_PA18
[7] SDHC1_CK_PA22
[7]
[7]
[7]
SDHC1_CMD_PA28
SDHC1_DAT3_PA21
SDHC1_DAT2_PA20
(MCI1_CD)
(MCI1_DA1)
(MCI1_DA0)
(MCI1_CK)
(MCI1_CDA)
(MCI1_DA3)
(MCI1_DA2)
5
C64
10uF
C75
100nF
J19
2
1
4
3
9
6
5
8
7
SD Card Connector
SD/MMCPlus CARD INTERFACE - SDHC1
13
12
11
10
16
15
14 0R R249
(SDHC1_WP)
4 3 2
SAMA5D2C-XULT
SD & eMMC
F10
C10
F12
F13
F14
C9
C8
C7
C5
C3
C1
D14
E14
F1
F2
F3
A9
B14
C14
C13
C12
C11
E1
E2
E3
A2
A6
A7
A8
E8
E9
E10
A1
E12
E13
D13
D12
D4
D3
G12
G13
G14
H1
H2
H3
D2
H5
D1
B13
B12
B11
B10
B9
H12
NC24
NC25
NC26
NC27
NC28
NC29
NC30
NC31
NC32
NC33
NC34
NC35
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC36
NC37
NC38
NC39
NC40
NC41
NC42
NC43
NC44
NC45
NC46
NC47
NC48
NC49
NC50
NC51
NC52
NC53
NC54
C85
1uF
C79
100nF
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1
D
C
B
XXX
XXX
XXX
XXX
XX-XXX-XX
C
13
15
A
D
C
B
A
Figure 7-13. EDBG rotatethispage90
5 4 3 2 1
VDD_3V3
C14
20pF
R29 DNP(1M)
EDBG_XIN
EDBG_XOUT
1
2
Y1
4
3
12MHz CL=15pF
C11
20pF
[15]
[15]
EDBG_ID_03
EDBG_ID_02
EDBG_ID_01
EDBG_ID_02
EDBG_ID_03
EDBG_ID_04
EDBG_ID_05
EDBG_ID_06
EDBG_ID_07
EDBG_DGI_TWD
EDBG_DGI_TWCK
EDBG_TWI
TP4
SMD
ERASE
VSYS_5V
R2
200K
[8,9]
[8,9]
DBGU_UTXD1_PD3
DBGU_URXD1_PD2
[15]
[15]
[15]
[15]
R3
100K
EDBG_ADC0
[15]
[15]
EDBG_DGI_GPIO0
EDBG_DGI_GPIO1
EDBG_DGI_GPIO2
EDBG_DGI_GPIO3
TP1
SMD
TP2
SMD
EDBG_DGI_TWD
EDBG_DGI_TWCK
[10] EDBG_ID_01
[4,9,10,12,14,15] NRST
EDBG_USB_VBUS_5V
EDBG_USB_DM
EDBG_USB_DP
R4
R5
R23
R25
330R
330R
R46
EDBG_CDC_UART_RX
EDBG_CDC_UART_TX
EDBG_DGI_SDA
EDBG_FORCE_BOOT
Force s/n
R329 0R
EDBG_DGI_SCL
330R
C10
C9
G7
K7
J7
E7
H9
K10
G8
G10
E1
F9
E9
G9
E8
H10
F8
D8
H6
G6
J10
F7
A2
A1
B4
A4
C2
PA00 / PA18
PA01 / PA17
PA02 / PX47
PA03
PA04
PA05
PA06 / PA13
PA07 / PA19
PA08
PA09
PA10
PA11
PA12 / PA25
PA14 / PX11
PA15 / PX45
PA16
PA20 / PX18
PA21 / PX22
PA22 / PX20
PA23 / PX46
PA24 / PX17
PA26 / PB05
PA27
PA28
PA29
PA30
PA31
39R
39R
EDBG_USB_HS_DM
EDBG_USB_HS_DP
EDBG_USB_FS_DM
EDBG_USB_FS_DP
A10
A9
A8
B9
B8
C7
USB_VBUS
DMHS
DPHS
DMFS
DPFS
USB_VBIAS
9
10
VBUS
DM
DP
ID
GND
3
4
1
2
5
L13
180ohm at 100MHz
1
C49
1nF
U5
2
C50
1nF
U1
AT32UC3A4256HHB-C1UR ( AT32UC3A4256J-C1UR, Factory Programmed )
R10
6.8K 1%
C9
10pF
VDD_3V3
L4
180ohm at 100MHz
1 2
EDBG_USB_VBUS_5V
EDBG_USB_DM
EDBG_USB_DP
[4]
C15
VDD_3V3
100nF
C6
2.2uF
VDD_3V3
C5
1nF
C168
2.2uF
VDD_3V3
C175
100nF
(3V3)
J14
MicroUSB AB Connector
EARTH_USB_EDBG
L11
180ohm at 100MHz
1 2
C179
2.2uF
C171
2.2uF
C178
100nF
C172
100nF
C174
100nF
PRTR5V0U2X
EARTH_USB_EDBG
EDBG_JTAG_TCK_PD14 [8]
EDBG_JTAG_TDO_PD16 [8]
EDBG_JTAG_TMS_PD17 [8]
EDBG_JTAG_TDI_PD15 [8]
EDBG
EDBG_JTAG_TCK
EDBG_JTAG_TDO
EDBG_JTAG_TMS
EDBG_JTAG_TDI
5
7
1
3
9
JTAG
J10
VDD_3V3
6
8
2
4
10
EDBG_RESET_N
DNP(Header 2X5)
D4
RED
VDD_3V3
D3
BLUE
E3
E4
D2
D1
D3
K4
D4
F1
G4
G2
G3
J1
H1
G1
F3
F4
H2
K1
J2
H4
J3
K2
K3
J4
G5
H5
PX08
PX09
PX10
PX12
PX13
PX15 / PX32
PX16 / PX53
PX19 / PX59
PX00
PX01
PX02
PX03
PX04
PX05
PX06
PX07
PX21
PX23
PX24
PX25
PX26
PX27
PX28
PX29
PX30
PX31
EDBG_ID_06 [15]
EDBG_ID_07 [15]
EDBG_ID_05
EDBG_ID_04
[15]
[15]
STATUS_LED_CTRL
TARGET_RESET_SENSE R50
1
0R
3 3
2
Q4
BSS138 1
R53
100K
2
Q5
BSS138
NRST [4,9,10,12,14,15]
EDBG_SPI_MISO
EDBG_SPI_MOSI
EDBG_SPI_SCK
EDBG_SPI_NCS
[15]
[15]
[15]
[15]
TCK
TDI
TDO
TMS
RESET_N
K9
K8
J8
H7
J9
EDBG_JTAG_TCK
EDBG_JTAG_TDI
EDBG_JTAG_TDO
EDBG_JTAG_TMS
EDBG_RESET_N
JPR1
Jumper
JP1
Header 1X2
VDD_3V3
R1
10K
EDBG_RESET_N
1 2
EDBG_DIS
C4
100nF
SAMA5D2C-XULT
EDBG
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1
D
C
B
XXX
XXX
XXX
XXX
XX-XXX-XX
C
14
15
A
5 4 3 2
D
C
B
A
Figure 7-14. Expansion and XPRO Connectors rotatethispage90
5 4 3 2 1
VDD_3V3
[4,9,10,12,14] NRST
[4] 5V_EXT_INP
R310 100R 1%
7
8
5
6
3
4
1
2
J7
Socket 1X8
J20
8
7
6
5
4
3
2
1
10
9
Socket 1X10
R194
R193
R196
R195
0R
DNP(330R)
0R
DNP(330R)
R198
R197
0R
DNP(330R)
ISC_D6/EXP/XPRO_PC0
EDBG_DGI_TWCK [14]
[8,10,15]
ISC_D5/EXP/XPRO_PB31
EDBG_DGI_TWD [14]
AREF [9]
EXP/XPRO_PD25 [8,15]
EXP/XPRO_PD27 [8,15]
EXP/XPRO_PD26 [8,15]
EXP/XPRO_PD28 [8,15]
EDBG_SPI_NCS [14]
EXP/XPRO_PB5 [7,15]
EXP/XPRO_PB6 [7,15]
[7,10,15]
Expansion
Boards
Connectors VDD_3V3 5V_EXT_INP
[8,15]
[14]
[8,15]
[14]
EXP/XPRO_PD27
EDBG_SPI_MISO
EXP/XPRO_PD25
EDBG_SPI_SCK
NRST
SPI1_MISO 0R
DNP(330R)
SPI1_SPCK 0R
DNP(330R)
100R 1%
R247
R248
R260
R257
R261
1
3
5
J16
2
4
6
Header 2X3
R252
R253
0R SPI1_MOSI
DNP(330R)
EXP/XPRO_PD26 [8,15]
EDBG_SPI_MOSI [14]
D
[7]
[8]
[8]
[8]
[8]
[8]
[8]
[8]
EXP_PA16
EXP_PD19
EXP_PD20
EXP_PD23
EXP_PD21
EXP_PD22
EXP_PD24
EXP_PD30
7
8
5
6
3
4
1
2
J8
Socket 1X8
J21
7
8
5
6
3
4
1
2
Socket 1X8
R200
R199
R202
R201
0R
DNP(330R)
0R
DNP(330R)
R203
R204
R206
R205
0R
DNP(330R)
0R
DNP(330R)
EXP/XPRO_PB9 [7,15]
EXP_PA19 [7,15]
EDBG_DGI_GPIO0 [14]
EXP_PA20 [7]
EDBG_DGI_GPIO1 [14]
EXP/XPRO_PD29 [8,15]
EXP/XPRO_PB10 [7,15]
EDBG_DGI_GPIO2 [14]
EXP/XPRO_PA21 [7,15]
EDBG_DGI_GPIO3 [14]
EXP/XPRO_PD12 [8,15]
EXP/XPRO_PD13 [8,15]
[4,8,15]
[7,15]
[7]
EXP_PA19
EXP_PA17
[7] EXP_PA18
PMIC_LBO/EXP_PC8
[8]
[8,15]
[8]
[8]
EXP_PC27
EXP_PC26
EXP_PC11
EXP_PC10
[7,10,15]
[7,10,15]
[7,10,15]
[8,10]
[8,10]
[8]
[7]
EXP_PD6
EXP_PA15
ISC_D5/EXP/XPRO_PB31
[7] EXP_PB20
ISC_D1/EXP_PB27 [7,10]
ISC_D3/EXP/XPRO_PB29
ISC_D5/EXP/XPRO_PB31
ISC_D7/SPI1_SPCK_PC1
[7]
[7]
EXP_PA22
EXP_PA26
ISC_D8/SPI1_MOSI_PC2
[9] CLK_AUDIO
[8,10] ISC_VSYNC/EXP_PC5
[7,10]
[8,10]
ISC_RST/EXP_PB11
ISC_MCK/EXP_PC7
[14] EDBG_ID_04
[7,10] ISC_D10/EXP_PB24
[14] EDBG_ID_06
[8] EXP_PD31
R266
R262
22R
DNP(22R)
R271
R273
R290
R283
0R
DNP(0R)
0R
DNP(0R)
7
8
5
6
3
4
1
2
J9
Socket 1X8
J22
7
8
5
6
3
4
1
2
Socket 1X8
5V_EXT_INP
J17
25
27
29
31
17
19
21
23
33
35
9
11
13
15
5
7
1
3
Socket 2X18
26
28
30
32
18
20
22
24
34
36
10
12
14
16
6
8
2
4
R294
R292
R302
R299
0R
DNP(0R)
0R
DNP(0R)
EXP/XPRO_PA24 [7,15]
EXP/XPRO_PA23 [7,15]
ISC_D2/EXP/XPRO_PB28
ISC_D3/EXP/XPRO_PB29
EXP_PB23 [7]
EXP_PB22 [7]
EXP_TWD1_PD4
EXP_TWCK1_PD5
[8]
[8]
[7,10,15]
[7,10,15]
EXP_PA14 [7]
ISC_D4/EXP_PB30 [7,10,15]
ISC_D6/EXP/XPRO_PC0
EXP_PB21 [7]
ISC_D0/EXP_PB26 [7,10]
ISC_D2/EXP/XPRO_PB28
[8,10,15]
[7,10,15]
ISC_D4/EXP_PB30 [7,10,15]
ISC_D6/EXP/XPRO_PC0 [8,10,15]
EXP_PA25 [7]
ISC_D9/SPI1_MISO_PC3
ISC_HSYNC/EXP_PC6
[8,10]
[8,10]
ISC_PCK/SPI1_NPCS0_PC4
ISC_PWD/EXP_PB12 [7,10]
[8,10]
ISC_D11/EXP_PB25
EDBG_ID_05 [14]
PMIC_LBO/EXP_PC8
EDBG_ID_07 [14]
EXP_PC26 [8,15]
[7,10]
[4,8,15]
[7,10,15]
[14]
[8]
[8,15]
[7,15]
[8,15]
EDBG_ID_02
XPRO_PD11
EXP/XPRO_PD13
EXP/XPRO_PB9
EXP/XPRO_PD13
ISC_D5/EXP/XPRO_PB31
[7,15]
[8,15]
[8,15]
EXP/XPRO_PA23
EXP/XPRO_PD28
EXP/XPRO_PD27
5V_EXT_INP
VSYS_5V
XPRO Power
J24
1
3
2
4
Header 2X2
VDD_3V3
I D
ADC(+)
GPIO
PWM(+)
IRQ/GPIO
TWI_SDA
UART_RX
SPI_SS_A
SPI_MISO
XPRO EXT1
J25
9
11
13
15
5
7
1
3
17
19
10
12
14
16
6
8
2
4
18
20
ADC(-)
GPIO
PWM(-)
SPI_SS_B/GPIO
TWI_SCL
UART_TX
SPI_MOSI
SPI_SCK
VDD_3V3
Header 2X10
EXP/XPRO_PD12 [8,15]
XPRO_PD18 [8]
EXP/XPRO_PB10 [7,15]
EXP/XPRO_PD29 [8,15]
ISC_D6/EXP/XPRO_PC0
EXP/XPRO_PA24 [7,15]
EXP/XPRO_PD26
EXP/XPRO_PD25
[8,15]
[8,15]
[8,10,15]
[7,10,15]
[7,10,15]
[14]
[8]
[8]
[7,15]
EDBG_ID_03
XPRO_PD7
XPRO_PD9
EXP/XPRO_PB5
[7,15] EXP/XPRO_PA21
ISC_D2/EXP/XPRO_PB28
ISC_D3/EXP/XPRO_PB29
[8,15] EXP/XPRO_PD29
[8,15] EXP/XPRO_PD27
I D
ADC(+)
GPIO
PWM(+)
IRQ/GPIO
TWI_SDA
UART_RX
SPI_SS_A
SPI_MISO
XPRO EXT2
J26
9
11
13
15
5
7
1
3
17
19
10
12
14
16
6
8
2
4
18
20
ADC(-)
GPIO
PWM(-)
SPI_SS_B/GPIO
TWI_SCL
UART_TX
SPI_MOSI
SPI_SCK
VDD_3V3
Header 2X10
XPRO_PD8 [8]
XPRO_PD10 [8]
EXP/XPRO_PB6 [7,15]
EXP/XPRO_PD28 [8,15]
ISC_D3/EXP/XPRO_PB29
ISC_D2/EXP/XPRO_PB28
EXP/XPRO_PD26
EXP/XPRO_PD25
[8,15]
[8,15]
[7,10,15]
[7,10,15]
2
XPRO Connectors
C
B
SAMA5D2C-XULT
Expansion & XPRO Connectors
C
B
A
RevC
RevB
RevA
A INIT EDIT
1/1
PPn
PPn
XinJQ
XinJQ
1
XXX
XXX
XXX
XXX
XX-XXX-XX
C
15
15
A
5 4 3
32-BIT ARM-BASED MICROPROCESSORS
Errata
8. Errata
8.1 NRST
Issue: Pullup R6 is connected to VDD_3V3
Workaround: Connect pullup R6 to VDDBU.
8.2 nLBO
Issue: No pullup on nLBO
Workaround: Add pullup 10K to nLBO output.
8.3 R63
Issue: Incorrect R63 resistance in schematic "EDBG"
Workaround: Correct the resistance to 47R.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 76
32-BIT ARM-BASED MICROPROCESSORS
Revision History
9. Revision History
Table 9-1. SAMA5D2C-XULT, DS50002691B, Dec-2017 Revision History
Changes
Updated
.
Removed Declaration of Conformity.
Table 9-2. SAMA5D2C-XULT, DS50002691A, Oct-2017 Revision History
Changes
First issue.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 77
32-BIT ARM-BASED MICROPROCESSORS
The Microchip Web Site
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Note the following details of the code protection feature on Microchip devices:
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• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 78
32-BIT ARM-BASED MICROPROCESSORS
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
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Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY
OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS
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Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings,
BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo,
Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA,
SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight
Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient
Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL
ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their respective companies.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 79
32-BIT ARM-BASED MICROPROCESSORS
© 2017, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 978-1-5224-2449-9
Quality Management System Certified by DNV
ISO/TS 16949
Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC
®
MCUs and dsPIC
®
DSCs, KEELOQ ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
© 2017 Microchip Technology Inc.
User Guide DS50002691B-page 80
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