EV-ADF5355SD1Z (Rev. B)

EV-ADF5355SD1Z (Rev. B)
EV-ADF5355SD1Z User Guide
UG-802
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the ADF5355 Frequency Synthesizer for Phase-Locked Loops
FEATURES
GENERAL DESCRIPTION
Self contained board, including ADF5355 frequency
synthesizer with integrated voltage controlled oscillator
(VCO), differential 122.88 MHz temperature controlled
crystal oscillator (TCXO), loop filter (5 kHz), USB interface,
and voltage regulators
Windows-based software allows control of synthesizer
functions from a PC
Externally powered by 6 V
The EV-ADF5355SD1Z evaluates the performance of the ADF5355
frequency synthesizer with integrated VCO for phase-locked
loops (PLLs). A photograph of the evaluation board is shown in
Figure 1. The evaluation board contains the ADF5355 synthesizer
with integrated VCO, a differential 122.88 MHz reference TCXO, a
loop filter, a USB interface, power supply connectors, and subminiature Version A (SMA) connectors. A USB cable is included to
connect the board to a PC USB port.
EQUIPMENT NEEDED
For easy programming of the synthesizer, download the
Windows®-based software from www.analog.com/ADF5355.
Windows-based PC with USB port for evaluation software
System demonstration platform, serial only (SDP-S)
EVAL-SDP-CS1Z controller board
Power supply (6 V)
Spectrum analyzer
50 Ω terminators
This board requires an SDP-S (shown in Figure 1, but not supplied
with the kit). The SDP-S allows software programming of the
ADF5355 device.
EVALUATION KIT CONTENTS
EV-ADF5355SD1Z
USB cable
ONLINE RESOURCES
Documents Needed
ADF5355 data sheet
EV-ADF5355SD1Z user guide
PLL Software Installation Guide
Required Software
Analog Devices, Inc., ADF5355 software, Version 0.46.1 or
higher (available for download at
www.analog.com/ADF5355)
12936-001
EVALUATION BOARD PHOTOGRAPH
Figure 1. EV-ADF5355SD1Z
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. B | Page 1 of 19
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EV-ADF5355SD1Z User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
RF Output .......................................................................................4
Equipment Needed ........................................................................... 1
Loop Filter ......................................................................................4
Evaluation Kit Contents ................................................................... 1
Reference Source ...........................................................................4
Online Resources .............................................................................. 1
Default Configuration ..................................................................4
General Description ......................................................................... 1
Evaluation Board Setup ................................................................5
Evaluation Board Photograph ......................................................... 1
Evaluation Board Software ...............................................................6
Revision History ............................................................................... 2
Main Controls ................................................................................6
Getting Started .................................................................................. 3
Evaluation and Test ...........................................................................7
Software Installation Procedures ................................................ 3
Evaluation Board Schematics and Artwork ...................................8
Evaluation Board Setup Procedures........................................... 3
Ordering Information .................................................................... 17
Evaluation Board Hardware ............................................................ 4
Bill of Materials ........................................................................... 17
Power Supplies .............................................................................. 4
REVISION HISTORY
5/15—Rev. A to Rev. B
Moved Software Installation Procedures Section and Evaluation
Board Setup Procedures Section .................................................... 3
Changes to Figure 8 .......................................................................... 9
4/15—Rev. 0 to Rev. A
Change to Figure 2 ........................................................................... 3
Changes to Figure 7 .......................................................................... 8
Changes to Figure 8 .......................................................................... 9
Changes to Figure 9 ........................................................................ 10
4/15—Revision 0: Initial Version
Rev. B | Page 2 of 19
EV-ADF5355SD1Z User Guide
UG-802
GETTING STARTED
SOFTWARE INSTALLATION PROCEDURES
EVALUATION BOARD SETUP PROCEDURES
See the ADF5355 product page for the EV-ADF5355SD1Z control
software. For the software installation procedure, see the PLL
Software Installation Guide.
To run the software,
1.
2.
3.
Click the ADF5355 file on the desktop or from the Start
menu.
On the Select Device and Connection tab, choose ADF5355
and SDP board (black), and then click Connect (see
Figure 2).
When connecting the board, allow 5 sec to 10 sec for the
label on the status bar to change.
12936-004
Under the File menu, the current settings can be saved to, and
loaded from, a text file.
Figure 2. Software Front Panel Display—Select Device and Connection
Rev. B | Page 3 of 19
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EV-ADF5355SD1Z User Guide
EVALUATION BOARD HARDWARE
The EV-ADF5355SD1Z requires an SDP-S platform that uses the
EVAL-SDP-CS1Z (SDP-B is not recommended).


The EV-ADF5355SD1Z schematics are shown in Figure 7, Figure 8,
and Figure 9. The silkscreens for the evaluation board are shown in
Figure 10 and Figure 11.
For lowest rms phase noise, use the following components with
0.9 mA charge pump current:


RF OUTPUT
The EV-ADF5355SD1Z has one pair of SMA output connectors:
RFOUTA+ and RFOUTA− (differential outputs). Because they
are sensitive to impedance mismatch, connect the RF outputs to
equal load impedances. If only one port of a differential pair is
used, terminate the complementary port with an equal load
terminator (in general, a 50 Ω terminator).
SMA RFOUTB is a single-ended RF output that operates from
6.8 GHz to 13.6 GHz. If only RFOUTB is used, power off
RFOUTA+ and RFOUTA−. If left on, terminate both RFOUTA+
and RFOUTA− SMA connectors with 50 Ω terminators.
LOOP FILTER
The loop filter schematic is included in the board schematic in
Figure 7. Figure 3 shows the loop filter component placements.
For lowest noise at 100 kHz offset, use the following components
(that are inserted on the evaluation board) with a 0.9 mA charge
pump current:
R17
C61
R1
LED1 indicates when the ADF5355 is powered on. Use
Switch S1 to switch the 6 V power to the board on and off.
R14
RCPOUT
C73
R5
The charge pump and VCO supply pins are powered from a 5 V
ADM7150 high performance, low noise regulator. The remaining
supplies are powered from a 3.3 V ADM7150 high performance,
low noise regulator.
C59
The power supply circuitry allows the user two or three separate
low dropout (LDO) regulators to feed the ADF5355 (using fewer
LDO regulators increases the risk of spur contaminated dc
feeds).
C60
RPIN18
The board is powered by a 6 V power supply connected to the
red and black banana connectors. Connect the red connector to
a 6 V power supply and the black connector to ground.
C60 = 1.2 nF, C59 = 33 nF, C61 = 390 pF, C73 = 10 pF
R14 = 1 kΩ, R17 = 3.3 kΩ
RVTUNE
12936-003
POWER SUPPLIES
C60 = 22 nF, C59 = 0.47 μF, C61 = 10 nF, C73 = 10 pF
R14 = 220 Ω, R1 = 470 Ω
Figure 3. Loop Filter Placement
REFERENCE SOURCE
The evaluation board contains a 122.88 MHz differential output
TCXO from Vectron International. If preferred, the user may
supply either a single-ended or differential reference input to
the REFINA/REFINB SMA connectors. When using an external
reference, remove R12 to disconnect the power rail from the
TCXO.
To use a single-ended REFINx, connect a low noise 122.88 MHz
reference source to SMA REFINB, and connect a 50 Ω terminator
to SMA REFINA. Remove Resistor R27 (100 Ω). To use a differential REFINx, connect the differential signal to SMA REFINA
and SMA REFINB. The differential REFINA/REFINB SMA
connectors can operate to a 500 MHz input frequency.
In the schematic shown in Figure 7, the REFINA pin of U1
(ADF5355) is connected to SMA REFINB, and the REFINB pin
of U1 (ADF5355) is connected to SMA REFINA. This schematic
matches the evaluation board connections.
DEFAULT CONFIGURATION
All components necessary for local oscillator generation are
inserted on the board. This board is shipped with the ADF5355
synthesizer with an integrated VCO, a differential 122.88 MHz
reference TCXO, and a 5 kHz loop filter (ICP = 0.9 mA).
Rev. B | Page 4 of 19
EV-ADF5355SD1Z User Guide
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EVALUATION BOARD SETUP
SDP-S BOARD
PC
VSUPPLY
EXTERNAL POWER
SWITCH
EXTERNAL DC
SUPPLY
PLL
POWER
LED
EXTERNAL DC
GND
SPECTRUM
ANALYZER
SIGNAL GENERATOR
LOCK
DETECT
LED
REFERENCE
IN/OUT
REFINB
TCXO
LOOP FILTER
REFINA
REFERENCE
(OPTIONAL)
ADF5355
(UNDERNEATH BOARD)
RFOUTA+
RFOUTB
12936-006
RFOUTA–
Figure 4. Evaluation Setup Block Diagram
Rev. B | Page 5 of 19
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EV-ADF5355SD1Z User Guide
EVALUATION BOARD SOFTWARE
MAIN CONTROLS
The Main Controls tab (see Figure 5) selects the RF and user
configurable register settings. Consult the register descriptions
in the ADF5355 data sheet for details. Default settings are recommended for most registers.
In Register 4, program CP current to match the value used for
the loop filter design.
12936-005
In RF Settings, ensure that VCOout (MHz) equals the VCO
frequency. Set Output divider to give the required
RFoutA± (MHz).
Ensure that Reference freq equals the applied reference signal. The
PFD frequency is calculated from the reference frequency, the R
counter, the reference doubler, and the reference divide by 2.
Ensure that the value in PFD (MHz) matches the value specified in
the loop filter design.
Figure 5. Software Front Panel Display—Main Controls
Rev. B | Page 6 of 19
EV-ADF5355SD1Z User Guide
UG-802
EVALUATION AND TEST
1.
Rev. B | Page 7 of 19
–60
–80
PHASE NOISE (dBc/Hz)
Install the ADF5355 software (see the PLL Software
Installation Guide).
2. Follow the hardware driver installation procedure (Windows
XP only).
3. Connect a 50 Ω terminator to RFOUTA−.
4. Connect the EV-ADF5355SD1Z board to the SDP-S board.
5. Connect the 6 V power supply to the banana connectors
and power up the board using S1 (check that LED1 is on).
6. Connect the USB cable from the SDP-S board to the PC.
7. Run the ADF5355 software.
8. Select ADF5355 and SDP board (black) in the Select
Device and Connection tab of the software front panel
display window (see Figure 2).
9. Click the Main Controls tab, and set the VCOout (MHz)
to a frequency of 6800 MHz and then click Write All
Registers.
10. Connect the spectrum analyzer to SMA Connector
RFOUTA+. See Figure 4 for a typical evaluation setup.
11. Measure the output spectrum and single sideband phase
noise.
Figure 6 shows a phase noise plot of the SMA RFOUTA+
equal to 6.8 GHz.
–100
–120
–140
–160
–180
1k
10k
100k
1M
FREQUENCY OFFSET (Hz)
Figure 6. Single Sideband Phase Noise
10M
12936-007
To evaluate and test the performance of the ADF5355, use the
following procedure:
+3.3V
RA3
0Ω
DNI
CA3
1µF
DNI
GND
CA2
1µF
DNI
GND
C2
C1
REFINA
GND
5 4 3 2
1
GND
5
OUT+
NC GND
2
3 125MHz
OUT–
6
DNI
7 Y1_ALT
VTUNE VCC
1
CA5
1µF
DNI
GND
4
GND
CA4
1µF
DNI
GND
8
RA2
0Ω
DNI
REFINA AND REFINB ARE SPACED 15mm
CENTER TO CENTER ON PCB
CA1
100pF
DNI
GND
3
R8
51Ω
DNI
R7
51Ω
DNI
1
Figure 7. Evaluation Board Schematic—Page 1
CE IN
LE IN
DATA IN
CLK IN
NC
1
R16
0Ω
TP2
C44
100pF
GND
R19
1.8kΩ
GND
R18
1.8kΩ
R23
1.8kΩ
TP6
C48
10pF
GND
C37
10pF
GND
C43
10pF
GND
29
REFINA
28
REFINB
1
CLK
2
DATA
3 LE
4 CE
ADF5355
C46
10pF
GND
C33
0.1µF
GND
C53
0.1µF
GND
C45
0.1µF
GND
C50
0.1µF
GND
AVDD2
TP3 TP4 TP5
GND
R25
1.5kΩ
GND
R24
DNI
+3.3V
C41
1000pF
R10
51Ω
DNI
GND
VP
DVDD
REFINB
CREG2
R12 +3.3V
0Ω
5 4 3 2
1
C47
1µF
GND
R9
51Ω +3.3V
DNI
C42
1000pF
GND
C39
1000pF
R27
100Ω
C40
1000pF
5 4
Y1
E/D
GND
6
VDD
TP1
GND
1
GND
+3.3V
R11
0Ω
RA4
0Ω
RA5
0Ω
122.88MHz
2
CFO
FO
RA1
0Ω
DNI
32
16
27
6
22
U1
GND
GND
GND
R3
0Ω
DNI
IN
C59
0.47µF
C51
10pF
0201
R33
0Ω
0201
R32
0Ω
0201
GND
L7
4.7nH
0201
DNI
GND
L6
4.7nH
0201
DNI
A
DS1
C
R26
0Ω
DNI
VRF1
R1
0Ω
C57
120pF
C58
0.1µF
C21
1µF
C56
120pF
GND
C61
1000pF
GND
C23
DNI
C3
10pF
0201
C60
22nF
GND
R17
470Ω
R4
0Ω
C19
10µF
GND
32K243-40ML5
RFOUTB
32K243-40ML5
GND
RFOUTB
GND
RFOUTA–
RF CHOKE
MATCHED LINE WIDTH’S
TRACE WIDTH = 380µm
RFOUTA–
GND
GND
C17
4.7µF
GND
VREF
C15
1µF
DNI
GND
VBIAS
VREGVCO
RFOUTA+
C30
1000pF
GND
C27
1000pF
GND
C29
10pF
GND
C31
10pF
GND
C26
0.1µF
GND
C28
10pF
GND
GND
LOCK DETECT
32K243-40ML5
RFOUTA+
C73
10pF
GND
R5 VTUNE
0Ω
LOOP FILTER
PLACE ON BOTTOM SIDE OF PCB
SHIELD SIGNALS WITH VIAS
L2
C6
7.4nH 10pF
0201 0201
VRF1
GND
L3
4.7nH
0201
DNI
L1
7.4nH
0201
VRF1
C55
0.1µF
GND
GND
AVDD1
R21
0Ω
C54
10pF
R14
220Ω
GND
C12
1µF
VVCO
GND
R22
68Ω
R20
0Ω
DNI
IN MUXOUT
MUXOUT
RMUX
0Ω 1
VRF
C9
1µF
GND
GND
GND
CPOUT RCPOUT
0Ω
C32
1000pF
GND
C36
1000pF
GND
C35
0.1µF
C34
10pF
GND
PDRF
PDRF
R2
10kΩ
+3.3V
C25
10pF
CREG1
C38
10pF
ADF5355BCPZ
30
25
7
5
10
17
20
24
23
19
11
12
14
R6
5.1kΩ
GND
MUXOUT
CREG1
CPOUT
AVDD
VRF
VVCO
VTUNE
VBIAS
VREF
VREGVCO
RFOUTA+
RFOUTA–
RFOUTB
CREG2
AVDD
DVDD
VP
RSET
AGND
CPGND
SDGND
AGNDVCO
AGNDVCO
AGNDRF
AGNDRF
PDBRF
PAD
9
8
31
18
21
13
15
26
PAD
Rev. B | Page 8 of 19
12936-008
+3.3V
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EV-ADF5355SD1Z User Guide
EVALUATION BOARD SCHEMATICS AND ARTWORK
AVDD
DVDD
VRF
VRF1
VVCO
VP
VRVCO
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
G20
G21
G22
G23
G24
G25
G26
G27
G28
G29
G30
G31
G32
G33
G34
G35
G36
1
2
3
4
5
6
7
8
GND
MUX/LE
IN
GND
CVVCO
22µF
0Ω
RV7
GND
CVP
22µF
Rev. B | Page 9 of 19
Figure 8. Evaluation Board Schematic—Page 2
GND
CVRF1
22µF
RV5
DNI
AVDD2
GND
CVRF
22µF
GND
CDVDD
22µF
GND
CAVDD
22µF
GND
0Ω
VRF1
TP_VRF1
RV31 1
0Ω
VRF
DNI
VREF
VBIAS
GND
C4
1µF
RV9
0Ω
RV10
0Ω
DNI
GND
REF
VIN
4
GND
PAD
EP
VR2
ADM7150ACPZ-5.0
1
VREG
3
2 VOUT
BYP
7
5
REF_SENSE EN
6
8
3.3V
RV30
0Ω
0Ω
RV26
RV4
DNI
RV19
0Ω
0Ω
RV15
1kΩ
0Ω
GND
C16
10µF
GND
C2
10µF
RV3
0Ω
RAVDD
R3V3
GND
C18
1µF
RV27
0Ω
GND
C5
1µF
RV16
0Ω
LED1
RV28
0Ω
DNI
GND
RV17
0Ω
DNI
GND
GND
VOUT
VIN
4
GND
PAD
REF
EP
4
VIN
GND
PAD
EP
EN
BYP
7
8
VR5
ADM7150ACPZ-3.3
1
VREG
3
2 VOUT
BYP
7
5
REF_SENSE EN
6
8
REF
5
REF_SENSE
6
VR3
ADM7150ACPZ-3.3
1
VREG
3
2
R_VREGVCO VREGVCO PLACE VBIAS, VREF 7 VREGVCO
RESISTORS CLOSE TO DUT PINS
0Ω
AVDD2
RV2
0Ω
DVDD
TP_VRF
RV25 1
0Ω
RV20 1
TP_DVDD
1
TP_AVDD2
0Ω
RV14 1
AVDD1
1
DNI
R_VREF
C1
10µF
GND
R_VBIAS
RV12
0Ω
RV8
0Ω
RV6
0Ω
TP_+3.3V
VVCO
VP
TP_AVDD1
1
TP_VVCO
0
+ CVRVCO
22µF
+
+
TP_VP
RV1 1
GND
GND
C22
10µF
RV29
0Ω
GND
C24 +
1µF
C20
10µF
GND
GND
C11
10µF
RV18
0Ω
C76
100µF
GND
6V
C75
100µF
GND
6V
6V
C14 +
10µF
C8
10µF
GND
GND
C10
10µF
RV11
0Ω
C13 + C74
10µF
100µF
GND
GND
C7
10µF
GND
GND
+
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
1
2
3
4
P2 DNI
6V
GND
ZD1
RPIN18
0Ω
DNI
VSUPPLY
DNI
IN
IN
GND
VSUPPLY_ALT
LE
MUX/LE
MUXOUT
IN
IN
IN
1
2
3
JUMPER 3 PIN
P3
CPOUT SHIELD SIGNALS WITH VIAS ALL
THE WAY TO THE DUT PINS.
VTUNE PLACE VTUNE, CPOUT AND SW
RESISTORS CLOSE TO DUT PINS
GND
1
2
1
2
GND
5 4 3 2
1
VSUPPLY
RVTUNE
0Ω
DNI
1
3
3
GND
GND
C71
22µF
1
S1
12936-009
P1
EV-ADF5355SD1Z User Guide
UG-802
EV-ADF5355SD1Z User Guide
CN1
RLE
1.5kΩ
LE
IN
DATA
IN
MUXOUT
IN
CLK
IN
RDATA
1.5kΩ
VIO_+3.3V
RE3
TBD0603
DNI
RE1
100kΩ
GND
RE2
100kΩ
GND
8
1
2
3
6
7
RMUXOUT
0Ω
RCLK
1.5kΩ
UE1
A0 VCC
A1
5 SDA_0
A2
SDA
SCL
WP
VSS
4
24LC32A-I/MS
SDA
1
SCL
GND
SCL_0
PDRF
CE
1
R28
0Ω
DNI
IN
R29
0Ω
DNI
IN
R30
0Ω
DNI
GND
LE
R31
0Ω
DNI
IN
Figure 9. Evaluation Board Schematic—Page 3
Rev. B | Page 10 of 19
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
GND
CN1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
GND
12936-010
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12936-011
EV-ADF5355SD1Z User Guide
Figure 10. Evaluation Board Silkscreen—Top Side
Rev. B | Page 11 of 19
EV-ADF5355SD1Z User Guide
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Figure 11. Evaluation Board Silkscreen—Reverse Side
Rev. B | Page 12 of 19
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EV-ADF5355SD1Z User Guide
Figure 12. Evaluation Board Layer 1—Primary
Rev. B | Page 13 of 19
EV-ADF5355SD1Z User Guide
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Figure 13. Evaluation Board Layer 2—Ground
Rev. B | Page 14 of 19
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EV-ADF5355SD1Z User Guide
Figure 14. Evaluation Board Layer 3—Power
Rev. B | Page 15 of 19
EV-ADF5355SD1Z User Guide
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Figure 15. Evaluation Board Layer 4—Secondary
Rev. B | Page 16 of 19
EV-ADF5355SD1Z User Guide
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ORDERING INFORMATION
BILL OF MATERIALS
Table 1.
Reference Designator
C1, C2, C7, C8, C10, C11,
C16, C20, C22
C9, C12, C21, C47
Description
Ceramic multilayer capacitor, X5R
Value
10 μF
Manufacturer
TDK
Part Number
C2012X5R1E106K085AC
Ceramic capacitor, X7R
1 μF
0603YC105KAT2A
C4, C5, C13, C14, C18, C24
C17
C19
C25, C28, C29, C31, C34, C37,
C38, C43, C46, C48, C54
C27, C30, C32, C36,
C39 to C42
C3, C6, C51
Ceramic capacitor, X8R
Ceramic capacitor, X5R
Ceramic capacitor, X5R
RF/microwave capacitor, C0G
1 μF
4.7 μF
10 μF
10 pF
Ceramic capacitor, C0G, 0402
1000 pF
Allied
Electronics
TDK
TDK
TDK
Allied
Electronics
Murata
Ceramic chip capacitor, RF
10 pF
C26, C33, C35, C45, C50,
C53, C55, C58
C44
C56, C57
C59
C60
Ceramic capacitor, X7R
0.1 μF
Ceramic capacitor, NP0
Ceramic capacitor, C0G, 0402
Ceramic capacitor, Y5V
Ceramic capacitor
100 pF
120 pF
0.47 μF
22 nF
C61
C71
Ceramic capacitor, X7R
Solid tantalum electrolytic capacitor
10,000 pF
22 μF
C73
C74 to C76
Chip capacitor, C0G, 0603
Tantalum chip capacitor
10 pF
100 μF
CVP, CVRF, CAVDD, CDVDD,
CVRF1, CVVCO, CVRVCO
CN1
22 μF
DS1, LED1
Tantalum capacitor surface-mount device
(SMD)
Connector printed circuit board (PCB),
vertical type receptacle SMD
LED, 570 nm, SMD (green)
GND
Connector PCB, single socket (black)
L1, L2
SCL, SDA, TP1 to TP6, PDRF,
TP_VP, MUXOUT, TP_VRF,
TP_DVDD, TP_VRF1,
TP_VVCO, TP_+3.3V,
TP_AVDD1, TP_AVDD2
P3
R1, R4, R5, R12, R21, RV1 to
RV3, RV6 to RV9, R3V3,
RV11, RV12, RV14 to RV16,
RV18 to RV20, RV25 to
RV27, RV29 to RV31,
RMUXOUT
R11, R16, RMUX, RCPOUT,
R_VREGVCO
R14
Inductor chip
Connector PCB, test point (yellow)
R17
7.4 nH
C2012X8R1C105K125AB
C1608X5R1C475K080AC
C1608X5R1A106M080AC
04025U100GAT2A
GRM1555C1H102JA01
Allied
Electronics
KEMET
0201ZK100GBSTR
Yageo
Murata
Murata
Allied
Electronics
Yageo
Allied
Electronics
Murata
Allied
Electronics
Allied
Electronics
HIROSE
2238 867 15101
GRM1555C1H121JA01
GRM188F51C474ZA01D
0603YC223KAT2A
Avago
Technologies
Del-Tron
Precision, Inc.
Coilcraft
Components
Corporation
HSMG-C170
C0402C104K4RACTU
CC0603KRX7R9BB103
TCJC226M025R0100
GRM1885C1H100JA01D
TAJB107K006R
TAJB226K016R
FX8-120S-SV(21)
571-0100
0302CS-7N4XJLU
TP-104-01-04
Connector PCB, Header 3
Film SMD resistor, 0603
0Ω
Molex
Multicomp
22-28-4033
MC0603WG00000T5E-TC
Resistor thick film chip
0Ω
Multicomp
0402WGF0000TCE
Film SMD resistor, 0603
220 Ω
Multicomp
Film SMD resistor, 0603
470 Ω
Multicomp
MC 0.063W 0603 1%
220R
MC 0.063W 0603 1%
470R
Rev. B | Page 17 of 19
UG-802
Reference Designator
R18, R19, R23
R2
R22
R25, RLE, RCLK, RDATA
R27
R32, R33
R6
RAVDD
RE1, RE2
RE3
REFINA, REFINB
RFOUTB, RFOUTA+,
RFOUTA−
S1
U1
UE1
VR2
VR3, VR5
VSUPPLY
VSUPPLY_ALT
Y1
ZD1
1
EV-ADF5355SD1Z User Guide
Description
Film SMD resistor, 0603
Precision thick film chip, resistor R0603
Film SMD resistor, 0603
Precision thick film chip resistor, R0805
High-frequency thin film chip resistor
Chip SMD resistor, 0201
Standard thick film chip resistor
Precision thick film chip resistor, R0805
Precision thick film chip resistor, R0805
Do not install (TBD0603)1
PCB, coaxial SMA, end launch connector
PCB, SMA right angle jack connector
Value
1.8 kΩ
10 kΩ
68 Ω
1.5 kΩ
100 Ω
0Ω
5.1 kΩ
1 kΩ
100 kΩ
Momentary single pole single throw
switch
IC, Analog Devices microwave wideband
synthesizer with integrated VCO
IC, 32 kB serial EEPROM
IC, 800 mA, ultralow noise/high power
supply rejection ratio (PSRR), RF linear
regulator, 5.0 V output
IC, 800 mA, ultralow noise/high PSRR, RF
linear regulator, 3.3 V output
Connector PCB, coaxial SMA, end launch
(do not install)
PCB, single socket (red) connector
IC, crystal low voltage positive emitter
coupled logic (LVPECL)
Zener diode, 6.8 V, SOT-23
TBD means no value assigned; component not inserted.
Rev. B | Page 18 of 19
Manufacturer
Multicomp
Panasonic
Multicomp
Panasonic
Vishay
Panasonic
Vishay
Panasonic
Panasonic
Johnson
Rosenberger
Part Number
MC 0.063W 0603 1% 1K8
ERJ-3EKF1002V
MC 0.063W 0603 1% 68R
ERJ-6ENF1501V
FC0402E1000BST1
ERJ-1GE0R00C
CRCW04025K10FKED
ERJ-6ENF1001V
ERJ-6ENF1003V
Do not install
142-0701-801
32K243-40ML5
Alcoswitch
TT11AGPC-1
Analog Devices
ADF5355BCPZ
Microchip
Technology, Inc.
Analog Devices
24LC32A-I/MS
ADM7150ACPZ-5.0
Analog Devices
ADM7150ACPZ-3.3
Do not install
Del-Tron
Precision, Inc.
Vectron
International
Philips
571-0500
VCC6-LAB-122M880000
BZX84-C6V8
EV-ADF5355SD1Z User Guide
UG-802
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until
you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices,
Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer
may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written
notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED,
RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF
INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S
POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES
SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will
comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of
the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts,
and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is
expressly disclaimed.
©2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG12936-0-5/15(B)
Rev. B | Page 19 of 19
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