Seiko | Cal. V17 | S1C05112 Technical Manual - Epson Electronic Devices

124-OUTPUT EPD DRIVER
S1C05112
Technical Manual
NOTICE
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of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not
assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or
use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as medical products. Moreover, no license to any intellectual property rights is granted by
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technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade
Law of Japan and may require an export license from the Ministry of Economy, Trade and Industry or other approval
from another government agency.
© SEIKO EPSON CORPORATION 2008, All rights reserved.
S1C05112 Revision History
Code No.
Page
Chapter/Section
411004401
(8. 2007)
4 3.1 Pad Layout
7 4.2 MPU Interface Block
16 6.5 Interface AC Characteristics
411004402
(10. 2008)
15 6.4 Analog Circuit Characteristics and
Power Current Consumption
Contents
Figure 3.1.1 was modified.
Figures 4.2.1 and 4.2.2 were modified.
The figures (Interface AC characteristic, Recommended timing)
were modified.
The DC-DC converter current consumption (MVDD) - DCK
frequency characteristic graph was modified.
CONTENTS
CONTENTS
1 Overview......................................................................................................................... 1
1.1 Features ............................................................................................................................ 1
1.2 Characteristic Overview .................................................................................................... 2
2 Block Diagram ............................................................................................................... 3
3 Pads ................................................................................................................................ 4
3.1 Pad Layout ........................................................................................................................ 4
3.2 Pin Description .................................................................................................................. 4
3.3 Pad Coordinates................................................................................................................ 5
4 Functional Description.................................................................................................. 6
4.1 DC-DC Converter Block .................................................................................................... 6
4.2 MPU Interface Block.......................................................................................................... 6
4.3 EPD Driver Block .............................................................................................................. 8
4.4 Power Control (Standby) Function .................................................................................... 8
4.5 Control Sequence ............................................................................................................. 9
4.5.1 Startup Sequence from Standby State ............................................................... 9
4.5.2 Standby Sequence............................................................................................. 10
5 External Wiring Diagram .............................................................................................. 11
6 Electrical Characteristics............................................................................................. 13
6.1
6.2
6.3
6.4
6.5
Absolute Maximum Rating .............................................................................................. 13
Recommended Operating Conditions .............................................................................. 13
DC Characteristics ........................................................................................................... 13
Analog Circuit Characteristics and Power Current Consumption ..................................... 14
Interface AC Characteristics............................................................................................. 16
7 Package for Test Samples ............................................................................................ 17
S1C05112 TECHNICAL MANUAL
EPSON
i
1 OVERVIEW
1 Overview
The S1C05112 is the EPD (Electrophoretic Display) driver IC designed specifically for EPD panels.
The IC consists of an external MPU interface block, a DC-DC converter block, and an EPD driver block. It outputs
the EPD drive voltage from any EPD drive pin by supplying an external 3-V DC voltage and sending display data
and control signals to the IC.
A low-power EPD controller system can be configured by the S1C05112 with the S1C63808 (4-bit single chip microcomputer) and is suitable for battery driven applications such as clocks, watches and price tags.
1.1 Features
The main functions and features of the S1C05112 are outlined below.
MPU interface block
The MPU interface block inputs the control signals, data and clocks shown below.
Driver control signals
XCS:
Chip select signal
SCK:
Clock for data shift register operation
SDAT[3:0]: 4-bit data
SEN:
Driver output trigger signal
IC power control signals
LO_ACT: Power control (active-standby switch) signal for the logic
blocks (MPU interface block and low-voltage driver block)
DD_ACT: Power control (active-standby switch) signal for the DC-DC
converter block
Clock for the DC-DC converter
DCK:
512-Hz clock (recommended)
DC-DC converter block
The DC-DC converter performs sextuple boosting to generate an 18-V EPD drive voltage from the 3-V supply
voltage (MVDD) and outputs the boosted voltage from the VSC pin.
The DC-DC converter requires 10 capacitors for boosting voltage and provides 20 pins (C00P–C04P, C00N–
C04N, C10P–C14P, and C10N–C14N) for connecting external voltage-boost capacitors.
Supply a voltage-boost clock from the MPU or other controller to the DCK pin to drive the DC-DC converter.
EPD driver block
The EPD driver block outputs the drive voltage to any EPD drive pin (EO0–EO123) according to the input data.
The EPD drive pins have three output states: H (high), L (low) and Hi-Z (high impedance).
Power supply voltage
Power supply voltage for DC-DC converter (MVDD): 2.1 V to 3.6 V
Power supply voltage for MPU interface (LVDD):
1.0 V to 3.6 V
Current consumption
Typical MVDD current consumption when EPD (10 MΩ load resistance) is being driven:
15 µA
Typical MVDD current consumption when no EPD is driven (no load):
5 µA
Typical LVDD current consumption when display data is being input (SCK frequency = 50 kHz): 13 µA
Typical current consumption in standby state:
0.1 µA or less
Shipment form
Die
S1C05112 TECHNICAL MANUAL
EPSON
1
1 OVERVIEW
1.2 Characteristic Overview
Table 1.2.1 Characteristic Overview
Item
Power supply voltage
LVDD
MVDD
Maximum voltage rating
Current
Standby state
consumption During display
(LVDD)
data input
Current
When no EPD is
consumption driven
(MVDD)
When EPD is
being driven
DC-DC
Output voltage
converter
(VSC)
Output current
Control clock
Voltage-boost
capacitors
Number of driver output pads
Pad pitch
Operating temperature range
Specification
Min.
Typ.
Max.
2.1
3.6
1.0
3.6
2.1
3.6
-0.5
4.5
0.1
13
16.3
5
7.5
15
21
18
9
512
0.068
124
85/89
-20
70
Unit
Remarks
LVDD = MVDD when a single power supply is used ∗1
For MPU interface block ∗2
For DC-DC converter and its controller block ∗2
LVDD, MVDD ∗2
When all circuit blocks are in standby state (LVDD = 3 V)
SCK frequency = 50 kHz (LVDD = 3 V)
Depends on the operating frequency
µA No load (MVDD = 3 V)
V
V
V
V
µA
µA
µA 10 MΩ load resistance
(EPD leak current is included, MVDD = 3 V)
V VSC = MVDD × 6
(Depends on MVDD voltage fluctuations) ∗3
µA Maximum load resistance: 2 MΩ (Output approx. 18 V)
Hz Recommended frequency
µF 0.047 to 0.068 µF are recommended
pads COM outputs can be assigned to any of 124 pads
µm Opening: 68 µm ∗4
°C
∗1) Supply a single power voltage (MVDD = LVDD) when an MPU other than S1C63808 is used.
∗2) MVDD ≥ LVDD, LVDD + 0.3 V ≥ VIH1 (high-level input voltage)
∗3) Maximum 0.5 V voltage loss after voltage boosting (at no load)
The DC-DC converter output voltage (VSC) is supplied to the driver (HVDD).
∗4) See Section 3.1, “Pad Layout.”
2
EPSON
S1C05112 TECHNICAL MANUAL
2 BLOCK DIAGRAM
2 Block Diagram
S1C05112
LVDD (3 V Typ.)
LO_ACT
XCS
SCK
SEN
SDAT[3:0]
OE
MPU interface
DATA
124
4
EPD driver
MVDD (3 V Typ.)
C∗0P–C∗4P
C∗0N–C∗4N
DCK
DD_ACT
TEST[1:0]
20
124
EO[123:0]
DC-DC converter
2
VSS (GND)
6 × MVDD
VSC
HVDD
Figure 2.1 Block Diagram
S1C05112 TECHNICAL MANUAL
EPSON
3
3 PADS
3 Pads
X
VSS
HVDD
VSC
C10N
C10P
C11N
C11P
C12N
C12P
C13N
C13P
C14N
C14P
C04P
C04N
C03P
C03N
C02P
C02N
C01P
C01N
C00P
C00N
VSS
DCK
TEST0
TEST1
DD_ACT
LO_ACT
SCK
XCS
SEN
SDAT0
SDAT1
SDAT2
SDAT3
MVDD
LVDD
VSS
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
(Top View)
81
80
79
78
77
76
75
74
73
72
71
70
69
68
2.18 mm
Y
EO110
EO111
EO112
EO113
EO114
EO115
EO116
EO117
EO118
EO119
EO120
EO121
EO122
EO123
EO27
EO26
EO25
EO24
EO23
EO22
EO21
EO20
EO19
EO18
EO17
EO16
EO15
EO14
EO13
EO12
EO11
EO10
EO9
EO8
EO7
EO6
EO5
EO4
EO3
EO2
EO1
EO0
EO41
EO40
EO39
EO38
EO37
EO36
EO35
EO34
EO33
EO32
EO31
EO30
EO29
EO28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
17
19
20
21
22
23
24
25
26
27
28
150
151
152
153
154
155
156
157
158
159
160
161
162
163
EO42
EO43
EO44
EO45
EO46
EO47
EO48
EO49
EO50
EO51
EO52
EO53
EO54
EO55
EO56
EO57
EO58
EO59
EO60
EO61
EO62
EO63
EO64
EO65
EO66
EO67
EO68
EO69
EO70
EO71
EO72
EO73
EO74
EO75
EO76
EO77
EO78
EO79
EO80
EO81
EO82
EO83
EO84
EO85
EO86
EO87
EO88
EO89
EO90
EO91
EO92
EO93
EO94
EO95
EO96
EO97
EO98
EO99
EO100
EO101
EO102
EO103
EO104
EO105
EO106
EO107
EO108
EO109
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
3.1 Pad Layout
6.75 mm
Figure 3.1.1 Pad Layout
Pad pitch
Pad opening size
84.75 µm: 1–28, 68–163
89.25 µm: 29–67
68 µm
3.2 Pin Description
Table 3.2.1 Pin Description
Pin name
Pin No.
I/O
Function
LVDD
66
– Logic power supply (+) pin (0.9 V to 3.6 V)
VSS
29, 52, 67
– Power supply (-) pins (0 V)
MVDD
65
– DC-DC converter power supply (+) pin (2.2 V to 3.6 V)
VSC
31
O Boosted voltage output pin (18 V Typ.)
HVDD
30
– Driver power supply (+) pin (18 V Typ.)
LO_ACT
57
I Logic block (MPU interface block) power control input pin
DD_ACT
56
I DC-DC converter block power control input pin
DCK
53
I DC-DC converter clock input pin
TEST0
54
I TEST pin (Connect to VSS.)
TEST1
55
I TEST pin (Connect to VSS.)
C00N–C04P
51–42
– Voltage boost capacitor connect pins (Connect a capacitor between P and N pins.)
C10N–C14P
32–41
– Voltage boost capacitor connect pins (Connect a capacitor between P and N pins.)
SCK
58
I MPU interface clock input pin
XCS
59
I MPU interface chip select input pin
SEN
60
I MPU interface output enable input pin
SDAT3
64
I MPU interface data input pins
SDAT2
63
I
SDAT1
62
I
SDAT0
61
I
EO0–EO123 1–28, 68–163 O EPD output pins (three state outputs; H, L, and Hi-Z)
4
EPSON
S1C05112 TECHNICAL MANUAL
3 PADS
3.3 Pad Coordinates
Table 3.3.1 Pad Coordinates (unit: µm)
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
X
-2839.125
-2754.375
-2669.625
-2584.875
-2500.125
-2415.375
-2330.625
-2245.875
-2161.125
-2076.375
-1991.625
-1906.875
-1822.125
-1737.375
-1652.625
-1567.875
-1483.125
-1398.375
-1313.625
-1228.875
-1144.125
-1059.375
-974.625
-889.875
-805.125
-720.375
-635.625
-550.875
-411.000
-321.750
-232.500
-143.250
-54.000
35.250
124.500
213.750
303.000
392.250
481.500
570.750
Y
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
S1C05112 TECHNICAL MANUAL
No.
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
X
660.000
749.250
838.500
927.750
1017.000
1106.250
1195.500
1284.750
1374.000
1463.250
1552.500
1641.750
1731.000
1820.250
1909.500
1998.750
2088.000
2177.250
2266.500
2355.750
2445.000
2534.250
2623.500
2712.750
2802.000
2891.250
2980.500
3254.925
3254.925
3254.925
3254.925
3254.925
3254.925
3254.925
3254.925
3254.925
3254.925
3254.925
3254.925
3254.925
3254.925
Y
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-966.675
-550.875
-466.125
-381.375
-296.625
-211.875
-127.125
-42.375
42.375
127.125
211.875
296.625
381.375
466.125
550.875
No.
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
EPSON
X
2839.125
2754.375
2669.625
2584.875
2500.125
2415.375
2330.625
2245.875
2161.125
2076.375
1991.625
1906.875
1822.125
1737.375
1652.625
1567.875
1483.125
1398.375
1313.625
1228.875
1144.125
1059.375
974.625
889.875
805.125
720.375
635.625
550.875
466.125
381.375
296.625
211.875
127.125
42.375
-42.375
-127.125
-211.875
-296.625
-381.375
-466.125
-550.875
Y
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
No.
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
X
-635.625
-720.375
-805.125
-889.875
-974.625
-1059.375
-1144.125
-1228.875
-1313.625
-1398.375
-1483.125
-1567.875
-1652.625
-1737.375
-1822.125
-1906.875
-1991.625
-2076.375
-2161.125
-2245.875
-2330.625
-2415.375
-2500.125
-2584.875
-2669.625
-2754.375
-2839.125
-3254.925
-3254.925
-3254.925
-3254.925
-3254.925
-3254.925
-3254.925
-3254.925
-3254.925
-3254.925
-3254.925
-3254.925
-3254.925
-3254.925
Y
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
966.675
550.875
466.125
381.375
296.625
211.875
127.125
42.375
-42.375
-127.125
-211.875
-296.625
-381.375
-466.125
-550.875
5
4 FUNCTIONAL DESCRIPTION
4 Functional Description
4.1 DC-DC Converter Block
The on-chip DC-DC converter boosts the MVDD power supply voltage (3 V Typ.) to generate the 18 V EPD drive
voltage.
DC-DC converter clock
Supply the voltage boost clock for the DC-DC converter to the DCK pin from outside the chip.
Example: When supplying the clock from the S1C63808, the FOUT output clock can be used.
The recommended clock frequency is 512 Hz.
Voltage boost capacitor connect pins
The DC-DC converter provides 20 pins for connecting voltage boost capacitors. Connect a capacitor to each
pair of pins listed below.
1) C00N–C00P
6) C10N–C10P
2) C01N–C01P
7) C11N–C11P
3) C02N–C02P
8) C12N–C12P
4) C03N–C03P
9) C13N–C13P
5) C04N–C04P
10) C14N–C14P
The MVDD voltage is output between the pins of each pair.
The DC-DC converter does not allow connection of an element other than capacitor to these pins. Also no capacitor can be connected between the pins other than the above combinations.
VSC output pin
The DC-DC converter outputs the boosted voltage from the VSC pin. Connect this output to the HVDD pin
to supply the voltage to the EPD driver block. Be sure to connect between the VSC and HVDD pins outside,
as there is no wiring on the chip. Use 0.01 µF (recommended) if a capacitor is connected to the VSC pin (see
Chapter 5, “External Wiring Diagram”).
Do not supply power other than the VSC output to the HVDD pin of the EPD driver block.
4.2 MPU Interface Block
The MPU interface inputs display data from the MPU and outputs the drive signals to the EPD driver block.
Input signals
The MPU interface uses seven signals as shown below. These signals are all input from the MPU.
XCS (chip select signal)
When the XCS signal is set to ‘L’ (VSS), the SCK input is enabled and the MPU interface starts the data
shift register operation. When the signal is returned to ‘H’ (LVDD), the MPU interface latches input data.
SCK (clock signal)
The SCK clock signal is used for the data shift register operation. The MPU interface samples data input
from the SDAT[3:0] pins at the falling edge of the clock.
SDAT[3:0] (4-bit data signals)
The SDAT[3:0] signals are used to input 4-bit parallel data.
SEN (enable signal)
While the SEN signal is set to ‘H’ (LVDD), the latched data is sent to the EPD driver and output from the
EO pins.
6
EPSON
S1C05112 TECHNICAL MANUAL
4 FUNCTIONAL DESCRIPTION
Interface timing chart
MPU interface timing charts are shown below. See Section 6.5, “Interface AC Characteristics,” for details.
XCS
SCK
SDAT0
d.c.
EO0
EO4
EO8
EO112
EO116
EO120
d.c.
SDAT1
d.c.
EO1
EO5
EO9
EO113
EO117
EO121
d.c.
SDAT2
d.c.
EO2
EO6
EO10
EO114
EO118
EO122
d.c.
SDAT3
d.c.
EO3
EO7
EO11
EO115
EO119
EO123
d.c.
SEN
EO0
Hi-Z
H or L
EO1
Hi-Z
H or L
•••
EO123
Hi-Z
H or L
(d.c. = Don’t care condition)
Figure 4.2.1 MPU Interface Timing Chart 1
(1) The MPU interface inputs the XCS, SCK, SDAT[3:0], and SEN signals sent from the MPU in the established timings.
(2) The SDAT signals (4-bit parallel data) are shift registered at the SCK clock edge while the XCS signal is ‘L’
(VSS).
(3) The MPU interface generates up to 124 output data.
(4) When the MPU negates the XCS signal at an SCK falling edge, the MPU interface latches the data that has
been input to that point.
(5) When the MPU asserts the SEN signal, the latched data is sent to the EPD driver and output from the EO
pins.
If, for example, the EO112 to EO123 outputs only are required, set the XCS signal to ‘L’ (VSS) and the SEN
signal to ‘H’ (LVDD) after the EO112–EO115 data has been shift registered. The MPU interface outputs the
EO112–EO123 data at that point.
XCS
SCK
SDAT0
d.c.
EO112
EO116
EO120
d.c.
SDAT1
d.c.
EO113
EO117
EO121
d.c.
SDAT2
d.c.
EO114
EO118
EO122
d.c.
SDAT3
d.c.
EO115
EO119
EO123
d.c.
SEN
EO[123:112]
Hi-Z
H or L
(d.c. = Don’t care condition)
Figure 4.2.2 MPU Interface Timing Chart 2
S1C05112 TECHNICAL MANUAL
EPSON
7
4 FUNCTIONAL DESCRIPTION
4.3 EPD Driver Block
The EPD driver outputs the EPD drive signals according to data latched by the MPU interface as described above
from the EO pins while the SEN signal is set to ‘H’ (LVDD). The EO pin goes ‘H’ (HVDD) when drive data is 1 or
‘L’ (VSS) when drive data is 0. When the SEN signal is set to ‘L’ (VSS), all EO pins are placed into high impedance
state.
EO output timing chart
Each EO pin outputs ‘H’ (HVDD) or ‘L’ (VSS) levels only while the SEN signal is ‘H’ (LVDD) as shown below.
SEN
‘L’ (VSS)
‘H’ (LVDD)
‘L’ (VSS)
Hi-Z
‘H’ (HVDD) or ‘L’ (VSS)
Hi-Z
EO[123:0]
Figure 4.3.1 EO Output Timing Chart
4.4 Power Control (Standby) Function
The S1C05112 has a power control (standby) function for saving power. Two control pins (LO_ACT and
DD_ACD) are provided to control the logic power (for MPU interface block and low-voltage driver block) and the
DC-DC converter power individually.
Table 4.4.1 Standby Control
LO_ACT pin
H
H
L
DD_ACT pin
H
L
L
Logic power
Active
Active
Standby
DC-DC converter power Display on EPD
Active
Enabled
Standby
Disabled
Standby
Disabled
Data transfer
Enabled
Enabled
Disabled
(H = LVDD, L = VSS)
Note: Do not activate the DC-DC converter when the logic power is in standby state.
Logic power standby state
In this state, the power supply to the logic circuits (MPU interface block and low-voltage driver block) is disabled. The LVDD supply to the circuits other than the input buffers is shut off.
DC-DC converter power standby state
In this states, the MVDD supply to the DC-DC converter is shut off. So the voltage boost operation is stopped.
Note that the power voltage must be supplied to the LVDD pin even if the chip is in the standby state.
8
EPSON
S1C05112 TECHNICAL MANUAL
4 FUNCTIONAL DESCRIPTION
4.5 Control Sequence
4.5.1 Startup Sequence from Standby State
Data transfer period
SCK
t5
t5
Data transfer period
t1
XCS
SDAT[3:0]
SEN
t6
t6
EO[123:0]
LO_ACT
t3
t4
DCK
t2
DD_ACT
A
Item
XCS Setup time
DC-DC converter power supply start time
DCK input start time
VSC settling time ∗1
Data input period ∗2
Driver output settling time ∗3
Symbol
t1
t2
t3
t4
t5
t6
Min.
0
0
43.33
Recommended value
Half clock period (DCK•1/2)
15
650
6
Max.
9,750
Unit
ns
ns
ns
ms
µs
ms
∗1 Depends on the capacitor connected to the VSC pin.
∗2 Depends on the SCK frequency and the number of data.
∗3 Depends on the EPD size.
‘A’ in the timing chart indicates an operation to stabilize the driver lines and EPD voltage level. Set all driver outputs to VSS or VSC level in this period. However, this operation is not absolutely necessary, so it can be omitted.
Determine whether the operation is performed or not according to the EPD display condition.
S1C05112 TECHNICAL MANUAL
EPSON
9
4 FUNCTIONAL DESCRIPTION
4.5.2 Standby Sequence
t7
SCK
Data transfer period
t5
XCS
SDAT[3:0]
t3
t4
SEN
t1
t2
EO[123:0]
LO_ACT
DCK
t6
DD_ACT
Item
Driver output settling time ∗1
VSS level hold time of all driver outputs
DCK off time
XCS
DD_ACT off time
LO_ACT off time
Data input period ∗2
Symbol
t1
t2
t3
t4
t5
t6
t7
Min.
0
1
600
0
0
43.33
Recommended value
15
Max.
650
9,750
Unit
ms
ns
clock
ns
ns
ns
µs
∗1 Depends on the EPD size.
∗2 Depends on the SCK frequency and the number of data.
10
EPSON
S1C05112 TECHNICAL MANUAL
5 EXTERNAL WIRING DIAGRAM
5 External Wiring Diagram
Connection example 1
(When the S1C63808 EPD power supply circuit is used)
S1C05112
S1C63808
DCK
DD_ACT
LO_ACT
XCS
SCK
SEN
SDAT3
SDAT2
SDAT1
SDAT0
Pxx
Rxx
C1
C2
C3
C6
C7
EPD power supply circuit
VC1 = 0.99 V + 0.03 × N
(N = 0–7)
= 0.99 V to 1.20 V
VC3 = 3 × VC1
= 2.97 V to 3.60 V
VDD
VC3
C8
C9
C10
VDD
(1.3 V to 3.6 V)
C13 C12 C11
•••
C5
EPD panel
EO0
•••
C4
C00N
C00P
C01N
C01P
C02N
C02P
C03N
C03P
C04N
C04P
C10N
C10P
C11N
C11P
C12N
C12P
C13N
C13P
C14N
C14P
COM0
SEG[122:0]
EO123
LVDD
MVDD
VSC
HVDD
TEST1
TEST0
VSS
Recommended values
C1–C10: 0.047 µF to 0.068 µF
C11:
0 µF to 0.01 µF
C12:
0 µF to 0.1 µF
C13:
0.1 µF
For details of the S1C63808, refer to the “S1C63808 Technical Manual.”
S1C05112 TECHNICAL MANUAL
EPSON
11
5 EXTERNAL WIRING DIAGRAM
Connection example 2
(When the S1C63808 EPD power supply circuit is not used, or when an MPU other than the
S1C63808 is used)
S1C05112
S1C63xxx
DCK
DD_ACT
LO_ACT
XCS
SCK
SEN
SDAT3
SDAT2
SDAT1
SDAT0
Pxx
Rxx
C1
C2
C3
C6
C7
C8
C9
VDD
C10
VDD
(2.1 V to 3.1 V)
Note
C13 C11
LVDD
MVDD
VSC
HVDD
TEST1
TEST0
VSS
•••
C5
EPD panel
EO0
•••
C4
C00N
C00P
C01N
C01P
C02N
C02P
C03N
C03P
C04N
C04P
C10N
C10P
C11N
C11P
C12N
C12P
C13N
C13P
C14N
C14P
COM0
SEG[122:0]
EO123
Recommended values
C1–C10: 0.047 µF to 0.068 µF
C11:
0 µF to 0.01 µF
C13:
0.1 µF
Note: Select a power supply voltage so that the boosted voltage (HVDD) does not exceed the maximum
operating voltage of the EPD.
12
EPSON
S1C05112 TECHNICAL MANUAL
6 ELECTRICAL CHARACTERISTICS
6 Electrical Characteristics
6.1 Absolute Maximum Rating
(VSS = 0V)
Item
Supply voltage (1)
Supply voltage (2)
Supply voltage (3) ∗1
Input voltage
Operating temperature
Storage temperature
Permissible total output current ∗2
Symbol
LVDD
MVDD
HVDD
VI
Topr
Tstg
ΣIHVDD
Rated value
-0.5 to 4.5
-0.5 to 4.5
-0.5 to 22
-0.5 to LVDD + 0.3
-20 to 70
-65 to 150
10
Unit
V
V
V
V
°C
°C
mA
∗1 Power supply other than the DC-DC converter output (VSC) cannot be used.
∗2 The permissible total output current is the sum total of the current (average current) that simultaneously flows from
the output pin (or is drawn in).
6.2 Recommended Operating Conditions
(Ta = -20 to 70°C)
Item
Supply voltage (1)
Supply voltage (2) ∗1
Supply voltage (3) ∗1
Operating frequency (1)
Operating frequency (2)
Symbol
LVDD
MVDD
HVDD
DCK
SCK
Condition
VSS = 0V
LVDD = 1.0 to 3.6V
MVDD ≤ 3.33V
LO_ACT = DD_ACT = H (On)
LO_ACT = H, data transfer only
Min.
1.0
2.1
12
250
3.33
Typ.
3.0
3.0
18
500
50
Max.
3.6
3.6
20
1000
750
Unit
V
V
V
Hz
kHz
Typ.
Max.
LVDD
Unit
V
0
0.2•LVDD
V
0
0.5
V
-0.5
0
µA
-0.4
mA
mA
∗1 Use a voltage within the range that satisfies the EPD maximum voltage specification.
6.3 DC Characteristics
Unless otherwise specified: LVDD = MVDD = 3.0V, Vss = 0V, C1–C10 = 0.068µF
Item
Symbol
Condition
High level input voltage VIH
LO_ACT, DD_ACT, DCK, SCK, SDAT[3:0],
XCS, SEN
Low level input voltage VIL
LO_ACT, DD_ACT, DCK, SCK, SDAT[3:0],
XCS, SEN
High level input current IIH
VIH = 3.0V, LO_ACT, DD_ACT, DCK, SCK,
SDAT[3:0], XCS, SEN
Low level input current IIL
VIL = Vss, LO_ACT, DD_ACT, DCK, SCK,
SDAT[3:0], XCS, SEN
High level output current IOH
VOH = 0.9•HVDD : EO[123:0]
Low level output current IOL
VOL = 0.1•HVDD : EO[123:0]
S1C05112 TECHNICAL MANUAL
EPSON
Min.
0.8•LVDD
0.7
13
6 ELECTRICAL CHARACTERISTICS
6.4 Analog Circuit Characteristics and Power Current Consumption
Unless otherwise specified: LVDD = MVDD = 3.0V, Vss = 0V, DCK = 500Hz, C1–C10 = 0.068µF, Ta = 25°C
Item
EPD driver power voltage 1
EPD driver power voltage 2
VSC settling time
Driver output (EO) settling
time
Static current (LVDD)
Static current (MVDD)
Standby current (LVDD)
Standby current (MVDD)
Current consumption
in active state (LVDD)
Current consumption
in active state (MVDD)
Current consumption
in active state (MVDD)
Current consumption
in active state (MVDD)
Static current (HVDD)
Symbol
Condition
VSC1
IO = 10µA
VSC2
No load
TST1
10MΩ load, C11 = 0.01µF, time until the
output reaches 90% after DCK (= 500Hz)
is input
TST2
10MΩ load, C11 = 0.01µF, time until the
driver output becomes constant (95%
or more) after SEN is set to H
IQ1
LO_ACT = DD_ACT = LVDD,
LVDD = MVDD = 3.6V
IQ2
LO_ACT = DD_ACT = LVDD,
LVDD = MVDD = 3.6V
IHLT1
LO_ACT = DD_ACT = VSS,
LVDD = MVDD = 3.6V
IHLT2
LO_ACT = DD_ACT = VSS,
LVDD = MVDD = 3.6V
IEXE1
SCK = 50kHz
Min.
16.5
17.5
Typ.
17
17.7
5
Max.
17.5
17.9
15
Unit
V
V
ms
0.5
6
ms
10
100
nA
6
100
nA
2
100
nA
3
100
nA
13
16.3
µA
IEXE2
DCK = 500Hz, 10MΩ load
15
21
µA
IEXE3
DCK = 500Hz, no load
5
7.5
µA
IEXE4
DCK = 500Hz, 10MΩ load
15
21
µA
IQ3
LO_ACT = DD_ACT = LVDD,
LVDD = MVDD = 3.6V, HVDD = 18V
2
100
nA
DC-DC converter output (VSC) - load characteristic
The load characteristics change depending on the conditions. Use the following characteristic curve only for
reference and evaluation should be performed on the actual product.
LVDD = MVDD = 3.0V, DCK = 500Hz, Ta = RT
VSC output voltage - load characteristics
20
19
18
VSC [V]
17
16
15
14
13
12
11
10
14
0
5
10
15
Iload [µA]
EPSON
20
25
30
S1C05112 TECHNICAL MANUAL
6 ELECTRICAL CHARACTERISTICS
DC-DC converter output (VSC) - DCK frequency characteristic
The frequency characteristics change depending on the conditions. Use the following characteristic curve only
for reference and evaluation should be performed on the actual product.
LVDD = MVDD = 3.0V, Iload = 10µA, Ta = RT
VSC output voltage - DCK frequency characteristic
18
VSC [V]
17.5
17
16.5
16
250 300 350 400 450 500 550 600 650 700 750 800 850 900 950 1000
DCK [Hz]
DC-DC converter current consumption (MVDD) - DCK frequency characteristic
The frequency characteristics change depending on the conditions. Use the following characteristic curve only
for reference and evaluation should be performed on the actual product.
LVDD = MVDD = 3.0V, Iload = 0µA, Ta = RT
10
MVDD current consumption - DCK frequency characteristic (no load)
Current consumption [µA]
9
8
7
6
5
4
3
2
1
0
250 300 350 400 450 500 550 600 650 700 750 800 850 900 950 1000
DCK [Hz]
S1C05112 TECHNICAL MANUAL
EPSON
15
6 ELECTRICAL CHARACTERISTICS
6.5 Interface AC Characteristics
t1
SCK
1
t10
t1
t1
t1
t1
t1
t1
2
t1
t1
t1
3
t9
t1
31
32
t7
t6
XCS
t3
t4
t2
t2
t4
t4
t2
t5
t2
D[123:120]
D[119:116]
D[7:4]
D[3:0]
SDAT[3:0]
t4
t2
SEN
t8
EO[123:0]
Item
SCK
Data setup time (t2 ≤ t1)
Data input start time
Data alteration time
Data input end time (t5 < t9)
XCS
XCS
Driver settling time (at no load)
Driver output start time
Data input period
Symbol
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
Min.
0.666
0.3
0
0
0.3
-40
-40
20
0.6
43.33
Recommended value
10
5
5
5
5
0
0
Max.
150
40
40
10
650
9,750
Unit
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
Recommended timing
10µs
SCK
10µs
10µs
1
10µs
10µs
2
10µs
650µs
10µs
10µs
10µs
10µs
3
10µs
10µs
31
32
0µs
0µs
XCS
SDAT[3:0]
5µs 5µs
5µs 5µs
5µs 5µs
D[3:0]
5µs 5µs
5µs 5µs
D[119:116]
D[7:4]
5µs
D[123:120]
SEN
20µs
EO[123:0]
16
EPSON
S1C05112 TECHNICAL MANUAL
7 PACKAGE FOR TEST SAMPLES
7 Package for Test Samples
PGA-256pin (Ceramic)
(Unit: mm)
50.8
S1C05112 TECHNICAL MANUAL
φ0.46±0.05
Extra pin
Bottom View
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
1.27
2.54
3.3
1.52±0.15
50.8
INDEX
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
EPSON
17
7 PACKAGE FOR TEST SAMPLES
Pin No.
1
A1
2
D4
3
C2
4
D3
5
B1
6
E4
7
D2
8
E3
9
C1
10 F4
11 E2
12 F3
13 D1
14 G4
15 F2
16 G3
17 E1
18 H4
19 G2
20 H3
21 F1
22
J3
23 H2
24
J4
25 G1
26
J2
27 H1
28 K3
29
J1
30 K4
31 K1
32 K2
33
L1
34
L2
35 M1
36
L4
37 N1
38
L3
39 N2
40 M2
41 P1
42 M4
43 P2
44 M3
45 R1
46 N3
47 R2
48 N4
49 T1
50 P3
51 T2
52 R3
18
Pin name
N.C.
MVDD
N.C.
LVDD
N.C.
VSS
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
EO123
N.C.
EO122
N.C.
EO121
N.C.
EO120
N.C.
EO119
N.C.
EO118
N.C.
EO117
N.C.
EO116
N.C.
EO115
N.C.
EO114
N.C.
EO113
N.C.
EO112
N.C.
EO111
N.C.
EO110
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
Pin No.
53 U1
54 P4
55 U2
56 T3
57 V1
58 R4
59 V2
60 U3
61 W1
62 T4
63 W2
64 V3
65 Y1
66 U4
67 W3
68 V4
69 Y2
70 U5
71 W4
72 V5
73 Y3
74 U6
75 W5
76 V6
77 Y4
78 U7
79 W6
80 V7
81 Y5
82 U8
83 W7
84 V8
85 Y6
86 V9
87 W8
88 U9
89 Y7
90 W9
91 Y8
92 V10
93 Y9
94 U10
95 Y10
96 W10
97 Y11
98 W11
99 Y12
100 U11
101 Y13
102 V11
103 W13
104 W12
Pin name
N.C.
N.C.
N.C.
N.C.
N.C.
EO109
N.C.
EO108
N.C.
EO107
N.C.
EO106
EO105
EO104
EO103
EO102
EO101
EO100
EO99
EO98
EO97
EO96
EO95
EO94
EO93
EO92
EO91
EO90
EO89
EO88
EO87
EO86
EO85
EO84
EO83
EO82
EO81
EO80
EO79
EO78
EO77
EO76
N.C.
N.C.
N.C.
N.C.
EO75
EO74
EO73
EO72
EO71
EO70
Pin No.
105 Y14
106 U12
107 W14
108 V12
109 Y15
110 V13
111 W15
112 U13
113 Y16
114 V14
115 W16
116 V15
117 Y17
118 U14
119 W17
120 V16
121 Y18
122 U15
123 W18
124 V17
125 Y19
126 U16
127 W19
128 V18
129 Y20
130 U17
131 V19
132 U18
133 W20
134 T17
135 U19
136 T18
137 V20
138 R17
139 T19
140 R18
141 U20
142 P17
143 R19
144 P18
145 T20
146 N17
147 P19
148 N18
149 R20
150 M18
151 N19
152 M17
153 P20
154 M19
155 N20
156 L18
Pin name
EO69
EO68
EO67
EO66
EO65
EO64
EO63
EO62
EO61
EO60
EO59
EO58
EO57
EO56
EO55
EO54
EO53
EO52
EO51
EO50
EO49
EO48
EO47
EO46
N.C.
EO45
N.C.
EO44
N.C.
EO43
N.C.
EO42
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
EO41
N.C.
EO40
N.C.
EO39
N.C.
EO38
N.C.
EO37
EPSON
Pin No.
157 M20
158 L17
159 L20
160 L19
161 K20
162 K19
163 J20
164 K17
165 H20
166 K18
167 H19
168 J19
169 G20
170 J17
171 G19
172 J18
173 F20
174 H18
175 F19
176 H17
177 E20
178 G18
179 E19
180 F18
181 D20
182 G17
183 D19
184 E18
185 C20
186 F17
187 C19
188 D18
189 B20
190 E17
191 B19
192 C18
193 A20
194 D17
195 B18
196 C17
197 A19
198 D16
199 B17
200 C16
201 A18
202 D15
203 B16
204 C15
205 A17
206 D14
207 B15
208 C14
Pin name
N.C.
EO36
N.C.
EO35
N.C.
EO34
N.C.
EO33
N.C.
EO32
N.C.
EO31
N.C.
EO30
N.C.
EO29
N.C.
EO28
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
EO27
N.C.
EO26
N.C.
EO25
N.C.
EO24
EO23
EO22
EO21
EO20
EO19
EO18
EO17
EO16
EO15
EO14
EO13
EO12
EO11
EO10
EO9
EO8
Pin No.
209 A16
210 D13
211 B14
212 C13
213 A15
214 C12
215 B13
216 D12
217 A14
218 B12
219 A13
220 C11
221 A12
222 D11
223 A11
224 B11
225 A10
226 B10
227 A9
228 D10
229 A8
230 C10
231 B8
232 B9
233 A7
234 D9
235 B7
236 C9
237 A6
238 C8
239 B6
240 D8
241 A5
242 C7
243 B5
244 C6
245 A4
246 D7
247 B4
248 C5
249 A3
250 D6
251 B3
252 C4
253 A2
254 D5
255 B2
256 C3
Pin name
EO7
EO6
EO5
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S1C05112 TECHNICAL MANUAL
International Sales Operations
AMERICA
ASIA
EPSON ELECTRONICS AMERICA, INC.
EPSON (CHINA) CO., LTD.
7F, Jinbao Bldg., No.89 Jinbao St., Dongcheng District
Beijing 100005, CHINA
Phone: +86-10-6410-6655
Fax: +86-10-6410-7320
HEADQUARTERS
2580 Orchard Parkway
San Jose, CA 95131, U.S.A.
Phone: +1-800-228-3964
Fax: +1-408-922-0238
SALES OFFICE
Northeast
301 Edgewater Place, Suite 210
Wakefield, MA 01880, U.S.A.
Phone: +1-800-922-7667
Fax: +1-781-246-5443
EUROPE
EPSON EUROPE ELECTRONICS GmbH
HEADQUARTERS
Riesstrasse 15 Muenchen Bayern
80992 GERMANY
Phone: +49-89-14005-0
Fax: +49-89-14005-110
SHANGHAI BRANCH
7F, Block B, Hi-Tech Bldg., 900, Yishan Road
Shanghai 200233, CHINA
Phone: +86-21-5423-5522
Fax: +86-21-5423-5512
EPSON HONG KONG LTD.
20/F, Harbour Centre, 25 Harbour Road
Wanchai, Hong Kong
Phone: +852-2585-4600
Fax: +852-2827-4346
Telex: 65542 EPSCO HX
EPSON (CHINA) CO., LTD.
SHENZHEN BRANCH
12/F, Dawning Mansion, Keji South 12th Road
Hi-Tech Park, Shenzhen
Phone: +86-755-2699-3828
Fax: +86-755-2699-3838
EPSON TAIWAN TECHNOLOGY & TRADING LTD.
14F, No. 7, Song Ren Road
Taipei 110
Phone: +886-2-8786-6688
Fax: +886-2-8786-6660
EPSON SINGAPORE PTE., LTD.
1 HarbourFront Place
#03-02 HarbourFront Tower One, Singapore 098633
Phone: +65-6586-5500
Fax: +65-6271-3182
SEIKO EPSON CORPORATION
KOREA OFFICE
50F, KLI 63 Bldg., 60 Yoido-dong
Youngdeungpo-Ku, Seoul, 150-763, KOREA
Phone: +82-2-784-6027
Fax: +82-2-767-3677
GUMI OFFICE
2F, Grand B/D, 457-4 Songjeong-dong
Gumi-City, KOREA
Phone: +82-54-454-6027
Fax: +82-54-454-6093
SEIKO EPSON CORPORATION
SEMICONDUCTOR OPERATIONS DIVISION
IC Sales Dept.
IC International Sales Group
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: +81-42-587-5814
Fax: +81-42-587-5117
S1C05112
Technical Manual
SEMICONDUCTOR OPERATIONS DIVISION
EPSON Electronic Devices Website
http://www.epson.jp/device/semicon_e
Document code: 411004402
First issue April, 2007
Printed October, 2008 in Japan
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A
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