RZ/A1H Group CMSIS-RTOS RTX BSP V2.03 KPIT GCC Release

RZ/A1H Group CMSIS-RTOS RTX BSP V2.03 KPIT GCC Release

APPLICATION NOTE

RZ/A1H Group

CMSIS-RTOS RTX BSP

V2.03 KPIT GCC

release note

R01AN2526EJ0203

Rev.2.03

Jul 17, 2015

Introduction

This document describes the RZ/A1H CMSIS-RTOS RTX BSP (which is a package hereinafter called the

BSP).

Operation Check Boards

Renesas Starter Kit+ for RZ/A1H (YR0K77210S003BE)

History of Changes to the Previous Versions

Ver. No. Type

V2.03 1 ALL

2

3

4

5

6

7

8

9

DMA

IOIF, SCIF

RIIC

SCIF

SCUX

SOUND,

RIIC_CH3

10 Sample program

Description Remarks

Fixed an issue where it was lacking in a dummy reading procedure of a stand-by control register after module stop release.

Fixed an issue which doesn't control exclusion when calling API from an interrupt context.

Fixed an issue which doesn't control exclusion when calling free function.

Fixed an issue which sometimes makes the restart condition occur twice in case of continuous transfer.

Fixed the error return processing in case of continuous transfer.

Fixed an issue which forwarded at DMA channel 0, not an unused DMA channel when specified DMA transmission.

Fixed an issue which after the initialization release of SRC, head of the data that converted by SRC becomes mute.

Fixed an issue which after calling

SCUX_IOCTL_SET_FLUSH_STOP, tail of the data that converted by SRC isn't output.

Added RIICH_CH3 driver.

Changed the RIIC communication of a

SOUND driver to a calling of RIIC_CH3 driver.

Changed the procedure of flash writing.

The procedure which waits for input of "y" before flash writing was eliminated.

See "5.Restrictions"

See "3.5.3 Serial Flash

Write"

See "3.6.3 NOR Flash

Write"

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RZ/A1H Group CMSIS-RTOS RTX BSP V2.03 KPIT GCC release note

11

12

13

14

15

16

17

18

19

20

21

22

V2.02 1

Kernel_HW dependance

Fixed heap start address judgement processing.

The end symbol in the linker script file was made same as start address of heap.

Fixed heap termination address judgement processing.

A return value of the _top_of_heap function was corrected in the address of the

__heap_end symbol from the SP register value.

Fixed an issue which sometimes aborted when copying initial values of global variables.

Added a processing which initialize global constructor of C++.

The declaration for init_array is being added to the linker script file and a calling of the constructor initialization function is being added to the __libc_init_array function.

Changed the file name of the library.

Added prefix lib to the file name of the library, and the way of a link was changed to a "-l" option of a linker.

A file of a platform and compiler dependence was put in order.

The function of the platform and compiler dependence was added to the existence file of CMSIS-RTOS RTX.

Moved such function to a GCC folder of sample program.

Fixed an issue which aborted when setting

OS_RUNPRIV as 0 in RTX_Conf_CM.c in the sample project folder.

A transfer order to the sleep mode in the Idle thread was changed for the processing which considered use of a software stand-by mode.

Fixed an issuhe which the following inline assembler function will be the empty function when a compiler was optimized effectively.

__set_SP, __get_LR, __set_LR

Fixed an issuhe which generated a linker error when the following inline assembler function was used.

__enable_fault_irq, __disable_fault_irq

OS update: Corresponding to NEON.

Corrected file: Linker script file of a sample folder.

Corrected file:

GCC/newheap.c of a sample folder

Corrected file: Linker script file of a sample folder.

Corrected file: The following file of a sample folder.

Linker script file

GCC/cstartup.c

Corrected file: .cproject of a sample folder.

Corrected file: system_Renesas_RZ_A1.

c of a sample folder.

Corrected file:

RTX_Conf_CM.c of a sample folder.

The reference document :RZ/A1H user's manual hardware

Rev.2.00 "55.3.1 Sleep

Mode"

Corrected file :Include/core_caFunc.

h

Corrected file :Include/core_caFunc.

h

Corrected file: OS and system_Renesas_RZ_A1.

c of a sample folder.

Corrected file: OS. OS update: Corresponding to Tick-less operation.

VDC5(Display) Update the version of RZ/A1H Group Video

Display Controller 5 Driver, in Ver.1.00

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RZ/A1H Group

2

3

Sample program

Kernel_HW dependence

4

5

6

7

V2.01

a

- -

CMSIS-RTOS RTX BSP V2.03 KPIT GCC release note

Support NOR flash boot(ULINK2 write)

Fixed an issue where not waiting for a status change after L2 cache operation

Fixed an issue where a data abort error occurs when interrupt ID is 1022 or 1023

Add restrictions(No.1,No.2)

Fixed an issue where use register s0-s3 of

VFP instead of general r0-r3 when set option

"-mfloat-abi=hard" in compiler.

Fixed an issue where not replace the stack size of main thread changed

OS_MAINSTKSIZE in RTX_Conf_CM.c. new

See "5.Restrictions"

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RZ/A1H Group

Table of Contents

CMSIS-RTOS RTX BSP V2.03 KPIT GCC release note

1.

Package Contents ............................................................................................................................. 5

2.

Folder Structure ................................................................................................................................. 7

3.

Information about the BSP ................................................................................................................ 8

4.

About the additional header files for the KPIT GCC optional library ............................................... 18

5.

Restrictions ...................................................................................................................................... 19

6.

Precautions ..................................................................................................................................... 20

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RZ/A1H Group CMSIS-RTOS RTX BSP V2.03 KPIT GCC release note

1. Package Contents

This package contains the following items:

1.1 Software

- Source codes

No. Name

1 A set of BSP source codes

Folder name

CMSIS_RTOS_RTX_RSK_GCC

- Additional header files for the KPIT GCC optional library

No. Name

1 Additional header files for the KPIT GCC optional library

File/folder name

Software/KPIT/optlibinc/*.h

1.2 Documents

- Manuals

No. Title

1 RZ/A1H CMSIS-RTOS RTX BSP

V2.03 KPIT GCC release note

Revision

No.

File name

Rev.2.03 [J] r01an2526jj0203_rza1h.pdf

[E] r01an2526ej0203_rza1h.pdf

(this document)

Rev.1.01 [J] r01us0135jj0101_rza1h.pdf

[E] r01us0135ej0101_rza1h.pdf

2 RZ/A1H CMSIS-RTOS RTX BSP

BSP(Kernel_HW dependence)

KPIT GCC User's Manual

3 RZ/A1H CMSIS-RTOS RTX BSP

DMA Driver KPIT GCC

User's Manual

4 RZ/A1H CMSIS-RTOS RTX BSP

RIIC Driver KPIT GCC

User's Manual

5 RZ/A1H CMSIS-RTOS RTX BSP

RSPI Driver KPIT GCC

User's Manual

6 RZ/A1H CMSIS-RTOS RTX BSP

SCIF Driver KPIT GCC

User's Manual

7 RZ/A1H CMSIS-RTOS RTX BSP

SSIF Driver KPIT GCC

User's Manual

8 RZ/A1H CMSIS-RTOS RTX BSP

ADC Driver KPIT GCC

User's Manual

9 RZ/A1H CMSIS-RTOS RTX BSP potentiometer Sample KPIT GCC

Application Note

10 RZ/A1H CMSIS-RTOS RTX BSP

VDC5 (Display) Sample KPIT GCC

Application Note

11 Video Display Controller 5 Driver User's

Manual

Rev.1.01 [J] r01us0137jj0101_rza1h.pdf

[E] r01us0137ej0101_rza1h.pdf

Rev.1.01 [J] r01us0138jj0101_rza1h.pdf

[E] r01us0138ej0101_rza1h.pdf

Rev.1.01 [J] r01us0139jj0101_rza1h.pdf

[E] r01us0139ej0101_rza1h.pdf

Rev.1.01 [J] r01us0140jj0101_rza1h.pdf

[E] r01us0140ej0101_rza1h.pdf

Rev.1.01 [J] r01us0142jj0101_rza1h.pdf

[E] r01us0142ej0101_rza1h.pdf

Rev.1.00 [J] r01us0136jj0100_rza1h.pdf

[E] r01us0136ej0100_rza1h.pdf

Rev.1.00 [J] r01an2525jj0100_rza1h.pdf

[E] r01an2525ej0100_rza1h.pdf

Rev.1.00 [J] r01an2523jj0100_rza1h.pdf

[E] r01an2523ej0100_rza1h.pdf

Rev.1.00 [J] r01an1822jj0100_rza1h.pdf

[E] r01an1822ej0100_rza1h.pdf

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RZ/A1H Group CMSIS-RTOS RTX BSP V2.03 KPIT GCC release note

12 Digital Video Decoder Driver User's

Manual

13 RZ/A1H CMSIS-RTOS RTX BSP

SCUX Driver KPIT GCC

User's Manual

14 RZ/A1 Group

CMSIS-RTOS RTX KPIT GCC

Expansion Guide

15 RZ/A1H CMSIS-RTOS RTX BSP

IOIF KPIT GCC

User's Manual

16 RZ/A1H CMSIS-RTOS RTX BSP

SOUND Driver KPIT GCC

Application Note

17 RZ/A1H CMSIS-RTOS RTX BSP

RIIC CH3 Driver KPIT GCC

Application Note

Rev.1.00

Rev.1.01

Rev.1.00

Rev.1.00

Rev.1.01

Rev.1.00

[J] r01an1823jj0100_rza1h.pdf

[E] r01an1823ej0100_rza1h.pdf

[J] r01us0141jj0101_rza1h.pdf

[E] r01us0141ej0101_rza1h.pdf

[J] r01us2520jj0100_rza1h.pdf

[E] r01us2520ej0100_rza1h.pdf

[J] r01an2521jj0100_rza1h.pdf

[E] r01an2521ej0100_rza1h.pdf

[J] r01an2524jj0101_rza1h.pdf

[E] r01an2524ej0101_rza1h.pdf

[J] r01an2641jj0100_rza1h.pdf

[E] r01an2641ej0100_rza1h.pdf

- Sample operation procedures

No. Sample name File name

Storage destination

1 ex1 [J] readme_j.txt, readme_sfwrite_j.txt, readme_nfwrite_j.txt

[E] readme_e.txt, readme_sfwrite_e.txt, readme_nfwrite_e.txt

2 ADC

RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_RSK¥RenesasBSP_example¥ex1

[J] readme_j.txt, readme_sfwrite_j.txt, readme_nfwrite_j.txt

[E] readme_e.txt, readme_sfwrite_e.txt, readme_nfwrite_e.txt

RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_RSK¥RenesasBSP_example¥ADC¥sample

1

3 SCUX

4 VDC5

(Display)

[J] readme_j.txt, readme_sfwrite_j.txt, readme_nfwrite_j.txt

[E] readme_e.txt, readme_sfwrite_e.txt, readme_nfwrite_e.txt

RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_RSK¥RenesasBSP_example¥SCUX¥sampl e1

[J] readme_j.txt, readme_sfwrite_j.txt, readme_nfwrite_j.txt

[E] readme_e.txt, readme_sfwrite_e.txt, readme_nfwrite_e.txt

RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_RSK¥RenesasBSP_example¥Display¥sam ple1

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RZ/A1H Group CMSIS-RTOS RTX BSP V2.03 KPIT GCC release note

2. Folder Structure

Below are the folder structure for this package and details about its contents.

Top

+-- Documentation

| +-- ReleaseNote

| +-- Specification

+-- Software

+-- BSP

| +-- CMSIS_RTOS_RTX_RSK_GCC

: Release note

: Documents (see Section 1.2.)

: BSP source folder

| | .project

| +-- Include

| +-- RTOS

| +-- RTX

| +-- Boards

| | +-- Renesas

| | +--RZ_A1H_RSK

| | +-- INC

| | +-- iodefines

| | +-- RenesasBSP

| | | | version.txt

| | | +-- drv_inc

| | | +-- drv_lib

| | | +-- drv_src

| | | +-- adc

| | | +-- display

| | | +-- dma

| | | +-- ioif

| | | +-- riic

| | | +-- riic_ch3

| | | +-- rspi

| | | +-- scif

| | | +-- scux

| | | +-- sound

| | | +-- ssif

| | +-- RenesasBSP_example

: Common header

: Chip dependence header

: BSP driver

: BSP version information

: Driver header

: Driver library

: ADC driver

: VDC5 (Display) driver

: DMA driver

: IOIF

: RIIC driver

: RIIC CH3 driver

: RSPI driver

: SCIF driver

: SCUX driver

: SOUND driver

: SSIF driver

: BSP sample TOP

| | +-- ADC

| | | +-- sample1

| | +-- Display

| | | +-- library

: Main body of the potentiometer sample program

: Main body of the VDC5 (Display) sample program

: VDC5 (Display) sample driver

: VDC5 (Display) operation sample program | | | +-- sample1

| | +-- ex1

| | +-- ForNFlash

| | +-- ForSFlash

| | +-- inc

| | +-- lib

: Main body of the ex1 sample program

: NFlash write tool (for ULINK2)

: SFlash write tool (for ULINK2)

: Common header for the samples

: Common library for the samples

| | +-- SCUX

| | +-- sample1: Main body of the SCUX driver operation sample program

| +-- INC

| +-- LIB

| +-- SRC

+-- KPIT

+-- optlibinc : KPIT GCC optlib library additional files

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RZ/A1H Group CMSIS-RTOS RTX BSP V2.03 KPIT GCC release note

3. Information about the BSP

The requirements for using the BSP source codes are as follows.

3.1 Software

 Base OS

RTX for Cortex-A9 (24th February 2015)

 Drivers

IOIF, DMA, SCIF, SSIF, RSPI, RIIC, RIIC_CH3, ADC, SCUX, SOUND, VDC5 (Display)

 Samples ex1, ADC, SCUX, VDC5 (Display), potentiometer

3.2 Tools

 Build environment

 IDE

DS-5 (V5.16)

 development tools

KPIT GNU Tools GNUARM-RZ

 Execution environment

ULINK2 (v2.01)

3.3 Hardware

 Device

RZ/A1H

 Target board

 Board name

Renesas Starter Kit+ for RZ/A1H (YR0K77210S003BE)

 Operation mode

Clockin = 13.33 MHz, CKIO = 66.67 MHz

I Clock = 400.00 MHz

G Clock = 266.66 MHz

B Clock = 133.33 MHz

P1 Clock = 66.67 MHz

P0 Clock = 33.33 MHz

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 Setup method

*For information about the positions of the jumpers and switches, refer to "RZ/A1H Group

Renesas Starter Kit+ User's Manual For DS-5" of the Target Board Package.

Table 1 Connector Hookup

Part No. Connected equipment

CN20

CN18

CN14

CN5

Speaker (headset)

USB serial cable

JTAG cable

AC adapter

Table 2 Debug Serial Port Settings

Baud rate 115200

Character length 8 bits

Parity None

Stop bit

Flow control

Line feed code

1 bit

None

CR

Table 3 Target Board Jumper Settings

Setting

Jumper

Boot mode 0 Boot mode 3

JP11

JP22

JP18

JP21

PWR SEL

1-2

1-2

1-2

1-2

2-3

1-2

1-2

1-2

1-2

2-3

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Table 4 Target Board Switch Settings (SW4)

DIP switch

SW4-1

SW4-2

SW4-3

SW4-4

SW4-5

SW4-6

SW4-7

Setting

Boot mode 0

OFF

Boot mode 3

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

SW4-8 OFF OFF

Table 5 Target Board Switch Settings (SW6)

Setting

DIP switch

Boot mode 0 Boot mode 3

SW6-1

SW6-2

SW6-3

SW6-4

SW6-5

SW6-6

ON

ON

ON

ON

ON

ON

OFF

ON

OFF

ON

ON

ON

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3.4 ex1 Sample Operation Check (On-chip RAM Download)

* Before Building, see the "4. About the additional header files for the KPIT GCC optional library"

3.4.1 Build Process

1. Create a new DS-5 workspace*1.

A) Create a work folder*2 in an arbitrary position.(You can decide the folder name freely)

B) Copy the source files (all the file groups under the BSP source folder) to the folder created in step A). e.g.) The folder structure when making the work folder "C:¥Workspase".

C:

+-- Workspace

+--CMSIS_RTOS_RTX_RSK_GCC

| .project

+-- Include

+-- RTOS

The file group under the BSP source folder

C) Start DS-5.

D) Select the [File] menu --> [Switch Workspace] --> [Other...].

E) Click [Browse...] in the [Workspace Launcher] dialog box.

F) Select the folder created in step A). Then, click [OK].

G) DS-5 automatically restarts and the [Welcome to DS-5] screen appears.

H) Close the [Welcome to DS-5] screen.

*1:Even if there is an existing workspace, be sure to create a new one instead of using the existing work space.

*2: be sure to create a work folder in the place near the route of a drive so that the number

restrictions of characters of the pathname of Windows (260 characters) may not be exceeded.

2. Select the [Window] menu --> [Show View] --> [Project Explorer].

3. Right-click the [Project Explorer] view and select [Import...]

4. In the [Select an import source] of [Import] dialog box, select [General] --> [Existing Projects into

Workspace]. Then, click the [Next] button.

5. In the [Import] dialog box, check [Select root directory] and then click [Browse...].

6. In the [Reference Folder] dialog box, select the source-file copy destination (folder name created in step 1-A)) and then click [OK].

7. Check "CMSIS_RTOS_RTX_RSK_GCC" is selected in the [Projects] list and then click [OK] in the

[Import] dialog box.

8. Remove the check mark from [Copy projects into workspace] in the [Import] dialog box.

9. Click [Finish] in the [Import] dialog box.

10. Again, right-click the [Project Explorer] view and select [Import...]

11. In the [Select an import source] of [Import] dialog box, select [General] --> [Existing Projects into

Workspace]. Then, click the [Next] button.

12. In the [Import] dialog box, check [Select root directory] and then click [Browse...].

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13. In the [Reference Folder] dialog box, select a "RTOS" folder which is under the

"CMSIS_RTOS_RTX_RSK_GCC" folder and then click [OK].

14. Click [Deselect All] in the [Import] dialog box.

15. Add check marks only to these items in the [Projects] list:

- DMA_drv

- ex1

- IOIF

- RIIC_CH3_drv

- RIIC_drv

- RTX_CA9_L

- SCIF_drv

- SOUND_drv

- SSIF_drv

16. Remove the check mark from [Copy projects into workspace] in the [Import] dialog box.

17. Click [Finish] in the [Import] dialog box.

18. Right-click the "ex1" project displayed in the [Project Explorer] view. Then, select [Clean Project]

19. Right-click like step 18 and then click [Build Project].

The file below is created.

RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_RSK¥RenesasBSP_example¥ex1¥ex1.axf

3.4.2 Connection Setup for Debug

Note: Before completing the connection, create an executable file for the ex1 sample (by referring to

Section 3.4.1 Build Process).

*Take the steps below while the C/C++ perspective is displayed.

1. Connect ULINK2 to the target board and PC.

2. Start DS-5.

3. Select [Run] --> [Debug Configurations...].

4. Select [

ex1-RZ_A1H_RSK

] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box.

5. Select the [Connection] tab. Select "Debug Cortex-A9" as a target (see below).

Renesas

--> RZ/A1H R7S721001

--> Bare Metal Debug

--> Debug Cortex-A9

6. In the [Connection] tab, select "ULINK2" for Target Connection.

7. In the [Connection] tab, click "Browse..." (on the lower right of the screen) for connection.

8. Select the desired connection destination from among the candidate destinations displayed in the

[Connection Browser] dialog box (if one device is to be connected, only one candidate destination is displayed). Then, click [Select].

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9. Click [Apply].

10. Click [Close].

3.4.3 Sample Execution

*The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for

boot mode 0

.

*Take the steps below while the DS-5 Debug perspective is displayed.

1. Connect speaker to CN20 of a CPU board and connect PC to CN18 of a CPU board by USB serial cable.

2. Start DS-5.

3. Select [Run] --> [Debug Configurations...].

4. Select [

ex1-RZ_A1H_RSK

] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box.

Then, click [Debug]. (The target board and ULINK2 are connected and the downloading of the executable file begins.)

5. Click the [Continue] button (green playback mark) in the [Debug Control] view.

3.4.4 Sample Execution Result

The execution of the sample begins. Confirm the execution results by using the USB serial cable output connected to CN18.

There should be sounds coming from the speakers connected to CN20 ("MIGI" from the right side and

"HIDARI" from the left side). (They should be repeated three times.)

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3.5 ex1 Sample Operation Check (Serial Flash Boot)

* Before Building, see the "4. About the additional header files for the KPIT GCC optional library"

3.5.1 Build Process

1.

Perform steps 1 through 17 described in Section 3.4.1.

2. Right-click the "ex1" project displayed in the [Project Explorer] view. Then, select [Properties]

3. Select [Settings] for [C/C++ Build] in the [Properties] dialog box.

4. In the [Tool Settings] tab, select [GCC Linker] --> [General].

5. [Add linker script file(-T FILE)], set the path below

${ProjDirPath}/${ProjName}_sflashboot.ld

6. Right-click "ex1" project displayed in the [Project Explorer] view. Then click [Clean Project]

7. Right-click like step 6 and then click [Project] menu --> [Build All].

The file below is created.

RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_RSK¥RenesasBSP_example¥ex1¥FlashImage¥ex1.bin

3.5.2 Connection Setup for Serial Flash Write

Note: Before completing the connection, create an executable file for the ex1 sample (by referring to

Section 3.5.1 Build Process).

*Take the steps below while the C/C++ perspective is displayed.

1. Connect ULINK2 to the target board and PC.

2. Start DS-5.

3. Select [Run] --> [Debug Configurations...].

4. Select [

ex1_SFWrite-RZ_A1H_RSK

] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box.

5. Select the [Connection] tab. Select "Debug Cortex-A9" as a target (see below).

Renesas

--> RZ/A1H R7S721001

--> Bare Metal Debug

--> Debug Cortex-A9

6. In the [Connection] tab, select "ULINK2" for Target Connection.

7. In the [Connection] tab, click "Browse..." (on the lower right of the screen) for connection.

8. Select the desired connection destination from among the candidate destinations displayed in the

[Connection Browser] dialog box (if one device is to be connected, only one candidate destination is displayed). Then, click [Select].

9. Click [Apply].

10. Click [Close].

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3.5.3 Serial Flash Write

*The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for

boot mode 3

.

*Take the steps below while the DS-5 Debug perspective is displayed.

1. Start DS-5.

2. Select [Window] --> [Show View] --> [App Console]. (The [App Console] view appears.)

3. Select [Run] --> [Debug Configurations...].

4. Select [

ex1_SFWrite-RZ_A1H_RSK

] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box. Then, click [Debug]. (The target board and ULINK2 are connected and the downloading of the binary file begins.)

5. The message below appears in the [App Console] view, indicating that the write operation has been completed.

Flash Programming Complete

6. Select [Window] --> [Show View] --> [Debug Control].

7. In the [Debug Control] view, select [

ex1_SFWrite-RZ_A1H_RSK

] and right-click. Select [Disconnect from Target]. (ULINK2 is disconnected from the target.)

8. Power off the target board.

3.5.4 Sample Execution

*The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for

boot mode 3

.

1. Connect speaker to J6 of a CPU board and connect PC to CN18 of a CPU board by USB serial cable.

2. Power on the target board.

3.5.5 Sample Execution Result

The execution of the sample begins. Confirm the execution results by using the USB serial cable output connected to CN18.

There should be sounds coming from the speakers connected to CN20 ("MIGI" from the right side and

"HIDARI" from the left side). (They should be repeated three times.)

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3.6 ex1 Sample Operation Check (NOR Flash Boot)

* Before Building, see the "4. About the additional header files for the KPIT GCC optional library"

3.6.1 Build Process

1.

Perform steps 1 through 17 described in Section 3.4.1.

2. Right-click the "ex1" project displayed in the [Project Explorer] view. Then, select [Properties]

3. Select [Settings] for [C/C++ Build] in the [Properties] dialog box.

4. In the [Tool Settings] tab, select [GCC Linker] --> [General].

5. [Add linker script file(-T FILE)], set the path below.

${ProjDirPath}/${ProjName}_nflashboot.ld

6. Right-click "ex1" project displayed in the [Project Explorer] view. Then click [Clean Project]

7. Right-click like step 6 and then click [Project] menu --> [Build All].

The file below is created.

RTOS¥RTX¥Boards¥Renesas¥RZ_A1H_RSK¥RenesasBSP_example¥ex1¥FlashImage¥ex1.bin

3.6.2 Connection Setup for Serial Flash Write

Note: Before completing the connection, create an executable file for the ex1 sample (by referring to

Section 3.6.1 Build Process).

*Take the steps below while the C/C++ perspective is displayed.

1. Connect ULINK2 to the target board and PC.

2. Start DS-5.

3. Select [Run] --> [Debug Configurations...].

4. Select [

ex1_NFWrite-RZ_A1H_RSK

] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box.

5. Select the [Connection] tab. Select "Debug Cortex-A9" as a target (see below).

Renesas

--> RZ/A1H R7S721001

--> Bare Metal Debug

--> Debug Cortex-A9

6. In the [Connection] tab, select "ULINK2" for Target Connection.

7. In the [Connection] tab, click "Browse..." (on the lower right of the screen) for connection.

8. Select the desired connection destination from among the candidate destinations displayed in the

[Connection Browser] dialog box (if one device is to be connected, only one candidate destination is displayed). Then, click [Select].

9. Click [Apply].

10. Click [Close].

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3.6.3 NOR Flash Write

*The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for

boot mode 0

.

*Take the steps below while the DS-5 Debug perspective is displayed.

1. Start DS-5.

2. Select [Window] --> [Show View] --> [App Console]. (The [App Console] view appears.)

3. Select [Run] --> [Debug Configurations...].

4. Select [

ex1_NFWrite-RZ_A1H_RSK

] in the "DS-5 Debugger" list in the [Debug Configurations] dialog box. Then, click [Debug]. (The target board and ULINK2 are connected and the downloading of the binary file begins.)

5. The message below appears in the [App Console] view, indicating that the write operation has been completed.

Flash Programming Complete

6. Select [Window] --> [Show View] --> [Debug Control].

7. In the [Debug Control] view, select [

ex1_NFWrite-RZ_A1H_RSK

] and right-click. Select [Disconnect from Target]. (ULINK2 is disconnected from the target.)

8. Power off the target board.

3.6.4 Sample Execution

*The jumpers and switches on the target board should be in the positions shown in Tables 3 through 5 for

boot mode0

.

1. Connect speaker to CN20 of a CPU board and connect PC to CN18 of a CPU board by USB serial cable.

2. Power on the target board.

3.6.5 Sample Execution Result

The execution of the sample begins. Confirm the execution results by using the USB serial cable output connected to CN18.

There should be sounds coming from the speakers connected to CN20 ("MIGI" from the right side and

"HIDARI" from the left side). (They should be repeated three times.)

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4. About the additional header files for the KPIT GCC optional library

This BSP use the KPIT GNU Tools GNUARM-RZ optional library for build. Before building, you must copy some header files to under "/optlibinc" directory of the GNUARM-RZ.

In this document, it is assumed that the KPIT GNU Tools v14.01 is installed in the "C:/Program

Files/KPIT/GNUARM-RZv14.01-EABI/".If installed in other directory, a read substitute is performed suitably.

Copy Source:

(Top of this package)/Software/KPIT/optlibinc/

Copy Destination:

C:/Program Files/KPIT/GNUARM-RZv14.01-EABI/arm-rz-eabi/arm-rz-eabi/arm-rz-eabi/optlibinc/

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5. Restrictions

No. Type Precaution

1 Standard C library

The KPIT GNU Tools GNUARM-RZ's Standard C library is non-correspondence in multi-threading.

When execute the library function at the same time from more than one threads, a processing result is unsettled.

When using the library function which operates the heap such as malloc, calloc, realloc and etc., please execute in the state of the interrupt disabled to prevent a thread change.

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6. Precautions

No. Type

1 Kernel_HW dependence

Precaution

Both the debug serial port (printf output destination) and the SCIF driver's channel 2 use the same port. Note that opening channel 2 results in contention.

2 SCUX,

SSIF

If an SSIF channel is selected as the output destination with the SCUX driver, opening this channel with the SSIF driver results in contention. Thus, use exclusive mode for channel access.

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Website and Support

Renesas Electronics Website http://www.renesas.com/

Inquiries http://www.renesas.com/contact/

All trademarks and registered trademarks are the property of their respective owners.

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Revision History

Rev.

1.00

2.03

Date

Dec 26, 2014

Jul 17, 2015

Page

-

-

First Edition issued

V2.03 is released.

Description

Summary

A-1

General Precautions in the Handling of MPU/MCU Products

The following usage notes are applicable to all MPU/MCU products from Renesas. For detailed usage notes on the products covered by this document, refer to the relevant sections of the document as well as any technical updates that have been issued for the products.

1. Handling of Unused Pins

Handle unused pins in accordance with the directions given under Handling of Unused Pins in the manual.

 The input pins of CMOS products are generally in the high-impedance state. In operation with an unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of LSI, an associated shoot-through current flows internally, and malfunctions occur due to the false recognition of the pin state as an input signal become possible. Unused pins should be handled as described under Handling of Unused Pins in the manual.

2. Processing at Power-on

The state of the product is undefined at the moment when power is supplied.

 The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the moment when power is supplied.

In a finished product where the reset signal is applied to the external reset pin, the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed.

In a similar way, the states of pins in a product that is reset by an on-chip power-on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified.

3. Prohibition of Access to Reserved Addresses

Access to reserved addresses is prohibited.

 The reserved addresses are provided for the possible future expansion of functions. Do not access these addresses; the correct operation of LSI is not guaranteed if they are accessed.

4. Clock Signals

After applying a reset, only release the reset line after the operating clock signal has become stable.

When switching the clock signal during program execution, wait until the target clock signal has stabilized.

 When the clock signal is generated with an external resonator (or from an external oscillator) during a reset, ensure that the reset line is only released after full stabilization of the clock signal.

Moreover, when switching to a clock signal produced with an external resonator (or by an external oscillator) while program execution is in progress, wait until the target clock signal is stable.

5. Differences between Products

Before changing from one product to another, i.e. to a product with a different part number, confirm that the change will not lead to problems.

 The characteristics of an MPU or MCU in the same group but having a different part number may differ in terms of the internal memory capacity, layout pattern, and other factors, which can affect the ranges of electrical characteristics, such as characteristic values, operating margins, immunity to noise, and amount of radiated noise. When changing to a product with a different part number, implement a system-evaluation test for the given product.

Notice

1.

Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information.

2.

Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein.

3.

Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others.

4.

You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from such alteration, modification, copy or otherwise misappropriation of Renesas Electronics product.

5.

Renesas Electronics products are classified according to the following two quality grades: "Standard" and "High Quality". The recommended applications for each Renesas Electronics product depends on the product's quality grade, as indicated below.

"Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots etc.

"High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; and safety equipment etc.

Renesas Electronics products are neither intended nor authorized for use in products or systems that may pose a direct threat to human life or bodily injury (artificial life support devices or systems, surgical implantations etc.), or may cause serious property damages (nuclear reactor control systems, military equipment etc.). You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application for which it is not intended. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by Renesas Electronics.

6.

You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges.

7.

Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or systems manufactured by you.

8.

Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations.

9.

Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. You should not use Renesas Electronics products or technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. When exporting the Renesas Electronics products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations.

10. It is the responsibility of the buyer or distributor of Renesas Electronics products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the contents and conditions set forth in this document, Renesas Electronics assumes no responsibility for any losses incurred by you or third parties as a result of unauthorized use of Renesas Electronics products.

11. This document may not be reproduced or duplicated in any form, in whole or in part, without prior written consent of Renesas Electronics.

12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries.

(Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries.

(Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics.

SALES OFFICES

http://www.renesas.com

Refer to "http://www.renesas.com/" for the latest and detailed information.

Renesas Electronics America Inc.

2801 Scott Boulevard Santa Clara, CA 95050-2549, U.S.A.

Tel: +1-408-588-6000, Fax: +1-408-588-6130

Renesas Electronics Canada Limited

1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada

Tel: +1-905-898-5441, Fax: +1-905-898-3220

Renesas Electronics Europe Limited

Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K

Tel: +44-1628-585-100, Fax: +44-1628-585-900

Renesas Electronics Europe GmbH

Arcadiastrasse 10, 40472 Düsseldorf, Germany

Tel: +49-211-6503-0, Fax: +49-211-6503-1327

Renesas Electronics (China) Co., Ltd.

Room 1709, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100191, P.R.China

Tel: +86-10-8235-1155, Fax: +86-10-8235-7679

Renesas Electronics (Shanghai) Co., Ltd.

Unit 301, Tower A, Central Towers, 555 Langao Road, Putuo District, Shanghai, P. R. China 200333

Tel: +86-21-2226-0888, Fax: +86-21-2226-0999

Renesas Electronics Hong Kong Limited

Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong

Tel: +852-2265-6688, Fax: +852 2886-9022/9044

Renesas Electronics Taiwan Co., Ltd.

13F, No. 363, Fu Shing North Road, Taipei 10543, Taiwan

Tel: +886-2-8175-9600, Fax: +886 2-8175-9670

Renesas Electronics Singapore Pte. Ltd.

80 Bendemeer Road, Unit #06-02 Hyflux Innovation Centre, Singapore 339949

Tel: +65-6213-0200, Fax: +65-6213-0300

Renesas Electronics Malaysia Sdn.Bhd.

Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia

Tel: +60-3-7955-9390, Fax: +60-3-7955-9510

Renesas Electronics Korea Co., Ltd.

12F., 234 Teheran-ro, Gangnam-Ku, Seoul, 135-920, Korea

Tel: +82-2-558-3737, Fax: +82-2-558-5141

© 2014 Renesas Electronics Corporation. All rights reserved.

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