Инструкция по эксплуатации

Инструкция по эксплуатации
EmETX-a55E0
AMD Fusion G-series ETX® CPU Module
User’s Manual
Version 1.0
2012.06
This page is intentionally left blank.
Table of Contents
Chapter 1 - Introduction............................................................1
1.1 Copyright Notice........................................................2
1.2 Declaration of Conformity.........................................2
1.3 About This User’s Manual.........................................4
1.4 Warning.......................................................................4
1.5 Replacing the Lithium Battery..................................4
1.6 Technical Support......................................................4
1.7 Warranty......................................................................5
1.8 Packing List................................................................6
1.9 Ordering Information.................................................6
1.10 Specifications...........................................................7
1.11 Board Dimensions...................................................8
Chapter 2 - Installation..............................................................9
2.1 Connectors...............................................................10
2.2 Block Diagram .........................................................13
2.3 Driver Installation Paths .........................................14
Chapter 3 - BIOS......................................................................15
3.1 BIOS Main Setup......................................................16
3.2 Advanced Settings...................................................18
3.2.1 PCI Subsystem Settings.....................................19
3.2.2 ACPI Settings......................................................22
3.2.3 CPU Configuration..............................................23
3.2.4 IDE Configuration...............................................25
3.2.5 USB Configuration..............................................26
3.2.6 W83977 Second Super IO Configuration.........27
3.2.7 F71869 Super IO Configuration.........................30
3.2.8 F71869 H/W Monitor............................................32
3.2.9 Wake Event..........................................................33
3.3 Chipset......................................................................34
3.3.1 North Bridge........................................................35
3.3.2 South Bridge.......................................................39
3.4 Boot Settings............................................................48
3.5 Security.....................................................................50
-i-
3.6 Save & Exit...............................................................54
3.7 AMI BIOS Checkpoints............................................56
3.7.1 Checkpoint Ranges............................................56
3.7.2 Standard Checkpoints........................................57
Appendix..................................................................................65
Appendix A: I/O Port Address Map...............................66
Appendix B: BIOS Memory Map...................................69
Appendix C: Interrupt Request Lines (IRQ).................70
Appendix D: Watchdog Timer (WDT) Setting..............72
- ii -
Introduction
1
Chapter 1
Introduction
Chapter 1 - Introduction
-1-
Introduction
1.1 Copyright Notice
All Rights Reserved.
The information in this document is subject to change without prior notice in
order to improve the reliability, design and function. It does not represent a
commitment on the part of the manufacturer.
Under no circumstances will the manufacturer be liable for any direct, indirect,
special, incidental, or consequential damages arising from the use or inability
to use the product or documentation, even if advised of the possibility of such
damages.
This document contains proprietary information protected by copyright.
All rights are reserved. No part of this manual may be reproduced by any
mechanical, electronic, or other means in any form without prior written
permission of the manufacturer.
1.2 Declaration of Conformity
CE
The CE symbol on your product indicates that it is in compliance with the
directives of the Union European (EU). A Certificate of Compliance is available
by contacting Technical Support.
This product has passed the CE test for environmental specifications when
shielded cables are used for external wiring. We recommend the use of
shielded cables. This kind of cable is available from ARBOR. Please contact
your local supplier for ordering information.
This product has passed the CE test for environmental specifications. Test
conditions for passing included the equipment being operated within an
industrial enclosure. In order to protect the product from being damaged by
ESD (Electrostatic Discharge) and EMI leakage, we strongly recommend the
use of CE-compliant industrial enclosure products.
Warning
This is a class A product. In a domestic environment this product may cause
radio interference in which case the user may be required to take adequate
measures.
FCC Class A
This device complies with Part 15 of the FCC Rules. Operation is subject to
the following two conditions:
-2-
Introduction
(1)This device may not cause harmful interference, and
(2)This device must accept any interference received, including interference
that may cause undesired operation.
NOTE:
This equipment has been tested and found to comply with the limits for a
Class A digital device, pursuant to Part 15 of the FCC Rules. These limits are
designed to provide reasonable protection against harmful interference when
the equipment is operated in a commercial environment. This equipment
generates, uses, and can radiate radio frequency energy and, if not installed
and used in accordance with the instruction manual, may cause harmful
interference to radio communications. Operation of this equipment in a
residential area is likely to cause harmful interference in which case the user
will be required to correct the interference at his own expense.
RoHS
ARBOR Technology Corp. certifies that all components in its products are in
compliance and conform to the European Union’s Restriction of Use of Hazardous Substances in Electrical and Electronic Equipment (RoHS) Directive
2002/95/EC.
The above mentioned directive was published on 2/13/2003. The main purpose of the directive is to prohibit the use of lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyls (PBB), and polybrominated diphenyl
ethers (PBDE) in electrical and electronic products. Member states of the EU
are to enforce by 7/1/2006.
ARBOR Technology Corp. hereby states that the listed products do not contain
unintentional additions of lead, mercury, hex chrome, PBB or PBDB that exceed a maximum concentration value of 0.1% by weight or for cadmium exceed
0.01% by weight, per homogenous material. Homogenous material is defined
as a substance or mixture of substances with uniform composition (such as solders, resins, plating, etc.). Lead-free solder is used for all terminations (Sn(9696.5%), Ag(3.0-3.5%) and Cu(0.5%)).
SVHC / REACH
To minimize the environmental impact and take more responsibility to the
earth we live, Arbor hereby confirms all products comply with the restriction
of SVHC (Substances of Very High Concern) in (EC) 1907/2006 (REACH
--Registration, Evaluation, Authorization, and Restriction of Chemicals)
regulated by the European Union.
All substances listed in SVHC < 0.1 % by weight (1000 ppm)
-3-
Introduction
1.3 About This User’s Manual
This user’s manual provides general information and installation instructions
about the product. This User’s Manual is intended for experienced users and
integrators with hardware knowledge of personal computers. If you are not
sure about any description in this booklet. please consult your vendor before
further handling.
1.4 Warning
Single Board Computers and their components contain very delicate
Integrated Circuits (IC). To protect the Single Board Computer and its
components against damage from static electricity, you should always follow
the following precautions when handling it :
1. Disconnect your Single Board Computer from the power source when you
want to work on the inside.
2. Hold the board by the edges and try not to touch the IC chips, leads or circuitry.
3. Use a grounded wrist strap when handling computer components.
4. Place components on a grounded antistatic pad or on the bag that comes
with the Single Board Computer, whenever components are separated from
the system.
1.5 Replacing the Lithium Battery
Incorrect replacement of the lithium battery may lead to a risk of explosion.
The lithium battery must be replaced with an identical battery or a battery type
recommended by the manufacturer.
Do not throw lithium batteries into the trash-can. It must be disposed of in
accordance with local regulations concerning special waste.
1.6 Technical Support
If you have any technical difficulties, please do not hesitate to call or e-mail our
customer service.
http://www.arbor.com.tw
E-mail:[email protected]
-4-
Introduction
1.7 Warranty
This product is warranted to be in good working order for a period of two years
from the date of purchase. Should this product fail to be in good working order
at any time during this period, we will, at our option, replace or repair it at no
additional charge except as set forth in the following terms. This warranty does
not apply to products damaged by misuse, modifications, accident or disaster.
Vendor assumes no liability for any damages, lost profits, lost savings or any
other incidental or consequential damage resulting from the use, misuse of,
or inability to use this product. Vendor will not be liable for any claim made by
any other related party.
Vendors disclaim all other warranties, either expressed or implied, including
but not limited to implied warranties of merchantability and fitness for a
particular purpose, with respect to the hardware, the accompanying product’s
manual(s) and written materials, and any accompanying hardware. This limited
warranty gives you specific legal rights.
Return authorization must be obtained from the vendor before returned
merchandise will be accepted. Authorization can be obtained by calling or
faxing the vendor and requesting a Return Merchandise Authorization (RMA)
number. Returned goods should always be accompanied by a clear problem
description.
-5-
Introduction
1.8 Packing List
Before you begin installing your single board, please make sure that the
following materials have been shipped:
1 x EmETX-a55E0 ETX® CPU Module
1 x Driver CD
1 x Quick Installation Guide
If any of the above items is damaged or missing, contact your vendor
immediately.
1.9 Ordering Information
EmETX-a55E0-T56N AMD G-T56N Dual Core ETX CPU Module
HS-55E0-F1
Heat spreader
HS-55E0-C1
CPU module cooler for 18W APU (114*95*29.5mm)
PBE-1000 R2.1
ETX® evaluation board in ATX form factor
CBK-05-1000-00
Cable kit
3 x COM port cables
1 x USB cable
2 x IDE cables
-6-
Introduction
1.10 Specifications
Form Factor
ETX® CPU Module
CPU
Soldered onboard AMD G-Fusion T-56N 1.65GHz
Processor
Chipset
AMD FCH A55E
System Memory
1 x 204-pin DDR3 SO-DIMM Socket up to 4GB
1333MHz SDRAM
Integrated Radeon HD 6320 with Analog RGB/
VGA/ LCD Controller 24-bit dual channels LVDS (Dual independent
displays)
Ethernet
1 x Realtek RTL8105EL 10/100 Base-T Ethernet
Audio
Realtek ALC886 7.1 Channel HD Audio Codec,
support Mic-in/Line-in/Line-out
BIOS
AMI PnP Flash UEFI BIOS
Serial ATA
2 x Serial ATA with 300MB/s HDD transfer rate
IDE Interface
2 x Ultra ATA, support 4 IDE devices
Serial Port
2 x COM Ports (1 x RS-232, 1 x RS-232/422/485
selectable via PBE-1000)
Parallel Port
1 x SPP/EPP/ECP mode
KB/MS
Support PS/2 interface Keyboard and Mouse
Universal Serial Bus
4 x USB 2.0 ports
LCD
Dual Channels 24-bit LVDS
DDI output
Supports extra DisplayPort connector
Expansion Interface
4 x PCI masters and ISA Bus
LPC interface
DDI port connector on CPU module
Operation Temp.
-20oC ~ 70oC (-4oF~158oF)
Watchdog Timer
1~255 level Reset
Dimension (L x W)
114 x 95 mm ( 4.5" x 3.7" )
-7-
Introduction
1.11 Board Dimensions
22
9
1,6
35
108
114
54
90
29.5
95
Unit: mm
-8-
Installation
2
Chapter 2
Installation
Chapter 2 - Installation
-9-
Installation
2.1 Connectors
SATA1, SATA2 Connectors
Pin
1
2
3
4
5
6
7
Description
GND
TX+
TXGND
RXRX+
GND
1
7
LPC1 Connector
Connector type: FPC12-14P-P0.5 (Hirose)
Pin
Description
Pin
Description
1
LAD0
8
BUF_PLT_RST#
2
LAD1
9
GND
3
LAD2
10
PCLK_CONN
4
LAD3
11
GND
5
GND
12
GND
6
LFRAME#
13
+3.3V
7
INT_SERIRQ
14
+3.3V
1
14
DDI1 Connector
Connector type: FH12-26S-0.5SH (Hirose)
Pin
Description
Pin
Description
1
GND
14
N/C
2
DDI_TX0+
15
DDI_AUX+
3
DDI_TX0-
16
DDI_AUX-
4
GND
17
GND
5
DDI_TX1+
18
DDI_HPD
6
DDI_TX1-
19
SMB_DAT
7
GND
20
SMB_CLK
8
DDI_TX2+
21
GND
9
DDI_TX2-
22
GND
10
GND
23
GND
11
DDI_TX3+
24
+3.3V
12
DDI_TX3-
25
+3.3V
13
GND
26
+5V
- 10 -
1
26
Installation
ETX1 Connector
A1
A3
A5
A7
A9
A11
A13
A15
A17
A19
A21
A23
A25
A27
A29
A31
A33
A35
A37
A39
A41
A43
A45
A47
A49
A51
A53
A55
A57
A59
A61
A63
A65
A67
A69
A71
A73
A75
A77
A79
A81
A83
A85
A87
A89
A91
A93
A95
A97
A99
GND
PCICLK3
GND
PCICLK1
REQ#3
GNT#2
REQ#2
REQ#1
GNT#0
VCC
SERIRQ
AD0
AD1
AD4
AD6
CBE#0
AD8
GND
AD10
AD11
AD12
AD13
AD14
AD15
CBE#1
VCC
PAR
PERR#
PME#
LOCK#
TRDY#
IRDY#
FRAME#
GND
AD16
AD17
AD19
AD20
AD22
AD23
AD24
VCC
AD25
AD28
AD27
AD30
PCIRST#
INTR#C
INTR#A
GND
ETX2 Connector
GND
PCICLK4
GND
PCICLK2
GNT#3
VCC3
GNT#1
VCC3
N.C
VCC
REQ#0
VCC3
AD2
AD3
AD5
AD7
AD9
GND
AUXAL
MIC
AUXAR
ASVCC
SNDL
ASGND
SNDR
VCC
SERR#
N.C
USB2DEVSEL#
USB3STOP#
USB2+
GND
CBE#2
USB3+
AD18
USB0AD21
USB1CBE#3
VCC
AD26
USB0+
AD29
USB1+
AD31
INTR#D
INTR#B
GND
A2
A4
A6
A8
A10
A12
A14
A16
A18
A20
A22
A24
A26
A28
A30
A32
A34
A36
A38
A40
A42
A44
A46
A48
A50
A52
A54
A56
A58
A60
A62
A64
A66
A68
A70
A72
A74
A76
A78
A80
A82
A84
A86
A88
A90
A92
A94
A96
A98
A100
B1
B3
B5
B7
B9
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B35
B37
B39
B41
B43
B45
B47
B49
B51
B53
B55
B57
B59
B61
B63
B65
B67
B69
B71
B73
B75
B77
B79
B81
B83
B85
B87
B89
B91
B93
B95
B97
B99
- 11 -
GND
SD14
SD13
SD12
SD11
SD10
SD9
SD8
MEMW#
MEMR#
LA17
LA18
LA19
LA20
LA21
LA22
LA23
GND
SBHE#
SA0
SA1
SA2
SA3
SA4
SA5
VCC
SA6
SA7
SA8
SA9
SA10
SA11
SA12
GND
SA13
SA14
SA15
SA16
SA18
SA19
IOCHRDY
VCC
SD0
SD2
SD3
DREQ2
SD5
SD9
IOCHK#
GND
GND
SD15
MASTER#
DREQ7
DACK#7
DREQ6
DACK#6
DREQ5
DACK#5
DREQ0
DACK#5
IRQ14
IRQ15
IRQ12
IRQ11
IRQ10
IO16#
GND
M16#
OSC
BALE
TC
DACK#2
IRQ3
IRQ4
VCC
IRQ5
IRQ6
IRQ7
SYSCLK
REFCH#
DREQ1
DACK#1
GND
DREQ3
DACK#3
IOR#
IOW#
SA17
SMEMR#
AEN
VCC
SMEMW#
SD1
NOWS#
SD4
IRQ9
SD7
RSTDRV
GND
B2
B4
B6
B8
B10
B12
B14
B16
B18
B20
B22
B24
B26
B28
B30
B32
B34
B36
B38
B40
B42
B44
B46
B48
B50
B52
B54
B56
B58
B60
B62
B64
B66
B68
B70
B72
B74
B76
B78
B80
B82
B84
B86
B88
B90
B92
B94
B96
B98
B100
Installation
ETX3 Connector
C1
C3
C5
C7
C9
C11
C13
C15
C17
C19
C21
C23
C25
C27
C29
C31
C33
C35
C37
C39
C41
C43
C45
C47
C49
C51
C53
C55
C57
C59
C61
C63
C65
C67
C69
C71
C73
C75
C77
C79
C81
C83
C85
C87
C89
C91
C93
C95
C97
C99
GND
R
HSY
VSY
DETECT#
TX2CLK#
TX2CLK
GND
TX2D1
TX2D1#
GND
N.C.
N.C.
GND
TX1D2#
TX1D2
GND
TX1D0
TX1D0#
VCC
DDC_DATA
DDC_CLK
BKLTCTL
TV_DATA_COMP
N.C.
LPT/FLPY#
VCC
STB#
N.C.
IRRX
IRTX
RXD2
GND
RTS#2
DTR#2
DCD#2
DSR#2
CTS#2
TXD#2
RI#2
VCC
RXD1
RTS#1
DTR#1
DCD#1
DSR#1
CTS#1
TXD#1
RI#1
GND
GND
B
G
Analog RGB_DDC_CLK
Analog RGB_DDC_ATA
N.C.
N.C.
GND
TX2D2
TX2D2#
GND
TX2D0
TX2D0#
GND
TX1CLK
TX1CLK#
GND
TX1D1
TX1D1#
VCC
N.C.
BLON#
VDDEN
Y
C
N.C.
GND
AFD#/DENSEL
PD7/N.C
ERR#/HDSEL#
PD6/N.C
INIT#/DIR#
GND
PD5/N.C
SLIN#/STEP#
PD4/DSKCHG#
PD3/RDATA#
PD2/WP#
PD1/TRK0#
PD0/INDEX#
VCC
ACK#/DRV
BUSY#/MOT
PE/WDATA#
SLCT#/WGATE#
MSCLK
MSDAT
KBCLK
KBDAT
GND
ETX4 Connector
C2
C4
C6
C8
C10
C12
C14
C16
C18
C20
C22
C24
C26
C28
C30
C32
C34
C36
C38
C40
C42
C44
C46
C48
C50
C52
C54
C56
C58
C60
C62
C64
C66
C68
C70
C72
C74
C76
C78
C80
C82
C84
C86
C88
C90
C92
C94
C96
C98
C100
D1
D3
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D25
D27
D29
D31
D33
D35
D37
D39
D41
D43
D45
D47
D49
D51
D53
D55
D57
D59
D61
D63
D65
D67
D69
D71
D73
D75
D77
D79
D81
D83
D85
D87
D89
D91
D93
D95
D97
D99
- 12 -
GND
5V_SB
PS_ON
PWERBTN#
KBINH
RSMRST#
N.C
N.C
VCC
OVCR#
EXTSMI#
SMBCLK
SIDE_CS1#
SIDE_CS0#
SIDE_A2
SIDE_A0
GND
PDIAG_S
SIDE_A1
SIDE_INTRQ
BATLOW#
SIDE_ACK#
SIDE_RDY
SIDE_IOR#
VCC
SIDE_IOW#
SIDE_DRQ
SIDE_D15
SIDE_D0
SIDE_D14
SIDE_D1
SIDE_D13
GND
SIDE_D2
SIDE_D12
SIDE_D3
SIDE_D11
SIDE_D4
SIDE_D10
SIDE_D5
VCC
SIDE_D9
SIDE_D6
SIDE_D8
GPE2#
RXDRXD+
TXDTXD+
GND
GND
PWGIN
SPEAKER
BATT
LILED
ACTLED
SPEEDLED
I2CLK
VCC
N.C
I2DAT
SMBDAT
SMBALRT#
SATALED#
PIDE_CS3#
PIDE_CS1#
GND
PIDE_A2
PIDE_A0
PIDE_A1
N.C
PIDE_INTRQ
PIDE_ACK#
PIDE_RDY
VCC
PIDE_IOR#
PIDE_IOW#
PIDE_DRQ
PIDE_D15
PIDE_D0
PIDE_D14
PIDE_D1
GND
PIDE_D13
PIDE_D2
PIDE_D12
PIDE_D3
PIDE_D11
PIDE_D4
PIDE_D10
VCC
PIDE_D5
PIDE_D9
PIDE_D6
CBLID_P#
PIDE_D8
N.C
PIDE_D7
HDRST#
GND
D2
D4
D6
D8
D10
D12
D14
D16
D18
D20
D22
D24
D26
D28
D30
D32
D34
D36
D38
D40
D42
D44
D46
D48
D50
D52
D54
D56
D58
D60
D62
D64
D66
D68
D70
D72
D74
D76
D78
D80
D82
D84
D86
D88
D90
D92
D94
D96
D98
D100
Installation
2.2 Block Diagram
Single Channel DDR3
1333MHz
Realtek
RTL8105E
LAN controller
Primary
IDE ATA I/F
PATA Host
Controller
JMB368
Secondary
IDE ATA I/F
PATA Host
Controller
JMB368
1xPCIex1
1xPCIex1
AMD APU
G-series
G-T56N
DDI0 (as eDP)
1xPCIex1
DDI connector
FH12-26S-0.5SH
Chrontel
CH7511
eDP to LVDS
transmitter
Dual Chnnels
24-bit LVDS
Analog R.G.B.
COM1
Connector ETX1
UMI x4
COM2
4 x USB ports
Audio
HD CODEC
LPC I/F
HD Link
Fintek
F71869ED
IrDA,
ALC886
4 x PCI masters
PCI Arbiter
IT8209R
KB, MS
PCI Bus
AMD
A55E
FCH
IT8888
PCI to ISA
Bridge
LPC I/F
LPC Conn.
Serial ATA I/F
2 x SATA
SPI I/F
SPI ROM
PCI
Primary IDE ATA I/F
Connector ETX2
ISA Bus
Secondary IDE ATA I/F
10/100 Mbps
AMD Fusion G-series Processors
G-T56N 1.65GHz Dual Core 18W
AMD Radeon HD 6320
G-T48N 1.4GHz Dual Core 18W
AMD Radeon HD 6310
G-T40N 1.0GHz Dual Core 9W
AMD Radeon HD 6320
G-T40E 1.0GHz Dual Core 6.4W
AMD Radeon HD 6290
G-T52R 1.5GHz Single Core 18W
AMD Radeon HD 6310
G-T44R 1.2GHz Single Core 9W
AMD Radeon HD 6250
G-T40R 1.0GHz Single Core 5.5W AMD Radeon HD 6250
1 x VGA up to [email protected] 60Hz & 30bpp
1 x Dual DVI/ HDMI up to [email protected] & 36bpp or DiaplsyPort up to [email protected] & 30bpp(Configurable)
1 x LVDS (Single channel 24-bit up to 1440x900 @ 60Hz & 18bpp)
2 x DDR3 SO-DIMM up to 1333MHz
4 x PCIex1 (configurable to 1xPCIex4/ 2xPCIex2/ 4xPCIex1)
A55E (2.7 ~ 4.7W)
14 x USB 2.0
2 x USB 1.1
6 x SATA 6GB/s w/ RAID 0, 1, 5, 10
Integrated Ethernet MAC
HD link
4 x PCIex1 (Not configurable)
4 x PCI masters
LPT1
Connector ETX3
10/100
Mbps
DP1
- 13 -
Connector ETX4
1 x SO-DIMM socket
Installation
2.3 Driver Installation Paths
Windows 2000 & XP
Driver
Path
CHIPSET & VGA
\EmETX-a55E0\GRAPHICS\XP\8.92-111109a129010C-EDG_Direct
LAN
\EmETX-a55E0\ETHERNET\WinXP\PCIE_
Install_5792_01142012
AUDIO
\EmETX-a55E0\AUDIO\WinXP\WDM_R267
Windows 7
Driver
Path
CHIPSET & VGA
\EmETX-a55E0\GRAPHICS\Win7\8.92-111109a129011C-EDG_Direct
LAN
\EmETX-a55E0\ETHERNET\win7\Install_
Win7_7050_01162012
AUDIO
\EmETX-a55E0\AUDIO\Win7\Vista_Win7_R267
- 14 -
BIOS
3
Chapter 3
BIOS
Chapter 3 - BIOS
- 15 -
BIOS
3.1 BIOS Main Setup
The AMI BIOS provides a setup utility program for specifying the system
configurations and settings which are stored in the BIOS ROM of the system.
When you turn on the computer, the AMI BIOS is immediately activated. After
you have entered the setup utility, use the left/right arrow keys to highlight a
particular configuration screen from the top menu bar or use the down arrow
key to access and configure the information below.
NOTE: In order to increase system stability and performance, our engineering
staff are constantly improving the BIOS menu. The BIOS setup screens and
descriptions illustrated in this manual are for your reference only, and may not
completely match what you see on your screen.
BIOS Information
Display the BIOS information.
- 16 -
BIOS
System Date
Set the system date. Note that the ‘Day’ automatically changes when you set
the date.
The date format is:
Day : Sun to Sat
Month : 1 to 12
Date : 1 to 31
Year : 1998 to 2099
System Time
Set the system time.
The time format is:
Hour : 00 to 23
Minute : 00 to 59
Second : 00 to 59
- 17 -
BIOS
3.2 Advanced Settings
Legacy OpROM Support
Launch PXE OpROM
Enable or disable the boot option for legacy network devices.
Launch Storage OpROM
Enable or Disable Boot Option for Legacy Mass Storage Devices with Option
ROM.
Launch Video OpROM
Execution of the Legacy Option ROM for video devices.
The choice: Enabled (Default), Disabled, Enabled when no UEFI driver
- 18 -
BIOS
3.2.1 PCI Subsystem Settings
PCI ROM Priority
In case of multiple Option ROMs (Legacy and EFI Compatible), specifies what
PCI Option ROM to launch.
PCI Latency Timer
Value to be programmed into PCI Latency Timer Register.
VGA Palette Snoop
Enables or Disables VGA Palette Registers Snooping.
PERR# Generation
Enables or Disables PCI Device to Generate PERR#.
SERR# Generation
Enables or Disables PCI Device to Generate SERR#.
- 19 -
BIOS
PCI Express Settings
Relaxed Ordering
Enables or Disables PCI Express Device Relaxed ordering.
Extended Tag
If Enabled, allows Device to use 8-bit Tag field as a requester.
No Snoop
Enables or Disables PCI Express Device No Snoop Option.
Maximum Payload
Set Maximum Payload of PCI Express Device or allow System BIOS to select
the value.
The choice: Auto, 128 bytes, 256 bytes, 512 bytes, 1024 bytes, 2048 bytes,
4096 bytes
- 20 -
BIOS
Maximum Read Request
Set Maximum Read Request of PCI Express Device or allow System BIOS to
select the value.
The choice: Auto, 128 bytes, 256 bytes, 512 bytes, 1024 bytes, 2048 bytes,
4096 bytes
ASPM Support
Set the ASPM Level:
- Force L0s: Force all links to L0s State
- AUTO: BIOS auto configure:
- DISABLE: Disables ASPM.
Extended Synch
If Enabled, allows generation of Extended Synchronization patterns.
Link Training Retry
Defines number of Retry Attempts software will take to retrain the link if previous training attempt was unsuccessful.
The choice: Disabled, 2, 3, 5
Link Training Timeout (uS)
Defines number of Microseconds software will wait before polling “Link Training” bit in Link Status register. Value ranges from 1 to 100 uS.
The choice: 1~100
Unpopulated Links
In order to save power, software will disable unpopulated PCI Express links, if
this option is set to “Disable Link”.
The choice: Keep Link ON, Disable Link
- 21 -
BIOS
3.2.2 ACPI Settings
AC Power Shutdown mode
Choose AC Power Shutdown mode.
The choice: AT Mode, ATX Mode
- 22 -
BIOS
3.2.3 CPU Configuration
The CPU Configuration setup screen varies depending on the installed
processor.
Limit CPUID Maximum
Disabled for Windows XP.
PSS Support
Enable/Disable the generation of ACPI _PPC, _PPS, and _PCT objects.
PSATATE Adjustment
Provide to adjust startup P-state level.
The choice: PState 0, PState 1, PState 2
PPC Adjustment
Provide to adjust _PPC object.
The choice: PState 0, PState 1, PState 2
NX Mode
Enable/Disable No-execute page protection Function.
- 23 -
BIOS
SVM Mode
Enable/Disable CPU Virtualization.
C6 Mode
Enable/Disable C6.
CPB Mode
Auto/disable CPB.
Node 0 Information
- 24 -
BIOS
3.2.4 IDE Configuration
- 25 -
BIOS
3.2.5 USB Configuration
Legacy USB Support
Enable Legacy USB support. AUTO option disables legacy support if no
USB devices are connected. DISABLE option will keep USB devices available only for EFI applications.
The choice: Enabled (Default); Auto; Disabled
EHCI Hand-off
Allow you to enable support for operating systems without an EHCI hand-off
feature. Do not disable the BIOS EHCI Hand-Off option if you are running a
Windows® operating system with USB device.
The choice: Enabled (Default); Disabled
USB hardware delays and time-outs
USB transfer time-out — The time-out value for control, bulk, and interrupt
transfers. Default setting: 20 sec
Device reset time-out — USB mass storage device start unit command timeout. Default setting: 20 sec
- 26 -
BIOS
Device power-up delay — Maximum time the device will take before it properly reports itself to the host controller. ‘Auto’ uses default value: for a Root
port it is 100ms, for a Hub port the delay is taken from hub descriptor. The
choice: Auto (Default); Manual
Mass Storage Devices
This item displays information when USB devices are detected.
3.2.6 W83977 Second Super IO Configuration
- 27 -
BIOS
Serial Port 0 Configuration
- 28 -
BIOS
Serial Port 1 Configuration
- 29 -
BIOS
3.2.7 F71869 Super IO Configuration
Restore AC Power Loss
Select Restore AC Power Loss mode.
The choice: Last State, Always On, Bypass Mode, Always Off
- 30 -
BIOS
Serial/Parallel Port 0/1 Configuration
Serial Port
Use the Serial port option to enable or disable the serial port.
The choice: Enabled, Disabled
Change Settings
Use the Change Settings option to change the serial port’s IO port address
and interrupt address.
The choice:
Auto
IO=3F8h; IRQ=4,
IO=3F8h; IRQ=3,4,5,6,7,10,11,12
IO=2F8h; IRQ=3,4,5,6,7,10,11,12
IO=3E8h; IRQ=3,4,5,6,7,10,11,12
IO=2E8h; IRQ=3,4,5,6,7,10,11,12
Device Mode (Except Serial Port 0 Configuration)
The choice: Standard Parallel Port Mode, EPP Mode, ECP Mode, EPP Mode
& ECP Mode.
- 31 -
BIOS
3.2.8 F71869 H/W Monitor
- 32 -
BIOS
3.2.9 Wake Event
Wake On Lan
Enable/Disable Wake On Lan help.
- 33 -
BIOS
3.3 Chipset
This section allows you to configure and improve your system; also, set up
some system features according to your preference.
- 34 -
BIOS
3.3.1 North Bridge
- 35 -
BIOS
GFX Configuration
Primary Video Device
Select Primary Video Device that BIOS will use for output.
NB GPP Core Config
Configure NB GPP Core.
The choice: Disabled, GPP_CORE_x4x4, GPP_CORE_x4x2x2, GPP_
CORE_x4x2x1x1, GPP_CORE_x4x1x1x1x1
LVDS Output
Enable/Disable NB PCIe Connect Type (Display type).
Display port output
Enable/Disable NB PCIe Connect Type (Display type).
LVDS Resolution
Set LVDS Resolution.
- 36 -
BIOS
Memory Configuration
Integrated Graphics
The Integrated Graphics controller configuration is set to Auto.
The choice: Disabled, Force, Auto
Bank Interleaving
The choice: Disabled, Enabled
IOMMU Mode
IOMMU is supported on LINUX based systems to convert 32bit I/O to 64bit
MMIO.
Memory Clock
This item allows user to select different memory clock.
Memory Clear
This is for memory clear functionality control.
- 37 -
BIOS
Node 0 Information
- 38 -
BIOS
3.3.2 South Bridge
- 39 -
BIOS
SB SATA Configuration
OnChip SATA Channel
Enable/Disable Serial ATA.
OnChip SATA Type
The choice: Native IDE, RAID, AHCI, Legacy IDE, IDE→AHCI, AHCI as
ID 0x4394, IDE→AHCI as ID 0x4394
OnChip IDE mode
OnChip IDE mode Select.
The choice: Legacy mode, Native mode
SATA IDE Combined Mode
Enable/Disable SATA IDE Combined Mode.
Combined Mode Option
The choice: SATA as primary, SATA as secondary
SATA ESP on PORT0/1
Enable/Disable SATA ESP on PORT0/1.
- 40 -
BIOS
SATA Power on PORT0/1
Enable/Disable SATA Power on PORT0/1.
The choice: Enabled, Power Down
SB USB Configuration
USB PORT 0~3
Enable/Disable USB PORT 0~13/FL0~1.
USB Device Wakeup From S3 or S4
Enable/Disable USB Device Wakeup From S3 or S4.
- 41 -
BIOS
SB GEC Configuration
In-Chip NIC
Enable/Disable In-Chip NIC.
GEC Resume Wake from S5
Enable/Disable GEC Resume Wake from S5.
GEC OPROM
Enable/Disable GEC OPROM.
- 42 -
BIOS
SB GPP Port Configuration
SB GPP Function
Enable/Disable SB GPP Function.
GPP Port Link Configuration
Select GPP Port Link Configuration.
Hide Unused GPP Ports
Enable/Disable Hide Unused GPP Ports.
NB-SB PHY PLL Power Down
Enable/Disable NB-SB PHY PLL Power Down.
SB GPP PHY PLL Power Down
Enable/Disable SB GPP PHY PLL Power Down.
SB GPP LANE REVERSAL
Enable/Disable SB GPP LANE REVERSAL.
- 43 -
BIOS
SB HD Azalia Configuration
HD Audio Azalia Device
The choice: Auto, Disabled, Enabled
HD Onboard PIN Config
The choice: Disabled, Enabled
Azalia Front Panel
The choice: Auto, Disabled
SDIN0~3 PIN Config
The choice: GPIO, Azalia
Azalia Snoop
The choice: Disabled, Enabled
- 44 -
BIOS
EC Configuration
- 45 -
BIOS
SB IMC Fan Configuration
IMC Fan Control
The choice: Disabled, Enabled
Zone 0~3 Support
The choice: Disabled, Enabled
- 46 -
BIOS
Zone 0 Config
Zone 0 Fan Out
The choice: No Fan, FANOUT 0~4
Zone 0 Fan Speed Mode
The choice: Linear Mode, Step Mode
Fan Frequency
Set fan frequency.
Zone 0 Temperature Sensor
The choice: No Sensor, TEMPIN 0~3, Int TEMP,
SB-TSI or ADT7461ARMZ, ADM1032 or ADT7461ARM
Zone 0 Temperature Average
The choice: Disabled, Enabled
Zone 0 SMBUS Port
The choice: Port 0/2~4
- 47 -
BIOS
3.4 Boot Settings
The Boot menu items allow you to change the system boot options.
Boot Configuration
Setup Prompt Timeout
Seconds to wait for setup activation key. 65535(0xFFFF) means indefinite
waiting.
Bootup NumLock State
This setting determines whether the Num Lock key should be activated at
boot up.
Quiet Boot
This allows you to select the screen display when the system boots.
Fast Boot
Enable/Disable boot with initialization of a minimal set of devices required to
launch active boot option. Has no effect for BBS boot options.
GateA20 Active
This item is to set the Gate A20 status.
- 48 -
BIOS
Option ROM Messages
This item is to set display mode for Option ROM.
Interrupt 19 Capture
When enabled, it allows the optional ROM to trap interrupt 19.
CSM Support
Enabled/ disabled CSM support. If Auto is selected, based on OS, CSM will be
enabled/ disabled automatically.
Boot Option Priorities
Select the boot sequence of the hard drives.
Network Device BBS Priorities
This option sets the order of the legacy devices in this group.
- 49 -
BIOS
3.5 Security
Administrator Password
Use this feature to set the Administrator Password which is required to enter
the BIOS setup utility. The length of the password should be from 3-characters
to 8-characters long.
User Password
Use this feature to set a User Password which is required to log into the
system and to enter the BIOS setup utility. The length of the password should
be from 3-characters to 8-characters long.
CSM Support
Enabled/ disabled CSM support. If Auto is selected, based on OS, CSM will be
enabled/ disabled automatically.
- 50 -
BIOS
Secure Boot Policy
Internal FV/ Option ROM/ Removable Media/ Fixed Media
Image Execution Policy on Security Violation. Image load device path.
The choice: Always Execute, Always Execute, Allow Execute, Defer Execute,
Deny Execute, Query User
- 51 -
BIOS
Key Management
Set PK from File
Launches the Filebrowser to set the Platform Key from file.
Get PK to File
Stores the existing Platform Key to file name OK in selected file system’s root.
Delete the PK
Deletes the Platform Key.
Set KEK to File
Launches the Filebrowser to set the Key Exchange Key Signature Database
from file.
Get KEK to File
Stores the existing Key Exchange Key Signature Database to file name KEK
in selected file system’s root.
Delete the KEK
Deletes the Key Exchange Key Signature Database.
- 52 -
BIOS
Append an entry to KEK
Launches the Filebrowser to Append the Key Exchange Key Signature Database entry from file.
Set DB from File
Launches the Filebrowser to set the Authorized Signature Database from file.
Get DB to File
Stores the existing Authorized Signature Database to file name DB in selected
file system’s root.
Delete the DB
Deletes the Authorized Signature Database.
Append an entry to DB
Launches the Filebrowser to Append the Authorized Security Database entry
from file.
Set DBX from File
Launches the Filebrowser to set the Forbidden Signature Database from file.
Get DBX to File
Stores the existing Forbidden Signature Database to file name DB in selected
file system’s root.
Delete the DBX
Deletes the Forbidden Signature Database.
Append an entry to DBX
Launches the Filebrowser to Append the Forbidden Signature Database entry
from file.
Install Factory Defaults
Set Default Secure Variables: PK-KEK-db-dbx. Change takes effect on next
reboot.
- 53 -
BIOS
3.6 Save & Exit
Save Changes and Exit
Pressing <Enter> on this item and it asks for confirmation:
Save configuration changes and exit setup?
Pressing <OK> stores the selection made in the menus in CMOS - a special
section of memory that stays on after you turn your system off. The next
time you boot your computer, the BIOS configures your system according to
the Setup selections stored in CMOS. After saving the values the system is
restarted again.
Discard Changes and Exit
Exit system setup without saving any changes.
<ESC> key can be used for this operation.
Save Changes and Reset
Reset the system after saving the changes.
- 54 -
BIOS
Discard Changes and Reset
Reset system setup without saving any changes.
Save Changes
Save changes done so far to any of the setup options.
Discard Changes
Discard changes done so far to any of the setup options.
Restore Defaults
Restore system to factory default.
Pressing <Enter> on this item and it asks for confirmation prior to executing
this command.
Save as User Defaults
Save the changes done so far as User Defaults.
Restore User Defaults
Restore the User Defaults to all the setup options.
Boot Override
This group of functions includes a list of tokens, each of them corresponding
to one device within the boot order. Select a drive to immediately boot that
device regardless of the current boot order.
- 55 -
BIOS
3.7 AMI BIOS Checkpoints
3.7.1 Checkpoint Ranges
Status Code Range
Description
0x01 – 0x0B
SEC execution
0x0C – 0x0F
SEC errors
0x10 – 0x2F
PEI execution up to and including memory
detection
0x30 – 0x4F
PEI execution after memory detection
0x50 – 0x5F
PEI errors
0x60 – 0x8F
DXE execution up to BDS
0x90 – 0xCF
BDS execution
0xD0 – 0xDF
DXE errors
0xE0 – 0xE8
S3 Resume (PEI)
0xE9 – 0xEF
S3 Resume errors (PEI)
0xF0 – 0xF8
Recovery (PEI)
0xF9 – 0xFF
Recovery errors (PEI)
- 56 -
BIOS
3.7.2 Standard Checkpoints
SEC Phase
Status Code
0x00
Description
Not used
Progress Codes
0x01
Power on. Reset type detection (soft/hard).
0x02
AP initialization before microcode loading
0x03
North Bridge initialization before microcode loading
0x04
South Bridge initialization before microcode loading
0x05
OEM initialization before microcode loading
0x06
Microcode loading
0x07
AP initialization after microcode loading
0x08
North Bridge initialization after microcode loading
0x09
South Bridge initialization after microcode loading
0x0A
OEM initialization after microcode loading
0x0B
Cache initialization
SEC Error Codes
0x0C – 0x0D
Reserved for future AMI SEC error codes
0x0E
Microcode not found
0x0F
Microcode not loaded
- 57 -
BIOS
PEI Phase
Status Code
Description
Progress Codes
0x10
PEI Core is started
0x11
Pre-memory CPU initialization is started
0x12
Pre-memory CPU initialization (CPU module specific)
0x13
Pre-memory CPU initialization (CPU module specific)
0x14
Pre-memory CPU initialization (CPU module specific)
0x15
Pre-memory North Bridge initialization is started
0x16
Pre-Memory North Bridge initialization (North Bridge
module specific)
0x17
Pre-Memory North Bridge initialization (North Bridge
module specific)
0x18
Pre-Memory North Bridge initialization (North Bridge
module specific)
0x19
Pre-memory South Bridge initialization is started
0x1A
Pre-memory South Bridge initialization (South Bridge
module specific)
0x1B
Pre-memory South Bridge initialization (South Bridge
module specific)
0x1C
Pre-memory South Bridge initialization (South Bridge
module specific)
0x1D – 0x2A
OEM pre-memory initialization codes
0x2B
Memory initialization. Serial Presence Detect (SPD) data
reading
0x2C
Memory initialization. Memory presence detection
0x2D
Memory initialization. Programming memory timing
information
0x2E
Memory initialization. Configuring memory
0x2F
Memory initialization (other).
0x30
Reserved for ASL (see ASL Status Codes section below)
0x31
Memory Installed
- 58 -
BIOS
0x32
CPU post-memory initialization is started
0x33
CPU post-memory initialization. Cache initialization
0x34
CPU post-memory initialization. Application Processor(s)
(AP) initialization
0x35
CPU post-memory initialization. Boot Strap Processor
(BSP) selection
0x36
CPU post-memory initialization. System Management
Mode (SMM) initialization
0x37
Post-Memory North Bridge initialization is started
0x38
Post-Memory North Bridge initialization (North Bridge
module specific)
0x39
Post-Memory North Bridge initialization (North Bridge
module specific)
0x3A
Post-Memory North Bridge initialization (North Bridge
module specific)
0x3B
Post-Memory South Bridge initialization is started
0x3C
Post-Memory South Bridge initialization (South Bridge
module specific)
0x3D
Post-Memory South Bridge initialization (South Bridge
module specific)
0x3E
Post-Memory South Bridge initialization (South Bridge
module specific)
0x3F-0x4E
0x4F
OEM post memory initialization codes
DXE IPL is started
PEI Error Codes
0x50
Memory initialization error. Invalid memory type or
incompatible memory speed
0x51
Memory initialization error. SPD reading has failed
0x52
Memory initialization error. Invalid memory size or
memory modules do not match.
0x53
Memory initialization error. No usable memory detected
0x54
Unspecified memory initialization error.
- 59 -
BIOS
0x55
Memory not installed
0x56
Invalid CPU type or Speed
0x57
CPU mismatch
0x58
CPU self test failed or possible CPU cache error
0x59
CPU micro-code is not found or micro-code update is
failed
0x5A
Internal CPU error
0x5B
reset PPI is not available
0x5C-0x5F
Reserved for future AMI error codes
S3 Resume Progress Codes
0xE0
S3 Resume is stared (S3 Resume PPI is called by the
DXE IPL)
0xE1
S3 Boot Script execution
0xE2
Video repost
0xE3
OS S3 wake vector call
0xE4-0xE7
Reserved for future AMI progress codes
S3 Resume Error Codes
0xE8
S3 Resume Failed
0xE9
S3 Resume PPI not Found
0xEA
S3 Resume Boot Script Error
0xEB
S3 OS Wake Error
0xEC-0xEF
Reserved for future AMI error codes
Recovery Progress Codes
0xF0
Recovery condition triggered by firmware (Auto recovery)
0xF1
Recovery condition triggered by user (Forced recovery)
0xF2
Recovery process started
0xF3
Recovery firmware image is found
0xF4
Recovery firmware image is loaded
0xF5-0xF7
Reserved for future AMI progress codes
Recovery Error Codes
0xF8
Recovery PPI is not available
- 60 -
BIOS
0xF9
Recovery capsule is not found
0xFA
Invalid recovery capsule
0xFB – 0xFF
Reserved for future AMI error codes
DXE Phase
Status Code
Description
0x60
DXE Core is started
0x61
NVRAM initialization
0x62
Installation of the South Bridge Runtime Services
0x63
CPU DXE initialization is started
0x64
CPU DXE initialization (CPU module specific)
0x65
CPU DXE initialization (CPU module specific)
0x66
CPU DXE initialization (CPU module specific)
0x67
CPU DXE initialization (CPU module specific)
0x68
PCI host bridge initialization
0x69
North Bridge DXE initialization is started
0x6A
North Bridge DXE SMM initialization is started
0x6B
North Bridge DXE initialization (North Bridge module
specific)
0x6C
North Bridge DXE initialization (North Bridge module
specific)
0x6D
North Bridge DXE initialization (North Bridge module
specific)
0x6E
North Bridge DXE initialization (North Bridge module
specific)
0x6F
North Bridge DXE initialization (North Bridge module
specific)
0x70
South Bridge DXE initialization is started
0x71
South Bridge DXE SMM initialization is started
0x72
South Bridge devices initialization
0x73
South Bridge DXE Initialization (South Bridge module
specific)
- 61 -
BIOS
0x74
South Bridge DXE Initialization (South Bridge module
specific)
0x75
South Bridge DXE Initialization (South Bridge module
specific)
0x76
South Bridge DXE Initialization (South Bridge module
specific)
0x77
South Bridge DXE Initialization (South Bridge module
specific)
0x78
ACPI module initialization
0x79
CSM initialization
0x7A – 0x7F
Reserved for future AMI DXE codes
0x80 – 0x8F
OEM DXE initialization codes
0x90
Boot Device Selection (BDS) phase is started
0x91
Driver connecting is started
0x92
PCI Bus initialization is started
0x93
PCI Bus Hot Plug Controller Initialization
0x94
PCI Bus Enumeration
0x95
PCI Bus Request Resources
0x96
PCI Bus Assign Resources
0x97
Console Output devices connect
0x98
Console input devices connect
0x99
Super IO Initialization
0x9A
USB initialization is started
0x9B
USB Reset
0x9C
USB Detect
0x9D
USB Enable
0x9E – 0x9F
Reserved for future AMI codes
0xA0
IDE initialization is started
0xA1
IDE Reset
0xA2
IDE Detect
0xA3
IDE Enable
- 62 -
BIOS
0xA4
SCSI initialization is started
0xA5
SCSI Reset
0xA6
SCSI Detect
0xA7
SCSI Enable
0xA8
Setup Verifying Password
0xA9
Start of Setup
0xAA
Reserved for ASL (see ASL Status Codes section below)
0xAB
Setup Input Wait
0xAC
Reserved for ASL (see ASL Status Codes section below)
0xAD
Ready To Boot event
0xAE
Legacy Boot event
0xAF
Exit Boot Services event
0xB0
Runtime Set Virtual Address MAP Begin
0xB1
Runtime Set Virtual Address MAP End
0xB2
Legacy Option ROM Initialization
0xB3
System Reset
0xB4
USB hot plug
0xB5
PCI bus hot plug
0xB6
Clean-up of NVRAM
0xB7
Configuration Reset (reset of NVRAM settings)
0xB8 – 0xBF
Reserved for future AMI codes
0xC0 – 0xCF OEM BDS initialization codes
DXE Error Codes
0xD0
CPU initialization error
0xD1
North Bridge initialization error
0xD2
South Bridge initialization error
0xD3
Some of the Architectural Protocols are not available
0xD4
PCI resource allocation error. Out of Resources
0xD5
No Space for Legacy Option ROM
0xD6
No Console Output Devices are found
- 63 -
BIOS
0xD7
No Console Input Devices are found
0xD8
Invalid password
0xD9
Error loading Boot Option (LoadImage returned error)
0xDA
Boot Option is failed (StartImage returned error)
0xDB
Flash update is failed
0xDC
Reset protocol is not available
ACPI/ASL Checkpoints
Status Code
Description
0x01
System is entering S1 sleep state
0x02
System is entering S2 sleep state
0x03
System is entering S3 sleep state
0x04
System is entering S4 sleep state
0x05
System is entering S5 sleep state
0x10
System is waking up from the S1 sleep state
0x20
System is waking up from the S2 sleep state
0x30
System is waking up from the S3 sleep state
0x40
System is waking up from the S4 sleep state
0xAC
System has transitioned into ACPI mode. Interrupt
controller is in PIC mode.
0xAA
System has transitioned into ACPI mode. Interrupt
controller is in APIC mode.
- 64 -
Appendix
Appendix
Appendix
- 65 -
Appendix
Appendix A: I/O Port Address Map
Each peripheral device in the system is assigned a set of I/O port addresses
which also becomes the identity of the device.
The following table lists the I/O port addresses used.
Address
Device Description
0x00000000-0x000003AF
PCI bus
0x00000000-0x000003AF
Motherboard resources
0x00000000-0x000003AF
Direct memory access controller
0x000003B0-0x000003DF
PCI bus
0x000003B0-0x000003DF
VgaSave
0x000003E0-0x00000CF7
PCI bus
0x00000D00-0x0000FFFF
PCI bus
0x0000F000-0x0000F0FF
Video Controller (VGA Compatible)
0x0000E000-0x0000EFFF
PCI standard PCI-to-PCI bridge
0x0000E000-0x0000EFFF
Standard Dual Channel PCI IDE Controller
0x0000E040-0x0000E047
Standard Dual Channel PCI IDE Controller
0x0000E030-0x0000E033
Standard Dual Channel PCI IDE Controller
0x0000E020-0x0000E027
Standard Dual Channel PCI IDE Controller
0x0000E010-0x0000E013
Standard Dual Channel PCI IDE Controller
0x0000D000-0x0000DFFF PCI standard PCI-to-PCI bridge
0x0000D000-0x0000DFFF Standard Dual Channel PCI IDE Controller
0x0000D040-0x0000D047
Standard Dual Channel PCI IDE Controller
0x0000D030-0x0000D033
Standard Dual Channel PCI IDE Controller
0x0000D020-0x0000D027
Standard Dual Channel PCI IDE Controller
0x0000D010-0x0000D013
Standard Dual Channel PCI IDE Controller
0x0000C000-0x0000CFFF PCI standard PCI-to-PCI bridge
0x0000C000-0x0000CFFF Ethernet Controller
0x0000F190-0x0000F197
Standard Dual Channel PCI IDE Controller
0x0000F180-0x0000F183
Standard Dual Channel PCI IDE Controller
0x0000F170-0x0000F177
Standard Dual Channel PCI IDE Controller
0x0000F160-0x0000F163
Standard Dual Channel PCI IDE Controller
0x0000F150-0x0000F15F
Standard Dual Channel PCI IDE Controller
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Appendix
0x0000F100-0x0000F10F
Standard Dual Channel PCI IDE Controller
0x000001F0-0x000001F7
Primary IDE Channel
0x000003F6-0x000003F6
Primary IDE Channel
0x00000170-0x00000177
Secondary IDE Channel
0x00000376-0x00000376
Secondary IDE Channel
0x00000A79-0x00000A79
ISAPNP Read Data Port
0x00000279-0x00000279
ISAPNP Read Data Port
0x00000274-0x00000277
ISAPNP Read Data Port
0x0000040B-0x0000040B
Motherboard resources
0x000004D6-0x000004D6
Motherboard resources
0x00000C00-0x00000C01
Motherboard resources
0x00000C14-0x00000C14
Motherboard resources
0x00000C50-0x00000C51
Motherboard resources
0x00000C52-0x00000C52
Motherboard resources
0x00000C6C-0x00000C6C Motherboard resources
0x00000C6F-0x00000C6F Motherboard resources
0x00000CD0-0x00000CD1 Motherboard resources
0x00000CD2-0x00000CD3 Motherboard resources
0x00000CD4-0x00000CD5 Motherboard resources
0x00000CD6-0x00000CD7 Motherboard resources
0x00000CD8-0x00000CDF Motherboard resources
0x00000800-0x0000089F
Motherboard resources
0x00000B20-0x00000B3F
Motherboard resources
0x00000900-0x0000090F
Motherboard resources
0x00000910-0x0000091F
Motherboard resources
0x0000FE00-0x0000FEFE Motherboard resources
0x00000370-0x00000371
Motherboard resources
0x000003E8-0x000003EF
Communications Port (COM3)
0x000002E8-0x000002EF
Communications Port (COM4)
0x00000290-0x0000029F
Motherboard resources
0x00000060-0x00000060
Standard 101/102-Key or Microsoft Natural
PS/2 Keyboard
- 67 -
Appendix
0x00000064-0x00000064
Standard 101/102-Key or Microsoft Natural
PS/2 Keyboard
0x000003F8-0x000003FF
Communications Port (COM1)
0x000002F8-0x000002FF
Communications Port (COM2)
0x00000378-0x0000037F
Printer Port (LPT1)
0x00000020-0x00000021
Programmable interrupt controller
0x000000A0-0x000000A1
Programmable interrupt controller
0x00000081-0x00000083
Direct memory access controller
0x00000087-0x00000087
Direct memory access controller
0x00000089-0x0000008B
Direct memory access controller
0x0000008F-0x0000008F
Direct memory access controller
0x000000C0-0x000000DF
Direct memory access controller
0x00000040-0x00000043
System timer
0x00000070-0x00000071
System CMOS/real time clock
0x00000061-0x00000061
System speaker
0x00000010-0x0000001F
Motherboard resources
0x00000022-0x0000003F
Motherboard resources
0x00000044-0x0000005F
Motherboard resources
0x00000062-0x00000063
Motherboard resources
0x00000065-0x0000006F
Motherboard resources
0x00000072-0x0000007F
Motherboard resources
0x00000080-0x00000080
Motherboard resources
0x00000084-0x00000086
Motherboard resources
0x00000088-0x00000088
Motherboard resources
0x0000008C-0x0000008E
Motherboard resources
0x00000090-0x0000009F
Motherboard resources
0x000000A2-0x000000BF
Motherboard resources
0x000000E0-0x000000EF
Motherboard resources
0x000004D0-0x000004D1
Motherboard resources
0x000000F0-0x000000FF
Numeric data processor
0x000003C0-0x000003DF
VgaSave
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Appendix
Appendix B: BIOS Memory Map
Address
Device Description
0xA0000-0xBFFFF
PCI bus
0xA0000-0xBFFFF
VgaSave
0xC0000-0xDFFFF
PCI bus
0x80000000-0xFFFFFFFF
PCI bus
0x68000000-0x7FFFFFFF
Motherboard resources
0xC0000000-0xCFFFFFFF
Video Controller (VGA Compatible)
0xFEB00000-0xFEB3FFFF
Video Controller (VGA Compatible)
0xFEB44000-0xFEB47FFF
Microsoft UAA Bus Driver for High Definition
Audio
0xFEA00000-0xFEAFFFFF
PCI standard PCI-to-PCI bridge
0xFE900000-0xFE9FFFFF
PCI standard PCI-to-PCI bridge
0xFE800000-0xFE8FFFFF
PCI standard PCI-to-PCI bridge
0xFE800000-0xFE8FFFFF
Ethernet Controller
0xD0000000-0xD00FFFFF
PCI standard PCI-to-PCI bridge
0xD0000000-0xD00FFFFF
Ethernet Controller
0xFEB4F000-0xFEB4F3FF
Standard Dual Channel PCI IDE Controller
0xFEB4E000-0xFEB4EFFF
Standard OpenHCD USB Host Controller
0xFEB4D000-0xFEB4D0FF Standard Enhanced PCI to USB Host Controller
0xFEB4C000-0xFEB4CFFF Standard OpenHCD USB Host Controller
0xFEB4B000-0xFEB4B0FF
Standard Enhanced PCI to USB Host Controller
0xFEB40000-0xFEB43FFF
Microsoft UAA Bus Driver for High Definition
Audio
0xFEC00000-0xFEC00FFF
Motherboard resources
0xFEE00000-0xFEE00FFF
Motherboard resources
0xFED80000-0xFED8FFFF
Motherboard resources
0xFED61000-0xFED70FFF
Motherboard resources
0xFEC10000-0xFEC10FFF
Motherboard resources
0xFED00000-0xFED00FFF
Motherboard resources
- 69 -
Appendix
0xFED00000-0xFED00FFF
High precision event timer
0xFFC00000-0xFFFFFFFF
Motherboard resources
0xFEB4A000-0xFEB4AFFF
Standard OpenHCD USB Host Controller
0xFEB49000-0xFEB49FFF
Standard OpenHCD USB Host Controller
0xFEB48000-0xFEB480FF
Standard Enhanced PCI to USB Host Controller
0xE0000000-0xEFFFFFFF
System board
FED45000-FED8FFFF
Motherboard resources
FED90000-FED93FFF
Motherboard resources
FEE00000-FEEFFFFF
Motherboard resources
FF000000-FFFFFFFF
Intel(R) 82802 Firmware Hub Device
FF000000-FFFFFFFF
Motherboard resources
Appendix C: Interrupt Request Lines (IRQ)
Peripheral devices use interrupt request lines to notify CPU for the service
required. The following table shows the IRQ used by the devices on board.
Level
Function
IRQ 9
Microsoft ACPI-Compliant System
IRQ 11
Video Controller (VGA Compatible)
IRQ 19
Microsoft UAA Bus Driver for High Definition Audio
IRQ 19
PCI standard PCI-to-PCI bridge
IRQ 19
Standard Dual Channel PCI IDE Controller
IRQ 16
PCI standard PCI-to-PCI bridge
IRQ 16
Microsoft UAA Bus Driver for High Definition Audio
IRQ 17
PCI standard PCI-to-PCI bridge
IRQ 17
Standard Dual Channel PCI IDE Controller
IRQ 17
Standard Enhanced PCI to USB Host Controller
IRQ 17
Standard Enhanced PCI to USB Host Controller
IRQ 17
Standard Enhanced PCI to USB Host Controller
IRQ 18
PCI standard PCI-to-PCI bridge
IRQ 18
Standard Dual Channel PCI IDE Controller
IRQ 18
Standard OpenHCD USB Host Controller
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Appendix
IRQ 18
Standard OpenHCD USB Host Controller
IRQ 18
Standard OpenHCD USB Host Controller
IRQ 18
Standard OpenHCD USB Host Controller
IRQ 10
Ethernet Controller
IRQ 7
Communications Port (COM3)
IRQ 7
Communications Port (COM4)
IRQ 1
Standard 101/102-Key or Microsoft Natural PS/2 Keyboard
IRQ 12
Microsoft PS/2 Mouse
IRQ 4
Communications Port (COM1)
IRQ 3
Communications Port (COM2)
IRQ 0
System timer
IRQ 8
System CMOS/real time clock
IRQ 13
Numeric data processor
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Appendix
Appendix D: Watchdog Timer (WDT) Setting
WDT is widely used for industry application to monitor the activity of CPU.
Application software depends on its requirement to trigger WDT with adequate
timer setting. Before WDT time out, the functional normal system will reload
the WDT. The WDT never time out for a normal system. Then, WDT will time
out and reset the system automatically to avoid abnormal operation.
This board supports 255 levels watchdog timer by software programming.
Below are the source codes written in C, please take them for WDT application
examples.
C language Code
/*----- Include Header Area -----*/
#include “math.h”
#include “stdio.h”
#include “dos.h”
/*-----
routing, sub-routing -----*/
void main()
{
/*-------- index port 0x2e ---------*/
outportb(0x2e, 0x87);
outportb(0x2e, 0x87);
outportb(0x2e, 0x07);
outportb(0x2e+1, 0x07);
outportb(0x2e, 0xf5);
outportb(0x2e+1, 0x40);
outportb(0x2e, 0xf0);
outportb(0x2e+1, 0x81);
outportb(0x2e, 0xf6);
outportb(0x2e+1, 0x05);
outportb(0x2e, 0xf5);
outportb(0x2e+1, 0x20);
}
outportb(0x2e, 0xAA);
/* initial IO port */
/* twice, */
/* point to logical device */
/* select logical device 7 */
/* select offset f5h */
/* set bit5 = 1 to clear bit5 */
/* select offset f0h */
/* set bit7 =1 to enable WDTRST# */
/* select offset f6h */
/* update offset f6h to 0ah :10sec */
/* select offset f5h */
/* set bit5 = 1 enable watch dog time */
/* stop program F71869E, Exit */
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Appendix
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