Simulink® PLC Coder™ Release Notes

Simulink® PLC Coder™ Release Notes
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Simulink® PLC Coder™ Release Notes
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Contents
R2015a
Code generation for 3S-Smart Software Solutions CoDeSys
V3.5 IDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-2
Generation of code that preserves variable names in
MATLAB Function blocks . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-2
R2014b
Code generation for Rexroth IndraWorks version 13V12
IDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-2
Code generation for OMRON Sysmac Studio v1.09 IDE . . . .
2-2
Code generation support for exported functions in
Stateflow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-2
Code generation support for global data store memory using
Simulink.Signal object . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-2
Variable names preserved for function block inputs and
outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-2
iii
R2014a
Static code metrics report . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-2
Code generation for Siemens STEP 7 V5.5 IDE, B&R
Automation Studio 4 IDE, and Beckhoff TwinCAT 3 IDE .
3-2
Model block description in generated code for CoDeSys 2.3
IDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-2
Simulink.Parameter description in generated code for
Codesys 2.3 IDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-2
Change in Diagnostic Viewer launch behavior after code
generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-2
R2013b
iv
Contents
Masked parameters for atomic subsystems . . . . . . . . . . . . . .
4-2
Reusable code for intrinsic functions . . . . . . . . . . . . . . . . . . .
4-2
Millisecond and microsecond units with absolute-time
temporal logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4-2
PC WORX IDE support improvements including enhanced
support for global tunable parameters . . . . . . . . . . . . . . . .
4-2
Temporary variable minimization . . . . . . . . . . . . . . . . . . . . . .
4-2
Relative tolerance for test bench data comparison . . . . . . . .
4-3
R2013a
Code generation for OMRON Sysmac Studio IDE . . . . . . . . .
5-2
Code generation for multirate models in single-tasking
mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5-2
R2012b
Workflow for behavioral simulation and code generation of
motion instructions for RSLogix 5000 IDE . . . . . . . . . . . . .
6-2
Code generation report with bidirectional traceability
between model and code . . . . . . . . . . . . . . . . . . . . . . . . . . .
6-2
Propagation of block descriptions to generated code
comments and RSLogix 5000 AOI/routine descriptions . .
6-2
Code generation optimizations for efficient casts and signal
reuse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6-3
Internal signals available as optional AOI outputs for
debugging in RSLogix 5000 IDE . . . . . . . . . . . . . . . . . . . . .
6-3
Rockwell Automation RSLogix 5000 IDE Version 19 . . . . . . .
6-3
Absolute Time Temporal Logic . . . . . . . . . . . . . . . . . . . . . . . .
6-4
R2012a
Code Generation for Rockwell Automation RSLogix 5000
Routines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7-2
v
Global Tunable Parameters for Generated Code from
Rockwell Automation RSLogix 5000 Add-On Instructions
and Routine Formats and Phoenix Contact PC WORX . . .
7-2
Support for Absolute Time Temporal Logic for the Rockwell
Automation RSLogix 5000 IDE . . . . . . . . . . . . . . . . . . . . . . .
7-3
Integration of Externally Defined Symbols in Generated
Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7-3
Support for Configuring Tunable Parameters Using
Simulink.Parameter Objects . . . . . . . . . . . . . . . . . . . . . . . .
7-3
Author Creation Data, Descriptions, and Sample Times in
Generated Code Header Comments . . . . . . . . . . . . . . . . . .
7-3
Support for atan2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7-4
Convenience Dynamic Lookup Table Block . . . . . . . . . . . . . .
7-4
New Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7-4
R2011b
Automatic IDE Import of Subsystem Code Without Test
Bench . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8-2
Subsystem Function Block Code . . . . . . . . . . . . . . . . . . . . . . .
8-2
New Demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8-3
R2011a
Support for New PLC Target IDEs . . . . . . . . . . . . . . . . . . . . .
vi
Contents
9-2
Generated Code File Name Can Now Be Renamed . . . . . . . .
9-2
Generated Code File Header Change . . . . . . . . . . . . . . . . . . .
9-2
Support for Lookup Table Blocks . . . . . . . . . . . . . . . . . . . . . .
9-2
Support for Fixed Point Data Types . . . . . . . . . . . . . . . . . . . .
9-2
CORDIC Trigonometric Functions . . . . . . . . . . . . . . . . . . . . .
9-2
64-Bit Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9-3
New Demos . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9-3
R2010b
Support for Triggered Subsystems . . . . . . . . . . . . . . . . . . . .
10-2
Support for New PLC Target IDEs . . . . . . . . . . . . . . . . . . . .
10-2
Automatic Import of Generated Code . . . . . . . . . . . . . . . . . .
10-2
New Demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10-2
R2010a
New Product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11-2
vii
R2015a
Version: 1.9
New Features
Bug Fixes
R2015a
Code generation for 3S-Smart Software Solutions CoDeSys V3.5 IDE
Simulink® PLC Coder™ supports CoDeSys IDE V3.5.
Generation of code that preserves variable names in MATLAB Function
blocks
The generated structured text from Simulink PLC Coder retains the names of variables
defined in MATLAB® functions.
This behavior allows you to easily map variables defined in your MATLAB code to
the ones in the generated structured text. Earlier, certain optimizations during code
generation caused reuse of variable names.
1-2
R2014b
Version: 1.8
New Features
Bug Fixes
R2014b
Code generation for Rexroth IndraWorks version 13V12 IDE
Simulink PLC Coder supports Rexroth IndraWorks version 13V12 IDE.
Code generation for OMRON Sysmac Studio v1.09 IDE
Simulink PLC Coder supports OMRON® Sysmac® Studio v1.09 IDE.
Code generation support for exported functions in Stateflow
Simulink PLC Coder supports code generation for Stateflow® exported functions.
Functions may be defined in one Stateflow chart, and be exported and called by other
charts.
Code generation support for global data store memory using
Simulink.Signal object
Simulink PLC Coder supports code generation for global data store memory using
Simulink.Signal objects. This applies to IDEs which support global variables.
Variable names preserved for function block inputs and outputs
For PLC code generation, Simulink PLC Coder preserves function block input and output
variable names to be the same as specified in the model. Variable names are changed if
they conflict with reserved names or keywords in the target.
2-2
R2014a
Version: 1.7
New Features
Bug Fixes
R2014a
Static code metrics report
Simulink PLC Coder reports key characteristics of the generated code, such as number of
variables and lines of code in each function block. For more information, see Generate a
Static Code Metrics Report.
Code generation for Siemens STEP 7 V5.5 IDE, B&R Automation Studio 4
IDE, and Beckhoff TwinCAT 3 IDE
Simulink PLC Coder supports Siemens® STEP® 7 version 5.5, B&R Automation Studio®
4, and Beckhoff® TwinCAT® 3.
Model block description in generated code for CoDeSys 2.3 IDE
Simulink PLC Coder generates a model block description in the code for the CoDeSys 2.3
IDE.
Simulink.Parameter description in generated code for Codesys 2.3 IDE
Simulink PLC Coder generates a Simulink.Parameter description in the code for the
CoDeSys 2.3 IDE.
Change in Diagnostic Viewer launch behavior after code generation
After PLC code generation, the Diagnostic Viewer window showing the PLC Code
Generation log no longer launches automatically. Instead, a "View diagnostics" hyperlink
appears at the bottom of the Simulink model window. This link opens the Diagnostic
Viewer and the PLC Code Generation log with links to the generated code.
3-2
R2013b
Version: 1.6
New Features
Bug Fixes
R2013b
Masked parameters for atomic subsystems
Mask parameters for subsystems now map to function block inputs in the generated code.
To see how mask parameters map to generated code, see Generated Code Structure for
Subsystem Mask Parameters.
Reusable code for intrinsic functions
For internal MATLAB functions, such as atan2, Simulink PLC Coder generates a single
copy of the function in the generated code.
Millisecond and microsecond units with absolute-time temporal logic
You can generate code for Stateflow absolute-time temporal logic that uses the
millisecond (msec) and microsecond (usec) time units.
PC WORX IDE support improvements including enhanced support for
global tunable parameters
Simulink PLC Coder generates code for the PC WORX™ IDE with the following
improvements:
• Global tunable parameters that are structures and array data types are initialized in
a PLC_INIT_PARAMETERS function block. For more information, see Global Tunable
Parameter Initialization for PC WORX.
• floor and ceil rounding is supported.
• Array type names incorporate data type description and size.
For example, if you have a 51-element array of real data, the generated code for the
array data type is:
PLC_ARRAY_0_50_LREAL: ARRAY [0..50] OF LREAL;
• Code generation header comments and block description comments are in the body of
the generated code, and are therefore visible when you import the code into the IDE.
Temporary variable minimization
The coder minimizes the number of temporary variables. This optimization improves
code quality and memory usage.
4-2
Relative tolerance for test bench data comparison
When checking single and double data type values, the test bench now uses a relative
error tolerance. Integer data type comparisons in the test bench still use an absolute
tolerance.
To learn more about test bench data comparison, see How Test Bench Verification
Works.
4-3
R2013a
Version: 1.5
New Features
Bug Fixes
R2013a
Code generation for OMRON Sysmac Studio IDE
The Simulink PLC Coder software now supports OMRON Sysmac Studio Version 1.04 or
later.
Code generation for multirate models in single-tasking mode
The Simulink PLC Coder software can now generate code for multirate models in singletasking mode. For more information, see Generated Code Structure for Multirate Models
and Multirate Model Restrictions.
To open an example that shows how to generate code from a multirate model, at the
command line, enter:
plcdemo_multirate
5-2
R2012b
Version: 1.4
New Features
Bug Fixes
R2012b
Workflow for behavioral simulation and code generation of motion
instructions for RSLogix 5000 IDE
The Simulink PLC Coder software now supports a workflow for the behavioral
simulation and code generation of motion instructions for the Rockwell Automation®
RSLogix™ 5000 IDE. For more information, see Simulation and Code Generation of
Motion Instructions.
Code generation report with bidirectional traceability between model and
code
Simulink PLC Coder now creates and displays a traceability report file. You can also opt
to display the report in a model Web view. See the following Configuration Parameter
options.
GUI option
Command-Line Property
Description
Generate
traceability
report
PLC_GenerateReport
Specify whether to create code
generation report.
Generate
model Web
view
PLC_GenerateWebview
Include the model Web view in
the code generation report to
navigate between the code and
model within the same window.
You can share your model and
generated code outside of the
MATLAB environment.
For more information, see Information in Code Generation Reports.
Propagation of block descriptions to generated code comments and
RSLogix 5000 AOI/routine descriptions
The Simulink PLC Coder software now propagates block comments to generated code for
all target IDEs. For more information, see Propagation of Block Descriptions.
For Rockwell Automation RSLogix 5000 AOI/routine target IDEs, the coder also
generates the subsystem block description text as an AOI or routine description L5X
6-2
XML tag. The IDE can then import the tag as part of AOI and routine definition in the
generated code.
Code generation optimizations for efficient casts and signal reuse
An Optimization pane has been added to the Configuration Parameters dialog box PLC
Coder node. This pane contains the following parameters:
GUI option
Command-Line Property
Description
Signal storage
reuse
PLC_PLCEnableVarReuse
Reuse signal memory.
Remove code
PLC_PLCEnableEfficientCast
from floatingpoint to integer
conversions that
wraps out-ofrange values
Enable code removal for
efficient casts.
Loop unrolling
threshold
Specify the minimum signal or
parameter width for which a
for loop is generated.
PLC_RollThreshold
For more information, see Model Architecture and Design.
Internal signals available as optional AOI outputs for debugging in
RSLogix 5000 IDE
The Simulink PLC Coder software now generates code where test point outputs to the
top level subsystem are mapped to optional AOI outputs for RSLogix 5000 IDE. In the
generated code, the variable tags that correspond to the test points have the property
Required=false.
For more information, see Internal Signals for Debugging in RSLogix 5000 IDE.
Rockwell Automation RSLogix 5000 IDE Version 19
The Simulink PLC Coder software now supports Rockwell Automation RSLogix 5000
IDE Version 19.
6-3
R2012b
Absolute Time Temporal Logic
The Simulink PLC Coder product now enables absolute time temporal logic for all
supported IDEs. In previous releases, this capability was supported only for the Rockwell
Automation RSLogix IDE. For more information, see Integrate Absolute Time Temporal
Logic Code.
6-4
R2012a
Version: 1.3
New Features
Bug Fixes
R2012a
Code Generation for Rockwell Automation RSLogix 5000 Routines
The Simulink PLC Coder software now generates code for routines from the Rockwell
Automation RSLogix 5000 IDE.
• Load the code generated from routines without first restarting the Rockwell
Automation RSLogix 5000 PLC. You can now:
• Take advantage of RSLogix user defined types (UDTs) to preserve model hierarchy in
routine code and represent model.
• Observe that reusable subsystems become separate routine instances and access
instance data in program UDTs.
To accommodate this capability:
• In the Configuration Parameters dialog box PLC Code Generation > Target IDE
parameter, the Rockwell RSLogix 5000 17, 18: Routine option was added.
• In the Configuration Parameters dialog box PLC Code Generation > Target IDE
parameter, the Rockwell RSLogix 5000 17, 18 option was changed to Rockwell
RSLogix 5000 17, 18: AOI. This renamed option continues to generate code for
Add-On instruction constructs, as in previous releases.
• In the command-line PLC_TargetIDE parameter, the rslogix5000_routine option
was added.
For more information, see Target IDE.
Global Tunable Parameters for Generated Code from Rockwell
Automation RSLogix 5000 Add-On Instructions and Routine Formats and
Phoenix Contact PC WORX
The Simulink PLC Coder software supports global tunable parameters for generated
code from Rockwell Automation RSLogix 5000 Add-On instructions (AOIs) and routine
formats and Phoenix Contact® PC WORX. For more information on how tunable
parameters are mapped, see About Tunable Parameters in the Simulink PLC Coder
Environment in the Simulink PLC Coder User's Guide.
7-2
Support for Absolute Time Temporal Logic for the Rockwell Automation
RSLogix 5000 IDE
The Simulink PLC Coder software now supports absolute time temporal logic in
Stateflow charts for the Rockwell Automation RSLogix 5000 IDE. The coder does not
support absolute time temporal logic for other target IDEs.
Note: If your model uses absolute time temporal logic, you cannot create test bench code
for that model.
Integration of Externally Defined Symbols in Generated Code
You can now suppress symbol definitions in the generated code. This suppression allows
the generated code to refer to these symbols. You must then provide these definitions
when importing the code into the PLC IDE. For more information, see Integrating
Externally Defined Symbols.
Support for Configuring Tunable Parameters Using Simulink.Parameter
Objects
You can now configure tunable parameters using Simulink.Parameter objects. In
previous releases, you could only configure tunable parameters using the Configuration
Parameters dialog box. For more information, see Working with Tunable Parameters in
the Simulink PLC Coder Environment.
Author Creation Data, Descriptions, and Sample Times in Generated
Code Header Comments
The Simulink PLC Coder generated code header now includes:
• Author names from model properties
• Creation dates from model properties
• Model descriptions from model properties
• Fundamental sample times for the model and the subsystem block for which you
generate code
7-3
R2012a
Support for atan2
The Simulink PLC Coder software now supports the math function atan2.
Convenience Dynamic Lookup Table Block
As a convenience, the DynamicLookup block has been added to the plclib/Simulink/
Lookup Tables sublibrary. In previous releases, you could achieve the dynamic lookup
behavior using the Prelookup block with the Interpolation Using Prelookup block. Going
forward, use the plclib/Simulink/Lookup Tables/DynamicLookup block.
New Examples
The following examples are new:
• Speed Cruise Control System Using Variable-Step Continuous Solver
— Illustrates code generation for the variable-step continuous solver. In this example,
the controller subsystem has a fixed sample time, while the model has a variable-step
continuous solver.
• Mapping Tunable Parameters Defined Using Simulink.Parameter
Objects to Structured Text — Illustrates the specification of tunable
parameters using Simulink.Parameter objects in the MATLAB base workspace.
• Generating Structured Text for Stateflow Chart with Absolute
Time Temporal Logic — Illustrates code generation for Stateflow Chart blocks
with absolute time temporal logic. This example requires the Rockwell Automation
RSLogix AOI or routine format.
• Integrating User Defined Function Blocks, Data Types, and Global
Variables into Generated Structured Text — Illustrates how to integrate
user defined function blocks, data types, and global variables and constants into
generated Structured Text.
7-4
R2011b
Version: 1.2.1
New Features
Bug Fixes
Compatibility Considerations
R2011b
Automatic IDE Import of Subsystem Code Without Test Bench
The Simulink PLC Coder software now generates and imports subsystem code into target
IDEs without the test bench. To use this feature:
1
2
In the Configuration Parameters dialog box, clear the Generate testbench for
subsystem check box.
In the Simulink editor, right-click the subsystem and select PLC Code Generation
> Generate and Import Code for Subsystem.
In previous releases, the coder generated and imported test bench code into the target
IDE regardless of the setting of the Generate testbench for subsystem check box.
Subsystem Function Block Code
In generated code, the function block code of the top-level subsystem has been simplified.
The coder now generates the function block code depending on whether or not the toplevel subsystem has internal state. In previous releases, the coder always generated the
function block code with the ssMethodType parameter for top-level subsystems.
Compatibility Considerations
This release simplifies the function block code of the top-level subsystem for generated
code.
• If the top-level subsystem in the Simulink model has internal state, the generated
function block for the block will have an extra first parameter ssMethodType of
integer type. This extra parameter is in addition to the function block I/O parameters
mapped from Simulink block I/O ports.
To use the function block:
8-2
1
Initialize the block by calling the function block with ssMethodType set to
integer constant SS_INITIALIZE.
2
If the IDE does not support symbolic constants, set ssMethodType to integer
value 0.
3
For each follow-up invocation, call the function block with ssMethodType set to
constant SS_STEP.
4
If the IDE does not support symbolic constants, set ssMethodType to integer
value 1.
These settings cause the function block to initialize or compute and return output for
each time step.
• If the top-level subsystem does not have internal state, the function block code has
only parameters mapped from Simulink block I/O ports. There is no ssMethodType
parameter. To use the function block in this case, call the function block with I/O
arguments.
For non-top-level subsystems, either with or without internal state, the function
block code has the ssMethodType parameter. The generated code might have other
ssMethodType constants to implement Simulink semantics.
New Demo
The following demo is new:
• Generating Structured Text for a Simple Simulink Subsystem without Internal State
— Illustrates changes for function block prototypes in generated code.
8-3
R2011a
Version: 1.2
New Features
Bug Fixes
R2011a
Support for New PLC Target IDEs
The Simulink PLC Coder software now supports code generation and automatic import of
code for the Phoenix Contact PC WORX IDE.
See Supported IDE Platforms in the Simulink PLC Coder User's Guide for more
information.
Generated Code File Name Can Now Be Renamed
You can now specify a custom name for the code file that you generate with Simulink
PLC Coder. Use the Function name options parameter in the Subsystem block.
Generated Code File Header Change
The comment header in the code file that you generate with Simulink PLC Coder now
includes a sample time field for the model.
Support for Lookup Table Blocks
Simulink PLC Coder models can now generate code for lookup table blocks.
Support for Fixed Point Data Types
Simulink PLC Coder models can now generate code for fixed point data types. For more
information, see Fixed-Point Data Type Limitations in the Simulink PLC Coder User's
Guide.
CORDIC Trigonometric Functions
The Simulink PLC Coder product now supports code generation for CORDIC
trigonometric functions. This support enables you to use trigonometric functions for
PLCs that do not support these functions in built-in libraries.
To generate code for CORDIC trigonometric functions:
9-2
1
Add the Simulink Trigonometric Function block to the coder subsystem.
2
Configure the block to the desired trigonometric function.
3
From the Approximation method parameter, select CORDIC.
4
Generate code for the atomic subsystem.
64-Bit Support
The Simulink PLC Coder product supports 64-bit systems. You can still use the Simulink
PLC Coder product with 32-bit IDEs.
See the MathWorks® website at Supported IDEs for a list of supported IDEs and
platforms.
New Demos
The following demos are new:
• Airport Conveyer Belt Control System — Illustrates code generated for an airport
conveyer belt.
• Generating Structured Text for Simulink Model with Fixed-Point Data Types —
Illustrates generating fixed-point code in the Simulink PLC Coder environment.
9-3
R2010b
Version: 1.1
New Features
R2010b
Support for Triggered Subsystems
You can now use the Simulink PLC Coder software to generate code from Simulink
triggered subsystems. Use the Triggered Subsystem block. See How Triggered
Subsystem Code Maps to Function Blocks in the Simulink PLC Coder User's Guide.
Support for New PLC Target IDEs
The Simulink PLC Coder software now supports:
• Siemens SIMATIC® STEP 7 IDE
• KW-Software MULTIPROG® 5.0 IDE
See Supported IDE Platforms in the Simulink PLC Coder User's Guide for more
information.
Automatic Import of Generated Code
You can now automatically import Structured Text code, generated by the Simulink PLC
Coder software, to your PLC IDE. In previous releases, you imported the generated code
manually according to the instructions provided by the PLC IDE manufacturer.
You can take advantage of this capability for the following PLC IDEs:
• CoDeSys IDE V2.3
• Rockwell Automation RSLogix 5000 IDE
• Siemens SIMATIC STEP 7 IDE
• KW-Software MULTIPROG 5.0 IDE
See Automatically Importing Structured Text Code in the Simulink PLC Coder User's
Guide for more information.
New Demo
A new Simulink PLC Coder demo, Speed Cruise Control System Using Simulink and
Stateflow, illustrates code generated for a cruise control controller subsystem using a
triggered subsystem.
10-2
R2010a
Version: 1.0
New Features
R2010a
New Product
Simulink PLC Coder generates hardware-independent IEC 61131-3 Structured Text
from Simulink models, Stateflow charts, and Embedded MATLAB® functions. The
Structured Text is generated in PLCopen and other file formats supported by widely used
integrated development environments (IDEs). As a result, you can compile and deploy
your application to numerous programmable logic controller (PLC) and programmable
automation controller (PAC) devices.
Simulink PLC Coder generates test benches that help you verify the Structured Text
using PLC and PAC IDEs and simulation tools.
Key features:
• Automatic generation of IEC 61131-3 Structured Text
• Simulink support, including reusable subsystems, PID controller blocks, and lookup
tables
• Stateflow support, including graphical functions, truth tables, and state machines
• Embedded MATLAB support, including if-else statements, loop constructs, and math
operations
• Support for multiple data types, including Boolean, integer, enumerated, and floatingpoint, as well as vectors, matrices, buses, and tunable parameters
• IDE support, including B&R Automation Studio, PLCopen, Rockwell Automation
RSLogix 5000, and Smart Software Solutions CoDeSys
• Test-bench creation
11-2