datasheet for ADP2108AUJZ-1.2

datasheet for ADP2108AUJZ-1.2

Compact, 600 mA, 3 MHz,

Step-Down DC-to-DC Converter

Data Sheet

ADP2108

FEATURES

Peak efficiency: 95%

3 MHz fixed frequency operation

Typical quiescent current: 18 μA

Maximum load current: 600 mA

Input voltage: 2.3 V to 5.5 V

Uses tiny multilayer inductors and capacitors

Current mode architecture for fast load and line transient response

100% duty cycle low dropout mode

Internal synchronous rectifier

Internal compensation

Internal soft start

Current overload protection

Thermal shutdown protection

Shutdown supply current: 0.2 μA

Available in

5-ball WLCSP

5-lead TSOT

Supported by ADIsimPower ™ design tool

APPLICATIONS

PDAs and palmtop computers

Wireless handsets

Digital audio, portable media players

Digital cameras, GPS navigation units

GENERAL DESCRIPTION

The ADP2108 is a high efficiency, low quiescent current stepdown dc-to-dc converter manufactured in two different packages. The total solution requires only three tiny external components. It uses a proprietary, high speed current mode, constant frequency PWM control scheme for excellent stability and transient response. To ensure the longest battery life in portable applications, the ADP2108 has a power save mode that reduces the switching frequency under light load conditions.

The ADP2108 runs on input voltages of 2.3 V to 5.5 V, which allows for single lithium or lithium polymer cell, multiple alkaline or NiMH cell, PCMCIA, USB, and other standard power sources.

The maximum load current of 600 mA is achievable across the input voltage range.

The ADP2108 is available in fixed output voltages of 3.3 V, 3.0 V,

2.5 V, 2.3 V, 1.82 V, 1.8 V, 1.5 V, 1.3 V, 1.2 V, 1.1 V, and 1.0 V. All versions include an internal power switch and synchronous rectifier for minimal external part count and high efficiency. The

ADP2108 has an internal soft start and is internally compensated.

During logic controlled shutdown, the input is disconnected from the output and the ADP2108 draws less than 1 μA from the input source.

Other key features include undervoltage lockout to prevent deep battery discharge and soft start to prevent input current overshoot at startup. The ADP2108 is available in 5-ball WLCSP and

5-lead TSOT packages. The ADP2109 provides the same features and operations as the ADP2108 and has the additional function of a discharge switch in the WLCSP package.

TYPICAL APPLICATIONS CIRCUIT

ADP2108

1µH

1.0V TO 3.3V

2.3V TO 5.5V

SW

VIN

10µF

4.7µF

OFF

ON

EN

GND

FB

Figure 1.

Rev. G

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved.

ADP2108

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Typical Applications Circuit ............................................................ 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Absolute Maximum Ratings ............................................................ 4

Thermal Resistance ...................................................................... 4

ESD Caution .................................................................................. 4

Pin Configuration and Function Descriptions ............................. 5

Typical Performance Characteristics ............................................. 6

Theory of Operation ...................................................................... 11

Control Scheme .......................................................................... 11

PWM Mode ................................................................................. 11

Power Save Mode ........................................................................ 11

REVISION HISTORY

6/12—Rev. F to Rev. G

Change to Features Section ............................................................. 1

Added ADIsimPower Design Tool Section ................................. 13

Updated Outline Dimensions ....................................................... 16

1/12—Rev. E to Rev. F

Change to Table 3................................................................................... 4

Changes to Output Capacitor Section ......................................... 13

10/10—Rev. D to Rev. E

Changed −40°C to +85°C to −40°C to +125°C Throughout ......... 3

Changes to Ordering Guide .......................................................... 17

1/10—Rev. C to Rev. D

Changes to Ordering Guide .......................................................... 17

4/09—Rev. B to Rev. C

Changes to General Description Section ...................................... 1

2/09—Rev. A to Rev. B

Added 5-Lead TSOT Package ........................................... Universal

Changes to Absolute Maximum Ratings Section ......................... 4

Updated Outline Dimensions ....................................................... 16

Changes to Ordering Guide .......................................................... 17

11/08—Rev. 0 to Rev. A

Changes to Figure 4 .......................................................................... 6

Updated Outline Dimensions ....................................................... 16

9/08—Revision 0: Initial Version

Rev. G | Page 2 of 20

Data Sheet

Enable/Shutdown ....................................................................... 11

Short-Circuit Protection ............................................................ 12

Undervoltage Lockout ............................................................... 12

Thermal Protection .................................................................... 12

Soft Start ...................................................................................... 12

Current Limit .............................................................................. 12

100% Duty Operation ................................................................ 12

Applications Information .............................................................. 13

ADIsimPower Design Tool ....................................................... 13

External Component Selection ................................................ 13

Thermal Considerations ............................................................ 14

PCB Layout Guidelines.............................................................. 14

Evaluation Board ............................................................................ 15

Outline Dimensions ....................................................................... 16

Ordering Guide .......................................................................... 17

Data Sheet ADP2108

SPECIFICATIONS

V

IN

= 3.6 V, V

OUT

= 1.8 V, T

J

= −40°C to +125°C for minimum/maximum specifications, and T

A

= 25°C for typical specifications, unless

otherwise noted.

1

Table 1.

Parameter

INPUT CHARACTERISTICS

Input Voltage Range

Undervoltage Lockout Threshold

OUTPUT CHARACTERISTICS

Output Voltage Accuracy

POWER SAVE MODE TO PWM CURRENT THRESHOLD

PWM TO POWER SAVE MODE CURRENT THRESHOLD

INPUT CURRENT CHARACTERISTICS

DC Operating Current

Shutdown Current

SW CHARACTERISTICS

SW On Resistance (WLCSP)

SW On Resistance (TSOT)

Current Limit

ENABLE CHARACTERISTICS

EN Input High Threshold

EN Input Low Threshold

EN Input Leakage Current

OSCILLATOR FREQUENCY

START-UP TIME

Test Conditions/Comments

V

IN

rising

V

IN

falling

PWM mode

V

IN

= 2.3 V to 5.5 V, PWM mode

I

LOAD

= 0 mA, device not switching

EN = 0 V, T

A

= T

J

= −40°C to +125°C

PFET

NFET

PFET

NFET

PFET switch peak current limit

EN = 0 V, 3.6 V

I

LOAD

= 200 mA

THERMAL CHARACTERISTICS

Thermal Shutdown Threshold

Thermal Shutdown Hysteresis

1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).

Min

2.3

2.05

−2

−2.5

85

80

Typ

2.15

Max

5.5

2.3

2.25

Unit

V

V

V

+2 %

+2.5 % mA mA

1.2

−1

2.5

18

0.2

30

1.0

µA

µA

320

300

380

260 mΩ mΩ mΩ mΩ

1100 1300 1500 mA

0

3.0

150

20

0.4

+1

3.5

550 µs

°C

°C

V

V

µA

MHz

Rev. G | Page 3 of 20

ADP2108

ABSOLUTE MAXIMUM RATINGS

Table 2.

VIN, EN −0.4 V to +6.5 V

FB, SW to GND −1.0 V to (V

IN

+ 0.2 V)

Operating Ambient Temperature Range −40°C to +125°C

Operating Junction Temperature Range −40°C to +125°C

Storage Temperature Range

Lead Temperature Range

Soldering (10 sec)

Vapor Phase (60 sec)

Infrared (15 sec)

ESD Human Body Model

−65°C to +150°C

−65°C to +150°C

300°C

215°C

220°C

±1500 V

ESD Charged Device Model

ESD Machine Model

±500 V

±100 V

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to GND.

The ADP2108 can be damaged when the junction temperature limits are exceeded. Monitoring ambient temperature does not guarantee that T

J

is within the specified temperature limits.

In applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may have to be derated.

Data Sheet

In applications with moderate power dissipation and low PCB exceed the maximum limit as long as the junction temperature is within specification limits. The junction temperature (T

J

) of the device is dependent on the ambient temperature (T

A

), the power dissipation (P

D

) of the device, and the junction-toambient thermal resistance of the package (θ

JA

). Maximum junction temperature (T

J

) is calculated from the ambient temperature (T

A

) and power dissipation (P

D

) using the formula

T

J

= T

A

+ (P

D

× θ

JA

).

THERMAL RESISTANCE

θ

JA

is specified for a device mounted on a JEDEC 2S2P PCB.

Table 3. Thermal Resistance

Package Type

5-Ball WLCSP

5-Lead TSOT

ESD CAUTION

θ

JA

Unit

105 °C/W

170 °C/W

Rev. G | Page 4 of 20

Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

A

BALL A1

INDICATOR

1 2

VIN GND

SW

B

EN FB

C

ADP2108

TOP VIEW

(BALL SIDE DOWN)

Not to Scale

Figure 2. WLCSP Pin Configuration

Table 4. WLCSP Pin Function Descriptions

Pin No. Mnemonic Description

A1 VIN Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 2.2 μF or greater capacitor as close to the ADP2108 as possible.

A2 GND Ground. Connect all the input and output capacitors to GND.

B

C1

C2

SW

EN

FB

Switch Node Output. SW is the drain of the PFET switch and NFET synchronous rectifier.

Enable Input. Drive EN high to turn on the ADP2108. Drive EN low to turn it off and reduce the input current to 0.2 μA.

Feedback Input of the Error Amplifier. Connect FB to the output of the switching regulator.

VIN

1 5

SW

ADP2108

GND 2 TOP VIEW

(Not to Scale)

EN

3 4

FB

Figure 3. TSOT Pin Configuration

Table 5. TSOT Pin Function Descriptions

Pin No. Mnemonic Description

3

4

5

1 VIN Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 2.2 μf or greater capacitor as close to the ADP2108 as possible.

2 GND Ground. Connect all the input and output capacitors to GND.

EN

FB

SW

Enable Input. Drive EN high to turn on the ADP2108. Drive EN low to turn it off and reduce the input current to 0.1 μA.

Feedback Input of the Error Amplifier. Connect FB to the output of the switching regulator.

Switch Node Output. SW is the drain of the PFET switch and NFET synchronous rectifier.

Rev. G | Page 5 of 20

ADP2108

TYPICAL PERFORMANCE CHARACTERISTICS

V

IN

= 3.6 V, T

A

= 25°C, V

EN

= V

IN

, unless otherwise noted.

24

+85°C

22

20

+25°C

18

–40°C

16

14

1.840

1.835

1.830

1.825

1.820

1.815

1.810

1.805

1.800

1.795

–45

12

2.5

3.0

3.5

4.0

4.5

INPUT VOLTAGE (V)

5.0

3500

3400

3300

3200

3100

3000

2900

2800

2700

2600

2500

2.3

Figure 4. Quiescent Supply Current vs. Input Voltage

2.8

–40°C

+25°C

+85°C

3.3

3.8

4.3

INPUT VOLTAGE (V)

4.8

5.3

5.5

Figure 5. Switching Frequency vs. Input Voltage

–25

I

OUT

= 10mA

I

OUT

= 150mA

I

OUT

= 500mA

–5 15 35

TEMPERATURE (°C)

55 75

Figure 6. Output Voltage vs. Temperature

Rev. G | Page 6 of 20

Data Sheet

1400

1300

1200

1100

1000

900

800

700

0.15

0.14

0.13

0.12

0.11

0.10

0.09

0.08

0.07

0.06

2.5

600

2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5

INPUT VOLTAGE (V)

Figure 7. PMOS Current Limit vs. Input Voltage

0.15

0.14

0.13

0.12

0.11

0.10

0.09

0.08

0.07

–40°C

0.06

0.05

0.04

2.5

+85°C

3.0

PWM TO PSM PSM TO PWM

3.5

4.0

4.5

INPUT VOLTAGE (V)

5.0

5.5

Figure 8. Mode Transition Across Temperature

3.0

PSM TO PWM

PWM TO PSM

3.5

4.0

4.5

INPUT VOLTAGE (V)

5.0

5.5

Figure 9. Mode Transition

Data Sheet

1.825

1.815

1.805

1.795

1.785

V

IN

V

IN

V

IN

V

IN

= 2.7V

= 3.6V

= 4.5V

= 5.5V

1.775

0

1.025

1.020

1.015

1.010

1.005

1.000

0.995

0.990

0.985

0

0.1

0.2

0.3

0.4

OUTPUT CURRENT (A)

Figure 10. Load Regulation, V

OUT

= 1.8 V

0.5

V

IN

V

IN

V

IN

V

IN

= 2.7V

= 3.6V

= 4.5V

= 5.5V

0.1

0.2

0.3

0.4

OUTPUT CURRENT (A)

Figure 11. Load Regulation, V

OUT

= 1.0 V

0.5

0.6

0.6

3.3775

3.3575

3.3375

3.3175

3.2975

3.2775

3.2575

3.2375

3.2175

0

V

IN

V

IN

= 3.6V

= 4.5V

V

IN

= 5.5V

0.1

0.2

0.3

0.4

OUTPUT CURRENT (A)

Figure 12. Load Regulation, V

OUT

= 3.3 V

0.5

0.6

100

90

80

70

60

50

40

30

20

10

0

0.001

V

IN

V

IN

V

IN

V

IN

= 2.7V

= 3.6V

= 4.5V

= 5.5V

100

90

80

70

60

50

40

30

20

10

0

0.001

0.01

0.1

OUTPUT CURRENT (A)

Figure 13. Efficiency, V

OUT

= 1.8 V

100

90

80

70

60

50

40

30

20

10

0

0.001

V

IN

= 2.7V

V

IN

V

IN

V

IN

= 3.6V

= 4.5V

= 5.5V

0.01

0.1

OUTPUT CURRENT (A)

Figure 14. Efficiency, V

OUT

= 1.0 V

V

IN

V

IN

V

IN

= 3.6V

= 4.5V

= 5.5V

0.01

0.1

OUTPUT CURRENT (A)

Figure 15. Efficiency, V

OUT

= 3.3 V

ADP2108

1

1

1

Rev. G | Page 7 of 20

ADP2108

3

V

IN

SW

4

1

V

OUT

CH1 50mV

CH3 1V CH4 2V

M 40µs

T 10.80%

A CH3 3.26V

Figure 16. Line Transient, V

OUT

= 1.8 V, Power Save Mode, 20 mA

V

IN

3

4

1

SW

3

4

1

V

OUT

CH1 20mV

CH3 1V CH4 2V

M 40µs

T 10.80%

A CH3 3.26V

Figure 17. Line Transient, V

OUT

= 1.8 V, PWM, 200 mA

V

IN

SW

V

OUT

CH1 50mV

CH3 1V CH4 2V

M 40µs

T 10.80%

A CH3 3.26V

Figure 18. Line Transient, V

OUT

= 1.0 V, PWM, 200 mA

3

V

IN

SW

Data Sheet

4

1

V

OUT

CH1 50mV

CH3 1V CH4 2V

M 40µs

T 10.80%

A CH3 4.4V

Figure 19. Line Transient, V

OUT

= 3.3 V, PWM, 200 mA

SW

4

1

V

OUT

2

I

OUT

CH1 50mV CH2 200mA

CH4 2V

M 40µs

T 19.80%

A CH2 36mA

Figure 20. Load Transient, V

OUT

= 1.8 V, 300 mA to 600 mA

4

SW

1

V

OUT

I

OUT

2

CH1 50mV CH2 250mA

CH4 2V

M 40µs

T 25.4%

A CH2 5mA

Figure 21. Load Transient, V

OUT

= 1.8 V, 50 mA to 300 mA

Rev. G | Page 8 of 20

Data Sheet

SW

4

V

OUT

1

I

OUT

2

CH1 50mV CH2 50mA

CH4 2V

M 40µs

T 25.4%

A CH2 12mA

Figure 22. Load Transient, V

OUT

= 1.8 V, 5 mA to 50 mA

4

SW

I

L

2

1

3

V

OUT

EN

4

CH1 1V

CH3 5V

CH2 250mA

CH4 5V

M 40µs

T 10.80%

A CH3 2V

Figure 23. Start-Up, V

OUT

= 1.8 V, 400 mA

SW

I

L

2

V

OUT

EN

1

3

CH1 1V

CH3 5V

CH2 250mA

CH4 5V

M 40µs

T 10.80%

A CH3 2V

Figure 24. Start-Up, V

OUT

= 1.8 V, 5 mA

ADP2108

SW

4

I

L

2

V

OUT

1

3

EN

4

CH1 500mV

CH3 5V

CH2 500mA

CH4 5V

M 40µs

T 19.80%

A CH3 2.1V

Figure 25. Start-Up, V

OUT

= 1.0 V, 600 mA

SW

2

I

L

1

3

V

OUT

EN

CH1 2V

CH3 5V

CH2 250mA

CH4 5V

M 40µs

T 10.80%

A CH3 2V

Figure 26. Start-Up, V

OUT

= 3.3 V, 150 mA

SW

4

2

1

I

L

V

OUT

CH1 50mV CH2 500mA

CH4 2V

M 2µs

T 20%

A CH4 2.64mA

Figure 27. Typical Power Save Mode Waveform, 50 mA

Rev. G | Page 9 of 20

ADP2108

SW

4

I

L

2

1

V

OUT

CH1 20mV CH2 200mA

CH4 2V

M 200ns

T 20%

A CH4 2.64V

Figure 28. Typical PWM Waveform, 200 mA

Data Sheet

Rev. G | Page 10 of 20

Data Sheet

THEORY OF OPERATION

ADP2108

GM ERROR

AMP

PWM

COMP

VIN

FB

SOFT START

I

LIMIT

PSM

COMP

PWM/

PSM

CONTROL

LOW

CURRENT

SW

OSCILLATOR

UNDERVOLTAGE

LOCKOUT

DRIVER

AND

ANTISHOOT-

THROUGH

GND

ADP2108

THERMAL

SHUTDOWN

The ADP2108 is a step-down dc-to-dc converter that uses a fixed frequency and high speed current mode architecture. The high switching frequency allows for a small step-down, dc-to-dc converter solution.

The ADP2108 operates with an input voltage of 2.3 V to 5.5 V and regulates an output voltage down to 1.0 V.

CONTROL SCHEME

The ADP2108 operates with a fixed frequency, current mode

PWM control architecture at medium to high loads for high efficiency, but shifts to a power save mode control scheme at light loads to lower the regulation power losses. When operating in fixed frequency PWM mode, the duty cycle of the integrated switches is adjusted and regulates the output voltage. When operating in power save mode at light loads, the output voltage is controlled in a hysteretic manner, with higher V

OUT

ripple.

During part of this time, the converter is able to stop switching and enters an idle mode, which improves conversion efficiency.

PWM MODE

In PWM mode, the ADP2108 operates at a fixed frequency of

3 MHz, set by an internal oscillator. At the start of each oscillator cycle, the PFET switch is turned on, sending a positive voltage across the inductor. Current in the inductor increases until the current sense signal crosses the peak inductor current threshold that turns off the PFET switch and turns on the NFET synchronous rectifier. This sends a negative voltage across the inductor, causing the inductor current to decrease. The synchronous rectifier stays on for the rest of the cycle. The ADP2108 regulates the output voltage by adjusting the peak inductor current threshold.

EN

Figure 29. Functional Block Diagram

POWER SAVE MODE

The ADP2108 smoothly transitions to the power save mode of operation when the load current decreases below the power save mode current threshold. When the ADP2108 enters power save mode, an offset is induced in the PWM regulation level, which makes the output voltage rise. When the output voltage reaches a level approximately 1.5% above the PWM regulation level, PWM operation is turned off. At this point, both power switches are off, and the ADP2108 enters an idle mode. C

OUT discharges until V

OUT

falls to the PWM regulation voltage, at which point the device drives the inductor to make V

OUT

rise again to the upper threshold. This process is repeated while the load current is below the power save mode current threshold.

Power Save Mode Current Threshold

The power save mode current threshold is set to 80 mA. The

ADP2108 employs a scheme that enables this current to remain accurately controlled, independent of V

IN

and V

OUT

levels. This scheme also ensures that there is very little hysteresis between the power save mode current threshold for entry to and exit from the power save mode. The power save mode current threshold is optimized for excellent efficiency over all load currents.

ENABLE/SHUTDOWN

The ADP2108 starts operation with soft start when the EN pin is toggled from logic low to logic high. Pulling the EN pin low forces the device into shutdown mode, reducing the shutdown current below 1 μA.

Rev. G | Page 11 of 20

ADP2108

SHORT-CIRCUIT PROTECTION

The ADP2108 includes frequency foldback to prevent output current runaway on a hard short. When the voltage at the feedback pin falls below half the target output voltage, indicating the possibility of a hard short at the output, the switching frequency is reduced to half the internal oscillator frequency.

The reduction in the switching frequency allows more time for the inductor to discharge, preventing a runaway of output current.

UNDERVOLTAGE LOCKOUT

To protect against battery discharge, undervoltage lockout

(UVLO) circuitry is integrated on the ADP2108. If the input voltage drops below the 2.15 V UVLO threshold, the ADP2108 shuts down, and both the power switch and the synchronous rectifier turn off. When the voltage rises above the UVLO threshold, the soft start period is initiated, and the part is enabled.

THERMAL PROTECTION

In the event that the ADP2108 junction temperature rises above

150°C, the thermal shutdown circuit turns off the converter.

Extreme junction temperatures can be the result of high current operation, poor circuit board design, or high ambient temperature.

A 20°C hysteresis is included so that when thermal shutdown occurs, the ADP2108 does not return to operation until the on-chip temperature drops below 130°C. When coming out of thermal shutdown, soft start is initiated.

SOFT START

The ADP2108 has an internal soft start function that ramps the output voltage in a controlled manner upon startup, thereby limiting the inrush current. This prevents possible input voltage drops when a battery or a high impedance power source is connected to the input of the converter.

Data Sheet

After the EN pin is driven high, internal circuits start to power up.

The time required to settle after the EN pin is driven high is called the power-up time. After the internal circuits are powered up, the soft start ramp is initiated and the output capacitor is charged linearly until the output voltage is in regulation. The time required for the output voltage to ramp is called the soft start time.

Start-up time in the ADP2108 is the measure of when the output is in regulation after the EN pin is driven high. Start-up time consists of the power-up time and the soft start time.

CURRENT LIMIT

The ADP2108 has protection circuitry to limit the amount of positive current flowing through the PFET switch and the synchronous rectifier. The positive current limit on the power switch limits the amount of current that can flow from the input to the output. The negative current limit prevents the inductor current from reversing direction and flowing out of the load.

100% DUTY OPERATION

With a drop in V

IN

or with an increase in I

LOAD

, the ADP2108 reaches a limit where, even with the PFET switch on 100% of the time, V

OUT

drops below the desired output voltage. At this limit, the ADP2108 smoothly transitions to a mode where the

PFET switch stays on 100% of the time. When the input conditions change again and the required duty cycle falls, the ADP2108 immediately restarts PWM regulation without allowing overshoot on V

OUT

.

Rev. G | Page 12 of 20

Data Sheet

APPLICATIONS INFORMATION

ADIsimPower DESIGN TOOL

The ADP2108 is supported by ADIsimPower design tool set.

ADIsimPower is a collection of tools that produce complete power designs optimized for a specific design goal. The tools enable the user to generate a full schematic, bill of materials, and calculate performance in minutes. ADIsimPower can optimize designs for cost, area, efficiency, and parts count while taking into consideration the operating conditions and limitations of the IC and all real external components. For more information about ADIsimPower design tools, refer to www.analog.com/ADIsimPower . The tool set is available from this website, and users can also request an unpopulated board through the tool.

EXTERNAL COMPONENT SELECTION

Trade-offs between performance parameters such as efficiency and transient response can be made by varying the choice of external components in the applications circuit, as shown in

Figure 1.

Inductor

The high switching frequency of the ADP2108 allows for the selection of small chip inductors. For best performance, use inductor values between 0.7 μH and 3 μH. Recommended

inductors are shown in Table 6.

The peak-to-peak inductor current ripple is calculated using the following equation:

I

RIPPLE

=

V

OUT

V

×

IN

(

×

V

IN f

SW

V

OUT

×

L

) where: f

SW

is the switching frequency.

L is the inductor value.

The minimum dc current rating of the inductor must be greater than the inductor peak current. The inductor peak current is calculated using the following equation:

I

PEAK

=

I

LOAD ( MAX )

+

I

RIPPLE

2

Inductor conduction losses are caused by the flow of current through the inductor, which has an associated internal DCR.

Larger sized inductors have smaller DCR, which may decrease inductor conduction losses. Inductor core losses are related to the magnetic permeability of the core material. Because the

ADP2108 is a high switching frequency dc-to-dc converter, shielded ferrite core material is recommended for its low core losses and low EMI.

Rev. G | Page 13 of 20

ADP2108

Table 6. Suggested 1.0 μH Inductors

Vendor Model Dimensions I

SAT

(mA) DCR (mΩ)

Murata LQM21PN1R0M 2.0 × 1.25 × 0.5 800 190

Murata LQM31PN1R0M 3.2 × 1.6 × 0.85 1200

Murata LQM2HPN1R0M 2.5 × 2.0 × 1.1 1500

Coilcraft LPS3010-102

Toko MDT2520-CN

TDK CPL2512T

3.0 × 3.0 × 0.9

2.5 × 2.0 × 1.2

2.5 × 1.5 × 1.2

1700

1800

1500

120

90

85

100

100

Output Capacitor

Higher output capacitor values reduce the output voltage ripple and improve load transient response. When choosing this value, it is also important to account for the loss of capacitance due to output voltage dc bias.

Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage.

Capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. X5R or X7R dielectrics with a voltage rating of 6.3 V or 10 V are recommended for best performance. Y5V and Z5U dielectrics are not recommended for use with any dc-to-dc converter because of their poor temperature and dc bias characteristics.

The worst-case capacitance accounting for capacitor variation over temperature, component tolerance, and voltage is calculated using the following equation:

C

EFF

= C

OUT

× (1 − TEMPCO) × (1 − TOL) where:

C

EFF is the effective capacitance at the operating voltage.

TEMPCO is the worst-case capacitor temperature coefficient.

TOL is the worst-case component tolerance.

In this example, the worst-case temperature coefficient (TEMPCO) over −40°C to +125°C is assumed to be 15% for an X5R dielectric.

The tolerance of the capacitor (TOL) is assumed to be 10%, and

C

OUT

is 9.2 μF at 1.8 V, as shown in Figure 30.

Substituting these values in the equation yields

C

EFF

= 9.2 μF × (1 − 0.15) × (1 − 0.1) = 7.0 μF

To guarantee the performance of the ADP2108, it is imperative that the effects of dc bias, temperature, and tolerances on the behavior of the capacitors be evaluated for each application.

ADP2108 Data Sheet

12

10

8

6

4

2

0

0 1 2 3 4

DC BIAS VOLTAGE (V)

5

Figure 30. Typical Capacitor Performance

The peak-to-peak output voltage ripple for the selected output capacitor and inductor values is calculated using the following equation:

V

RIPPLE

=

8

× f

I

RIPPLE

SW

×

C

OUT

(

2

π × f

SW

V

IN

)

2

×

L

×

C

OUT

6

Capacitors with lower equivalent series resistance (ESR) are preferred to guarantee low output voltage ripple, as shown in the following equation:

ESR

COUT

V

RIPPLE

I

RIPPLE

The effective capacitance needed for stability, which includes temperature and dc bias effects, is 7 µF.

THERMAL CONSIDERATIONS

Because of the high efficiency of the ADP2108, only a small amount of power is dissipated inside the ADP2108 package, which reduces thermal constraints.

However, in applications with maximum loads at high ambient temperature, low supply voltage, and high duty cycle, the heat dissipated in the package is great enough that it may cause the junction temperature of the die to exceed the maximum junction temperature of 125°C. If the junction temperature exceeds 150°C, the converter goes into thermal shutdown. It recovers when the junction temperature falls below 130°C.

The junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package due to power dissipation, as shown in the following equation:

T

J

= T

A

+ T

R where:

T

J

is the junction temperature.

T

A

is the ambient temperature.

T

R

is the rise in temperature of the package due to power dissipation.

The rise in temperature of the package is directly proportional to the power dissipation in the package. The proportionality constant for this relationship is the thermal resistance from the junction of the die to the ambient temperature, as shown in the following equation:

T

R

= θ

JA

× P

D

Table 7. Suggested 10 μF Capacitors

Vendor Type Model

Murata X5R

Taiyo Yuden X5R

TDK X5R

GRM188R60J106

JMK107BJ106

C1608JB0J106K

Case

Size

0603

0603

Voltage

Rating (V)

6.3

6.3

0603 6.3 where:

T

R

is the rise in temperature of the package.

θ

JA

is the thermal resistance from the junction of the die to the ambient temperature of the package.

P

D

is the power dissipation in the package.

PCB LAYOUT GUIDELINES

Input Capacitor

Higher value input capacitors help to reduce the input voltage ripple and improve transient response. Maximum input capacitor current is calculated using the following equation:

Poor layout can affect ADP2108 performance, causing electromagnetic interference (EMI) and electromagnetic compatibility

(EMC) problems, ground bounce, and voltage losses. Poor layout can also affect regulation and stability. A good layout is implemented using the following rules:

I

CIN

I

LOAD ( MAX )

V

OUT

( V

IN

V

IN

V

OUT

To minimize supply noise, place the input capacitor as close to the VIN pin of the ADP2108 as possible. As with the output capacitor, a low ESR capacitor is recommended. The list of

recommended capacitors is shown in Table 8.

Table 8. Suggested 4.7 μF Capacitors

)

Vendor Type Model

Murata X5R

Taiyo Yuden X5R

TDK X5R

GRM188R60J475

JMK107BJ475

C1608X5R0J475

Case

Size

0603

0603

0603

Voltage

Rating (V)

6.3

6.3

6.3

Rev. G | Page 14 of 20

Place the inductor, input capacitor, and output capacitor close to the IC using short tracks. These components carry high switching frequencies, and large tracks act as antennas.

Route the output voltage path away from the inductor and

SW node to minimize noise and magnetic interference.

Maximize the size of ground metal on the component side to help with thermal dissipation.

Use a ground plane with several vias connecting to the component side ground to further reduce noise interference on sensitive circuit nodes.

Data Sheet

EVALUATION BOARD

V

IN

TB1

V

IN

EN

TB2

EN

TB5

GND IN

C

IN

4.7µF

ADP2108

A1

VIN

A2

GND

C1

EN

SW

B

FB

C2

U1

1

L1

1µH

2

Figure 31. Evaluation Board Schematic

V

OUT

TB3

V

OUT

C

OUT

10µF

TB4

GND OUT

ADP2108

Figure 32. Recommended WLCSP Top Layer

Figure 34. Recommended TSOT Top Layer

Figure 33. Recommended WLCSP Bottom Layer Figure 35. Recommended TSOT Bottom Layer

Rev. G | Page 15 of 20

ADP2108

OUTLINE DIMENSIONS

1.060

1.020

0.980

2 1

BALL A1

IDENTIFIER

0.657

0.602

0.546

SEATING

PLANE

TOP VIEW

(BALL SIDE DOWN)

SIDE VIEW

0.330

0.310

0.290

A

1.490

1.450

1.410

0.866

REF

B

0.50

BSC

0.50 BSC

0.355

0.330

0.304

COPLANARITY

0.04

BOTTOM VIEW

(BALL SIDE UP)

C

0.280

0.250

0.220

Figure 36. 5-Ball Wafer Level Chip Scale Package [WLCSP]

(CB-5-3)

Dimensions shown in millimeters

2.90 BSC

5 4

1.60 BSC

2.80 BSC

1 2 3

0.95 BSC

*0.90 MAX

0.70 MIN

1.90

BSC

*1.00 MAX

0.20

0.08

0.10 MAX

0.50

0.30

SEATING

PLANE

*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH

THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.

Figure 37. 5-Lead Thin Small Outline Transistor Package [TSOT]

(UJ-5)

Dimensions shown in millimeters

0.60

0.45

0.30

Data Sheet

Rev. G | Page 16 of 20

Data Sheet

ORDERING GUIDE

Model 1

Temperature Range

ADP2108ACBZ-1.0-R7 −40°C to +125°C

ADP2108ACBZ-1.1-R7 −40°C to +125°C

ADP2108ACBZ-1.2-R7 −40°C to +125°C

ADP2108ACBZ-1.3-R7 −40°C to +125°C

ADP2108ACBZ-1.5-R7 −40°C to +125°C

ADP2108ACBZ-1.8-R7 −40°C to +125°C

ADP2108ACBZ-1.82-R7 −40°C to +125°C

ADP2108ACBZ-2.3-R7 −40°C to +125°C

ADP2108ACBZ-2.5-R7 −40°C to +125°C

ADP2108ACBZ-3.0-R7 −40°C to +125°C

ADP2108ACBZ-3.3-R7 −40°C to +125°C

ADP2108AUJZ-1.0-R7 −40°C to +125°C

ADP2108AUJZ-1.1-R7 −40°C to +125°C

ADP2108AUJZ-1.2-R7 −40°C to +125°C

ADP2108AUJZ-1.3-R7 −40°C to +125°C

ADP2108AUJZ-1.5-R7 −40°C to +125°C

ADP2108AUJZ-1.8-R7 −40°C to +125°C

ADP2108AUJZ-1.82-R7 −40°C to +125°C

ADP2108AUJZ-2.3-R7 −40°C to +125°C

ADP2108AUJZ-2.5-R7 −40°C to +125°C

ADP2108AUJZ-3.0-R7 −40°C to +125°C

ADP2108AUJZ-3.3-R7 −40°C to +125°C

ADP2108-1.0-EVALZ

ADP2108-1.1-EVALZ

ADP2108-1.2-EVALZ

ADP2108-1.3-EVALZ

ADP2108-1.5-EVALZ

ADP2108-1.8-EVALZ

ADP2108-1.82-EVALZ

ADP2108-2.3-EVALZ

ADP2108-2.5-EVALZ

ADP2108-3.0-EVALZ

ADP2108-3.3-EVALZ

ADP2108UJZ-REDYKIT

1

Z = RoHS Compliant Part.

Output

Voltage (V) Package Description

3.3

1.0

1.1

1.2

1.3

1.5

1.8

1.3

1.5

1.8

1.82

2.3

2.5

3.0

1.82

2.3

2.5

3.0

3.3

1.82

2.3

2.5

3.0

3.3

1.0

1.1

1.2

1.0

1.1

1.2

1.3

1.5

1.8

5-Ball Wafer Level Chip Scale Package [WLCSP]

5-Ball Wafer Level Chip Scale Package [WLCSP]

5-Ball Wafer Level Chip Scale Package [WLCSP]

5-Ball Wafer Level Chip Scale Package [WLCSP]

5-Ball Wafer Level Chip Scale Package [WLCSP]

5-Ball Wafer Level Chip Scale Package [WLCSP]

5-Ball Wafer Level Chip Scale Package [WLCSP]

5-Ball Wafer Level Chip Scale Package [WLCSP]

5-Ball Wafer Level Chip Scale Package [WLCSP]

5-Ball Wafer Level Chip Scale Package [WLCSP]

5-Ball Wafer Level Chip Scale Package [WLCSP]

5-Lead Small Outline Package [TSOT]

5-Lead Small Outline Package [TSOT]

5-Lead Small Outline Package [TSOT]

5-Lead Small Outline Package [TSOT]

5-Lead Small Outline Package [TSOT]

5-Lead Small Outline Package [TSOT]

5-Lead Small Outline Package [TSOT]

5-Lead Small Outline Package [TSOT]

5-Lead Small Outline Package [TSOT]

5-Lead Small Outline Package [TSOT]

5-Lead Small Outline Package [TSOT]

Evaluation Board for 1.0 V [WLCSP]

Evaluation Board for 1.1 V [WLCSP]

Evaluation Board for 1.2 V [WLCSP]

Evaluation Board for 1.3 V [WLCSP]

Evaluation Board for 1.5 V [WLCSP]

Evaluation Board for 1.8 V [WLCSP]

Evaluation Board for 1.82 V [WLCSP]

Evaluation Board for 2.3 V [WLCSP]

Evaluation Board for 2.5 V [WLCSP]

Evaluation Board for 3.0 V [WLCSP]

Evaluation Board for 3.3 V [WLCSP]

Evaluation Board for Fixed Output Voltage,

1.2 V and 3.3 V [TSOT]

ADP2108

Branding

LAH

LA9

LAA

LAD

LAE

LAF

LAG

LD9

LAE

LAF

LAG

LD9

LAH

LA6

LA7

LA8

LA6

LA7

LA8

LA9

LAA

LAD

Package

Option

UJ-5

UJ-5

UJ-5

UJ-5

UJ-5

UJ-5

UJ-5

UJ-5

CB-5-3

CB-5-3

CB-5-3

CB-5-3

CB-5-3

CB-5-3

CB-5-3

CB-5-3

CB-5-3

CB-5-3

CB-5-3

UJ-5

UJ-5

UJ-5

Rev. G | Page 17 of 20

ADP2108

NOTES

Data Sheet

Rev. G | Page 18 of 20

Data Sheet

NOTES

ADP2108

Rev. G | Page 19 of 20

ADP2108

NOTES

Data Sheet

©2008–2012 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.

D07375-0-6/12(G)

Rev. G | Page 20 of 20

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