W3630A Series DDR3 BGA Probes for Logic Analyzers and

W3630A Series DDR3 BGA Probes
for Logic Analyzers
and Oscilloscopes
Data Sheet
The W3630A series DDR3 BGA probes enable probing of
embedded memory DIMMs directly at the ball grid array with
Agilent logic analyzers and oscilloscopes.
The Agilent W3630A series DDR3 BGA probes for logic analyzers
and oscilloscopes enable viewing of data traffic on industry
standard DDR3 DRAMs with the Agilent 16900 Series and U4154A
logic analysis systems and Infiniium 9000 and 90000 Series
oscilloscopes.
The DDR3 BGA Probe Advantage
Features
Benefits
Connects directly to the DDR3 BGA balls.
Eliminates reflections from mid-bus probing methods. Also
eliminates board space and trace routing required for connector
probing methods.
Supports:
• Single die x4, x8 and x16 configuration
Get complete signal access to the DDR3 signals critical to your
debug and validation effort.
• Stacked/dual-die x4, x8 and x16 configuration
• Stacked/quad-die x4, x8 and x16 configuration
• Operating transfer rate of 1333 Mb/s
• Using U4154A with APS (Advanced Probe Settings*)
enabled, transfer rates up to 2400 Mb/s
Operate at full speed making measurements with an Agilent
U4154A logic analyzer.
• Using 16962A with APS enabled, transfer rates up to
1600Mb/s
• 4 GHz bandwidth (typical)
Works with existing designs.
Eliminates need for re-design or up front planning.
Supports either leaded or lead-free solder.
Easily works with all solder finishes. Designed to tolerate leadfree soldering temperature profiles.
Contract manufactures available for those without
the in-house expertise or facilities for soldering BGAs.
Eliminates the need to develop BGA soldering expertise.
Flexible “wings” with ZIF connectors.
Ensures reliable connection to the ZIF probes. Enables
placement of the probe cables around adjacent components.
Minimizes the torque to the balls of the BGA.
Attach to E5845A and E5847A single-ended ZIF probes for
connection to the logic analyzer.
Optimizes the use of logic analyzer channels by allowing
assignment of channels to 4, 8 or 16 bits on each DRAM.
Probe points available for soldering ZIF tip accessories to the
scope probe adapter board that connects to the BGA probe.
Enables oscilloscope probing of the DRAM signals with an
Agilent Infiniium 90000-Series oscilloscope, giving you a DDR3
test solution covering the clock characterization, electrical and
timing parameters of the JEDEC specification.
* To enable Advanced Probe Settings refer to Tech brief # 5991-0799EN. Maximum transfer rates are subject to variables in the signal
integrity of the system under test.
DDR3 BGA Probe Connection to an Agilent Logic Analyzer
The W3631A DDR3 BGA probe
connects to E5845A to provide
connection to the logic analyzer for
the x16 probe system. The W3633A
DDR3 BGA probe connects to E5847A
to provide connection to the logic
analyzer for the x4/x8 probe system.
Figure 1. E5847A 46-ch single-ended ZIF probe for x8 DRAM BGA probe connects to
90-pin logic analyzer cables
2
E5845/7A ZIF Probe
Logic analyzer cable
Flex wing
DRAM
W3630A Series BGA probe
PC Board
Figure 2. Probe connection to the logic analyzer
DDR EyeFinder and EyeScan Software
The DDR EyeFinder and EyeScan
software is a great tool to help you
position the sampling points for accurate read and write data capture. The
software triggers on valid read and
write commands with your system
executing any memory test suite or
stimulus program. The software will
then display read and write data valid
window as a result of the scan.
Figure 3. DDR3 EyeFinder and Eyescan software shows read and write data valid
windows for accurate sampling position of data for protocol decode
3
Protocol Analysis
The W3630A series BGA probe
along with the B4621B memory bus
decoder provides complete protocol
decode of memory transactions
using an Agilent logic analyzer as
the analysis execution engine. This
combination provides memory bus
triggering, debug and compliance
verification measurements. Data is
decoded and displayed at any level of
detail from the protocol to binary.The
B4621B protocol-decode software
translates acquired signals into easily
understood bus transactions, at the
full bus speed. The Agilent logic
analyzer provides extensive triggering and store qualification features.
The DDR protocol-decode software
executes in the logic analyzer and
takes user input on system attributes
such as Burst length, CAS and
Additive Latency, as well as Chip
Selects to decode the key DDR bus
signals and present a display that
lists the transaction type, address,
data and command conditions. The
software also supports user-defined
symbols that can be easily added to
the state listing display.
Figure 4. Reliable protocol decode with B4621B DDR3 bus decoder
4
DDR3 BGA Probe Connection to an Oscilloscope
The DDR3 BGA probe is used with
W3635B scope probe adapter and
the E2678A socketed probe head
to connect to the oscilloscope. The
socketed probe head makes a 4 GHz
bandwidth (typical) connection with
the pin headers on the W3635B
scope probe adapter with N5465A
InfiniiSim Waveform Transformation
toolset.
Figure 5. W3635B scope probe adapter
Figure 6. Probe connection to the oscilloscope with E2678A socketed probe head and
probe connection to the MSO oscilloscope with E5383A single-ended flying lead set
5
Probe Pin-Out to Logic Analyzer and Scope
Table 1. W3631A x16 DDR3 BGA probe pin out
The following signals are omitted
from the logic analyzer connection
for the x16 probe system:
Address signal group
A15
Control signal group
BA2
CS2#, CS3#
VREFCA, VREFDQ
ZQ3, ZQ2, ZQ1, ZQ0
Data signal group
DMU
DQSL, DQSL#
Six signals are available for
probing on the flex portion of the x16
rigid/flex solder-down probe:
CS2#, CS3#
VREFCA, VREFDQ
VDD, VDDQ
Left wing
Pin
All odd pins
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
Signal name
GND
DQU7
DQU5
DQU1
DQU3
DQL0
DQL2
DQL6
DQL4
ODT1
RAS#
ODT0
CAS#
CS0#
CS1#
WE#
BA0
A3
A0
A5
A2
A7
A9
RESET#
A13
GND
Right wing
Group
–
Data
Data
Data
Data
Data
Data
Data
Data
Control
Control
Control
Control
Control
Control
Control
Control
Address
Address
Address
Address
Address
Address
Control
Address
­–
Pin
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
All odd pins
Signal name
Group
GND
DQU4
DQU6
DQSU#
DQSU
DQU2
DQU0
DML
DQL1
DQL3
DQL7
DQL5
CK
CK#
CKE1
CKE0
A10/AP
A12/BC#
BA1
A4
A1
A6
A11
A8
A14
GND
–
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Control
Control
Control
Control
Address
Address
Control
Address
Address
Address
Address
Address
Address
–
Table 2. W3633A x4/x8 DDR3 BGA probe pin out
The following signals are omitted
from the Logic Analyzer connection
for the x4/x8 probe system:
Address signal group
None
Control signal group
CS2#, CS3#
VREFCA, VREFDQ
ZQ3, ZQ2, ZQ1, ZQ0
Data signal group
None
Left wing
Wing pin
Signal name
All odd pins
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
GND
DQ0
DQ2
DQS
DQS#
DQ6
DQ4
–
RAS#
ODT1
CAS#
ODT0
WE#
CS0#
CS1#
BA2
BA0
A0
A3
A5
A2
A7
A9
RESET#
A13
GND
6
Right wing
Group
–
Data
Data
Data
Data
Data
Data
–
Control
Control
Control
Control
Control
Control
Control
Control
Control
Address
Address
Address
Address
Address
Address
Control
Address
­–
Wing pin
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
All odd pins
Signal name
Group
GND
–
–
–
–
–
DM
DQ1
DQ3
DQ7
DQ5
CK
CK#
CKE1
CKE0
A10/AP
A15
A12/BC#
BA1
A4
A1
A6
A11
A8
A14
GND
–
–
-–
–
–
–
Data
Data
Data
Data
Data
Control
Control
Control
Control
Address
Address
Address
Control
Address
Address
Address
Address
Address
Address
–
Probe Pin-Out to Logic Analyzer and Scope (Continued)
Table 3. W3631A with W3635B pin out
Left wing (W3631A)
DQU7 DQU5 DQU1 DQU3 ODT1 RAS# ODT0 WE#
A3
A0 RESET# A13
DQL0 DQL2 DQL6 DQL4 CAS# CS0# CS1# BA0
A5
A2
A7
A9
All ODD numbered pins are GND
A14
A8
A11
A6
A10
A1
A4
BA1
A12
CK#
CKE0 CKE1 DQL7 DQL1 DML DQU6
CK
DQU4
DQL5 DQL3 DQU0 DQU2 DQSU DQSU#
Right wing (W3631A)
Table 4. W3633A with W3635B pin out
Left wing (W3633A)
DQ0
DQ2
DQS DQS# ODT1 CAS# ODT0 BA2
A0
A3 RESET# A13
DQ6
DQ4
NC
A5
A2
A7
A9
RAS# WE# CS0# CS1# BA0
All ODD numbered pins are GND
A14
A8
A11
A6
A15
A10
CKE0
DQ5
DQ3 DQ1
NC
NC
A1
A4
BA1
A12
CKE1
CK#
CK
DQ7
DM
NC
NC
Right wing (W3633A)
7
NC
Logic Analyzer Configuration Guide and Ordering Information
DRAM
type
x4/x8
x16
Data
width
Access
to
Command,
Address,
Control
and Data
x4/x8
Command,
Address,
Control
and Data
x16
Probes
W3633A
W3631A
Cables
Logic
analyzer
modules
Order
summary
E5847A
16962A
x2
16962A 2
E5847A 1
W3633A 1
E5847A
U4201A (4)
U4154A
U4154A
U4201A 4
E5487A 1
W3633A 1
E5845A
16962A 2
16962A 2
E5845A 1
W3631A 1
E5845A
U4201A (4)
U4154A
U4154
U4201A 4
E5845A 1
W3631A 1
U4154A requires M9502A or M9505A AXIe chassis.
16962A requires 16900 series chassis.
Product
Description
DDR3 BGA probes
W3631A
DDR3 x16 BGA command and data probe for logic analyzer and
oscilloscope
W3633A
DDR3 x4/x8 BGA command and data probe for logic analyzer
and oscilloscope
AXIe modular logic analyzers
U4154A
136-channel, 4 Gb/s state, 5 GHz timing, memory depth up to
200 M, AXIe-based logic analyzer module
U4201A (4)
Logic analyzer probe cable
16900 Series logic analyzers
16902B
6-slot mainframe with 15-inch display with touch screen
16900 Series logic analyzer modules 1
16962A
68-ch, 2 GHz timing, 2 GT/s State, 4 M deep logic analysis
module
Logic analyzer ZIF probes 2
E5845A
46-ch single-ended ZIF probe for x16 DRAM BGA probe
connect to 90-pin logic analyzer cable
E5847A
46-ch single-ended ZIF probe for x8 DRAM BGA probe connect
to 90-pin logic analyzer cable
Software
B4621B
DDR2/3 bus decoder
B4622B
DDR2/3 protocol compliance and analysis tool
DDR Setup Assistant
and DDR Eyefinder 3
Recommended
1. 16962A uses a separate DDR3 EyeFinder/EyeScan SW tool. U4154A EyeFinder/
EyeScan SW is part of U4154A SW package.
2. Used to connect W3630As Series DDR3 BGA probes to 90 pin logic analyzer cables.
3. DDR Setup Assistant and Eyefinder software is available free of charge. DDR Setup
Assistant provides a series of steps to simplify state mode measurement tuning with
U4154A or 16962A logic analyzer modules. The DDR Setup Assistant and Eyefinder
software also provides a DDR Eyefinder tool specifically for the 16962A module.
8
Oscilloscope Ordering Information
Product
Description
W3635B
Scope board probe adapter for use with W3630A Series DDR3
BGA probe – Kit of 2
Oscilloscope
90604A
6 GHz 4 channels 20 GSa/s Infiniium oscilloscope
90804A
8 GHz 4 channels 40 GSa/s Infiniium oscilloscope
91204A
12 GHz 4 channels 40 GSa/s Infiniium oscilloscope
91304A
13 GHz 4 channels 40GSa/s Infiniium oscilloscope
X91604A
16 GHz 4 channel 80 GSa/s Infiniium oscilloscope
X92004A
20 GHz 4 channel 80 GSa/s Infiniium oscilloscope
X92504A
25 GHz 4 channel 80 GSa/s Infiniium oscilloscope
X92804A
28 GHz 4 channel 80 GSa/s Infiniium oscilloscope
X93204A
32 GHz 4 channel 80 GSa/s Infiniium oscilloscope
Oscilloscope software packages
U7231A
DDR3 Compliance Test Application
N5414B
InfiniiScan Event Identification Software
N5465A
InfiniiSim Waveform Transformation Toolset
Oscilloscope probe amplifier
1169A
12 GHz InfiniiMax differential probe amplifier
1168A
10 GHz InfiniiMax differential probe amplifier
1134A
7 GHz InfiniiMax differential probe amplifier
Oscilloscope probe heads
E2678A
InfiniiMax single-ended/differential socketed probe head and
accessories
Related Literature
Publication title
Pub number
Agilent Technologies 16900 Series Logic Analysis Systems
- Brochure
5989-0420EN
U4154A AXIe-based Logic Analyzer Module - Data Sheet
5990-7513EN
Agilent W3630A Series DDR3 DRAM BGA Probe User’s Guide
Manual
W3631-97000
B4622B DDR2/3/4 and LPDDR/2/3 Protocol Compliance and
Analysis Toolset - Data Sheet
5991-1063EN
U7231A DDR3 Compliance Test Application for Infiniium Series
Oscilloscopes - Data Sheet
5989-7243EN
A Time-Saving Method for Analyzing Signal Integrity in DDR
Memory Buses - Application Note
5989-6664EN
Infiniium 90000-X Series Oscilloscopes - Data Sheet
5990-5271EN
B4621B for DDR2, DDR3, or DDR4 Debug and Validation - Data
Sheet
5991-0802EN
Advanced Probe Settings Mode - Technical Brief
5991-0799EN
9
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Revised: October 11, 2012
Product specifications and descriptions
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© Agilent Technologies, Inc. 2012
Published in USA, December 4, 2012
5990-3179EN