Stratix GX

Stratix GX
5. Configuration & Testing
Embedded Logic
Stratix® GX devices feature the SignalTap® embedded logic analyzer,
which monitors design operation over a period of time through the
IEEE Std. 1149.1 (JTAG) circuitry. You can analyze internal logic at speed
without bringing internal signals to the I/O pins. This feature is
particularly important for advanced packages, such as FineLine BGA®
packages, because it can be difficult to add a connection to a pin during
the debugging process after a board is designed and manufactured.
The logic, circuitry, and interconnects in the Stratix GX architecture are
configured with CMOS SRAM elements. Stratix GX devices are
reconfigurable and are 100% tested prior to shipment. As a result, you do
not have to generate test vectors for fault coverage purposes, and can
instead focus on simulation and design verification. In addition, you do
not need to manage inventories of different ASIC designs. Stratix GX
devices can be configured on the board for the specific functionality
Stratix GX devices are configured at system power-up with data stored in
an Altera serial configuration device or provided by a system controller.
Altera offers in-system programmability (ISP)-capable configuration
devices that configure Stratix GX devices via a serial data stream.
Stratix GX devices can be configured in under 100 ms using 8-bit parallel
data at 100 MHz. The Stratix GX device’s optimized interface allows
microprocessors to configure it serially or in parallel, and synchronously
or asynchronously. The interface also enables microprocessors to treat
Stratix GX devices as memory and configure them by writing to a virtual
memory location, making reconfiguration easy. After a Stratix GX device
has been configured, it can be reconfigured in-circuit by resetting the
device and loading new data. Real-time changes can be made during
system operation, enabling innovative reconfigurable computing
Operating Modes
The Stratix GX architecture uses SRAM configuration elements that
require configuration data to be loaded each time the circuit powers up.
The process of physically loading the SRAM data into the device is called
configuration. During initialization, which occurs immediately after
configuration, the device resets registers, enables I/O pins, and begins to
operate as a logic device. The I/O pins are tri-stated during power up,
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and before and during configuration. Together, the configuration and
initialization processes are called command mode. Normal device
operation is called user mode.
A built-in weak pull-up resistor pulls all user I/O pins to VCCIO before
and during device configuration.
SRAM configuration elements allow Stratix GX devices to be
reconfigured in-circuit by loading new configuration data into the device.
With real-time reconfiguration, the device is forced into command mode
with a device pin. The configuration process loads different configuration
data, reinitializes the device, and resumes user-mode operation. You can
perform in-field upgrades by distributing new configuration files either
within the system or remotely.
Configuration Schemes
You can load the configuration data for a Stratix GX device with one of
five configuration schemes (see Table 5–1), chosen on the basis of the
target application. You can use a configuration device, intelligent
controller, or the JTAG port to configure a Stratix GX device. A
configuration device can automatically configure a Stratix GX device at
system power-up.
You can configure multiple Stratix GX devices in any of five
configuration schemes by connecting the configuration enable (nCE) and
configuration enable output (nCEO) pins on each device.
Table 5–1. Data Sources for Configuration
Configuration Scheme
Data Source
Configuration device
Enhanced or EPC2 configuration device
Passive serial (PS)
ByteBlasterMV™ or MasterBlaster™ download
cable or serial data source
Passive parallel
asynchronous (PPA)
Parallel data source
Fast passive parallel
Parallel data source
MasterBlaster or ByteBlasterMV download cable
or a microprocessor with a Jam or JBC file (.jam
or .jbc)
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Configuration & Testing
Partial Reconfiguration
The enhanced PLLs within the Stratix GX device family support partial
reconfiguration of their multiply, divide, and time delay settings without
reconfiguring the entire device. You can use either serial data from the
logic array or regular I/O pins to program the PLL’s counter settings in a
serial chain. This option provides considerable flexibility for frequency
synthesis, allowing real-time variation of the PLL frequency and delay.
The rest of the device is functional while reconfiguring the PLL. See the
Stratix GX Architecture chapter of the Stratix GX Device Handbook,
Volume 1 for more information on Stratix GX PLLs.
Remote Update Configuration Modes
Stratix GX devices also support remote configuration using an Altera
enhanced configuration device (for example, EPC16, EPC8, and EPC4
devices) with page mode selection. Factory configuration data is stored in
the default page of the configuration device. This is the default
configuration which contains the design required to control remote
updates and handle or recover from errors. You write the factory
configuration once into the flash memory or configuration device.
Remote update data can update any of the remaining pages of the
configuration device. If there is an error or corruption in a remote update
configuration, the configuration device reverts back to the factory
configuration information.
There are two remote configuration modes: remote and local
configuration. You can use the remote update configuration mode for all
three configuration modes: serial, parallel synchronous, and parallel
asynchronous. Configuration devices (for example, EPC16 devices) only
support serial and parallel synchronous modes. Asynchronous parallel
mode allows remote updates when an intelligent host is used to configure
the Stratix GX device. This host must support page mode settings similar
to an EPC16 device.
Remote Update Mode
When the Stratix GX device is first powered-up in remote update
programming mode, it loads the configuration located at page
address 000. The factory configuration should always be located at page
address 000, and should never be remotely updated. The factory
configuration contains the required logic to perform the following
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Determine the page address/load location for the next application’s
configuration data
Recover from a previous configuration error
Stratix GX Device Handbook, Volume 1
Receive new configuration data and write it into the configuration
The factory configuration is the default and takes control if an error
occurs while loading the application configuration.
While in the factory configuration, the factory-configuration logic
performs the following operations:
Loads a remote update-control register to determine the page
address of the new application configuration
Determines whether to enable a user watchdog timer for the
application configuration
Determines what the watchdog timer setting should be if it is
The user watchdog timer is a counter that must be continually reset
within a specific amount of time in the user mode of an application
configuration to ensure that valid configuration occurred during a
remote update. Only valid application configurations designed for
remote update can reset the user watchdog timer in user mode. If a valid
application configuration does not reset the user watchdog timer in a
specific amount of time, the timer updates a status register and loads the
factory configuration. The user watchdog timer is automatically disabled
for factory configurations.
If an error occurs in loading the application configuration, the
configuration logic writes a status register to specify the cause of the
reconfiguration. Once this occurs, the Stratix GX device automatically
loads the factory configuration, which reads the status register and
determines the reason for reconfiguration. Based on the reason, the
factory configuration takes appropriate steps and writes the remote
update control register to specify the next application configuration page
to be loaded.
When the Stratix GX device successfully loads the application
configuration, it enters into user mode. The Stratix GX device then
executes the main application of the user. Intellectual property (IP), such
as a Nios® embedded processor, can help the Stratix GX device determine
when remote update is coming. The Nios embedded processor or user
logic receives incoming data, writes it to the configuration device, and
loads the factory configuration. The factory configuration reads the
remote update status register and determine the valid application
configuration to load. Figure 5–1 shows the Stratix GX remote update.
Figure 5–2 shows the transition diagram for remote update mode.
Stratix GX Device Handbook, Volume 1
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February 2005
Configuration & Testing
Figure 5–1. Stratix GX Device Remote Update
New Remote
Configuration Data
Application Configuration
Page 7
Application Configuration
Stratix GX Device
Factory Configuration
Page 6
Page 0
Configuration Device Updates
Stratix GX Device with Factory
Configuration (to Handle Update)
or New Application Configuration
Note to Figure 5–1:
When the Stratix GX device is configured with the factory configuration, it can handle update data from EPC16,
EPC8, or EPC4 configuration device pages and point to the next page in the configuration device.
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February 2005
Stratix GX Device Handbook, Volume 1
Figure 5–2. Remote Update Transition Diagram
Notes (1), (2)
Application 1
Reload an
Reload an
Application n
Notes to Figure 5–2:
Remote update of application configuration is controlled by a Nios embedded processor or user logic programmed
in the factory or application configurations.
Up to seven pages can be specified allowing up to seven different configuration applications.
Stratix GX Device Handbook, Volume 1
Altera Corporation
February 2005
Configuration & Testing
Local Update Mode
Local update mode is a simplified version of the remote update. This
feature is intended for simple systems that need to load a single
application configuration immediately upon power-up without loading
the factory configuration first. Local update designs have only one
application configuration to load, so it does not require a factory
configuration to determine which application configuration to use.
Figure 5–3 shows the transition diagram for local update mode.
Figure 5–3. Local Update Transition Diagram
Stratix GX
Single Event
Upset (SEU)
Stratix GX devices offer on-chip circuitry for automated checking of
single event upset (SEU) detection. Some applications that require the
device to operate error free at high elevations or in close proximity to
earth’s North or South Pole require periodic checks to ensure continued
data integrity. The error detection cyclic redundancy code (CRC) feature
controlled by the Device & Pin Options dialog box in the Quartus II
software uses a 32-bit CRC circuit to ensure data reliability and is one of
the best options for mitigating SEU.
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Stratix GX Device Handbook, Volume 1
Temperature-Sensing Diode
You can implement the error detection CRC feature with existing
circuitry in Stratix GX devices, eliminating the need for external logic. For
Stratix GX devices, the CRC is computed by Quartus II and downloaded
into the device as a part of the configuration bit stream. The CRC_ERROR
pin reports a soft error when configuration SRAM data is corrupted,
triggering device reconfiguration.
Custom-Built Circuitry
Dedicated circuitry is built into Stratix GX devices to perform error
detection automatically. This error detection circuitry constantly checks
for errors in the configuration SRAM cells while the device is in user
mode. You can monitor one external pin for the error and use it to trigger
a reconfiguration cycle. You can select the desired time between checks
by adjusting a built-in clock divider.
Software Interface
In the Quartus II software version 4.1 and later, you can turn on the
automated error detection CRC feature in the Device & Pin Options
dialog box. This dialog box allows you to enable the feature and set the
internal frequency of the CRC between 400 kHz to 100 MHz. This
controls the rate that the CRC circuitry verifies the internal configuration
SRAM bits in the FPGA device.
For more information on CRC, refer to AN 357: Error Detection Using CRC
in Altera FPGA Devices.
TemperatureSensing Diode
Stratix GX devices include a diode-connected transistor for use as a
temperature sensor in power management. This diode is used with an
external digital thermometer device such as a MAX1617A or MAX1619
from MAXIM Integrated Products. These devices steer bias current
through the Stratix GX diode, measuring forward voltage and converting
this reading to temperature in the form of an 8-bit signed number (7 bits
plus sign). The external device’s output represents the package
temperature of the Stratix GX device and can be used for intelligent
power management.
The diode requires two pins (tempdiodep and tempdioden) on the
Stratix GX device to connect to the external temperature-sensing device,
as shown in Figure 5–4. The temperature-sensing diode is a passive
element and therefore can be used before the Stratix GX device is
Stratix GX Device Handbook, Volume 1
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February 2005
Configuration & Testing
Figure 5–4. External Temperature-Sensing Diode
Stratix GX Device
Table 5–2 shows the specifications for bias voltage and current of the
Stratix GX temperature-sensing diode.
Table 5–2. Temperature-Sensing Diode Electrical Characteristics
IB I A S high
IB I A S low
Series resistance
The temperature-sensing diode works for the entire operating range
shown in Figure 5–5.
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Stratix GX Device Handbook, Volume 1
Temperature-Sensing Diode
Figure 5–5. Temperature Versus Temperature-Sensing Diode Voltage
100 µA Bias Current
10 µA Bias Current
(Across Diode)
Temperature ( C)
Stratix GX Device Handbook, Volume 1
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February 2005
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