Testing High Power Semiconductor Devices from Inception to Market

Testing High Power Semiconductor Devices from Inception to Market
Testing High Power Semiconductor Devices from Inception to Market
Methods for Efficient, Flexible Test and Characterization throughout the Life Cycle of a Power Semi Device
A Tektronix Company
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Methods for Efficient, Flexible Test and Characterization throughout
the Entire Life Cycle of a Power Semi Device
Device and
Process Design
3
• For detailed on-state, off-state, or capacitance-voltage characterization, a full
parametric curve tracer (PCT) allows both easy data acquisition and detailed
parameter extraction.
• The flexible instrumentation used for curve tracing can also be configured in a
racked system for simple functional test, process monitoring, or other higher volume
characterization.
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POWER SEMI DEVICE
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• When more meticulous cur ve tracing is required, a SMU instrument with
semiconductor I-V characterization software may be the solution.
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Te s t i n g H i g h P o w e r S e m i c o n d u c to r D e v i c e s f r o m I n c e p t i o n to M a r k e t
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duct
Test ion
instrument with Android-based curve tracer app is sufficient.
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Ch
ar
Pr o
• For basic curve tracing measurements, perhaps a single source measure unit (SMU)
E n d Use
D e sig ns
This e-guide examines the life cycle of a power semiconductor device and the
tremendous variety of test and characterization activities and measurement challenges
faced by the engineers involved in each stage throughout the cycle. From the early
stages of designing a new power device to the point where it’s ready for market.
Keithley’s flexible set of high power characterization tools are ideal for testing across the
entire life cycle of a power device.
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De pli
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Introduction
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Evaluating Existing Devices and Designs for New Application Requirements
Applications engineers work with customers who are constantly stressing,
testing, or stretching a design to maximize efficiency. These customers need
detail beyond what is noted in the device specification. Requirements are
continually changing, so what needs to be measured can vary on a daily
basis. How can measurements be made quickly and easily without time
being wasted to relearn software or instrumentation?
Keithley offers a wide range of test capabilities, including pulse, DC, and
C-V. Our ACS Basic Software uses device-specific – not instrument-specific
– vocabulary to simplify measurements. It also simplifies the interaction
The IVy Android App works with Series 2600B
between multiple source measurement unit (SMU) instruments, so users
SourceMeter® SMU Instruments to perform I-V
can focus on the device rather than the instrumentation. The IVy Android
characterization. Pinch and zoom for deeper
App works with Series 2600B SourceMeter® SMU Instruments to perform
insight into device performance.
I-V characterization, including two- and three-terminal device testing and
trend monitoring, and enables interactive analysis and insight into your device without programming! Or, use the
Model 2450 Interactive SourceMeter SMU Instruments with KickStart I-V Characterization Software to perform current
versus voltage (I-V) testing on a variety of materials, two terminal and multi-terminal semiconductor devices, solar cells,
embedded systems, and much more.
7
Keys to Detecting Potential DUT Issues
Minimize Troubleshooting Time and Boost Productivity
Source Measurement Unit Instruments
Simplify Characterizing a Linear Voltage
Regulator’s DC Performance
1
I-V Characterization with Real-time Control
I-V characterization is performed on a variety of electronic products. Typical I-V characterization
requires writing programs or configuring test software to source voltage/current in a certain range,
then the measured current/voltage will be displayed after you run the testing program. But, realtime control eliminates this delayed visualization that may cause you to miss some critical device
behavior, providing further insight into your DUT.
Read the Article
A
GR EATER
M EASU R E
OF
CON F I DENCE
Source Measurement Unit
(SMU) Instruments Simplify
Characterizing a Linear
Voltage Regulator’s
DC Performance
Jennifer Cheney and Qing D. Starks
Applications Engineering Department
Keithley Instruments, Inc.
Linear voltage regulators (LVRs) are essential elements of power management systems.
They provide the constant voltage rails
required by any electronic circuit designed
to operate at specific DC levels. A properly
designed voltage regulator will maintain
the specified output voltage continuously,
regardless of changes in the input voltage or
load current.
The two main types of LVRs, conventional and low dropout (LDO), function on
the same principle, but an LDO LVR requires
a lower input voltage in excess of the output
voltage to operate than a conventional type
does, thereby reducing the amount of power
needed to operate it. As a result, low dropout regulators are better suited for batterypowered electronics and portable handheld
communication devices.
This article discusses how to characterize
some common DC electrical characteristics of LVRs, including line regulation, load
regulation, dropout voltage and quiescent
current. These parameters are applicable
to qualifying both conventional and LDO
LVRs for specific applications.
Testing an LVR requires a variable power
source for the input side and a variable load
for the output side. Source Measurement
Unit (SMU) instruments are excellent candidates for these applications because voltage
and current measurements must be made
on both sides of the regulator. One SMU
instrument can act as a power source on the
input side; a second SMU instrument on
the output side can act as a load. A growing
number of test equipment vendors have
begun offering system-level SMU instruments that house multiple SMU instrument
channels in a single enclosure. For applications like these, a dual-channel SMU instrument like Keithley’s Model 2602A System
SourceMeter® instrument (Figure 1), could
serve as an economical substitute for two
separate SMU instruments.
2
Monitor I-V Trends over Time
It’s especially important to monitor device behavior
over time to identify DUT problems that occur with
changes in ambient conditions, such as temperature,
lighting, self-heating, etc. Keithley IVy provides a time
mode to monitor your devices.
3
Understand Measurement Results from Different Perspectives
You know your measurement hits a spike at a random point, but do you know how to determine the
reason behind it? Measurement data makes more sense when you look at it from different perspectives.
Configuring an LVR
Characterization System
As illustrated in Figure 2, SMU_1 is connected to the input side of the regulator and
is configured to source voltage and measure current (SVMI). The voltage sourced is
the desired input voltage(s) applied to the
regulator. The compliance, or the current
limit, is set to a value higher than the maximum output current of the voltage regulator
in order to account for the LVR’s current
consumption.
SMU_2 is connected to the output side
of the regulator. It also sources voltage and
measures current (SVMI). However, the voltage is configured as a fixed value that’s lower
than the expected output voltage of the regulator. SMU_2 automatically switches to sinking, or drawing, current from the regulator,
thereby acting as a load. The compliance current, or the current limit, is set to the desired
load current. Given that an SMU instrument operates on the principles of range, it
is important to ensure that SMU_2’s voltage
range encompasses the expected output voltage of the regulator to ensure the regulator
output voltage is measured correctly.
LVRs may require external capacitors
to ensure stable operation of the voltage
5
Share Measurement Results for Collaborative Work
If you’re having trouble understanding the device’s behavior, share a screenshot and the actual data
with your colleagues to ensure collaborative work.
4
7 Keys to Detecting Potential
DUT Issues: Minimize Troubleshooting
Time and Boost Productivity
Zoom into Your Measurement
to See the Details
Is the following diode characterization normal? Zoom
in to look at it more carefully before you say yes.
7
6
Stimulus-Response Behavior over Time
Compare Your Device
to a “Golden Device”
Have you tested your component’s stimulus-response behavior? The test results may surprise you!
Typically, you need to program the stimulus activities into your test program and then observe the
responses. If you see some unexpected behavior after the measurement is generated, go back to
the test program and try to match each stimulus with the device behavior. Ideally, you can change
source value in real time to see the DUT response instantly. While you are collecting data in time
mode, you can remain in control of your source by changing the source slider.
A “golden device” is a “known-good” device that is
often used when testing components. Compare test
results of an unknown device against a standardized,
known-good device to determine if it is operating
correctly. Plot multiple curves on one screen, which
makes comparison easier.
The Keithley IVy AndroidTM App lets you perform these tests on your DUT with a couple of touches and just seconds of your time.
Get the Keithley
IVy Android App Now!
Figure 1. Series 2600A Dual-Channel System SourceMeter instruments.
Source Measurement Unit (SMU) Instruments Simplify Characterizing a Linear Voltage Regulator’s DC Performance
3
Download the Poster
Perform these seven easy tests on your battery, diode, LED, FET, or other DUT
to identify potential issues early, avoid extensive troubleshooting, and have
confidence that the DUT is safe to use in your circuit.
October 2011
Use IVy with any Keithley Series
2600B SourceMeter® SMU Instrument.
Visit www.keithley.com/2600B to learn more.
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Designing New Devices to Meet Evolving Needs
To effectively on design devices to meet their customer’s latest requirements, power device design
engineers and process engineers must understand how to tweak the process to produce the desired
device performance. There must be confidence that the device models are fairly accurate, and changing
a particular process step must produce the necessary change in the device measurement parameter.
Therefore, the device engineer must perform preliminary verification of key device parameters.
With its trace mode, ACS Basic Edition Software allows quick verification of key device paremeters,
including family of curves, bias voltage, etc. In addition to being intuitive, it’s designed from the
device perspective and includes scores of device libraries and a built-in formulator to quickly relate
measurement to device parameters. Parametric Curve Tracer (PCT) Configurations and the Model 8020
Probe Station Interface simplify a wide range of tests that must be performed on-wafer for DC, CV, and
pulsed test.
Trace Mode supports interactive testing of a device.
Testing Modern Power
Semiconductor Devices Requires
a Modern Curve Tracer
Watch the On-line Demo
Watch the Webinar
4
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PCT Configuration in Trace Mode
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Characterizing Full Performance of New Device Design
A characterization engineer provides the necessary measurement expertise and understanding of
how measurement anomalies can impact non-targeted areas of device performance. It’s imperative
to get results fast to enable multiple iterations with device or process engineers and quickly convert
measurements to device parameters.
Capacitance Mmeasurements on a Power MOSFET
For on-wafer characterization, the Model
8020 High Power Interface Panel
minimizes connection changes
between major measurement types. I-V
and C-V measurements can be made
through bias tees without connection
changes. ACS Basic Edition Software
allows users to quickly calculate desired
parameters.
3kV SMU
200V SMU
200V SMU
200V SMU
50A SMU
50A SMU
CVU
Number 3276
Application Note
Series
Solving Connection Challenges in
On-Wafer Power Semiconductor
Device Test
Introduction
Measuring DC and capacitance parameters
for high power semiconductor devices
requires sufficient expertise to optimize
the accuracy of various measurements.
Even for those with this level of expertise,
managing set-up changes between
ON-state, OFF-state and capacitancevoltage (C-V) measurements can be
time consuming and prone to errors;
this is especially true in the on-wafer
environment.
This application note provides an
overview of how the Keithley Model
8020 High Power Interface Panel greatly
simplifies the user test experience by:
• Integrating key measurement-enabling
accessories for ON-state, OFF-state and
C-V measurements
• Enabling all C-V measurement
parameters, at both the componentlevel and circuit-level, with minimal
connection changes at the device
under test (DUT)
• Building in flexibility with a variety of
connector options
can involve tens to hundreds of amps.
Therefore, creating these curves requires
a high current instrument, such as the
Keithley Model 2651A High Power System
SourceMeter® instrument; when two
Model 2651As are configured in parallel,
they can generate up to 100A in pulsed
current. This SMU instrument is coupled
with a lower power SMU instrument, such
as Keithley’s Model 2636B, to drive the
control terminal (e.g., gate) of a threeterminal device.
To produce optimal high current
measurements, managing the resistance
and inductance in the cabling is
imperative. This can be achieved using
low inductance coaxial Kelvin connections
and minimizing the inductive loop area
at the DUTs. (Probe station geometries
often dictate this inductive loop area.) The
gate SMU instrument also requires Kelvin
connections so that high current pulses
at the FET’s source terminal don’t affect
the gate voltage and change the operating
point of the device.
• Expanding easily to support future
measurement requirements and new
device terminals
ON-State Measurements
Characteristic curves for a power
transistor, FET, or diode include a plot of
its typical output characteristics. Output
characteristics for some power devices
5
Read the Application Note
OFF-State Measurements
OFF-state characterization includes
measurement of the breakdown voltage
and leakage current of the device. These
parameters are typically tested at the



Configuring Common
Semiconductor Device
Measurements using
Traditional Accessories and
Standalone Instrumentation
A review of the requirements for the
DC and capacitance measurements to
be made on the DUT is an important
first step.
High power devices often exhibit high
gain and may be prone to oscillation
during testing. Adding series resistors
helps eliminate such oscillation. In typical
test systems, the resistor is inserted
between the lower power SMU instrument
and the gate terminal. This resistor must
be housed in a shielded enclosure so that
electrostatic interference is not coupled
in when characterizing other parameters,
such as gate leakage. Otherwise, the
series resistor would have to be removed
for those other tests. Series resistance
values can vary between devices and it
may be necessary to try several values in
order to select the appropriate value. It
can be a design challenge to house and
connect to these resistors properly when
performing on-wafer measurements.
Figure 1 illustrates the typical setup for
high current ON-state measurements.







Solving Connection Challenges in On-Wafer
Power Semiconductor Device Test






Figure 1. Typical ON-state measurement setup.
Te s t i n g H i g h P o w e r S e m i c o n d u c to r D e v i c e s f r o m I n c e p t i o n to M a r k e t
Model 8020 High Power
Interface Panel
Manages
• Series resistors
• High voltage bias tees
• Overvoltage protection
• Cabling differences
b etween measurements
• Connector interface to
p robe stations and fixtures
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Preparing the Device for Production
To properly prepare a device for production, the production test engineers must prove if the device can be
produced reliably. Measurements must be gathered for statistical setting of device specifications, and test
times must be optimized to meet required production throughput.
SMU Instruments
Sink
+ Source
ACS maps devices
and tests to sites and
subsites, eliminating
the need to duplicate
each test for each
subsite and reducing
test development time.
Multi-functional instruments offer the best
way to obtain measurements quickly with
minimal connection changes and switching.
Measure Ω
Measure V
Force V
Source measure unit (SMU) instruments are
multi-functional instruments that are proven
Force I
Measure I
for use in semiconductor applications. SMU
– Source
Sink
instruments with Test Script Processor
Measure W
(TSP®) technology are primed for throughput
because of their tight synchronization,
Capable of
Supports Any Combination
Four-Quadrant Operation
of Force and Measure Functions
built-in processors for complex operations,
and decision-making performed within the
instrument, thus minimizing communication times. These SMUs instruments are used in PCT configurations
for interactive testing and also in S500 Parametric Test Systems for automated production testing.
Automated Characterization Suite (ACS) Software combines advanced semiconductor test capabilities
along with prober control, data reporting, and statistics.
Maximize Speed and Throughput
for Semiconductor Measurements Using Source Measure Units (SMUs)
Optimizing Semiconductor
Measurements and Test Times
Production Test Die Sort | Wafer Acceptance Test | Reliability | Package Part Extreme Measurements | Higher Breakdown Voltage | Lower Leakage Current | Lower On Resistance | Higher Power
Extreme Measurements | Higher Breakdown Voltage | Lower Leakage Current | Lower On Resistance | Higher Power new Processes/new Materials SiC | GaN | Other…
Use a Four-Quadrant SMU Instrument Instead
of a Power Supply and Digital Multimeter
Paul Meyer
Product Marketer–Business Development Department
Keithley Instruments, Inc.
Introduction
Read the White Paper
Many parametric test engineers are learning to cope with new high voltage process
requirements. Not surprisingly, high voltage processes require high voltage parametric
testing for process control and reliability monitoring. Part of the challenge lies in
the fact that these new high voltage requirements add to the list of parametric tests
rather than replacing some portion of it. In many if not most cases, the high voltage
transistors are controlled by complex logic that requires low voltage/low current
parametric test. Consequently, both high voltage and logic tests have to be addressed
within the same test plan while minimizing impact on throughput.
How Did This Happen?
The IC industry has been delivering on Gordon Moore’s prediction of doubling
transistor density every 18 months and has done so for nearly half a century. As
computing power soared, the need to integrate more of the product functionality into
a single chip has led to concepts like “More than Moore.” Whereas Moore referred
to transistor density scaling, “More than Moore” speaks to scaling the circuit board
down to a single chip. The power devices that once lived on the circuit board are
increasingly integral to the IC itself.
One of the first areas to benefit from the “More than Moore” philosophy is power
management. Power management comes in several flavors, including smart power
management, green power management, and integrated power management. In every
case, the combination of computational power, programmability, and high power
driver circuits provide a platform to control and manage power and, consequently, to
exercise control over the real world.
Keithley Instruments, Inc.
28775 Aurora Road
Cleveland, Ohio 44139
(440) 248-0400
Fax: (440) 248-6168
www.keithley.com
Many semiconductor and electronic device tests involve sourcing a voltage and
measuring a current as quickly as possible. Overall test time is a function of charge time,
measure time, and discharge time, as well as the time to setup and process the test.
Traditional power supplies can only source voltage or current and cannot sink. But, a
four-quadrant SMU instrument can source and sink both voltage and current, while
simultaneously measuring voltage, current, or resistance. The SMU instrument’s fourquadrant operation speeds up the discharge time by automatically using sink mode to
quickly absorb all the charge
from the device under test
(DUT) and cabling. In additon,
by tightly integrating this source
and measure capability into
one instrument, the need for
a separate digital multimeter
(DMM) and power supply is
eliminated. This improves test
4 Quadrant SMU
2 Quadrant Power Supply
times, simplifies overall test
system design, and increases
usability.
For example, let’s consider Bipolar-CMOS-DMOS (BCD) technology. The term
BCD is often used to describe a number of variants, including combinations such as
Gearing Up for Parametric Test’s
High Voltage Future
Using a Model 2657A
Using a Power Supply
Total discharge time ~ 5 msec
Total discharge time > 6 sec
Time Scale = 2 msec/div
Use Embedded Test Scripts to Minimize
Program Execution Time
When a typical test program
Diode Test
executes from a PC controller, it
80
continually communicates back
and forth with the test instru60
mentation. This communication
time, whether it is over GPIB,
40
LAN, USB, or some other protocol, is often one of the largest
20
contributors to slower test times.
Embedded test scripts minimize
0
this communication time by
Without Scripting
With Scripting
storing and then executing entire
test programs directly from the
instrument’s non-volatile memory. All setup,
I
decision-making, and data storage is now done from
inside the instrument itself, independent of the PC.
V test
f
By using embedded test scripts, Keithley’s
Test Script Processor (TSP®) technology enables
dramatic improvements in overall test throughput.
For example, a typical three-point diode test
runs over 60% faster using embedded
V test
R
test scripts compared to traditional
programming techniques.
Get the Poster
The coax cable’s signal to lo resistance causes a parallel current path that slows down settling times and
limits the low current resolution of the system.
The extra shield in the triax cable works with the
driven guard in the SMU instrument to virtually
eliminate the parallel current path. This enables faster
settling times and better measurement resolution.
SoUrCIng VolTagE
V
Maximize Speed and Throughput for
Semiconductor Measurements Using
Source Measure Unit (SMU) Instruments
Time Scale = 2 sec/div
Use Triax Cabling Instead of Coax Cabling
1
Avg. time per part (ms)
Gearing Up for Parametric Test’s High Voltage Future
MEaSUrIng CUrrEnT
Watch the Webinar
Test in Parallel with Distributed Control
Implementing parallel test techniques
to test multiple devices at the same
time maximizes parts tested per prober
touch-down or handler index, thus
boosting productivity and lowering the
cost of test.
In a traditional test system, only one
instrument at a time can execute a
measurement or communicate with the
PC controller. All other instruments in
the system sit idle until it is their turn to
communicate with the PC controller.
In a distributed test system, the
embedded test script (TSP script) is
distributed and synchronized across
multiple instruments through TSPLink® technology, a high-speed, SMUto-SMU communication bus. There
is one CPU per SMU instrument, and
each SMU instrument works together
as a coordinated system. Through
the combination of TSP and TSP-Link
technologies, measurements are
performed in parallel.
TraDITIonal TEST SySTEMS
DISTrIbUTED TEST SySTEMS
Triax cables enable faster settling times and better
resolution when sourcing or measuring.
2600b System SourceMeter® SMU Instruments
Dual- or single-channel models
n Test up to 200V and 10A pulse
n Sub-pA resolution
n TSP and TSP-Link technologies
n
2650a High Power System SourceMeter®
SMU Instruments
n Test up to 3kV and 100A pulse with 200W
output power
n 1µsec/point digitizer
n Sub-pA resolution
n TSP and TSP-Link technologies
© Copyright 2013 Keithley Instruments, Inc.
2450 advanced Touchscreen
SourceMeter® SMU Instrument
n Industry-first 5-inch color
capacitive touchscreen GUI
n Test up to 200V and 1A
n Sub-pA resolution
n TSP and TSP-Link technologies
Printed in the U.S.A.
2400 SourceMeter® SMU
Instruments
n Test up to 1100V and 10A pulse
n Choose from over ten models
n pA resolution
n Entry-level price point
No. 3246
02.14
A Greater Measure of Confidence
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Meeting Reliability Standards for Commercial Use
To conclude that a device meets reliability standards for commercial use, reliability test engineers
have several responsibilities:
Pre-Stress
Characterization
• Determining if a device will survive environmental stresses and continue to meet specifications
• Answering customer questions about device lifetime (MTBF, MTTF)
Fail?
• Providing key insight into device fit for certain high reliability applications (mil/aero, automotive, etc.
Yes
Stop
No
Creating statistically relevant results requires sufficient sample sizes of the test devices. The nature
of stress-measure cycling over many devices necessitates multi-channel parallel test with automated
data evaluation.
Record
Data
S500 Integrated Test Systems are reliability test systems that can be custom built to accommodate from
small to large number of devices. ACS features stress measure loop cycling with integrated decision
making. Keithley also provides a wide range of power supply and SMU instrument solutions to permit
simultaneous power and testing of any number of devices.
Stress
Fail?
Yes
No
Optimizing Reliability Testing of
Power Semiconductor Devices
and Modules with Keithley SMU
Instruments and Switch Systems
Increase
Stress
Time
VDS Ramp and HTRB Reliability Testing
of High Power Semiconductor Devices
with Automated Characterization Suite
(ACS) Software
Interim
Measure
Record
Data
application brief
Number 3220
Number 3249
A Tektronix Company
Application Note
Series
Optimizing Reliability Testing of Power
Semiconductor Devices and Modules with
Keithley SMU Instruments and Switch Systems
Introduction
Typical Reliability Tests
To minimize early defect rates and to continuously improve
the overall reliability and lifetime of power semiconductors,
a variety of important tests are performed by both
manufacturers and end-use designers. Many of these tests
are outlined in JEDEC Standards such as JESD22-A108D
“Temperature, Bias, and Operating Life,” JESD22-A110D
“Highly Accelerated Temperature and Humidity Stress Test
(HAST),” or JESD236 “Reliability Qualification of Power
Amplifier Modules.” This application brief discusses methods
to optimize reliability testing of silicon and wide band gap
(WBG) power semiconductor devices, modules, and materials
by using Keithley SourceMeter® Source Measure Unit (SMU)
Instruments and Switch Systems (Figures 1 and 2).
Typical reliability tests involve stressing a batch or batches
of sample devices for hundreds or thousands of hours with
bias voltages that are greater than or equal to their normal
operating voltages while subjecting them to temperatures
that are well beyond normal operating conditions. During this
stress, a variety of key operating parameters are measured at
specific time intervals. Some of the more popular reliability
tests for power semiconductors are HTOL (High Temperature
Operating Life), ELFR (Early Life Failure Rate), HTFB (High
Temperature Forward Bias), HTRB (High Temperature Reverse
Bias), and HAST (Highly Accelerated Temperature & Humidity
Stress Test). These tests will either use a continuous bias
(Figure 3) or cycled bias (Figure 4). A continuous bias can be
a fixed voltage or a staircase ramp. A cycled bias will typically
vary the duty cycle and/or frequency of the bias voltage. In both
cases, key device parameters will be tested continuously or at
specific time intervals.
Introduction
Before they can gain commercial acceptance, the reliability
of wide bandgap devices must be proven and there is a demand
for higher reliability requirements. The continuous drive for
greater power density at the device and package levels creates
consequences in terms of higher temperatures and temperature
gradients across the package. New application areas often mean
more severe ambient conditions. For example, in automotive
hybrid traction systems, the cooling liquid for the combustion
engine may reach temperatures as high as 120°C. In order to
provide sufficient margin, this means the maximum junction
temperature (TJMAX ) must be increased from 150°C to 175°C
[4]. In safety-critical applications such as aircraft, the zerodefect concept has been proposed to meet stricter reliability
requirements.
Figure 2. Keithley Series 3700A and 707B Series Switch Systems.
Reliability testing of today’s WBG power semiconductors
presents several key challenges for engineers and test system
designers. Most importantly, since most of these devices are
being targeted for energy-efficiency applications, they have
much lower leakage and on-resistance specifications compared
to traditional silicon. The test instrumentation must therefore
be capable of providing the necessary accuracy, resolution, and
stability to meet the electrical requirements of these devices.
In addition, since WBG devices exhibit failure mechanisms
that are different from silicon, effective reliability testing per
JEDEC standards requires larger sample sizes and longer
stress durations to adequately predict important reliability
parameters. This requires test instrumentation that is capable
of supplying enough power to test many devices in parallel,
while maintaining the accuracy and resolution mentioned
above. Finally, the test instrumentation must be able to respond
to the high speed behaviors associated with these devices and
produce the masses of data associated with testing devices in
parallel. Each instrument in the system must be fast, and all
units must operate in a highly synchronized manner.
VDS Ramp and HTRB Reliability Tests
The V DS ramp and the High Temperature Reverse Bias (HTRB)
tests are among the most common reliability tests for power
devices. In a V DS ramp test, as the drain-source voltage is stepped
from a low voltage to a voltage that’s higher than the rated
maximum drain-source voltage, specified device parameters
are evaluated. The test is useful for tuning the design and
process conditions, as well as verifying that devices deliver
the performance specified on their data sheets. For example,
Dynamic R DS(ON), monitored using a V DS ramp test, provides a
measurement of how much a device’s ON-resistance increases
after being subjected to a drain bias [5]. Although a V DS ramp test
is generally used as a quick form of parametric verification, an
HTRB test evaluates long-term stability under high drain-source
bias. During an HTRB test, the device samples are stressed at or
slightly less than the maximum rated reverse breakdown voltage
(usually 100% or 80% of V RRM) at an ambient temperature close
to their maximum rated junction temperature (TJMAX ) over a
Application Note
Series
Breakdown and Leakage Current Measurements on High
Voltage Semiconductor Devices Using Keithley Series 2290
High Voltage Power Supplies and Series 2600B System
SourceMeter® Source Measure Unit (SMU) Instruments
Increased attention to energy efficiency has resulted in
electronics with higher power density. In grid-connected and
industrial applications, such as AC motor control, uninterruptible
power supplies (UPS,) and traction control (large hybrid and
electric transport vehicles,) the need to keep manageable cable
sizes pushes power conversion to higher voltages. For such
voltages, the semiconductor device of choice has historically
been the thyristor. Technological advances in device fabrication
and material processing is enabling the development of IGBTs
and MOSFETs with voltage ratings of thousands of volts. In
applications where possible, using IGBTs or even MOSFETs in
place of thyristors permits power conversion at high switching
frequencies. The migration to higher frequency reduces the size
of passive components used in the design and, thereby, improves
energy efficiency.
Wide bandgap semiconductor materials such as silicon carbide
(SiC) and gallium nitride (GaN) offer physical properties superior
to those of silicon (Si) for power device applications, enabling
devices based on these materials to withstand high voltages and
temperatures, as well as permitting higher frequency response,
greater current density, and faster switching [1]. These emerging
power devices have great potential; however, the technologies
necessary to create and refine them are still under development
and therefore less mature than silicon technology. This creates
some big challenges associated with designing and characterizing
these devices, as well as process monitoring and reliability
issues [2].
Reliability Testing Challenges
Figure 1. Keithley Series 2650A High Power SourceMeter
SMU Instruments.
VDS Ramp and HTRB Reliability Testing of High
Power Semiconductor Devices with Automated
Characterization Suite (ACS) Software
Figure 1. Automated Characterization Suite (ACS) graphical user interface
period of time (usually 1,000 hours)[3][5][6][7]. The leakage
current is continuously monitored throughout the test and a
fairly constant leakage current is generally required to pass
the test. Because it combines electrical and thermal stress, this
test can be used to check the junction integrity, crystal defects
and ionic-contamination level, which can reveal weaknesses or
degradation effects in the field depletion structures at the device
edges and in the passivation [8].
Test Instrumentation and
Measurement Considerations
Power device characterization and reliability testing require test
instrumentation with higher voltage as well as more sensitive
current measurement capability than ever before [2]. During
operation, the devices undergo both electrical and thermal stress:
when in the ON state, they have to pass tens or hundreds of amps
with minimal loss (low voltage, high current); when they are
OFF, they have to block thousands of volts with minimal leakage
currents (high voltage, low current). Additionally, during the
switching transient, they are subjected to a brief period of both
high voltage and high current. The high current experienced
during the ON state generates a large amount of heat, which may
degrade device reliability if it is not dissipated efficiently [1].
Reliability tests typically involve high voltages, long test times,
and often multiple devices under test (wafer level testing). As a
result, well-designed test systems and measurement plans are
essential to avoid breaking devices, damaging equipment, and
losing test data. Consider the following factors when executing
V DS ramp and HTRB reliability tests:
Keithley has long had a strong presence in high power
semiconductor device test with its high voltage source-measure
products, including the Models 237, 2410, and 2657A SMU
instruments. Most recently, Keithley released the Model 2290-5
5kV and Model 2290-10 10kV High Voltage Power Supplies. This
note considers the application of these power supplies to high
voltage semiconductor device testing.
High Voltage Device Tests
Basic characterization of high voltage semiconductor devices
typically involves a study of the breakdown voltage and
leakage current. These two parameters help the device
designer to quickly determine whether the device was correctly
manufactured and whether it can be effectively used in the target
application.
Breakdown Voltage Measurements
Measuring breakdown voltage is done by applying an increasing
reverse voltage to the device until a certain test current is
reached that indicates that the device is in breakdown. Figure 1
depicts a breakdown measurement on a high voltage diode
using a Series 2290 High Voltage Power Supply. Note that
the Series 2290 Power Supplies are unipolar supplies and
must be connected to the diode’s cathode in order to apply a
reverse voltage.
In qualifying breakdown voltage, measurements are typically
made well beyond the expected rating of the device to ensure
that the device is robust and reliable. The models 2290-5 and
2290-10 Power Supplies have a voltage range wide enough to test
many of the industry’s future devices.
Fail/
Exit?
Properly grounded
safe enclosure
Series 2290
High Voltage
Power Supply
A
Figure 1. Typical breakdown voltage measurement of a high voltage diode
using the Series 2290 High Voltage Power Supply.
Safety Considerations
When testing at high voltage, safety is of utmost concern. The
Series 2290 Power Supplies generate voltage up to 10kV, so
precautions must be taken to ensure that the operator is not
exposed to unsafe voltage:
• Enclose the device under test (DUT) and any exposed
connections in a properly grounded fixture.
• Use the safety interlock. The Series 2290 Power Supplies are
fully interlocked so that the high voltage output is turned off
if the interlock is not engaged (interlock switch closed.) The
interlock circuit of the power supply should be connected to
a normally-open switch that closes only when the user access
point in the system is closed to ensure that operators cannot
come in contact with a high voltage connection to the DUT.
For example, opening the lid of the test fixture should open
the switch/relay that disengages the interlock of the Series
2290 Power Supply.
Breakdown and Leakage Current
Measurements on High Voltage
Semiconductor Devices
• Use cables and connectors rated to the maximum voltage in
the system. Series 2290 Power Supplies provide a number of
appropriately-rated accessories that the test system designer
can use to interface to the device under test (DUT).
Leakage Current Measurements
In a typical power conversion application, the semiconductor
device is used as a switch. Leakage current measurements
indicate how closely the semiconductor performs to an ideal
switch. Also, when measuring the reliability of the device,
Learn More from these Application Resources
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Te s t i n g H i g h P o w e r S e m i c o n d u c to r D e v i c e s f r o m I n c e p t i o n to M a r k e t
Process flow for HCI/NBTI/constant current EM tests.
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Implementing the Device in Actual Designs
Once a device is validated, it’s ready for commercial use. Those who purchase devices must
verify that the device is within tolerance for a particular application to ensure that the expected
power efficiency gains will be achieved in the end product. As the device matures and becomes
available from multiple suppliers, power device consumers want to quickly inspect incoming
devices in order to identify and eliminate counterfeit devices to avoid potential failures in the
end product.
Tektronix and Keithley offer a wide variety of power supply solutions to power basic circuit
boards. Additionally, Tektronix’s power analyzers can quickly and accurately assess overall end
product performance. Keithley’s Parametric Curve Tracer (PCT) Configurations and ACS Basic
Edition Software include a large library of power device tests so individual device performance
can be quickly verify. Oscilloscopes with optional power analysis modules enable quick and
accurate analysis of switching loss, harmonics, and safe operating area. Choose from a wide
variety of high voltage, current, and differential probes to partner with an oscilloscope.
Testing Power Semiconductor Devices
with Keithley High Power System
SourceMeter® SMU Instruments
Number 3248
Number 3204
A Tektronix Company
Application Note
Series
Testing Power Semiconductor Devices
with Keithley High Power System
SourceMeter® SMU Instruments
Using the Arbitrary Waveform Capabilities of
the Series 2600B and Series 2650A System
SourceMeter® SMU Instruments to Perform Ford
EMC-CS-2009.1 CI 230 Power Cycling Testing
Introduction
Introduction
The proliferation of electronic control and electronic power
conversion into a variety of industries (e.g., energy generation,
industrial motor drives and control, transportation, and IT)
has spurred growth in power semiconductor device design and
test. To demonstrate technology improvements, new device
capabilities must be compared with those of existing devices.
The use of semiconductor materials other than silicon demands
the use of new processes. And, to be sustainable, these new
processes must be tuned to deliver consistent results and high
production yield. As new device designs are developed, reliability
measurements are performed on many devices over long periods.
Therefore, test engineers must identify test equipment that is not
only accurate but scalable and cost-effective.
Learn More
Application Note
Series
VIN
VOUT
Figure 1. A simple schematic of a type of switching power supply.
switch on and off at a controlled duty cycle to produce the
desired output voltage.
When evaluating energy efficiency, it’s important to
understand the switching loss (energy loss that occurs during
the short periods when the device is changing states) and
conduction loss (energy losses that occur when the device is
either on or off). Keithley SMU instrument-based solutions can
help test engineers evaluate the device parameters that affect
conduction loss.
Power module design engineers—the consumers of the
discrete power semiconductor components—work at the other
end of the semiconductor device testing spectrum. They integrate
the discrete components into designs for DC-DC converters,
inverters, LED controllers, battery management chips, and many
other devices. Driven by demands for higher energy efficiency,
these engineers need to qualify the devices they receive from
their vendors to ensure that they can withstand use in the
application, predict how the efficiency of the power modules may
be affected by the device, and finally validate the performance of
the end product.
Semiconductor devices are often used to ensure circuit
protection. For example, some thyristor devices are used for
overvoltage protection. To achieve that objective, such devices
must trigger at the appropriate intended voltage and current,
must withstand the intended voltage, and must behave in circuit
with minimal current draw. High power instrumentation is
required to qualify these devices properly.
Keithley’s SourceMeter SMU instruments give both device
test engineers and power module design engineers the tools
they need to make the measurements they require. Whether
they’re familiar with curve tracers, semiconductor parameter
analyzers, or oscilloscopes, they can obtain accurate results
simply and quickly. This application note highlights some of the
most commonly performed tests, the challenges associated with
them, and how Keithley SMU instruments can simplify the testing
process, especially when integrated into a Keithley Parametric
Curve Tracer (PCT) configuration.
This note focusses on the characterization of static power
device parameters.1 These parameters can be divided into two
broad categories: those that determine the performance of the
device in its ON state and those that determine the performance
in its OFF state. Table 1 lists common ON-state and OFF-state
parameters for several power semiconductor devices that
Keithley SMU instruments support. Many tests involve the use of
multiple SMU instruments. Keithley’s ACS Basic Edition software
simplifies the test configuration by managing the configuration
and data collection of all SMU instruments in the test system.
Unlike general-purpose start-up software, ACS Basic Edition is
designed specifically for semiconductor device characterization
and includes a library of tests; users can focus on the test and
device parameters rather than the SMU instrument configuration.
Background on Power Device Characterization
The switching power supply is one common electrical circuit
element used in power management products. In its simplest
form (Figure 1), its main components include a semiconductor
such as a power MOSFET, a diode, and some passive
components, including an inductor and a capacitor. Many also
include a transformer for electrical isolation between the input
and output. The semiconductor switch and diode alternatively
1 Tektronix solutions are available for transient characterization of power devices. For
more information, visit www.tek.com.
Arbitrary waveform generators are very flexible instruments
capable of outputting voltage waveforms of virtually any shape.
These instruments are quite useful because they provide a
controlled method of recreating the varying signals that may be
seen by a device after it is placed into a system. By recreating
these signals, device designers can use them to test their
devices. Unfortunately, arbitrary waveform generators typically
cannot supply very much current and max out at just a few
hundred milliamps. For many devices, this level of current is
simply insufficient. To achieve higher currents, the arbitrary
waveform generator can be combined with a power amplifier,
but this requirement for additional hardware not only adds cost
but increases the complexity of the test system. A much better
solution would be a single box that can output both an arbitrary
waveform and the additional current required by the device. One
such instrument is the Source Measure Unit (SMU) instrument.
SMU instruments combine the capabilities of a precision
DC power supply with the measurement capabilities of a highly
accurate DMM. These instruments are most commonly used
when a very precise current or voltage must be sourced and an
accurate voltage or current measurement must be made. These
instruments are used to characterize devices by sweeping voltage
or current across the device and measuring the corresponding
current or voltage. Because performing sweeps is so common,
most of these instruments have sweep capabilities built right
in, allowing the user to program the instrument to perform
linear, logarithmic or list sweeps easily with a minimal number
of commands. Although the linear sweep is certainly the most
common type, the real power lies with the list sweep. In a list
sweep, the user provides the value of every point in the sweep.
This sweep type allows the SMU instrument to be used as an
arbitrary waveform generator.
One test that requires arbitrary waveform capability but
requires more current than an arbitrary waveform generator
can provide is the CI 230 Power Cycling test as specified by
the Ford EMC-CS-2009.1 specification. This test simulates
the changes in supply voltage seen by the electrical and/or
electronic components and subsystems of the automobile when
the engine is being started. It specifies the use of four different
waveforms, each being quite complex and including DC levels,
step functions, ramp functions, and a 4Hz sine wave. The
specifications for these waveforms can be seen in Figure 1.
The automobile components and subsystems tested often
require several amps of current in order to function properly.
Get the Application Notes
Figure 1: Ford EMC-CS-2009.1 CI 230 power cycling waveforms
With arbitrary waveform capabilities and the ability to source
up to 20A of DC current, SMU instruments are very capable for
performing this test. This application note shows how to use
Keithley Series 2600B and Series 2650A System SourceMeter SMU
Instruments as arbitrary waveform generators to generate these
complex waveforms.
Configuring the SMU for AWG Output
Configuring the Series 2600B and Series 2650A System
SourceMeter SMU Instruments for arbitrary waveform output is
very similar to configuring them for any normal list sweep. The
major difference is that for arbitrary waveform output, a
Using the Arbitrary Waveform Capabilities of
the Series 2600B and Series 2650A System
SourceMeter® SMU Instruments to Perform Ford
EMC-CS-2009.1 CI 230 Power Cycling Testing
constant update rate is necessary for the source output, so
some additional timing control is required. To set up the
SMU instruments for arbitrary waveform output, take the
following steps:
1
8
Te s t i n g H i g h P o w e r S e m i c o n d u c to r D e v i c e s f r o m I n c e p t i o n to M a r k e t
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Diagnosing Device Failures
Failure analysis engineers must determine whether a failure has been caused by end-product use or
by a design flaw that was previously overlooked. Once this determination has been made, design and
process engineering must be made aware of the cause of the failure, so that either process or design
changes can be implemented to prevent future failures.
It’s important that basic device specifications, both static and dynamic, can be measured quickly.
The end use application is mimicked in an effort to reproduce the failure.
Parametric Curve Tracer Configurations feature trace mode, which provides quick device analysis.
Additionally, Keithley’s Automated Characterization Suite (ACS) has several built-in stress-measure tests
that can be used until a device reaches the desired level of degradation.
Learn More from our Experts | Download these Applications Resources
VDS Ramp and HTRB Reliability
Testing of High Power Semiconductor
Devices with Automated Characterization
Suite (ACS) Software
Measuring Low Resistance
Devices with High Current
Using the Model 2460
VDS Ramp and HTRB Reliability Testing of High
Power Semiconductor Devices with Automated
Characterization Suite (ACS) Software
The V DS ramp and the High Temperature Reverse Bias (HTRB)
tests are among the most common reliability tests for power
devices. In a V DS ramp test, as the drain-source voltage is stepped
from a low voltage to a voltage that’s higher than the rated
maximum drain-source voltage, specified device parameters
are evaluated. The test is useful for tuning the design and
process conditions, as well as verifying that devices deliver
the performance specified on their data sheets. For example,
Dynamic R DS(ON), monitored using a V DS ramp test, provides a
measurement of how much a device’s ON-resistance increases
after being subjected to a drain bias [5]. Although a V DS ramp test
is generally used as a quick form of parametric verification, an
HTRB test evaluates long-term stability under high drain-source
bias. During an HTRB test, the device samples are stressed at or
slightly less than the maximum rated reverse breakdown voltage
(usually 100% or 80% of V RRM) at an ambient temperature close
to their maximum rated junction temperature (TJMAX ) over a
Application Note
Series
Measuring Low Resistance Devices
with High Current Using the Model 2460
SourceMeter® SMU Instrument
Low resistance measurements offer a good way to identify
resistance elements that have changed over time. Often,
these types of measurements are used to evaluate if a device
or material has degraded due to environmental factors like
heat, fatigue, corrosion, vibration, etc. For many applications,
these measurements are typically lower than 10Ω. A change
in resistance value is often the best indicator of some form of
degradation between two points of contact. Low resistance
measurements performed using high currents are commonly
used to evaluate high power resistors, circuit breakers, switches,
bus bars, cables and connectors, and other resistance elements.
Wide bandgap semiconductor materials such as silicon carbide
(SiC) and gallium nitride (GaN) offer physical properties superior
to those of silicon (Si) for power device applications, enabling
devices based on these materials to withstand high voltages and
temperatures, as well as permitting higher frequency response,
greater current density, and faster switching [1]. These emerging
power devices have great potential; however, the technologies
necessary to create and refine them are still under development
and therefore less mature than silicon technology. This creates
some big challenges associated with designing and characterizing
these devices, as well as process monitoring and reliability
issues [2].
VDS Ramp and HTRB Reliability Tests
Application Note
Series
Introduction
Introduction
Before they can gain commercial acceptance, the reliability
of wide bandgap devices must be proven and there is a demand
for higher reliability requirements. The continuous drive for
greater power density at the device and package levels creates
consequences in terms of higher temperatures and temperature
gradients across the package. New application areas often mean
more severe ambient conditions. For example, in automotive
hybrid traction systems, the cooling liquid for the combustion
engine may reach temperatures as high as 120°C. In order to
provide sufficient margin, this means the maximum junction
temperature (TJMAX ) must be increased from 150°C to 175°C
[4]. In safety-critical applications such as aircraft, the zerodefect concept has been proposed to meet stricter reliability
requirements.
Number 2240
Number 3282
Number 3220
A Tektronix Company
Application Note
Series
Evaluating Oxide Reliability Using
V-Ramp and J-Ramp Techniques
test as possible. This four-wire measurement cancels out the
resistance of the test leads in the measurement.
Figure 1 illustrates the front-panel connections, which can
be made with four insulated banana cables that are rated to the
maximum current (7A), such as two sets of Keithley’s Model 8608
High-Performance Clip Lead Set.
Watch the On-line Demo
Introduction
Oxide integrity is an important reliability concern, especially for
today’s ULSI MOSFET devices, where oxide thickness has been
scaled to a few atomic layers. The JEDEC 35 Standard
(EIA/JESD35, Procedure for Wafer-Level Testing of Thin
Dielectrics) describes two wafer level test techniques commonly
used to monitor oxide integrity: voltage ramp (V-Ramp) and current ramp (J-Ramp). Both techniques provide fast feedback for
oxide evaluation.
failure. Oxide failure is detected by a sudden increase in current
that is ten times the expected value or a measured oxide current
that exceeds a specified current compliance. A post-test, which is
performed at Vuse, is used to determine the final state of the tested device. Extracted V-Ramp measurement parameters include
the breakdown voltage (VBD) and the charge to breakdown
(QBD).
The instrumentation used to monitor oxide breakdown
must provide the following capabilities:
period of time (usually 1,000 hours)[3][5][6][7]. The leakage
current is continuously monitored throughout the test and a
fairly constant leakage current is generally required to pass
the test. Because it combines electrical and thermal stress, this
test can be used to check the junction integrity, crystal defects
and ionic-contamination level, which can reveal weaknesses or
degradation effects in the field depletion structures at the device
edges and in the passivation [8].
Figure 1. Model 2460 front-panel connections for low resistance
measurements
Test Instrumentation and
Measurement Considerations
Power device characterization and reliability testing require test
instrumentation with higher voltage as well as more sensitive
current measurement capability than ever before [2]. During
operation, the devices undergo both electrical and thermal stress:
when in the ON state, they have to pass tens or hundreds of amps
with minimal loss (low voltage, high current); when they are
OFF, they have to block thousands of volts with minimal leakage
currents (high voltage, low current). Additionally, during the
switching transient, they are subjected to a brief period of both
high voltage and high current. The high current experienced
during the ON state generates a large amount of heat, which may
degrade device reliability if it is not dissipated efficiently [1].
Reliability tests typically involve high voltages, long test times,
and often multiple devices under test (wafer level testing). As a
result, well-designed test systems and measurement plans are
essential to avoid breaking devices, damaging equipment, and
losing test data. Consider the following factors when executing
V DS ramp and HTRB reliability tests:
Most digital multimeters (DMMs) lack the ability to make
low resistance measurements with high currents. A DMM
combined with a power supply will work, but these instruments
must first be integrated into a system in order to automate
the measurement process, then the resistance must be
calculated manually.
• Automated device parameter extraction
When the leads are connected to the device under test
(DUT), note that the FORCE LO and SENSE LO connections
are attached to one of the DUT leads and the FORCE HI and
SENSE HI connections are attached to the other lead. The sense
connections should be connected as close to the resistor under
Monitoring Channel Hot Carrier (CHC)
Degradation of MOSFET Devices using
Keithley Model 4200-SCS
Introduction
Channel Hot Carrier (CHC) induced degradation is an important
reliability concern in modern ULSI circuits. Charge carriers gain
kinetic energy as they are accelerated by the large electric field
across the channel of a MOSFET. While most carriers reach the
drain, hot carriers (those with very high kinetic energy) can generate electron-hole pairs near the drain due to impact ionization
from atomic-level collisions. Others can be injected into the gate
channel interface, breaking Si-H bonds and increasing interface
trap density. The effect of CHC is time dependant degradation of
device parameters, such as V T, IDLIN, and IDSAT.
• Advanced data analysis techniques
Figure 2 illustrates the rear-panel connections, which can be
made with either the Model 2460-KIT Screw-Terminal Connector
Kit (included with the Model 2460) or a Model 2460-BAN Banana
Test Leads/Adapter Cable with appropriate cabling.
Vg
This application note describes how to use the Keithley
Model 4200-SCS Semiconductor Characterization System to perform oxide reliability testing.
Poly-Si
Source
–
The V-Ramp and J-Ramp
Test Techniques
Source Measure Unit (SMU) instruments or SourceMeter®
instruments can simplify making low resistance measurements
with high current stimulus. A SourceMeter instrument is capable
of sourcing and measuring both current and voltage. Keithley’s
Model 2460 High Current SourceMeter SMU Instrument has the
flexibility to source/sink high current and measure voltage and
current, making it a perfect solution for measuring low resistance
devices that require stimulus currents up to 7A. The Model 2460
automatically calculates the resistance, so there’s no need to
make the calculation manually. Built-in features such as remote
sensing and offset compensation help optimize low resistance
measurements. The Model 2460 offers <1mΩ resolution.
Low resistance measurements can be made using either
the Model 2460’s front-panel or rear-panel terminals, as shown
in Figures 1 and 2. Note that either the front-panel terminals
or rear-panel terminals must be used—the connections
can’t be mixed.
Application Note
Series
This channel hot carrier induced degradation (also called
HCI or hot carrier injection) can be seen on both NMOS and
PMOS devices and will affect device parameters in all regions,
such as V T, sub-threshold slope, Id-on, Id-off, Ig, etc. The rate of
degradation of each parameter over stress time depends on the
device layout and process used.
• Precise step time control
While the V-Ramp test applies a linear voltage ramp, the J-Ramp
test applies an increasing logarithmic current ramp until oxide
breakdown. The V-Ramp test begins at a low oxide voltage, so it
is better able to detect low electric field failures, but it provides
poor resolution at high electric fields. The J-Ramp test is different— it starts at a relatively high oxide voltage, so it provides
poor low electric field resolution but better resolution at high
electric fields. This resolution difference has led to the V-Ramp
test often being used to determine infant mortality and low electric field fallout on larger test structures (extrinsic failures),
while the J-Ramp test is often used on smaller test structures,
where the oxide failure mode is expected to be intrinsic.
Figure 2. Model 2460 low resistance connections on rear panel
The V-Ramp Test Procedure
Common sources of error for low
resistance measurements
Figure 1 illustrates the V-Ramp test procedure. The sequence
begins with a pre-test to determine initial oxide integrity. During
the pre-test, a constant voltage (Vuse) is applied and the oxide
leakage current measured. If the oxide is determined to be
“good,” a linear voltage ramp is applied to the device until oxide
Low resistance measurements are subject to errors from a variety
of sources, including lead resistance, non-ohmic contacts, and
device heating.
PCT Configuration in Trace Mode
9
Number 2535
Evaluating Oxide Reliability Using
V-Ramp and J-Ramp Techniques
• Accurate voltage and current forcing and measurement
capability
Figure 1. Automated Characterization Suite (ACS) graphical user interface
Monitoring Channel Hot Carrier (CHC)
Degradation of MOSFET Devices using
Keithley Model 4200-SCS
Te s t i n g H i g h P o w e r S e m i c o n d u c to r D e v i c e s f r o m I n c e p t i o n to M a r k e t
Vd
–
–
Drain
Figure 1. Channel Hot Carrier degradation
Figure 1. V-Ramp Flow chart
The J-Ramp Test Procedure
Figure 2 is an overview of the J-Ramp test methodology. The
procedure begins with a pre-test to determine oxide integrity. In
this pre-test, a constant current (typically 1µA) is applied and the
voltage sustained across the oxide measured. If the device is
“good,” an increasing logarithmic step current [given by Istress =
Iprev * F (where F < 3.2)] is applied until oxide failure. Oxide
failure is detected when the voltage across the oxide drops 15%
or more from the previous measured voltage (Vprev) or the
charge limit is exceeded. A post constant current test is used to
assess the final state of the tested device. Extracted J-Ramp
oxide breakdown parameters include the breakdown voltage
(VBD) and the charge to breakdown (QBD).
Pre-Stress
characterization
Fail?
Yes
Stop
No
Record data
Stress
Yes
Fail?
No
Increase stress time
Interim test
Record data
No
Fail/Exit
Yes
Figure 2. Typical CHC test procedure
Stress bias conditions are based on worst-case degradation
bias conditions, which are different for NMOS and PMOS FETs.
Typically, for drain voltage stress, it should be less than 90% of
the source drain breakdown voltage. Then, at the drain stress
voltage, the gate stress voltage is different depending on the type
of transistor and gate length. Table 1 shows worst-case degradation bias conditions for NMOS and PMOS FETs created using different technologies [2].
Technology
L >= 0.35um
L < 0.25um
N-MOSFET
Vg (max Isub)
Vg (max Isub) or Vg = Vd
P-MOSFET
Vg (max Ig)
Vg = Vd
Procedures for CHC Degradation Test
Table 1. Worst-case stress bias conditions for NMOS and PMOS FETs
A typical Channel Hot Carrier test procedure consists of a prestress characterization of the device under test (DUT), followed
by a stress and measurement loop [1] ((Figure 2). In this loop,
devices are stressed at voltages higher than normal operating
voltages. Device parameters, including IDLIN, IDSAT, V T, Gm, etc,
are monitored between stresses and the degradation of those
parameters is plotted as a function of accumulated stress time.
Prior to conducting this stress and measurement loop, the same
set of device parameters is measured to serve as baseline values.
The worst-case stress bias conditions can be easily determined using interactive test modules (ITMs) on the Model
4200-SCS Semiconductor Characterization System.
Device connections
It’s easy to perform a CHC test on a single transistor. However,
each CHC test typically takes a long time to complete, so it’s
desirable to have many DUTs stressed in parallel, then characterized sequentially between stresses to save time. To accomplish
this, a switch matrix is needed to handle the parallel stresses and
sequential measurements between stresses. Figure 3 shows an
example of a hardware configuration for a typical CHC test for
multiple DUTs. The Model 4200-SCS provides the stress voltages
and measurement capability, while the switch matrix enables
parallel stress and sequential measurements of multiple devices.
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ASEAN / Australia (65) 6356 3900
Austria* 00800 2255 4835
Balkans, Israel, South Africa and other ISE Countries +41 52 675 3777
Belgium* 00800 2255 4835
Brazil +55 (11) 3759 7627
Canada 1 (800) 833-9200
Central East Europe and the Baltics +41 52 675 3777
Central Europe & Greece +41 52 675 3777
Denmark +45 80 88 1401
Finland +41 52 675 3777
France* 00800 2255 4835
Germany* 00800 2255 4835
Hong Kong 400-820-5835
Ireland* 00800 2255 4835
India +91-80-30792600
Italy* 00800 2255 4835
Japan 0120-441-046
Luxembourg +41 52 675 3777
Macau 400-820-5835
Mongolia 400-820-5835
Mexico, Central/South America & Caribbean 52 (55) 56 04 50 90
Middle East, Asia and North Africa +41 52 675 3777
The Netherlands* 00800 2255 4835
Norway 800 16098
People’s Republic of China 400-820-5835
Poland +41 52 675 3777
Portugal 80 08 12370
Puerto Rico 1 (800) 833-9200
Republic of Korea +822-6917-5000
Russia +7 495 664 75 64
Singapore +65 6356-3900
South Africa +27 11 206 8360
Spain* 00800 2255 4835
Sweden* 00800 2255 4835
Switzerland* 00800 2255 4835
Taiwan 886-2-2656-6688
United Kingdom* 00800 2255 4835
USA 1 (800) 833-9200
Want to learn more?
Contact us by phone, fax, mail, or email:
Within the USA: 1-888-534-8453
Outside the USA: + 1-440-248-0400
Email: [email protected]
Additional contact information at www.keithley.com
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* If the European phone number above is not accessible,
please call +41 52 675 3777
Copyright © 2015, Tektronix. All rights reserved. Tektronix products are
covered by U.S. and foreign patents, issued and pending. Information in this
publication supersedes that in all previously published material. Specification
and price change privileges reserved. TEKTRONIX and TEK are registered
trademarks of Tektronix, Inc. All other trade names referenced are the service
marks, trademarks or registered trademarks of their respective companies.
03/15
Te s t i n g H i g h P o w e r S e m i c o n d u c to r D e v i c e s f r o m I n c e p t i o n to M a r k e t
EA/WWW
1KW-60127-0
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