CD4001 datasheet

October 1987

Revised March 2002

CD4001BC/CD4011BC

Quad 2-Input NOR Buffered B Series Gate •

Quad 2-Input NAND Buffered B Series Gate

General Description

The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive.

The devices also have buffered outputs which improve transfer characteristics by providing very high gain.

All inputs are protected against static discharge with diodes to V

DD

and V

SS

.

Features

■ Low power TTL:

Fan out of 2 driving 74L compatibility: or 1 driving 74LS

■ 5V–10V–15V parametric ratings

■ Symmetrical output characteristics

■ Maximum input leakage 1

µ

A at 15V over full temperature range

Ordering Code:

Order Number

CD4001BCM

CD4001BCSJ

Package Number

M14A

M14D

Package Description

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

CD4001BCN

CD4011BCM

N14A

M14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

CD4011BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagrams

Pin Assignments for DIP, SOIC and SOP

CD4001BC

Pin Assignments for DIP and SOIC

CD4011BC

Top View

© 2002 Fairchild Semiconductor Corporation DS005939

Top View www.fairchildsemi.com

Schematic Diagrams

CD4001BC

1

/

4

of device shown

J

=

A + B

Logical “1”

=

HIGH

Logical “0”

=

LOW

All inputs protected by standard

CMOS protection circuit.

CD4011BC

1

/

4

of device shown

J

=

A • B

Logical “1”

=

HIGH

Logical “0”

=

LOW

All inputs protected by standard

CMOS protection circuit.

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2

Absolute Maximum Ratings

(Note 1)

(Note 2)

Voltage at any Pin

Power Dissipation (P

D

)

Dual-In-Line

Small Outline

V

DD

Range

Storage Temperature (T

S

)

Lead Temperature (T

L

)

(Soldering, 10 seconds)

−

0.5V to V

DD

+

0.5V

700 mW

500 mW

−

0.5 V

DC

to

+

18 V

DC

−

65

°

C to

+

150

°

C

260

°

C

Recommended Operating

Conditions

Operating Range (V

DD

)

Operating Temperature Range

CD4001BC, CD4011BC

3 V

DC

to 15 V

DC

−

55

°

C to

+

125

°

C

Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics tables provide conditions for actual device operation.

Note 2: All voltages measured with respect to V

SS

unless otherwise specified.

DC Electrical Characteristics

(Note 2)

Symbol Parameter Conditions

I

V

V

V

V

I

I

I

DD

OL

OH

IL

IH

OL

OH

IN

Quiescent Device

Current

LOW Level

Output Voltage

HIGH Level

Output Voltage

LOW Level

Input Voltage

V

DD

=

5V, V

IN

=

V

DD

or V

SS

V

DD

=

10V, V

IN

=

V

DD

or V

SS

V

DD

= 15V, V

IN

= V

DD

or V

SS

V

DD

=

5V

V

DD

=

10V |I

O

|

<

1

µ

A

V

DD

= 15V

V

DD

=

5V

V

DD

=

10V |I

O

|

<

1

µ

A

V

DD

= 15V

V

DD

=

5V, V

O

=

4.5V

V

DD

=

10V, V

O

=

9.0V

HIGH Level

Input Voltage

LOW Level Output

Current

V

DD

= 15V, V

O

= 13.5V

V

DD

=

5V, V

O

=

0.5V

V

DD

=

10V, V

O

=

1.0V

V

DD

= 15V, V

O

= 1.5V

V

DD

=

5V, V

O

=

0.4V

V

DD

=

10V, V

O

=

0.5V

(Note 3) V

DD

= 15V, V

O

= 1.5V

HIGH Level Output V

DD

=

5V, V

O

=

4.6V

Current V

DD

=

10V, V

O

=

9.5V

(Note 3)

Input Current

V

DD

= 15V, V

O

= 13.5V

V

DD

=

15V, V

IN

=

0V

V

DD

=

15V, V

IN

=

15V

Note 3: I

OL

and I

OH

are tested one output at a time.

3.5

7.0

11.0

0.64

1.6

4.2

−

0.64

−

1.6

− 4.2

Min

−

55

°

C

Max

0.25

0.5

1.0

0.05

0.05

0.05

4.95

9.95

14.95

1.5

3.0

4.0

−

0.10

0.1

Min

4.95

9.95

14.95

3.5

7.0

11.0

0.51

1.3

3.4

−

0.51

−

1.3

− 3.4

3

6

4

6

5

10

15

2

9

0.88

2.25

8.8

−

0.88

−

2.25

− 8.8

−

10

−

5

10

−

5

+

25

°

C

Typ

0.004

0.005

0.006

0

0

0

Max

0.25

0.50

1.0

0.05

0.05

0.05

1.5

3.0

4.0

−

0.10

0.10

AC Electrical Characteristics

(Note 4)

CD4001BC: T

A

=

25

°

C, Input t r

; t f

=

20 ns. C

L

=

50 pF, R

L

=

200k. Typical temperature coefficient is 0.3%/

°

C.

Symbol Parameter Conditions Typ t t t

PHL

PLH

THL

, t

TLH

Propagation Delay Time,

HIGH-to-LOW Level

Propagation Delay Time,

LOW-to-HIGH Level

Transition Time

V

DD

= 5V

V

DD

= 10V

V

DD

= 15V

V

DD

= 5V

V

DD

= 10V

V

DD

= 15V

V

DD

= 5V

V

DD

= 10V

V

DD

= 15V

C

IN

C

PD

Average Input Capacitance

Power Dissipation Capacity

Any Input

Any Gate

Note 4: AC Parameters are guaranteed by DC correlated testing.

120

50

35

110

50

35

90

50

40

5

14

Max

250

100

70

250

100

70

200

100

80

7.5

3.5

7.0

11.0

0.36

0.9

2.4

−

0.36

−

0.9

− 2.4

+

125

°

C

Min Max

7.5

15

30

0.05

0.05

0.05

4.95

9.95

14.95

1.5

3.0

4.0

−

1.0

1.0

Units ns ns ns pF pF

µ

A mA mA

µ

A

Units

V

V

V

V

3 www.fairchildsemi.com

AC Electrical Characteristics

(Note 5)

CD4011BC: T

A

=

25

°

C, Input t r

; t f

=

20 ns. C

L

=

50 pF, R

L

= 200k. Typical Temperature Coefficient is 0.3%/ ° C.

Symbol Parameter Conditions Typ t

PHL t

PLH t

THL

, t

TLH

Propagation Delay,

HIGH-to-LOW Level

Propagation Delay,

LOW-to-HIGH Level

Transition Time

V

DD

=

5V

V

DD

=

10V

V

DD

=

15V

V

DD

=

5V

V

DD

=

10V

V

DD

=

15V

V

DD

=

5V

V

DD

=

10V

V

DD

=

15V

120

50

35

85

40

30

90

50

40

5

Max

250

100

70

250

100

70

200

100

80

7.5

C

IN

C

PD

Average Input Capacitance

Power Dissipation Capacity

Any Input

Any Gate

Note 5: AC Parameters are guaranteed by DC correlated testing.

14

Typical Performance Characteristics

Typical

Transfer Characteristics

Typical

Transfer Characteristics

Units ns ns ns pF pF

Typical

Transfer Characteristics www.fairchildsemi.com

4

Typical Performance Characteristics

(Continued)

Typical Transfer Characteristics

5 www.fairchildsemi.com

Typical Performance Characteristics

(Continued) www.fairchildsemi.com

6

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Package Number M14A

7 www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M14D www.fairchildsemi.com

8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Package Number N14A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.

2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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