MB 1508

MB 1508
Sept. 1995
Edition 2.0a
DATA SHEET
MB1508
SERIAL INPUT PLL FREQUENCY SYNTHESIZER
SERIAL INPUT PLL
FREQUENCY SYNTHESIZER
ON CHIP 2.5 GHz PRESCALER
DESCRIPTION
The Fujitsu MB1508 with an on chip 2.5 GHz dual modulus prescaler is a serial input
PLL (Phase Locked Loop) frequency synthesizer with pulse swallow function. It is
well suited for BS tuner, CATV system, and TV tuner applications.
It operates with a supply voltage of 5.0V typ. and dissipates 16mA typ. of current
realized through the use of Fujitsu’s unique U-ESBIC Bi-CMOS technology.
FEATURES
Plastic Package
FPT–20P–M01
• Power supply voltage: VCC = 4.5 to 5.5V
• High operating frequency: fIN = 2.5 GHz (PIN = –4dBm)
• 2.5 GHz dual modulus prescaler: P = 256/272, 512/528
• Low supply current: ICC = 16mA typ.
• Programmable reference divider consisting of:
Binary 2-bit programmable reference counter (R = 256, 512, 1024, 2048)
Pin Assignment
• Programmable divider consisting of:
Binary 5-bit swallow counter (A = 0 to 31)
Binary 12-bit programmable counter (N = 32 to 4095)
• Wide operating temperature: –40C to +85C
• Plastic 20-pin Flat Package (Suffix: —PF)
(TOP VIEW)
ABSOLUTE MAXIMUM RATINGS (See NOTE)
FC
1
20
LD
LE
2
19
fOUT
Symbol
Value
Unit
Data
3
18
VCC2
Power Supply Voltage
VCC
–0.5 to +7.0
V
Clock
4
17
fIN
Output Voltage
VO
–0.5 to VCC +0.5
V
VCC1
5
16
GND2
Output Current
IO
± 10
mA
OSCIN
6
15
fIN
TSTG
–55 to +125
C
OSCOUT
7
14
BC1
GND
8
13
BC2
D01
9
12
BC3
D02
10
11
BC4
RatIng
Storage Temperature
NOTE:
Permanent device damage may occur if the above Absolute Maximum RatIngs are exceeded.Functional operation should be restricted to the condItions as detailed in the operational
sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric fields. However,
it is advised that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages
to this high impedance circuit.
 MB1508
MB1508 Block Diagram
2
MB1508
PIN DESCRIPTION
Pin
No.
Pin
Name
I/O
1
FC
I
Phase select input pin of the phase detector. This pin involves an internal pull up resistor.
When this pin is low, characteristics of the charge pump and phase detector can be reversed.
This input also selects fOUT pin output level, either fr or fp. Please see page 6.
2
LE
I
Load enable input pin. This pin involves a schmitt trigger circuit.
When this pin is high, the data stored in the shift register is transferred into the latch.
3
Data
I
Serial data of binary code input pin. This pin involves a schmitt trigger circuit.
4
Clock
I
Clock input for 24-bit shift register. This pin involves a schmitt trigger circuit.
On rising edge of the clock shifts one bit of data into the shift registers.
5
VCC1
—
PLL power supply voltage input pin.
6
7
OSCIN
OSCOUT
I
O
Oscillator input pin.
Oscillator output pin.
A crystal is connected between OSCIN pin and OSCOUT pin.
8
GND1
—
PLL ground pin.
9
10
DO1
DO2
O
O
Charge pump output pins.
Phase characteristics can be reversed depending upon FC pin input level.
11
12
13
14
BC4
BC3
BC2
BC1
O
O
O
Band switching output pins. (Open-collector output)
Output is controlled by a band bit data, individually.
BCX—bit = H : BCX output transistor is ON.
BCX—bit = L : BCX output transistor is OFF.
(X = 1 to 4)
15
fin
I
Complementary input pin of fin. Please connect to GND through a capacitor.
16
GND2
—
17
fin
I
18
VCC2
—
Description
Prescaler ground pin.
Prescaler input pin.
This signal is AC coupled.
Prescaler power supply voltage input pin.
Monitor pin of the phase detector input.
fOUT pin outputs either of the programmable reference divider output frequency fr or programmable divider
output frequency fp depending upon the FC pin input level.
19
20
fOUT
LD
O
O
FC Pin
fout output signal
H
fr
L
fp
Phase detector output pin.
Normally this pin outputs high. While the phase difference between fr and fp exists, this pin
outputs low.
3
MB1508
FUNCTIONAL DESCRIPTIONS
DIVIDE RATIO SETTING
Divide ratio can be set using the following equation:
fvco = [(P x N)+ (16 x A] x fosc ÷ R
Output frequency of external voltage controlled oscillator (VCO)
fvco:
P:
Preset divide ratio of an internal dual modulus prescaler (256 or 512)
N:
Preset divide ratio of binary 12-bit programmable counter (32 to 4095)
A:
Preset divide ratio of binary 5-bit swallow counter (0 to 31)
Reference oscillator frequency
fosc:
R:
Preset divide ratio of reference counter (256, 512, 1024, 2048)
SERIAL DATA INPUT
On rising edge of clock shifts one bit of the data into the shift register.
When the load enable is high, the data stored in the shift register is transferred to the latch.
24 bit of serial data format is shown below.
Data Input Flow
MSB
LSB
A
1
A
2
A
3
A
4
A
5
N
1
N
2
N
3
N
4
N
5
N
6
N
7
N
8
N
9
N
1
0
N
1
2
N
11
S
W
R
1
Divide ratio of programmable
counter setting bit
Divide ratio of swallow
counter setting bit
B
C
4
R
2
B
C
3
B
C
2
B
C
1
Band switch
setting bit
Divide ratio of reference
counter setting bit
Divide ratio of
prescaler setting bit
5-BIT SWALLOW COUNTER DIVIDE RATIO (A1 to A5)
Divide Ratio
A
A
5
A
4
A
3
A
2
A
1
0
0
0
0
0
0
1
0
0
0
0
1
2
0
0
0
1
0
31
1
1
1
1
1
12-BIT PROGRAMMABLE COUNTER DIVIDE RATIO (N1 to N12)
4
Divide
Ratio
N
12
N
11
N
10
N
9
N
8
N
7
N
6
N
5
N
4
N
3
N
2
N
1
32
0
0
0
0
0
0
1
0
0
0
0
0
33
0
0
0
0
0
0
1
0
0
0
0
1
34
0
0
0
0
0
0
1
0
0
0
1
0
4095
1
1
1
1
1
1
1
1
1
1
1
1
MB1508
FUNCTIONAL DESCRIPTIONS
REFERENCE COUNTER DIVIDE RATIO (R1 to R2)
Divide Ratio
R
R
2
R
1
256
o
o
512
0
1
1024
1
0
2048
1
1
Prescaler divide ratio (SW)
When divide ratio of prescaler setting bit is high, divide ratio of 256/272 is selected.
When divide ratio of prescaler setting bit is low, divide ratio of 512/528 is selected.
Band Switch Setting (BC1 to BC4)
When band switch setting bit is high, output is ON.
When band switch setting bit is low, output is OFF.
5
MB1508
Serial Data Input Timing
Data
S18 =
MSB
S17
S10
S9
S1 =
LSB
C: Control bit
(SW) (∗1)
(S14)
(S8)
(S7)
(S1)
(C: Control bit)
Clock
LE
t1
t2
t3
t4
t5
∗1 : Bits enclosed in parentheses are used when the divide ratio of the programmable reference divider is selected.
Note:
One bit of data is shifted into the shift register on the rising edge of the clock.
NOTES: On rising edge of the clock shifts one bit of data into the shift register.
When LE is high, the data stored in the shift register is transferred into the latch.
PHASE DETECTOR CHARACTERISTICS
FC pin selects the phase of the phase detector. Phase characteristics (charge pump output) can be reversed depending upon the FC pin
input level. Monitor pin (fOUT) output level is selected by FC pin input level as well
.
FC=H or open
Do1, Do2
Note:
fr > fp
H
fr = fp
L
fr < fp
Z
FC=L
fOUT
DO, D02
Outputs programmable
p
reference divider output
frequency fr.
Z
H
Outputs programmable
p
divider output
frequency fp.
Z = (High impedance)
1
VCO
output
frequency
VCO CHARACTERISTICS
Depending upon VCO polarity,
FC pin should be set accordingly:
— When VCO polarity are like FC should be set High or open.
2
LPF input voltage
6
L
fOUT
— When VCO polarity are like FC should be set Low.
MB1508
PHASE DETECTOR WAVEFORM
fr
fp
H
(FC =H)
Z
D01, D02
L
(FC –L)
Z
D01, D02
fr > fp
fr = fp
fr < fp
fr < fp
fr < fp
NOTES: Phase difference detection range: –2π to +2π
Spike shape depends on charge pump characteristics.
The spike is output to diminish dead band.
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Value
Unit
Min
Typ
Max
VCC
4.5
5.0
5.5
V
Input Voltage
VI
GND
—
VCC
V
Operating Temperature
TA
–40
—
+85
C
Power Supply Voltage
Handling Precautions
• This device should be transported and stored in anti-static containers.
• This is a static-sensitive device; take proper anti-ESD precautions. Ensure that personnel and equipment are properly grounded.
Cover workbenches with grounded conductive mats.
• Always turn the power supply off before inserting or removing the device from its socket.
• Protect leads with a conductive sheet when handling or transporting PC boards with devices.
7
MB1508
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Condition
Min
Typ
Max
Unit
ICC
Note 1
—
16.0
—
mA
fin
Note2
10
—
2500
fOSC
—
—
4
10
2300 to 2500MHz
–4
—
6
1900 to 2300MHz
–7
—
6
10 to 1900MHz
–10
—
6
VOSC
—
0.5
—
—
VIH
—
VCCx 0.7+0.4
—
—
VIL
—
—
—
VCCx0.3–0.4
IIH
—
—
1.0
—
IIL
—
—
–1.0
—
FC
IILFC
—
—
–60
—
Input Current
OSCIN
IOSC
—
—
+50
—
High-level Output Voltage
VOH
4.4
—
—
Low-level Output Voltage
Except
p DO
and
BC1 to BC4
—
—
0.4
High Impedance
Cutoff Current
DO1, D02
BC1 to BC4
High-level Output Current
Power Supply Current
Operating Frequency
fin
OSCIN
Input Sensitivity
fin
OSCIN
High-level Input Voltage
Low-level Input Voltage
High-level Input Current
Except fin
and OSCIN
Data
Clock
LE
Low-level Input Current
VOL
VCC = 5
5.0
0V
dBm
VPP
V
µA
V
IOFF
—
—
—
1.1
IOH
—
–1.0
—
—
Low-level Output Current
Except
p DO
and
BC1 to BC4
IOL
—
1.0
—
—
Withstand Output Voltage
BC1 to BC4
VB
—
—
—
12
NOTE:
8
Pfin
MHz
µA
mA
1: f in = 2.5GHz, OSCIN=4.0MHz, Vcc=5.0V. Inputs are grounded and outputs are open.
2: AC coupling. Minimum operating frequency is measured with a capacitor 1000pF.
V
MB1508
TEST CIRCUIT
Prescaler Input Sensitivity
1000 p
0.1 µ
1000 p
P·G
50 Ω
20 19
18 17
16
15
14
13
12
7
8
9
11
MB1508
1
2
3
4
5
6
10
0.1 µ
9
MB1508
MB1508 APPLICATION CIRCUIT
10
MB1508
PACKAGE DIMENSIONS
20–Lead Plastic Flat Package
(Case No.: FPT–20P–M01)
.089(2.25) MAX
(MOUNTING HEIGHT)
+.010
+0.25
.500
(12.70
)
–.008
–0.20
.002(0.05) MIN
(STAND OFF HEIGHT)
.307±.016
(7.80±0.40)
INDEX
.209±.012
(5.30±0.30)
+.016
+0.40
.268
(6.80
)
–.008
–0.20
.020±.008
(0.50±0.20)
.018±.004
(0.45±0.10)
∅.005(0.13) M
+.002
+0.05
.006
(0.15
)
–.001
–0.02
Details of “A” part
“A”
.004(0.10)
.450(11.43) REF
1991 FUJITSU LIMITED F20003S-5C
.008(0.20)
.020(0.50)
.007(0.18)
MAX
.027(0.68)
MAX
Dimensions in
inches (millimeters)
11
MB1508
All Rights Reserved.
Circuit diagrams utilizing Fujitsu products are included as a means of illustrating
typical semiconductor applications. Complete Information sufficient for construction
purposes is not necessarily given.
The information contained in this document has been carefully checked and is
believed to be reliable. However, Fujitsu assumes no responsibility for inaccuracies.
The information contained in this document does not convey any license under the
copyrights, patent rights or trademarks claimed and owned by Fujitsu.
Fujitsu reserves the right to change products or specifications without notice.
No part of this publication may be copied or reproduced in any form or by any means,
or transferred to any third party without prior written consent of Fujitsu.
12
MB1508
FUJITSU LIMITED
For further information, please contact:
Japan
FUJITSU LIMITED
Semiconductor Marketing
Furukawa Sogo Bldg.
6-1, Marunouchi 2-chome
Chiyoda-ku, Tokyo 100
Japan
Tel: (03) 3216-3211
Telex: 781-2224361
FAX: (03) 3216-9771
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804 USA
Tel: (408) 922-9000
FAX: (408) 432-9044
Europe
FUJITSU MIKROELEKTRONIK GmbH
Arabella Centre 9.OG
Lyoner Strasse 44-48
D-6000 Frankfurt 71
F.R. Germany
Tel: (069) 66320
Telex: 411963
FAX: (069) 6632122
Asia
FUJITSU MICROELECTRONICS ASIA PTE LIMITED
51 Bras Basah Road
Plaza by the Park
#06-04/07
Singapore 0718
Tel: 336-1600
Telex: 55373
FAX: 336-1609
 1991 FUJITSU LIMITED
IC-07229-2-91-DS
13
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