DG408

DG408
DG408xxx
Rev. A
RELIABILITY REPORT
FOR
DG408xxx
PLASTIC ENCAPSULATED DEVICES
August 21, 2003
MAXIM INTEGRATED PRODUCTS
120 SAN GABRIEL DR.
SUNNYVALE, CA 94086
Written by
Reviewed by
Jim Pedicord
Quality Assurance
Reliability Lab Manager
Bryan J. Preeshl
Quality Assurance
Executive Director
Conclusion
The DG408 successfully meets the quality and reliability standards required of all Maxim products. In addition,
Maxim’s continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim’s quality
and reliability standards.
Table of Contents
I. ........Device Description
II. ........Manufacturing Information
III. .......Packaging Information
IV. .......Die Information
V. ........Quality Assurance Information
VI. .......Reliability Evaluation
......Attachments
I. Device Description
A. General
Maxim's redesigned DG408 CMOS analog multiplexer now feature guaranteed matching between channels (8
max) and flatness over the specified signal range (9 max). This low on-resistance mux (100 max) conducts
equally well in either direction and features guaranteed low charge injection (15pC max). In addition, it offers low
input off-leakage current over temperature—less than 5nA at +85°C.
The DG408 is a 1-of-8 multiplexer/demultiplexer, operating with a +5V to +30V single supply and with ±5V to ±20V
dual supplies. ESD protection is guaranteed to be greater than 2000V per Method 3015.7 of MIL-STD-883. This
improved mux is pin-compatible plug-in upgrade for the industry standard DG408.
B. Absolute Maximum Ratings
Item
Voltage Referenced to VV+
GND
Digital Inputs, S, D (Note 1)
V- - 2V)
Continuous Current (any terminal)
Peak Current, S, D (pulsed at 1ms, 10% duty cycle max)
Operating Temperature Ranges
DG408C
DG408D,E_
Storage Temperature Range
Lead Temperature (soldering, 10s)
Voltage Referenced to VV+
GND
Continuous Power Dissipation (TA = +70°C)
16-Pin DIP
16-Pin NSO
16-Pin TSSOP
Derates above +70°C
16-Pin DIP
16-Pin SO
16-Pin TSSOP
Rating
-0.3V, 44V
-0.3V, 25V
to (V+ + 2V) or30mA, (whichever occurs first)
30mA
100mA
0°C to +70°C
-40°C to +85°C
-65°C to +150°C
+300°C
44V
25V
842mW
696mW
755mW
10.53mW/°C
8.7mW/°C
9.4mW/°C
Note 1: Signals on SX, DX, or INX exceeding V+ or V- are clamped by internal diodes. Limit forward current to
maximum current ratings.
II. Manufacturing Information
A. Description/Function:
Improved, 8-Channel/Dual 4-Channel, CMOS Analog Multiplexers
B. Process:
S5HV (Medium voltage 5 micron silicon gate CMOS)
C. Number of Device Transistors:
122
D. Fabrication Location:
Oregon, USA
E. Assembly Location:
Philippines, Malaysia or Thailand
F. Date of Initial Production:
January, 1994
III. Packaging Information
A. Package Type:
16-Lead NSO
16-Lead TSSOP
16-Lead PDIP
B. Lead Frame:
Copper
Copper
Copper
C. Lead Finish:
Solder Plate
Solder Plate
Solder Plate
D. Die Attach:
Silver-filled Epoxy
Silver-filled Epoxy
Silver-filled Epoxy
E. Bondwire:
Gold (1.3 mil dia.)
Gold (1.0 mil dia.)
Gold (1.3 mil dia.)
F. Mold Material:
Epoxy with silica filler
Epoxy with silica filler
Epoxy with silica filler
G. Assembly Diagram:
# 05-0301-0546
# 05-0301-0897
# 05-0301-0545
H. Flammability Rating:
Class UL94-V0
Class UL94-V0
Class UL94-V0
I. Classification of Moisture Sensitivity
per JEDEC standard JESD22-A112:
Level 1
Level 1
Level 1
IV. Die Information
A. Dimensions:
80 x 136 mils
B. Passivation:
Si3N4/SiO2 (Silicon nitride/ Silicon dioxide)
C. Interconnect:
Aluminum/Si (Si = 1%)
D. Backside Metallization:
None
E. Minimum Metal Width:
5 microns (as drawn)
F. Minimum Metal Spacing:
5 microns (as drawn)
G. Bondpad Dimensions:
5 mil. Sq.
H. Isolation Dielectric:
SiO2
I. Die Separation Method:
Wafer Saw
V. Quality Assurance Information
A. Quality Assurance Contacts: Jim Pedicord (Manager, Rel Operations)
Bryan Preeshl
(Executive Director of QA)
Kenneth Huening (Vice President)
B. Outgoing Inspection Level:
0.1% for all electrical parameters guaranteed by the Datasheet.
0.1% For all Visual Defects.
C. Observed Outgoing Defect Rate: < 50 ppm
D. Sampling Plan: Mil-Std-105D
VI. Reliability Evaluation
A. Accelerated Life Test
The results of the 135°C biased (static) life test are shown in Table 1. Using these results, the Failure
Rate (λ) is calculated as follows:
λ=
1
=
MTTF
1.83
(Chi square value for MTTF upper limit)
192 x 4389 x 480 x 2
Temperature Acceleration factor assuming an activation energy of 0.8eV
λ = 2.26 x 10-9
λ = 2.26 F.I.T. (60% confidence level @ 25°C)
This low failure rate represents data collected from Maxim’s reliability qualification and monitor programs.
Maxim also performs weekly Burn-In on samples from production to assure reliability of its processes. The
reliability required for lots which receive a burn-in qualification is 59 F.I.T. at a 60% confidence level, which equates
to 3 failures in an 80 piece sample. Maxim performs failure analysis on rejects from lots exceeding this level. The
attached Burn-In Schematic (Spec. # 06-0045) shows the static circuit used for this test. Maxim also performs
1000 hour life test monitors quarterly for each process. This data is published in the Product Reliability Report (RR1M).
B. Moisture Resistance Tests
Maxim evaluates pressure pot stress from every assembly process during qualification of each new design.
Pressure Pot testing must pass a 20% LTPD for acceptance. Additionally, industry standard 85°C/85%RH or
HAST tests are performed quarterly per device/package family.
C. E.S.D. and Latch-Up Testing
The AG56 die type has been found to have all pins able to withstand a transient pulse of ±2000V, per MilStd-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device
withstands a current of ±500mA.
Table 1
Reliability Evaluation Test Results
DG408xxx
TEST ITEM
TEST CONDITION
Static Life Test (Note 1)
Ta = 135°C
Biased
Time = 192 hrs.
FAILURE
IDENTIFICATION
PACKAGE
DC Parameters
& functionality
SAMPLE
SIZE
NUMBER OF
FAILURES
480
0
77
77
77
0
0
0
0
Moisture Testing (Note 2)
Pressure Pot
Ta = 121°C
P = 15 psi.
RH= 100%
Time = 168hrs.
DC Parameters
& functionality
PDIP
NSO
TSSOP
85/85
Ta = 85°C
RH = 85%
Biased
Time = 1000hrs.
DC Parameters
& functionality
77
DC Parameters
& functionality
77
Mechanical Stress (Note 2)
Temperature
Cycle
-65°C/150°C
1000 Cycles
Method 1010
Note 1: Life Test Data may represent plastic DIP qualification lots.
Note 2: Generic Package/Process data
0
Attachment #1
TABLE II. Pin combination to be tested. 1/ 2/
Terminal A
(Each pin individually
connected to terminal A
with the other floating)
Terminal B
(The common combination
of all like-named pins
connected to terminal B)
1.
All pins except VPS1 3/
All VPS1 pins
2.
All input and output pins
All other input-output pins
1/ Table II is restated in narrative form in 3.4 below.
2/ No connects are not to be tested.
3/ Repeat pin combination I for each named Power supply and for ground
(e.g., where VPS1 is VDD, VCC, VSS, VBB, GND, +VS, -VS, VREF, etc).
3.4
Pin combinations to be tested.
a.
Each pin individually connected to terminal A with respect to the device ground pin(s) connected
to terminal B. All pins except the one being tested and the ground pin(s) shall be open.
b.
Each pin individually connected to terminal A with respect to each different set of a combination
of all named power supply pins (e.g., VSS1, or VSS2 or VSS3 or VCC1 , or VCC2 ) connected to
terminal B. All pins except the one being tested and the power supply pin or set of pins shall be
open.
c.
Each input and each output individually connected to terminal A with respect to a combination of
all the other input and output pins connected to terminal B. All pins except the input or output pin
being tested and the combination of all the other input and output pins shall be open.
TERMINAL C
R1
R2
S1
TERMINAL A
REGULATED
HIGH VOLTAGE
SUPPLY
S2
C1
DUT
SOCKET
SHORT
TERMINAL B
TERMINAL D
Mil Std 883D
Method 3015.7
Notice 8
R = 1.5kΩ
C = 100pf
CURRENT
PROBE
(NOTE 6)
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